| /Zephyr-latest/samples/net/cloud/mqtt_azure/src/ |
| D | digicert.cer | 2 "-----BEGIN CERTIFICATE-----\r\n"
3 "MIIDdzCCAl+gAwIBAgIEAgAAuTANBgkqhkiG9w0BAQUFADBaMQswCQYDVQQGEwJJ\r\n"
4 "RTESMBAGA1UEChMJQmFsdGltb3JlMRMwEQYDVQQLEwpDeWJlclRydXN0MSIwIAYD\r\n"
5 "VQQDExlCYWx0aW1vcmUgQ3liZXJUcnVzdCBSb290MB4XDTAwMDUxMjE4NDYwMFoX\r\n"
6 "DTI1MDUxMjIzNTkwMFowWjELMAkGA1UEBhMCSUUxEjAQBgNVBAoTCUJhbHRpbW9y\r\n"
7 "ZTETMBEGA1UECxMKQ3liZXJUcnVzdDEiMCAGA1UEAxMZQmFsdGltb3JlIEN5YmVy\r\n"
8 "VHJ1c3QgUm9vdDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKMEuyKr\r\n"
9 "mD1X6CZymrV51Cni4eiVgLGw41uOKymaZN+hXe2wCQVt2yguzmKiYv60iNoS6zjr\r\n"
10 "IZ3AQSsBUnuId9Mcj8e6uYi1agnnc+gRQKfRzMpijS3ljwumUNKoUMMo6vWrJYeK\r\n"
11 "mpYcqWe4PwzV9/lSEy/CG9VwcPCPwBLKBsua4dnKM3p31vjsufFoREJIE9LAwqSu\r\n"
[all …]
|
| /Zephyr-latest/samples/net/sockets/big_http_download/src/ |
| D | isrgrootx1.pem | 1 "-----BEGIN CERTIFICATE-----\n"
2 "MIIFazCCA1OgAwIBAgIRAIIQz7DSQONZRGPgu2OCiwAwDQYJKoZIhvcNAQELBQAw\n"
3 "TzELMAkGA1UEBhMCVVMxKTAnBgNVBAoTIEludGVybmV0IFNlY3VyaXR5IFJlc2Vh\n"
4 "cmNoIEdyb3VwMRUwEwYDVQQDEwxJU1JHIFJvb3QgWDEwHhcNMTUwNjA0MTEwNDM4\n"
5 "WhcNMzUwNjA0MTEwNDM4WjBPMQswCQYDVQQGEwJVUzEpMCcGA1UEChMgSW50ZXJu\n"
6 "ZXQgU2VjdXJpdHkgUmVzZWFyY2ggR3JvdXAxFTATBgNVBAMTDElTUkcgUm9vdCBY\n"
7 "MTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBAK3oJHP0FDfzm54rVygc\n"
8 "h77ct984kIxuPOZXoHj3dcKi/vVqbvYATyjb3miGbESTtrFj/RQSa78f0uoxmyF+\n"
9 "0TM8ukj13Xnfs7j/EvEhmkvBioZxaUpmZmyPfjxwv60pIgbz5MDmgK7iS4+3mX6U\n"
10 "A5/TR5d8mUgjU+g4rk8Kb4Mu0UlXjIB0ttov0DiNewNwIRt18jA8+o+u3dpjq+sW\n"
[all …]
|
| D | DigiCertGlobalRootG2.crt.pem | 1 "-----BEGIN CERTIFICATE-----\n"
2 "MIIDjjCCAnagAwIBAgIQAzrx5qcRqaC7KGSxHQn65TANBgkqhkiG9w0BAQsFADBh\n"
3 "MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3\n"
4 "d3cuZGlnaWNlcnQuY29tMSAwHgYDVQQDExdEaWdpQ2VydCBHbG9iYWwgUm9vdCBH\n"
5 "MjAeFw0xMzA4MDExMjAwMDBaFw0zODAxMTUxMjAwMDBaMGExCzAJBgNVBAYTAlVT\n"
6 "MRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5j\n"
7 "b20xIDAeBgNVBAMTF0RpZ2lDZXJ0IEdsb2JhbCBSb290IEcyMIIBIjANBgkqhkiG\n"
8 "9w0BAQEFAAOCAQ8AMIIBCgKCAQEAuzfNNNx7a8myaJCtSnX/RrohCgiN9RlUyfuI\n"
9 "2/Ou8jqJkTx65qsGGmvPrC3oXgkkRLpimn7Wo6h+4FR1IAWsULecYxpsMNzaHxmx\n"
10 "1x7e/dfgy5SDN67sH0NO3Xss0r0upS/kqbitOtSZpLYl6ZtrAGCSYP9PIUkY92eQ\n"
[all …]
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| /Zephyr-latest/scripts/utils/ |
| D | gen_util_macros.py | 3 - Z_LISTIFY
4 - Z_UTIL_INC
5 - Z_UTIL_DEC
6 - Z_UTIL_X2
7 - Z_IS_EQ
15 python $ZEPHYR_BASE/scripts/utils/gen_util_macros.py -l 4095
18 SPDX-License-Identifier: Apache-2.0
24 file.write("/**\n")
25 file.write(" * @cond INTERNAL_HIDDEN\n")
26 file.write(" */\n")
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| /Zephyr-latest/include/zephyr/drivers/clock_control/ |
| D | renesas_ra_cgc.h | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/clock/ra_clock.h>
24 #define RA_CGC_DIV_BCLK(n) UTIL_CAT(BSP_CLOCKS_SYS_CLOCK_DIV_, n) argument
25 #define RA_CGC_DIV_CANFDCLK(n) UTIL_CAT(BSP_CLOCKS_CANFD_CLOCK_DIV_, n) argument
26 #define RA_CGC_DIV_CECCLK(n) UTIL_CAT(BSP_CLOCKS_CEC_CLOCK_DIV_, n) argument
27 #define RA_CGC_DIV_CLKOUT(n) UTIL_CAT(BSP_CLOCKS_CLKOUT_DIV_, n) argument
28 #define RA_CGC_DIV_CPUCLK(n) UTIL_CAT(BSP_CLOCKS_SYS_CLOCK_DIV_, n) argument
29 #define RA_CGC_DIV_FCLK(n) UTIL_CAT(BSP_CLOCKS_SYS_CLOCK_DIV_, n) argument
30 #define RA_CGC_DIV_I3CCLK(n) UTIL_CAT(BSP_CLOCKS_I3C_CLOCK_DIV_, n) argument
31 #define RA_CGC_DIV_ICLK(n) UTIL_CAT(BSP_CLOCKS_SYS_CLOCK_DIV_, n) argument
[all …]
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| /Zephyr-latest/drivers/wifi/nrf_wifi/src/ |
| D | wifi_util.c | 4 * SPDX-License-Identifier: Apache-2.0
8 * @brief NRF Wi-Fi util shell module
58 "%s: Invalid rate_flag %d\n", in check_valid_data_rate()
71 return -ENOEXEC; in nrf_wifi_util_conf_init()
77 conf_params->he_ltf = -1; in nrf_wifi_util_conf_init()
78 conf_params->he_gi = -1; in nrf_wifi_util_conf_init()
90 if (ctx->conf_params.set_he_ltf_gi) { in nrf_wifi_util_set_he_ltf()
93 "Disable 'set_he_ltf_gi', to set 'he_ltf'\n"); in nrf_wifi_util_set_he_ltf()
94 return -ENOEXEC; in nrf_wifi_util_set_he_ltf()
102 "Invalid HE LTF value(%lu).\n", in nrf_wifi_util_set_he_ltf()
[all …]
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| /Zephyr-latest/samples/net/secure_mqtt_sensor_actuator/src/tls_config/ |
| D | cert.h | 4 * SPDX-License-Identifier: Apache-2.0
13 * "cat ca.crt | sed -e '1d;$d' | base64 -d |xxd -i"
14 * If using a PEM certifificate, each line should be wrapped in "\r\n"
20 static const unsigned char ca_certificate[] = "-----BEGIN CERTIFICATE-----\r\n"
21 "MIIEAzCCAuugAwIBAgIUBY1hlCGvdj4NhBXkZ/uLUZNILAwwDQYJKoZIhvcNAQEL\r\n"
22 "BQAwgZAxCzAJBgNVBAYTAkdCMRcwFQYDVQQIDA5Vbml0ZWQgS2luZ2RvbTEOMAwG\r\n"
23 "A1UEBwwFRGVyYnkxEjAQBgNVBAoMCU1vc3F1aXR0bzELMAkGA1UECwwCQ0ExFjAU\r\n"
24 "BgNVBAMMDW1vc3F1aXR0by5vcmcxHzAdBgkqhkiG9w0BCQEWEHJvZ2VyQGF0Y2hv\r\n"
25 "by5vcmcwHhcNMjAwNjA5MTEwNjM5WhcNMzAwNjA3MTEwNjM5WjCBkDELMAkGA1UE\r\n"
26 "BhMCR0IxFzAVBgNVBAgMDlVuaXRlZCBLaW5nZG9tMQ4wDAYDVQQHDAVEZXJieTES\r\n"
[all …]
|
| /Zephyr-latest/drivers/memc/ |
| D | memc_nxp_s32_qspi.c | 4 * SPDX-License-Identifier: Apache-2.0
52 const struct memc_nxp_s32_qspi_config *config = dev->config; in memc_nxp_s32_qspi_init()
53 struct memc_nxp_s32_qspi_data *data = dev->data; in memc_nxp_s32_qspi_init()
56 data->instance = get_instance(config->base); in memc_nxp_s32_qspi_init()
58 if (pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT)) { in memc_nxp_s32_qspi_init()
59 return -EIO; in memc_nxp_s32_qspi_init()
62 status = Qspi_Ip_ControllerInit(data->instance, config->controller_cfg); in memc_nxp_s32_qspi_init()
65 data->instance, status); in memc_nxp_s32_qspi_init()
66 return -EIO; in memc_nxp_s32_qspi_init()
74 struct memc_nxp_s32_qspi_data *data = dev->data; in memc_nxp_s32_qspi_get_instance()
[all …]
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| /Zephyr-latest/drivers/sensor/nxp/qdec_nxp_s32/ |
| D | qdec_nxp_s32.c | 4 * SPDX-License-Identifier: Apache-2.0
68 struct qdec_s32_data *data = dev->data; in qdec_emios_overflow_count_cw_callback()
70 data->emios_cw_overflow_count++; in qdec_emios_overflow_count_cw_callback()
75 struct qdec_s32_data *data = dev->data; in qdec_emios_overflow_count_ccw_callback()
77 data->emios_ccw_overflow_count++; in qdec_emios_overflow_count_ccw_callback()
82 const struct qdec_s32_config *config = dev->config; in qdec_s32_fetch()
83 struct qdec_s32_data *data = dev->data; in qdec_s32_fetch()
86 return -ENOTSUP; in qdec_s32_fetch()
89 data->counter_CW = (uint32_t)(Emios_Icu_Ip_GetEdgeNumbers( in qdec_s32_fetch()
90 config->emios_inst, config->emios_channels[EMIOS_CW_CH_IDX])); /* CW counter */ in qdec_s32_fetch()
[all …]
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| /Zephyr-latest/tests/kernel/common/src/ |
| D | printk.c | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/sys/printk-hooks.h>
58 char expected_32[] = "22 113 10000 32768 40000 22\n"
59 "p 112 -10000 -32768 -40000 -22\n"
61 "0x1 0x1 0x1 0x1 0x1\n"
62 "0x1 0x1 0x1 0x1\n"
63 "42 42 42 42\n"
64 "-42 -42 -42 -42\n"
65 "42 42 42 42\n"
66 "42 42 42 42\n"
[all …]
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| /Zephyr-latest/tests/arch/riscv/fatal/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
16 * follwed by the "hex-coded-decismal" number of the register. in main()
19 /* "RA" -> "DA". Kind of a stretch, but okay. */ in main()
20 "li x1, 0xDADA0000FF000101\n\t" in main()
23 /* "li x2, 0\n\t" */ in main()
25 /* T0 -> D0. Kinda close in pronunciation. */ in main()
26 "li x5, 0xD0FF0000FF000505\n\t" in main()
27 "li x6, 0xD1FF0000FF000606\n\t" in main()
28 "li x7, 0xD2FF0000FF000707\n\t" in main()
29 /* S0 -> C0. Kinda close in pronunciation. */ in main()
[all …]
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| /Zephyr-latest/tests/kernel/fpu_sharing/generic/src/ |
| D | float_regs_riscv_gcc.h | 9 * SPDX-License-Identifier: Apache-2.0
51 "mv t0, %0\n" in _load_all_float_registers()
52 "mv t1, %1\n" in _load_all_float_registers()
53 RV_FPREG_LOAD "f0, 0(t0)\n" in _load_all_float_registers()
54 "add t0, t0, t1\n" in _load_all_float_registers()
55 RV_FPREG_LOAD "f1, 0(t0)\n" in _load_all_float_registers()
56 "add t0, t0, t1\n" in _load_all_float_registers()
57 RV_FPREG_LOAD "f2, 0(t0)\n" in _load_all_float_registers()
58 "add t0, t0, t1\n" in _load_all_float_registers()
59 RV_FPREG_LOAD "f3, 0(t0)\n" in _load_all_float_registers()
[all …]
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| D | float_regs_sparc.h | 4 * SPDX-License-Identifier: Apache-2.0
16 "ldd [%0 + 0x00], %%f0\n" in _load_all_float_registers()
17 "ldd [%0 + 0x08], %%f2\n" in _load_all_float_registers()
18 "ldd [%0 + 0x10], %%f4\n" in _load_all_float_registers()
19 "ldd [%0 + 0x18], %%f6\n" in _load_all_float_registers()
20 "ldd [%0 + 0x20], %%f8\n" in _load_all_float_registers()
21 "ldd [%0 + 0x28], %%f10\n" in _load_all_float_registers()
22 "ldd [%0 + 0x30], %%f12\n" in _load_all_float_registers()
23 "ldd [%0 + 0x38], %%f14\n" in _load_all_float_registers()
24 "ldd [%0 + 0x40], %%f16\n" in _load_all_float_registers()
[all …]
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| D | float_regs_x86_gcc.h | 9 * SPDX-License-Identifier: Apache-2.0
42 "movdqu 0(%0), %%xmm0\n\t;" in _load_all_float_registers()
43 "movdqu 16(%0), %%xmm1\n\t;" in _load_all_float_registers()
44 "movdqu 32(%0), %%xmm2\n\t;" in _load_all_float_registers()
45 "movdqu 48(%0), %%xmm3\n\t;" in _load_all_float_registers()
46 "movdqu 64(%0), %%xmm4\n\t;" in _load_all_float_registers()
47 "movdqu 80(%0), %%xmm5\n\t;" in _load_all_float_registers()
48 "movdqu 96(%0), %%xmm6\n\t;" in _load_all_float_registers()
49 "movdqu 112(%0), %%xmm7\n\t;" in _load_all_float_registers()
51 "fldt 128(%0)\n\t;" in _load_all_float_registers()
[all …]
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| /Zephyr-latest/soc/nuvoton/npcx/npcx7/ |
| D | soc.h | 4 * SPDX-License-Identifier: Apache-2.0
12 /* NPCX7 SCFG multi-registers offset */
13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x028 + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n)) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
18 /* NPCX7 MIWU multi-registers offset */
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 2) + ((n < 5) ? 0 : 0x01e)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 2) + ((n < 5) ? 0 : 0x01e)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x070 + n) argument
[all …]
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| /Zephyr-latest/soc/nuvoton/npcx/npcx9/ |
| D | soc.h | 4 * SPDX-License-Identifier: Apache-2.0
12 /* NPCX9 SCFG multi-registers */
13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x028 + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n)) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
18 /* NPCX9 MIWU multi-registers */
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 0x010)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 0x010)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x002 + (n * 0x010)) argument
[all …]
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| /Zephyr-latest/tests/bluetooth/shell/ |
| D | testcase.yaml | 4 - native_sim
6 - native_sim
10 - CONFIG_NATIVE_UART_0_ON_STDINOUT=y
12 - qemu_x86
13 - native_sim
14 - native_sim/native/64
15 - nrf52840dk/nrf52840
17 - qemu_x86
24 - CONFIG_BT_TRANSMIT_POWER_CONTROL=y
25 - CONFIG_BT_LL_SW_SPLIT=n
[all …]
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| /Zephyr-latest/tests/drivers/uart/uart_mix_fifo_poll/ |
| D | testcase.yaml | 3 - drivers
4 - uart
8 - nrf52840dk/nrf52840
9 - nrf9160dk/nrf9160
10 - nrf5340dk/nrf5340/cpuapp
11 - nrf5340bsim/nrf5340/cpuapp
12 - nrf54l15dk/nrf54l15/cpuapp
13 - nrf54l20pdk/nrf54l20/cpuapp
14 - nrf54l15bsim/nrf54l15/cpuapp
15 - nrf54h20dk/nrf54h20/cpuapp
[all …]
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| /Zephyr-latest/soc/nuvoton/npcx/npcx4/ |
| D | soc.h | 4 * SPDX-License-Identifier: Apache-2.0
12 /* NPCX4 SCFG multi-registers */
13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x02b + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) (0x150 + n) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
18 /* NPCX4 MIWU multi-registers */
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 0x010)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 0x010)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x002 + (n * 0x010)) argument
[all …]
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| /Zephyr-latest/tests/misc/print_format/src/ |
| D | main.c | 4 * SPDX-License-Identifier: Apache-2.0
11 printk("d%" PRId8 "\n", INT8_C(8)); in main()
12 printk("d%" PRId16 "\n", INT16_C(16)); in main()
13 printk("d%" PRId32 "\n", INT32_C(32)); in main()
14 printk("d%" PRId64 "\n", INT64_C(64)); in main()
16 printk("i%" PRIi8 "\n", INT8_C(8)); in main()
17 printk("i%" PRIi16 "\n", INT16_C(16)); in main()
18 printk("i%" PRIi32 "\n", INT32_C(32)); in main()
19 printk("i%" PRIi64 "\n", INT64_C(64)); in main()
21 printk("o%" PRIo8 "\n", INT8_C(8)); in main()
[all …]
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| /Zephyr-latest/drivers/mbox/ |
| D | mbox_nxp_s32_mru.c | 2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
43 const struct nxp_s32_mru_config *cfg = dev->config; in is_rx_channel_valid()
45 return ((ch < MRU_MAX_CHANNELS) && (ch < cfg->hw_cfg.NumChannel)); in is_rx_channel_valid()
52 const struct nxp_s32_mru_config *cfg = dev->config; in get_mbox_addr()
54 return ((uintptr_t)cfg->base + (channel + 1) * MRU_CHANNEL_OFFSET in get_mbox_addr()
61 const struct nxp_s32_mru_config *cfg = dev->config; in nxp_s32_mru_send()
67 return -EINVAL; in nxp_s32_mru_send()
71 return -EINVAL; in nxp_s32_mru_send()
72 } else if (msg->size > (MRU_MBOX_SIZE * MRU_MAX_MBOX_PER_CHAN)) { in nxp_s32_mru_send()
[all …]
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| D | mbox_andes_plic_sw.c | 4 * SPDX-License-Identifier: Apache-2.0
30 const struct mbox_plic_conf *conf = dev->config; in is_channel_valid()
32 return (ch <= conf->channel_max) && conf->irq_sources[ch]; in is_channel_valid()
37 const struct mbox_plic_conf *conf = dev->config; in mbox_plic_send()
44 return -EINVAL; in mbox_plic_send()
48 riscv_plic_irq_set_pending(conf->irq_sources[ch]); in mbox_plic_send()
56 struct mbox_plic_data *data = dev->data; in mbox_plic_register_callback()
59 return -EINVAL; in mbox_plic_register_callback()
62 k_spinlock_key_t key = k_spin_lock(&data->lock); in mbox_plic_register_callback()
64 data->cb[ch] = cb; in mbox_plic_register_callback()
[all …]
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| /Zephyr-latest/scripts/west_commands/completion/ |
| D | west-completion.fish | 20 set -l tokens (commandline -opc)
36 # argv[n] are the arguments to count, if not specified will count all arguments after 'west <comman…
38 # return 1 if the command line contain more than $argv[1] element from $argv[n...]
41 set -l tokens (commandline -opc)
42 set -l argc (count $argv)
43 set -l max $argv[1]
44 set -l counter 0
46 if test $argc -eq 1
47 if test (math (count $tokens) - 2) -ge $max
60 if $counter -ge $max
[all …]
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| /Zephyr-latest/samples/modules/tflite-micro/magic_wand/train/ |
| D | train_magic_wand_model.ipynb | 5 "Copyright 2020 The TensorFlow Authors. All Rights Reserved.\n",
6 "\n",
7 "Licensed under the Apache License, Version 2.0 (the \"License\");\n",
8 "you may not use this file except in compliance with the License.\n",
9 "You may obtain a copy of the License at\n",
10 "\n",
11 " http://www.apache.org/licenses/LICENSE-2.0\n",
12 "\n",
13 "Unless required by applicable law or agreed to in writing, software\n",
14 "distributed under the License is distributed on an \"AS IS\" BASIS,\n",
[all …]
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| /Zephyr-latest/subsys/net/lib/shell/ |
| D | gptp.c | 5 * SPDX-License-Identifier: Apache-2.0
30 const struct shell *sh = data->sh; in gptp_port_cb()
31 int *count = data->user_data; in gptp_port_cb()
34 PR("Port Interface \tRole\n"); in gptp_port_cb()
39 PR("%2d %p [%d] \t%s\n", port, iface, net_if_get_by_iface(iface), in gptp_port_cb()
247 switch (GPTP_GLOBAL_DS()->selected_role[port]) { in selected_role_str()
257 return "PRE-MASTER"; in selected_role_str()
291 PR_WARNING("Cannot get gPTP information for port %d (%d)\n", in gptp_print_port_info()
296 NET_ASSERT(port == port_ds->port_id.port_number, in gptp_print_port_info()
298 port_ds->port_id.port_number); in gptp_print_port_info()
[all …]
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