| /hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
| D | stm32l0xx_hal_rcc_ex.h | 1177 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
1222 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
1286 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_hal_rcc_ex.h | 1935 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
2822 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
3220 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
3868 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
4645 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
5609 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_hal_rcc.h | 1451 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_C2_APB1_GRP1_EnableClockSleep(LL_C2_APB1_GRP… macro
1479 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERI… macro
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| /hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/ |
| D | stm32l1xx_hal_rcc.h | 1046 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_hal_rcc.h | 1440 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/ |
| D | stm32f2xx_hal_rcc.h | 1300 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/ |
| D | stm32mp1xx_hal_rcc.h | 1784 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->MP_APB1LPENSETR = RCC_MP_APB1LPENSETR_TIM2L… macro
2438 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->MC_APB1LPENSETR = RCC_MC_APB1LPENSETR_TIM2L… macro
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| /hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_hal_rcc.h | 1976 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR1, RCC_APBSMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_hal_rcc.h | 2136 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_hal_rcc.h | 2121 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERI… macro
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| /hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_hal_rcc.h | 2165 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_hal_rcc.h | 3536 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_hal_rcc_ex.h | 2077 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
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| /hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_hal_rcc.h | 3008 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_hal_rcc.h | 3686 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM2LPEN) macro
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| /hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_hal_rcc.h | 5821 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LLPENR) |= (RCC_APB1LLPENR_TIM2LPEN) macro
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