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Searched defs:__HAL_RCC_TIM2_CLK_SLEEP_ENABLE (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc_ex.h1177 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
1222 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
1286 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR, (RCC_APB1SMENR_TIM2SMEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1935 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
2822 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
3220 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
3868 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
4645 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
5609 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h1451 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_C2_APB1_GRP1_EnableClockSleep(LL_C2_APB1_GRP… macro
1479 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERI… macro
/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h1046 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h1440 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h1300 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_rcc.h1784 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->MP_APB1LPENSETR = RCC_MP_APB1LPENSETR_TIM2L… macro
2438 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->MC_APB1LPENSETR = RCC_MC_APB1LPENSETR_TIM2L… macro
/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1976 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR1, RCC_APBSMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h2136 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h2121 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() LL_APB1_GRP1_EnableClockSleep(LL_APB1_GRP1_PERI… macro
/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h2165 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h3536 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h2077 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LPENR |= (RCC_APB1LPENR_TIM2LPEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h3008 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) macro
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h3686 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1LLPENR, RCC_APB1LLPENR_TIM2LPEN) macro
/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h5821 #define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() (RCC->APB1LLPENR) |= (RCC_APB1LLPENR_TIM2LPEN) macro