Home
last modified time | relevance | path

Searched defs:SCR (Results 1 – 15 of 15) sorted by relevance

/cmsis_6-latest/CMSIS/Core/Include/
Dcore_cm0.h348 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm1.h348 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm0plus.h366 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_sc000.h359 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm23.h392 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_sc300.h386 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm3.h386 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm4.h459 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm7.h474 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm33.h527 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm35p.h527 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_starmc1.h538 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm52.h563 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm55.h537 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm85.h558 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member