PARAM (definition) in projects: hal_stm32-latest

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Searched defs:PARAM (Results 1 – 25 of 41) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_hal_mdf.h	934 #define IS_MDF_INSTANCE(PARAM) (((PARAM) == MDF1_Filter0) \|\| \ argument 937 #define IS_MDF_INSTANCE(PARAM) (((PARAM) == MDF1_Filter0) \|\| \ argument 945 #define IS_ADF_INSTANCE(PARAM) ((PARAM) == ADF1_Filter0) argument 948 #define IS_MDF_FILTER_BITSTREAM(PARAM) (((PARAM) == MDF_BITSTREAM0_RISING) \|\| \ argument 953 #define IS_MDF_FILTER_BITSTREAM(PARAM) (((PARAM) == MDF_BITSTREAM0_RISING) \|\| \ argument 968 #define IS_MDF_INTERLEAVED_FILTERS(PARAM) ((PARAM) <= 1U) argument 970 #define IS_MDF_INTERLEAVED_FILTERS(PARAM) ((PARAM) <= 5U) argument 973 #define IS_MDF_PROC_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 128U)) argument 975 #define IS_MDF_OUTPUT_CLOCK_PINS(PARAM) (((PARAM) == MDF_OUTPUT_CLOCK_0) \|\| \ argument 979 #define IS_MDF_OUTPUT_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 16U)) argument [all …]
D	stm32u5xx_hal_gfxtim.h	572 #define IS_GFXTIM_INTERRUPT(PARAM) (((PARAM) == GFXTIM_IT_ENABLE ) \|\| \ argument 575 #define IS_GFXTIM_SYNC_SRC(PARAM) (((PARAM) == GFXTIM_SYNC_SRC_HSYNC_VSYNC_0) \|\| \ argument 580 #define IS_GFXTIM_TE_SRC(PARAM) (((PARAM) == GFXTIM_TE_SRC_GPIO ) \|\| \ argument 585 #define IS_GFXTIM_TE_POLARITY(PARAM) (((PARAM) == GFXTIM_TE_RISING_EDGE ) \|\| \ argument 588 #define IS_GFXTIM_LCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_LCC_HW_RELOAD_SRC_NONE ) \|\| \ argument 597 #define IS_GFXTIM_LCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LCC_CLK_SRC_DISABLE) \|\| \ argument 600 #define IS_GFXTIM_LINE_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LINE_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument 609 #define IS_GFXTIM_FCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_FCC_HW_RELOAD_SRC_NONE) \|\| \ argument 618 #define IS_GFXTIM_FCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FCC_CLK_SRC_DISABLE) \|\| \ argument 627 #define IS_GFXTIM_FRAME_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FRAME_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_hal_mdf.h	927 #define IS_MDF_INSTANCE(PARAM) (((PARAM) == MDF1_Filter0) \|\| \ argument 934 #define IS_ADF_INSTANCE(PARAM) ((PARAM) == ADF1_Filter0) argument 936 #define IS_MDF_FILTER_BITSTREAM(PARAM) (((PARAM) == MDF_BITSTREAM0_RISING) \|\| \ argument 949 #define IS_MDF_INTERLEAVED_FILTERS(PARAM) ((PARAM) <= 5U) argument 951 #define IS_MDF_PROC_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 128U)) argument 953 #define IS_MDF_OUTPUT_CLOCK_PINS(PARAM) (((PARAM) == MDF_OUTPUT_CLOCK_0) \|\| \ argument 957 #define IS_MDF_OUTPUT_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 16U)) argument 959 #define IS_MDF_OUTPUT_CLOCK_TRIGGER_SOURCE(PARAM) (((PARAM) == MDF_CLOCK_TRIG_TRGO) \|\| \ argument 975 #define IS_ADF_OUTPUT_CLOCK_TRIGGER_SOURCE(PARAM) (((PARAM) == MDF_CLOCK_TRIG_TRGO) \|\| \ argument 978 #define IS_MDF_OUTPUT_CLOCK_TRIGGER_EDGE(PARAM) (((PARAM) == MDF_CLOCK_TRIG_RISING_EDGE) \|\| \ argument [all …]
D	stm32n6xx_hal_gfxtim.h	572 #define IS_GFXTIM_INTERRUPT(PARAM) (((PARAM) == GFXTIM_IT_ENABLE ) \|\| \ argument 575 #define IS_GFXTIM_SYNC_SRC(PARAM) (((PARAM) == GFXTIM_SYNC_SRC_HSYNC_VSYNC_0) \|\| \ argument 580 #define IS_GFXTIM_TE_SRC(PARAM) (((PARAM) == GFXTIM_TE_SRC_GPIO ) \|\| \ argument 585 #define IS_GFXTIM_TE_POLARITY(PARAM) (((PARAM) == GFXTIM_TE_RISING_EDGE ) \|\| \ argument 588 #define IS_GFXTIM_LCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_LCC_HW_RELOAD_SRC_NONE ) \|\| \ argument 597 #define IS_GFXTIM_LCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LCC_CLK_SRC_DISABLE) \|\| \ argument 600 #define IS_GFXTIM_LINE_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LINE_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument 609 #define IS_GFXTIM_FCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_FCC_HW_RELOAD_SRC_NONE) \|\| \ argument 618 #define IS_GFXTIM_FCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FCC_CLK_SRC_DISABLE) \|\| \ argument 627 #define IS_GFXTIM_FRAME_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FRAME_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument [all …]
D	stm32n6xx_hal_dts.h	`221 #define IS_DTS_SENSOR_MODE(PARAM) (((PARAM) == DTS_SENSOR_MODE_DISABLE) \|\| \ argument 226 #define IS_DTS_SENSOR_RESOLUTION(PARAM) (((PARAM) == DTS_SENSOR_RESOLUTION_12BITS) \|\| \ argument 230 #define IS_DTS_SENSOR_TRIGGER(PARAM) (((PARAM) == DTS_SENSOR_TRIGGER_LPTIM4_OUT) \|\| \ argument 235 #define IS_DTS_ALARM_PARAM(PARAM) ((-40.0f <= (PARAM)) && ((PARAM) <= 125.0f)) argument`
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_hal_mdf.h	652 #define IS_MDF_FILTER_BITSTREAM(PARAM) (((PARAM) == MDF_BITSTREAM0_RISING) \|\| \ argument 655 #define IS_MDF_PROC_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 128U)) argument 657 #define IS_MDF_OUTPUT_CLOCK_PINS(PARAM) (((PARAM) == MDF_OUTPUT_CLOCK_0) \|\| \ argument 661 #define IS_MDF_OUTPUT_CLOCK_DIVIDER(PARAM) ((1U <= (PARAM)) && ((PARAM) <= 16U)) argument 663 #define IS_MDF_OUTPUT_CLOCK_TRIGGER_SOURCE(PARAM) (((PARAM) == MDF_CLOCK_TRIG_TRGO) \|\| \ argument 666 #define IS_MDF_OUTPUT_CLOCK_TRIGGER_EDGE(PARAM) (((PARAM) == MDF_CLOCK_TRIG_RISING_EDGE) \|\| \ argument 669 #define IS_MDF_SITF_MODE(PARAM) (((PARAM) == MDF_SITF_LF_MASTER_SPI_MODE) \|\| \ argument 674 #define IS_MDF_SITF_CLOCK_SOURCE(PARAM) (((PARAM) == MDF_SITF_CCK0_SOURCE) \|\| \ argument 677 #define IS_MDF_SITF_THRESHOLD(PARAM) ((4U <= (PARAM)) && ((PARAM) <= 31U)) argument 679 #define IS_MDF_CIC_MODE(PARAM) (((PARAM) == MDF_ONE_FILTER_SINC4) \|\| \ argument [all …]
D	stm32h7rsxx_hal_gfxtim.h	572 #define IS_GFXTIM_INTERRUPT(PARAM) (((PARAM) == GFXTIM_IT_ENABLE ) \|\| \ argument 575 #define IS_GFXTIM_SYNC_SRC(PARAM) (((PARAM) == GFXTIM_SYNC_SRC_HSYNC_VSYNC_0) \|\| \ argument 580 #define IS_GFXTIM_TE_SRC(PARAM) (((PARAM) == GFXTIM_TE_SRC_GPIO ) \|\| \ argument 585 #define IS_GFXTIM_TE_POLARITY(PARAM) (((PARAM) == GFXTIM_TE_RISING_EDGE ) \|\| \ argument 588 #define IS_GFXTIM_LCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_LCC_HW_RELOAD_SRC_NONE ) \|\| \ argument 597 #define IS_GFXTIM_LCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LCC_CLK_SRC_DISABLE) \|\| \ argument 600 #define IS_GFXTIM_LINE_CLK_SRC(PARAM) (((PARAM) == GFXTIM_LINE_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument 609 #define IS_GFXTIM_FCC_HW_RELOAD_SRC(PARAM) (((PARAM) == GFXTIM_FCC_HW_RELOAD_SRC_NONE) \|\| \ argument 618 #define IS_GFXTIM_FCC_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FCC_CLK_SRC_DISABLE) \|\| \ argument 627 #define IS_GFXTIM_FRAME_CLK_SRC(PARAM) (((PARAM) == GFXTIM_FRAME_CLK_SRC_LCC_UNDERFLOW) \|\| \ argument [all …]
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
D	stm32g411xb.h	`443 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g411xc.h	`458 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32gbk1cb.h	`451 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g431xx.h	`452 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g441xx.h	`453 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g4a1xx.h	`466 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g491xx.h	`465 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g471xx.h	`474 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g473xx.h	`481 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g483xx.h	`482 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g414xx.h	`467 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g474xx.h	`489 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32g484xx.h	`490 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
D	stm32u545xx.h	`525 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32u535xx.h	`486 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
D	stm32u575xx.h	`539 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
D	stm32h562xx.h	`625 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
D	stm32h730xxq.h	`998 …__IO uint32_t PARAM; /*!< FMAC Parameter register, Address offset: 0x0C … member`

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