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Searched defs:CRS_CFGR_SYNCDIV_0 (Results 1 – 25 of 126) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h1198 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l072xx.h1225 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l062xx.h1326 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l063xx.h1348 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l053xx.h1220 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l073xx.h1247 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l083xx.h1375 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l082xx.h1353 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f071xb.h1356 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f072xb.h5115 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f042x6.h4904 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f078xx.h5115 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f048xx.h4904 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f091xc.h5097 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32f098xx.h5097 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c071xx.h1528 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u083xx.h2023 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32u073xx.h1765 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h2274 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32g411xc.h2311 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h2317 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32l412xx.h2282 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0c1xx.h2409 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
Dstm32g0b1xx.h2173 #define CRS_CFGR_SYNCDIV_0 (0x1UL << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h12332 #define CRS_CFGR_SYNCDIV_0 (0x1U << CRS_CFGR_SYNCDIV_Pos) /*!< 0x01000000 */ macro

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