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Searched defs:ADC_CFGR_AWD1CH_4 (Results 1 – 25 of 116) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h952 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f318xx.h953 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f302x8.h1061 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f328xx.h1012 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f302xc.h1096 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f303x8.h1013 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32f303xc.h1128 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h1167 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32wb1mxx.h1226 #define ADC_CFGR_AWD1CH_4 ADC_CFGR1_AWD1CH_4 macro
Dstm32wb30xx.h1166 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32wb35xx.h1358 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32wb55xx.h1404 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32wb5mxx.h1404 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h1211 #define ADC_CFGR_AWD1CH_4 ADC_CFGR1_AWD1CH_4 macro
Dstm32wb15xx.h1226 #define ADC_CFGR_AWD1CH_4 ADC_CFGR1_AWD1CH_4 macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1278 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g411xc.h1315 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32gbk1cb.h1388 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g431xx.h1402 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g441xx.h1436 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g4a1xx.h1516 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g491xx.h1482 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32g471xx.h1493 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h1270 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro
Dstm32l412xx.h1235 #define ADC_CFGR_AWD1CH_4 (0x10UL << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ macro

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