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/ThreadX-v6.3.0/ports/c667x/ccs/src/
Dtx_thread_context_save.asm35 SP .set B15 label
99 STW A5,*+SP(40) ; Save A5
100 STW A6,*+SP(44) ; Save A6
101 STW A7,*+SP(48) ; Save A7
102 STW A8,*+SP(52) ; Save A8
113 STW A9,*+SP(56) ; Save A9
114 STW B0,*+SP(84) ; Save B0
115 STW B1,*+SP(88) ; Save B1
116 STW B2,*+SP(92) ; Save B2
118 STW B4,*+SP(100) ; Save B4
[all …]
Dtx_thread_schedule.asm35 SP .set B15 label
127 LDW *+A4(8),SP ; Switch to thread's stack
145 ; SP = _tx_thread_execute_ptr -> tx_thread_stack_ptr;
152 LDW *+SP(8),B0 ; Pickup saved CSR
153 LDW *+SP(12),B3 ; Pickup saved B3/IPR
154 LDW *+SP(16),B1 ; Pickup saved AMR
155 LDW *+SP(20),A10 ; Restore A10
156 LDW *+SP(24),A11 ; Restore A11
157 LDW *+SP(28),A12 ; Restore A12
158 LDW *+SP(32),A13 ; Restore A13
[all …]
Dtx_thread_context_restore.asm35 SP .set B15 label
119 LDW *+SP(8),B0 ; Recover saved CSR
120 LDW *+SP(12),B1 ; Recover saved IRP
121 LDW *+SP(16),B2 ; Recover saved AMR
122 LDW *+SP(20),A0 ; Recover A0
123 LDW *+SP(24),A1 ; Recover A1
124 LDW *+SP(28),A2 ; Recover A2
125 LDW *+SP(32),A3 ; Recover A3
126 LDW *+SP(36),A4 ; Recover A4
127 LDW *+SP(40),A5 ; Recover A5
[all …]
Dtx_thread_system_return.asm34 SP .set B15 label
93 ADDK -64,SP ; Allocate stack space
95 STW B2,*+SP(4) ; Save stack type
96 STW B0,*+SP(8) ; Save CSR
97 STW B3,*+SP(12) ; Save B3 (return address)
98 STW B1,*+SP(16) ; Save AMR
99 STW A10,*+SP(20) ; Save A10
100 STW A11,*+SP(24) ; Save A11
101 STW A12,*+SP(28) ; Save A12
102 STW A13,*+SP(32) ; Save A13
[all …]
Dtx_timer_interrupt.asm34 SP .set B15 label
289 LDW *+SP(20),A0 ; Recover A0
290 LDW *+SP(24),A1 ; Recover A1
291 LDW *+SP(28),A2 ; Recover A2
292 LDW *+SP(32),A3 ; Recover A3
294 || LDW *+SP(36),A4 ; Recover A4
295 LDW *+SP(96),B3 ; Recover B3
296 ADDK.S2 288,SP ; Recover stack space
Dtx_thread_interrupt_control.asm34 SP .set B15 label
Dtx_thread_stack_build.asm34 SP .set B15 label
/ThreadX-v6.3.0/ports_module/rxv2/iar/module_manager/src/
Dtx_thread_schedule.s126 MOV.L 8[R2],SP // Pickup stack pointer
284 MOV.L [SP], R5 // Get return address
313 MOV.L 4[SP], R5
315 MOV.L R5, 4[SP]
356 MOV.L [SP],R5
361 MOV.L R5,4[SP]
Dtx_thread_stack_build.s143 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/c667x/ccs/example_build/sample_threadx_ta6678fmc/
Dtx_initialize_low_level.asm35 SP .set B15 label
/ThreadX-v6.3.0/ports/c667x/ccs/example_build/sample_threadx_c6678evm/
Dtx_initialize_low_level.asm35 SP .set B15 label
/ThreadX-v6.3.0/ports/rxv1/ccrx/src/
Dtx_thread_context_save.src91 ; (lower address) SP -> [return address of this call]
92 ; SP+4 -> Saved R1
93 ; SP+8 -> Saved R2
94 ; SP+12-> Interrupted PC
95 ; SP+16-> Interrupted PSW
/ThreadX-v6.3.0/ports/rxv2/ccrx/src/
Dtx_thread_context_save.src91 ; (lower address) SP -> [return address of this call]
92 ; SP+4 -> Saved R1
93 ; SP+8 -> Saved R2
94 ; SP+12-> Interrupted PC
95 ; SP+16-> Interrupted PSW
/ThreadX-v6.3.0/ports/rxv3/ccrx/src/
Dtx_thread_context_save.src91 ; (lower address) SP -> [return address of this call]
92 ; SP+4 -> Saved R1
93 ; SP+8 -> Saved R2
94 ; SP+12-> Interrupted PC
95 ; SP+16-> Interrupted PSW
/ThreadX-v6.3.0/ports/c667x/ccs/
Dreadme_threadx.txt224 LDW *+SP(20),A0 ; Recover A0
225 LDW *+SP(24),A1 ; Recover A1
226 LDW *+SP(28),A2 ; Recover A2
227 LDW *+SP(32),A3 ; Recover A3
229 || LDW *+SP(36),A4 ; Recover A4
230 LDW *+SP(96),B3 ; Recover B3
231 ADDK.S2 288,SP ; Recover stack space
/ThreadX-v6.3.0/ports/rxv1/gnu/src/
Dtx_thread_stack_build.S136 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/rxv1/iar/src/
Dtx_thread_stack_build.s137 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/rxv2/gnu/src/
Dtx_thread_stack_build.S155 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/rxv2/iar/src/
Dtx_thread_stack_build.s145 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/rxv3/gnu/src/
Dtx_thread_stack_build.S153 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/rxv3/iar/src/
Dtx_thread_stack_build.s145 ; Store initial SP in thread control block
/ThreadX-v6.3.0/ports/cortex_m23/ac6/src/
Dtx_misra.S500 LDR R6,[SP, #+28]
528 LDR R0,[SP, #+32]
533 LDR R0,[SP, #+24]
/ThreadX-v6.3.0/ports/cortex_m23/gnu/src/
Dtx_misra.S500 LDR R6,[SP, #+28]
528 LDR R0,[SP, #+32]
533 LDR R0,[SP, #+24]
/ThreadX-v6.3.0/ports/cortex_m3/ac6/src/
Dtx_misra.S495 LDR R6,[SP, #+28]
523 LDR R0,[SP, #+32]
528 LDR R0,[SP, #+24]
/ThreadX-v6.3.0/ports/cortex_m3/gnu/src/
Dtx_misra.S495 LDR R6,[SP, #+28]
523 LDR R0,[SP, #+32]
528 LDR R0,[SP, #+24]

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