1;/**************************************************************************/
2;/*                                                                        */
3;/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
4;/*                                                                        */
5;/*       This software is licensed under the Microsoft Software License   */
6;/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
7;/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
8;/*       and in the root directory of this software.                      */
9;/*                                                                        */
10;/**************************************************************************/
11;
12;
13;/**************************************************************************/
14;/**************************************************************************/
15;/**                                                                       */
16;/** ThreadX Component                                                     */
17;/**                                                                       */
18;/**   Thread                                                              */
19;/**                                                                       */
20;/**************************************************************************/
21;/**************************************************************************/
22;
23;
24;#define TX_SOURCE_CODE
25;
26;
27;/* Include necessary system files.  */
28;
29;#include "tx_api.h"
30;#include "tx_thread.h"
31;#include "tx_timer.h"
32;
33FP          .set    A15
34DP          .set    B14
35SP          .set    B15
36;
37;
38    .global    _tx_thread_execute_ptr
39    .global    _tx_thread_current_ptr
40    .global    _tx_timer_time_slice
41;
42;
43    .sect   ".text"
44;/**************************************************************************/
45;/*                                                                        */
46;/*  FUNCTION                                               RELEASE        */
47;/*                                                                        */
48;/*    _tx_thread_schedule                                 C667x/TI        */
49;/*                                                           6.1          */
50;/*  AUTHOR                                                                */
51;/*                                                                        */
52;/*    William E. Lamie, Microsoft Corporation                             */
53;/*                                                                        */
54;/*  DESCRIPTION                                                           */
55;/*                                                                        */
56;/*    This function waits for a thread control block pointer to appear in */
57;/*    the _tx_thread_execute_ptr variable.  Once a thread pointer appears */
58;/*    in the variable, the corresponding thread is resumed.               */
59;/*                                                                        */
60;/*  INPUT                                                                 */
61;/*                                                                        */
62;/*    None                                                                */
63;/*                                                                        */
64;/*  OUTPUT                                                                */
65;/*                                                                        */
66;/*    None                                                                */
67;/*                                                                        */
68;/*  CALLS                                                                 */
69;/*                                                                        */
70;/*    None                                                                */
71;/*                                                                        */
72;/*  CALLED BY                                                             */
73;/*                                                                        */
74;/*    _tx_initialize_kernel_enter          ThreadX entry function         */
75;/*    _tx_thread_system_return             Return to system from thread   */
76;/*    _tx_thread_context_restore           Restore thread's context       */
77;/*                                                                        */
78;/*  RELEASE HISTORY                                                       */
79;/*                                                                        */
80;/*    DATE              NAME                      DESCRIPTION             */
81;/*                                                                        */
82;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
83;/*                                                                        */
84;/**************************************************************************/
85;VOID   _tx_thread_schedule(VOID)
86;{
87    .global _tx_thread_schedule
88_tx_thread_schedule
89;
90;    /* Enable interrupts.  */
91;
92        MVC         CSR,B0                              ; Pickup current CSR
93        OR          1,B0,B0                             ; Build interrupt enable value
94        MVC         B0,CSR                              ; Enable interrupts
95        MVKL        _tx_thread_execute_ptr,A0           ; Build address of execute pointer
96        MVKH        _tx_thread_execute_ptr,A0           ;
97;
98;    /* Wait for a thread to execute.  */
99;    do
100;    {
101;
102_tx_thread_schedule_loop:
103;
104        LDW         *A0,A1                              ; Pickup next thread to execute
105        NOP         4                                   ; Delay slots
106 [!A1]  B           _tx_thread_schedule_loop            ; If Null, just wait here for thread
107                                                        ;   to become ready
108        MV          A1,A4                               ; Move thread pointer to A4
109        MVKL        _tx_thread_current_ptr,A1           ; Build address of current thread ptr
110        MVKH        _tx_thread_current_ptr,A1           ;
111        MVKL        _tx_timer_time_slice,A2             ; Build address of time-slice
112        MVKH        _tx_timer_time_slice,A2             ;
113;
114;    }
115;    while(_tx_thread_execute_ptr == TX_NULL);
116;
117;    /* Yes! We have a thread to execute.  Lockout interrupts and
118;       transfer control to it.  */
119;
120        AND         -2,B0,B0                            ; Build interrupt lockout value
121        MVC         B0,CSR                              ; Lockout interrupts
122;
123;    /* Setup the current thread pointer.  */
124;    _tx_thread_current_ptr =  _tx_thread_execute_ptr;
125;
126        LDW         *+A4(4),A3                          ; Pickup run-count
127        LDW         *+A4(8),SP                          ; Switch to thread's stack
128        LDW         *+A4(24),B1                         ; Pickup time-slice
129        STW         A4,*A1                              ; Setup current pointer
130        NOP                                             ; Delay
131;
132;    /* Increment the run count for this thread.  */
133;    _tx_thread_current_ptr -> tx_thread_run_count++;
134;
135        ADD         1,A3,A3                             ; Increment run-counter
136        LDW         *+SP(4),B0                          ; Pickup stack-type
137        STW         A3,*+A4(4)                          ; Store run-counter
138;
139;    /* Setup time-slice, if present.  */
140;    _tx_timer_time_slice =  _tx_thread_current_ptr -> tx_thread_time_slice;
141;
142        STW         B1,*A2                              ; Setup time-slice
143;
144;    /* Switch to the thread's stack.  */
145;    SP =  _tx_thread_execute_ptr -> tx_thread_stack_ptr;
146;
147;    /* Determine if an interrupt frame or a synchronous task suspension frame
148;   is present.  */
149;
150        NOP         2                                   ; Delay slots
151 [B0]   B           _tx_thread_interrupt_stack          ; Look for interrupt stack frame
152        LDW         *+SP(8),B0                          ; Pickup saved CSR
153        LDW         *+SP(12),B3                         ; Pickup saved B3/IPR
154        LDW         *+SP(16),B1                         ; Pickup saved AMR
155        LDW         *+SP(20),A10                        ; Restore A10
156        LDW         *+SP(24),A11                        ; Restore A11
157        LDW         *+SP(28),A12                        ; Restore A12
158        LDW         *+SP(32),A13                        ; Restore A13
159        MVC         B0,CSR                              ; Restore CSR
160        MVC         B1,AMR                              ; Restore AMR
161        LDW         *+SP(36),A14                        ; Restore A14
162        LDW         *+SP(40),A15                        ; Restore A15
163        LDW         *+SP(44),B10                        ; Restore B10
164        LDW         *+SP(48),B11                        ; Restore B11
165        LDW         *+SP(52),B12                        ; Restore B12
166        LDW         *+SP(56),B13                        ; Restore B13
167        LDW         *+SP(60),B0                         ; Restore ILC
168        LDW         *+SP(64),B1                         ; Restore RILC
169        NOP         4                                   ; Delay slots
170        MVC         B0,ILC                              ; Restore ILC
171        MVC         B1,RILC                             ; Restore RILC
172        B           B3                                  ; Return to caller
173        ADDK        64,SP                               ; Recover stack space
174        NOP         4                                   ; Delay slots
175;
176_tx_thread_interrupt_stack:
177        MVC         B0,CSR                              ; Restore CSR
178        MVC         B3,IRP                              ; Restore IPR
179        MVC         B1,AMR                              ; Restore AMR
180        LDW         *+SP(268),B0                        ; Recover saved ILC
181        LDW         *+SP(272),B1                        ; Recover saved RILC
182        LDW         *+SP(276),B2                        ; Recover saved ITSR
183        NOP         4                                   ; Delay
184        MVC         B0,ILC                              ; Setup ILC
185        MVC         B1,RILC                             ; Setup RILC
186        MVC         B2,ITSR                             ; Setup ITSR
187        LDW         *+SP(20),A0                         ; Recover A0
188        LDW         *+SP(24),A1                         ; Recover A1
189        LDW         *+SP(28),A2                         ; Recover A2
190        LDW         *+SP(32),A3                         ; Recover A3
191        LDW         *+SP(36),A4                         ; Recover A4
192        LDW         *+SP(40),A5                         ; Recover A5
193        LDW         *+SP(44),A6                         ; Recover A6
194        LDW         *+SP(48),A7                         ; Recover A7
195        LDW         *+SP(52),A8                         ; Recover A8
196        LDW         *+SP(56),A9                         ; Recover A9
197        LDW         *+SP(60),A10                        ; Recover A10
198        LDW         *+SP(64),A11                        ; Recover A11
199        LDW         *+SP(68),A12                        ; Recover A12
200        LDW         *+SP(72),A13                        ; Recover A13
201        LDW         *+SP(76),A14                        ; Recover A14
202        LDW         *+SP(80),A15                        ; Recover A15 (FP)
203        LDW         *+SP(84),B0                         ; Recover B0
204        LDW         *+SP(88),B1                         ; Recover B1
205        LDW         *+SP(92),B2                         ; Recover B2
206        LDW         *+SP(96),B3                         ; Recover B3
207        LDW         *+SP(100),B4                        ; Recover B4
208        LDW         *+SP(104),B5                        ; Recover B5
209        LDW         *+SP(108),B6                        ; Recover B6
210        LDW         *+SP(112),B7                        ; Recover B7
211        LDW         *+SP(116),B8                        ; Recover B8
212        LDW         *+SP(120),B9                        ; Recover B9
213        LDW         *+SP(124),B10                       ; Recover B10
214        LDW         *+SP(128),B11                       ; Recover B11
215        LDW         *+SP(140),A16                       ; Recover A16
216        LDW         *+SP(144),A17                       ; Recover A17
217        LDW         *+SP(148),A18                       ; Recover A18
218        LDW         *+SP(152),A19                       ; Recover A19
219        LDW         *+SP(156),A20                       ; Recover A20
220        LDW         *+SP(160),A21                       ; Recover A21
221        LDW         *+SP(164),A22                       ; Recover A22
222        LDW         *+SP(168),A23                       ; Recover A23
223        LDW         *+SP(172),A24                       ; Recover A24
224        LDW         *+SP(176),A25                       ; Recover A25
225        LDW         *+SP(180),A26                       ; Recover A26
226        LDW         *+SP(184),A27                       ; Recover A27
227        LDW         *+SP(188),A28                       ; Recover A28
228        LDW         *+SP(192),A29                       ; Recover A29
229        LDW         *+SP(196),A30                       ; Recover A30
230        LDW         *+SP(200),A31                       ; Recover A31
231        LDW         *+SP(204),B16                       ; Recover B16
232        LDW         *+SP(208),B17                       ; Recover B17
233        LDW         *+SP(212),B18                       ; Recover B18
234        LDW         *+SP(216),B19                       ; Recover B19
235        LDW         *+SP(220),B20                       ; Recover B20
236        LDW         *+SP(224),B21                       ; Recover B21
237        LDW         *+SP(228),B22                       ; Recover B22
238        LDW         *+SP(232),B23                       ; Recover B23
239        LDW         *+SP(236),B24                       ; Recover B24
240        LDW         *+SP(240),B25                       ; Recover B25
241        LDW         *+SP(244),B26                       ; Recover B26
242        LDW         *+SP(248),B27                       ; Recover B27
243        LDW         *+SP(252),B28                       ; Recover B28
244        LDW         *+SP(256),B29                       ; Recover B29
245        LDW         *+SP(260),B30                       ; Recover B30
246        LDW         *+SP(264),B31                       ; Recover B31
247        B           IRP                                 ; Return to point of interrupt
248||      LDW         *+SP(132),B12                       ; Recover B12
249        LDW         *+SP(136),B13                       ; Recover B13
250        ADDK.S2     288,SP                              ; Recover stack space
251        NOP         3                                   ; Delay slots
252;
253;}
254
255