| /Linux-v5.10/arch/arm/mach-imx/ |
| D | mach-imx6q.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
23 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
65 * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
66 * as they are used for slots1-7 PERST#
75 if (dev->devfn != 0) in ventana_pciesw_early_fixup()
79 dw |= 0xaaa8; // GPIO1-7 outputs in ventana_pciesw_early_fixup()
83 dw |= 0xfe; // GPIO1-7 output high in ventana_pciesw_early_fixup()
169 struct regmap *gpr; in imx6q_1588_init() local
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| D | mach-imx6sl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6sl_fec_init() local
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
24 if (!IS_ERR(gpr)) { in imx6sl_fec_init()
25 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
27 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
30 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); in imx6sl_fec_init()
36 /* imx6sl reuses imx6q cpufreq driver */ in imx6sl_init_late()
38 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sl_init_late()
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| D | pm-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 #include <asm/proc-fns.h>
144 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
150 .mmdc_compat = "fsl,imx6q-mmdc",
151 .src_compat = "fsl,imx6q-src",
152 .iomuxc_compat = "fsl,imx6q-iomuxc",
153 .gpc_compat = "fsl,imx6q-gpc",
154 .pl310_compat = "arm,pl310-cache",
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| D | mach-imx6ul.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6ul_enet_clk_init() local
22 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); in imx6ul_enet_clk_init()
23 if (!IS_ERR(gpr)) in imx6ul_enet_clk_init()
24 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR, in imx6ul_enet_clk_init()
27 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n"); in imx6ul_enet_clk_init()
32 if (dev && dev->interface == PHY_INTERFACE_MODE_MII) { in ksz8081_phy_fixup()
35 } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) { in ksz8081_phy_fixup()
69 imx6_pm_ccm_init("fsl,imx6ul-ccm"); in imx6ul_init_irq()
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| D | mach-imx6sx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
45 struct regmap *gpr; in imx6sx_enet_clk_sel() local
47 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr"); in imx6sx_enet_clk_sel()
48 if (!IS_ERR(gpr)) { in imx6sx_enet_clk_sel()
49 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
51 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
54 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n"); in imx6sx_enet_clk_sel()
80 imx6_pm_ccm_init("fsl,imx6sx-ccm"); in imx6sx_init_irq()
88 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sx_init_late()
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| /Linux-v5.10/Documentation/devicetree/bindings/display/imx/ |
| D | hdmi.txt | 9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
22 - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
27 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
28 or the functionally-reduced I2C master contained in the DWC HDMI. When
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| D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
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| D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
54 compatible = "fsl,imx-ckil", "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <32768>;
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| D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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| D | imx6q.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
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| D | imx6dl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
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| /Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
| D | syscon.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee.jones@linaro.org>
27 - syscon
30 - compatible
35 - items:
36 - enum:
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| /Linux-v5.10/drivers/bus/ |
| D | imx-weim.c | 15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
67 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
69 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
71 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
72 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
74 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
81 struct device_node *np = pdev->dev.of_node; in imx_weim_gpr_setup()
84 struct regmap *gpr; in imx_weim_gpr_setup() local
96 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); in imx_weim_gpr_setup()
97 if (IS_ERR(gpr)) { in imx_weim_gpr_setup()
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| /Linux-v5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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| D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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| D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mm-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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| /Linux-v5.10/drivers/pci/controller/dwc/ |
| D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
35 #include "pcie-designware.h"
43 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
46 IMX6Q, enumerator
96 /* PCIe Port Logic registers (memory-mapped) */
109 /* PHY registers (not memory-mapped) */
146 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
162 return -ETIMEDOUT; in pcie_phy_poll_ack()
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| /Linux-v5.10/drivers/gpu/drm/imx/ |
| D | dw_hdmi-imx.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14 #include <video/imx-ipu-v3.h>
23 #include "imx-drm.h"
103 struct device_node *np = hdmi->dev->of_node; in dw_hdmi_imx_parse_dt()
105 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr"); in dw_hdmi_imx_parse_dt()
106 if (IS_ERR(hdmi->regmap)) { in dw_hdmi_imx_parse_dt()
107 dev_err(hdmi->dev, "Unable to get gpr\n"); in dw_hdmi_imx_parse_dt()
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| /Linux-v5.10/drivers/ata/ |
| D | ahci_imx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <linux/hwmon-sysfs.h>
24 #define DRV_NAME "ahci-imx"
27 /* Timer 1-ms Register */
104 struct regmap *gpr; member
113 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
137 } while (--timeout); in imx_phy_crbit_assert()
139 return timeout ? 0 : -ETIMEDOUT; in imx_phy_crbit_assert()
227 struct imx_ahci_priv *imxpriv = hpriv->plat_data; in imx_sata_phy_reset()
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| /Linux-v5.10/drivers/pinctrl/freescale/ |
| D | pinctrl-imx6q.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // imx6q pinctrl driver based on imx pinmux core
17 #include "pinctrl-imx.h"
461 .gpr_compatible = "fsl,imx6q-iomuxc-gpr",
465 { .compatible = "fsl,imx6q-iomuxc", },
476 .name = "imx6q-pinctrl",
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| /Linux-v5.10/sound/soc/fsl/ |
| D | fsl_mqs.c | 1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
12 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
50 struct snd_soc_component *component = dai->component; in fsl_mqs_hw_params()
56 mclk_rate = clk_get_rate(mqs_priv->mclk); in fsl_mqs_hw_params()
68 if (mqs_priv->use_gpr) { in fsl_mqs_hw_params()
69 regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2, in fsl_mqs_hw_params()
71 (div - 1) << IMX6SX_GPR2_MQS_CLK_DIV_SHIFT); in fsl_mqs_hw_params()
72 regmap_update_bits(mqs_priv->regmap, IOMUXC_GPR2, in fsl_mqs_hw_params()
75 regmap_update_bits(mqs_priv->regmap, REG_MQS_CTRL, in fsl_mqs_hw_params()
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