Lines Matching +full:imx6q +full:- +full:iomuxc +full:- +full:gpr
1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
35 #include "pcie-designware.h"
43 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
46 IMX6Q, enumerator
96 /* PCIe Port Logic registers (memory-mapped) */
109 /* PHY registers (not memory-mapped) */
146 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack()
162 return -ETIMEDOUT; in pcie_phy_poll_ack()
167 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_wait_ack()
187 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
190 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_read()
216 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_write()
241 /* wait for ack de-assertion */ in pcie_phy_write()
259 /* wait for ack de-assertion */ in pcie_phy_write()
273 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_pcie_reset_phy()
300 * make it look like it read all-ones. in imx6q_pcie_abort_handler()
308 val = -1; in imx6q_pcie_abort_handler()
310 regs->uregs[reg] = val; in imx6q_pcie_abort_handler()
311 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
316 regs->uregs[reg] = -1; in imx6q_pcie_abort_handler()
317 regs->ARM_pc += 4; in imx6q_pcie_abort_handler()
331 if (dev->pm_domain) in imx6_pcie_attach_pd()
334 imx6_pcie->pd_pcie = dev_pm_domain_attach_by_name(dev, "pcie"); in imx6_pcie_attach_pd()
335 if (IS_ERR(imx6_pcie->pd_pcie)) in imx6_pcie_attach_pd()
336 return PTR_ERR(imx6_pcie->pd_pcie); in imx6_pcie_attach_pd()
338 if (!imx6_pcie->pd_pcie) in imx6_pcie_attach_pd()
340 link = device_link_add(dev, imx6_pcie->pd_pcie, in imx6_pcie_attach_pd()
346 return -EINVAL; in imx6_pcie_attach_pd()
349 imx6_pcie->pd_pcie_phy = dev_pm_domain_attach_by_name(dev, "pcie_phy"); in imx6_pcie_attach_pd()
350 if (IS_ERR(imx6_pcie->pd_pcie_phy)) in imx6_pcie_attach_pd()
351 return PTR_ERR(imx6_pcie->pd_pcie_phy); in imx6_pcie_attach_pd()
353 link = device_link_add(dev, imx6_pcie->pd_pcie_phy, in imx6_pcie_attach_pd()
359 return -EINVAL; in imx6_pcie_attach_pd()
367 struct device *dev = imx6_pcie->pci->dev; in imx6_pcie_assert_core_reset()
369 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_assert_core_reset()
372 reset_control_assert(imx6_pcie->pciephy_reset); in imx6_pcie_assert_core_reset()
373 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_assert_core_reset()
376 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_assert_core_reset()
380 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_assert_core_reset()
385 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
389 case IMX6Q: in imx6_pcie_assert_core_reset()
390 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
392 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_assert_core_reset()
397 if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { in imx6_pcie_assert_core_reset()
398 int ret = regulator_disable(imx6_pcie->vpcie); in imx6_pcie_assert_core_reset()
408 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ); in imx6_pcie_grp_offset()
409 return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; in imx6_pcie_grp_offset()
414 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_enable_ref_clk()
415 struct device *dev = pci->dev; in imx6_pcie_enable_ref_clk()
419 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_enable_ref_clk()
421 ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); in imx6_pcie_enable_ref_clk()
427 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_enable_ref_clk()
431 case IMX6Q: in imx6_pcie_enable_ref_clk()
433 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
442 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_enable_ref_clk()
448 ret = clk_prepare_enable(imx6_pcie->pcie_aux); in imx6_pcie_enable_ref_clk()
459 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
462 regmap_update_bits(imx6_pcie->iomuxc_gpr, offset, in imx6_pcie_enable_ref_clk()
474 struct device *dev = imx6_pcie->pci->dev; in imx7d_pcie_wait_for_phy_pll_lock()
476 if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, in imx7d_pcie_wait_for_phy_pll_lock()
486 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_deassert_core_reset()
487 struct device *dev = pci->dev; in imx6_pcie_deassert_core_reset()
490 if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { in imx6_pcie_deassert_core_reset()
491 ret = regulator_enable(imx6_pcie->vpcie); in imx6_pcie_deassert_core_reset()
499 ret = clk_prepare_enable(imx6_pcie->pcie_phy); in imx6_pcie_deassert_core_reset()
505 ret = clk_prepare_enable(imx6_pcie->pcie_bus); in imx6_pcie_deassert_core_reset()
511 ret = clk_prepare_enable(imx6_pcie->pcie); in imx6_pcie_deassert_core_reset()
527 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_deassert_core_reset()
528 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_deassert_core_reset()
529 imx6_pcie->gpio_active_high); in imx6_pcie_deassert_core_reset()
531 gpio_set_value_cansleep(imx6_pcie->reset_gpio, in imx6_pcie_deassert_core_reset()
532 !imx6_pcie->gpio_active_high); in imx6_pcie_deassert_core_reset()
535 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_deassert_core_reset()
537 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
540 reset_control_deassert(imx6_pcie->pciephy_reset); in imx6_pcie_deassert_core_reset()
542 /* Workaround for ERR010728, failure of PCI-e PLL VCO to in imx6_pcie_deassert_core_reset()
543 * oscillate, especially when cold. This turns off "Duty-cycle in imx6_pcie_deassert_core_reset()
546 if (likely(imx6_pcie->phy_base)) { in imx6_pcie_deassert_core_reset()
547 /* De-assert DCC_FB_EN */ in imx6_pcie_deassert_core_reset()
549 imx6_pcie->phy_base + PCIE_PHY_CMN_REG4); in imx6_pcie_deassert_core_reset()
553 imx6_pcie->phy_base + PCIE_PHY_CMN_REG24); in imx6_pcie_deassert_core_reset()
556 imx6_pcie->phy_base + PCIE_PHY_CMN_REG26); in imx6_pcie_deassert_core_reset()
558 dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n"); in imx6_pcie_deassert_core_reset()
564 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, in imx6_pcie_deassert_core_reset()
568 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, in imx6_pcie_deassert_core_reset()
573 case IMX6Q: /* Nothing to do */ in imx6_pcie_deassert_core_reset()
580 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_deassert_core_reset()
582 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_deassert_core_reset()
584 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_deassert_core_reset()
586 if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { in imx6_pcie_deassert_core_reset()
587 ret = regulator_disable(imx6_pcie->vpcie); in imx6_pcie_deassert_core_reset()
598 if (imx6_pcie->drvdata->variant == IMX8MQ && in imx6_pcie_configure_type()
599 imx6_pcie->controller_id == 1) { in imx6_pcie_configure_type()
609 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); in imx6_pcie_configure_type()
614 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_init_phy()
620 regmap_update_bits(imx6_pcie->iomuxc_gpr, in imx6_pcie_init_phy()
626 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
630 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
635 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
639 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_init_phy()
642 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
644 imx6_pcie->tx_deemph_gen1 << 0); in imx6_pcie_init_phy()
645 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
647 imx6_pcie->tx_deemph_gen2_3p5db << 6); in imx6_pcie_init_phy()
648 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
650 imx6_pcie->tx_deemph_gen2_6db << 12); in imx6_pcie_init_phy()
651 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
653 imx6_pcie->tx_swing_full << 18); in imx6_pcie_init_phy()
654 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, in imx6_pcie_init_phy()
656 imx6_pcie->tx_swing_low << 25); in imx6_pcie_init_phy()
665 unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy); in imx6_setup_phy_mpll()
669 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) in imx6_setup_phy_mpll()
688 dev_err(imx6_pcie->pci->dev, in imx6_setup_phy_mpll()
690 return -EINVAL; in imx6_setup_phy_mpll()
712 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_wait_for_speed_change()
713 struct device *dev = pci->dev; in imx6_pcie_wait_for_speed_change()
726 return -ETIMEDOUT; in imx6_pcie_wait_for_speed_change()
733 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_enable()
734 case IMX6Q: in imx6_pcie_ltssm_enable()
737 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_enable()
743 reset_control_deassert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_enable()
750 struct dw_pcie *pci = imx6_pcie->pci; in imx6_pcie_establish_link()
751 struct device *dev = pci->dev; in imx6_pcie_establish_link()
773 if (pci->link_gen == 2) { in imx6_pcie_establish_link()
788 if (imx6_pcie->drvdata->flags & in imx6_pcie_establish_link()
793 * occurs and we go Gen1 -> yep, Gen1. The difference in imx6_pcie_establish_link()
851 struct dw_pcie *pci = imx6_pcie->pci; in imx6_add_pcie_port()
852 struct pcie_port *pp = &pci->pp; in imx6_add_pcie_port()
853 struct device *dev = &pdev->dev; in imx6_add_pcie_port()
857 pp->msi_irq = platform_get_irq_byname(pdev, "msi"); in imx6_add_pcie_port()
858 if (pp->msi_irq < 0) in imx6_add_pcie_port()
859 return pp->msi_irq; in imx6_add_pcie_port()
862 pp->ops = &imx6_pcie_host_ops; in imx6_add_pcie_port()
874 /* No special ops needed, but pcie-designware still expects this struct */
882 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_ltssm_disable()
885 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_ltssm_disable()
889 reset_control_assert(imx6_pcie->apps_reset); in imx6_pcie_ltssm_disable()
898 struct device *dev = imx6_pcie->pci->dev; in imx6_pcie_pm_turnoff()
901 if (imx6_pcie->turnoff_reset) { in imx6_pcie_pm_turnoff()
902 reset_control_assert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
903 reset_control_deassert(imx6_pcie->turnoff_reset); in imx6_pcie_pm_turnoff()
907 /* Others poke directly at IOMUXC registers */ in imx6_pcie_pm_turnoff()
908 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_pm_turnoff()
910 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
913 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_pm_turnoff()
925 * The standard recommends a 1-10ms timeout after which to in imx6_pcie_pm_turnoff()
934 clk_disable_unprepare(imx6_pcie->pcie); in imx6_pcie_clk_disable()
935 clk_disable_unprepare(imx6_pcie->pcie_phy); in imx6_pcie_clk_disable()
936 clk_disable_unprepare(imx6_pcie->pcie_bus); in imx6_pcie_clk_disable()
938 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_clk_disable()
940 clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); in imx6_pcie_clk_disable()
943 regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, in imx6_pcie_clk_disable()
948 clk_disable_unprepare(imx6_pcie->pcie_aux); in imx6_pcie_clk_disable()
959 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_suspend_noirq()
973 struct pcie_port *pp = &imx6_pcie->pci->pp; in imx6_pcie_resume_noirq()
975 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) in imx6_pcie_resume_noirq()
998 struct device *dev = &pdev->dev; in imx6_pcie_probe()
1003 struct device_node *node = dev->of_node; in imx6_pcie_probe()
1009 return -ENOMEM; in imx6_pcie_probe()
1013 return -ENOMEM; in imx6_pcie_probe()
1015 pci->dev = dev; in imx6_pcie_probe()
1016 pci->ops = &dw_pcie_ops; in imx6_pcie_probe()
1018 imx6_pcie->pci = pci; in imx6_pcie_probe()
1019 imx6_pcie->drvdata = of_device_get_match_data(dev); in imx6_pcie_probe()
1022 np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); in imx6_pcie_probe()
1031 imx6_pcie->phy_base = devm_ioremap_resource(dev, &res); in imx6_pcie_probe()
1032 if (IS_ERR(imx6_pcie->phy_base)) { in imx6_pcie_probe()
1034 return PTR_ERR(imx6_pcie->phy_base); in imx6_pcie_probe()
1039 pci->dbi_base = devm_ioremap_resource(dev, dbi_base); in imx6_pcie_probe()
1040 if (IS_ERR(pci->dbi_base)) in imx6_pcie_probe()
1041 return PTR_ERR(pci->dbi_base); in imx6_pcie_probe()
1044 imx6_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); in imx6_pcie_probe()
1045 imx6_pcie->gpio_active_high = of_property_read_bool(node, in imx6_pcie_probe()
1046 "reset-gpio-active-high"); in imx6_pcie_probe()
1047 if (gpio_is_valid(imx6_pcie->reset_gpio)) { in imx6_pcie_probe()
1048 ret = devm_gpio_request_one(dev, imx6_pcie->reset_gpio, in imx6_pcie_probe()
1049 imx6_pcie->gpio_active_high ? in imx6_pcie_probe()
1057 } else if (imx6_pcie->reset_gpio == -EPROBE_DEFER) { in imx6_pcie_probe()
1058 return imx6_pcie->reset_gpio; in imx6_pcie_probe()
1062 imx6_pcie->pcie_phy = devm_clk_get(dev, "pcie_phy"); in imx6_pcie_probe()
1063 if (IS_ERR(imx6_pcie->pcie_phy)) in imx6_pcie_probe()
1064 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_phy), in imx6_pcie_probe()
1067 imx6_pcie->pcie_bus = devm_clk_get(dev, "pcie_bus"); in imx6_pcie_probe()
1068 if (IS_ERR(imx6_pcie->pcie_bus)) in imx6_pcie_probe()
1069 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_bus), in imx6_pcie_probe()
1072 imx6_pcie->pcie = devm_clk_get(dev, "pcie"); in imx6_pcie_probe()
1073 if (IS_ERR(imx6_pcie->pcie)) in imx6_pcie_probe()
1074 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie), in imx6_pcie_probe()
1077 switch (imx6_pcie->drvdata->variant) { in imx6_pcie_probe()
1079 imx6_pcie->pcie_inbound_axi = devm_clk_get(dev, in imx6_pcie_probe()
1081 if (IS_ERR(imx6_pcie->pcie_inbound_axi)) in imx6_pcie_probe()
1082 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_inbound_axi), in imx6_pcie_probe()
1086 imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); in imx6_pcie_probe()
1087 if (IS_ERR(imx6_pcie->pcie_aux)) in imx6_pcie_probe()
1088 return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), in imx6_pcie_probe()
1092 if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) in imx6_pcie_probe()
1093 imx6_pcie->controller_id = 1; in imx6_pcie_probe()
1095 imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1097 if (IS_ERR(imx6_pcie->pciephy_reset)) { in imx6_pcie_probe()
1099 return PTR_ERR(imx6_pcie->pciephy_reset); in imx6_pcie_probe()
1102 imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, in imx6_pcie_probe()
1104 if (IS_ERR(imx6_pcie->apps_reset)) { in imx6_pcie_probe()
1106 return PTR_ERR(imx6_pcie->apps_reset); in imx6_pcie_probe()
1114 imx6_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff"); in imx6_pcie_probe()
1115 if (IS_ERR(imx6_pcie->turnoff_reset)) { in imx6_pcie_probe()
1117 return PTR_ERR(imx6_pcie->turnoff_reset); in imx6_pcie_probe()
1120 /* Grab GPR config register range */ in imx6_pcie_probe()
1121 imx6_pcie->iomuxc_gpr = in imx6_pcie_probe()
1122 syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); in imx6_pcie_probe()
1123 if (IS_ERR(imx6_pcie->iomuxc_gpr)) { in imx6_pcie_probe()
1124 dev_err(dev, "unable to find iomuxc registers\n"); in imx6_pcie_probe()
1125 return PTR_ERR(imx6_pcie->iomuxc_gpr); in imx6_pcie_probe()
1129 if (of_property_read_u32(node, "fsl,tx-deemph-gen1", in imx6_pcie_probe()
1130 &imx6_pcie->tx_deemph_gen1)) in imx6_pcie_probe()
1131 imx6_pcie->tx_deemph_gen1 = 0; in imx6_pcie_probe()
1133 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-3p5db", in imx6_pcie_probe()
1134 &imx6_pcie->tx_deemph_gen2_3p5db)) in imx6_pcie_probe()
1135 imx6_pcie->tx_deemph_gen2_3p5db = 0; in imx6_pcie_probe()
1137 if (of_property_read_u32(node, "fsl,tx-deemph-gen2-6db", in imx6_pcie_probe()
1138 &imx6_pcie->tx_deemph_gen2_6db)) in imx6_pcie_probe()
1139 imx6_pcie->tx_deemph_gen2_6db = 20; in imx6_pcie_probe()
1141 if (of_property_read_u32(node, "fsl,tx-swing-full", in imx6_pcie_probe()
1142 &imx6_pcie->tx_swing_full)) in imx6_pcie_probe()
1143 imx6_pcie->tx_swing_full = 127; in imx6_pcie_probe()
1145 if (of_property_read_u32(node, "fsl,tx-swing-low", in imx6_pcie_probe()
1146 &imx6_pcie->tx_swing_low)) in imx6_pcie_probe()
1147 imx6_pcie->tx_swing_low = 127; in imx6_pcie_probe()
1150 pci->link_gen = 1; in imx6_pcie_probe()
1151 ret = of_property_read_u32(node, "fsl,max-link-speed", &pci->link_gen); in imx6_pcie_probe()
1153 imx6_pcie->vpcie = devm_regulator_get_optional(&pdev->dev, "vpcie"); in imx6_pcie_probe()
1154 if (IS_ERR(imx6_pcie->vpcie)) { in imx6_pcie_probe()
1155 if (PTR_ERR(imx6_pcie->vpcie) != -ENODEV) in imx6_pcie_probe()
1156 return PTR_ERR(imx6_pcie->vpcie); in imx6_pcie_probe()
1157 imx6_pcie->vpcie = NULL; in imx6_pcie_probe()
1189 [IMX6Q] = {
1190 .variant = IMX6Q,
1216 { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], },
1217 { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], },
1218 { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], },
1219 { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
1220 { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], } ,
1226 .name = "imx6q-pcie",
1238 struct pci_bus *bus = dev->bus; in imx6_pcie_quirk()
1239 struct pcie_port *pp = bus->sysdata; in imx6_pcie_quirk()
1242 if (!bus->dev.parent || !bus->dev.parent->parent) in imx6_pcie_quirk()
1246 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver) in imx6_pcie_quirk()
1257 if (imx6_pcie->drvdata->dbi_length) { in imx6_pcie_quirk()
1258 dev->cfg_size = imx6_pcie->drvdata->dbi_length; in imx6_pcie_quirk()
1259 dev_info(&dev->dev, "Limiting cfg_size to %d\n", in imx6_pcie_quirk()
1260 dev->cfg_size); in imx6_pcie_quirk()
1273 * by kernel and since imx6q_pcie_abort_handler() is a no-op, in imx6_pcie_init()
1278 "external abort on non-linefetch"); in imx6_pcie_init()