1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Copyright 2011-2014 Freescale Semiconductor, Inc.
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 #include <asm/proc-fns.h>
144 	0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
150 	.mmdc_compat = "fsl,imx6q-mmdc",
151 	.src_compat = "fsl,imx6q-src",
152 	.iomuxc_compat = "fsl,imx6q-iomuxc",
153 	.gpc_compat = "fsl,imx6q-gpc",
154 	.pl310_compat = "arm,pl310-cache",
160 	.mmdc_compat = "fsl,imx6q-mmdc",
161 	.src_compat = "fsl,imx6q-src",
162 	.iomuxc_compat = "fsl,imx6dl-iomuxc",
163 	.gpc_compat = "fsl,imx6q-gpc",
164 	.pl310_compat = "arm,pl310-cache",
170 	.mmdc_compat = "fsl,imx6sl-mmdc",
171 	.src_compat = "fsl,imx6sl-src",
172 	.iomuxc_compat = "fsl,imx6sl-iomuxc",
173 	.gpc_compat = "fsl,imx6sl-gpc",
174 	.pl310_compat = "arm,pl310-cache",
180 	.mmdc_compat = "fsl,imx6sll-mmdc",
181 	.src_compat = "fsl,imx6sll-src",
182 	.iomuxc_compat = "fsl,imx6sll-iomuxc",
183 	.gpc_compat = "fsl,imx6sll-gpc",
184 	.pl310_compat = "arm,pl310-cache",
190 	.mmdc_compat = "fsl,imx6sx-mmdc",
191 	.src_compat = "fsl,imx6sx-src",
192 	.iomuxc_compat = "fsl,imx6sx-iomuxc",
193 	.gpc_compat = "fsl,imx6sx-gpc",
194 	.pl310_compat = "arm,pl310-cache",
200 	.mmdc_compat = "fsl,imx6ul-mmdc",
201 	.src_compat = "fsl,imx6ul-src",
202 	.iomuxc_compat = "fsl,imx6ul-iomuxc",
203 	.gpc_compat = "fsl,imx6ul-gpc",
211  * suspend code(arch/arm/mach-imx/suspend-imx6.S), if this struct
213  * arch/arm/mach-imx/suspend-imx6.S must be also changed accordingly,
334 		return -EINVAL;  in imx6_set_lpm()
338 	 * ERR007265: CCM: When improper low-power sequence is used,  in imx6_set_lpm()
345 	 *    Low-Power mode.  in imx6_set_lpm()
346 	 * 3) Software should mask IRQ #32 right after CCM Low-Power mode  in imx6_set_lpm()
347 	 *    is set (set bits 0-1 of CCM_CLPCR).  in imx6_set_lpm()
372 			suspend_ocram_base)->l2_base.vbase)  in imx6q_suspend_finish()
420 		return -EINVAL;  in imx6q_pm_enter()
445 		return -ENODEV;  in imx6_pm_get_base()
451 	base->pbase = res.start;  in imx6_pm_get_base()
452 	base->vbase = ioremap(res.start, resource_size(&res));  in imx6_pm_get_base()
453 	if (!base->vbase)  in imx6_pm_get_base()
454 		ret = -ENOMEM;  in imx6_pm_get_base()
476 		return -EINVAL;  in imx6q_suspend_init()
479 	node = of_find_compatible_node(NULL, NULL, "mmio-sram");  in imx6q_suspend_init()
482 		return -ENODEV;  in imx6q_suspend_init()
488 		ret = -ENODEV;  in imx6q_suspend_init()
492 	ocram_pool = gen_pool_get(&pdev->dev, NULL);  in imx6q_suspend_init()
495 		ret = -ENODEV;  in imx6q_suspend_init()
502 		ret = -ENOMEM;  in imx6q_suspend_init()
513 	pm_info->pbase = ocram_pbase;  in imx6q_suspend_init()
514 	pm_info->resume_addr = __pa_symbol(v7_cpu_resume);  in imx6q_suspend_init()
515 	pm_info->pm_info_size = sizeof(*pm_info);  in imx6q_suspend_init()
521 	pm_info->ccm_base.vbase = ccm_base;  in imx6q_suspend_init()
523 	ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat);  in imx6q_suspend_init()
529 	ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat);  in imx6q_suspend_init()
535 	ret = imx6_pm_get_base(&pm_info->iomuxc_base, socdata->iomuxc_compat);  in imx6q_suspend_init()
537 		pr_warn("%s: failed to get iomuxc base %d!\n", __func__, ret);  in imx6q_suspend_init()
541 	ret = imx6_pm_get_base(&pm_info->gpc_base, socdata->gpc_compat);  in imx6q_suspend_init()
547 	if (socdata->pl310_compat) {  in imx6q_suspend_init()
548 		ret = imx6_pm_get_base(&pm_info->l2_base, socdata->pl310_compat);  in imx6q_suspend_init()
550 			pr_warn("%s: failed to get pl310-cache base %d!\n",  in imx6q_suspend_init()
556 	pm_info->ddr_type = imx_mmdc_get_ddr_type();  in imx6q_suspend_init()
557 	pm_info->mmdc_io_num = socdata->mmdc_io_num;  in imx6q_suspend_init()
558 	mmdc_offset_array = socdata->mmdc_io_offset;  in imx6q_suspend_init()
560 	for (i = 0; i < pm_info->mmdc_io_num; i++) {  in imx6q_suspend_init()
561 		pm_info->mmdc_io_val[i][0] =  in imx6q_suspend_init()
563 		pm_info->mmdc_io_val[i][1] =  in imx6q_suspend_init()
564 			readl_relaxed(pm_info->iomuxc_base.vbase +  in imx6q_suspend_init()
571 		MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));  in imx6q_suspend_init()
576 	iounmap(pm_info->gpc_base.vbase);  in imx6q_suspend_init()
578 	iounmap(pm_info->iomuxc_base.vbase);  in imx6q_suspend_init()
580 	iounmap(pm_info->src_base.vbase);  in imx6q_suspend_init()
582 	iounmap(pm_info->mmdc_base.vbase);  in imx6q_suspend_init()
584 	put_device(&pdev->dev);  in imx6q_suspend_init()
594 	struct regmap *gpr;  in imx6_pm_common_init()  local
609 	 * Force IOMUXC irq pending, so that the interrupt to GPC can be  in imx6_pm_common_init()
613 	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");  in imx6_pm_common_init()
614 	if (!IS_ERR(gpr))  in imx6_pm_common_init()
615 		regmap_update_bits(gpr, IOMUXC_GPR1, IMX6Q_GPR1_GINT,  in imx6_pm_common_init()
634 		return -EBUSY;  in imx6_pm_stby_poweroff_probe()
658 	if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))  in imx6_pm_ccm_init()
676 	struct regmap *gpr;  in imx6sl_pm_init()  local
682 		gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");  in imx6sl_pm_init()
683 		if (!IS_ERR(gpr))  in imx6sl_pm_init()
684 			regmap_update_bits(gpr, IOMUXC_GPR5,  in imx6sl_pm_init()