/Linux-v6.1/arch/arm/boot/dts/ |
D | xenvm-4.2.dts | 26 #size-cells = <0>; 28 cpu@0 { 31 reg = <0>; 51 reg = <0 0x80000000 0 0x08000000>; 57 #address-cells = <0>; 59 reg = <0 0x2c001000 0 0x1000>, 60 <0 0x2c002000 0 0x100>; 65 interrupts = <1 13 0xf08>, 66 <1 14 0xf08>, 67 <1 11 0xf08>, [all …]
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D | ecx-2000.dts | 9 /memreserve/ 0x00000000 0x0001000; 19 #size-cells = <0>; 21 cpu@0 { 24 reg = <0>; 54 memory@0 { 57 reg = <0x00000000 0x00000000 0x00000000 0xff800000>; 63 reg = <0x00000002 0x00000000 0x00000003 0x00000000>; 67 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; 70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, 71 <1 14 0xf08>, [all …]
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D | vexpress-v2p-ca15-tc1.dts | 16 arm,hbi = <0x237>; 17 arm,vexpress,site = <0xf>; 36 #size-cells = <0>; 38 cpu@0 { 41 reg = <0>; 53 reg = <0 0x80000000 0 0x40000000>; 61 /* Chipselect 2 is physically at 0x18000000 */ 65 reg = <0 0x18000000 0 0x00800000>; 72 reg = <0 0x2b000000 0 0x1000>; 73 interrupts = <0 85 4>; [all …]
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D | qcom-apq8084.dtsi | 21 reg = <0xfa00000 0x200000>; 28 #size-cells = <0>; 30 cpu@0 { 33 reg = <0>; 93 reg = <0x0 0x0>; 188 interrupts = <GIC_PPI 7 0xf04>; 194 #clock-cells = <0>; 200 #clock-cells = <0>; 207 interrupts = <GIC_PPI 2 0xf08>, 208 <GIC_PPI 3 0xf08>, [all …]
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D | vexpress-v2p-ca15_a7.dts | 16 arm,hbi = <0x249>; 17 arm,vexpress,site = <0xf>; 36 #size-cells = <0>; 38 cpu0: cpu@0 { 41 reg = <0>; 61 reg = <0x100>; 71 reg = <0x101>; 81 reg = <0x102>; 109 reg = <0 0x80000000 0 0x40000000>; 117 /* Chipselect 2 is physically at 0x18000000 */ [all …]
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D | qcom-sdx65.dtsi | 18 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>; 23 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 50 #size-cells = <0>; 52 cpu0: cpu@0 { 55 reg = <0x0>; 113 reg = <0x8fcad000 0x40000>; 118 reg = <0x8fcfd000 0x1000>; [all …]
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D | hip04.dtsi | 22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>; 27 #size-cells = <0>; 87 CPU0: cpu@0 { 90 reg = <0>; 110 reg = <0x100>; 115 reg = <0x101>; 120 reg = <0x102>; 125 reg = <0x103>; 130 reg = <0x200>; 135 reg = <0x201>; [all …]
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D | qcom-ipq4019.dtsi | 21 #address-cells = <0x1>; 22 #size-cells = <0x1>; 26 reg = <0x87e00000 0x080000>; 31 reg = <0x87e80000 0x180000>; 45 #size-cells = <0>; 46 cpu@0 { 53 reg = <0x0>; 55 clock-frequency = <0>; 67 reg = <0x1>; 69 clock-frequency = <0>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/timer/ |
D | arm,arch_timer.yaml | 121 interrupts = <1 13 0xf08>, 122 <1 14 0xf08>, 123 <1 11 0xf08>, 124 <1 10 0xf08>;
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/Linux-v6.1/arch/arm64/boot/dts/qcom/ |
D | sm6125.dtsi | 22 #clock-cells = <0>; 29 #clock-cells = <0>; 37 #size-cells = <0>; 39 CPU0: cpu@0 { 42 reg = <0x0 0x0>; 54 reg = <0x0 0x1>; 63 reg = <0x0 0x2>; 72 reg = <0x0 0x3>; 81 reg = <0x0 0x100>; 93 reg = <0x0 0x101>; [all …]
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/Linux-v6.1/drivers/media/platform/mediatek/mdp3/ |
D | mdp_reg_wdma.h | 10 #define WDMA_EN 0x008 11 #define WDMA_RST 0x00c 12 #define WDMA_CFG 0x014 13 #define WDMA_SRC_SIZE 0x018 14 #define WDMA_CLIP_SIZE 0x01c 15 #define WDMA_CLIP_COORD 0x020 16 #define WDMA_DST_W_IN_BYTE 0x028 17 #define WDMA_ALPHA 0x02c 18 #define WDMA_BUF_CON2 0x03c 19 #define WDMA_DST_UV_PITCH 0x078 [all …]
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D | mdp_reg_wrot.h | 10 #define VIDO_CTRL 0x000 11 #define VIDO_MAIN_BUF_SIZE 0x008 12 #define VIDO_SOFT_RST 0x010 13 #define VIDO_SOFT_RST_STAT 0x014 14 #define VIDO_CROP_OFST 0x020 15 #define VIDO_TAR_SIZE 0x024 16 #define VIDO_OFST_ADDR 0x02c 17 #define VIDO_STRIDE 0x030 18 #define VIDO_OFST_ADDR_C 0x038 19 #define VIDO_STRIDE_C 0x03c [all …]
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D | mdp_reg_rdma.h | 10 #define MDP_RDMA_EN 0x000 11 #define MDP_RDMA_RESET 0x008 12 #define MDP_RDMA_CON 0x020 13 #define MDP_RDMA_GMCIF_CON 0x028 14 #define MDP_RDMA_SRC_CON 0x030 15 #define MDP_RDMA_MF_BKGD_SIZE_IN_BYTE 0x060 16 #define MDP_RDMA_MF_BKGD_SIZE_IN_PXL 0x068 17 #define MDP_RDMA_MF_SRC_SIZE 0x070 18 #define MDP_RDMA_MF_CLIP_SIZE 0x078 19 #define MDP_RDMA_MF_OFFSET_1 0x080 [all …]
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/Linux-v6.1/drivers/soc/mediatek/ |
D | mt8183-mmsys.h | 6 #define MT8183_DISP_OVL0_MOUT_EN 0xf00 7 #define MT8183_DISP_OVL0_2L_MOUT_EN 0xf04 8 #define MT8183_DISP_OVL1_2L_MOUT_EN 0xf08 9 #define MT8183_DISP_DITHER0_MOUT_EN 0xf0c 10 #define MT8183_DISP_PATH0_SEL_IN 0xf24 11 #define MT8183_DISP_DSI0_SEL_IN 0xf2c 12 #define MT8183_DISP_DPI0_SEL_IN 0xf30 13 #define MT8183_DISP_RDMA0_SOUT_SEL_IN 0xf50 14 #define MT8183_DISP_RDMA1_SOUT_SEL_IN 0xf54 17 #define MT8183_OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0) [all …]
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D | mt8192-mmsys.h | 6 #define MT8192_MMSYS_OVL_MOUT_EN 0xf04 7 #define MT8192_DISP_OVL1_2L_MOUT_EN 0xf08 8 #define MT8192_DISP_OVL0_2L_MOUT_EN 0xf18 9 #define MT8192_DISP_OVL0_MOUT_EN 0xf1c 10 #define MT8192_DISP_RDMA0_SEL_IN 0xf2c 11 #define MT8192_DISP_RDMA0_SOUT_SEL 0xf30 12 #define MT8192_DISP_CCORR0_SOUT_SEL 0xf34 13 #define MT8192_DISP_AAL0_SEL_IN 0xf38 14 #define MT8192_DISP_DITHER0_MOUT_EN 0xf3c 15 #define MT8192_DISP_DSI0_SEL_IN 0xf40 [all …]
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/Linux-v6.1/include/linux/amba/ |
D | sp810.h | 18 #define SCCTRL 0x000 19 #define SCSYSSTAT 0x004 20 #define SCIMCTRL 0x008 21 #define SCIMSTAT 0x00C 22 #define SCXTALCTRL 0x010 23 #define SCPLLCTRL 0x014 24 #define SCPLLFCTRL 0x018 25 #define SCPERCTRL0 0x01C 26 #define SCPERCTRL1 0x020 27 #define SCPEREN 0x024 [all …]
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/Linux-v6.1/arch/arm/mach-highbank/ |
D | sysregs.h | 16 #define HB_SREG_A9_PWR_REQ 0xf00 17 #define HB_SREG_A9_BOOT_STAT 0xf04 18 #define HB_SREG_A9_BOOT_DATA 0xf08 20 #define HB_PWR_SUSPEND 0 25 #define SREG_CPU_PWR_CTRL(c) (0x200 + ((c) * 4)) 29 int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); in highbank_set_core_pwr() 38 int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); in highbank_clear_core_pwr() 42 writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu)); in highbank_clear_core_pwr() 71 writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); in highbank_clear_pwr_request()
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/Linux-v6.1/arch/arm64/boot/dts/altera/ |
D | socfpga_stratix10.dtsi | 21 service_reserved: svcbuffer@0 { 23 reg = <0x0 0x0 0x0 0x1000000>; 24 alignment = <0x1000>; 31 #size-cells = <0>; 33 cpu0: cpu@0 { 37 reg = <0x0>; 44 reg = <0x1>; 51 reg = <0x2>; 58 reg = <0x3>; 64 interrupts = <0 170 4>, [all …]
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/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1043a.dtsi | 37 #size-cells = <0>; 45 cpu0: cpu@0 { 48 reg = <0x0>; 49 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 58 reg = <0x1>; 59 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 68 reg = <0x2>; 69 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 78 reg = <0x3>; 79 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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/Linux-v6.1/arch/m68k/include/asm/ |
D | m54xxsim.h | 15 #define IOMEMSIZE 0x01000000 24 #define MCFICM_INTC0 (MCF_MBAR + 0x700) /* Base for Interrupt Ctrl 0 */ 26 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ 27 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ 28 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ 29 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ 30 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ 31 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ 32 #define MCFINTC_IRLR 0x18 /* */ 33 #define MCFINTC_IACKL 0x19 /* */ [all …]
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/Linux-v6.1/drivers/spi/ |
D | spi-coldfire-qspi.c | 29 #define MCFQSPI_QMR 0x00 30 #define MCFQSPI_QMR_MSTR 0x8000 31 #define MCFQSPI_QMR_CPOL 0x0200 32 #define MCFQSPI_QMR_CPHA 0x0100 33 #define MCFQSPI_QDLYR 0x04 34 #define MCFQSPI_QDLYR_SPE 0x8000 35 #define MCFQSPI_QWR 0x08 36 #define MCFQSPI_QWR_HALT 0x8000 37 #define MCFQSPI_QWR_WREN 0x4000 38 #define MCFQSPI_QWR_CSIV 0x1000 [all …]
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/Linux-v6.1/arch/arm64/boot/dts/xilinx/ |
D | zynqmp.dtsi | 26 #size-cells = <0>; 28 cpu0: cpu@0 { 33 reg = <0x0>; 41 reg = <0x1>; 50 reg = <0x2>; 59 reg = <0x3>; 67 CPU_SLEEP_0: cpu-sleep-0 { 69 arm,psci-suspend-param = <0x40000000>; 106 interrupts = <0 35 4>; 107 xlnx,ipi-id = <0>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/arm/ |
D | xen.txt | 13 Region 0 is reserved for mapping grant table, it must be always present. 47 reg = <0 0xb0000000 0 0x20000>; 48 interrupts = <1 15 0xf08>; 50 xen,uefi-system-table = <0xXXXXXXXX>; 51 xen,uefi-mmap-start = <0xXXXXXXXX>; 52 xen,uefi-mmap-size = <0xXXXXXXXX>; 53 xen,uefi-mmap-desc-size = <0xXXXXXXXX>; 54 xen,uefi-mmap-desc-ver = <0xXXXXXXXX>;
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/Linux-v6.1/drivers/media/dvb-frontends/ |
D | sp887x.c | 38 } while (0) 42 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len }; in i2c_writebytes() 51 return 0; in i2c_writebytes() 56 u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff }; in sp887x_writereg() 57 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 }; in sp887x_writereg() 64 if (!(reg == 0xf1a && data == 0x000 && in sp887x_writereg() 68 __func__, reg & 0xffff, data & 0xffff, ret); in sp887x_writereg() 73 return 0; in sp887x_writereg() 78 u8 b0 [] = { reg >> 8 , reg & 0xff }; in sp887x_readreg() 81 struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 }, in sp887x_readreg() [all …]
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/Linux-v6.1/drivers/net/wireless/realtek/rtw88/ |
D | rtw8821c.h | 13 u8 mac_addr[ETH_ALEN]; /* 0xd0 */ 21 u8 ltr_cap; /* 0xe3 */ 26 u8 res0:2; /* 0xf4 */ 50 u8 res0[0x0e]; 55 u8 channel_plan; /* 0xb8 */ 59 u8 pa_type; /* 0xbc */ 60 u8 lna_type_2g[2]; /* 0xbd */ 70 u8 rf_antenna_option; /* 0xc9 */ 82 /* 0xC00-0xCFF and 0xE00-0xEFF have the same layout */ in _rtw_write32s_mask() 84 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask() [all …]
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