29 #define	MCFQSPI_QMR			0x00
30 #define		MCFQSPI_QMR_MSTR	0x8000
31 #define		MCFQSPI_QMR_CPOL	0x0200
32 #define		MCFQSPI_QMR_CPHA	0x0100
33 #define	MCFQSPI_QDLYR			0x04
34 #define		MCFQSPI_QDLYR_SPE	0x8000
35 #define	MCFQSPI_QWR			0x08
36 #define		MCFQSPI_QWR_HALT	0x8000
37 #define		MCFQSPI_QWR_WREN	0x4000
38 #define		MCFQSPI_QWR_CSIV	0x1000
39 #define	MCFQSPI_QIR			0x0C
40 #define		MCFQSPI_QIR_WCEFB	0x8000
41 #define		MCFQSPI_QIR_ABRTB	0x4000
42 #define		MCFQSPI_QIR_ABRTL	0x1000
43 #define		MCFQSPI_QIR_WCEFE	0x0800
44 #define		MCFQSPI_QIR_ABRTE	0x0400
45 #define		MCFQSPI_QIR_SPIFE	0x0100
46 #define		MCFQSPI_QIR_WCEF	0x0008
47 #define		MCFQSPI_QIR_ABRT	0x0004
48 #define		MCFQSPI_QIR_SPIF	0x0001
49 #define	MCFQSPI_QAR			0x010
50 #define		MCFQSPI_QAR_TXBUF	0x00
51 #define		MCFQSPI_QAR_RXBUF	0x10
52 #define		MCFQSPI_QAR_CMDBUF	0x20
53 #define	MCFQSPI_QDR			0x014
54 #define	MCFQSPI_QCR			0x014
55 #define		MCFQSPI_QCR_CONT	0x8000
56 #define		MCFQSPI_QCR_BITSE	0x4000
57 #define		MCFQSPI_QCR_DT		0x2000
123 		mcfqspi->cs_control->setup(mcfqspi->cs_control) : 0;  in mcfqspi_cs_setup()
156 	unsigned i, n, offset = 0;  in mcfqspi_transfer_msg8()
161 	for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg8()
166 		for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg8()
169 		for (i = 0; i < count; ++i)  in mcfqspi_transfer_msg8()
170 			mcfqspi_wr_qdr(mcfqspi, 0);  in mcfqspi_transfer_msg8()
174 		u16 qwr = 0xf08;  in mcfqspi_transfer_msg8()
175 		mcfqspi_wr_qwr(mcfqspi, 0x700);  in mcfqspi_transfer_msg8()
185 				for (i = 0; i < 8; ++i)  in mcfqspi_transfer_msg8()
192 				for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg8()
195 			qwr = (offset ? 0x808 : 0) + ((n - 1) << 8);  in mcfqspi_transfer_msg8()
204 			for (i = 0; i < 8; ++i)  in mcfqspi_transfer_msg8()
215 		for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg8()
223 	unsigned i, n, offset = 0;  in mcfqspi_transfer_msg16()
228 	for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg16()
233 		for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg16()
236 		for (i = 0; i < count; ++i)  in mcfqspi_transfer_msg16()
237 			mcfqspi_wr_qdr(mcfqspi, 0);  in mcfqspi_transfer_msg16()
241 		u16 qwr = 0xf08;  in mcfqspi_transfer_msg16()
242 		mcfqspi_wr_qwr(mcfqspi, 0x700);  in mcfqspi_transfer_msg16()
252 				for (i = 0; i < 8; ++i)  in mcfqspi_transfer_msg16()
259 				for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg16()
262 			qwr = (offset ? 0x808 : 0x000) + ((n - 1) << 8);  in mcfqspi_transfer_msg16()
271 			for (i = 0; i < 8; ++i)  in mcfqspi_transfer_msg16()
282 		for (i = 0; i < n; ++i)  in mcfqspi_transfer_msg16()
319 	mcfqspi_wr_qir(mcfqspi, 0);  in mcfqspi_transfer_one()
321 	return 0;  in mcfqspi_transfer_one()
335 	return 0;  in mcfqspi_setup()
364 	mcfqspi->iobase = devm_platform_ioremap_resource(pdev, 0);  in mcfqspi_probe()
370 	mcfqspi->irq = platform_get_irq(pdev, 0);  in mcfqspi_probe()
371 	if (mcfqspi->irq < 0) {  in mcfqspi_probe()
378 				0, pdev->name, mcfqspi);  in mcfqspi_probe()
422 	return 0;  in mcfqspi_probe()
443 	/* disable the hardware (set the baud rate to 0) */  in mcfqspi_remove()
449 	return 0;  in mcfqspi_remove()
465 	return 0;  in mcfqspi_suspend()
487 	return 0;  in mcfqspi_runtime_suspend()
497 	return 0;  in mcfqspi_runtime_resume()