Lines Matching +full:0 +full:xf08
18 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
23 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0>;
113 reg = <0x8fcad000 0x40000>;
118 reg = <0x8fcfd000 0x1000>;
123 reg = <0x8fd00000 0x80000>;
128 reg = <0x8fd80000 0x80000>;
133 reg = <0x8fe00000 0x20000>;
138 reg = <0x8fe20000 0xc0000>;
145 reg = <0x8fee0000 0x20000>;
151 reg = <0x8ff00000 0x100000>;
156 reg = <0x90000000 0x500000>;
161 reg = <0x15800000 0x800000>;
170 qcom,local-pid = <0>;
204 reg = <0x00100000 0x001f7400>;
214 reg = <0x00831000 0x200>;
223 reg = <0xff4000 0x120>;
224 #phy-cells = <0>;
233 reg = <0x00ff6000 0x1c8>;
249 reg = <0x00ff6e00 0x160>,
250 <0x00ff7000 0x1ec>,
251 <0x00ff6200 0x1e00>;
252 #phy-cells = <0>;
253 #clock-cells = <0>;
262 reg = <0x01620000 0x31200>;
269 reg = <0x01b04000 0x1c000>;
274 qcom,ee = <0>;
281 reg = <0x01b30000 0x10000>;
283 #size-cells = <0>;
288 dmas = <&qpic_bam 0>,
297 reg = <0x01f40000 0x40000>;
303 reg = <0x04080000 0x4040>;
306 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
321 qcom,smem-states = <&modem_smp2p_out 0>;
336 reg = <0x08804000 0x1000>;
349 reg = <0x09680000 0x27200>;
356 reg = <0x0a6f8800 0x400>;
389 reg = <0x0a600000 0xcd00>;
391 iommus = <&apps_smmu 0x1a0 0x0>;
401 reg = <0x0c264000 0x1000>;
406 reg = <0xc440000 0xd00>,
407 <0xc600000 0x2000000>,
408 <0xe600000 0x100000>,
409 <0xe700000 0xa0000>,
410 <0xc40a000 0x26000>;
417 #size-cells = <0>;
418 cell-index = <0>;
419 qcom,channel = <0>;
420 qcom,ee = <0>;
425 reg = <0xf100000 0x300000>;
429 gpio-ranges = <&tlmm 0 0 109>;
437 reg = <0xb210000 0x10000>;
438 qcom,pdc-ranges = <0 147 52>, <52 266 32>;
446 reg = <0x1468f000 0x1000>;
447 ranges = <0x0 0x1468f000 0x1000>;
453 reg = <0x94c 0xc8>;
459 reg = <0x15000000 0x40000>;
502 reg = <0x17800000 0x1000>,
503 <0x17802000 0x1000>;
508 reg = <0x17808000 0x1000>;
511 #clock-cells = <0>;
516 reg = <0x17810000 0x2000>;
520 #clock-cells = <0>;
525 reg = <0x17817000 0x1000>;
534 reg = <0x17820000 0x1000>;
538 frame-number = <0>;
539 interrupts = <GIC_SPI 7 0x4>,
540 <GIC_SPI 6 0x4>;
541 reg = <0x17821000 0x1000>,
542 <0x17822000 0x1000>;
547 interrupts = <GIC_SPI 8 0x4>;
548 reg = <0x17823000 0x1000>;
554 interrupts = <GIC_SPI 9 0x4>;
555 reg = <0x17824000 0x1000>;
561 interrupts = <GIC_SPI 10 0x4>;
562 reg = <0x17825000 0x1000>;
568 interrupts = <GIC_SPI 11 0x4>;
569 reg = <0x17826000 0x1000>;
575 interrupts = <GIC_SPI 12 0x4>;
576 reg = <0x17827000 0x1000>;
582 interrupts = <GIC_SPI 13 0x4>;
583 reg = <0x17828000 0x1000>;
589 interrupts = <GIC_SPI 14 0x4>;
590 reg = <0x17829000 0x1000>;
598 reg = <0x17830000 0x10000>,
599 <0x17840000 0x10000>;
600 reg-names = "drv-0", "drv-1";
603 qcom,tcs-offset = <0xd00>;
676 interrupts = <1 13 0xf08>,
677 <1 12 0xf08>,
678 <1 10 0xf08>,
679 <1 11 0xf08>;