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Searched refs:rtl8xxxu_read32 (Results 1 – 10 of 10) sorted by relevance

/Linux-v6.6/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8188f.c337 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8188fu_identify_chip()
384 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32); in rtl8188f_set_tx_power()
389 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8188f_set_tx_power()
448 val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_D_SYNC_PATH); in rtl8188f_spur_calibration()
453 val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_D_SYNC_PATH); in rtl8188f_spur_calibration()
458 reg948 = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH); in rtl8188f_spur_calibration()
463 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE); in rtl8188f_spur_calibration()
471 initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8188f_spur_calibration()
474 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188f_spur_calibration()
493 do_notch = rtl8xxxu_read32(priv, REG_FPGA0_PSD_REPORT) >= threshold; in rtl8188f_spur_calibration()
[all …]
Drtl8xxxu_8723b.c313 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8723bu_identify_chip()
327 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL); in rtl8723bu_identify_chip()
339 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8723bu_identify_chip()
415 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32); in rtl8723b_set_tx_power()
420 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8723b_set_tx_power()
557 val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1); in rtl8723bu_phy_init_antenna_selection()
561 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG); in rtl8723bu_phy_init_antenna_selection()
565 val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG); in rtl8723bu_phy_init_antenna_selection()
569 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0); in rtl8723bu_phy_init_antenna_selection()
573 val32 = rtl8xxxu_read32(priv, REG_LEDCFG0); in rtl8723bu_phy_init_antenna_selection()
[all …]
Drtl8xxxu_8710b.c497 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_read32()
504 value = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_indirect_read32()
533 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_indirect_write32()
567 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
569 val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B); in rtl8710b_read_efuse8()
577 val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B); in rtl8710b_read_efuse8()
731 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
735 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8710bu_config_channel()
741 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8710bu_config_channel()
747 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8710bu_config_channel()
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Drtl8xxxu_8192e.c487 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8192eu_identify_chip()
495 bonding = rtl8xxxu_read32(priv, REG_HPON_FSM); in rtl8192eu_identify_chip()
513 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8192eu_identify_chip()
540 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32); in rtl8192e_set_tx_power()
545 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8192e_set_tx_power()
572 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK1_55_MCS32); in rtl8192e_set_tx_power()
577 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8192e_set_tx_power()
747 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8192eu_iqk_path_a()
748 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8192eu_iqk_path_a()
749 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8192eu_iqk_path_a()
[all …]
Drtl8xxxu_8192f.c419 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8192fu_identify_chip()
426 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL); in rtl8192fu_identify_chip()
435 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8192fu_identify_chip()
690 agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH); in rtl8192fu_init_aggregation()
797 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8192f_phy_lc_calibrate()
806 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT); in rtl8192f_phy_lc_calibrate()
866 while (rtl8xxxu_read32(priv, REG_IQK_RPT_TXA) == 0 && ktime < 21) { in rtl8192fu_iqk_path_a()
872 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8192fu_iqk_path_a()
873 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8192fu_iqk_path_a()
874 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8192fu_iqk_path_a()
[all …]
Drtl8xxxu_8188e.c413 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8188eu_identify_chip()
448 rsr = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET); in rtl8188eu_config_channel()
457 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188eu_config_channel()
461 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8188eu_config_channel()
484 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8188eu_config_channel()
488 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8188eu_config_channel()
496 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8188eu_config_channel()
502 val32 = rtl8xxxu_read32(priv, REG_OFDM1_LSTF); in rtl8188eu_config_channel()
510 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8188eu_config_channel()
648 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8188eu_iqk_path_a()
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Drtl8xxxu_core.c700 u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr) in rtl8xxxu_read32() function
830 val32 = rtl8xxxu_read32(priv, addr); in rtl8xxxu_write32_set()
839 val32 = rtl8xxxu_read32(priv, addr); in rtl8xxxu_write32_clear()
851 orig = rtl8xxxu_read32(priv, addr); in rtl8xxxu_write32_mask()
914 hssia = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2); in rtl8xxxu_read_rfreg()
916 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm2); in rtl8xxxu_read_rfreg()
935 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm1); in rtl8xxxu_read_rfreg()
937 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hspiread); in rtl8xxxu_read_rfreg()
939 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].lssiread); in rtl8xxxu_read_rfreg()
968 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8xxxu_write_rfreg()
[all …]
Drtl8xxxu_8723a.c138 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8723au_identify_chip()
154 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL); in rtl8723au_identify_chip()
166 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8723au_identify_chip()
297 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8723a_emu_to_active()
327 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8723a_emu_to_active()
332 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8723a_emu_to_active()
397 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL); in rtl8723au_power_on()
416 val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL); in rtl8723a_set_crystal_cap()
Drtl8xxxu_8192c.c335 sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8192cu_identify_chip()
344 bonding = rtl8xxxu_read32(priv, REG_HPON_FSM); in rtl8192cu_identify_chip()
372 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8192cu_identify_chip()
579 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM); in rtl8192cu_power_on()
Drtl8xxxu.h2015 u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr);