497 		val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);  in rtl8710b_indirect_read32()
504 		value = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B);  in rtl8710b_indirect_read32()
533 		val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);  in rtl8710b_indirect_write32()
567 	val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);  in rtl8710b_read_efuse8()
569 		val32 = rtl8xxxu_read32(priv, REG_EFUSE_INDIRECT_CTRL_8710B);  in rtl8710b_read_efuse8()
577 	val32 = rtl8xxxu_read32(priv, REG_USB_HOST_INDIRECT_DATA_8710B);  in rtl8710b_read_efuse8()
731 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8710bu_config_channel()
735 	val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);  in rtl8710bu_config_channel()
741 		val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM);  in rtl8710bu_config_channel()
747 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8710bu_config_channel()
752 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8710bu_config_channel()
758 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT);  in rtl8710bu_config_channel()
763 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TX_PSDO_NOISE_WEIGHT);  in rtl8710bu_config_channel()
769 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_AFE);  in rtl8710bu_config_channel()
774 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE);  in rtl8710bu_config_channel()
780 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
784 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
788 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
798 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
802 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
807 		val32 = rtl8xxxu_read32(priv, REG_OFDM_RX_DFIR);  in rtl8710bu_config_channel()
829 	agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);  in rtl8710bu_init_aggregation()
848 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_init_statistics()
853 	val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B);  in rtl8710bu_init_statistics()
859 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC);  in rtl8710bu_init_statistics()
981 	val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B);  in rtl8710bu_init_phy_bb()
1012 	path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8710bu_iqk_path_a()
1019 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1042 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1067 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_iqk_path_a()
1079 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8710bu_iqk_path_a()
1080 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8710bu_iqk_path_a()
1081 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8710bu_iqk_path_a()
1096 	path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8710bu_rx_iqk_path_a()
1103 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1126 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1153 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8710bu_rx_iqk_path_a()
1154 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8710bu_rx_iqk_path_a()
1155 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8710bu_rx_iqk_path_a()
1169 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1186 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1210 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1240 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_rx_iqk_path_a()
1252 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8710bu_rx_iqk_path_a()
1253 	reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8710bu_rx_iqk_path_a()
1304 	rx_initial_gain = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8710bu_phy_iqcalibrate()
1318 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1);  in rtl8710bu_phy_iqcalibrate()
1329 	val32 = rtl8xxxu_read32(priv, REG_TX_PTCL_CTRL);  in rtl8710bu_phy_iqcalibrate()
1334 	path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8710bu_phy_iqcalibrate()
1338 	val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);  in rtl8710bu_phy_iqcalibrate()
1347 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_phy_iqcalibrate()
1357 			val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8710bu_phy_iqcalibrate()
1360 			val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8710bu_phy_iqcalibrate()
1373 			val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8710bu_phy_iqcalibrate()
1376 			val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8710bu_phy_iqcalibrate()
1389 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8710bu_phy_iqcalibrate()
1410 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8710bu_phy_iqcalibrate()
1413 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8710bu_phy_iqcalibrate()
1434 	path_sel_bb = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8710bu_phy_iq_calibrate()
1538 	val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B);  in rtl8710bu_active_to_emu()
1543 	val32 = rtl8xxxu_read32(priv, REG_SYS_FUNC_8710B);  in rtl8710bu_active_to_emu()
1584 		val32 = rtl8xxxu_read32(priv, REG_SCH_TX_CMD);  in rtl8710bu_active_to_lps()
1743 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8710b_enable_rf()
1755 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8710b_disable_rf()