313 	sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);  in rtl8723bu_identify_chip()
327 	val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);  in rtl8723bu_identify_chip()
339 	val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);  in rtl8723bu_identify_chip()
415 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);  in rtl8723b_set_tx_power()
420 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);  in rtl8723b_set_tx_power()
557 	val32 = rtl8xxxu_read32(priv, REG_PAD_CTRL1);  in rtl8723bu_phy_init_antenna_selection()
561 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
565 	val32 = rtl8xxxu_read32(priv, REG_GPIO_MUXCFG);  in rtl8723bu_phy_init_antenna_selection()
569 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
573 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_phy_init_antenna_selection()
577 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723bu_phy_init_antenna_selection()
581 	val32 = rtl8xxxu_read32(priv, REG_RFE_CTRL_ANTA_SRC);  in rtl8723bu_phy_init_antenna_selection()
586 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723bu_phy_init_antenna_selection()
596 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_iqk_path_a()
601 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
638 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
674 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_iqk_path_a()
679 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_iqk_path_a()
680 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_iqk_path_a()
681 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_iqk_path_a()
706 	path_sel = rtl8xxxu_read32(priv, REG_S0S1_PATH_SWITCH);  in rtl8723bu_rx_iqk_path_a()
711 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
748 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
784 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
789 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
790 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8723bu_rx_iqk_path_a()
791 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8723bu_rx_iqk_path_a()
814 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
852 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
883 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_rx_iqk_path_a()
888 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
889 	reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8723bu_rx_iqk_path_a()
937 	u8 xa_agc = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
938 	u8 xb_agc = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1) & 0xff;  in rtl8723bu_phy_iqcalibrate()
959 	val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);  in rtl8723bu_phy_iqcalibrate()
971 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
992 			val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
996 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
999 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1013 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1016 			val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1035 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1040 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1051 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1053 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8723bu_phy_iqcalibrate()
1065 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1068 				val32 = rtl8xxxu_read32(priv,  in rtl8723bu_phy_iqcalibrate()
1081 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_phy_iqcalibrate()
1098 		val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1104 			val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_AGC_CORE1);  in rtl8723bu_phy_iqcalibrate()
1138 	bt_control = rtl8xxxu_read32(priv, REG_BT_CONTROL_8723BU);  in rtl8723bu_phy_iq_calibrate()
1258 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723bu_active_to_emu()
1330 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1345 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1350 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1355 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1360 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1365 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8723b_emu_to_active()
1466 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723bu_power_on()
1525 	val32 = rtl8xxxu_read32(priv, REG_RX_WAIT_CCA);  in rtl8723b_enable_rf()
1569 	val32 = rtl8xxxu_read32(priv, REG_PWR_DATA);  in rtl8723b_enable_rf()
1578 	val32 = rtl8xxxu_read32(priv, REG_RFE_BUFFER);  in rtl8723b_enable_rf()
1584 	val32 = rtl8xxxu_read32(priv, REG_LEDCFG0);  in rtl8723b_enable_rf()
1644 	agg_rx = rtl8xxxu_read32(priv, REG_RXDMA_AGG_PG_TH);  in rtl8723bu_init_aggregation()
1662 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_IQK);  in rtl8723bu_init_statistics()
1666 	val32 = rtl8xxxu_read32(priv, REG_NHM_TH9_TH10_8723B);  in rtl8723bu_init_statistics()
1670 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_FA_RSTC);  in rtl8723bu_init_statistics()