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Searched refs:dev_priv (Results 1 – 25 of 266) sorted by relevance

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/Linux-v5.10/drivers/gpu/drm/i915/
Dintel_pch.c11 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) in intel_pch_type() argument
15 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
16 drm_WARN_ON(&dev_priv->drm, !IS_GEN(dev_priv, 5)); in intel_pch_type()
19 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
20 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
21 !IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); in intel_pch_type()
24 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
25 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
26 !IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); in intel_pch_type()
30 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
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Di915_irq.c155 static void intel_hpd_init_pins(struct drm_i915_private *dev_priv) in intel_hpd_init_pins() argument
157 struct i915_hotplug *hpd = &dev_priv->hotplug; in intel_hpd_init_pins()
159 if (HAS_GMCH(dev_priv)) { in intel_hpd_init_pins()
160 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
161 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins()
168 if (INTEL_GEN(dev_priv) >= 11) in intel_hpd_init_pins()
170 else if (IS_GEN9_LP(dev_priv)) in intel_hpd_init_pins()
172 else if (INTEL_GEN(dev_priv) >= 8) in intel_hpd_init_pins()
174 else if (INTEL_GEN(dev_priv) >= 7) in intel_hpd_init_pins()
179 if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)) in intel_hpd_init_pins()
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Di915_drv.c91 static int i915_get_bridge_dev(struct drm_i915_private *dev_priv) in i915_get_bridge_dev() argument
93 int domain = pci_domain_nr(dev_priv->drm.pdev->bus); in i915_get_bridge_dev()
95 dev_priv->bridge_dev = in i915_get_bridge_dev()
97 if (!dev_priv->bridge_dev) { in i915_get_bridge_dev()
98 drm_err(&dev_priv->drm, "bridge device not found\n"); in i915_get_bridge_dev()
106 intel_alloc_mchbar_resource(struct drm_i915_private *dev_priv) in intel_alloc_mchbar_resource() argument
108 int reg = INTEL_GEN(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915; in intel_alloc_mchbar_resource()
113 if (INTEL_GEN(dev_priv) >= 4) in intel_alloc_mchbar_resource()
114 pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi); in intel_alloc_mchbar_resource()
115 pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo); in intel_alloc_mchbar_resource()
[all …]
Di915_drv.h196 struct drm_i915_private *dev_priv; member
263 void (*get_cdclk)(struct drm_i915_private *dev_priv,
265 void (*set_cdclk)(struct drm_i915_private *dev_priv,
269 int (*get_fifo_size)(struct drm_i915_private *dev_priv,
305 void (*init_clock_gating)(struct drm_i915_private *dev_priv);
306 void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
532 struct drm_i915_private *dev_priv; member
1291 #define INTEL_INFO(dev_priv) (&(dev_priv)->__info) argument
1292 #define RUNTIME_INFO(dev_priv) (&(dev_priv)->__runtime) argument
1293 #define DRIVER_CAPS(dev_priv) (&(dev_priv)->caps) argument
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Dintel_pch.h60 #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type) argument
61 #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) argument
62 #define HAS_PCH_DG1(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_DG1) argument
63 #define HAS_PCH_JSP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_JSP) argument
64 #define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC) argument
65 #define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP) argument
66 #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP) argument
67 #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP) argument
68 #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT) argument
69 #define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT) argument
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Di915_suspend.c35 static void i915_save_display(struct drm_i915_private *dev_priv) in i915_save_display() argument
37 struct pci_dev *pdev = dev_priv->drm.pdev; in i915_save_display()
40 if (INTEL_GEN(dev_priv) <= 4) in i915_save_display()
41 dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); in i915_save_display()
43 if (IS_GEN(dev_priv, 4)) in i915_save_display()
45 &dev_priv->regfile.saveGCDGMBUS); in i915_save_display()
48 static void i915_restore_display(struct drm_i915_private *dev_priv) in i915_restore_display() argument
50 struct pci_dev *pdev = dev_priv->drm.pdev; in i915_restore_display()
52 if (IS_GEN(dev_priv, 4)) in i915_restore_display()
54 dev_priv->regfile.saveGCDGMBUS); in i915_restore_display()
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Dintel_gvt.c43 static bool is_supported_device(struct drm_i915_private *dev_priv) in is_supported_device() argument
45 if (IS_BROADWELL(dev_priv)) in is_supported_device()
47 if (IS_SKYLAKE(dev_priv)) in is_supported_device()
49 if (IS_KABYLAKE(dev_priv)) in is_supported_device()
51 if (IS_BROXTON(dev_priv)) in is_supported_device()
53 if (IS_COFFEELAKE(dev_priv)) in is_supported_device()
55 if (IS_COMETLAKE(dev_priv)) in is_supported_device()
67 void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv) in intel_gvt_sanitize_options() argument
69 if (!dev_priv->params.enable_gvt) in intel_gvt_sanitize_options()
72 if (intel_vgpu_active(dev_priv)) { in intel_gvt_sanitize_options()
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/Linux-v5.10/drivers/gpu/drm/vmwgfx/
Dvmwgfx_drv.c357 static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv) in vmw_dummy_query_bo_create() argument
374 ret = vmw_bo_init(dev_priv, vbo, PAGE_SIZE, in vmw_dummy_query_bo_create()
399 dev_priv->dummy_query_bo = vbo; in vmw_dummy_query_bo_create()
414 static int vmw_request_device_late(struct vmw_private *dev_priv) in vmw_request_device_late() argument
418 if (dev_priv->has_mob) { in vmw_request_device_late()
419 ret = vmw_otables_setup(dev_priv); in vmw_request_device_late()
427 if (dev_priv->cman) { in vmw_request_device_late()
428 ret = vmw_cmdbuf_set_pool_size(dev_priv->cman, in vmw_request_device_late()
431 struct vmw_cmdbuf_man *man = dev_priv->cman; in vmw_request_device_late()
433 dev_priv->cman = NULL; in vmw_request_device_late()
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Dvmwgfx_irq.c48 struct vmw_private *dev_priv = vmw_priv(dev); in vmw_thread_fn() local
52 dev_priv->irqthread_pending)) { in vmw_thread_fn()
53 vmw_fences_update(dev_priv->fman); in vmw_thread_fn()
54 wake_up_all(&dev_priv->fence_queue); in vmw_thread_fn()
59 dev_priv->irqthread_pending)) { in vmw_thread_fn()
60 vmw_cmdbuf_irqthread(dev_priv->cman); in vmw_thread_fn()
81 struct vmw_private *dev_priv = vmw_priv(dev); in vmw_irq_handler() local
85 status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); in vmw_irq_handler()
86 masked_status = status & READ_ONCE(dev_priv->irq_mask); in vmw_irq_handler()
89 outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); in vmw_irq_handler()
[all …]
/Linux-v5.10/drivers/gpu/drm/i915/display/
Dintel_psr.c94 static bool intel_psr2_enabled(struct drm_i915_private *dev_priv, in intel_psr2_enabled() argument
98 drm_WARN_ON(&dev_priv->drm, crtc_state->dsc.compression_enable && in intel_psr2_enabled()
101 switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) { in intel_psr2_enabled()
110 static void psr_irq_control(struct drm_i915_private *dev_priv) in psr_irq_control() argument
121 if (INTEL_GEN(dev_priv) >= 12) { in psr_irq_control()
123 imr_reg = TRANS_PSR_IMR(dev_priv->psr.transcoder); in psr_irq_control()
125 trans_shift = dev_priv->psr.transcoder; in psr_irq_control()
130 if (dev_priv->psr.debug & I915_PSR_DEBUG_IRQ) in psr_irq_control()
135 val = intel_de_read(dev_priv, imr_reg); in psr_irq_control()
138 intel_de_write(dev_priv, imr_reg, val); in psr_irq_control()
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Dintel_cdclk.c60 static void fixed_133mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_133mhz_get_cdclk() argument
66 static void fixed_200mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_200mhz_get_cdclk() argument
72 static void fixed_266mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_266mhz_get_cdclk() argument
78 static void fixed_333mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_333mhz_get_cdclk() argument
84 static void fixed_400mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_400mhz_get_cdclk() argument
90 static void fixed_450mhz_get_cdclk(struct drm_i915_private *dev_priv, in fixed_450mhz_get_cdclk() argument
96 static void i85x_get_cdclk(struct drm_i915_private *dev_priv, in i85x_get_cdclk() argument
99 struct pci_dev *pdev = dev_priv->drm.pdev; in i85x_get_cdclk()
138 static void i915gm_get_cdclk(struct drm_i915_private *dev_priv, in i915gm_get_cdclk() argument
141 struct pci_dev *pdev = dev_priv->drm.pdev; in i915gm_get_cdclk()
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Dintel_fbc.c64 static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv, in intel_fbc_calculate_cfb_size() argument
70 if (IS_GEN(dev_priv, 7)) in intel_fbc_calculate_cfb_size()
72 else if (INTEL_GEN(dev_priv) >= 8) in intel_fbc_calculate_cfb_size()
79 static void i8xx_fbc_deactivate(struct drm_i915_private *dev_priv) in i8xx_fbc_deactivate() argument
84 fbc_ctl = intel_de_read(dev_priv, FBC_CONTROL); in i8xx_fbc_deactivate()
89 intel_de_write(dev_priv, FBC_CONTROL, fbc_ctl); in i8xx_fbc_deactivate()
92 if (intel_de_wait_for_clear(dev_priv, FBC_STATUS, in i8xx_fbc_deactivate()
94 drm_dbg_kms(&dev_priv->drm, "FBC idle timed out\n"); in i8xx_fbc_deactivate()
99 static void i8xx_fbc_activate(struct drm_i915_private *dev_priv) in i8xx_fbc_activate() argument
101 struct intel_fbc_reg_params *params = &dev_priv->fbc.params; in i8xx_fbc_activate()
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Dintel_fifo_underrun.c56 struct drm_i915_private *dev_priv = to_i915(dev); in ivb_can_enable_err_int() local
60 lockdep_assert_held(&dev_priv->irq_lock); in ivb_can_enable_err_int()
62 for_each_pipe(dev_priv, pipe) { in ivb_can_enable_err_int()
63 crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in ivb_can_enable_err_int()
74 struct drm_i915_private *dev_priv = to_i915(dev); in cpt_can_enable_serr_int() local
78 lockdep_assert_held(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
80 for_each_pipe(dev_priv, pipe) { in cpt_can_enable_serr_int()
81 crtc = intel_get_crtc_for_pipe(dev_priv, pipe); in cpt_can_enable_serr_int()
92 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_check_fifo_underruns() local
96 lockdep_assert_held(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
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Dintel_gmbus.c94 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *dev_priv, in get_gmbus_pin() argument
97 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) in get_gmbus_pin()
99 else if (HAS_PCH_CNP(dev_priv)) in get_gmbus_pin()
101 else if (IS_GEN9_LP(dev_priv)) in get_gmbus_pin()
103 else if (IS_GEN9_BC(dev_priv)) in get_gmbus_pin()
105 else if (IS_BROADWELL(dev_priv)) in get_gmbus_pin()
111 bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv, in intel_gmbus_is_valid_pin() argument
116 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) in intel_gmbus_is_valid_pin()
118 else if (HAS_PCH_CNP(dev_priv)) in intel_gmbus_is_valid_pin()
120 else if (IS_GEN9_LP(dev_priv)) in intel_gmbus_is_valid_pin()
[all …]
Dintel_hotplug.c86 enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv, in intel_hpd_pin_default() argument
139 static bool intel_hpd_irq_storm_detect(struct drm_i915_private *dev_priv, in intel_hpd_irq_storm_detect() argument
142 struct i915_hotplug *hpd = &dev_priv->hotplug; in intel_hpd_irq_storm_detect()
150 (!long_hpd && !dev_priv->hotplug.hpd_short_storm_enabled)) in intel_hpd_irq_storm_detect()
161 drm_dbg_kms(&dev_priv->drm, in intel_hpd_irq_storm_detect()
165 drm_dbg_kms(&dev_priv->drm, in intel_hpd_irq_storm_detect()
175 intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv) in intel_hpd_irq_storm_switch_to_polling() argument
177 struct drm_device *dev = &dev_priv->drm; in intel_hpd_irq_storm_switch_to_polling()
182 lockdep_assert_held(&dev_priv->irq_lock); in intel_hpd_irq_storm_switch_to_polling()
193 dev_priv->hotplug.stats[pin].state != HPD_MARK_DISABLED) in intel_hpd_irq_storm_switch_to_polling()
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Dintel_combo_phy.c46 cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in cnl_get_procmon_ref_values() argument
51 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy)); in cnl_get_procmon_ref_values()
76 static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv, in cnl_set_procmon_ref_values() argument
82 procmon = cnl_get_procmon_ref_values(dev_priv, phy); in cnl_set_procmon_ref_values()
84 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW1(phy)); in cnl_set_procmon_ref_values()
87 intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val); in cnl_set_procmon_ref_values()
89 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in cnl_set_procmon_ref_values()
90 intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10); in cnl_set_procmon_ref_values()
93 static bool check_phy_reg(struct drm_i915_private *dev_priv, in check_phy_reg() argument
97 u32 val = intel_de_read(dev_priv, reg); in check_phy_reg()
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Dintel_lpe_audio.c77 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->lpe_audio.platdev != NULL) argument
80 lpe_audio_platdev_create(struct drm_i915_private *dev_priv) in lpe_audio_platdev_create() argument
82 struct drm_device *dev = &dev_priv->drm; in lpe_audio_platdev_create()
98 rsc[0].start = rsc[0].end = dev_priv->lpe_audio.irq; in lpe_audio_platdev_create()
118 pdata->num_pipes = INTEL_NUM_PIPES(dev_priv); in lpe_audio_platdev_create()
119 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
130 drm_err(&dev_priv->drm, in lpe_audio_platdev_create()
140 static void lpe_audio_platdev_destroy(struct drm_i915_private *dev_priv) in lpe_audio_platdev_destroy() argument
150 platform_device_unregister(dev_priv->lpe_audio.platdev); in lpe_audio_platdev_destroy()
167 static int lpe_audio_irq_init(struct drm_i915_private *dev_priv) in lpe_audio_irq_init() argument
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Dintel_display_power.c23 bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
162 static void intel_power_well_enable(struct drm_i915_private *dev_priv, in intel_power_well_enable() argument
165 drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name); in intel_power_well_enable()
166 power_well->desc->ops->enable(dev_priv, power_well); in intel_power_well_enable()
170 static void intel_power_well_disable(struct drm_i915_private *dev_priv, in intel_power_well_disable() argument
173 drm_dbg_kms(&dev_priv->drm, "disabling %s\n", power_well->desc->name); in intel_power_well_disable()
175 power_well->desc->ops->disable(dev_priv, power_well); in intel_power_well_disable()
178 static void intel_power_well_get(struct drm_i915_private *dev_priv, in intel_power_well_get() argument
182 intel_power_well_enable(dev_priv, power_well); in intel_power_well_get()
185 static void intel_power_well_put(struct drm_i915_private *dev_priv, in intel_power_well_put() argument
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Dintel_dpio_phy.c216 bxt_get_phy_list(struct drm_i915_private *dev_priv, int *count) in bxt_get_phy_list() argument
218 if (IS_GEMINILAKE(dev_priv)) { in bxt_get_phy_list()
228 bxt_get_phy_info(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_get_phy_info() argument
232 bxt_get_phy_list(dev_priv, &count); in bxt_get_phy_info()
237 void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port, in bxt_port_to_phy_channel() argument
243 phys = bxt_get_phy_list(dev_priv, &count); in bxt_port_to_phy_channel()
262 drm_WARN(&dev_priv->drm, 1, "PHY not found for PORT %c", in bxt_port_to_phy_channel()
268 void bxt_ddi_phy_set_signal_level(struct drm_i915_private *dev_priv, in bxt_ddi_phy_set_signal_level() argument
276 bxt_port_to_phy_channel(dev_priv, port, &phy, &ch); in bxt_ddi_phy_set_signal_level()
282 val = intel_de_read(dev_priv, BXT_PORT_PCS_DW10_LN01(phy, ch)); in bxt_ddi_phy_set_signal_level()
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/Linux-v5.10/drivers/gpu/drm/via/
Dvia_dma.c67 dev_priv->dma_low += 8; \
75 dev_priv->dma_low += 8; \
78 static void via_cmdbuf_start(drm_via_private_t *dev_priv);
79 static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
80 static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
81 static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
82 static int via_wait_idle(drm_via_private_t *dev_priv);
83 static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
89 static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv) in via_cmdbuf_space() argument
91 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; in via_cmdbuf_space()
[all …]
Dvia_irq.c95 drm_via_private_t *dev_priv = dev->dev_private; in via_get_vblank_counter() local
100 return atomic_read(&dev_priv->vbl_received); in via_get_vblank_counter()
106 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_driver_irq_handler() local
110 drm_via_irq_t *cur_irq = dev_priv->via_irqs; in via_driver_irq_handler()
113 status = via_read(dev_priv, VIA_REG_INTERRUPT); in via_driver_irq_handler()
115 atomic_inc(&dev_priv->vbl_received); in via_driver_irq_handler()
116 if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) { in via_driver_irq_handler()
118 if (dev_priv->last_vblank_valid) { in via_driver_irq_handler()
119 dev_priv->nsec_per_vblank = in via_driver_irq_handler()
121 dev_priv->last_vblank) >> 4; in via_driver_irq_handler()
[all …]
/Linux-v5.10/drivers/gpu/drm/savage/
Dsavage_bci.c47 savage_bci_wait_fifo_shadow(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_shadow() argument
49 uint32_t mask = dev_priv->status_used_mask; in savage_bci_wait_fifo_shadow()
50 uint32_t threshold = dev_priv->bci_threshold_hi; in savage_bci_wait_fifo_shadow()
55 if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold) in savage_bci_wait_fifo_shadow()
62 status = dev_priv->status_ptr[0]; in savage_bci_wait_fifo_shadow()
76 savage_bci_wait_fifo_s3d(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_s3d() argument
78 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; in savage_bci_wait_fifo_s3d()
97 savage_bci_wait_fifo_s4(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_s4() argument
99 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; in savage_bci_wait_fifo_s4()
129 savage_bci_wait_event_shadow(drm_savage_private_t * dev_priv, uint16_t e) in savage_bci_wait_event_shadow() argument
[all …]
/Linux-v5.10/drivers/gpu/drm/r128/
Dr128_cce.c57 drm_r128_private_t *dev_priv = dev->dev_private; in R128_READ_PLL() local
64 static void r128_status(drm_r128_private_t *dev_priv) in r128_status() argument
85 static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv) in r128_do_pixcache_flush() argument
93 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_pixcache_flush()
105 static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries) in r128_do_wait_for_fifo() argument
109 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_wait_for_fifo()
122 static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv) in r128_do_wait_for_idle() argument
126 ret = r128_do_wait_for_fifo(dev_priv, 64); in r128_do_wait_for_idle()
130 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_wait_for_idle()
132 r128_do_pixcache_flush(dev_priv); in r128_do_wait_for_idle()
[all …]
/Linux-v5.10/drivers/gpu/drm/mga/
Dmga_dma.c53 int mga_do_wait_for_idle(drm_mga_private_t *dev_priv) in mga_do_wait_for_idle() argument
59 for (i = 0; i < dev_priv->usec_timeout; i++) { in mga_do_wait_for_idle()
75 static int mga_do_dma_reset(drm_mga_private_t *dev_priv) in mga_do_dma_reset() argument
77 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_do_dma_reset()
78 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_reset()
103 void mga_do_dma_flush(drm_mga_private_t *dev_priv) in mga_do_dma_flush() argument
105 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_flush()
113 for (i = 0; i < dev_priv->usec_timeout; i++) { in mga_do_dma_flush()
125 tail = primary->tail + dev_priv->primary->offset; in mga_do_dma_flush()
148 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); in mga_do_dma_flush()
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/Linux-v5.10/drivers/gpu/drm/gma500/
Dpsb_drv.c109 struct drm_psb_private *dev_priv = dev->dev_private; in psb_do_init() local
110 struct psb_gtt *pg = &dev_priv->gtt; in psb_do_init()
123 dev_priv->gatt_free_offset = pg->mmu_gatt_start + in psb_do_init()
126 spin_lock_init(&dev_priv->irqmask_lock); in psb_do_init()
127 spin_lock_init(&dev_priv->lock_2d); in psb_do_init()
138 psb_spank(dev_priv); in psb_do_init()
149 struct drm_psb_private *dev_priv = dev->dev_private; in psb_driver_unload() local
153 if (dev_priv) { in psb_driver_unload()
154 if (dev_priv->backlight_device) in psb_driver_unload()
158 if (dev_priv->ops->chip_teardown) in psb_driver_unload()
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