Home
last modified time | relevance | path

Searched refs:mt76_wr (Results 1 – 25 of 34) sorted by relevance

12

/Linux-v4.19/drivers/net/wireless/mediatek/mt76/
Dmt76x2u_mac.c57 mt76_wr(dev, 0x504, 0x06000000); in mt76x2u_mac_fixup_xtal()
58 mt76_wr(dev, 0x50c, 0x08800000); in mt76x2u_mac_fixup_xtal()
60 mt76_wr(dev, 0x504, 0x0); in mt76x2u_mac_fixup_xtal()
73 mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80); in mt76x2u_mac_fixup_xtal()
76 mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0); in mt76x2u_mac_fixup_xtal()
85 mt76_wr(dev, MT_WPDMA_GLO_CFG, BIT(4) | BIT(5)); in mt76x2u_mac_reset()
88 mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f); in mt76x2u_mac_reset()
89 mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf); in mt76x2u_mac_reset()
93 mt76_wr(dev, MT_TX_LINK_CFG, 0x1020); in mt76x2u_mac_reset()
94 mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13); in mt76x2u_mac_reset()
[all …]
Dmt76x2_phy_common.c63 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x35160a00); in mt76x2_phy_set_txpower_regs()
64 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x35160a06); in mt76x2_phy_set_txpower_regs()
67 mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0x0000ec00); in mt76x2_phy_set_txpower_regs()
68 mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0x0000ec00); in mt76x2_phy_set_txpower_regs()
70 mt76_wr(dev, MT_RF_PA_MODE_ADJ0, 0xf4000200); in mt76x2_phy_set_txpower_regs()
71 mt76_wr(dev, MT_RF_PA_MODE_ADJ1, 0xfa000200); in mt76x2_phy_set_txpower_regs()
78 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x2f0f0400); in mt76x2_phy_set_txpower_regs()
79 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x2f0f0476); in mt76x2_phy_set_txpower_regs()
81 mt76_wr(dev, MT_TX_ALC_CFG_2, 0x1b0f0400); in mt76x2_phy_set_txpower_regs()
82 mt76_wr(dev, MT_TX_ALC_CFG_3, 0x1b0f0476); in mt76x2_phy_set_txpower_regs()
[all …]
Dmt76x2_init.c36 mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f); in mt76x2_mac_pbf_init()
37 mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf); in mt76x2_mac_pbf_init()
70 mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80); in mt76x2_fixup_xtal()
73 mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0); in mt76x2_fixup_xtal()
94 mt76_wr(dev, MT_BCN_OFFSET(i), regs[i]); in mt76x2_init_beacon_offsets()
116 mt76_wr(dev, MT_WPDMA_GLO_CFG, val); in mt76x2_mac_reset()
132 mt76_wr(dev, MT_RF_BYPASS_0, 0x06000000); in mt76x2_mac_reset()
133 mt76_wr(dev, MT_RF_SETTING_0, 0x08800000); in mt76x2_mac_reset()
135 mt76_wr(dev, MT_RF_BYPASS_0, 0x00000000); in mt76x2_mac_reset()
137 mt76_wr(dev, MT_MCU_CLOCK_CTL, 0x1401); in mt76x2_mac_reset()
[all …]
Dmt76x2_dfs.c159 mt76_wr(dev, MT_BBP(DFS, 36), data); in mt76x2_dfs_set_capture_mode_ctrl()
223 mt76_wr(dev, MT_BBP(DFS, 1), 0xf); in mt76x2_dfs_detector_reset()
265 mt76_wr(dev, MT_BBP(DFS, 0), data); in mt76x2_dfs_get_hw_pulse()
678 mt76_wr(dev, MT_BBP(DFS, 1), 0xf); in mt76x2_dfs_tasklet()
752 mt76_wr(dev, MT_BBP(DFS, 2), data); in mt76x2_dfs_set_bbp_params()
755 mt76_wr(dev, MT_BBP(DFS, 3), data); in mt76x2_dfs_set_bbp_params()
759 mt76_wr(dev, MT_BBP(DFS, 0), i); in mt76x2_dfs_set_bbp_params()
764 mt76_wr(dev, MT_BBP(DFS, 4), data); in mt76x2_dfs_set_bbp_params()
769 mt76_wr(dev, MT_BBP(DFS, 5), data); in mt76x2_dfs_set_bbp_params()
772 mt76_wr(dev, MT_BBP(DFS, 7), radar_specs[i].t_low); in mt76x2_dfs_set_bbp_params()
[all …]
Dmt76x2_phy.c123 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x2_phy_set_antenna()
175 mt76_wr(dev, MT_BBP(AGC, 8), in mt76x2_phy_set_gain_val()
177 mt76_wr(dev, MT_BBP(AGC, 9), in mt76x2_phy_set_gain_val()
226 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560211); in mt76x2_phy_update_channel_gain()
232 mt76_wr(dev, MT_BBP(AGC, 26), val); in mt76x2_phy_update_channel_gain()
234 mt76_wr(dev, MT_BBP(RXO, 14), 0x00560423); in mt76x2_phy_update_channel_gain()
243 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990); in mt76x2_phy_update_channel_gain()
244 mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808); in mt76x2_phy_update_channel_gain()
245 mt76_wr(dev, MT_BBP(AGC, 37), 0x08080808); in mt76x2_phy_update_channel_gain()
249 mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991); in mt76x2_phy_update_channel_gain()
[all …]
Dmt76x2u_init.c34 mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val); in mt76x2u_init_dma()
45 mt76_wr(dev, MT_VEND_ADDR(CFG, 0x14), 0x484f); in mt76x2u_power_on_rf_patch()
161 mt76_wr(dev, MT_BCN_OFFSET(0), 0x18100800); in mt76x2u_init_beacon_offsets()
162 mt76_wr(dev, MT_BCN_OFFSET(1), 0x38302820); in mt76x2u_init_beacon_offsets()
163 mt76_wr(dev, MT_BCN_OFFSET(2), 0x58504840); in mt76x2u_init_beacon_offsets()
164 mt76_wr(dev, MT_BCN_OFFSET(3), 0x78706860); in mt76x2u_init_beacon_offsets()
203 mt76_wr(dev, MT_HEADER_TRANS_CTRL_REG, 0); in mt76x2u_init_hardware()
204 mt76_wr(dev, MT_TSO_CTRL, 0); in mt76x2u_init_hardware()
231 mt76_wr(dev, MT_SKEY_MODE_BASE_0 + 4 * i, 0); in mt76x2u_init_hardware()
233 mt76_wr(dev, MT_WCID_ATTR(i), 1); in mt76x2u_init_hardware()
[all …]
Dmt76x2u_mcu.c302 mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val); in mt76x2u_mcu_load_rom_patch()
309 mt76_wr(dev, MT_FCE_PSE_CTRL, 0x1); in mt76x2u_mcu_load_rom_patch()
311 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x2u_mcu_load_rom_patch()
313 mt76_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 0x1); in mt76x2u_mcu_load_rom_patch()
315 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); in mt76x2u_mcu_load_rom_patch()
317 mt76_wr(dev, MT_FCE_SKIP_FS, 0x3); in mt76x2u_mcu_load_rom_patch()
339 mt76_wr(dev, MT_MCU_SEMAPHORE_03, 1); in mt76x2u_mcu_load_rom_patch()
385 mt76_wr(dev, MT_VEND_ADDR(CFG, MT_USB_U3DMA_CFG), val); in mt76x2u_mcu_load_firmware()
387 mt76_wr(dev, MT_FCE_PSE_CTRL, 0x1); in mt76x2u_mcu_load_firmware()
389 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x2u_mcu_load_firmware()
[all …]
Dmt76x2_mcu.c144 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ROM_PATCH_OFFSET); in mt76pci_load_rom_patch()
150 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76pci_load_rom_patch()
153 mt76_wr(dev, MT_MCU_INT_LEVEL, 4); in mt76pci_load_rom_patch()
163 mt76_wr(dev, MT_MCU_SEMAPHORE_03, 1); in mt76pci_load_rom_patch()
204 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ILM_OFFSET); in mt76pci_load_firmware()
215 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_DLM_OFFSET); in mt76pci_load_firmware()
218 mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0); in mt76pci_load_firmware()
225 mt76_wr(dev, MT_MCU_INT_LEVEL, 2); in mt76pci_load_firmware()
420 mt76_wr(dev, MT_MCU_INT_LEVEL, 1); in mt76x2_mcu_cleanup()
Dmt76x2u_phy.c35 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x2u_phy_set_rxpath()
266 mt76_wr(dev, MT_BBP(AGC, 61), 0xff64a4e2); in mt76x2u_phy_set_channel()
267 mt76_wr(dev, MT_BBP(AGC, 7), 0x08081010); in mt76x2u_phy_set_channel()
268 mt76_wr(dev, MT_BBP(AGC, 11), 0x00000404); in mt76x2u_phy_set_channel()
269 mt76_wr(dev, MT_BBP(AGC, 2), 0x00007070); in mt76x2u_phy_set_channel()
270 mt76_wr(dev, MT_TXOP_CTRL_CFG, 0X04101b3f); in mt76x2u_phy_set_channel()
Dmt76x2_init_common.c67 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x2_set_wlan_state()
81 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x2_reset_wlan()
87 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x2_reset_wlan()
99 mt76_wr(dev, data->reg, data->value); in mt76x2_write_reg_pairs()
Dmt76x2_common.c251 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val); in mt76x2_conf_tx()
256 mt76_wr(dev, MT_WMM_TXOP(qid), val); in mt76x2_conf_tx()
261 mt76_wr(dev, MT_WMM_AIFSN, val); in mt76x2_conf_tx()
266 mt76_wr(dev, MT_WMM_CWMIN, val); in mt76x2_conf_tx()
271 mt76_wr(dev, MT_WMM_CWMAX, val); in mt76x2_conf_tx()
305 mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter); in mt76x2_configure_filter()
Dmt76x2u_main.c104 mt76_wr(dev, MT_MAC_BSSID_DW0, in mt76x2u_bss_info_changed()
106 mt76_wr(dev, MT_MAC_BSSID_DW1, in mt76x2u_bss_info_changed()
126 mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter); in mt76x2u_config()
Dmt76x2_core.c28 mt76_wr(dev, MT_INT_MASK_CSR, dev->irqmask); in mt76x2_set_irq_mask()
45 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt76x2_irq_handler()
Dmt76x2_mac_common.c26 mt76_wr(dev, MT_MAC_SYS_CTRL, 0); in mt76x2_mac_stop()
29 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg & ~MT_TX_RTS_CFG_RETRY_LIMIT); in mt76x2_mac_stop()
52 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg); in mt76x2_mac_stop()
272 mt76_wr(dev, MT_SKEY_MODE(vif_idx), val); in mt76x2_mac_shared_key_setup()
471 mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop)); in mt76x2_mac_wcid_set_drop()
483 mt76_wr(dev, MT_WCID_ATTR(idx), attr); in mt76x2_mac_wcid_setup()
485 mt76_wr(dev, MT_WCID_TX_RATE(idx), 0); in mt76x2_mac_wcid_setup()
486 mt76_wr(dev, MT_WCID_TX_RATE(idx) + 4, 0); in mt76x2_mac_wcid_setup()
Dmt76x2_mac.c26 mt76_wr(dev, MT_MAC_APC_BSSID_L(idx), get_unaligned_le32(addr)); in mt76x2_mac_set_bssid()
136 mt76_wr(dev, beacon_addr + i, 0); in __mt76x2_mac_set_beacon()
139 mt76_wr(dev, MT_BCN_BYPASS_MASK, 0xff00 | ~dev->beacon_data_mask); in __mt76x2_mac_set_beacon()
/Linux-v4.19/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinit.c42 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x0_set_wlan_state()
80 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x0_chip_onoff()
88 mt76_wr(dev, MT_WLAN_FUN_CTRL, val); in mt76x0_chip_onoff()
102 mt76_wr(dev, MT_PBF_SYS_CTRL, val); in mt76x0_reset_csr_bbp()
104 mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR | in mt76x0_reset_csr_bbp()
122 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0_init_usb_dma()
131 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0_init_usb_dma()
133 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0_init_usb_dma()
154 mt76_wr(dev, pair->reg, pair->value); in mt76x0_init_bbp()
176 mt76_wr(dev, MT_BCN_OFFSET(i), regs[i]); in mt76_init_beacon_offsets()
[all …]
Dphy.c49 mt76_wr(dev, MT_RF_CSR_CFG, in mt76x0_rf_csr_wr()
87 mt76_wr(dev, MT_RF_CSR_CFG, in mt76x0_rf_csr_rr()
322 mt76_wr(dev, MT_TX_ALC_VGA3, 0x00050007); in mt76x0_phy_set_band()
323 mt76_wr(dev, MT_TX0_RF_GAIN_CORR, 0x003E0002); in mt76x0_phy_set_band()
334 mt76_wr(dev, MT_TX_ALC_VGA3, 0x00000005); in mt76x0_phy_set_band()
335 mt76_wr(dev, MT_TX0_RF_GAIN_CORR, 0x01010102); in mt76x0_phy_set_band()
496 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
511 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
515 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
526 mt76_wr(dev, MT_TX0_RF_GAIN_ATTEN, 0x63707400); in mt76x0_phy_set_chan_rf_params()
[all …]
Dmcu.c448 mt76_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val); in __mt76x0_dma_fw()
535 mt76_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN | in mt76x0_load_firmware()
568 mt76_wr(dev, 0x1004, 0x2c); in mt76x0_load_firmware()
582 mt76_wr(dev, MT_FCE_PSE_CTRL, 1); in mt76x0_load_firmware()
585 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x0_load_firmware()
587 mt76_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1); in mt76x0_load_firmware()
589 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); in mt76x0_load_firmware()
591 mt76_wr(dev, MT_FCE_SKIP_FS, 3); in mt76x0_load_firmware()
595 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0_load_firmware()
597 mt76_wr(dev, MT_USB_DMA_CFG, val); in mt76x0_load_firmware()
[all …]
Dmain.c97 mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter); in mt76x0_config()
139 mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter); in mt76_configure_filter()
167 mt76_wr(dev, MT_LEGACY_BASIC_RATE, info->basic_rates); in mt76x0_bss_info_changed()
168 mt76_wr(dev, MT_HT_FBK_CFG0, 0x65432100); in mt76x0_bss_info_changed()
169 mt76_wr(dev, MT_HT_FBK_CFG1, 0xedcba980); in mt76x0_bss_info_changed()
170 mt76_wr(dev, MT_LG_FBK_CFG0, 0xedcba988); in mt76x0_bss_info_changed()
171 mt76_wr(dev, MT_LG_FBK_CFG1, 0x00002100); in mt76x0_bss_info_changed()
Dtx.c247 mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val); in mt76x0_conf_tx()
252 mt76_wr(dev, MT_WMM_TXOP(hw_q), val); in mt76x0_conf_tx()
257 mt76_wr(dev, MT_WMM_AIFSN, val); in mt76x0_conf_tx()
262 mt76_wr(dev, MT_WMM_CWMIN, val); in mt76x0_conf_tx()
267 mt76_wr(dev, MT_WMM_CWMAX, val); in mt76x0_conf_tx()
Dmac.c305 mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]); in mt76x0_mac_set_protection()
325 mt76_wr(dev, MT_BEACON_TIME_CFG, val); in mt76x0_mac_config_tsf()
411 mt76_wr(dev, MT_WCID_ATTR(idx), attr); in mt76x0_mac_wcid_setup()
440 mt76_wr(dev, MT_MAX_LEN_CFG, 0xa0fff | in mt76x0_mac_set_ampdu_factor()
631 mt76_wr(dev, MT_WCID_ATTR(idx), val); in mt76x0_mac_wcid_set_key()
655 mt76_wr(dev, MT_SKEY_MODE(vif_idx), val); in mt76x0_mac_shared_key_setup()
Deeprom.c62 mt76_wr(dev, MT_EFUSE_CTRL, val); in mt76x0_efuse_read()
172 mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr)); in mt76x0_set_macaddr()
173 mt76_wr(dev, MT_MAC_ADDR_DW1, get_unaligned_le16(dev->macaddr + 4) | in mt76x0_set_macaddr()
Dusb.c217 mt76_wr(dev, offset, get_unaligned_le32(addr)); in mt76x0_addr_wr()
218 mt76_wr(dev, offset + 4, addr[4] | addr[5] << 8); in mt76x0_addr_wr()
/Linux-v4.19/drivers/net/wireless/mediatek/mt7601u/
Dtx.c300 mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val); in mt7601u_conf_tx()
305 mt76_wr(dev, MT_WMM_TXOP(hw_q), val); in mt7601u_conf_tx()
310 mt76_wr(dev, MT_WMM_AIFSN, val); in mt7601u_conf_tx()
315 mt76_wr(dev, MT_WMM_CWMIN, val); in mt7601u_conf_tx()
320 mt76_wr(dev, MT_WMM_CWMAX, val); in mt7601u_conf_tx()
Dmac.c30 mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr)); in mt7601u_set_macaddr()
31 mt76_wr(dev, MT_MAC_ADDR_DW1, get_unaligned_le16(dev->macaddr + 4) | in mt7601u_set_macaddr()
371 mt76_wr(dev, MT_WCID_ATTR(idx), attr); in mt7601u_mac_wcid_setup()
598 mt76_wr(dev, MT_SKEY_MODE(vif_idx), val); in mt76_mac_shared_key_setup()

12