Lines Matching refs:mt76_wr

49 	mt76_wr(dev, MT_RF_CSR_CFG,  in mt76x0_rf_csr_wr()
87 mt76_wr(dev, MT_RF_CSR_CFG, in mt76x0_rf_csr_rr()
322 mt76_wr(dev, MT_TX_ALC_VGA3, 0x00050007); in mt76x0_phy_set_band()
323 mt76_wr(dev, MT_TX0_RF_GAIN_CORR, 0x003E0002); in mt76x0_phy_set_band()
334 mt76_wr(dev, MT_TX_ALC_VGA3, 0x00000005); in mt76x0_phy_set_band()
335 mt76_wr(dev, MT_TX0_RF_GAIN_CORR, 0x01010102); in mt76x0_phy_set_band()
496 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
511 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
515 mt76_wr(dev, MT_RF_MISC, mac_reg); in mt76x0_phy_set_chan_rf_params()
526 mt76_wr(dev, MT_TX0_RF_GAIN_ATTEN, 0x63707400); in mt76x0_phy_set_chan_rf_params()
530 mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg); in mt76x0_phy_set_chan_rf_params()
532 mt76_wr(dev, MT_TX0_RF_GAIN_ATTEN, 0x686A7800); in mt76x0_phy_set_chan_rf_params()
536 mt76_wr(dev, MT_TX_ALC_CFG_1, mac_reg); in mt76x0_phy_set_chan_rf_params()
570 mt76_wr(dev, pair->reg, val); in mt76x0_phy_set_chan_bbp_params()
572 mt76_wr(dev, pair->reg, pair->value); in mt76x0_phy_set_chan_bbp_params()
585 mt76_wr(dev, MT_TX_PWR_CFG_7, val);
589 mt76_wr(dev, MT_TX_PWR_CFG_8, val);
592 mt76_wr(dev, MT_TX_PWR_CFG_9, val);
608 mt76_wr(dev, MT_TX_PWR_CFG_0 + 4*i, val);
670 mt76_wr(dev, MT_TX_ALC_CFG_0, val); in mt76x0_phy_set_chan_pwr()
753 mt76_wr(dev, MT_BBP(CORE, 1), val); in __mt76x0_phy_set_channel()
793 mt76_wr(dev, MT_TX_ALC_CFG_0, 0); in mt76x0_phy_recalibrate_after_assoc()
798 mt76_wr(dev, 0x2124, reg_val); in mt76x0_phy_recalibrate_after_assoc()
809 mt76_wr(dev, 0x2124, reg_val); in mt76x0_phy_recalibrate_after_assoc()
810 mt76_wr(dev, MT_TX_ALC_CFG_0, tx_alc); in mt76x0_phy_recalibrate_after_assoc()
842 mt76_wr(dev, MT_BBP(CORE, 34), 0x00080055); in mt76x0_temp_sensor()
853 mt76_wr(dev, MT_BBP(CORE, 34), val); in mt76x0_temp_sensor()
884 mt76_wr(dev, MT_BBP(AGC,8), val); in mt76x0_dynamic_vga_tuning()
921 mt76_wr(dev, MT_BBP(AGC, 0), val); in mt76x0_set_rx_chains()