36 	mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f);  in mt76x2_mac_pbf_init()
37 	mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf);  in mt76x2_mac_pbf_init()
70 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80);  in mt76x2_fixup_xtal()
73 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0);  in mt76x2_fixup_xtal()
94 		mt76_wr(dev, MT_BCN_OFFSET(i), regs[i]);  in mt76x2_init_beacon_offsets()
116 	mt76_wr(dev, MT_WPDMA_GLO_CFG, val);  in mt76x2_mac_reset()
132 	mt76_wr(dev, MT_RF_BYPASS_0, 0x06000000);  in mt76x2_mac_reset()
133 	mt76_wr(dev, MT_RF_SETTING_0, 0x08800000);  in mt76x2_mac_reset()
135 	mt76_wr(dev, MT_RF_BYPASS_0, 0x00000000);  in mt76x2_mac_reset()
137 	mt76_wr(dev, MT_MCU_CLOCK_CTL, 0x1401);  in mt76x2_mac_reset()
140 	mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(macaddr));  in mt76x2_mac_reset()
141 	mt76_wr(dev, MT_MAC_ADDR_DW1, get_unaligned_le16(macaddr + 4));  in mt76x2_mac_reset()
143 	mt76_wr(dev, MT_MAC_BSSID_DW0, get_unaligned_le32(macaddr));  in mt76x2_mac_reset()
144 	mt76_wr(dev, MT_MAC_BSSID_DW1, get_unaligned_le16(macaddr + 4) |  in mt76x2_mac_reset()
153 	mt76_wr(dev, MT_INT_TIMER_EN, 0);  in mt76x2_mac_reset()
155 	mt76_wr(dev, MT_BCN_BYPASS_MASK, 0xffff);  in mt76x2_mac_reset()
160 		mt76_wr(dev, MT_WCID_DROP_BASE + i * 4, 0);  in mt76x2_mac_reset()
180 	mt76_wr(dev, MT_CH_TIME_CFG,  in mt76x2_mac_reset()
207 	mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);  in mt76x2_mac_start()
217 	mt76_wr(dev, MT_RX_FILTR_CFG, dev->rxfilter);  in mt76x2_mac_start()
219 	mt76_wr(dev, MT_MAC_SYS_CTRL,  in mt76x2_mac_start()
231 	mt76_wr(dev, MT_MAC_SYS_CTRL,  in mt76x2_mac_resume()
245 	mt76_wr(dev, 0x10014, 0x484f);  in mt76x2_power_on_rf_patch()
367 	mt76_wr(dev, MT_WPDMA_GLO_CFG, val);  in mt76x2_init_hardware()
492 	mt76_wr(dev, MT_LED_S0(mt76->led_pin), val);  in mt76x2_led_set_config()
493 	mt76_wr(dev, MT_LED_S1(mt76->led_pin), val);  in mt76x2_led_set_config()
499 	mt76_wr(dev, MT_LED_CTRL, val);  in mt76x2_led_set_config()