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/Linux-v5.10/drivers/gpu/drm/radeon/
Dradeon_audio.c108 (0x5e00 - 0x5e00),
109 (0x5e18 - 0x5e00),
110 (0x5e30 - 0x5e00),
111 (0x5e48 - 0x5e00),
112 (0x5e60 - 0x5e00),
113 (0x5e78 - 0x5e00),
114 (0x5e90 - 0x5e00),
250 struct radeon_encoder_atom_dig *dig; in radeon_audio_enable() local
256 if (rdev->mode_info.mode_config_initialized) { in radeon_audio_enable()
257 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { in radeon_audio_enable()
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Ddce6_afmt.c38 spin_lock_irqsave(&rdev->end_idx_lock, flags); in dce6_endpoint_rreg()
41 spin_unlock_irqrestore(&rdev->end_idx_lock, flags); in dce6_endpoint_rreg()
51 spin_lock_irqsave(&rdev->end_idx_lock, flags); in dce6_endpoint_wreg()
58 spin_unlock_irqrestore(&rdev->end_idx_lock, flags); in dce6_endpoint_wreg()
66 for (i = 0; i < rdev->audio.num_pins; i++) { in dce6_afmt_get_connected_pins()
67 offset = rdev->audio.pin[i].offset; in dce6_afmt_get_connected_pins()
71 rdev->audio.pin[i].connected = false; in dce6_afmt_get_connected_pins()
73 rdev->audio.pin[i].connected = true; in dce6_afmt_get_connected_pins()
81 struct radeon_encoder_atom_dig *dig; in dce6_audio_get_pin() local
87 for (i = 0; i < rdev->audio.num_pins; i++) { in dce6_audio_get_pin()
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Devergreen_hdmi.c70 struct drm_device *dev = encoder->dev; in evergreen_hdmi_update_acr()
71 struct radeon_device *rdev = dev->dev_private; in evergreen_hdmi_update_acr()
74 if (encoder->crtc) { in evergreen_hdmi_update_acr()
75 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr()
76 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
88 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
90 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
91 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
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Datombios_crtc.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
42 struct drm_device *dev = crtc->dev; in atombios_overscan_setup()
43 struct radeon_device *rdev = dev->dev_private; in atombios_overscan_setup()
51 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
53 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
55 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
56 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
57 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
58 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
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Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
422 UCHAR ucPostDiv; //return post div to be written to register
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
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/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
19 power-domains:
24 description: clock-specifier to represent input to the WIZ
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/Linux-v5.10/drivers/phy/ti/
Dphy-j721e-wiz.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
9 #include <dt-bindings/phy/phy.h>
11 #include <linux/clk-provider.h>
22 #include <linux/reset-controller.h>
144 .node_name = "pll0-refclk",
148 .node_name = "pll1-refclk",
152 .node_name = "refclk-dig",
163 .node_name = "pll0-refclk",
167 .node_name = "pll1-refclk",
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/Linux-v5.10/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/mux/ti-serdes.h>
13 compatible = "mmio-sram";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 atf-sram@0 {
24 scm_conf: scm-conf@100000 {
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/Linux-v5.10/drivers/clk/sunxi-ng/
Dccu-sun50i-a64.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun50i-a64.h"
35 .hw.init = CLK_HW_INIT("pll-cpux",
47 * With sigma-delta modulation for fractional-N on the audio PLL,
61 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
71 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video0_clk, "pll-video0",
85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
97 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
115 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M",
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Dccu-sun8i-a33.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
23 #include "ccu-sun8i-a23-a33.h"
36 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
47 * With sigma-delta modulation for fractional-N on the audio PLL,
61 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
71 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
83 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
95 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
104 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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Dccu-sun8i-v3s.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on ccu-sun8i-h3.c, which is:
9 #include <linux/clk-provider.h>
26 #include "ccu-sun8i-v3s.h"
28 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpu_clk, "pll-cpu",
48 static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
56 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
68 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
80 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
89 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph0_clk, "pll-periph0",
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Dccu-sun8i-a23.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun8i-a23-a33.h"
38 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",
49 * With sigma-delta modulation for fractional-N on the audio PLL,
63 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
73 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",
85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
97 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",
106 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",
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Dccu-sun8i-h3.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
24 #include "ccu-sun8i-h3.h"
26 static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpux_clk, "pll-cpux",
41 * With sigma-delta modulation for fractional-N on the audio PLL,
55 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
65 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX(pll_video_clk, "pll-video",
79 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
91 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",
100 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph0_clk, "pll-periph0",
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/Linux-v5.10/drivers/gpu/drm/amd/include/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
452 UCHAR ucPostDiv; //return post div to be written to register
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Datomfirmware.h6 * Description header file of general definitions for OS nd pre-OS video drivers
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
238 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
595 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
596 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
644 eDP_TO_LVDS_RX_DISABLE = 0x00, // no eDP->LVDS translator chip
645 …eDP_TO_LVDS_COMMON_ID = 0x01, // common eDP->LVDS translator chip without A…
671 /* gpio_id pre-define id for multiple usage */
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/Linux-v5.10/drivers/net/wireless/broadcom/b43/
Dphy_lp.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Definitions for the LP-PHY */
685 #define B2063_LOGEN_DIV1 B43_LP_RADIO(0x0A7) /* LOGEN DIV 1 */
686 #define B2063_LOGEN_DIV2 B43_LP_RADIO(0x0A8) /* LOGEN DIV 2 */
687 #define B2063_LOGEN_DIV3 B43_LP_RADIO(0x0A9) /* LOGEN DIV 3 */
887 /* Used for "Save/Restore Dig Filt State" */
/Linux-v5.10/net/packet/
Daf_packet.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * PACKET - implements raw packet sockets.
22 * Alan Cox : Re-commented the code.
30 * Alan Cox : New buffers. Use sk->mac.raw.
96 - If the device has no dev->header_ops->create, there is no LL header
103 needed_headroom to be (the real WiFi header length - the fake Ethernet
105 - packet socket receives packets with pulled ll header,
109 -----------
112 mac_header -> ll header
113 data -> data
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/Linux-v5.10/drivers/media/tuners/
Dmxl5005s.c201 * MaxLinear source code - Common_MXL.h (?)
254 u8 CAPSELECT; /* 0: disable On-Chip pulling cap; 1: enable */
258 /* 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable */
262 /* 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H */
325 /* ----------------------------------------------------------------
334 * Revision: 080314 - original version
339 struct mxl5005s_state *state = fe->tuner_priv; in mxl5005s_SetRfFreqHz()
354 ByteTable[0] |= state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
371 state->config->AgcMasterByte; in mxl5005s_SetRfFreqHz()
387 state->config->AgcMasterByte ; in mxl5005s_SetRfFreqHz()
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/Linux-v5.10/drivers/scsi/
Dncr53c8xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
8 **-----------------------------------------------------------------------------
22 ** Stefan Esser <se@mi.Uni-Koeln.de>
27 **-----------------------------------------------------------------------------
38 ** Support for Fast-20 scsi.
42 ** Support for Fast-40 scsi.
43 ** Support for on-Board RAM.
46 ** Full support for scsi scripts instructions pre-fetching.
57 ** Low PCI traffic for command handling when on-chip RAM is present.
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