Lines Matching +full:- +full:dig +full:- +full:div
6 * Description header file of general definitions for OS nd pre-OS video drivers
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
238 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
595 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
596 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
644 eDP_TO_LVDS_RX_DISABLE = 0x00, // no eDP->LVDS translator chip
645 …eDP_TO_LVDS_COMMON_ID = 0x01, // common eDP->LVDS translator chip without A…
671 /* gpio_id pre-define id for multiple usage */
682 …/* ucGPIO=DRAM_SELF_REFRESH_GPIO_PIND uses for memory self refresh (ucGPIO=0, DRAM self-refresh; …
684 /* Thermal interrupt output->system thermal chip GPIO pin */
692 … included in the structure is calcualted by using the (whole structure size - the header size)/siz…
759 ATOM_ENCODER_CAP_RECORD_USB_C_TYPE =0x100, // the DP connector is a USB-C type.
770 …ATOM_CONNECTOR_CAP_INTERNAL_DISPLAY = 0x01, //a cap bit to indicate that this non-e…
784 uint8_t gpio_pinstate; // Pin state showing how to set-up the pin
903 … in the structure is calculated by using the (whole structure size - the header size- number_of_pa…
1010 …uint32_t max_mclk_chg_lat; // Worst case blackout duration for a memory clock frequency (p-state)…
1069 EXT_DISPLAY_PATH_CAPS__HDMI20_PARADE_PS175 = (0x03 << 2) //Parade DP->HDMI recoverter chip
1341 //memorytype DMI Type 17 offset 12h - Memory Type
1362 Ddr2FbdimmMemType, ///< Assign 20 to DDR2 FB-DIMM
1954 // Mvdd Svi2 Div Ratio Setting
2125 // Mvdd Svi2 Div Ratio Setting
2134 uint8_t LedPin3; // GPIO number for LedPin[3] - PCIE GEN Speed
2135 uint8_t LedPin4; // GPIO number for LedPin[4] - PMFW Error Status
2173 …uint8_t FchUsbPdSlaveAddr; //For requesting USB PD controller S-states via FCH I2C when enter…
2204 …uint32_t MvddRatio; // This is used for MVDD Svi2 Div Ratio workaround. It has 16 fractional …
2749 …VOLTAGE_OBJ_GPIO_LUT = 0, //VOLTAGE and GPIO Lookup table ->atom_gpio_voltage…
2750 …VOLTAGE_OBJ_VR_I2C_INIT_SEQ = 3, //VOLTAGE REGULATOR INIT sequece through I2C -> ato…
2751 …VOLTAGE_OBJ_PHASE_LUT = 4, //Set Vregulator Phase lookup table ->atom_gpio_vol…
2752 …VOLTAGE_OBJ_SVID2 = 7, //Indicate voltage control by SVID2 ->atom_svid2_vo…
2764 uint8_t i2c_flag; // Bit0: 0 - One byte data; 1 - Two byte data
3226 …PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS = 0x00, //00 - DCCG_DEEP_COLOR_DTO_DISABLE: Disab…
3227 …PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4 = 0x01, //01 - DCCG_DEEP_COLOR_DTO_5_4_RATIO: Set…
3228 …PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2 = 0x02, //02 - DCCG_DEEP_COLOR_DTO_3_2_RATIO: Set…
3229 …PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1 = 0x03, //03 - DCCG_DEEP_COLOR_DTO_2_1_RATIO: Set…
3270 …DCE_CLOCK_FLAG_PCLK_DEEPCOLOR_RATIO_DIS = 0x00, //00 - DCCG_DEEP_COLOR_DTO_DISABLE: Disab…
3271 …DCE_CLOCK_FLAG_PCLK_DEEPCOLOR_RATIO_5_4 = 0x01, //01 - DCCG_DEEP_COLOR_DTO_5_4_RATIO: Set…
3272 …DCE_CLOCK_FLAG_PCLK_DEEPCOLOR_RATIO_3_2 = 0x02, //02 - DCCG_DEEP_COLOR_DTO_3_2_RATIO: Set…
3273 …DCE_CLOCK_FLAG_PCLK_DEEPCOLOR_RATIO_2_1 = 0x03, //03 - DCCG_DEEP_COLOR_DTO_2_1_RATIO: Set…
3479 uint8_t digfe_sel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable,
3519 …uint8_t dplaneset; // DP voltage swing and pre-emphasis value defined in DPCD DP_LANE_SET, "D…
3524 uint8_t digfe_sel; // DIG stream( front-end ) selection, bit0 means DIG0 FE is enable,