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/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dreadme_xtensa.txt418 low and medium priority interrupts that can be
551 The handlers provided for low and medium priority interrupts are just
558 The high priority interrupt handlers provided may be considered templates
563 This FreeRTOS port supports strict priority-based nesting of interrupts.
564 An interrupt may only nest on top of one of strictly lower priority.
565 Equal priority interrupts concurrently pending are handled in an
566 application-defined sequence before any lower priority interrupts
568 interrupt level (PS.INTLEVEL) is used to control the interrupt priority
573 bounds on interrupt latency (for a given priority) and stack depth.
575 Software prioritization of interrupts at the same priority is controlled
[all …]
/Kernel-v11.1.0/portable/RVDS/ARM7_LPC21xx/
DportASM.s111 LDR R0, =vTaskSwitchContext ; Find the highest priority task that
123 ; priority task that is ready to run.
/Kernel-v11.1.0/portable/GCC/ARM_CR5/
Dport.c62 …E_INTERRUPT_PRIORITIES as the lower the numeric priority value the higher the logical interrupt pr…
68 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/CCS/ARM_Cortex-R4/
Dportmacro.h101 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/template/
Dportmacro.h57 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/CCS/ARM_CM3/
Dportmacro.h126 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/CCS/ARM_CM4F/
Dportmacro.h120 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/IAR/AVR32_UC3/
Dexception.s82325 // Values to store in the interrupt priority registers for the various interrupt priority levels.
326 // The interrupt priority registers contain the interrupt priority level and
/Kernel-v11.1.0/portable/IAR/ARM_CM4F/
Dportmacro.h128 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/IAR/ARM_CM7/r0p1/
Dportmacro.h128 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/IAR/ARM_CM3/
Dportmacro.h129 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/MPLAB/PIC32MX/
Dportmacro.h155 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/MikroC/ARM_CM4F/
Dportmacro.h163 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/MSVC-MingW/
Dportmacro.h139 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/GCC/ARM_CM7/r0p1/
Dportmacro.h159 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/RVDS/ARM_CM4F/
Dportmacro.h147 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/RVDS/ARM_CM3/
Dportmacro.h147 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/GCC/ARM_CM3/
Dportmacro.h159 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/GCC/ARM_CM4F/
Dportmacro.h162 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/MPLAB/PIC32MEC14xx/
Dportmacro.h204 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/MPLAB/PIC32MZ/
Dportmacro.h166 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/IAR/ARM_CRx_No_GIC/
Dport.c39 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/RVDS/ARM_CM7/r0p1/
Dportmacro.h147 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
/Kernel-v11.1.0/portable/IAR/ARM_CA9/
DportASM.h97 ; Ensure the priority mask is correct for the critical nesting depth
/Kernel-v11.1.0/portable/GCC/MicroBlazeV8/
Dportmacro.h142 …m requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.

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