1 /*
2 * FreeRTOS Kernel V11.1.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 *
5 * SPDX-License-Identifier: MIT
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
26 *
27 */
28
29
30 #ifndef PORTMACRO_H
31 #define PORTMACRO_H
32
33 /* *INDENT-OFF* */
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 /* *INDENT-ON* */
38
39 /*-----------------------------------------------------------
40 * Port specific definitions.
41 *
42 * The settings in this file configure FreeRTOS correctly for the
43 * given hardware and compiler.
44 *
45 * These settings should not be altered.
46 *-----------------------------------------------------------
47 */
48
49 /* Type definitions. */
50 #define portCHAR char
51 #define portFLOAT float
52 #define portDOUBLE double
53 #define portLONG long
54 #define portSHORT short
55 #define portSTACK_TYPE uint32_t
56 #define portBASE_TYPE long
57
58 typedef portSTACK_TYPE StackType_t;
59 typedef long BaseType_t;
60 typedef unsigned long UBaseType_t;
61
62 #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
63 typedef uint16_t TickType_t;
64 #define portMAX_DELAY ( TickType_t ) 0xffff
65 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
66 typedef uint32_t TickType_t;
67 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
68
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
70 * not need to be guarded with a critical section. */
71 #define portTICK_TYPE_IS_ATOMIC 1
72 #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_64_BITS )
73 typedef uint64_t TickType_t;
74 #define portMAX_DELAY ( TickType_t ) 0xffffffffffffffffULL
75 #else /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
76 #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
77 #endif /* if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS ) */
78 /*-----------------------------------------------------------*/
79
80 /* Architecture specifics. */
81 #define portSTACK_GROWTH ( -1 )
82 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
83 #define portBYTE_ALIGNMENT 8
84 #define portDONT_DISCARD __attribute__( ( used ) )
85 /*-----------------------------------------------------------*/
86
87 /* Scheduler utilities. */
88 #define portYIELD() \
89 { \
90 /* Set a PendSV to request a context switch. */ \
91 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
92 \
93 /* Barriers are normally not required but do ensure the code is completely \
94 * within the specified behaviour for the architecture. */ \
95 __asm volatile ( "dsb" ::: "memory" ); \
96 __asm volatile ( "isb" ); \
97 }
98
99 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
100 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
101 #define portEND_SWITCHING_ISR( xSwitchRequired ) \
102 do \
103 { \
104 if( xSwitchRequired != pdFALSE ) \
105 { \
106 traceISR_EXIT_TO_SCHEDULER(); \
107 portYIELD(); \
108 } \
109 else \
110 { \
111 traceISR_EXIT(); \
112 } \
113 } while( 0 )
114 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
115 /*-----------------------------------------------------------*/
116
117 /* Critical section management. */
118 extern void vPortEnterCritical( void );
119 extern void vPortExitCritical( void );
120 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
121 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
122 #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
123 #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
124 #define portENTER_CRITICAL() vPortEnterCritical()
125 #define portEXIT_CRITICAL() vPortExitCritical()
126
127 /*-----------------------------------------------------------*/
128
129 /* Task function macros as described on the FreeRTOS.org WEB site. These are
130 * not necessary for to use this port. They are defined so the common demo files
131 * (which build with all the ports) will build. */
132 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
133 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
134 /*-----------------------------------------------------------*/
135
136 /* Tickless idle/low power functionality. */
137 #ifndef portSUPPRESS_TICKS_AND_SLEEP
138 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
139 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
140 #endif
141 /*-----------------------------------------------------------*/
142
143 /* Architecture specific optimisations. */
144 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
145 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
146 #endif
147
148 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
149
150 /* Generic helper function. */
ucPortCountLeadingZeros(uint32_t ulBitmap)151 __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
152 {
153 uint8_t ucReturn;
154
155 __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
156
157 return ucReturn;
158 }
159
160 /* Check the configuration. */
161 #if ( configMAX_PRIORITIES > 32 )
162 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
163 #endif
164
165 /* Store/clear the ready priorities in a bit map. */
166 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
167 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
168
169 /*-----------------------------------------------------------*/
170
171 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
172
173 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
174
175 /*-----------------------------------------------------------*/
176
177 #ifdef configASSERT
178 void vPortValidateInterruptPriority( void );
179 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
180 #endif
181
182 /* portNOP() is not required by this port. */
183 #define portNOP()
184
185 #define portINLINE __inline
186
187 #ifndef portFORCE_INLINE
188 #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
189 #endif
190
xPortIsInsideInterrupt(void)191 portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
192 {
193 uint32_t ulCurrentInterrupt;
194 BaseType_t xReturn;
195
196 /* Obtain the number of the currently executing interrupt. */
197 __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
198
199 if( ulCurrentInterrupt == 0 )
200 {
201 xReturn = pdFALSE;
202 }
203 else
204 {
205 xReturn = pdTRUE;
206 }
207
208 return xReturn;
209 }
210
211 /*-----------------------------------------------------------*/
212
vPortRaiseBASEPRI(void)213 portFORCE_INLINE static void vPortRaiseBASEPRI( void )
214 {
215 uint32_t ulNewBASEPRI;
216
217 __asm volatile
218 (
219 " mov %0, %1 \n" \
220 " msr basepri, %0 \n" \
221 " isb \n" \
222 " dsb \n" \
223 : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
224 );
225 }
226
227 /*-----------------------------------------------------------*/
228
ulPortRaiseBASEPRI(void)229 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
230 {
231 uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
232
233 __asm volatile
234 (
235 " mrs %0, basepri \n" \
236 " mov %1, %2 \n" \
237 " msr basepri, %1 \n" \
238 " isb \n" \
239 " dsb \n" \
240 : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
241 );
242
243 /* This return will not be reached but is necessary to prevent compiler
244 * warnings. */
245 return ulOriginalBASEPRI;
246 }
247 /*-----------------------------------------------------------*/
248
vPortSetBASEPRI(uint32_t ulNewMaskValue)249 portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
250 {
251 __asm volatile
252 (
253 " msr basepri, %0 " ::"r" ( ulNewMaskValue ) : "memory"
254 );
255 }
256 /*-----------------------------------------------------------*/
257
258 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
259
260 /* *INDENT-OFF* */
261 #ifdef __cplusplus
262 }
263 #endif
264 /* *INDENT-ON* */
265
266 #endif /* PORTMACRO_H */
267
