| /Zephyr-latest/include/zephyr/ |
| D | irq_multilevel.h | 37 } bits; member
56 return irq.bits.l1; in _z_l1_irq()
61 return irq.bits.l2 - 1; in _z_l2_irq()
66 return irq.bits.l3 - 1; in _z_l3_irq()
71 if (z_irq.bits.l3 != 0) { in _z_irq_get_level()
75 if (z_irq.bits.l2 != 0) { in _z_irq_get_level()
142 .bits = { in irq_to_level_2()
216 .bits = { in irq_to_level_3()
354 if (z_irq.bits.l3 != 0) { in irq_increment()
355 z_irq.bits.l3 += val; in irq_increment()
[all …]
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| /Zephyr-latest/subsys/bluetooth/controller/util/ |
| D | util.c | 231 uint8_t bits; in util_saa_le32() local
270 bits = find_msb_set(CONFIG_BT_CTLR_ADV_ISO_SET * 0x03); in util_saa_le32()
271 saa &= ~BIT_MASK(bits); in util_saa_le32()
327 uint8_t shift, byteIdx, bits; in util_get_bits() local
334 bits = MIN(num_bits, 8 - bit_offs); in util_get_bits()
335 value |= ((data[byteIdx] >> bit_offs) & BIT_MASK(bits)) << shift; in util_get_bits()
336 shift += bits; in util_get_bits()
337 num_bits -= bits; in util_get_bits()
355 uint8_t byteIdx, bits; in util_set_bits() local
360 bits = MIN(num_bits, 8 - bit_offs); in util_set_bits()
[all …]
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| /Zephyr-latest/samples/drivers/lcd_hd44780/src/ |
| D | main.c | 193 void _pi_lcd_4bits_wr(const struct device *gpio_dev, uint8_t bits) in _pi_lcd_4bits_wr() argument
200 if ((bits & BIT(4)) == BIT(4)) { in _pi_lcd_4bits_wr()
203 if ((bits & BIT(5)) == BIT(5)) { in _pi_lcd_4bits_wr()
206 if ((bits & BIT(6)) == BIT(6)) { in _pi_lcd_4bits_wr()
209 if ((bits & BIT(7)) == BIT(7)) { in _pi_lcd_4bits_wr()
221 if ((bits & BIT(0)) == BIT(0)) { in _pi_lcd_4bits_wr()
224 if ((bits & BIT(1)) == BIT(1)) { in _pi_lcd_4bits_wr()
227 if ((bits & BIT(2)) == BIT(2)) { in _pi_lcd_4bits_wr()
230 if ((bits & BIT(3)) == BIT(3)) { in _pi_lcd_4bits_wr()
238 void _pi_lcd_8bits_wr(const struct device *gpio_dev, uint8_t bits) in _pi_lcd_8bits_wr() argument
[all …]
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| /Zephyr-latest/drivers/entropy/ |
| D | Kconfig.npcx | 21 The chosen security strength defines the amount of entropy bits
25 bool "DRBG security strength 112 bits"
28 bool "DRBG security strength 128 bits"
31 bool "DRBG security strength 192 bits"
34 bool "DRBG security strength 256 bits"
37 bool "DRBG security strength 12b bits test"
40 bool "DRBG security strength 256 bits test"
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| /Zephyr-latest/drivers/can/ |
| D | can_stm32_fdcan.c | 262 uint32_t bits; in can_stm32fd_read_reg() local
270 err = can_mcan_sys_read_reg(stm32fd_config->base, remap, &bits); in can_stm32fd_read_reg()
283 *val |= ((bits & GENMASK(23, 16)) << 6); in can_stm32fd_read_reg()
286 *val |= ((bits & GENMASK(15, 11)) << 3); in can_stm32fd_read_reg()
289 *val |= ((bits & GENMASK(10, 4)) << 2); in can_stm32fd_read_reg()
292 *val |= ((bits & GENMASK(3, 1)) << 1); in can_stm32fd_read_reg()
295 *val |= ((bits & GENMASK(0, 0)) << 0); in can_stm32fd_read_reg()
299 if ((bits & CAN_STM32FD_ILS_RXFIFO1) != 0U) { in can_stm32fd_read_reg()
303 if ((bits & CAN_STM32FD_ILS_RXFIFO0) != 0U) { in can_stm32fd_read_reg()
309 *val = bits & (CAN_MCAN_GFC_ANFS | CAN_MCAN_GFC_ANFE | in can_stm32fd_read_reg()
[all …]
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| /Zephyr-latest/arch/arc/core/mpu/ |
| D | arc_mpu_v2_internal.h | 57 uint8_t bits = find_msb_set(size) - 1; in _region_init() local
59 if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) { in _region_init()
60 bits = ARC_FEATURE_MPU_ALIGNMENT_BITS; in _region_init()
63 if (BIT(bits) < size) { in _region_init()
64 bits++; in _region_init()
68 region_attr |= AUX_MPU_RDP_REGION_SIZE(bits); in _region_init()
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| D | arc_mpu_v6_internal.h | 83 uint8_t bits = find_msb_set(size) - 1; in _region_init() local
85 if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) { in _region_init()
86 bits = ARC_FEATURE_MPU_ALIGNMENT_BITS; in _region_init()
89 if (BIT(bits) < size) { in _region_init()
90 bits++; in _region_init()
101 region_attr |= AUX_MPU_RDP_REGION_SIZE(bits) | AUX_MPU_RDB_NV; in _region_init()
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| /Zephyr-latest/drivers/i2c/ |
| D | i2c_dw.c | 217 rx_buffer_depth = ic_comp_param_1.bits.rx_buffer_depth + 1; in i2c_dw_data_ask()
218 tx_buffer_depth = ic_comp_param_1.bits.tx_buffer_depth + 1; in i2c_dw_data_ask()
408 if (intr_stat.bits.rx_full) { in i2c_dw_isr()
422 if (intr_stat.bits.tx_empty) { in i2c_dw_isr()
439 if (intr_stat.bits.stop_det) { in i2c_dw_isr()
452 if (intr_stat.bits.rx_full) { in i2c_dw_isr()
468 if (intr_stat.bits.rd_req) { in i2c_dw_isr()
516 ic_con.bits.master_mode = 1U; in i2c_dw_setup()
517 ic_con.bits.slave_disable = 1U; in i2c_dw_setup()
522 ic_con.bits.restart_en = 1U; in i2c_dw_setup()
[all …]
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| /Zephyr-latest/drivers/power_domain/ |
| D | power_domain_intel_adsp.c | 26 static int pd_intel_adsp_set_power_enable(struct pg_bits *bits, bool power_enable) in pd_intel_adsp_set_power_enable() argument
28 uint16_t SPA_bit_mask = BIT(bits->SPA_bit); in pd_intel_adsp_set_power_enable()
34 if (!WAIT_FOR(sys_read16((mem_addr_t)ACE_PWRSTS) & BIT(bits->CPA_bit), in pd_intel_adsp_set_power_enable()
42 if (bits->SPA_bit == INTEL_ADSP_HST_DOMAIN_BIT) { in pd_intel_adsp_set_power_enable()
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_sam0_eic.c | 54 uint16_t bits = EIC->INTFLAG.reg; in sam0_eic_isr() local
58 EIC->INTFLAG.reg = bits; in sam0_eic_isr()
62 line_index = __CLZ(__RBIT(bits)); in sam0_eic_isr()
63 bits >>= line_index; in sam0_eic_isr()
65 if (bits & 0xFF) { in sam0_eic_isr()
69 bits >>= 8; in sam0_eic_isr()
77 for (; bits; bits >>= 1, line_index++) { in sam0_eic_isr()
78 if (!(bits & 1)) { in sam0_eic_isr()
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| D | intc_intel_vtd.c | 355 irte.bits.vector = vector; in vtd_ictl_remap()
359 irte.bits.dst_id = x86_read_loapic(LOAPIC_LDR); in vtd_ictl_remap()
362 irte.bits.dst_id = 0xFF << 8; in vtd_ictl_remap()
367 irte.bits.src_validation_type = 1; in vtd_ictl_remap()
368 irte.bits.src_id = src_id; in vtd_ictl_remap()
377 irte.bits.trigger_mode = (flags & IOAPIC_TRIGGER_MASK) >> 15; in vtd_ictl_remap()
378 irte.bits.delivery_mode = delivery_mode >> 8; in vtd_ictl_remap()
379 irte.bits.redirection_hint = 1; in vtd_ictl_remap()
380 irte.bits.dst_mode = 1; /* Always logical */ in vtd_ictl_remap()
381 irte.bits.present = 1; in vtd_ictl_remap()
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| D | Kconfig.multilevel | 23 int "Total number of first level interrupt bits"
27 The number of bits to use of the 32 bit interrupt mask for first
64 int "Total number of second level interrupt bits"
68 The number of bits to use of the 32 bit interrupt mask for second
118 int "Total number of third level interrupt bits"
122 The number of bits to use of the 32 bit interrupt mask for third
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| /Zephyr-latest/drivers/spi/ |
| D | spi_bitbang.c | 20 int bits; member
45 const int bits = SPI_WORD_SIZE_GET(config->operation); in spi_bitbang_configure() local
47 if (bits > 16) { in spi_bitbang_configure()
52 data->bits = bits; in spi_bitbang_configure()
53 data->dfs = ((data->bits - 1) / 8) + 1; in spi_bitbang_configure()
172 while (i < data->bits) { in spi_bitbang_transceive()
173 const int shift = lsb ? i : (data->bits - 1 - i); in spi_bitbang_transceive()
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| /Zephyr-latest/tests/lib/acpi/unit/src/ |
| D | main.c | 219 .bits.bus = 0xab, in ZTEST()
220 .bits.device = 0xc, in ZTEST()
221 .bits.function = 0b101, in ZTEST()
232 dmar0.unit1.ds1.header.Bus = fake_path.bits.bus; in ZTEST()
233 dmar0.unit1.ds1.path0.Device = fake_path.bits.device; in ZTEST()
234 dmar0.unit1.ds1.path0.Function = fake_path.bits.function; in ZTEST()
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| /Zephyr-latest/subsys/usb/device_next/class/ |
| D | usbd_msc.c | 118 atomic_t bits; member
179 if (atomic_test_and_set_bit(&ctx->bits, MSC_BULK_OUT_QUEUED)) { in msc_queue_bulk_out_ep()
196 atomic_clear_bit(&ctx->bits, MSC_BULK_OUT_QUEUED); in msc_queue_bulk_out_ep()
227 atomic_clear_bit(&ctx->bits, MSC_BULK_IN_WEDGED); in msc_reset_handler()
228 atomic_clear_bit(&ctx->bits, MSC_BULK_OUT_WEDGED); in msc_reset_handler()
266 if (atomic_test_and_set_bit(&ctx->bits, MSC_BULK_IN_QUEUED)) { in msc_process_read()
306 atomic_clear_bit(&ctx->bits, MSC_BULK_IN_QUEUED); in msc_process_read()
494 atomic_set_bit(&ctx->bits, MSC_BULK_IN_WEDGED); in msc_handle_bulk_out()
495 atomic_set_bit(&ctx->bits, MSC_BULK_OUT_WEDGED); in msc_handle_bulk_out()
540 if (atomic_test_and_set_bit(&ctx->bits, MSC_BULK_IN_QUEUED)) { in msc_send_csw()
[all …]
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| /Zephyr-latest/doc/build/version/ |
| D | index.rst | 80 | APPVERSION | Numerical | ``VERSION_MAJOR`` (left shifted by 24 bits), |b…
81 | | | ``VERSION_MINOR`` (left shifted by 16 bits), |b…
82 | | | ``PATCHLEVEL`` (left shifted by 8 bits), |br| …
85 | APP_VERSION_NUMBER | Numerical | ``VERSION_MAJOR`` (left shifted by 16 bits), |b…
86 | | | ``VERSION_MINOR`` (left shifted by 8 bits), |br…
158 | APPVERSION | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 24 bits), |br|…
159 | | | ``VERSION_MINOR`` (left shifted by 16 bits), |br|…
160 | | | ``PATCHLEVEL`` (left shifted by 8 bits), |br| …
163 | APP_VERSION_NUMBER | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 16 bits), |br|…
164 | | | ``VERSION_MINOR`` (left shifted by 8 bits), |br| …
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| /Zephyr-latest/modules/hal_infineon/abstraction-rtos/source/COMPONENT_ZEPHYR/ |
| D | cyabs_rtos_zephyr.c | 524 cy_rslt_t cy_rtos_setbits_event(cy_event_t *event, uint32_t bits, bool in_isr) in cy_rtos_setbits_event() argument
534 k_event_post(event, bits); in cy_rtos_setbits_event()
540 cy_rslt_t cy_rtos_clearbits_event(cy_event_t *event, uint32_t bits, bool in_isr) in cy_rtos_clearbits_event() argument
555 k_event_set(event, (~bits & current_bits)); in cy_rtos_clearbits_event()
561 cy_rslt_t cy_rtos_getbits_event(cy_event_t *event, uint32_t *bits) in cy_rtos_getbits_event() argument
565 if ((event == NULL) || (bits == NULL)) { in cy_rtos_getbits_event()
571 *bits = event->events; in cy_rtos_getbits_event()
577 cy_rslt_t cy_rtos_waitbits_event(cy_event_t *event, uint32_t *bits, bool clear, bool all, in cy_rtos_waitbits_event() argument
582 if ((event == NULL) || (bits == NULL)) { in cy_rtos_waitbits_event()
585 uint32_t wait_for = *bits; in cy_rtos_waitbits_event()
[all …]
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_dwmac_stm32h7x.c | 37 .enr = DT_INST_CLOCKS_CELL_BY_NAME(0, stmmaceth, bits),
41 .enr = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_tx, bits),
45 .enr = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_rx, bits),
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| /Zephyr-latest/tests/net/lib/wifi_credentials_backend_psa/src/ |
| D | normalized_crypto.h | 16 uint16_t bits; member
37 void psa_set_key_bits(psa_key_attributes_t *attributes, size_t bits);
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| /Zephyr-latest/subsys/bluetooth/controller/ |
| D | Kconfig.df | 278 bool "Conversion of IQ samples to 8 bits wide by 4 bits shift"
282 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
284 8 bits by ordinary right shift operation by 4 bits. That means there is loss in accuracy
288 bool "Conversion of IQ samples to 8 bits wide by 2 bits shift"
292 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
294 8 bits by ordinary right shift operation by 2 bits and a cast to int8_t. That means there
299 bool "Conversion of IQ samples to 8 bits wide by use of 8 LSB"
303 Bluetooth 5.3 Core Specification defines IQ samples to be 8 bits wide: Vol 4, Part E
305 8 bits by use of 8 least significant bits. This conversion may be used only if you are
306 sure actual samples are not greater than 8 bits. This prevents additional accuracy loss
[all …]
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| /Zephyr-latest/subsys/net/lib/http/ |
| D | http_huffman.c | 289 static bool huffman_bits_compare(uint32_t bits, const struct decode_elem *entry) in huffman_bits_compare() argument
294 if (code == (bits & mask)) { in huffman_bits_compare()
301 static const struct decode_elem *huffman_decode_bits(uint32_t bits) in huffman_decode_bits() argument
304 if (huffman_bits_compare(bits, &decode_table[i])) { in huffman_decode_bits()
309 if (huffman_bits_compare(bits, &eos)) { in huffman_decode_bits()
337 uint32_t bits = 0; in http_hpack_huffman_decode() local
349 bits <<= bits_in_byte_left; in http_hpack_huffman_decode()
350 bits |= *encoded_buf & in http_hpack_huffman_decode()
356 bits <<= bits_needed; in http_hpack_huffman_decode()
357 bits |= (*encoded_buf >> in http_hpack_huffman_decode()
[all …]
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| /Zephyr-latest/tests/drivers/uart/uart_mix_fifo_poll/ |
| D | README.txt | 13 following: 4 MSB bits contains stream ID, 4 LSB bits are incremented.
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| /Zephyr-latest/subsys/testsuite/ztest/src/ |
| D | ztest_mock.c | 79 #define DEFINE_BITFIELD(name, bits) unsigned long(name)[DIV_ROUND_UP(bits, BITS_PER_LONG)] argument
82 const unsigned int bits) in sys_bitfield_find_first_clear() argument
84 const size_t words = DIV_ROUND_UP(bits, BITS_PER_LONG); in sys_bitfield_find_first_clear()
104 if (bit < bits) { in sys_bitfield_find_first_clear()
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| /Zephyr-latest/drivers/timer/ |
| D | ti_dmtimer.c | 39 #define TI_DM_TIMER_WRITE(data, reg, bits) \ argument
42 TI_DM_TIMER_MASK(reg ## _ ## bits), \
43 TI_DM_TIMER_SHIFT(reg ## _ ## bits))
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| /Zephyr-latest/boards/digilent/arty_a7/dts/ |
| D | arty_a7_arm_designstart.dtsi | 179 xlnx,num-ss-bits = <0x1>;
180 xlnx,num-transfer-bits = <0x8>;
191 xlnx,num-ss-bits = <0x1>;
192 xlnx,num-transfer-bits = <0x8>;
260 xlnx,num-ss-bits = <0x1>;
261 xlnx,num-transfer-bits = <0x8>;
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