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Searched refs:DMA2D_FGPFCCR_START (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_dma2d.c342 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
957 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1011 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1072 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1129 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1192 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1349 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1428 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1235 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1392 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1471 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1235 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1392 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1471 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_dma2d.c352 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
967 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1021 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1082 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1139 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1202 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1359 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1438 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1235 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1392 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1471 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma2d.c351 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
999 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1054 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1115 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1172 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1235 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1392 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1471 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_dma2d.c363 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_DeInit()
1029 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_EnableCLUT()
1084 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad()
1145 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTStartLoad_IT()
1202 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad()
1265 SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START); in HAL_DMA2D_CLUTLoad_IT()
1422 if ((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) == DMA2D_FGPFCCR_START) in HAL_DMA2D_CLUTLoading_Resume()
1501 layer_start = hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START; in HAL_DMA2D_PollForTransfer()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h877 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
888 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h981 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
992 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h1085 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1096 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma2d.h1072 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1083 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h1078 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); in LL_DMA2D_FGND_EnableCLUTLoad()
1089 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL); in LL_DMA2D_FGND_IsEnabledCLUTLoad()
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h6413 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f429xx.h6472 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f439xx.h6659 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f437xx.h6605 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h6747 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f745xx.h6504 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f756xx.h6747 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f746xx.h6559 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f765xx.h6964 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f777xx.h7246 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro
Dstm32f767xx.h7058 #define DMA2D_FGPFCCR_START DMA2D_FGPFCCR_START_Msk /*!< Start */ macro

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