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Searched refs:DBGMCU_APB3FZR_DBG_LPTIM1_STOP (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal.h423 #if defined(DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
424 …ne __HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB3FZR, DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
425 … __HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB3FZR, DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
Dstm32h5xx_ll_system.h304 #define LL_DBGMCU_APB3_GRP1_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP /*!< The counter clock o…
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal.h403 #if defined(DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
404 …ne __HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB3FZR, DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
405 … __HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB3FZR, DBGMCU_APB3FZR_DBG_LPTIM1_STOP)
Dstm32u5xx_ll_system.h308 #define LL_DBGMCU_APB3_GRP1_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP /*!< The counter clock o…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3508 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32h523xx.h4589 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32h562xx.h5020 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32h533xx.h4998 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32h573xx.h5649 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32h563xx.h5240 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h5674 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u535xx.h5274 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u575xx.h5677 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u585xx.h6126 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u595xx.h5928 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5a5xx.h6377 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5f7xx.h6224 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u599xx.h6216 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5g7xx.h6673 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5f9xx.h6344 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5a9xx.h6665 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro
Dstm32u5g9xx.h6793 #define DBGMCU_APB3FZR_DBG_LPTIM1_STOP DBGMCU_APB3FZR_DBG_LPTIM1_STOP_Msk macro