Searched refs:CLOCK_IP_DEV_ASSERT (Results 1 – 11 of 11) sorted by relevance
282 …CLOCK_IP_DEV_ASSERT(((uint32)(*(Config->Ircoscs))[Index].Name) < ((uint32)(*(Config->Ircoscs))[Ind… in Clock_Ip_CheckIrcoscClocks()283 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Ircoscs))[Index].Name] & CLOCK_IP_IRCOS… in Clock_Ip_CheckIrcoscClocks()287 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Ircoscs))[Config->IrcoscsCount - 1U].Na… in Clock_Ip_CheckIrcoscClocks()310 …CLOCK_IP_DEV_ASSERT(((uint32)(*(Config->Xoscs))[Index].Name) < ((uint32)(*(Config->Xoscs))[Index+1… in Clock_Ip_CheckXoscClocks()311 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Xoscs))[Index].Name] & CLOCK_IP_XOSC_OB… in Clock_Ip_CheckXoscClocks()315 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Xoscs))[Config->XoscsCount - 1U].Name] … in Clock_Ip_CheckXoscClocks()337 …CLOCK_IP_DEV_ASSERT(((uint32)(*(Config->Plls))[Index].Name) < ((uint32)(*(Config->Plls))[Index+1U]… in Clock_Ip_CheckPllClocks()338 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Plls))[Index].Name] & CLOCK_IP_PLL_OBJE… in Clock_Ip_CheckPllClocks()342 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[(*(Config->Plls))[Config->PllsCount - 1U].Name] & … in Clock_Ip_CheckPllClocks()364 …CLOCK_IP_DEV_ASSERT(((uint32)(*(Config->ExtClks))[Index].Name) < ((uint32)(*(Config->ExtClks))[Ind… in Clock_Ip_CheckExtSigClocks()[all …]
195 CLOCK_IP_DEV_ASSERT(Config->SelectorName != RESERVED_CLK); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()210 CLOCK_IP_DEV_ASSERT(Finput != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()211 CLOCK_IP_DEV_ASSERT(Fsafe != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()212 CLOCK_IP_DEV_ASSERT(Config->MaxAllowableIDDchange != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()213 CLOCK_IP_DEV_ASSERT(Config->StepDuration != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
347 CLOCK_IP_DEV_ASSERT(ReferenceClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()348 CLOCK_IP_DEV_ASSERT(BusClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()349 CLOCK_IP_DEV_ASSERT(MonitoredClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
241 …CLOCK_IP_DEV_ASSERT(!(Clock_Ip_apxPll[Instance].PllInstance->PLLODIV[DividerIndex] & PLL_PLLODIV_D… in Clock_Ip_SetPllPll0divDeDivOutput()
277 …CLOCK_IP_DEV_ASSERT(((uint32)Config->Ircoscs[Index].Name) < ((uint32)Config->Ircoscs[Index+1U].Nam… in Clock_Ip_CheckIrcoscClocks()278 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Ircoscs[Index].Name] & CLOCK_IP_IRCOSC_OBJ… in Clock_Ip_CheckIrcoscClocks()282 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Ircoscs[Config->IrcoscsCount - 1U].Name] &… in Clock_Ip_CheckIrcoscClocks()305 … CLOCK_IP_DEV_ASSERT(((uint32)Config->Xoscs[Index].Name) < ((uint32)Config->Xoscs[Index+1U].Name)); in Clock_Ip_CheckXoscClocks()306 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Xoscs[Index].Name] & CLOCK_IP_XOSC_OBJECT)… in Clock_Ip_CheckXoscClocks()310 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Xoscs[Config->XoscsCount - 1U].Name] & CLO… in Clock_Ip_CheckXoscClocks()332 … CLOCK_IP_DEV_ASSERT(((uint32)Config->Plls[Index].Name) < ((uint32)Config->Plls[Index+1U].Name)); in Clock_Ip_CheckPllClocks()333 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Plls[Index].Name] & CLOCK_IP_PLL_OBJECT) !… in Clock_Ip_CheckPllClocks()337 …CLOCK_IP_DEV_ASSERT((Clock_Ip_au8ClockNameTypes[Config->Plls[Config->PllsCount - 1U].Name] & CLOCK… in Clock_Ip_CheckPllClocks()356 …CLOCK_IP_DEV_ASSERT(((uint32)Config->ExtClks[Index].Name) < ((uint32)Config->ExtClks[Index+1U].Nam… in Clock_Ip_CheckExtSigClocks()[all …]
182 CLOCK_IP_DEV_ASSERT(Config->SelectorName != RESERVED_CLK); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()197 CLOCK_IP_DEV_ASSERT(Finput != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()198 CLOCK_IP_DEV_ASSERT(Fsafe != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()199 CLOCK_IP_DEV_ASSERT(Config->MaxAllowableIDDchange != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()200 CLOCK_IP_DEV_ASSERT(Config->StepDuration != 0U); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
204 CLOCK_IP_DEV_ASSERT(Rtu0CoreClk_ConfiguredFrequency != 0U); in Clock_Ip_SetRamWaitStates()207 CLOCK_IP_DEV_ASSERT(Rtu1CoreClk_ConfiguredFrequency != 0U); in Clock_Ip_SetRamWaitStates()210 CLOCK_IP_DEV_ASSERT(SmuM33CoreClk_ConfiguredFrequency != 0U); in Clock_Ip_SetRamWaitStates()213 CLOCK_IP_DEV_ASSERT(CeM33CoreClk_ConfiguredFrequency != 0U); in Clock_Ip_SetRamWaitStates()
344 CLOCK_IP_DEV_ASSERT(ReferenceClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()345 CLOCK_IP_DEV_ASSERT(BusClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()346 CLOCK_IP_DEV_ASSERT(MonitoredClk != 0U); in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
273 …CLOCK_IP_DEV_ASSERT(!(Clock_Ip_apxPll[Instance].PllInstance->PLLODIV[DividerIndex] & PLLDIG_PLLODI… in Clock_Ip_SetPlldigPll0divDeDivOutput()
227 #define CLOCK_IP_DEV_ASSERT(x) DevAssert(x) macro229 #define CLOCK_IP_DEV_ASSERT(x)232 #define CLOCK_IP_DEV_ASSERT(x)
