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Searched refs:GD32_RESET_TIMER13 (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32f3x0.h43 #define GD32_RESET_TIMER13 GD32_RESET_CONFIG(APB1RST, 8U) macro
Dgd32e10x.h55 #define GD32_RESET_TIMER13 GD32_RESET_CONFIG(APB1RST, 8U) macro
Dgd32f403.h56 #define GD32_RESET_TIMER13 GD32_RESET_CONFIG(APB1RST, 8U) macro
Dgd32e50x.h61 #define GD32_RESET_TIMER13 GD32_RESET_CONFIG(APB1RST, 8U) macro
Dgd32f4xx.h71 #define GD32_RESET_TIMER13 GD32_RESET_CONFIG(APB1RST, 8U) macro
/Zephyr-latest/dts/arm/gd/gd32e50x/
Dgd32e507xe.dtsi121 resets = <&rctl GD32_RESET_TIMER13>;
/Zephyr-latest/dts/arm/gd/gd32e10x/
Dgd32e10x.dtsi457 resets = <&rctl GD32_RESET_TIMER13>;
/Zephyr-latest/dts/arm/gd/gd32f403/
Dgd32f403.dtsi481 resets = <&rctl GD32_RESET_TIMER13>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi609 resets = <&rctl GD32_RESET_TIMER13>;