Searched refs:core (Results 101 – 125 of 877) sorted by relevance
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| /Zephyr-latest/tests/boards/altera_max10/sysid/ |
| D | README.txt | 2 Altera Nios-II System ID soft IP core.
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| /Zephyr-latest/arch/arm64/ |
| D | CMakeLists.txt | 5 add_subdirectory(core)
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| /Zephyr-latest/arch/sparc/ |
| D | CMakeLists.txt | 4 add_subdirectory(core)
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| /Zephyr-latest/arch/xtensa/core/ |
| D | xtensa_intgen.tmpl | 1 #include <xtensa/config/core-isa.h>
9 * available per-hardware by an SDK-provided core-isa.h file.
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| /Zephyr-latest/soc/espressif/common/include/ |
| D | hw_init.h | 19 void map_rom_segments(int core, struct rom_segments *map);
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| /Zephyr-latest/tests/boards/altera_max10/msgdma/ |
| D | README.txt | 2 Altera Nios-II Modular Scatter Gather DMA (MSGDMA) soft IP core.
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| /Zephyr-latest/samples/sysbuild/hello_world/ |
| D | README.rst | 11 SoCs with multiple cores as each core is exposed as a board target. Other
25 to boot a remote core.
57 Application core
64 Radio core
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| /Zephyr-latest/samples/bluetooth/bap_broadcast_sink/ |
| D | README.rst | 39 You can build both the application core image and an appropriate controller image for the network
40 core with:
48 If you prefer to only build the application core image, you can do so by doing instead:
55 In that case you can pair this application core image with the
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| /Zephyr-latest/samples/bluetooth/bap_broadcast_source/ |
| D | README.rst | 40 You can build both the application core image and an appropriate controller image for the network
41 core with:
49 If you prefer to only build the application core image, you can do so by doing instead:
56 In that case you can pair this application core image with the
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| /Zephyr-latest/samples/bluetooth/ccp_call_control_client/ |
| D | README.rst | 37 You can build both the application core image and an appropriate controller image for the network
38 core with:
46 If you prefer to only build the application core image, you can do so by doing instead:
53 In that case you can pair this application core image with the
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| /Zephyr-latest/samples/bluetooth/ccp_call_control_server/ |
| D | README.rst | 36 You can build both the application core image and an appropriate controller image for the network
37 core with:
45 If you prefer to only build the application core image, you can do so by doing instead:
52 In that case you can pair this application core image with the
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| /Zephyr-latest/scripts/west_commands/tests/ |
| D | test_imports.py | 5 from runners.core import ZephyrBinaryRunner
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| /Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/ |
| D | cy8ckit_062s2_ai.dts | 61 /* CM4 core clock = 100MHz
68 /* CM0+ core clock = 50MHz
75 /* PERI core clock = 100MHz
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| /Zephyr-latest/boards/infineon/cy8cproto_063_ble/ |
| D | cy8cproto_063_ble.dts | 103 /* CM4 core clock = 100MHz
110 /* CM0+ core clock = 50MHz
117 /* PERI core clock = 100MHz
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| /Zephyr-latest/doc/services/debugging/ |
| D | coredump.rst | 6 The core dump module enables dumping the CPU registers and memory content
18 Here are the options to enable output backends for core dump:
20 * ``DEBUG_COREDUMP_BACKEND_LOGGING``: use log module for core dump output.
21 * ``DEBUG_COREDUMP_BACKEND_FLASH_PARTITION``: use flash partition for core
23 * ``DEBUG_COREDUMP_BACKEND_NULL``: fallback core dump backend if other
46 When the core dump module is enabled, during a fatal error, CPU registers
48 are enabled. This core dump data can be fed into a custom-made GDB server as
54 1. Get the core dump log from the device depending on enabled backends.
58 2. Convert the core dump log into a binary format that can be parsed by
64 :zephyr_file:`scripts/coredump/coredump_gdbserver.py` with the core dump
[all …]
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| /Zephyr-latest/kernel/ |
| D | Kconfig.init | 42 bool "Run SoC per-core initialization hook"
44 Run an SoC initialization hook for every core
47 arch_kernel_init() for the primary core, and at the end of arch_secondary_cpu_init()
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| /Zephyr-latest/arch/arm/ |
| D | CMakeLists.txt | 9 add_subdirectory(core)
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| /Zephyr-latest/drivers/ethernet/ |
| D | Kconfig.litex | 5 bool "LiteX LiteEth Ethernet core driver"
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| /Zephyr-latest/boards/technexion/pico_pi/doc/ |
| D | index.rst | 6 The i.MX7D SoC is a Hybrid multi-core processor composed of Single Cortex A7
7 core and Single Cortex M4 core.
8 Zephyr was ported to run on the M4 core. In a later release, it will also
9 communicate with the A7 core (running Linux) via RPmsg.
30 - CPU i.MX7 Dual with a Single Cortex A7 (1 GHz) core and
31 Single Cortex M4 (200MHz) core
107 the A7 core. The A7 core is responsible to load the M4 binary application into
169 After powering up the platform stop the u-boot execution on the A7 core and
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| /Zephyr-latest/boards/intel/socfpga/agilex5_socdk/doc/ |
| D | index.rst | 21 multi-core ARM processors of Dual-core A55 and Dual-core A76
75 Zephyr applications running on the Cortex-A55/A76 core can be tested by
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| /Zephyr-latest/subsys/usb/device/class/hid/ |
| D | CMakeLists.txt | 13 core.c
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| /Zephyr-latest/scripts/pylib/build_helpers/ |
| D | domains.py | 14 import pykwalify.core
64 pykwalify.core.Core(source_data=data,
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| /Zephyr-latest/soc/nxp/imx/imx7d/ |
| D | Kconfig.defconfig | 1 # iMX7 core series
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| /Zephyr-latest/scripts/west_commands/fetchers/ |
| D | http.py | 9 from fetchers.core import ZephyrBlobFetcher
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| /Zephyr-latest/snippets/nordic-ppr/ |
| D | README.rst | 10 (Peripheral Processor) from another core.
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