| /Zephyr-latest/samples/tfm_integration/tfm_secure_partition/src/ |
| D | dummy_partition.c | 23 { .base = &secret_index, .len = sizeof(secret_index) }, in dp_secret_digest()
27 { .base = p_digest, .len = digest_size } in dp_secret_digest()
50 { .base = &secret_index, .len = sizeof(secret_index) }, in dp_secret_digest()
54 { .base = p_digest, .len = digest_size } in dp_secret_digest()
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| /Zephyr-latest/drivers/watchdog/ |
| D | wdt_intel_adsp.c | 59 uint32_t base; member
84 intel_adsp_wdt_reset_set(dev_config->base, i, dev_data->allow_reset); in intel_adsp_wdt_setup()
136 const uint32_t base = dev_data->core_wdt[cpu]; in intel_adsp_wdt_isr() local
138 if (dw_wdt_interrupt_status_register_get(base)) { in intel_adsp_wdt_isr()
143 dw_wdt_clear_interrupt(base); in intel_adsp_wdt_isr()
158 dev_data->core_wdt[i] = intel_adsp_wdt_pointer_get(dev_config->base, i); in intel_adsp_wdt_init()
190 intel_adsp_wdt_pause(dev_config->base, channel_id); in intel_adsp_watchdog_pause()
210 intel_adsp_wdt_resume(dev_config->base, channel_id); in intel_adsp_watchdog_resume()
231 .base = DT_REG_ADDR(DEV_NODE),
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| D | wdt_ite_it8xxx2.c | 26 struct wdt_it8xxx2_regs *base; member
44 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_install_timeout()
76 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_setup()
146 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_feed()
181 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_disable()
204 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_isr()
249 struct wdt_it8xxx2_regs *const inst = wdt_config->base; in wdt_it8xxx2_init()
277 .base = (struct wdt_it8xxx2_regs *)DT_INST_REG_ADDR(0),
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| /Zephyr-latest/drivers/serial/ |
| D | uart_mcux_lpuart.c | 49 LPUART_Type *base; member
155 uint32_t flags = LPUART_GetStatusFlags(config->base); in mcux_lpuart_poll_in()
159 *c = LPUART_ReadByte(config->base); in mcux_lpuart_poll_in()
174 while (!(LPUART_GetStatusFlags(config->base) in mcux_lpuart_poll_out()
190 LPUART_EnableInterrupts(config->base, in mcux_lpuart_poll_out()
196 LPUART_WriteByte(config->base, c); in mcux_lpuart_poll_out()
203 uint32_t flags = LPUART_GetStatusFlags(config->base); in mcux_lpuart_err_check()
222 LPUART_ClearStatusFlags(config->base, kLPUART_RxOverrunFlag | in mcux_lpuart_err_check()
239 (LPUART_GetStatusFlags(config->base) in mcux_lpuart_fifo_fill()
242 LPUART_WriteByte(config->base, tx_data[num_tx++]); in mcux_lpuart_fifo_fill()
[all …]
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| /Zephyr-latest/samples/subsys/fs/fs_sample/src/ |
| D | main.c | 75 int base = strlen(base_path); in create_some_entries() local
79 if (base >= (sizeof(path) - SOME_REQUIRED_LEN)) { in create_some_entries()
87 path[base++] = '/'; in create_some_entries()
88 path[base] = 0; in create_some_entries()
89 strcat(&path[base], SOME_FILE_NAME); in create_some_entries()
97 path[base] = 0; in create_some_entries()
98 strcat(&path[base], SOME_DIR_NAME); in create_some_entries()
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| /Zephyr-latest/drivers/spi/ |
| D | spi_mcux_flexcomm.c | 32 SPI_Type *base; member
81 SPI_Type *base = config->base; in spi_mcux_transfer_next_packet() local
133 status = SPI_MasterTransferNonBlocking(base, &data->handle, &transfer); in spi_mcux_transfer_next_packet()
143 SPI_Type *base = config->base; in spi_mcux_isr() local
145 SPI_MasterTransferHandleIRQ(base, &data->handle); in spi_mcux_isr()
148 static void spi_mcux_transfer_callback(SPI_Type *base, in spi_mcux_transfer_callback() argument
176 SPI_Type *base = config->base; in spi_mcux_configure() local
255 SPI_MasterInit(base, &master_config, clock_freq); in spi_mcux_configure()
257 SPI_SetDummyData(base, (uint8_t)config->def_char); in spi_mcux_configure()
259 SPI_MasterTransferCreateHandle(base, &data->handle, in spi_mcux_configure()
[all …]
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| D | spi_gecko_usart.c | 94 USART_TypeDef *base; member
122 mem_addr_t ctrl_reg = (mem_addr_t)&gecko_config->base->CTRL; in spi_config()
185 USART_BaudrateSyncSet(gecko_config->base, 0, spi_frequency); in spi_config()
189 gecko_config->base->CTRL |= USART_CTRL_LOOPBK; in spi_config()
191 gecko_config->base->CTRL &= ~USART_CTRL_LOOPBK; in spi_config()
196 gecko_config->base->CTRL |= USART_CTRL_CLKPOL; in spi_config()
198 gecko_config->base->CTRL &= ~USART_CTRL_CLKPOL; in spi_config()
203 gecko_config->base->CTRL |= USART_CTRL_CLKPHA; in spi_config()
205 gecko_config->base->CTRL &= ~USART_CTRL_CLKPHA; in spi_config()
209 gecko_config->base->FRAME = usartDatabits8 in spi_config()
[all …]
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| D | spi_psoc6.c | 33 CySCB_Type *base; member
104 if (Cy_SCB_SPI_WriteArray(config->base, xfer->txData, in spi_psoc6_transfer_next_packet()
114 if (Cy_SCB_SPI_Write(config->base, 0U) == 0U) { in spi_psoc6_transfer_next_packet()
136 Cy_SCB_ClearMasterInterrupt(config->base, in spi_psoc6_isr()
141 Cy_SCB_SPI_ReadArray(config->base, in spi_psoc6_isr()
145 Cy_SCB_ClearRxFifo(config->base); in spi_psoc6_isr()
157 Cy_SCB_SetMasterInterruptMask(config->base, 0U); in spi_psoc6_isr()
162 Cy_SCB_SetMasterInterruptMask(config->base, in spi_psoc6_isr()
276 while (!Cy_SCB_IsTxComplete(config->base)) { in spi_psoc6_transceive_sync_loop()
281 Cy_SCB_SPI_ReadArray(config->base, in spi_psoc6_transceive_sync_loop()
[all …]
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| D | spi_rv32m1_lpspi.c | 31 LPSPI_Type *base; member
51 LPSPI_Type *base = config->base; in spi_mcux_transfer_next_packet() local
106 status = LPSPI_MasterTransferNonBlocking(base, &data->handle, in spi_mcux_transfer_next_packet()
117 LPSPI_Type *base = config->base; in spi_mcux_isr() local
119 LPSPI_MasterTransferHandleIRQ(base, &data->handle); in spi_mcux_isr()
122 static void spi_mcux_master_transfer_callback(LPSPI_Type *base, in spi_mcux_master_transfer_callback() argument
139 LPSPI_Type *base = config->base; in spi_mcux_configure() local
199 LPSPI_MasterInit(base, &master_config, clock_freq); in spi_mcux_configure()
201 LPSPI_MasterTransferCreateHandle(base, &data->handle, in spi_mcux_configure()
205 LPSPI_SetDummyData(base, 0); in spi_mcux_configure()
[all …]
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| D | spi_mcux_lpspi.c | 40 #define LPSPI_IRQ_HANDLE_ARG COND_CODE_1(CONFIG_NXP_LP_FLEXCOMM, (LPSPI_GetInstance(base)), (base))
98 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_isr() local
103 static void spi_mcux_master_callback(LPSPI_Type *base, lpspi_master_handle_t *handle, in spi_mcux_master_callback() argument
117 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_transfer_next_packet() local
136 status = LPSPI_MasterTransferNonBlocking(base, &data->handle, &transfer); in spi_mcux_transfer_next_packet()
149 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_configure() local
189 LPSPI_Enable(base, false); in spi_mcux_configure()
190 while ((base->CR & LPSPI_CR_MEN_MASK) != 0U) { in spi_mcux_configure()
217 LPSPI_MasterInit(base, &master_config, clock_freq); in spi_mcux_configure()
218 LPSPI_SetDummyData(base, 0); in spi_mcux_configure()
[all …]
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| /Zephyr-latest/arch/x86/core/ia32/ |
| D | float.c | 134 if ((thread->base.user_options & K_SSE_REGS) != 0) { in FpCtxSave()
152 if ((thread->base.user_options & K_SSE_REGS) != 0) { in FpCtxInit()
182 thread->base.user_options |= (uint8_t)options; in z_float_enable()
225 if ((arch_current_thread()->base.user_options & _FP_USER_MASK) == 0) { in z_float_enable()
279 thread->base.user_options &= ~_FP_USER_MASK; in z_float_disable()
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| /Zephyr-latest/drivers/usb/udc/ |
| D | udc_numaker.c | 114 USBD_T *base; member
168 USBD_T *const base = config->base; in numaker_usbd_sw_connect() local
171 base->INTSTS = base->INTSTS; in numaker_usbd_sw_connect()
174 base->INTEN = USBD_INT_BUS | USBD_INT_USB | USBD_INT_FLDET | USBD_INT_WAKEUP | USBD_INT_SOF; in numaker_usbd_sw_connect()
177 base->SE0 &= ~USBD_DRVSE0; in numaker_usbd_sw_connect()
183 USBD_T *const base = config->base; in numaker_usbd_sw_disconnect() local
186 base->SE0 |= USBD_DRVSE0; in numaker_usbd_sw_disconnect()
201 USBD_T *const base = config->base; in numaker_usbd_reset_addr() local
203 base->FADDR = 0; in numaker_usbd_reset_addr()
211 USBD_T *const base = config->base; in numaker_usbd_set_addr() local
[all …]
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| /Zephyr-latest/drivers/ipm/ |
| D | ipm_mcux.c | 44 MAILBOX_Type *base; member
62 volatile uint32_t value = MAILBOX_GetValue(config->base, cpu_id); in mcux_mailbox_isr()
67 MAILBOX_ClearValueBits(config->base, cpu_id, value); in mcux_mailbox_isr()
88 MAILBOX_Type *base = config->base; in mcux_mailbox_ipm_send() local
110 MAILBOX_SetValueBits(base, MAILBOX_ID_OTHER_CPU, data32[i]); in mcux_mailbox_ipm_send()
180 MAILBOX_Init(config->base); in mcux_mailbox_init()
199 .base = (MAILBOX_Type *)DT_INST_REG_ADDR(0),
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| /Zephyr-latest/drivers/adc/ |
| D | adc_mcux_adc16.c | 27 ADC_Type *base; member
143 ADC_Type *base = config->base; in start_read() local
169 tmp32 = base->CFG1 & ~(ADC_CFG1_MODE_MASK); in start_read()
171 base->CFG1 = tmp32; in start_read()
193 ADC16_SetHardwareAverage(config->base, mode); in start_read()
265 ADC16_SetChannelConfig(config->base, channel_group, &channel_config); in mcux_adc16_start_channel()
310 ADC_Type *base = config->base; in mcux_adc16_isr() local
314 result = ADC16_GetChannelConversionValue(base, channel_group); in mcux_adc16_isr()
333 ADC_Type *base = config->base; in mcux_adc16_init() local
364 ADC16_Init(base, &adc_config); in mcux_adc16_init()
[all …]
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| /Zephyr-latest/boards/snps/nsim/arc_v/support/ |
| D | rmx100.props | 4 nsim_mem-dev=clint,base=0x2000000,size=4096
5 nsim_mem-dev=uart0,kind=16550,base=0x10000000,irq=24
6 nsim_mem-dev=plic,base=0xc000000,size=0x04000000,interrupts=128,priorities=16
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| /Zephyr-latest/drivers/dai/intel/dmic/ |
| D | dmic.c | 174 uint32_t base = dai_dmic_base(dmic); in dai_dmic_set_sync_period() local
177 sys_write32(sys_read32(base + DMICSYNC_OFFSET) | FIELD_PREP(DMICSYNC_SYNCPRD, val), in dai_dmic_set_sync_period()
178 base + DMICSYNC_OFFSET); in dai_dmic_set_sync_period()
179 sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_SYNCPU, in dai_dmic_set_sync_period()
180 base + DMICSYNC_OFFSET); in dai_dmic_set_sync_period()
182 if (!WAIT_FOR((sys_read32(base + DMICSYNC_OFFSET) & DMICSYNC_SYNCPU) == 0, 1000, in dai_dmic_set_sync_period()
187 sys_write32(sys_read32(base + DMICSYNC_OFFSET) | DMICSYNC_CMDSYNC, in dai_dmic_set_sync_period()
188 base + DMICSYNC_OFFSET); in dai_dmic_set_sync_period()
190 sys_write32(sys_read32(base + DMICSYNC_OFFSET) | FIELD_PREP(DMICSYNC_SYNCPRD, val), in dai_dmic_set_sync_period()
191 base + DMICSYNC_OFFSET); in dai_dmic_set_sync_period()
[all …]
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| /Zephyr-latest/drivers/dma/ |
| D | dma_intel_lpss.c | 33 if (dev_cfg->dw_cfg.base != 0) { in dma_intel_lpss_setup()
40 void dma_intel_lpss_set_base(const struct device *dev, uintptr_t base) in dma_intel_lpss_set_base() argument
44 dev_cfg->dw_cfg.base = base; in dma_intel_lpss_set_base()
72 ctrl_hi = dw_read(dev_cfg->base, DW_CTRL_HIGH(channel)); in dma_intel_lpss_reload()
104 ctrl_hi = dw_read(dev_cfg->base, DW_CTRL_HIGH(channel)); in dma_intel_lpss_get_status()
108 if (!(dw_read(dev_cfg->base, DW_DMA_CHAN_EN) & DW_CHAN(channel))) { in dma_intel_lpss_get_status()
156 .base = 0, \
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| /Zephyr-latest/kernel/ |
| D | sched.c | 60 int32_t b1 = thread_1->base.prio; in z_sched_prio_cmp()
61 int32_t b2 = thread_2->base.prio; in z_sched_prio_cmp()
75 uint32_t d1 = thread_1->base.prio_deadline; in z_sched_prio_cmp()
76 uint32_t d2 = thread_2->base.prio_deadline; in z_sched_prio_cmp()
93 int cpu, m = thread->base.cpu_mask; in thread_runq()
148 thread->base.thread_state |= _THREAD_QUEUED; in queue_thread()
162 thread->base.thread_state &= ~_THREAD_QUEUED; in dequeue_thread()
185 return (thread->base.thread_state & _THREAD_ABORTING) != 0U; in is_aborting()
191 return (thread->base.thread_state & in is_halting()
199 thread->base.thread_state &= ~(_THREAD_ABORTING | _THREAD_SUSPENDING); in clear_halting()
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| /Zephyr-latest/drivers/dac/ |
| D | dac_stm32.c | 46 DAC_TypeDef *base; member
77 LL_DAC_ConvertData8RightAligned(cfg->base, in dac_stm32_write_value()
80 LL_DAC_ConvertData12RightAligned(cfg->base, in dac_stm32_write_value()
117 LL_DAC_SetOutputBuffer(cfg->base, channel, cfg_setting); in dac_stm32_channel_setup()
127 LL_DAC_SetOutputConnection(cfg->base, channel, cfg_setting); in dac_stm32_channel_setup()
135 LL_DAC_Enable(cfg->base, channel); in dac_stm32_channel_setup()
181 .base = (DAC_TypeDef *)DT_INST_REG_ADDR(index), \
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| /Zephyr-latest/tests/kernel/ipi_cascade/src/ |
| D | main.c | 82 _kernel.cpus[0].current->base.prio); in show_executing_threads()
86 _kernel.cpus[1].current->base.prio); in show_executing_threads()
119 cpu_t3 = arch_current_thread()->base.cpu; in thread3_entry()
139 cpu_t4 = arch_current_thread()->base.cpu; in thread4_entry()
168 cpu_t2 = arch_current_thread()->base.cpu; in thread2_entry()
208 cpu_t1 = arch_current_thread()->base.cpu; in ZTEST()
252 zassert_true(cpu_t1 != arch_current_thread()->base.cpu, in ZTEST()
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| /Zephyr-latest/drivers/usb/device/ |
| D | usb_dc_numaker.c | 72 USBD_T *base; member
190 USBD_T *const base = config->base; in numaker_usbd_sw_connect() local
193 base->INTSTS = base->INTSTS; in numaker_usbd_sw_connect()
196 base->INTEN = USBD_INT_BUS | USBD_INT_USB | USBD_INT_FLDET | USBD_INT_WAKEUP | USBD_INT_SOF; in numaker_usbd_sw_connect()
199 base->SE0 &= ~USBD_DRVSE0; in numaker_usbd_sw_connect()
205 USBD_T *const base = config->base; in numaker_usbd_sw_disconnect() local
208 base->SE0 |= USBD_DRVSE0; in numaker_usbd_sw_disconnect()
223 USBD_T *const base = config->base; in numaker_usbd_reset_addr() local
225 base->FADDR = 0; in numaker_usbd_reset_addr()
233 USBD_T *const base = config->base; in numaker_usbd_set_addr() local
[all …]
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| /Zephyr-latest/scripts/release/ |
| D | list_backports.py | 121 def __init__(self, repo, base, pulls): argument
122 self._base = base
131 def by_date_range(repo, base, start_date, end_date, excludes): argument
139 base=base, state='closed')
158 return Backport(repo, base, pulls)
161 def by_included_prs(repo, base, includes): argument
177 if p.base.ref != base:
187 return Backport(repo, base, pulls)
306 bp = Backport.by_included_prs(repo, args.base, set(args.includes))
308 bp = Backport.by_date_range(repo, args.base,
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| /Zephyr-latest/include/zephyr/arch/arm/mpu/ |
| D | arm_mpu.h | 30 uint32_t base; member
53 .base = _base, \
61 .base = _base, \
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| /Zephyr-latest/drivers/memc/ |
| D | memc_mcux_flexspi.c | 49 FLEXSPI_Type *base; member
77 while (false == FLEXSPI_GetBusIdleStatus(data->base)) { in memc_flexspi_wait_bus_idle()
121 FLEXSPI_UpdateDllValue(data->base, device_config, port); in memc_flexspi_update_clock()
133 FLEXSPI_UpdateDllValue(data->base, device_config, port); in memc_flexspi_update_clock()
202 FLEXSPI_SetFlashConfig(data->base, &tmp_config, port); in memc_flexspi_set_device_config()
203 FLEXSPI_UpdateLUT(data->base, data->port_luts[port].lut_offset, in memc_flexspi_set_device_config()
214 FLEXSPI_SoftwareReset(data->base); in memc_flexspi_reset()
240 status = FLEXSPI_TransferBlocking(data->base, &tmp); in memc_flexspi_transfer()
243 status = FLEXSPI_TransferBlocking(data->base, transfer); in memc_flexspi_transfer()
340 flash_sizes[i] = data->base->FLSHCR0[i]; in memc_flexspi_init()
[all …]
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| /Zephyr-latest/drivers/can/ |
| D | can_mcux_flexcan.c | 72 CAN_Type *base; member
205 FLEXCAN_SetFDRxMbConfig(config->base, ALLOC_IDX_TO_RXMB_IDX(alloc), in mcux_flexcan_mb_start()
207 status = FLEXCAN_TransferFDReceiveNonBlocking(config->base, &data->handle, &xfer); in mcux_flexcan_mb_start()
211 FLEXCAN_SetRxMbConfig(config->base, ALLOC_IDX_TO_RXMB_IDX(alloc), in mcux_flexcan_mb_start()
213 status = FLEXCAN_TransferReceiveNonBlocking(config->base, &data->handle, &xfer); in mcux_flexcan_mb_start()
230 FLEXCAN_TransferFDAbortReceive(config->base, &data->handle, in mcux_flexcan_mb_stop()
232 FLEXCAN_SetFDRxMbConfig(config->base, ALLOC_IDX_TO_RXMB_IDX(alloc), in mcux_flexcan_mb_stop()
236 FLEXCAN_TransferAbortReceive(config->base, &data->handle, in mcux_flexcan_mb_stop()
238 FLEXCAN_SetRxMbConfig(config->base, ALLOC_IDX_TO_RXMB_IDX(alloc), in mcux_flexcan_mb_stop()
266 config->base->ECR &= ~(CAN_ECR_TXERRCNT_MASK | CAN_ECR_RXERRCNT_MASK); in mcux_flexcan_start()
[all …]
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