Lines Matching refs:base
49 FLEXSPI_Type *base; member
77 while (false == FLEXSPI_GetBusIdleStatus(data->base)) { in memc_flexspi_wait_bus_idle()
121 FLEXSPI_UpdateDllValue(data->base, device_config, port); in memc_flexspi_update_clock()
133 FLEXSPI_UpdateDllValue(data->base, device_config, port); in memc_flexspi_update_clock()
202 FLEXSPI_SetFlashConfig(data->base, &tmp_config, port); in memc_flexspi_set_device_config()
203 FLEXSPI_UpdateLUT(data->base, data->port_luts[port].lut_offset, in memc_flexspi_set_device_config()
214 FLEXSPI_SoftwareReset(data->base); in memc_flexspi_reset()
240 status = FLEXSPI_TransferBlocking(data->base, &tmp); in memc_flexspi_transfer()
243 status = FLEXSPI_TransferBlocking(data->base, transfer); in memc_flexspi_transfer()
340 flash_sizes[i] = data->base->FLSHCR0[i]; in memc_flexspi_init()
344 FLEXSPI_Init(data->base, &flexspi_config); in memc_flexspi_init()
348 data->base->AHBCR = (data->base->AHBCR & ~FLEXSPI_AHBCR_ALIGNMENT_MASK) | in memc_flexspi_init()
355 data->base->FLSHCR0[i] = flash_sizes[i]; in memc_flexspi_init()
359 data->base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK; in memc_flexspi_init()
417 .base = (FLEXSPI_Type *) DT_INST_REG_ADDR(n), \