40 #define LPSPI_IRQ_HANDLE_ARG COND_CODE_1(CONFIG_NXP_LP_FLEXCOMM, (LPSPI_GetInstance(base)), (base))
98 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_isr()  local
103 static void spi_mcux_master_callback(LPSPI_Type *base, lpspi_master_handle_t *handle,  in spi_mcux_master_callback()  argument
117 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_transfer_next_packet()  local
136 	status = LPSPI_MasterTransferNonBlocking(base, &data->handle, &transfer);  in spi_mcux_transfer_next_packet()
149 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_configure()  local
189 		LPSPI_Enable(base, false);  in spi_mcux_configure()
190 		while ((base->CR & LPSPI_CR_MEN_MASK) != 0U) {  in spi_mcux_configure()
217 	LPSPI_MasterInit(base, &master_config, clock_freq);  in spi_mcux_configure()
218 	LPSPI_SetDummyData(base, 0);  in spi_mcux_configure()
221 		base->CR |= LPSPI_CR_DBGEN_MASK;  in spi_mcux_configure()
314 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_dma_tx_load()  local
326 	blk_cfg->dest_address = LPSPI_GetTxRegisterAddress(base);  in spi_mcux_dma_tx_load()
335 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_dma_rx_load()  local
347 	blk_cfg->source_address = LPSPI_GetRxRegisterAddress(base);  in spi_mcux_dma_rx_load()
422 	LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);  in transceive_dma_async()
432 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in transceive_dma_sync()  local
449 		while (!(LPSPI_GetStatusFlags(base) & kLPSPI_TxDataRequestFlag)) {  in transceive_dma_sync()
455 		LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);  in transceive_dma_sync()
464 		while ((LPSPI_GetStatusFlags(base) & kLPSPI_ModuleBusyFlag)) {  in transceive_dma_sync()
470 		LPSPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);  in transceive_dma_sync()
479 	base->TCR = 0;  in transceive_dma_sync()
489 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in transceive_dma()  local
504 	base->TCR |= LPSPI_TCR_CONT_MASK;  in transceive_dma()
508 	LPSPI_SetFifoWatermarks(base, 0U, 0U);  in transceive_dma()
530 static void spi_mcux_master_rtio_callback(LPSPI_Type *base, lpspi_master_handle_t *handle,  in spi_mcux_master_rtio_callback()  argument
541 	spi_mcux_master_callback(base, handle, status, userData);  in spi_mcux_master_rtio_callback()
551 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in spi_mcux_iodev_start()  local
561 	LPSPI_MasterTransferCreateHandle(base, &data->handle, spi_mcux_master_rtio_callback, data);  in spi_mcux_iodev_start()
596 	status = LPSPI_MasterTransferNonBlocking(base, &data->handle, &transfer);  in spi_mcux_iodev_start()
656 	LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);  in transceive()  local
667 	LPSPI_MasterTransferCreateHandle(base, &data->handle, spi_mcux_master_callback, data);  in transceive()