/Zephyr-latest/boards/renesas/ek_ra8d1/doc/ |
D | index.rst | 8 of over 3000 Coremark points at 480 MHz and superior graphics capabilities that enable high-resolut… 9 displays and Vision AI applications. 16 - Native pin acces througgh 2 x 50-pin, and 2 x 40-pin male headers 18 - Multiple clock sources - RA8D1 MCU oscillator and sub-clock oscillator crystals, 19 providing precision 20.000MHz and 32,768 Hz refeence clocks. 22 **System Control and Ecosystem Access** 24 - USB Full Speed Host and Device (micro-AB connector) 28 - External power supply (using surface mount clamp test points and power input vias) 33 - Debug in (ETM, SWD and JTAG) 36 - User LEDs and buttons [all …]
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/Zephyr-latest/doc/project/ |
D | working_groups.rst | 20 in its activities and decision-making processes. 27 tasks and the breadth of expertise required to address them effectively. 29 ensure diversity of perspectives, collaboration, and continuity. 31 designed to ensure effectiveness, productivity, and inclusivity. While the 32 optimal size of a working group can vary depending on the specific context and 34 - Participation in WG meetings and discussions is open to all project 40 Each working group may elect a Chair and optionally a Co-Chair who is 41 responsible for leading meetings and representing the working group to the TSC. 46 - The Chair and Co-Chair shall be elected by the members of the working group 58 - The Chair and Co-Chair shall be members of the working group. [all …]
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D | documentation.rst | 9 Well documented APIs enhance the experience for developers and are an essential 12 generates either an on-line documentation browser (in HTML) and/or provides 21 features and can be traced back to features. We use the API documentation as the 29 To help understand what each test does and which functionality it tests we also 30 document all test code using the same tools and in the same context and generate 31 documentation for all unit and integration tests maintained in the same 33 they validate by creating a link back to the APIs and by adding a reference to 45 on the entry test functions (usually prefixed with test\_) and those that are 47 reports and using their name and identifier is the best way to identify them 48 and trace back to them from requirements. [all …]
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/Zephyr-latest/boards/nxp/imx8mq_evk/doc/ |
D | index.rst | 7 processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M4 core. 35 - MicroUSB for UART debug, two COM ports for A53 and M4 66 Connections and IOs 88 The i.MX8MQ SoC has four UARTs. UART_2 is configured for the console and 91 Programming and Debugging 94 The MIMX8MQ EVK board doesn't have QSPI flash for the M4 and it needs 96 application into the RAM, put the M4 in reset, set the M4 Program Counter and 97 Stack Pointer, and get the M4 out of reset. The A53 can perform these steps at 100 The M4 can use up to 3 different RAMs. These are the memory mapping for A53 and M4: 115 `i.MX 8M Applications Processor Reference Manual`_ (section 2.1.2 and 2.1.3) [all …]
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/Zephyr-latest/boards/microchip/m2gl025_miv/doc/ |
D | index.rst | 9 `Microchip's website <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-t… 11 Programming and debugging 27 In order to upload the application to the device, you'll need OpenOCD and GDB 30 Download and installation instructions can be found on 32 <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/soc-fpga/softcon… 44 Leave it running, and in a different terminal, use GDB to upload the binary to 49 and load the binary:
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/Zephyr-latest/boards/renesas/ek_ra6m2/doc/ |
D | index.rst | 9 RAM and low power consumption. 17 - MCU and USB current measurement points for precision current consumption measurement 18 - Multiple clock sources - RA6M2 MCU oscillator and sub-clock oscillator crystals, 19 providing precision 12.000 MHz and 32,768 Hz reference clock. 22 **System Control and Ecosystem Access** 30 - Debug in (SWD and JTAG) 33 - User LEDs and buttons 41 - Two Digilent Pmod (SPI and UART) connectors 49 - USB Full Speed Host and Device (micro-AB connector) 69 Programming and Debugging [all …]
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/Zephyr-latest/boards/st/stm32373c_eval/doc/ |
D | index.rst | 5 The STM32373C-EVAL evaluation board is designed as a complete demonstration and development platfor… 7 …, ECG, pressure sensor, CAN, IR transmitter and receiver, EEPROM, touch slider, temperature sensor… 27 - Three components on I2 C bus: temperature sensor, EEPROM and dual interface RF EEPROM 31 - Joystick with 4-direction control and selector 32 - Reset, Wakeup or Tamper, and Key buttons 35 - ECG, pressure sensor and PT100 temperature sensor connected to the 16-bit Sigma Delta ADC of STM3… 43 - Two HDMI connectors with DDC and CEC 44 - IR transmitter and receiver 45 - Two ADC & DAC input and output signal connectors and one Sigma Delta ADC input signal connector 47 - JTAG/SWD and ETM trace debug support [all …]
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/Zephyr-latest/boards/adafruit/itsybitsy/doc/ |
D | index.rst | 8 and range of I/O broken out onto 21 GPIO pins. 22 * RADIO (Bluetooth Low Energy and 802.15.4) 32 - 1 MB of flash memory and 256 KB of SRAM 45 Connections and IOs 49 information about the board including `pinouts`_ and the `schematic`_. 75 Testing LEDs and buttons on the Adafruit ItsyBitsy nRF52840 Express 77 The :zephyr:code-sample:`button` sample lets you test the buttons (switches) and the red LED. 80 The DotStar LED has been implemented as a SPI device and can be tested 83 You can build and flash the examples to make sure Zephyr is running correctly on 84 your board. The button and LED definitions can be found in [all …]
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/Zephyr-latest/boards/nxp/frdm_k64f/doc/ |
D | index.rst | 7 K63, and K24 MCUs. 11 accelerometer and magnetometer to create full eCompass capabilities, a 12 tri-colored LED and 2 user push-buttons for direct interaction, a microSD 13 card slot, and connectivity using onboard Ethernet port and headers for use 14 with Bluetooth* and 2.4 GHz radio add-on modules 15 - OpenSDAv2, the NXP open source hardware embedded serial and debug adapter 17 flash programming, and run-control debugging 23 crystal-less USB, and 100 Low profile Quad Flat Package (LQFP)) 26 - FXOS8700CQ accelerometer and magnetometer 28 - Flexible power supply option - OpenSDAv2 USB, Kinetis K64 USB, and external source [all …]
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/Zephyr-latest/samples/sensor/sgp40_sht4x/ |
D | README.rst | 2 :name: SGP40 and SHT4X digital humidity and multipixel gas sensor 5 Get temperature, humidity and gas sensor data from SGP40 and SHT4X sensors (polling mode). 11 and a raw gas sensor value from an SGP40 and SHT4X device. 33 This sample uses the SHT4X and SGP40 sensor controlled using the I2C interface. 34 Connect Supply: **VDD**, **GND** and Interface: **SDA**, **SCL**. 36 Depending on the baseboard used, the **SDA** and **SCL** lines require Pull-Up 39 Building and Running 42 This project outputs sensor data to the console. It requires a SHT4X and a SGP40
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/Zephyr-latest/boards/st/nucleo_wl55jc/doc/ |
D | nucleo_wl55jc.rst | 6 The NUCLEO-WL55JC STM32WL Nucleo-64 board provides an affordable and flexible 7 way for users to try out new concepts and build prototypes with the STM32WL 9 power consumption, and features. 16 (G)FSK, (G)MSK, and BPSK modulations 17 - 256-Kbyte Flash memory and 64-Kbyte SRAM 20 - 3 user buttons and 1 reset push-button 33 mass storage, Virtual COM port, and debug port 34 - Comprehensive free software libraries and examples available with the 37 and many other proprietary protocols 46 The STM32WL55JC long-range wireless and ultra-low-power devices embed a powerful [all …]
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/Zephyr-latest/boards/telink/tlsr9518adk80d/doc/ |
D | index.rst | 7 can be used to verify the `Telink TLSR951x series chipset`_ and develop applications 9 rate, Enhanced data rate, LE, Indoor positioning and BLE Mesh), 10 Zigbee 3.0, Homekit, 6LoWPAN, Thread and 2.4 Ghz proprietary. 18 KB SRAM (128 KB of Data Local Memory and 128 KB of Instruction Local Memory), external Flash memory, 19 stereo audio codec, 14 bit AUX ADC, analog and digital Microphone input, PWM, flexible IO interface… 20 and other peripheral blocks required for advanced IoT, hearable, and wearable devices. 44 …To support "button" example project PC3-KEY3 (J20-19, J20-20) jumper needs to be removed and KEY3 … 51 …ate interrupts simultaneously. All pins must be related to different ports and use different IRQ n… 52 - DMA mode is not supported by I2C, SPI and Serial Port. 57 Default configuration and IOs [all …]
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/Zephyr-latest/boards/openisa/rv32m1_vega/doc/ |
D | index.rst | 9 on-die XIP flash, and a full complement of peripherals, including a 10 2.4 GHz multi-protocol radio. It also has built-in sensors and 13 The two RISC-V CPUs are named RI5CY and ZERO-RISCY, and are 15 `RI5CY`_ and `ZERO-RISCY`_. RI5CY is the "main" core; it has more 16 flash and RAM as well as a more powerful CPU design. ZERO-RISCY is a 19 communicate via shared memory and messaging peripherals. 22 configuration name, and ZERO_RISCY with the ``rv32m1_vega/openisa_rv32m1/zero_riscy`` board 32 - 1 MiB flash and 192 KiB SRAM (RI5CY core) 33 - 256 KiB flash and 128 KiB SRAM (ZERO-RISCY core) 38 card, USB full-speed, uSDHC, and 2.4 GHz multiprotocol radio [all …]
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/Zephyr-latest/boards/u-blox/ubx_evkninab4/doc/ |
D | index.rst | 11 and has support for the following features: 33 More information about the NINA-B4 module and the EVK-NINA-B4 can be 34 found at `NINA-B40 product page`_ and `EVK-NINA-B4 product page`_. 77 See `EVK-NINA-B4 product page`_ and `NINA-B40 Data Sheet`_ 80 Connections and IOs 99 The numbering of the pins on the module and EVK do not follow the GPIO 105 modules share the same pinout and can be interchanged, see 108 Programming and Debugging 112 built and flashed in the usual way (see :ref:`build_an_application` 113 and :ref:`application_run` for more details); however, the standard [all …]
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/Zephyr-latest/doc/contribute/ |
D | proposals_and_rfcs.rst | 3 Proposals and RFCs 6 Many changes, including bug fixes and documentation improvements can be 7 implemented and reviewed via the normal GitHub pull request workflow. 9 Many changes however are "substantial" and need to go through a 10 design process and produce a consensus among the project stakeholders. 12 The "RFC" (request for comments) process is intended to provide a consistent and 15 Contributors and project stakeholders should consider using this process if 19 - A new feature that creates new API surface area, and would require a feature 32 feature as it is being designed, and incorporate important constraints into the 36 For a Major Feature, first open an issue and outline your proposal so that it [all …]
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/Zephyr-latest/doc/connectivity/networking/ |
D | networking_with_host.rst | 20 While developing networking software, it is usually necessary to connect and 27 * Here IP packets are exchanged between Zephyr and the host system via serial 33 * Here IP packets are exchanged between Zephyr and the host system via QEMU's 41 stack within QEMU and uses that stack to implement a virtual NAT'd network. As 42 this support is built into QEMU, it can be used with any model and requires no 49 * User mode networking emulates a built-in IP router and DHCP server, and 50 routes TCP and UDP traffic between the guest and host. It uses the user mode 64 purpose, a TAP virtual Ethernet driver and an offloaded sockets driver. 69 * Here, the Zephyr instance is run on a real board and the connectivity to 76 and want to create a connection between them, see [all …]
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/Zephyr-latest/drivers/timer/ |
D | Kconfig.xtensa | 13 and CCOMPARE special registers. 20 Index of the CCOMPARE register (and associated interrupt) 22 interrupt priorities associated with each timer, and some of 23 them can be unmaskable (and thus not usable by OS code that 25 general timer zero is guaranteed to be present and usable.
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/Zephyr-latest/doc/hardware/peripherals/ |
D | espi.rst | 11 and target select) and three configurations: single IO, dual IO and quad IO. 14 lower pin count, and the frequency is twice as fast (66MHz vs. 33MHz) 16 (lower pin count) interface, SPI, SMBus and sideband signals.
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/Zephyr-latest/samples/drivers/audio/dmic/ |
D | README.rst | 11 API <audio_dmic_api>` and also to be an aid in developing drivers to implement this API. 13 and two channels) but does not in any way process the received audio data. 21 and :ref:`nrf5340dk_nrf5340` (nrf5340dk/nrf5340/cpuapp), and provides overlay 24 Building and Running 29 To build and flash the application:
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/Zephyr-latest/tests/drivers/i2s/i2s_api/ |
D | Kconfig | 14 Use separate I2S ports for transmit and receive. 21 cases involving both reception and transmission. Use of this option 22 is essential for devices that cannot independently start and stop 23 the RX and TX streams. 29 Use wiring between the data-out and data-in pins for looping back 38 Maximum allowed offset between sent and received samples. Non-zero
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/Zephyr-latest/boards/renesas/ek_ra6m1/doc/ |
D | index.rst | 9 and is supported by an open and flexible ecosystem concept—the Flexible Software 10 Package (FSP), built on FreeRTOS—and is expandable to use other RTOSes and middleware. 11 The RA6M1 is suitable for IoT applications requiring security, large embedded RAM and 28 - S124 MCU-based SEGGER J-Link® On-Board interface for debugging and programming of the 30 debuggers and programmers. 33 - Pin headers for access to power and signals for the Main MCU 37 - Main MCU oscillator crystals, providing precision 12.000 MHz and 32,768 Hz external reference 44 - Copper jumpers on PCB bottom side for configuration and access to selected MCU signals 49 logic and interfaces on the board. External 5 V or 3.3 V may be also supplied through alternate 51 - A two-color board status LED indicating availability of regulated power and connection status of … [all …]
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/Zephyr-latest/doc/hardware/arch/ |
D | x86.rst | 16 is executing in virtual address space. By default, physical and virtual 17 memory are identity mapped and thus giving the appearance of execution 19 marked by kconfig :kconfig:option:`CONFIG_SRAM_BASE_ADDRESS` and 21 :kconfig:option:`CONFIG_KERNEL_VM_BASE` and :kconfig:option:`CONFIG_KERNEL_VM_SIZE`. 23 is being placed in the memory, and its counterpart 29 On 32-bit x86, it is possible to have separate physical and virtual 30 address space. Code and data are linked in virtual address space, 32 and data must be available and also addressable in physical address 35 and data can be referred via their virtual addresses. This is 51 - Physical and virtual address spaces must be disjoint. This is [all …]
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/Zephyr-latest/tests/boards/frdm_k64f/i2c/ |
D | README.rst | 4 Tests the i2c transfer and transfer async APIs against the fxos8700 sensor 5 on the board using its FIFO with a async and sync transfer to compare 6 and contrast the behavior.
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/Zephyr-latest/boards/sparkfun/red_v_things_plus/doc/ |
D | index.rst | 16 For more information about the SparkFun RED-V Things Plus and SiFive FE310-G002: 22 Programming and debugging 38 The SparkFun RED-V Things Plus uses Segger J-Link OB for flashing and debugging. 39 To flash and debug the board, you'll need to install the 40 `Segger J-Link Software and Documentation Pack 42 and choose version V6.46a or later (Downloads for Windows, Linux, and macOS are 46 (see :ref:`build_an_application` and :ref:`application_run` for more details):
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/Zephyr-latest/boards/qemu/riscv64/doc/ |
D | index.rst | 8 Get the Toolchain and QEMU 13 with toolchain and QEMU support for the RISCV64 architecture is v0.10.2. 17 Programming and Debugging 20 Applications for the ``qemu_riscv64`` board configuration can be built and run in 21 the usual way for emulated boards (see :ref:`build_an_application` and 27 While this board is emulated and you can't "flash" it, you can use this 28 configuration to run basic Zephyr applications and kernel tests in the QEMU 38 QEMU, and display the following console output:
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