| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/ |
| D | upower_api.h | 20 #include <stdint.h> /* this include breaks the SoC compile - TBD why? */
39 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
49 * This API is intended to be used by the OS drivers (Linux, FreeRTOS etc)
50 * as well as bare metal drivers to command and use services from the uPower.
53 * The API functions fall in 3 categories:
58 * The communication with the uPower is mostly made through the Message Unit
62 * The API assumes each SoC power domain/CPU cluster receives 2 interrupts
63 * from the uPower MU:
68 * The normal uPower operation is done by service requests. There is an API
71 * The service request functions are non-blocking, and their completion can be
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| D | upower_api.c | 79 /* installs a user callback for the Service Group */
109 * for sgrp_callback, it also means the service group is free to
147 * because the Tx and Rx interrupts are ORed
150 * by looking at the MU status registers
166 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
171 /* default pointer->physical address conversion, returns the same address */
183 * address offset from the shared memory start.
185 * the structure pointed is copied to a buffer in the
186 * shared memory, and the buffer offset is returned.
187 * The 2nd argument is the service group to which the
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/ |
| D | upower_api.h | 20 #include <stdint.h> /* this include breaks the SoC compile - TBD why? */
39 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
49 * This API is intended to be used by the OS drivers (Linux, FreeRTOS etc)
50 * as well as bare metal drivers to command and use services from the uPower.
53 * The API functions fall in 3 categories:
58 * The communication with the uPower is mostly made through the Message Unit
62 * The API assumes each SoC power domain/CPU cluster receives 2 interrupts
63 * from the uPower MU:
68 * The normal uPower operation is done by service requests. There is an API
71 * The service request functions are non-blocking, and their completion can be
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| D | upower_api.c | 79 /* installs a user callback for the Service Group */
109 * for sgrp_callback, it also means the service group is free to
147 * because the Tx and Rx interrupts are ORed
150 * by looking at the MU status registers
166 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
171 /* default pointer->physical address conversion, returns the same address */
183 * address offset from the shared memory start.
185 * the structure pointed is copied to a buffer in the
186 * shared memory, and the buffer offset is returned.
187 * The 2nd argument is the service group to which the
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/ |
| D | upower_api.h | 20 #include <stdint.h> /* this include breaks the SoC compile - TBD why? */
39 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
49 * This API is intended to be used by the OS drivers (Linux, FreeRTOS etc)
50 * as well as bare metal drivers to command and use services from the uPower.
53 * The API functions fall in 3 categories:
58 * The communication with the uPower is mostly made through the Message Unit
62 * The API assumes each SoC power domain/CPU cluster receives 2 interrupts
63 * from the uPower MU:
68 * The normal uPower operation is done by service requests. There is an API
71 * The service request functions are non-blocking, and their completion can be
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| D | upower_api.c | 79 /* installs a user callback for the Service Group */
109 * for sgrp_callback, it also means the service group is free to
147 * because the Tx and Rx interrupts are ORed
150 * by looking at the MU status registers
166 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
171 /* default pointer->physical address conversion, returns the same address */
183 * address offset from the shared memory start.
185 * the structure pointed is copied to a buffer in the
186 * shared memory, and the buffer offset is returned.
187 * The 2nd argument is the service group to which the
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/ |
| D | upower_api.h | 20 #include <stdint.h> /* this include breaks the SoC compile - TBD why? */
39 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
49 * This API is intended to be used by the OS drivers (Linux, FreeRTOS etc)
50 * as well as bare metal drivers to command and use services from the uPower.
53 * The API functions fall in 3 categories:
58 * The communication with the uPower is mostly made through the Message Unit
62 * The API assumes each SoC power domain/CPU cluster receives 2 interrupts
63 * from the uPower MU:
68 * The normal uPower operation is done by service requests. There is an API
71 * The service request functions are non-blocking, and their completion can be
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| D | upower_api.c | 79 /* installs a user callback for the Service Group */
109 * for sgrp_callback, it also means the service group is free to
147 * because the Tx and Rx interrupts are ORed
150 * by looking at the MU status registers
166 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
171 /* default pointer->physical address conversion, returns the same address */
183 * address offset from the shared memory start.
185 * the structure pointed is copied to a buffer in the
186 * shared memory, and the buffer offset is returned.
187 * The 2nd argument is the service group to which the
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/ |
| D | upower_api.h | 20 #include <stdint.h> /* this include breaks the SoC compile - TBD why? */
39 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
49 * This API is intended to be used by the OS drivers (Linux, FreeRTOS etc)
50 * as well as bare metal drivers to command and use services from the uPower.
53 * The API functions fall in 3 categories:
58 * The communication with the uPower is mostly made through the Message Unit
62 * The API assumes each SoC power domain/CPU cluster receives 2 interrupts
63 * from the uPower MU:
68 * The normal uPower operation is done by service requests. There is an API
71 * The service request functions are non-blocking, and their completion can be
[all …]
|
| D | upower_api.c | 79 /* installs a user callback for the Service Group */
109 * for sgrp_callback, it also means the service group is free to
147 * because the Tx and Rx interrupts are ORed
150 * by looking at the MU status registers
166 #ifndef UPWR_NAMESPACE /* extern "C" 'cancels' the effect of namespace */
171 /* default pointer->physical address conversion, returns the same address */
183 * address offset from the shared memory start.
185 * the structure pointed is copied to a buffer in the
186 * shared memory, and the buffer offset is returned.
187 * The 2nd argument is the service group to which the
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/dsp/ |
| D | filtering_functions.h | 13 * Licensed under the Apache License, Version 2.0 (the License); you may
14 * not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
20 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
54 * @brief Instance structure for the Q7 FIR filter.
58 uint16_t numTaps; /**< number of filter coefficients in the filter. */
59 …q7_t *pState; /**< points to the state variable array. The array is of length numTaps+b…
60 …const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTap…
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| /hal_nxp-latest/s32/drivers/s32k3/Mcl/include/ |
| D | Lcu_Ip.h | 7 /* Prevention from multiple including the same header */
50 /* Check if header file and Lcu_Ip_Cfg.h file are of the same vendor */
55 /* Check if header file and Lcu_Ip_Cfg.h file are of the same Autosar version */
63 /* Check if header file and Lcu_Ip_Cfg.h file are of the same Software version */
84 * @brief This type contains the LCU Input Param Type.
85 * @details The Parameters set specific functionalities for Input
91 …the software sync mode for the inputs to this LC.When Software Override is enabled (SWEN),these bi…
97 * @brief This type contains the LCU Output Param Type.
98 * @details The Parameters set specific functionalities for Output
108 …LCU_IP_OUTPUT_SET_EN_FORCE_DMA = 5U, /**< @brief [LUT_DMA_EN] Enables the generatio…
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| /hal_nxp-latest/s32/drivers/s32ze/EthSwt_NETC/include/ |
| D | Netc_EthSwt_Ip.h | 47 /* Check if current file and Mcal.h header file are of the same Autosar version */
100 /* Base address of the registers for the MAC Ports */
103 /* Base address of the registers for the pseudo Port */
127 …NGTH (2U) /*!< size of command ring 0. 2 means the size is 16 because …
130 …NGTH (2U) /*!< size of command ring 1. 2 means the size is 16 because …
164 * @details Initializes the indexed swtich with a given configuration for the switch index
167 * at all ports of the switch and the switch itself.
170 * @param[in] SwitchIdx Index of the switch within the context of the Ethernet Switch Driver
171 * Config Structure for the initialization
173 * @return Result of the operation
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/output/source/device/class/ |
| D | usb_device_ccid.h | 26 /*! @brief MAX slot number of the CCID device. */
28 /*! @brief MAX transfer entity number of the CCID device. */
30 /*! @brief MAX maximum message length of the CCID device. */
52 /* The voltage support in CCID device class-specific descriptor */
57 /* The protocol in CCID device class-specific descriptor */
61 /* The mechanical in CCID device class-specific descriptor */
68 /* The features in CCID device class-specific descriptor */
85 /* The PIN support in CCID device class-specific descriptor */
97 /*! @brief The message type of CCID device class-specific bulk-out pipe (Command pipe) */
113 /*! @brief The message type of CCID device class-specific bulk-in pipe (Response pipe) */
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/host/class/ |
| D | usb_host_msd.h | 45 /*! @brief retry time when transfer fail, when all the retries fail the transfer callback with erro…
79 …uint32_t CBWSignature; /*!< Signature that helps identify this data packet as a CBW. The signature…
80 contain the value 43425355h (little endian), indicating a CBW */
81 …uint32_t CBWTag; /*!< A Command Block Tag sent by the host. The device shall echo the contents of …
82 the host in the dCSWTag field of the associated CSW */
83 …uint32_t CBWDataTransferLength; /*!< The number of bytes of data that the host expects to transfer…
84 Bulk-Out endpoint during the execution of this command */
86 … Bit 7 Direction - the device shall ignore this bit if the dCBWDataTransferLength field is
88 0 = Data-Out from host to the device,
89 1 = Data-In from the device to the host.
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/ |
| D | arm_math.h | 12 * Licensed under the Apache License, Version 2.0 (the License); you may
13 * not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
31 * This user manual describes the CMSIS DSP software library,
34 * The library is divided into a number of functions each covering a specific category:
46 * The library has separate functions for operating on 8-bit integers, 16-bit integers,
49 * Using the Library
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| /hal_nxp-latest/zephyr/blobs/license/ |
| D | LA_OPT_NXP_Software_License.txt | 2 IMPORTANT. Read the following NXP Software License Agreement ("Agreement")
3 completely. By selecting the "I Accept" button at the end of this page, or by
4 downloading, installing, or using the Licensed Software, you indicate that you
5 accept the terms of the Agreement, and you acknowledge that you have the
7 these terms. You may then download or install the file. In the event of a
8 conflict between the terms of this Agreement and any license terms and
9 conditions for NXP’s proprietary software embedded anywhere in the Licensed
10 Software file, the terms of this Agreement shall control. If a separate
11 license agreement for the Licensed Software has been signed by you and NXP,
12 then that agreement shall govern your use of the Licensed Software and shall
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|
| /hal_nxp-latest/mcux/mcux-sdk/ |
| D | LA_OPT_NXP_Software_License.txt | 2 IMPORTANT. Read the following NXP Software License Agreement ("Agreement")
3 completely. By selecting the "I Accept" button at the end of this page, or by
4 downloading, installing, or using the Licensed Software, you indicate that you
5 accept the terms of the Agreement, and you acknowledge that you have the
7 these terms. You may then download or install the file. In the event of a
8 conflict between the terms of this Agreement and any license terms and
9 conditions for NXP’s proprietary software embedded anywhere in the Licensed
10 Software file, the terms of this Agreement shall control. If a separate
11 license agreement for the Licensed Software has been signed by you and NXP,
12 then that agreement shall govern your use of the Licensed Software and shall
[all …]
|
| /hal_nxp-latest/mcux/mcux-sdk/drivers/lmem/ |
| D | fsl_lmem_cache.c | 27 * brief Enables/disables the processor code bus cache.
28 * This function enables/disables the cache. The function first invalidates the entire cache
29 * and then enables/disables both the cache and write buffers.
32 * param enable The enable or disable flag.
33 * true - enable the code cache.
34 * false - disable the code cache.
40 /* First, invalidate the entire cache. */ in LMEM_EnableCodeCache()
43 /* Now enable the cache. */ in LMEM_EnableCodeCache()
51 /* Now disable the cache. */ in LMEM_EnableCodeCache()
57 * brief Invalidates the processor code bus cache.
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| D | fsl_lmem_cache.h | 83 * @brief Enables/disables the processor code bus cache.
84 * This function enables/disables the cache. The function first invalidates the entire cache
85 * and then enables/disables both the cache and write buffers.
88 * @param enable The enable or disable flag.
89 * true - enable the code cache.
90 * false - disable the code cache.
95 * @brief Enables/disables the processor code bus write buffer.
98 * @param enable The enable or disable flag.
99 * true - enable the code bus write buffer.
100 * false - disable the code bus write buffer.
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/MatrixFunctions/ |
| D | arm_mat_inverse_f32.c | 16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
39 Computes the inverse of a matrix.
41 …The inverse is defined only if the input matrix is square and non-singular (the determinant is non…
42 The function checks that the input and output matrices are square and of the same size.
44 Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_enet/ |
| D | fsl_enet.h | 23 /*! @brief Defines the driver version. */
27 /*! @name Control and status region bit masks of the receive buffer descriptor. */
57 /*! @name Control and status bit masks of the transmit buffer descriptor. */
101 #define ENET_RING_NUM_MAX (2U) /*!< The maximum number of Tx/Rx descriptor rings. */
102 #define ENET_MTL_RXFIFOSIZE (2048U) /*!< The Rx fifo size. */
103 #define ENET_MTL_TXFIFOSIZE (2048U) /*!< The Tx fifo size. */
104 #define ENET_MACINT_ENUM_OFFSET (16U) /*!< The offset for mac interrupt in enum type. */
105 #define ENET_FRAME_TX_LEN_LIMITATION (ENET_TXDESCRIP_RD_BL1_MASK) /*!< The Tx frame length software…
106 #define ENET_FRAME_RX_ERROR_BITS(x) (((x) >> 19U) & 0x3FU) /*!< The Rx frame error bits fiel…
109 /*! @brief Defines the status return codes for transaction. */
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/enet_qos/ |
| D | fsl_enet_qos.h | 34 /*! @brief Defines the driver version. */
38 /*! @name Control and status region bit masks of the receive buffer descriptor. */
74 /*! @name Control and status bit masks of the transmit buffer descriptor. */
114 #define ENET_QOS_RING_NUM_MAX (5U) /*!< The Maximum number of tx/rx descriptor rings. */
120 #define ENET_QOS_MTL_RXFIFOSIZE (8192U) /*!< The rx fifo size. */
121 #define ENET_QOS_MTL_TXFIFOSIZE (8192U) /*!< The tx fifo size. */
122 #define ENET_QOS_MACINT_ENUM_OFFSET (16U) /*!< The offest for mac interrupt in enum type. */
125 #define ENET_QOS_EST_WID (24U) /*!< Width of the time interval in Gate Control List */
129 /*! @brief Defines the status return codes for transaction. */
155 /*! @brief Defines the MII/RGMII mode for data interface between the MAC and the PHY. */
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| /hal_nxp-latest/mcux/mcux-sdk/scripts/kconfig/ |
| D | kconfiglib.py | 12 See the homepage at https://github.com/ulfalizer/Kconfiglib for a longer
15 Since Kconfiglib 12.0.0, the library version is available in
20 Using Kconfiglib on the Linux kernel with the Makefile targets
23 For the Linux kernel, a handy interface is provided by the
25 the 'patch' utility:
30 Warning: Not passing -p1 to patch will cause the wrong file to be patched.
32 Please tell me if the patch does not apply. It should be trivial to apply
33 manually, as it's just a block of text that needs to be inserted near the other
36 Look further down for a motivation for the Makefile patch and for instructions
39 If you do not wish to install Kconfiglib via pip, the Makefile patch is set up
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| /hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/include/ |
| D | Gmac_Ip.h | 98 * @brief Initializes the GMAC module
100 * This function initializes and enables the GMAC module, configuring receive and transmit control
101 * settings, the receive and transmit descriptors rings, and the MAC physical address.
104 * packets are routed depending on the VLAN Tag Priority field according to
105 * the provided configuration.
108 * @param[in] config Pointer to the module configuration structure
110 * @retval GMAC_STATUS_SUCCESS The initialization was successful.
111 * @retval GMAC_STATUS_TIMEOUT The DMA subsystem reset could not complete.
117 * @brief Deinitializes the GMAC module
119 * This function disables the interrupts and then disables the GMAC module.
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