Lines Matching full:the
83 * @brief Enables/disables the processor code bus cache.
84 * This function enables/disables the cache. The function first invalidates the entire cache
85 * and then enables/disables both the cache and write buffers.
88 * @param enable The enable or disable flag.
89 * true - enable the code cache.
90 * false - disable the code cache.
95 * @brief Enables/disables the processor code bus write buffer.
98 * @param enable The enable or disable flag.
99 * true - enable the code bus write buffer.
100 * false - disable the code bus write buffer.
115 * @brief Invalidates the processor code bus cache.
116 * This function invalidates the cache both ways, which means that
124 * @brief Pushes all modified lines in the processor code bus cache.
125 * This function pushes all modified lines in both ways in the entire cache.
126 * It pushes a cache entry if it is valid and modified and clears the modified bit. If
127 * the entry is not valid or not modified, leave as is. This action does not clear the valid
135 * @brief Clears the processor code bus cache.
136 * This function clears the entire cache and pushes (flushes) and
137 * invalidates the operation.
138 * Clear - Pushes a cache entry if it is valid and modified, then clears the valid and
139 * modified bits. If the entry is not valid or not modified, clear the valid bit.
146 * @brief Invalidates a specific line in the processor code bus cache.
147 * This function invalidates a specific line in the cache
148 * based on the physical address passed in by the user.
152 * @param address The physical address of the cache line. Should be 16-byte aligned address.
153 * If not, it is changed to the 16-byte aligned memory address.
158 * @brief Invalidates multiple lines in the processor code bus cache.
159 * This function invalidates multiple lines in the cache
160 * based on the physical address and length in bytes passed in by the
161 * user. If the function detects that the length meets or exceeds half the
162 * cache, the function performs an entire cache invalidate function, which is
163 * more efficient than invalidating the cache line-by-line.
164 …* Because the cache consists of two ways and line commands based on the physical address searches …
165 * check half the total amount of cache.
169 * @param address The physical address of the cache line. Should be 16-byte aligned address.
170 * If not, it is changed to the 16-byte aligned memory address.
171 * @param length The length in bytes of the total amount of cache lines.
176 * @brief Pushes a specific modified line in the processor code bus cache.
177 * This function pushes a specific modified line based on the physical address passed in
178 * by the user.
179 * Push - Push a cache entry if it is valid and modified, then clear the modified bit. If the
180 * entry is not valid or not modified, leave as is. This action does not clear the valid
184 * @param address The physical address of the cache line. Should be 16-byte aligned address.
185 * If not, it is changed to the 16-byte aligned memory address.
190 * @brief Pushes multiple modified lines in the processor code bus cache.
191 * This function pushes multiple modified lines in the cache
192 * based on the physical address and length in bytes passed in by the
193 * user. If the function detects that the length meets or exceeds half of the
194 * cache, the function performs an cache push function, which is
195 * more efficient than pushing the modified lines in the cache line-by-line.
196 …* Because the cache consists of two ways and line commands based on the physical address searches …
197 * check half the total amount of cache.
198 * Push - Push a cache entry if it is valid and modified, then clear the modified bit. If
199 * the entry is not valid or not modified, leave as is. This action does not clear the valid
203 * @param address The physical address of the cache line. Should be 16-byte aligned address.
204 * If not, it is changed to the 16-byte aligned memory address.
205 * @param length The length in bytes of the total amount of cache lines.
210 * @brief Clears a specific line in the processor code bus cache.
211 * This function clears a specific line based on the physical address passed in
212 * by the user.
213 * Clear - Push a cache entry if it is valid and modified, then clear the valid and
214 * modify bits. If entry not valid or not modified, clear the valid bit.
217 * @param address The physical address of the cache line. Should be 16-byte aligned address.
218 * If not, it is changed to the 16-byte aligned memory address.
223 * @brief Clears multiple lines in the processor code bus cache.
224 * This function clears multiple lines in the cache
225 * based on the physical address and length in bytes passed in by the
226 * user. If the function detects that the length meets or exceeds half the total amount of
227 * cache, the function performs a cache clear function which is
228 * more efficient than clearing the lines in the cache line-by-line.
229 …* Because the cache consists of two ways and line commands based on the physical address searches …
230 * check half the total amount of cache.
231 * Clear - Push a cache entry if it is valid and modified, then clear the valid and
232 * modify bits. If entry not valid or not modified, clear the valid bit.
235 * @param address The physical address of the cache line. Should be 16-byte aligned address.
236 * If not, it is changed to the 16-byte aligned memory address.
237 * @param length The length in bytes of the total amount of cache lines.
243 * @brief Demotes the cache mode of a region in processor code bus cache.
244 * This function allows the user to demote the cache mode of a region within the device's
245 * memory map. Demoting the cache mode reduces the cache function applied to a memory
246 * region from write-back to write-through to non-cacheable. The function checks to see
247 * if the requested cache mode is higher than or equal to the current cache mode, and if
249 * by a reset, which returns it to its default state which is the highest cache configure for
251 * To maintain cache coherency, changes to the cache mode should be completed while the
252 * address space being changed is not being accessed or the cache is disabled. Before a
257 * @param region The desired region to demote of type lmem_cache_region_t.
258 * @param cacheMode The new, demoted cache mode of type lmem_cache_mode_t.
259 * @return The execution result.
260 * kStatus_Success The cache demote operation is successful.
261 * kStatus_Fail The cache demote operation is failure.
275 * @brief Enables/disables the processor system bus cache.
276 * This function enables/disables the cache. It first invalidates the entire cache,
277 * then enables /disable both the cache and write buffer.
280 * @param enable The enable or disable flag.
281 * true - enable the system cache.
282 * false - disable the system cache.
287 * @brief Enables/disables the processor system bus write buffer.
290 * @param enable The enable or disable flag.
291 * true - enable the system bus write buffer.
292 * false - disable the system bus write buffer.
307 * @brief Invalidates the processor system bus cache.
308 * This function invalidates the entire cache both ways.
316 * @brief Pushes all modified lines in the processor system bus cache.
317 * This function pushes all modified lines in both ways (the entire cache).
318 * Push - Push a cache entry if it is valid and modified, then clear the modify bit. If
319 * the entry is not valid or not modified, leave as is. This action does not clear the valid
327 * @brief Clears the entire processor system bus cache.
328 * This function clears the entire cache, which is a push (flush) and
330 * Clear - Push a cache entry if it is valid and modified, then clear the valid and
331 * modify bits. If the entry is not valid or not modified, clear the valid bit.
338 * @brief Invalidates a specific line in the processor system bus cache.
339 * This function invalidates a specific line in the cache
340 * based on the physical address passed in by the user.
344 * If not, it is changed to the 16-byte aligned memory address.
345 * @param address The physical address of the cache line.
350 * @brief Invalidates multiple lines in the processor system bus cache.
351 * This function invalidates multiple lines in the cache
352 * based on the physical address and length in bytes passed in by the
353 * user. If the function detects that the length meets or exceeds half of the
354 * cache, the function performs an entire cache invalidate function (which is
355 * more efficient than invalidating the cache line-by-line).
356 …* Because the cache consists of two ways and line commands based on the physical address searches …
357 * check half the total amount of cache.
361 * @param address The physical address of the cache line. Should be 16-byte aligned address.
362 * If not, it is changed to the 16-byte aligned memory address.
363 * @param length The length in bytes of the total amount of cache lines.
368 * @brief Pushes a specific modified line in the processor system bus cache.
369 * This function pushes a specific modified line based on the physical address passed in
370 * by the user.
371 * Push - Push a cache entry if it is valid and modified, then clear the modify bit. If
372 * the entry is not valid or not modified, leave as is. This action does not clear the valid
376 * @param address The physical address of the cache line. Should be 16-byte aligned address.
377 * If not, it is changed to the 16-byte aligned memory address.
382 * @brief Pushes multiple modified lines in the processor system bus cache.
383 * This function pushes multiple modified lines in the cache
384 * based on the physical address and length in bytes passed in by the
385 * user. If the function detects that the length meets or exceeds half of the
386 * cache, the function performs an entire cache push function (which is
387 * more efficient than pushing the modified lines in the cache line-by-line).
388 …* Because the cache consists of two ways and line commands based on the physical address searches …
389 * check half the total amount of cache.
390 * Push - Push a cache entry if it is valid and modified, then clear the modify bit. If
391 * the entry is not valid or not modified, leave as is. This action does not clear the valid
395 * @param address The physical address of the cache line. Should be 16-byte aligned address.
396 * If not, it is changed to the 16-byte aligned memory address.
397 * @param length The length in bytes of the total amount of cache lines.
402 * @brief Clears a specific line in the processor system bus cache.
403 * This function clears a specific line based on the physical address passed in
404 * by the user.
405 * Clear - Push a cache entry if it is valid and modified, then clear the valid and
406 * modify bits. If the entry is not valid or not modified, clear the valid bit.
409 * @param address The physical address of the cache line. Should be 16-byte aligned address.
410 * If not, it is changed to the 16-byte aligned memory address.
415 * @brief Clears multiple lines in the processor system bus cache.
416 * This function clears multiple lines in the cache
417 * based on the physical address and length in bytes passed in by the
418 * user. If the function detects that the length meets or exceeds half of the
419 * cache, the function performs an entire cache clear function (which is
420 * more efficient than clearing the lines in the cache line-by-line).
421 …* Because the cache consists of two ways and line commands based on the physical address searches …
422 * check half the total amount of cache.
423 * Clear - Push a cache entry if it is valid and modified, then clear the valid and
424 * modify bits. If the entry is not valid or not modified, clear the valid bit.
427 * @param address The physical address of the cache line. Should be 16-byte aligned address.
428 * If not, it is changed to the 16-byte aligned memory address.
429 * @param length The length in bytes of the total amount of cache lines.
434 * @brief Demotes the cache mode of a region in the processor system bus cache.
435 * This function allows the user to demote the cache mode of a region within the device's
436 * memory map. Demoting the cache mode reduces the cache function applied to a memory
437 * region from write-back to write-through to non-cacheable. The function checks to see
438 * if the requested cache mode is higher than or equal to the current cache mode, and if
440 * by a reset, which returns it to its default state which is the highest cache configure
442 * To maintain cache coherency, changes to the cache mode should be completed while the
443 * address space being changed is not being accessed or the cache is disabled. Before a
448 * @param region The desired region to demote of type lmem_cache_region_t.
449 * @param cacheMode The new, demoted cache mode of type lmem_cache_mode_t.
450 * @return The execution result.
451 * kStatus_Success The cache demote operation is successful.
452 * kStatus_Fail The cache demote operation is failure.