Lines Matching full:the
23 /*! @brief Defines the driver version. */
27 /*! @name Control and status region bit masks of the receive buffer descriptor. */
57 /*! @name Control and status bit masks of the transmit buffer descriptor. */
101 #define ENET_RING_NUM_MAX (2U) /*!< The maximum number of Tx/Rx descriptor rings. */
102 #define ENET_MTL_RXFIFOSIZE (2048U) /*!< The Rx fifo size. */
103 #define ENET_MTL_TXFIFOSIZE (2048U) /*!< The Tx fifo size. */
104 #define ENET_MACINT_ENUM_OFFSET (16U) /*!< The offset for mac interrupt in enum type. */
105 #define ENET_FRAME_TX_LEN_LIMITATION (ENET_TXDESCRIP_RD_BL1_MASK) /*!< The Tx frame length software…
106 #define ENET_FRAME_RX_ERROR_BITS(x) (((x) >> 19U) & 0x3FU) /*!< The Rx frame error bits fiel…
109 /*! @brief Defines the status return codes for transaction. */
127 /*! @brief Defines the MII/RMII mode for data interface between the MAC and the PHY. */
134 /*! @brief Defines the 10/100 Mbps speed for the MII data interface. */
141 /*! @brief Defines the half or full duplex for the MII data interface. */
148 /*! @brief Define the MII opcode for normal MDIO_CLAUSES_22 Frame. */
155 /*! @brief Define the DMA maximum transmit burst length. */
169 /*! @brief Define the flag for the descriptor. */
172 kENET_MiddleFlag = 0, /*!< It's a middle descriptor of the frame. */
173 kENET_LastFlagOnly, /*!< It's the last descriptor of the frame. */
174 kENET_FirstFlagOnly, /*!< It's the first descriptor of the frame. */
175 kENET_FirstLastFlag /*!< It's the first and last descriptor of the frame. */
178 /*! @brief Define the system time adjust operation control. */
185 /*! @brief Define the system time rollover control. */
196 * But if you have some special requirements, set the flags to specialControl
197 * in the enet_config_t.
198 * @note "kENET_StoreAndForward" is recommended to be set when the
199 * ENET_PTP1588FEATURE_REQUIRED is defined or else the timestamp will be mess-up
200 * when the overflow happens.
205 kENET_DescDoubleBuffer = 0x0001U, /*!< The double buffer is used in the Tx/Rx descriptor. */
207 kENET_StoreAndForward = 0x0002U, /*!< The Rx/Tx store and forward enable. */
209 kENET_PromiscuousEnable = 0x0004U, /*!< The promiscuous enabled. */
210 kENET_FlowControlEnable = 0x0008U, /*!< The flow control enabled. */
211 kENET_BroadCastRxDisable = 0x0010U, /*!< The broadcast disabled. */
214 kENET_RxChecksumOffloadEnable = 0x0080U, /*!< The Rx checksum offload enabled. */
217 /*! @brief List of DMA interrupts supported by the ENET interrupt. This
235 /*! @brief List of mac interrupts supported by the ENET interrupt. This
245 /*! @brief Defines the common interrupt event for callback use. */
254 /*! @brief Define the DMA transmit arbitration for multi-queue. */
262 /*! @brief Define the MTL Tx scheduling algorithm for multiple queues/rings. */
269 /*! @brief Define the MTL Rx scheduling algorithm for multiple queues/rings. */
276 /*! @brief Define the MTL Rx queue and DMA channel mapping. */
279 …kENET_StaticDirctMap = 0x100U, /*!< The received fame in Rx Qn(n = 0,1) direclty map to dma channe…
281 …0x1010U, /*!< The received frame in Rx Qn(n = 0,1) map to the dma channel m(m = 0,1) related with …
285 /*! @brief Defines the ENET PTP message related constant. */
294 /*! @brief Define the Tx checksum offload options. */
303 /*! @brief Defines the receive descriptor structure
304 * It has the read-format and write-back format structures. They both
305 * have the same size with different region definition. So we define
306 * common name as the recive descriptor structure. When initialize
307 * the buffer descriptors, read-format region mask bits should be used.
308 * When Rx frame has been in the buffer descriptors, write-back format
309 * region store the Rx result information.
319 /*! @brief Defines the transmit descriptor structure
320 * It has the read-format and write-back format structure. They both
321 * has the same size with different region definition. So we define
322 * common name as the transmit descriptor structure. When initialize
323 * the buffer descriptors for Tx, read-format region mask bits should
325 * store the Tx result information.
335 /*! @brief Defines the Tx BD configuration structure. */
338 void *buffer1; /*!< The first buffer address in the descriptor. */
339 uint32_t bytes1; /*!< The bytes in the fist buffer. */
340 void *buffer2; /*!< The second buffer address in the descriptor. */
341 uint32_t bytes2; /*!< The bytes in the second buffer. */
342 uint32_t framelen; /*!< The length of the frame to be transmitted. */
344 bool tsEnable; /*!< The timestamp enable. */
345 enet_tx_offload_t txOffloadOps; /*!< The Tx checksum offload option, only vaild for Queue 0. */
346 … enet_desc_flag_t flag; /*!< The flag of this tx desciriptor, see "enet_qos_desc_flag". */
347 uint8_t slotNum; /*!< The slot number used for AV mode only. */
351 /*! @brief Defines the ENET PTP configuration structure. */
354 bool fineUpdateEnable; /*!< Use the fine update. */
360 /*! @brief Defines the ENET PTP time stamp structure. */
367 /*! @brief Defines the Tx reclaim information structure. */
375 /*! @brief Defines the ENET transmit dirty addresses ring/queue structure. */
385 /*! @brief Defines the buffer descriptor configure structure.
388 …* 1. The receive and transmit descriptor start address pointer and tail pointer must be word-align…
389 * 2. The recommended minimum Tx/Rx ring length is 4.
390 …* 3. The Tx/Rx descriptor tail address shall be the address pointer to the address just after the …
391 * of the last last descriptor. because only the descriptors between the start address and the
393 * 4. The decriptor address is the start address of all used contiguous memory.
394 …* for example, the rxDescStartAddrAlign is the start address of rxRingLen contiguous descriptor…
396 * 5. The "*rxBufferstartAddr" is the first element of rxRingLen (2*rxRingLen for double buffers)
397 * Rx buffers. It means the *rxBufferStartAddr is the Rx buffer for the first descriptor
398 * the *rxBufferStartAddr + 1 is the Rx buffer for the second descriptor or the Rx buffer for
399 * the second buffer in the first descriptor. So please make sure the rxBufferStartAddr is the
404 uint8_t rxRingLen; /*!< The length of receive buffer descriptor ring. */
405 … uint8_t txRingLen; /*!< The length of transmit buffer descriptor ring. */
408 …enet_tx_reclaim_info_t *txDirtyStartAddr; /*!< Start address of the dirty Tx frame information. */
411 uint32_t *rxBufferStartAddr; /*!< Start address of the Rx buffers. */
415 /*! @brief Defines the configuration when multi-queue is used. */
420 enet_dma_burstlen_t burstLen; /*!< Burset len for the queue 1. */
425 uint8_t rxqueweight[ENET_RING_NUM_MAX]; /*!< Refer to the MTL RxQ Control register. */
426 uint32_t txqueweight[ENET_RING_NUM_MAX]; /*!< Refer to the MTL TxQ Quantum Weight register. */
432 /*! @brief Defines the Rx memory buffer alloc function pointer. */
435 /*! @brief Defines the Rx memory buffer free function pointer. */
438 /*! @brief Defines the basic configuration structure for the ENET device.
441 * 1. Default the signal queue is used so the "multiqueueCfg" is set default
442 * with NULL. Set the pointer with a valid configration pointer if the multiple
443 * queues are required. If multiple queue is enabled, please make sure the
448 uint16_t specialControl; /*!< The logicl or of enet_special_config_t */
456 …uint16_t pauseDuration; /*!< Used in the Tx flow control frame, only valid when kENET_FlowControlE…
466 /* Forward declaration of the handle typedef. */
477 /*! @brief Defines the ENET transmit buffer descriptor ring/queue structure. */
487 /*! @brief Defines the ENET receive buffer descriptor ring/queue structure. */
491 uint16_t rxGenIdx; /*!< The current available receive buffer descriptor pointer. */
496 /*! @brief Defines the ENET handler structure. */
500 bool doubleBuffEnable; /*!< The double buffer enable status. */
505 …uint32_t *rxBufferStartAddr[ENET_RING_NUM_MAX]; /*!< The Init-Rx buffers used for reinit corr…
516 void *buffer; /*!< The buffer stores the whole or partial frame. */
517 uint16_t length; /*!< The byte length of this buffer. */
524 enet_ptp_time_t timestamp; /*!< The nanosecond part timestamp of this Rx frame. */
527 /*! @brief Defines the Rx frame error structure. */
530 …bool statsDribbleErr : 1; /*!< The received packet has a non-integer multiple of bytes (od…
538 /*! @brief Defines the Rx frame data structure. */
585 * @brief Gets the ENET default configuration structure.
587 * The purpose of this API is to get the default ENET configure
588 * structure for ENET_Init(). User may use the initialized
589 * structure unchanged in ENET_Init(), or modify some fields of the
596 * @param config The ENET mac controller configuration structure pointer.
601 * @brief Initializes the ENET module.
603 * This function ungates the module clock and initializes it with the ENET basic
605 * @note As our transactional transmit API use the zero-copy transmit buffer.
607 * 1. Tx buffer free/requeue for application should be done in the Tx
610 * 2. The Tx interrupt is forced to open.
614 * The "enet_config_t" type mac configuration return from ENET_GetDefaultConfig
615 …* can be used directly. It is also possible to verify the Mac configuration using other met…
623 * @brief Deinitializes the ENET module.
625 * This function gates the module clock and disables the ENET module.
634 * @note This function finishes all Tx/Rx descriptors initialization. The descriptor initialization
638 * @param config The configuration for ENET.
647 * to get Rx frame with zero copy, it will allocate new buffer to replace the buffer in BD taken
654 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
664 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
669 * @brief Starts the ENET Tx/Rx.
670 * This function enable the Tx/Rx and starts the Tx/Rx DMA.
672 * starting to receive the data.
675 * @param rxRingNum The number of the used Rx rings. It shall not be
676 * larger than the ENET_RING_NUM_MAX(2). If the ringNum is set with
677 * 1, the ring 0 will be used.
678 * @param txRingNum The number of the used Tx rings. It shall not be
679 * larger than the ENET_RING_NUM_MAX(2). If the ringNum is set with
680 * 1, the ring 0 will be used.
682 * @note This must be called after all the ENET initilization.
683 * And should be called when the ENET receive/transmit is required.
688 * @brief Set the second level IRQ handler
691 * @param ISRHandler The handler to install.
703 * @brief Sets the ENET MII speed and duplex.
705 * This API is provided to dynamically change the speed and dulpex for MAC.
708 * @param speed The speed of the RMII mode.
709 * @param duplex The duplex of the RMII mode.
720 * @brief Sets the ENET SMI(serial management interface)- MII management interface.
727 * @brief Checks if the SMI is busy.
730 * @return The status of MII Busy status.
738 * @brief Reads data from the PHY register through SMI interface.
741 * @return The data read from PHY
749 * @brief Sends the MDIO IEEE802.3 Clause 22 format write command.
752 * @param phyAddr The PHY address.
753 * @param regAddr The PHY register.
754 * @param data The data written to PHY.
759 * @brief Sends the MDIO IEEE802.3 Clause 22 format read command.
762 * @param phyAddr The PHY address.
763 * @param regAddr The PHY register.
771 * @param phyAddr The PHY address.
772 * @param regAddr The PHY register.
773 * @param data The data written to PHY.
783 * @param phyAddr The PHY address.
784 * @param regAddr The PHY register.
785 * @param pData The data read from PHY.
798 * @brief Get the ENET instance from peripheral base address.
806 * @brief Sets the ENET module Mac address.
809 * @param macAddr The six-byte Mac address pointer.
810 * The pointer is allocated by application and input into the API.
819 …/* Set Macaddr, the MAC address registers are configured to be double-synchronized to the MII clock in ENET_SetMacAddr()
820 domains, then the synchronization is triggered only when bits 31:24 (in little-endian mode) in ENET_SetMacAddr()
821 or bits 7:0 (in Big-Endian mode) of the MAC address low register are written to.*/ in ENET_SetMacAddr()
827 * @brief Gets the ENET module Mac address.
830 * @param macAddr The six-byte Mac address pointer.
831 * The pointer is allocated by application and input into the API.
860 * @brief Set the MAC to enter into power down mode.
861 * the remote power wake up frame and magic frame can wake up
862 * the ENET from the power down mode.
865 * @param wakeFilter The wakeFilter provided to configure the wake up frame fitlter.
866 * Set the wakeFilter to NULL is not required. But if you have the filter requirement,
867 * please make sure the wakeFilter pointer shall be eight continous
873 * @brief Set the MAC to exit power down mode.
874 * Eixt from the power down mode and recover to normal work mode.
880 /* Clear and status ans reset the power down. */ in ENET_ExitPowerDown()
883 /* Restore the Tx which is disabled when enter power down mode. */ in ENET_ExitPowerDown()
897 * @brief Enables the ENET DMA and MAC interrupts.
899 * This function enables the ENET interrupt according to the provided mask. The mask
901 * For example, to enable the dma and mac interrupt, do the following.
913 * @brief Disables the ENET DMA and MAC interrupts.
915 * This function disables the ENET interrupt according to the provided mask. The mask
917 * For example, to disable the dma and mac interrupt, do the following.
929 * @brief Gets the ENET DMA interrupt status flag.
932 * @param channel The DMA Channel. Shall not be larger than ENET_RING_NUM_MAX.
933 * @return The event status of the interrupt source. This is the logical OR of members
934 * of the enumeration :: enet_dma_interrupt_enable_t.
942 * @brief Clear the ENET DMA interrupt status flag.
945 * @param channel The DMA Channel. Shall not be larger than ENET_RING_NUM_MAX.
946 * @param mask The event status of the interrupt source. This is the logical OR of members
947 * of the enumeration :: enet_dma_interrupt_enable_t.
951 /* Clear the dam interrupt status bit in dma channel interrupt status register. */ in ENET_ClearDmaInterruptStatus()
956 * @brief Gets the ENET MAC interrupt status flag.
959 * @return The event status of the interrupt source.
960 * Use the enum in enet_mac_interrupt_enable_t and right shift
961 * ENET_MACINT_ENUM_OFFSET to mask the returned value to get the
970 * @brief Clears the ENET mac interrupt events status flag.
972 * This function clears enabled ENET interrupts according to the provided mask. The mask
973 * is a logical OR of enumeration members. See the @ref enet_mac_interrupt_enable_t.
974 * For example, to clear the TX frame interrupt and RX frame interrupt, do the following.
981 * This is the logical OR of members of the enumeration :: enet_mac_interrupt_enable_t.
993 * @brief Get the Tx descriptor DMA Own flag.
995 * @param txDesc The given Tx descriptor.
996 * @retval True the dma own Tx descriptor, false application own Tx descriptor.
1009 * @param txDesc The given Tx descriptor.
1010 * @param buffer1 The first buffer address in the descriptor.
1011 * @param bytes1 The bytes in the fist buffer.
1012 * @param buffer2 The second buffer address in the descriptor.
1013 * @param bytes2 The bytes in the second buffer.
1014 * @param framelen The length of the frame to be transmitted.
1016 * @param tsEnable The timestamp enable.
1017 * @param flag The flag of this Tx desciriptor, see "enet_desc_flag_t" .
1018 * @param slotNum The slot num used for AV mode only.
1020 * @note This must be called after all the ENET initilization.
1021 * And should be called when the ENET receive/transmit is required.
1022 * Transmit buffers are 'zero-copy' buffers, so the buffer must remain in
1023 * memory until the packet has been fully transmitted. The buffers
1024 * should be free or requeued in the transmit interrupt irq handler.
1038 * @brief Update the Tx descriptor tail pointer.
1039 * This function is a low level functional API to update the
1040 * the Tx descriptor tail.
1042 * the tail pointer to make the new descritor accessable by DMA.
1045 * @param channel The Tx DMA channel.
1046 * @param txDescTailAddrAlign The new Tx tail pointer address.
1055 * @brief Update the Rx descriptor tail pointer.
1056 * This function is a low level functional API to update the
1057 * the Rx descriptor tail.
1059 * the tail pointer to make the new descritor accessable by DMA
1060 * and to anouse the Rx poll command for DMA.
1063 * @param channel The Rx DMA channel.
1064 * @param rxDescTailAddrAlign The new Rx tail pointer address.
1073 * @brief Gets the context in the ENET Rx descriptor.
1074 * This function is a low level functional API to get the
1075 * the status flag from a given Rx descriptor.
1077 * @param rxDesc The given Rx descriptor.
1078 * @retval The RDES3 regions for write-back format Rx buffer descriptor.
1080 * @note This must be called after all the ENET initilization.
1081 * And should be called when the ENET receive/transmit is required.
1090 * @brief Updates the buffers and the own status for a given Rx descriptor.
1091 * This function is a low level functional API to Updates the
1092 * buffers and the own status for a given Rx descriptor.
1094 * @param rxDesc The given Rx descriptor.
1095 * @param buffer1 The first buffer address in the descriptor.
1096 * @param buffer2 The second buffer address in the descriptor.
1098 * @param doubleBuffEnable The double buffer enable flag.
1100 * @note This must be called after all the ENET initilization.
1101 * And should be called when the ENET receive/transmit is required.
1117 * during the whole transactional process. This API should not be used when you use
1125 * @param callback The callback function.
1126 * @param userData The application data.
1136 * @brief Gets the size of the read frame.
1137 * This function gets a received frame size from the ENET buffer descriptors.
1138 …* @note The FCS of the frame is automatically removed by MAC and the size is the length without th…
1139 * After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to update the
1140 * receive buffers If the result is not "kStatus_ENET_RxFrameEmpty".
1143 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
1144 * @param length The length of the valid frame received.
1145 * @param channel The DMAC channel for the Rx.
1148 * and NULL length to update the receive buffers.
1149 * @retval kStatus_Success Receive a frame Successfully then the ENET_ReadFrame
1150 * should be called with the right data buffer and the captured data length input.
1155 * @brief Reads a frame from the ENET device.
1156 * This function reads a frame from the ENET DMA descriptors.
1157 * The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer.
1162 * Comment: Get the received frame size firstly.
1166 * Comment: Allocate memory here with the size of "length"
1179 * Comment: Update the received buffer when a error frame is received.
1184 * @param handle The ENET handler structure. This is the same handler pointer used in the ENET_Init.
1185 …* @param data The data buffer provided by user to store the frame which memory size should be at l…
1186 * @param length The size of the data buffer which is still the length of the received frame.
1187 * @param channel The Rx DMA channel. Shall not be larger than 2.
1188 * @param timestamp The timestamp address to store received timestamp.
1189 * @return The execute status, successful or failure.
1201 …* This function will use the user-defined allocate and free callback. Every time application gets …
1202 …* this function, driver will allocate new buffers for the BDs whose buffers have been taken by app…
1208 * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
1209 * @param rxFrame The received frame information structure provided by user.
1210 * @param channel The Rx DMA channel. Shall not be larger than 2.
1212 * @retval kStatus_ENET_RxFrameEmpty There's no Rx frame in the BD.
1220 * @note The CRC is automatically appended to the data. Input the data
1221 * to send without the CRC. This API uses input buffer for Tx, application
1222 * should reclaim the buffer after Tx is over.
1225 * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
1226 * @param txFrame The Tx frame structure.
1227 * @param channel Channel to send the frame, same with queue index.
1230 * The transmit busy happens when the data send rate is over the MAC capacity.
1231 …* The waiting mechanism is recommended to be added after each call return with kStatus_ENE…
1233 …al kStatus_ENET_TxFrameOverLen Transmit frme length exceeds the 0x3FFF limit defined by the drive…
1239 * This function is used to update the Tx descriptor status and
1240 * store the Tx timestamp when the 1588 feature is enabled.
1241 * This is called by the transmit interupt IRQ handler after the
1245 * @param handle The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
1246 * @param channel The Tx DMA channnel.
1252 * @brief The ENET IRQ handler.
1255 * @param handle The ENET handler pointer.
1268 * @brief Coreect the ENET PTP 1588 timer in coarse method.
1271 * @param operation The system time operation, refer to "enet_systime_op_t"
1272 * @param second The correction second.
1273 * @param nanosecond The correction nanosecond.
1281 * @brief Coreect the ENET PTP 1588 timer in fine method.
1285 * @param addend The addend value to be set in the fine method
1286 * @note Should take refer to the chapter "System time corretion" and
1287 * see the description for the "fine correction method".
1291 /* Set the freqCompensation value. */ in ENET_Ptp1588CorrectTimerInFine()
1297 * @brief Get the ENET Time stamp current addend value.
1300 * @return The addend value.
1308 * @brief Gets the current ENET time from the PTP 1588 timer.
1312 * @param second The PTP 1588 system timer second.
1313 * @param nanosecond The PTP 1588 system timer nanosecond.
1318 * @brief Gets the current ENET time from the PTP 1588 timer.
1321 * @param second The PTP 1588 system timer second.
1322 * @param nanosecond The PTP 1588 system timer nanosecond.
1323 * For the unit of the nanosecond is 1ns. So the nanosecond is the real nanosecond.