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/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Dfsl_xcvr.h81 /* NOTE: These timings are stored in 32MHz or 26MHz "baseline" settings, selected by conditional co…
83 /* settings for all radio generations. The Gen2 radio init value storage had a different structure …
214 #define TX_DIG_EN_ASSERT (95) /* Assertion time for TX_DIG_EN, used in mode specific settings */
456 /*! @brief Control settings for Fast Antenna Diversity */
741 …* This structure is used to store all of the XCVR settings which are dependent upon both radio mod…
775 …* This structure is used to store all of the XCVR settings which are dependent upon data rate. It …
783 uint32_t phy_el_cfg_init; /* Note: EL_ENABLE is set in xcvr_mode_config_t settings */
829 extern const xcvr_datarate_config_t xcvr_802_15_4_500kbps_config; /* Custom datarate settings for 8…
879 …* This function initializes the XCVR module according to the radio_mode and data_rate settings. Th…
904 * copied to variable structures if changes to settings are required.
[all …]
Dfsl_xcvr_trim.c141 /* DCOC_CTRL_0 @ 4005_C02C -- Define default DCOC DAC settings in manual mode. */ in rx_bba_dcoc_dac_trim_shortIQ()
266 XCVR_RX_DIG->DCOC_CTRL_0 = dcoc_ctrl_0_stack; /* Restore DCOC_CTRL_0 state to prior settings. */ in rx_bba_dcoc_dac_trim_shortIQ()
267 XCVR_RX_DIG->DCOC_CTRL_1 = dcoc_ctrl_1_stack; /* Restore DCOC_CTRL_1 state to prior settings. */ in rx_bba_dcoc_dac_trim_shortIQ()
268 XCVR_RX_DIG->RX_DIG_CTRL = rx_dig_ctrl_stack; /* Restore RX_DIG_CTRL state to prior settings. */ in rx_bba_dcoc_dac_trim_shortIQ()
610 /* DCOC_CTRL_0 @ 4005_C02C -- Define default DCOC DAC settings in manual mode */ in rx_bba_dcoc_dac_trim_DCest()
749 XCVR_RX_DIG->DCOC_CTRL_0 = dcoc_ctrl_0_stack; /* Restore DCOC_CTRL_0 state to prior settings */ in rx_bba_dcoc_dac_trim_DCest()
750 XCVR_RX_DIG->DCOC_CTRL_1 = dcoc_ctrl_1_stack; /* Restore DCOC_CTRL_1 state to prior settings */ in rx_bba_dcoc_dac_trim_DCest()
751 XCVR_RX_DIG->RX_DIG_CTRL = rx_dig_ctrl_stack; /* Restore RX_DIG_CTRL state to prior settings */ in rx_bba_dcoc_dac_trim_DCest()
815 /* DCOC_CTRL_0 @ 4005_C02C -- Define default DCOC DAC settings in manual mode */ in DCOC_DAC_INIT_Cal()
989 XCVR_RX_DIG->DCOC_CTRL_0 = dcoc_ctrl_0_stack; /* Restore DCOC_CTRL_0 state to prior settings */ in DCOC_DAC_INIT_Cal()
[all …]
/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW40Z4/
DKW4xXcvrDrv.c595 /* Change only mode dependent analog & TSM settings */ in XcvrInit_ModeChg_Common()
601 /* Setup initial analog & TSM settings */ in XcvrInit_ModeChg_Common()
606 /* RX Channel filter coeffs and TSM settings are specific to modes */ in XcvrInit_ModeChg_Common()
625 /* DCOC_CTRL_0 & RX_DIG_CTRL settings done separately from other RX_DIG*/ in XcvrInit_ModeChg_Common()
659 /* DCOC_CTRL_0 & RX_DIG_CTRL settings done separately from other RX_DIG*/ in XcvrInit_ModeChg_Common()
696 /* DCOC_CTRL_0 & RX_DIG_CTRL settings done separately from other RX_DIG*/ in XcvrInit_ModeChg_Common()
725 * Manipulates AGC settings during the calibration and then reverts them in XcvrInit_ModeChg_Common()
747 * \param[in] radioMode Radio mode is used to enable mode specific settings.
819 * \param[in] radioMode Radio mode is used to enable mode specific settings.
853 * \details Sets up RX digital registers with command and mode specific settings.
[all …]
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
Dfsl_pgmc.h249 * @note If locked access related settings, the setting via this function is useless.
271 * @note If locked access related settings, the setting via this function is useless.
291 …* @brief Locks access related settings for the BPC module, including Secure access setting and use…
293 * @note This function used to lock access related settings. After locked the related bit field
487 * @note If locked access related settings, the setting via this function is useless.
509 * @note If locked access related settings, the setting via this function is useless.
529 …* @brief Locks access related settings, including secure access setting and user access setting, f…
531 * @note This function used to lock access related settings. After locked the related bit field
681 * @note If locked access related settings, the setting via this function is useless.
703 * @note If locked access related settings, the setting via this function is useless.
[all …]
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.h77 * Some MCG settings must be changed with conditions, for example:
78 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
553 /* ----------------------- MCGIRCCLK settings ------------------------ */
558 /* ------------------------ MCG FLL settings ------------------------- */
564 /* ------------------------ MCG PLL settings ------------------------- */
708 * This function sets system layer clock settings in SIM module.
786 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
942 * @brief Sets the XTAL0 frequency based on board settings.
953 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1098 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
Dfsl_clock.h48 * Some MCG settings must be changed with conditions, for example:
49 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
586 /* ----------------------- MCGIRCCLK settings ------------------------ */
591 /* ------------------------ MCG FLL settings ------------------------- */
597 /* ------------------------ MCG PLL settings ------------------------- */
780 * This function sets system layer clock settings in SIM module.
867 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1133 * @brief Sets the XTAL0 frequency based on board settings.
1143 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1322 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
Dfsl_clock.h48 * Some MCG settings must be changed with conditions, for example:
49 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
586 /* ----------------------- MCGIRCCLK settings ------------------------ */
591 /* ------------------------ MCG FLL settings ------------------------- */
597 /* ------------------------ MCG PLL settings ------------------------- */
780 * This function sets system layer clock settings in SIM module.
867 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1133 * @brief Sets the XTAL0 frequency based on board settings.
1143 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1322 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.h48 * Some MCG settings must be changed with conditions, for example:
49 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
556 /* ----------------------- MCGIRCCLK settings ------------------------ */
561 /* ------------------------ MCG FLL settings ------------------------- */
566 /* ------------------------ MCG PLL settings ------------------------- */
728 * This function sets system layer clock settings in SIM module.
815 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1072 * @brief Sets the XTAL0 frequency based on board settings.
1082 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1261 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_clock.c18 achieve better performance, it is depend on the IDE Floating point settings, if double precision is…
487 * This function initialize the ARM PLL with specific settings
520 * This function initializes the System PLL with specific settings
562 * This function initializes the USB1 PLL with specific settings
595 * This function initializes the USB2 PLL with specific settings
628 * This function initializes the Audio PLL with specific settings
715 * This function configures the Video PLL with specific settings
801 * This function initializes the ENET PLL with specific settings.
1069 * note It is recommended that PFD settings are kept between 12-35.
1107 * note It is recommended that PFD settings are kept between 12-35.
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_clock.c18 achieve better performance, it is depend on the IDE Floating point settings, if double precision is…
495 * This function initialize the ARM PLL with specific settings
528 * This function initializes the System PLL with specific settings
570 * This function initializes the USB1 PLL with specific settings
603 * This function initializes the USB2 PLL with specific settings
636 * This function initializes the Audio PLL with specific settings
723 * This function configures the Video PLL with specific settings
809 * This function initializes the ENET PLL with specific settings.
1090 * note It is recommended that PFD settings are kept between 12-35.
1128 * note It is recommended that PFD settings are kept between 12-35.
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
598 /* ----------------------- MCGIRCCLK settings ------------------------ */
603 /* ------------------------ MCG FLL settings ------------------------- */
609 /* ------------------------ MCG PLL settings ------------------------- */
826 * This function sets system layer clock settings in SIM module.
912 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1180 * @brief Sets the XTAL0 frequency based on board settings.
1190 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1389 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MK64F12/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
639 /* ----------------------- MCGIRCCLK settings ------------------------ */
644 /* ------------------------ MCG FLL settings ------------------------- */
650 /* ------------------------ MCG PLL settings ------------------------- */
873 * This function sets system layer clock settings in SIM module.
959 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1225 * @brief Sets the XTAL0 frequency based on board settings.
1235 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1434 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
664 /* ----------------------- MCGIRCCLK settings ------------------------ */
669 /* ------------------------ MCG FLL settings ------------------------- */
675 /* ------------------------ MCG PLL settings ------------------------- */
937 * This function sets system layer clock settings in SIM module.
1023 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1291 * @brief Sets the XTAL0 frequency based on board settings.
1301 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1500 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
644 /* ----------------------- MCGIRCCLK settings ------------------------ */
649 /* ------------------------ MCG FLL settings ------------------------- */
654 /* ------------------------ MCG PLL settings ------------------------- */
846 * This function sets system layer clock settings in SIM module.
932 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1191 * @brief Sets the XTAL0 frequency based on board settings.
1201 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1400 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
671 /* ----------------------- MCGIRCCLK settings ------------------------ */
676 /* ------------------------ MCG FLL settings ------------------------- */
682 /* ------------------------ MCG PLL settings ------------------------- */
945 * This function sets system layer clock settings in SIM module.
1030 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1298 * @brief Sets the XTAL0 frequency based on board settings.
1308 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1507 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
644 /* ----------------------- MCGIRCCLK settings ------------------------ */
649 /* ------------------------ MCG FLL settings ------------------------- */
654 /* ------------------------ MCG PLL settings ------------------------- */
844 * This function sets system layer clock settings in SIM module.
931 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1190 * @brief Sets the XTAL0 frequency based on board settings.
1200 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1399 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/drivers/imxrt6xx/
Dfsl_i3c.h260 /*! @brief Structure with I3C baudrate settings. */
269 * @brief Structure with settings to initialize the I3C master module.
271 * This structure holds configuration settings for the I3C peripheral. To initialize this
284 i3c_baudrate_hz_t baudRate_Hz; /*!< Desired baud rate settings. */
465 * @brief Structure with settings to initialize the I3C slave module.
467 * This structure holds configuration settings for the I3C peripheral. To initialize this
576 …* @brief Structure with settings to initialize the I3C module, could both initialize master and sl…
578 * This structure holds configuration settings for the I3C peripheral. To initialize this
591 i3c_baudrate_hz_t baudRate_Hz; /*!< Desired baud rate settings. */
674 …* After calling this function, you can override any settings in order to customize the configurati…
[all …]
Dfsl_lpadc.c150 * brief Gets an available pre-defined settings for initial configuration.
152 …* This function initializes the converter configuration structure with an available settings. The …
312 * brief Gets an available pre-defined settings for trigger's configuration.
314 …* This function initializes the trigger's configuration structure with an available settings. The …
407 /* Hardware compare settings. in LPADC_SetConvCommandConfig()
423 * brief Gets an available pre-defined settings for conversion command's configuration.
425 …nitializes the conversion command's configuration structure with an available settings. The default
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_clock.c18 achieve better performance, it is depend on the IDE Floating point settings, if double precision is…
577 * This function initialize the ARM PLL with specific settings
610 * This function initializes the System PLL with specific settings
652 * This function initializes the USB1 PLL with specific settings
685 * This function initializes the USB2 PLL with specific settings
718 * This function initializes the Audio PLL with specific settings
805 * This function configures the Video PLL with specific settings
891 * This function initializes the ENET PLL with specific settings.
1172 * note It is recommended that PFD settings are kept between 12-35.
1223 * note It is recommended that PFD settings are kept between 12-35.
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_clock.c17 achieve better performance, it is depend on the IDE Floating point settings, if double precision is…
573 * This function initialize the ARM PLL with specific settings
606 * This function initializes the System PLL with specific settings
648 * This function initializes the USB1 PLL with specific settings
681 * This function initializes the USB2 PLL with specific settings
714 * This function initializes the Audio PLL with specific settings
801 * This function configures the Video PLL with specific settings
887 * This function initializes the ENET PLL with specific settings.
1155 * note It is recommended that PFD settings are kept between 12-35.
1206 * note It is recommended that PFD settings are kept between 12-35.
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_clock.c18 achieve better performance, it is depend on the IDE Floating point settings, if double precision is…
577 * This function initialize the ARM PLL with specific settings
610 * This function initializes the System PLL with specific settings
652 * This function initializes the USB1 PLL with specific settings
685 * This function initializes the USB2 PLL with specific settings
718 * This function initializes the Audio PLL with specific settings
805 * This function configures the Video PLL with specific settings
891 * This function initializes the ENET PLL with specific settings.
1172 * note It is recommended that PFD settings are kept between 12-35.
1223 * note It is recommended that PFD settings are kept between 12-35.
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.h25 * Some MCG settings must be changed with conditions, for example:
26 * 1. MCGIRCLK settings, such as the source, divider, and the trim value should not change when
694 /* ----------------------- MCGIRCCLK settings ------------------------ */
699 /* ------------------------ MCG FLL settings ------------------------- */
705 /* ------------------------ MCG PLL settings ------------------------- */
1029 * This function sets system layer clock settings in SIM module.
1136 * When disabling the MCG low power, the PLL or FLL are enabled based on MCG settings.
1424 * @brief Sets the XTAL0 frequency based on board settings.
1434 * @brief Sets the XTAL32/RTC_CLKIN frequency based on board settings.
1633 …* the FLL settings are not configured. This is a lite function with a small code size, which is us…
[all …]
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_cache.h99 /* ------------------------ l2 cachec basic settings ---------------------------- */
103 /* ------------------------ tag/data ram latency settings ----------------------- */
105 /* ------------------------ Prefetch enable settings ---------------------------- */
108 /* ------------------------ Non-secure access settings -------------------------- */
110 /* ------------------------ other settings -------------------------------------- */
271 * @brief Gets an available default settings for the cache controller.
273 * This function initializes the cache controller configuration structure with default settings.
Dfsl_lpadc.c150 * brief Gets an available pre-defined settings for initial configuration.
152 …* This function initializes the converter configuration structure with an available settings. The …
312 * brief Gets an available pre-defined settings for trigger's configuration.
314 …* This function initializes the trigger's configuration structure with an available settings. The …
407 /* Hardware compare settings. in LPADC_SetConvCommandConfig()
423 * brief Gets an available pre-defined settings for conversion command's configuration.
425 …nitializes the conversion command's configuration structure with an available settings. The default
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/cm7/
Dfsl_cache.h99 /* ------------------------ l2 cachec basic settings ---------------------------- */
103 /* ------------------------ tag/data ram latency settings ----------------------- */
105 /* ------------------------ Prefetch enable settings ---------------------------- */
108 /* ------------------------ Non-secure access settings -------------------------- */
110 /* ------------------------ other settings -------------------------------------- */
271 * @brief Gets an available default settings for the cache controller.
273 * This function initializes the cache controller configuration structure with default settings.

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