| /hal_rpi_pico-latest/src/rp2_common/pico_async_context/include/pico/ |
| D | async_context.h | 4 * SPDX-License-Identifier: BSD-3-Clause
10 …* \brief An \ref async_context provides a logically single-threaded context for performing work, a…
11 …* to asynchronous events. Thus an async_context instance is suitable for servicing third-party lib…
12 * that are not re-entrant.
15 * async_context various pre-conditions hold:
20 …lways calls workers from the same processor core, as most uses of async_context rely on interaction
21 * with IRQs which are themselves core-specific.
36 * Locked code runs on the calling core, however \ref async_context_execute_sync is provided to
41 * async_context_poll - this context is not thread-safe, and the user is responsible for calling
45 …* async_context_threadsafe_background - in order to work in the background, a low priority IRQ is …
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| /hal_rpi_pico-latest/.github/workflows/ |
| D | bazel_build.yml | 3 on:
8 bazel-build-check:
12 os: [ubuntu-latest, macos-latest]
13 fail-fast: false
14 runs-on: ${{ matrix.os }}
16 - name: Checkout
19 fetch-depth: 0
20 - name: Get Bazel
21 uses: bazel-contrib/setup-bazel@0.9.0
24 bazelisk-cache: true
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| D | windows.yml | 1 name: Build on Windows
2 on:
6 - 'develop'
7 - 'master'
8 - 'test_workflow'
12 runs-on: windows-2022
14 - name: Clean workspace
18 rm -rf "${{ github.workspace }}/pico-sdk"
19 - name: Checkout repo
21 - name: Checkout submodules
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| D | macOS.yml | 1 name: Build on macOS
2 on:
6 - 'develop'
7 - 'master'
8 - 'test_workflow'
12 runs-on: macos-latest
14 - name: Clean workspace
17 rm -rf "${{ github.workspace }}"
18 mkdir -p "${{ github.workspace }}"
19 - name: Checkout repo
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| D | cmake.yml | 2 on:
4 branches-ignore:
5 - 'iar/**'
14 # cannot specify filter for pull_request in on: above, so do it here
16 runs-on: [self-hosted, Linux, X64]
19 - name: Clean workspace
22 rm -rf "${{ github.workspace }}"
23 mkdir -p "${{ github.workspace }}"
25 - name: Checkout repo
28 - name: Checkout submodules
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| D | multi-gcc.yml | 3 on:
7 - 'master'
8 - 'test_workflow'
13 runs-on: [self-hosted, Linux, X64]
16 - name: Clean workspace
19 rm -rf "${{ github.workspace }}"
20 mkdir -p "${{ github.workspace }}"
22 - name: Checkout repo
25 - name: Checkout submodules
26 run: git submodule update --init
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| /hal_rpi_pico-latest/docs/ |
| D | mainpage.md | 3 …-series microcontroller devices such as the Raspberry Pi Pico in C, C++ or assembly language. The …
5 …runs on the device at a time with a conventional `main()` method. Standard C/C++ libraries are sup…
7 …-level libraries for dealing with timers, USB, synchronization and multi-core programming, along w…
9 …ated from the SDK source tree using Doxygen. It provides basic information on the APIs used for ea…
13 …-series microcontroller range are powerful chips, however they are used in an embedded environment…
15 …he developer as much control and power as possible (if they want it) to fine-tune every aspect of …
21 Apart from being a widely-used build system for C/C++ development, CMake is fundamental to the way …
23 …table which is bare-metal, i.e. it includes the entirety of the code needed to run on the device (…
27 …py; 2020 Raspberry Pi Ltd and licensed under the [3-Clause BSD](https://opensource.org/licenses/BS…
|
| /hal_rpi_pico-latest/.github/workflows/scripts/ |
| D | generate_multi_gcc_workflow.py | 15 gcc_path = os.path.join(fullpath, "bin/arm-none-eabi-gcc")
16 version = subprocess.run([gcc_path, "--version"], capture_output=True)
17 stdout = version.stdout.decode('utf-8')
18 stderr = version.stderr.decode('utf-8')
20 # Version should be on first line
38 on:
42 - 'master'
43 - 'test_workflow'
48 runs-on: [self-hosted, Linux, X64]
51 - name: Clean workspace
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| /hal_rpi_pico-latest/src/rp2_common/hardware_pwm/include/hardware/ |
| D | pwm.h | 4 * SPDX-License-Identifier: BSD-3-Clause
37 …* The PWM hardware functions by continuously comparing the input value to a free-running counter. …
42 …* immediately wrap to 0. PWM slices also offer a phase-correct mode, where the counter starts to c…
56 PWM_DIV_FREE_RUNNING = 0, ///< Free-running counting at rate dictated by fractional divider
144 …* the PWM starts counting back down. The output frequency is halved when phase-correct mode is ena…
147 c->csr = (c->csr & ~PWM_CH0_CSR_PH_CORRECT_BITS) in pwm_config_set_phase_correct()
157 * If the divide mode is free-running, the PWM counter runs at clk_sys / div.
158 * Otherwise, the divider reduces the rate of events seen on the B pin input (level or edge)
159 * before passing them on to the PWM counter.
167 c->div = (uint32_t)(div * (float)(1u << frac_bit_count)); in pwm_config_set_clkdiv()
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| /hal_rpi_pico-latest/cmake/preload/toolchains/util/ |
| D | find_compiler.cmake | 1 # Toolchain file is processed multiple times, however, it cannot access CMake cache on some runs.
20 if ("${${compiler_path}}" STREQUAL "${compiler_path}-NOTFOUND")
26 if ("${${compiler_path}}" STREQUAL "${compiler_path}-NOTFOUND")
38 list(TRANSFORM triples APPEND "-${compiler_suffix}")
|
| /hal_rpi_pico-latest/src/rp2_common/hardware_exception/ |
| D | exception_table_riscv.S | 3 // Support for breaking out individual RISC-V exception causes to handlers
41 // Exception handler runs on foreground stack: this may fault, but we will
43 addi sp, sp, -64
45 // we re-trip it before trashing memory below the guard.
63 // Using unsigned comparison for double-ended bounds check
110 // Reach here when executing an exception that did not have a non-default
120 addi sp, sp, -64
|
| /hal_rpi_pico-latest/ |
| D | README.md | 4 necessary to write programs for the RP-series microcontroller-based devices such as the Raspberry P…
7 The SDK is designed to provide an API and programming environment that is familiar both to non-embe…
8 A single program runs on the device at a time and starts with a conventional `main()` method. Stand…
9 C-level libraries/APIs for accessing all of the RP-series microcontroller's hardware including PIO …
11 …-Fi and Bluetooth networking, USB and multicore programming. These libraries should be comprehensi…
13 The SDK can be used to build anything from simple applications, fully-fledged runtime environments …
14 such as the RP-series microcontroller's on-chip bootrom itself.
18 …t ready for inclusion in the SDK can be found in [pico-extras](https://github.com/raspberrypi/pico…
22 …ee [Getting Started with the Raspberry Pi Pico-Series](https://rptl.io/pico-get-started) for infor…
23 …t and how to build and debug software for the Raspberry Pi Pico and other RP-series microcontrolle…
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| /hal_rpi_pico-latest/test/hardware_sync_spin_lock_test/ |
| D | hardware_sync_spin_lock_test.c | 45 printf("Impossible local counter value %d on core %d: %08x (max %08x)\n", in check_counter_sums()
73 // write to its counter while holding the lock. Also increment a per-core in counter_test_per_core()
74 // counter for that lock, so we can check at the end that the per-core in counter_test_per_core()
93 // Same as counter_test but use the try_lock variant -- worth testing as in counter_try_test_per_core()
103 // Assume this test runs without IRQs active in counter_try_test_per_core()
116 counter_test_per_core(NUM_SPIN_LOCKS - 1); in counter_test1()
120 counter_test_per_core((NUM_SPIN_LOCKS - 1) >> 1); in counter_test2()
124 counter_test_per_core((NUM_SPIN_LOCKS - 1) >> 2); in counter_test3()
128 counter_test_per_core((NUM_SPIN_LOCKS - 1) >> 3); in counter_test4()
132 counter_test_per_core((NUM_SPIN_LOCKS - 1) >> 4); in counter_test5()
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| /hal_rpi_pico-latest/src/rp2_common/hardware_clocks/ |
| D | clocks.c | 4 * SPDX-License-Identifier: BSD-3-Clause
24 // - A glitchless mux, which can be switched freely, but whose inputs must be
25 // free-running
26 // - An auxiliary (glitchy) mux, whose output glitches when switched, but has
27 // no constraints on its inputs
34 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_stop()
35 hw_clear_bits(&clock_hw->ctrl, CLOCKS_CLK_USB_CTRL_ENABLE_BITS); in clock_stop()
41 clock_hw_t *clock_hw = &clocks_hw->clk[clock]; in clock_configure_internal()
46 if (div > clock_hw->div) in clock_configure_internal()
47 clock_hw->div = div; in clock_configure_internal()
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| /hal_rpi_pico-latest/src/rp2_common/hardware_i2c/ |
| D | i2c.c | 4 * SPDX-License-Identifier: BSD-3-Clause
35 i2c->restart_on_next = false; in i2c_init()
37 i2c->hw->enable = 0; in i2c_init()
39 // Configure as a fast-mode master with RepStart support, 7-bit addresses in i2c_init()
40 i2c->hw->con = in i2c_init()
48 i2c->hw->tx_tl = 0; in i2c_init()
49 i2c->hw->rx_tl = 0; in i2c_init()
51 // Always enable the DREQ signalling -- harmless if DMA isn't listening in i2c_init()
52 i2c->hw->dma_cr = I2C_IC_DMA_CR_TDMAE_BITS | I2C_IC_DMA_CR_RDMAE_BITS; in i2c_init()
54 // Re-sets i2c->hw->enable upon returning: in i2c_init()
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| /hal_rpi_pico-latest/src/rp2350/hardware_regs/include/hardware/regs/ |
| D | xosc.h | 1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
6 * SPDX-License-Identifier: BSD-3-Clause
22 // -----------------------------------------------------------------------------
24 // Description : On power-up this field is initialised to DISABLE and the chip
25 // runs from the ROSC.
27 // XOSC then setting this field to DISABLE may lock-up the chip.
30 // The 12-bit code is intended to give some protection against
34 // 0xd1e -> DISABLE
35 // 0xfab -> ENABLE
36 #define XOSC_CTRL_ENABLE_RESET "-"
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| D | powman.h | 1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
6 * SPDX-License-Identifier: BSD-3-Clause
33 // -----------------------------------------------------------------------------
36 // 0 - reset
37 // 1 - not reset (default)
43 // -----------------------------------------------------------------------------
46 // 0 - Locked (default)
47 // 1 - Unlocked
54 // -----------------------------------------------------------------------------
57 // 0 - not isolated (default)
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|
| D | otp.h | 1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
6 * SPDX-License-Identifier: BSD-3-Clause
27 // -----------------------------------------------------------------------------
29 // Description : Non-secure lock status. Writes are OR'd with the current value.
30 // 0x0 -> read_write
31 // 0x1 -> read_only
32 // 0x3 -> inaccessible
33 #define OTP_SW_LOCK0_NSEC_RESET "-"
41 // -----------------------------------------------------------------------------
44 // This field is read-only to Non-secure code.
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| /hal_rpi_pico-latest/src/rp2040/hardware_regs/include/hardware/regs/ |
| D | xosc.h | 1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
6 * SPDX-License-Identifier: BSD-3-Clause
22 // -----------------------------------------------------------------------------
24 // Description : On power-up this field is initialised to DISABLE and the chip
25 // runs from the ROSC.
27 // XOSC then DISABLE may lock-up the chip. If this is a concern
30 // The 12-bit code is intended to give some protection against
33 // 0xd1e -> DISABLE
34 // 0xfab -> ENABLE
35 #define XOSC_CTRL_ENABLE_RESET "-"
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| /hal_rpi_pico-latest/test/pico_time_test/ |
| D | pico_time_test.c | 4 * SPDX-License-Identifier: BSD-3-Clause
45 timeout->fired_at = get_absolute_time(); in timer_callback1()
46 timeout->fired_count++; in timer_callback1()
47 // printf("%d %d %ld\n", timeout->pool, id, to_us_since_boot(timeout->target)); in timer_callback1()
54 int64_t delta = absolute_time_diff_us(tb->target, ta->target); in sort_by_target()
55 if (delta < 0) return -1; in sort_by_target()
62 uint i = (uintptr_t)t->user_data; in repeating_timer_callback()
63 hard_assert(i == (t - repeating_timers)); in repeating_timer_callback()
104 target = timeouts[i-1].target; in main()
105 pool = timeouts[i-1].pool; in main()
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| /hal_rpi_pico-latest/src/rp2_common/cmsis/stub/CMSIS/Device/RP2350/Include/ |
| D | RP2350.h | 2 * Copyright (c) 2024 Raspberry Pi Ltd. SPDX-License-Identifier: BSD-3-Clause
10 * last modified on Thu Aug 8 03:59:33 2024
43 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============…
44 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm…
45 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped …
46 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault …
47 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including…
49 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault…
51 …UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illeg…
52 …SecureFault_IRQn = -9, /*!< -9 Secure Fault Handler …
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| /hal_rpi_pico-latest/src/rp2040/hardware_regs/ |
| D | RP2040.svd | 1 <?xml version="1.0" encoding="utf-8"?>
2 <!--
5 SPDX-License-Identifier: BSD-3-Clause
6 -->
7 …sion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSI…
13 Dual-core Arm Cortex-M0+ processor, flexible clock running up to 133 MHz
14 264KB on-chip SRAM
18 Supported input power 1.8-5.5V DC
19 Operating temperature -20C to +85C
20 Drag-and-drop programming using mass storage over USB
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| /hal_rpi_pico-latest/src/rp2350/hardware_regs/ |
| D | RP2350.svd | 1 <?xml version="1.0" encoding="utf-8"?>
2 <!--
5 SPDX-License-Identifier: BSD-3-Clause
6 -->
7 …sion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSI…
13 Dual Cortex-M33 or Hazard3 processors at 150MHz
14 520kB on-chip SRAM, in 10 independent banks
15 Extended low-power sleep states with optional SRAM retention: as low as 10uA DVDD
16 8kB of one-time-programmable storage (OTP)
18 Additional 16MB flash/PSRAM accessible via optional second chip-select
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