1<?xml version="1.0" encoding="utf-8"?>
2<!--
3Copyright (c) 2024 Raspberry Pi Ltd.
4
5SPDX-License-Identifier: BSD-3-Clause
6-->
7<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
8    <vendor>Raspberry Pi</vendor>
9    <name>RP2350</name>
10    <series>RP</series>
11    <version>0.1</version>
12    <description>
13        Dual Cortex-M33 or Hazard3 processors at 150MHz
14        520kB on-chip SRAM, in 10 independent banks
15        Extended low-power sleep states with optional SRAM retention: as low as 10uA DVDD
16        8kB of one-time-programmable storage (OTP)
17        Up to 16MB of external QSPI flash/PSRAM via dedicated QSPI bus
18            Additional 16MB flash/PSRAM accessible via optional second chip-select
19        On-chip switched-mode power supply to generate core voltage
20            Low-quiescent-current LDO mode can be enabled for sleep states
21        2x on-chip PLLs for internal or external clock generation
22        GPIOs are 5V-tolerant (powered), and 3.3V-failsafe (unpowered)
23        Security features:
24            Optional boot signing, enforced by on-chip mask ROM, with key fingerprint in OTP
25            Protected OTP storage for optional boot decryption key
26            Global bus filtering based on Arm or RISC-V security/privilege levels
27            Peripherals, GPIOs and DMA channels individually assignable to security domains
28            Hardware mitigations for fault injection attacks
29            Hardware SHA-256 accelerator
30        Peripherals:
31            2x UARTs
32            2x SPI controllers
33            2x I2C controllers
34            24x PWM channels
35            USB 1.1 controller and PHY, with host and device support
36            12x PIO state machines
37            1x HSTX peripheral
38    </description>
39    <width>32</width>
40    <size>32</size>
41    <resetMask>0xffffffff</resetMask>
42    <resetValue>0x00000000</resetValue>
43    <access>read-write</access>
44    <licenseText>
45        Copyright (c) 2024 Raspberry Pi Ltd.
46
47        SPDX-License-Identifier: BSD-3-Clause
48    </licenseText>
49    <cpu>
50        <name>CM33</name>
51        <revision>r1p0</revision>
52        <endian>little</endian>
53        <mpuPresent>true</mpuPresent>
54        <fpuPresent>true</fpuPresent>
55        <sauNumRegions>8</sauNumRegions>
56        <nvicPrioBits>4</nvicPrioBits>
57        <vtorPresent>1</vtorPresent>
58        <dspPresent>1</dspPresent>
59        <vendorSystickConfig>false</vendorSystickConfig>
60        <deviceNumInterrupts>52</deviceNumInterrupts>
61    </cpu>
62    <addressUnitBits>8</addressUnitBits>
63    <peripherals>
64    <peripheral>
65        <name>RESETS</name>
66        <baseAddress>0x40020000</baseAddress>
67        <addressBlock>
68            <offset>0</offset>
69            <size>12</size>
70            <usage>registers</usage>
71        </addressBlock>
72        <registers>
73            <register>
74                <name>RESET</name>
75                <addressOffset>0x00000000</addressOffset>
76                <resetValue>0x1fffffff</resetValue>
77                <fields>
78                    <field>
79                        <name>USBCTRL</name>
80                        <bitRange>[28:28]</bitRange>
81                        <access>read-write</access>
82                    </field>
83                    <field>
84                        <name>UART1</name>
85                        <bitRange>[27:27]</bitRange>
86                        <access>read-write</access>
87                    </field>
88                    <field>
89                        <name>UART0</name>
90                        <bitRange>[26:26]</bitRange>
91                        <access>read-write</access>
92                    </field>
93                    <field>
94                        <name>TRNG</name>
95                        <bitRange>[25:25]</bitRange>
96                        <access>read-write</access>
97                    </field>
98                    <field>
99                        <name>TIMER1</name>
100                        <bitRange>[24:24]</bitRange>
101                        <access>read-write</access>
102                    </field>
103                    <field>
104                        <name>TIMER0</name>
105                        <bitRange>[23:23]</bitRange>
106                        <access>read-write</access>
107                    </field>
108                    <field>
109                        <name>TBMAN</name>
110                        <bitRange>[22:22]</bitRange>
111                        <access>read-write</access>
112                    </field>
113                    <field>
114                        <name>SYSINFO</name>
115                        <bitRange>[21:21]</bitRange>
116                        <access>read-write</access>
117                    </field>
118                    <field>
119                        <name>SYSCFG</name>
120                        <bitRange>[20:20]</bitRange>
121                        <access>read-write</access>
122                    </field>
123                    <field>
124                        <name>SPI1</name>
125                        <bitRange>[19:19]</bitRange>
126                        <access>read-write</access>
127                    </field>
128                    <field>
129                        <name>SPI0</name>
130                        <bitRange>[18:18]</bitRange>
131                        <access>read-write</access>
132                    </field>
133                    <field>
134                        <name>SHA256</name>
135                        <bitRange>[17:17]</bitRange>
136                        <access>read-write</access>
137                    </field>
138                    <field>
139                        <name>PWM</name>
140                        <bitRange>[16:16]</bitRange>
141                        <access>read-write</access>
142                    </field>
143                    <field>
144                        <name>PLL_USB</name>
145                        <bitRange>[15:15]</bitRange>
146                        <access>read-write</access>
147                    </field>
148                    <field>
149                        <name>PLL_SYS</name>
150                        <bitRange>[14:14]</bitRange>
151                        <access>read-write</access>
152                    </field>
153                    <field>
154                        <name>PIO2</name>
155                        <bitRange>[13:13]</bitRange>
156                        <access>read-write</access>
157                    </field>
158                    <field>
159                        <name>PIO1</name>
160                        <bitRange>[12:12]</bitRange>
161                        <access>read-write</access>
162                    </field>
163                    <field>
164                        <name>PIO0</name>
165                        <bitRange>[11:11]</bitRange>
166                        <access>read-write</access>
167                    </field>
168                    <field>
169                        <name>PADS_QSPI</name>
170                        <bitRange>[10:10]</bitRange>
171                        <access>read-write</access>
172                    </field>
173                    <field>
174                        <name>PADS_BANK0</name>
175                        <bitRange>[9:9]</bitRange>
176                        <access>read-write</access>
177                    </field>
178                    <field>
179                        <name>JTAG</name>
180                        <bitRange>[8:8]</bitRange>
181                        <access>read-write</access>
182                    </field>
183                    <field>
184                        <name>IO_QSPI</name>
185                        <bitRange>[7:7]</bitRange>
186                        <access>read-write</access>
187                    </field>
188                    <field>
189                        <name>IO_BANK0</name>
190                        <bitRange>[6:6]</bitRange>
191                        <access>read-write</access>
192                    </field>
193                    <field>
194                        <name>I2C1</name>
195                        <bitRange>[5:5]</bitRange>
196                        <access>read-write</access>
197                    </field>
198                    <field>
199                        <name>I2C0</name>
200                        <bitRange>[4:4]</bitRange>
201                        <access>read-write</access>
202                    </field>
203                    <field>
204                        <name>HSTX</name>
205                        <bitRange>[3:3]</bitRange>
206                        <access>read-write</access>
207                    </field>
208                    <field>
209                        <name>DMA</name>
210                        <bitRange>[2:2]</bitRange>
211                        <access>read-write</access>
212                    </field>
213                    <field>
214                        <name>BUSCTRL</name>
215                        <bitRange>[1:1]</bitRange>
216                        <access>read-write</access>
217                    </field>
218                    <field>
219                        <name>ADC</name>
220                        <bitRange>[0:0]</bitRange>
221                        <access>read-write</access>
222                    </field>
223                </fields>
224            </register>
225            <register>
226                <name>WDSEL</name>
227                <addressOffset>0x00000004</addressOffset>
228                <resetValue>0x00000000</resetValue>
229                <fields>
230                    <field>
231                        <name>USBCTRL</name>
232                        <bitRange>[28:28]</bitRange>
233                        <access>read-write</access>
234                    </field>
235                    <field>
236                        <name>UART1</name>
237                        <bitRange>[27:27]</bitRange>
238                        <access>read-write</access>
239                    </field>
240                    <field>
241                        <name>UART0</name>
242                        <bitRange>[26:26]</bitRange>
243                        <access>read-write</access>
244                    </field>
245                    <field>
246                        <name>TRNG</name>
247                        <bitRange>[25:25]</bitRange>
248                        <access>read-write</access>
249                    </field>
250                    <field>
251                        <name>TIMER1</name>
252                        <bitRange>[24:24]</bitRange>
253                        <access>read-write</access>
254                    </field>
255                    <field>
256                        <name>TIMER0</name>
257                        <bitRange>[23:23]</bitRange>
258                        <access>read-write</access>
259                    </field>
260                    <field>
261                        <name>TBMAN</name>
262                        <bitRange>[22:22]</bitRange>
263                        <access>read-write</access>
264                    </field>
265                    <field>
266                        <name>SYSINFO</name>
267                        <bitRange>[21:21]</bitRange>
268                        <access>read-write</access>
269                    </field>
270                    <field>
271                        <name>SYSCFG</name>
272                        <bitRange>[20:20]</bitRange>
273                        <access>read-write</access>
274                    </field>
275                    <field>
276                        <name>SPI1</name>
277                        <bitRange>[19:19]</bitRange>
278                        <access>read-write</access>
279                    </field>
280                    <field>
281                        <name>SPI0</name>
282                        <bitRange>[18:18]</bitRange>
283                        <access>read-write</access>
284                    </field>
285                    <field>
286                        <name>SHA256</name>
287                        <bitRange>[17:17]</bitRange>
288                        <access>read-write</access>
289                    </field>
290                    <field>
291                        <name>PWM</name>
292                        <bitRange>[16:16]</bitRange>
293                        <access>read-write</access>
294                    </field>
295                    <field>
296                        <name>PLL_USB</name>
297                        <bitRange>[15:15]</bitRange>
298                        <access>read-write</access>
299                    </field>
300                    <field>
301                        <name>PLL_SYS</name>
302                        <bitRange>[14:14]</bitRange>
303                        <access>read-write</access>
304                    </field>
305                    <field>
306                        <name>PIO2</name>
307                        <bitRange>[13:13]</bitRange>
308                        <access>read-write</access>
309                    </field>
310                    <field>
311                        <name>PIO1</name>
312                        <bitRange>[12:12]</bitRange>
313                        <access>read-write</access>
314                    </field>
315                    <field>
316                        <name>PIO0</name>
317                        <bitRange>[11:11]</bitRange>
318                        <access>read-write</access>
319                    </field>
320                    <field>
321                        <name>PADS_QSPI</name>
322                        <bitRange>[10:10]</bitRange>
323                        <access>read-write</access>
324                    </field>
325                    <field>
326                        <name>PADS_BANK0</name>
327                        <bitRange>[9:9]</bitRange>
328                        <access>read-write</access>
329                    </field>
330                    <field>
331                        <name>JTAG</name>
332                        <bitRange>[8:8]</bitRange>
333                        <access>read-write</access>
334                    </field>
335                    <field>
336                        <name>IO_QSPI</name>
337                        <bitRange>[7:7]</bitRange>
338                        <access>read-write</access>
339                    </field>
340                    <field>
341                        <name>IO_BANK0</name>
342                        <bitRange>[6:6]</bitRange>
343                        <access>read-write</access>
344                    </field>
345                    <field>
346                        <name>I2C1</name>
347                        <bitRange>[5:5]</bitRange>
348                        <access>read-write</access>
349                    </field>
350                    <field>
351                        <name>I2C0</name>
352                        <bitRange>[4:4]</bitRange>
353                        <access>read-write</access>
354                    </field>
355                    <field>
356                        <name>HSTX</name>
357                        <bitRange>[3:3]</bitRange>
358                        <access>read-write</access>
359                    </field>
360                    <field>
361                        <name>DMA</name>
362                        <bitRange>[2:2]</bitRange>
363                        <access>read-write</access>
364                    </field>
365                    <field>
366                        <name>BUSCTRL</name>
367                        <bitRange>[1:1]</bitRange>
368                        <access>read-write</access>
369                    </field>
370                    <field>
371                        <name>ADC</name>
372                        <bitRange>[0:0]</bitRange>
373                        <access>read-write</access>
374                    </field>
375                </fields>
376            </register>
377            <register>
378                <name>RESET_DONE</name>
379                <addressOffset>0x00000008</addressOffset>
380                <resetValue>0x00000000</resetValue>
381                <fields>
382                    <field>
383                        <name>USBCTRL</name>
384                        <bitRange>[28:28]</bitRange>
385                        <access>read-only</access>
386                    </field>
387                    <field>
388                        <name>UART1</name>
389                        <bitRange>[27:27]</bitRange>
390                        <access>read-only</access>
391                    </field>
392                    <field>
393                        <name>UART0</name>
394                        <bitRange>[26:26]</bitRange>
395                        <access>read-only</access>
396                    </field>
397                    <field>
398                        <name>TRNG</name>
399                        <bitRange>[25:25]</bitRange>
400                        <access>read-only</access>
401                    </field>
402                    <field>
403                        <name>TIMER1</name>
404                        <bitRange>[24:24]</bitRange>
405                        <access>read-only</access>
406                    </field>
407                    <field>
408                        <name>TIMER0</name>
409                        <bitRange>[23:23]</bitRange>
410                        <access>read-only</access>
411                    </field>
412                    <field>
413                        <name>TBMAN</name>
414                        <bitRange>[22:22]</bitRange>
415                        <access>read-only</access>
416                    </field>
417                    <field>
418                        <name>SYSINFO</name>
419                        <bitRange>[21:21]</bitRange>
420                        <access>read-only</access>
421                    </field>
422                    <field>
423                        <name>SYSCFG</name>
424                        <bitRange>[20:20]</bitRange>
425                        <access>read-only</access>
426                    </field>
427                    <field>
428                        <name>SPI1</name>
429                        <bitRange>[19:19]</bitRange>
430                        <access>read-only</access>
431                    </field>
432                    <field>
433                        <name>SPI0</name>
434                        <bitRange>[18:18]</bitRange>
435                        <access>read-only</access>
436                    </field>
437                    <field>
438                        <name>SHA256</name>
439                        <bitRange>[17:17]</bitRange>
440                        <access>read-only</access>
441                    </field>
442                    <field>
443                        <name>PWM</name>
444                        <bitRange>[16:16]</bitRange>
445                        <access>read-only</access>
446                    </field>
447                    <field>
448                        <name>PLL_USB</name>
449                        <bitRange>[15:15]</bitRange>
450                        <access>read-only</access>
451                    </field>
452                    <field>
453                        <name>PLL_SYS</name>
454                        <bitRange>[14:14]</bitRange>
455                        <access>read-only</access>
456                    </field>
457                    <field>
458                        <name>PIO2</name>
459                        <bitRange>[13:13]</bitRange>
460                        <access>read-only</access>
461                    </field>
462                    <field>
463                        <name>PIO1</name>
464                        <bitRange>[12:12]</bitRange>
465                        <access>read-only</access>
466                    </field>
467                    <field>
468                        <name>PIO0</name>
469                        <bitRange>[11:11]</bitRange>
470                        <access>read-only</access>
471                    </field>
472                    <field>
473                        <name>PADS_QSPI</name>
474                        <bitRange>[10:10]</bitRange>
475                        <access>read-only</access>
476                    </field>
477                    <field>
478                        <name>PADS_BANK0</name>
479                        <bitRange>[9:9]</bitRange>
480                        <access>read-only</access>
481                    </field>
482                    <field>
483                        <name>JTAG</name>
484                        <bitRange>[8:8]</bitRange>
485                        <access>read-only</access>
486                    </field>
487                    <field>
488                        <name>IO_QSPI</name>
489                        <bitRange>[7:7]</bitRange>
490                        <access>read-only</access>
491                    </field>
492                    <field>
493                        <name>IO_BANK0</name>
494                        <bitRange>[6:6]</bitRange>
495                        <access>read-only</access>
496                    </field>
497                    <field>
498                        <name>I2C1</name>
499                        <bitRange>[5:5]</bitRange>
500                        <access>read-only</access>
501                    </field>
502                    <field>
503                        <name>I2C0</name>
504                        <bitRange>[4:4]</bitRange>
505                        <access>read-only</access>
506                    </field>
507                    <field>
508                        <name>HSTX</name>
509                        <bitRange>[3:3]</bitRange>
510                        <access>read-only</access>
511                    </field>
512                    <field>
513                        <name>DMA</name>
514                        <bitRange>[2:2]</bitRange>
515                        <access>read-only</access>
516                    </field>
517                    <field>
518                        <name>BUSCTRL</name>
519                        <bitRange>[1:1]</bitRange>
520                        <access>read-only</access>
521                    </field>
522                    <field>
523                        <name>ADC</name>
524                        <bitRange>[0:0]</bitRange>
525                        <access>read-only</access>
526                    </field>
527                </fields>
528            </register>
529        </registers>
530    </peripheral>
531    <peripheral>
532        <name>PSM</name>
533        <baseAddress>0x40018000</baseAddress>
534        <addressBlock>
535            <offset>0</offset>
536            <size>16</size>
537            <usage>registers</usage>
538        </addressBlock>
539        <registers>
540            <register>
541                <name>FRCE_ON</name>
542                <addressOffset>0x00000000</addressOffset>
543                <description>Force block out of reset (i.e. power it on)</description>
544                <resetValue>0x00000000</resetValue>
545                <fields>
546                    <field>
547                        <name>PROC1</name>
548                        <bitRange>[24:24]</bitRange>
549                        <access>read-write</access>
550                    </field>
551                    <field>
552                        <name>PROC0</name>
553                        <bitRange>[23:23]</bitRange>
554                        <access>read-write</access>
555                    </field>
556                    <field>
557                        <name>ACCESSCTRL</name>
558                        <bitRange>[22:22]</bitRange>
559                        <access>read-write</access>
560                    </field>
561                    <field>
562                        <name>SIO</name>
563                        <bitRange>[21:21]</bitRange>
564                        <access>read-write</access>
565                    </field>
566                    <field>
567                        <name>XIP</name>
568                        <bitRange>[20:20]</bitRange>
569                        <access>read-write</access>
570                    </field>
571                    <field>
572                        <name>SRAM9</name>
573                        <bitRange>[19:19]</bitRange>
574                        <access>read-write</access>
575                    </field>
576                    <field>
577                        <name>SRAM8</name>
578                        <bitRange>[18:18]</bitRange>
579                        <access>read-write</access>
580                    </field>
581                    <field>
582                        <name>SRAM7</name>
583                        <bitRange>[17:17]</bitRange>
584                        <access>read-write</access>
585                    </field>
586                    <field>
587                        <name>SRAM6</name>
588                        <bitRange>[16:16]</bitRange>
589                        <access>read-write</access>
590                    </field>
591                    <field>
592                        <name>SRAM5</name>
593                        <bitRange>[15:15]</bitRange>
594                        <access>read-write</access>
595                    </field>
596                    <field>
597                        <name>SRAM4</name>
598                        <bitRange>[14:14]</bitRange>
599                        <access>read-write</access>
600                    </field>
601                    <field>
602                        <name>SRAM3</name>
603                        <bitRange>[13:13]</bitRange>
604                        <access>read-write</access>
605                    </field>
606                    <field>
607                        <name>SRAM2</name>
608                        <bitRange>[12:12]</bitRange>
609                        <access>read-write</access>
610                    </field>
611                    <field>
612                        <name>SRAM1</name>
613                        <bitRange>[11:11]</bitRange>
614                        <access>read-write</access>
615                    </field>
616                    <field>
617                        <name>SRAM0</name>
618                        <bitRange>[10:10]</bitRange>
619                        <access>read-write</access>
620                    </field>
621                    <field>
622                        <name>BOOTRAM</name>
623                        <bitRange>[9:9]</bitRange>
624                        <access>read-write</access>
625                    </field>
626                    <field>
627                        <name>ROM</name>
628                        <bitRange>[8:8]</bitRange>
629                        <access>read-write</access>
630                    </field>
631                    <field>
632                        <name>BUSFABRIC</name>
633                        <bitRange>[7:7]</bitRange>
634                        <access>read-write</access>
635                    </field>
636                    <field>
637                        <name>PSM_READY</name>
638                        <bitRange>[6:6]</bitRange>
639                        <access>read-write</access>
640                    </field>
641                    <field>
642                        <name>CLOCKS</name>
643                        <bitRange>[5:5]</bitRange>
644                        <access>read-write</access>
645                    </field>
646                    <field>
647                        <name>RESETS</name>
648                        <bitRange>[4:4]</bitRange>
649                        <access>read-write</access>
650                    </field>
651                    <field>
652                        <name>XOSC</name>
653                        <bitRange>[3:3]</bitRange>
654                        <access>read-write</access>
655                    </field>
656                    <field>
657                        <name>ROSC</name>
658                        <bitRange>[2:2]</bitRange>
659                        <access>read-write</access>
660                    </field>
661                    <field>
662                        <name>OTP</name>
663                        <bitRange>[1:1]</bitRange>
664                        <access>read-write</access>
665                    </field>
666                    <field>
667                        <name>PROC_COLD</name>
668                        <bitRange>[0:0]</bitRange>
669                        <access>read-write</access>
670                    </field>
671                </fields>
672            </register>
673            <register>
674                <name>FRCE_OFF</name>
675                <addressOffset>0x00000004</addressOffset>
676                <description>Force into reset (i.e. power it off)</description>
677                <resetValue>0x00000000</resetValue>
678                <fields>
679                    <field>
680                        <name>PROC1</name>
681                        <bitRange>[24:24]</bitRange>
682                        <access>read-write</access>
683                    </field>
684                    <field>
685                        <name>PROC0</name>
686                        <bitRange>[23:23]</bitRange>
687                        <access>read-write</access>
688                    </field>
689                    <field>
690                        <name>ACCESSCTRL</name>
691                        <bitRange>[22:22]</bitRange>
692                        <access>read-write</access>
693                    </field>
694                    <field>
695                        <name>SIO</name>
696                        <bitRange>[21:21]</bitRange>
697                        <access>read-write</access>
698                    </field>
699                    <field>
700                        <name>XIP</name>
701                        <bitRange>[20:20]</bitRange>
702                        <access>read-write</access>
703                    </field>
704                    <field>
705                        <name>SRAM9</name>
706                        <bitRange>[19:19]</bitRange>
707                        <access>read-write</access>
708                    </field>
709                    <field>
710                        <name>SRAM8</name>
711                        <bitRange>[18:18]</bitRange>
712                        <access>read-write</access>
713                    </field>
714                    <field>
715                        <name>SRAM7</name>
716                        <bitRange>[17:17]</bitRange>
717                        <access>read-write</access>
718                    </field>
719                    <field>
720                        <name>SRAM6</name>
721                        <bitRange>[16:16]</bitRange>
722                        <access>read-write</access>
723                    </field>
724                    <field>
725                        <name>SRAM5</name>
726                        <bitRange>[15:15]</bitRange>
727                        <access>read-write</access>
728                    </field>
729                    <field>
730                        <name>SRAM4</name>
731                        <bitRange>[14:14]</bitRange>
732                        <access>read-write</access>
733                    </field>
734                    <field>
735                        <name>SRAM3</name>
736                        <bitRange>[13:13]</bitRange>
737                        <access>read-write</access>
738                    </field>
739                    <field>
740                        <name>SRAM2</name>
741                        <bitRange>[12:12]</bitRange>
742                        <access>read-write</access>
743                    </field>
744                    <field>
745                        <name>SRAM1</name>
746                        <bitRange>[11:11]</bitRange>
747                        <access>read-write</access>
748                    </field>
749                    <field>
750                        <name>SRAM0</name>
751                        <bitRange>[10:10]</bitRange>
752                        <access>read-write</access>
753                    </field>
754                    <field>
755                        <name>BOOTRAM</name>
756                        <bitRange>[9:9]</bitRange>
757                        <access>read-write</access>
758                    </field>
759                    <field>
760                        <name>ROM</name>
761                        <bitRange>[8:8]</bitRange>
762                        <access>read-write</access>
763                    </field>
764                    <field>
765                        <name>BUSFABRIC</name>
766                        <bitRange>[7:7]</bitRange>
767                        <access>read-write</access>
768                    </field>
769                    <field>
770                        <name>PSM_READY</name>
771                        <bitRange>[6:6]</bitRange>
772                        <access>read-write</access>
773                    </field>
774                    <field>
775                        <name>CLOCKS</name>
776                        <bitRange>[5:5]</bitRange>
777                        <access>read-write</access>
778                    </field>
779                    <field>
780                        <name>RESETS</name>
781                        <bitRange>[4:4]</bitRange>
782                        <access>read-write</access>
783                    </field>
784                    <field>
785                        <name>XOSC</name>
786                        <bitRange>[3:3]</bitRange>
787                        <access>read-write</access>
788                    </field>
789                    <field>
790                        <name>ROSC</name>
791                        <bitRange>[2:2]</bitRange>
792                        <access>read-write</access>
793                    </field>
794                    <field>
795                        <name>OTP</name>
796                        <bitRange>[1:1]</bitRange>
797                        <access>read-write</access>
798                    </field>
799                    <field>
800                        <name>PROC_COLD</name>
801                        <bitRange>[0:0]</bitRange>
802                        <access>read-write</access>
803                    </field>
804                </fields>
805            </register>
806            <register>
807                <name>WDSEL</name>
808                <addressOffset>0x00000008</addressOffset>
809                <description>Set to 1 if the watchdog should reset this</description>
810                <resetValue>0x00000000</resetValue>
811                <fields>
812                    <field>
813                        <name>PROC1</name>
814                        <bitRange>[24:24]</bitRange>
815                        <access>read-write</access>
816                    </field>
817                    <field>
818                        <name>PROC0</name>
819                        <bitRange>[23:23]</bitRange>
820                        <access>read-write</access>
821                    </field>
822                    <field>
823                        <name>ACCESSCTRL</name>
824                        <bitRange>[22:22]</bitRange>
825                        <access>read-write</access>
826                    </field>
827                    <field>
828                        <name>SIO</name>
829                        <bitRange>[21:21]</bitRange>
830                        <access>read-write</access>
831                    </field>
832                    <field>
833                        <name>XIP</name>
834                        <bitRange>[20:20]</bitRange>
835                        <access>read-write</access>
836                    </field>
837                    <field>
838                        <name>SRAM9</name>
839                        <bitRange>[19:19]</bitRange>
840                        <access>read-write</access>
841                    </field>
842                    <field>
843                        <name>SRAM8</name>
844                        <bitRange>[18:18]</bitRange>
845                        <access>read-write</access>
846                    </field>
847                    <field>
848                        <name>SRAM7</name>
849                        <bitRange>[17:17]</bitRange>
850                        <access>read-write</access>
851                    </field>
852                    <field>
853                        <name>SRAM6</name>
854                        <bitRange>[16:16]</bitRange>
855                        <access>read-write</access>
856                    </field>
857                    <field>
858                        <name>SRAM5</name>
859                        <bitRange>[15:15]</bitRange>
860                        <access>read-write</access>
861                    </field>
862                    <field>
863                        <name>SRAM4</name>
864                        <bitRange>[14:14]</bitRange>
865                        <access>read-write</access>
866                    </field>
867                    <field>
868                        <name>SRAM3</name>
869                        <bitRange>[13:13]</bitRange>
870                        <access>read-write</access>
871                    </field>
872                    <field>
873                        <name>SRAM2</name>
874                        <bitRange>[12:12]</bitRange>
875                        <access>read-write</access>
876                    </field>
877                    <field>
878                        <name>SRAM1</name>
879                        <bitRange>[11:11]</bitRange>
880                        <access>read-write</access>
881                    </field>
882                    <field>
883                        <name>SRAM0</name>
884                        <bitRange>[10:10]</bitRange>
885                        <access>read-write</access>
886                    </field>
887                    <field>
888                        <name>BOOTRAM</name>
889                        <bitRange>[9:9]</bitRange>
890                        <access>read-write</access>
891                    </field>
892                    <field>
893                        <name>ROM</name>
894                        <bitRange>[8:8]</bitRange>
895                        <access>read-write</access>
896                    </field>
897                    <field>
898                        <name>BUSFABRIC</name>
899                        <bitRange>[7:7]</bitRange>
900                        <access>read-write</access>
901                    </field>
902                    <field>
903                        <name>PSM_READY</name>
904                        <bitRange>[6:6]</bitRange>
905                        <access>read-write</access>
906                    </field>
907                    <field>
908                        <name>CLOCKS</name>
909                        <bitRange>[5:5]</bitRange>
910                        <access>read-write</access>
911                    </field>
912                    <field>
913                        <name>RESETS</name>
914                        <bitRange>[4:4]</bitRange>
915                        <access>read-write</access>
916                    </field>
917                    <field>
918                        <name>XOSC</name>
919                        <bitRange>[3:3]</bitRange>
920                        <access>read-write</access>
921                    </field>
922                    <field>
923                        <name>ROSC</name>
924                        <bitRange>[2:2]</bitRange>
925                        <access>read-write</access>
926                    </field>
927                    <field>
928                        <name>OTP</name>
929                        <bitRange>[1:1]</bitRange>
930                        <access>read-write</access>
931                    </field>
932                    <field>
933                        <name>PROC_COLD</name>
934                        <bitRange>[0:0]</bitRange>
935                        <access>read-write</access>
936                    </field>
937                </fields>
938            </register>
939            <register>
940                <name>DONE</name>
941                <addressOffset>0x0000000c</addressOffset>
942                <description>Is the subsystem ready?</description>
943                <resetValue>0x00000000</resetValue>
944                <fields>
945                    <field>
946                        <name>PROC1</name>
947                        <bitRange>[24:24]</bitRange>
948                        <access>read-only</access>
949                    </field>
950                    <field>
951                        <name>PROC0</name>
952                        <bitRange>[23:23]</bitRange>
953                        <access>read-only</access>
954                    </field>
955                    <field>
956                        <name>ACCESSCTRL</name>
957                        <bitRange>[22:22]</bitRange>
958                        <access>read-only</access>
959                    </field>
960                    <field>
961                        <name>SIO</name>
962                        <bitRange>[21:21]</bitRange>
963                        <access>read-only</access>
964                    </field>
965                    <field>
966                        <name>XIP</name>
967                        <bitRange>[20:20]</bitRange>
968                        <access>read-only</access>
969                    </field>
970                    <field>
971                        <name>SRAM9</name>
972                        <bitRange>[19:19]</bitRange>
973                        <access>read-only</access>
974                    </field>
975                    <field>
976                        <name>SRAM8</name>
977                        <bitRange>[18:18]</bitRange>
978                        <access>read-only</access>
979                    </field>
980                    <field>
981                        <name>SRAM7</name>
982                        <bitRange>[17:17]</bitRange>
983                        <access>read-only</access>
984                    </field>
985                    <field>
986                        <name>SRAM6</name>
987                        <bitRange>[16:16]</bitRange>
988                        <access>read-only</access>
989                    </field>
990                    <field>
991                        <name>SRAM5</name>
992                        <bitRange>[15:15]</bitRange>
993                        <access>read-only</access>
994                    </field>
995                    <field>
996                        <name>SRAM4</name>
997                        <bitRange>[14:14]</bitRange>
998                        <access>read-only</access>
999                    </field>
1000                    <field>
1001                        <name>SRAM3</name>
1002                        <bitRange>[13:13]</bitRange>
1003                        <access>read-only</access>
1004                    </field>
1005                    <field>
1006                        <name>SRAM2</name>
1007                        <bitRange>[12:12]</bitRange>
1008                        <access>read-only</access>
1009                    </field>
1010                    <field>
1011                        <name>SRAM1</name>
1012                        <bitRange>[11:11]</bitRange>
1013                        <access>read-only</access>
1014                    </field>
1015                    <field>
1016                        <name>SRAM0</name>
1017                        <bitRange>[10:10]</bitRange>
1018                        <access>read-only</access>
1019                    </field>
1020                    <field>
1021                        <name>BOOTRAM</name>
1022                        <bitRange>[9:9]</bitRange>
1023                        <access>read-only</access>
1024                    </field>
1025                    <field>
1026                        <name>ROM</name>
1027                        <bitRange>[8:8]</bitRange>
1028                        <access>read-only</access>
1029                    </field>
1030                    <field>
1031                        <name>BUSFABRIC</name>
1032                        <bitRange>[7:7]</bitRange>
1033                        <access>read-only</access>
1034                    </field>
1035                    <field>
1036                        <name>PSM_READY</name>
1037                        <bitRange>[6:6]</bitRange>
1038                        <access>read-only</access>
1039                    </field>
1040                    <field>
1041                        <name>CLOCKS</name>
1042                        <bitRange>[5:5]</bitRange>
1043                        <access>read-only</access>
1044                    </field>
1045                    <field>
1046                        <name>RESETS</name>
1047                        <bitRange>[4:4]</bitRange>
1048                        <access>read-only</access>
1049                    </field>
1050                    <field>
1051                        <name>XOSC</name>
1052                        <bitRange>[3:3]</bitRange>
1053                        <access>read-only</access>
1054                    </field>
1055                    <field>
1056                        <name>ROSC</name>
1057                        <bitRange>[2:2]</bitRange>
1058                        <access>read-only</access>
1059                    </field>
1060                    <field>
1061                        <name>OTP</name>
1062                        <bitRange>[1:1]</bitRange>
1063                        <access>read-only</access>
1064                    </field>
1065                    <field>
1066                        <name>PROC_COLD</name>
1067                        <bitRange>[0:0]</bitRange>
1068                        <access>read-only</access>
1069                    </field>
1070                </fields>
1071            </register>
1072        </registers>
1073    </peripheral>
1074    <peripheral>
1075        <name>CLOCKS</name>
1076        <baseAddress>0x40010000</baseAddress>
1077        <addressBlock>
1078            <offset>0</offset>
1079            <size>212</size>
1080            <usage>registers</usage>
1081        </addressBlock>
1082        <interrupt>
1083            <name>CLOCKS_IRQ</name>
1084            <value>30</value>
1085        </interrupt>
1086        <registers>
1087            <register>
1088                <name>CLK_GPOUT0_CTRL</name>
1089                <addressOffset>0x00000000</addressOffset>
1090                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1091                <resetValue>0x00000000</resetValue>
1092                <fields>
1093                    <field>
1094                        <name>ENABLED</name>
1095                        <description>clock generator is enabled</description>
1096                        <bitRange>[28:28]</bitRange>
1097                        <access>read-only</access>
1098                    </field>
1099                    <field>
1100                        <name>NUDGE</name>
1101                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
1102                            This can be done at any time</description>
1103                        <bitRange>[20:20]</bitRange>
1104                        <access>read-write</access>
1105                    </field>
1106                    <field>
1107                        <name>PHASE</name>
1108                        <description>This delays the enable signal by up to 3 cycles of the input clock
1109                            This must be set before the clock is enabled to have any effect</description>
1110                        <bitRange>[17:16]</bitRange>
1111                        <access>read-write</access>
1112                    </field>
1113                    <field>
1114                        <name>DC50</name>
1115                        <description>Enables duty cycle correction for odd divisors, can be changed on-the-fly</description>
1116                        <bitRange>[12:12]</bitRange>
1117                        <access>read-write</access>
1118                    </field>
1119                    <field>
1120                        <name>ENABLE</name>
1121                        <description>Starts and stops the clock generator cleanly</description>
1122                        <bitRange>[11:11]</bitRange>
1123                        <access>read-write</access>
1124                    </field>
1125                    <field>
1126                        <name>KILL</name>
1127                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1128                        <bitRange>[10:10]</bitRange>
1129                        <access>read-write</access>
1130                    </field>
1131                    <field>
1132                        <name>AUXSRC</name>
1133                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1134                        <bitRange>[8:5]</bitRange>
1135                        <access>read-write</access>
1136                        <enumeratedValues>
1137                            <enumeratedValue>
1138                                <name>clksrc_pll_sys</name>
1139                                <value>0</value>
1140                            </enumeratedValue>
1141                            <enumeratedValue>
1142                                <name>clksrc_gpin0</name>
1143                                <value>1</value>
1144                            </enumeratedValue>
1145                            <enumeratedValue>
1146                                <name>clksrc_gpin1</name>
1147                                <value>2</value>
1148                            </enumeratedValue>
1149                            <enumeratedValue>
1150                                <name>clksrc_pll_usb</name>
1151                                <value>3</value>
1152                            </enumeratedValue>
1153                            <enumeratedValue>
1154                                <name>clksrc_pll_usb_primary_ref_opcg</name>
1155                                <value>4</value>
1156                            </enumeratedValue>
1157                            <enumeratedValue>
1158                                <name>rosc_clksrc</name>
1159                                <value>5</value>
1160                            </enumeratedValue>
1161                            <enumeratedValue>
1162                                <name>xosc_clksrc</name>
1163                                <value>6</value>
1164                            </enumeratedValue>
1165                            <enumeratedValue>
1166                                <name>lposc_clksrc</name>
1167                                <value>7</value>
1168                            </enumeratedValue>
1169                            <enumeratedValue>
1170                                <name>clk_sys</name>
1171                                <value>8</value>
1172                            </enumeratedValue>
1173                            <enumeratedValue>
1174                                <name>clk_usb</name>
1175                                <value>9</value>
1176                            </enumeratedValue>
1177                            <enumeratedValue>
1178                                <name>clk_adc</name>
1179                                <value>10</value>
1180                            </enumeratedValue>
1181                            <enumeratedValue>
1182                                <name>clk_ref</name>
1183                                <value>11</value>
1184                            </enumeratedValue>
1185                            <enumeratedValue>
1186                                <name>clk_peri</name>
1187                                <value>12</value>
1188                            </enumeratedValue>
1189                            <enumeratedValue>
1190                                <name>clk_hstx</name>
1191                                <value>13</value>
1192                            </enumeratedValue>
1193                            <enumeratedValue>
1194                                <name>otp_clk2fc</name>
1195                                <value>14</value>
1196                            </enumeratedValue>
1197                        </enumeratedValues>
1198                    </field>
1199                </fields>
1200            </register>
1201            <register>
1202                <name>CLK_GPOUT0_DIV</name>
1203                <addressOffset>0x00000004</addressOffset>
1204                <resetValue>0x00010000</resetValue>
1205                <fields>
1206                    <field>
1207                        <name>INT</name>
1208                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1209                        <bitRange>[31:16]</bitRange>
1210                        <access>read-write</access>
1211                    </field>
1212                    <field>
1213                        <name>FRAC</name>
1214                        <description>Fractional component of the divisor, can be changed on-the-fly</description>
1215                        <bitRange>[15:0]</bitRange>
1216                        <access>read-write</access>
1217                    </field>
1218                </fields>
1219            </register>
1220            <register>
1221                <name>CLK_GPOUT0_SELECTED</name>
1222                <addressOffset>0x00000008</addressOffset>
1223                <description>Indicates which src is currently selected (one-hot)</description>
1224                <resetValue>0x00000001</resetValue>
1225                <fields>
1226                    <field>
1227                        <name>CLK_GPOUT0_SELECTED</name>
1228                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
1229                        <bitRange>[0:0]</bitRange>
1230                        <access>read-only</access>
1231                    </field>
1232                </fields>
1233            </register>
1234            <register>
1235                <name>CLK_GPOUT1_CTRL</name>
1236                <addressOffset>0x0000000c</addressOffset>
1237                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1238                <resetValue>0x00000000</resetValue>
1239                <fields>
1240                    <field>
1241                        <name>ENABLED</name>
1242                        <description>clock generator is enabled</description>
1243                        <bitRange>[28:28]</bitRange>
1244                        <access>read-only</access>
1245                    </field>
1246                    <field>
1247                        <name>NUDGE</name>
1248                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
1249                            This can be done at any time</description>
1250                        <bitRange>[20:20]</bitRange>
1251                        <access>read-write</access>
1252                    </field>
1253                    <field>
1254                        <name>PHASE</name>
1255                        <description>This delays the enable signal by up to 3 cycles of the input clock
1256                            This must be set before the clock is enabled to have any effect</description>
1257                        <bitRange>[17:16]</bitRange>
1258                        <access>read-write</access>
1259                    </field>
1260                    <field>
1261                        <name>DC50</name>
1262                        <description>Enables duty cycle correction for odd divisors, can be changed on-the-fly</description>
1263                        <bitRange>[12:12]</bitRange>
1264                        <access>read-write</access>
1265                    </field>
1266                    <field>
1267                        <name>ENABLE</name>
1268                        <description>Starts and stops the clock generator cleanly</description>
1269                        <bitRange>[11:11]</bitRange>
1270                        <access>read-write</access>
1271                    </field>
1272                    <field>
1273                        <name>KILL</name>
1274                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1275                        <bitRange>[10:10]</bitRange>
1276                        <access>read-write</access>
1277                    </field>
1278                    <field>
1279                        <name>AUXSRC</name>
1280                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1281                        <bitRange>[8:5]</bitRange>
1282                        <access>read-write</access>
1283                        <enumeratedValues>
1284                            <enumeratedValue>
1285                                <name>clksrc_pll_sys</name>
1286                                <value>0</value>
1287                            </enumeratedValue>
1288                            <enumeratedValue>
1289                                <name>clksrc_gpin0</name>
1290                                <value>1</value>
1291                            </enumeratedValue>
1292                            <enumeratedValue>
1293                                <name>clksrc_gpin1</name>
1294                                <value>2</value>
1295                            </enumeratedValue>
1296                            <enumeratedValue>
1297                                <name>clksrc_pll_usb</name>
1298                                <value>3</value>
1299                            </enumeratedValue>
1300                            <enumeratedValue>
1301                                <name>clksrc_pll_usb_primary_ref_opcg</name>
1302                                <value>4</value>
1303                            </enumeratedValue>
1304                            <enumeratedValue>
1305                                <name>rosc_clksrc</name>
1306                                <value>5</value>
1307                            </enumeratedValue>
1308                            <enumeratedValue>
1309                                <name>xosc_clksrc</name>
1310                                <value>6</value>
1311                            </enumeratedValue>
1312                            <enumeratedValue>
1313                                <name>lposc_clksrc</name>
1314                                <value>7</value>
1315                            </enumeratedValue>
1316                            <enumeratedValue>
1317                                <name>clk_sys</name>
1318                                <value>8</value>
1319                            </enumeratedValue>
1320                            <enumeratedValue>
1321                                <name>clk_usb</name>
1322                                <value>9</value>
1323                            </enumeratedValue>
1324                            <enumeratedValue>
1325                                <name>clk_adc</name>
1326                                <value>10</value>
1327                            </enumeratedValue>
1328                            <enumeratedValue>
1329                                <name>clk_ref</name>
1330                                <value>11</value>
1331                            </enumeratedValue>
1332                            <enumeratedValue>
1333                                <name>clk_peri</name>
1334                                <value>12</value>
1335                            </enumeratedValue>
1336                            <enumeratedValue>
1337                                <name>clk_hstx</name>
1338                                <value>13</value>
1339                            </enumeratedValue>
1340                            <enumeratedValue>
1341                                <name>otp_clk2fc</name>
1342                                <value>14</value>
1343                            </enumeratedValue>
1344                        </enumeratedValues>
1345                    </field>
1346                </fields>
1347            </register>
1348            <register>
1349                <name>CLK_GPOUT1_DIV</name>
1350                <addressOffset>0x00000010</addressOffset>
1351                <resetValue>0x00010000</resetValue>
1352                <fields>
1353                    <field>
1354                        <name>INT</name>
1355                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1356                        <bitRange>[31:16]</bitRange>
1357                        <access>read-write</access>
1358                    </field>
1359                    <field>
1360                        <name>FRAC</name>
1361                        <description>Fractional component of the divisor, can be changed on-the-fly</description>
1362                        <bitRange>[15:0]</bitRange>
1363                        <access>read-write</access>
1364                    </field>
1365                </fields>
1366            </register>
1367            <register>
1368                <name>CLK_GPOUT1_SELECTED</name>
1369                <addressOffset>0x00000014</addressOffset>
1370                <description>Indicates which src is currently selected (one-hot)</description>
1371                <resetValue>0x00000001</resetValue>
1372                <fields>
1373                    <field>
1374                        <name>CLK_GPOUT1_SELECTED</name>
1375                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
1376                        <bitRange>[0:0]</bitRange>
1377                        <access>read-only</access>
1378                    </field>
1379                </fields>
1380            </register>
1381            <register>
1382                <name>CLK_GPOUT2_CTRL</name>
1383                <addressOffset>0x00000018</addressOffset>
1384                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1385                <resetValue>0x00000000</resetValue>
1386                <fields>
1387                    <field>
1388                        <name>ENABLED</name>
1389                        <description>clock generator is enabled</description>
1390                        <bitRange>[28:28]</bitRange>
1391                        <access>read-only</access>
1392                    </field>
1393                    <field>
1394                        <name>NUDGE</name>
1395                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
1396                            This can be done at any time</description>
1397                        <bitRange>[20:20]</bitRange>
1398                        <access>read-write</access>
1399                    </field>
1400                    <field>
1401                        <name>PHASE</name>
1402                        <description>This delays the enable signal by up to 3 cycles of the input clock
1403                            This must be set before the clock is enabled to have any effect</description>
1404                        <bitRange>[17:16]</bitRange>
1405                        <access>read-write</access>
1406                    </field>
1407                    <field>
1408                        <name>DC50</name>
1409                        <description>Enables duty cycle correction for odd divisors, can be changed on-the-fly</description>
1410                        <bitRange>[12:12]</bitRange>
1411                        <access>read-write</access>
1412                    </field>
1413                    <field>
1414                        <name>ENABLE</name>
1415                        <description>Starts and stops the clock generator cleanly</description>
1416                        <bitRange>[11:11]</bitRange>
1417                        <access>read-write</access>
1418                    </field>
1419                    <field>
1420                        <name>KILL</name>
1421                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1422                        <bitRange>[10:10]</bitRange>
1423                        <access>read-write</access>
1424                    </field>
1425                    <field>
1426                        <name>AUXSRC</name>
1427                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1428                        <bitRange>[8:5]</bitRange>
1429                        <access>read-write</access>
1430                        <enumeratedValues>
1431                            <enumeratedValue>
1432                                <name>clksrc_pll_sys</name>
1433                                <value>0</value>
1434                            </enumeratedValue>
1435                            <enumeratedValue>
1436                                <name>clksrc_gpin0</name>
1437                                <value>1</value>
1438                            </enumeratedValue>
1439                            <enumeratedValue>
1440                                <name>clksrc_gpin1</name>
1441                                <value>2</value>
1442                            </enumeratedValue>
1443                            <enumeratedValue>
1444                                <name>clksrc_pll_usb</name>
1445                                <value>3</value>
1446                            </enumeratedValue>
1447                            <enumeratedValue>
1448                                <name>clksrc_pll_usb_primary_ref_opcg</name>
1449                                <value>4</value>
1450                            </enumeratedValue>
1451                            <enumeratedValue>
1452                                <name>rosc_clksrc_ph</name>
1453                                <value>5</value>
1454                            </enumeratedValue>
1455                            <enumeratedValue>
1456                                <name>xosc_clksrc</name>
1457                                <value>6</value>
1458                            </enumeratedValue>
1459                            <enumeratedValue>
1460                                <name>lposc_clksrc</name>
1461                                <value>7</value>
1462                            </enumeratedValue>
1463                            <enumeratedValue>
1464                                <name>clk_sys</name>
1465                                <value>8</value>
1466                            </enumeratedValue>
1467                            <enumeratedValue>
1468                                <name>clk_usb</name>
1469                                <value>9</value>
1470                            </enumeratedValue>
1471                            <enumeratedValue>
1472                                <name>clk_adc</name>
1473                                <value>10</value>
1474                            </enumeratedValue>
1475                            <enumeratedValue>
1476                                <name>clk_ref</name>
1477                                <value>11</value>
1478                            </enumeratedValue>
1479                            <enumeratedValue>
1480                                <name>clk_peri</name>
1481                                <value>12</value>
1482                            </enumeratedValue>
1483                            <enumeratedValue>
1484                                <name>clk_hstx</name>
1485                                <value>13</value>
1486                            </enumeratedValue>
1487                            <enumeratedValue>
1488                                <name>otp_clk2fc</name>
1489                                <value>14</value>
1490                            </enumeratedValue>
1491                        </enumeratedValues>
1492                    </field>
1493                </fields>
1494            </register>
1495            <register>
1496                <name>CLK_GPOUT2_DIV</name>
1497                <addressOffset>0x0000001c</addressOffset>
1498                <resetValue>0x00010000</resetValue>
1499                <fields>
1500                    <field>
1501                        <name>INT</name>
1502                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1503                        <bitRange>[31:16]</bitRange>
1504                        <access>read-write</access>
1505                    </field>
1506                    <field>
1507                        <name>FRAC</name>
1508                        <description>Fractional component of the divisor, can be changed on-the-fly</description>
1509                        <bitRange>[15:0]</bitRange>
1510                        <access>read-write</access>
1511                    </field>
1512                </fields>
1513            </register>
1514            <register>
1515                <name>CLK_GPOUT2_SELECTED</name>
1516                <addressOffset>0x00000020</addressOffset>
1517                <description>Indicates which src is currently selected (one-hot)</description>
1518                <resetValue>0x00000001</resetValue>
1519                <fields>
1520                    <field>
1521                        <name>CLK_GPOUT2_SELECTED</name>
1522                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
1523                        <bitRange>[0:0]</bitRange>
1524                        <access>read-only</access>
1525                    </field>
1526                </fields>
1527            </register>
1528            <register>
1529                <name>CLK_GPOUT3_CTRL</name>
1530                <addressOffset>0x00000024</addressOffset>
1531                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1532                <resetValue>0x00000000</resetValue>
1533                <fields>
1534                    <field>
1535                        <name>ENABLED</name>
1536                        <description>clock generator is enabled</description>
1537                        <bitRange>[28:28]</bitRange>
1538                        <access>read-only</access>
1539                    </field>
1540                    <field>
1541                        <name>NUDGE</name>
1542                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
1543                            This can be done at any time</description>
1544                        <bitRange>[20:20]</bitRange>
1545                        <access>read-write</access>
1546                    </field>
1547                    <field>
1548                        <name>PHASE</name>
1549                        <description>This delays the enable signal by up to 3 cycles of the input clock
1550                            This must be set before the clock is enabled to have any effect</description>
1551                        <bitRange>[17:16]</bitRange>
1552                        <access>read-write</access>
1553                    </field>
1554                    <field>
1555                        <name>DC50</name>
1556                        <description>Enables duty cycle correction for odd divisors, can be changed on-the-fly</description>
1557                        <bitRange>[12:12]</bitRange>
1558                        <access>read-write</access>
1559                    </field>
1560                    <field>
1561                        <name>ENABLE</name>
1562                        <description>Starts and stops the clock generator cleanly</description>
1563                        <bitRange>[11:11]</bitRange>
1564                        <access>read-write</access>
1565                    </field>
1566                    <field>
1567                        <name>KILL</name>
1568                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1569                        <bitRange>[10:10]</bitRange>
1570                        <access>read-write</access>
1571                    </field>
1572                    <field>
1573                        <name>AUXSRC</name>
1574                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1575                        <bitRange>[8:5]</bitRange>
1576                        <access>read-write</access>
1577                        <enumeratedValues>
1578                            <enumeratedValue>
1579                                <name>clksrc_pll_sys</name>
1580                                <value>0</value>
1581                            </enumeratedValue>
1582                            <enumeratedValue>
1583                                <name>clksrc_gpin0</name>
1584                                <value>1</value>
1585                            </enumeratedValue>
1586                            <enumeratedValue>
1587                                <name>clksrc_gpin1</name>
1588                                <value>2</value>
1589                            </enumeratedValue>
1590                            <enumeratedValue>
1591                                <name>clksrc_pll_usb</name>
1592                                <value>3</value>
1593                            </enumeratedValue>
1594                            <enumeratedValue>
1595                                <name>clksrc_pll_usb_primary_ref_opcg</name>
1596                                <value>4</value>
1597                            </enumeratedValue>
1598                            <enumeratedValue>
1599                                <name>rosc_clksrc_ph</name>
1600                                <value>5</value>
1601                            </enumeratedValue>
1602                            <enumeratedValue>
1603                                <name>xosc_clksrc</name>
1604                                <value>6</value>
1605                            </enumeratedValue>
1606                            <enumeratedValue>
1607                                <name>lposc_clksrc</name>
1608                                <value>7</value>
1609                            </enumeratedValue>
1610                            <enumeratedValue>
1611                                <name>clk_sys</name>
1612                                <value>8</value>
1613                            </enumeratedValue>
1614                            <enumeratedValue>
1615                                <name>clk_usb</name>
1616                                <value>9</value>
1617                            </enumeratedValue>
1618                            <enumeratedValue>
1619                                <name>clk_adc</name>
1620                                <value>10</value>
1621                            </enumeratedValue>
1622                            <enumeratedValue>
1623                                <name>clk_ref</name>
1624                                <value>11</value>
1625                            </enumeratedValue>
1626                            <enumeratedValue>
1627                                <name>clk_peri</name>
1628                                <value>12</value>
1629                            </enumeratedValue>
1630                            <enumeratedValue>
1631                                <name>clk_hstx</name>
1632                                <value>13</value>
1633                            </enumeratedValue>
1634                            <enumeratedValue>
1635                                <name>otp_clk2fc</name>
1636                                <value>14</value>
1637                            </enumeratedValue>
1638                        </enumeratedValues>
1639                    </field>
1640                </fields>
1641            </register>
1642            <register>
1643                <name>CLK_GPOUT3_DIV</name>
1644                <addressOffset>0x00000028</addressOffset>
1645                <resetValue>0x00010000</resetValue>
1646                <fields>
1647                    <field>
1648                        <name>INT</name>
1649                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1650                        <bitRange>[31:16]</bitRange>
1651                        <access>read-write</access>
1652                    </field>
1653                    <field>
1654                        <name>FRAC</name>
1655                        <description>Fractional component of the divisor, can be changed on-the-fly</description>
1656                        <bitRange>[15:0]</bitRange>
1657                        <access>read-write</access>
1658                    </field>
1659                </fields>
1660            </register>
1661            <register>
1662                <name>CLK_GPOUT3_SELECTED</name>
1663                <addressOffset>0x0000002c</addressOffset>
1664                <description>Indicates which src is currently selected (one-hot)</description>
1665                <resetValue>0x00000001</resetValue>
1666                <fields>
1667                    <field>
1668                        <name>CLK_GPOUT3_SELECTED</name>
1669                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
1670                        <bitRange>[0:0]</bitRange>
1671                        <access>read-only</access>
1672                    </field>
1673                </fields>
1674            </register>
1675            <register>
1676                <name>CLK_REF_CTRL</name>
1677                <addressOffset>0x00000030</addressOffset>
1678                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1679                <resetValue>0x00000000</resetValue>
1680                <fields>
1681                    <field>
1682                        <name>AUXSRC</name>
1683                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1684                        <bitRange>[6:5]</bitRange>
1685                        <access>read-write</access>
1686                        <enumeratedValues>
1687                            <enumeratedValue>
1688                                <name>clksrc_pll_usb</name>
1689                                <value>0</value>
1690                            </enumeratedValue>
1691                            <enumeratedValue>
1692                                <name>clksrc_gpin0</name>
1693                                <value>1</value>
1694                            </enumeratedValue>
1695                            <enumeratedValue>
1696                                <name>clksrc_gpin1</name>
1697                                <value>2</value>
1698                            </enumeratedValue>
1699                            <enumeratedValue>
1700                                <name>clksrc_pll_usb_primary_ref_opcg</name>
1701                                <value>3</value>
1702                            </enumeratedValue>
1703                        </enumeratedValues>
1704                    </field>
1705                    <field>
1706                        <name>SRC</name>
1707                        <description>Selects the clock source glitchlessly, can be changed on-the-fly</description>
1708                        <bitRange>[1:0]</bitRange>
1709                        <access>read-write</access>
1710                        <enumeratedValues>
1711                            <enumeratedValue>
1712                                <name>rosc_clksrc_ph</name>
1713                                <value>0</value>
1714                            </enumeratedValue>
1715                            <enumeratedValue>
1716                                <name>clksrc_clk_ref_aux</name>
1717                                <value>1</value>
1718                            </enumeratedValue>
1719                            <enumeratedValue>
1720                                <name>xosc_clksrc</name>
1721                                <value>2</value>
1722                            </enumeratedValue>
1723                            <enumeratedValue>
1724                                <name>lposc_clksrc</name>
1725                                <value>3</value>
1726                            </enumeratedValue>
1727                        </enumeratedValues>
1728                    </field>
1729                </fields>
1730            </register>
1731            <register>
1732                <name>CLK_REF_DIV</name>
1733                <addressOffset>0x00000034</addressOffset>
1734                <resetValue>0x00010000</resetValue>
1735                <fields>
1736                    <field>
1737                        <name>INT</name>
1738                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1739                        <bitRange>[23:16]</bitRange>
1740                        <access>read-write</access>
1741                    </field>
1742                </fields>
1743            </register>
1744            <register>
1745                <name>CLK_REF_SELECTED</name>
1746                <addressOffset>0x00000038</addressOffset>
1747                <description>Indicates which src is currently selected (one-hot)</description>
1748                <resetValue>0x00000001</resetValue>
1749                <fields>
1750                    <field>
1751                        <name>CLK_REF_SELECTED</name>
1752                        <description>The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.</description>
1753                        <bitRange>[3:0]</bitRange>
1754                        <access>read-only</access>
1755                    </field>
1756                </fields>
1757            </register>
1758            <register>
1759                <name>CLK_SYS_CTRL</name>
1760                <addressOffset>0x0000003c</addressOffset>
1761                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1762                <resetValue>0x00000000</resetValue>
1763                <fields>
1764                    <field>
1765                        <name>AUXSRC</name>
1766                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1767                        <bitRange>[7:5]</bitRange>
1768                        <access>read-write</access>
1769                        <enumeratedValues>
1770                            <enumeratedValue>
1771                                <name>clksrc_pll_sys</name>
1772                                <value>0</value>
1773                            </enumeratedValue>
1774                            <enumeratedValue>
1775                                <name>clksrc_pll_usb</name>
1776                                <value>1</value>
1777                            </enumeratedValue>
1778                            <enumeratedValue>
1779                                <name>rosc_clksrc</name>
1780                                <value>2</value>
1781                            </enumeratedValue>
1782                            <enumeratedValue>
1783                                <name>xosc_clksrc</name>
1784                                <value>3</value>
1785                            </enumeratedValue>
1786                            <enumeratedValue>
1787                                <name>clksrc_gpin0</name>
1788                                <value>4</value>
1789                            </enumeratedValue>
1790                            <enumeratedValue>
1791                                <name>clksrc_gpin1</name>
1792                                <value>5</value>
1793                            </enumeratedValue>
1794                        </enumeratedValues>
1795                    </field>
1796                    <field>
1797                        <name>SRC</name>
1798                        <description>Selects the clock source glitchlessly, can be changed on-the-fly</description>
1799                        <bitRange>[0:0]</bitRange>
1800                        <access>read-write</access>
1801                        <enumeratedValues>
1802                            <enumeratedValue>
1803                                <name>clk_ref</name>
1804                                <value>0</value>
1805                            </enumeratedValue>
1806                            <enumeratedValue>
1807                                <name>clksrc_clk_sys_aux</name>
1808                                <value>1</value>
1809                            </enumeratedValue>
1810                        </enumeratedValues>
1811                    </field>
1812                </fields>
1813            </register>
1814            <register>
1815                <name>CLK_SYS_DIV</name>
1816                <addressOffset>0x00000040</addressOffset>
1817                <resetValue>0x00010000</resetValue>
1818                <fields>
1819                    <field>
1820                        <name>INT</name>
1821                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1822                        <bitRange>[31:16]</bitRange>
1823                        <access>read-write</access>
1824                    </field>
1825                    <field>
1826                        <name>FRAC</name>
1827                        <description>Fractional component of the divisor, can be changed on-the-fly</description>
1828                        <bitRange>[15:0]</bitRange>
1829                        <access>read-write</access>
1830                    </field>
1831                </fields>
1832            </register>
1833            <register>
1834                <name>CLK_SYS_SELECTED</name>
1835                <addressOffset>0x00000044</addressOffset>
1836                <description>Indicates which src is currently selected (one-hot)</description>
1837                <resetValue>0x00000001</resetValue>
1838                <fields>
1839                    <field>
1840                        <name>CLK_SYS_SELECTED</name>
1841                        <description>The glitchless multiplexer does not switch instantaneously (to avoid glitches), so software should poll this register to wait for the switch to complete. This register contains one decoded bit for each of the clock sources enumerated in the CTRL SRC field. At most one of these bits will be set at any time, indicating that clock is currently present at the output of the glitchless mux. Whilst switching is in progress, this register may briefly show all-0s.</description>
1842                        <bitRange>[1:0]</bitRange>
1843                        <access>read-only</access>
1844                    </field>
1845                </fields>
1846            </register>
1847            <register>
1848                <name>CLK_PERI_CTRL</name>
1849                <addressOffset>0x00000048</addressOffset>
1850                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1851                <resetValue>0x00000000</resetValue>
1852                <fields>
1853                    <field>
1854                        <name>ENABLED</name>
1855                        <description>clock generator is enabled</description>
1856                        <bitRange>[28:28]</bitRange>
1857                        <access>read-only</access>
1858                    </field>
1859                    <field>
1860                        <name>ENABLE</name>
1861                        <description>Starts and stops the clock generator cleanly</description>
1862                        <bitRange>[11:11]</bitRange>
1863                        <access>read-write</access>
1864                    </field>
1865                    <field>
1866                        <name>KILL</name>
1867                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1868                        <bitRange>[10:10]</bitRange>
1869                        <access>read-write</access>
1870                    </field>
1871                    <field>
1872                        <name>AUXSRC</name>
1873                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1874                        <bitRange>[7:5]</bitRange>
1875                        <access>read-write</access>
1876                        <enumeratedValues>
1877                            <enumeratedValue>
1878                                <name>clk_sys</name>
1879                                <value>0</value>
1880                            </enumeratedValue>
1881                            <enumeratedValue>
1882                                <name>clksrc_pll_sys</name>
1883                                <value>1</value>
1884                            </enumeratedValue>
1885                            <enumeratedValue>
1886                                <name>clksrc_pll_usb</name>
1887                                <value>2</value>
1888                            </enumeratedValue>
1889                            <enumeratedValue>
1890                                <name>rosc_clksrc_ph</name>
1891                                <value>3</value>
1892                            </enumeratedValue>
1893                            <enumeratedValue>
1894                                <name>xosc_clksrc</name>
1895                                <value>4</value>
1896                            </enumeratedValue>
1897                            <enumeratedValue>
1898                                <name>clksrc_gpin0</name>
1899                                <value>5</value>
1900                            </enumeratedValue>
1901                            <enumeratedValue>
1902                                <name>clksrc_gpin1</name>
1903                                <value>6</value>
1904                            </enumeratedValue>
1905                        </enumeratedValues>
1906                    </field>
1907                </fields>
1908            </register>
1909            <register>
1910                <name>CLK_PERI_DIV</name>
1911                <addressOffset>0x0000004c</addressOffset>
1912                <resetValue>0x00010000</resetValue>
1913                <fields>
1914                    <field>
1915                        <name>INT</name>
1916                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
1917                        <bitRange>[17:16]</bitRange>
1918                        <access>read-write</access>
1919                    </field>
1920                </fields>
1921            </register>
1922            <register>
1923                <name>CLK_PERI_SELECTED</name>
1924                <addressOffset>0x00000050</addressOffset>
1925                <description>Indicates which src is currently selected (one-hot)</description>
1926                <resetValue>0x00000001</resetValue>
1927                <fields>
1928                    <field>
1929                        <name>CLK_PERI_SELECTED</name>
1930                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
1931                        <bitRange>[0:0]</bitRange>
1932                        <access>read-only</access>
1933                    </field>
1934                </fields>
1935            </register>
1936            <register>
1937                <name>CLK_HSTX_CTRL</name>
1938                <addressOffset>0x00000054</addressOffset>
1939                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
1940                <resetValue>0x00000000</resetValue>
1941                <fields>
1942                    <field>
1943                        <name>ENABLED</name>
1944                        <description>clock generator is enabled</description>
1945                        <bitRange>[28:28]</bitRange>
1946                        <access>read-only</access>
1947                    </field>
1948                    <field>
1949                        <name>NUDGE</name>
1950                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
1951                            This can be done at any time</description>
1952                        <bitRange>[20:20]</bitRange>
1953                        <access>read-write</access>
1954                    </field>
1955                    <field>
1956                        <name>PHASE</name>
1957                        <description>This delays the enable signal by up to 3 cycles of the input clock
1958                            This must be set before the clock is enabled to have any effect</description>
1959                        <bitRange>[17:16]</bitRange>
1960                        <access>read-write</access>
1961                    </field>
1962                    <field>
1963                        <name>ENABLE</name>
1964                        <description>Starts and stops the clock generator cleanly</description>
1965                        <bitRange>[11:11]</bitRange>
1966                        <access>read-write</access>
1967                    </field>
1968                    <field>
1969                        <name>KILL</name>
1970                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
1971                        <bitRange>[10:10]</bitRange>
1972                        <access>read-write</access>
1973                    </field>
1974                    <field>
1975                        <name>AUXSRC</name>
1976                        <description>Selects the auxiliary clock source, will glitch when switching</description>
1977                        <bitRange>[7:5]</bitRange>
1978                        <access>read-write</access>
1979                        <enumeratedValues>
1980                            <enumeratedValue>
1981                                <name>clk_sys</name>
1982                                <value>0</value>
1983                            </enumeratedValue>
1984                            <enumeratedValue>
1985                                <name>clksrc_pll_sys</name>
1986                                <value>1</value>
1987                            </enumeratedValue>
1988                            <enumeratedValue>
1989                                <name>clksrc_pll_usb</name>
1990                                <value>2</value>
1991                            </enumeratedValue>
1992                            <enumeratedValue>
1993                                <name>clksrc_gpin0</name>
1994                                <value>3</value>
1995                            </enumeratedValue>
1996                            <enumeratedValue>
1997                                <name>clksrc_gpin1</name>
1998                                <value>4</value>
1999                            </enumeratedValue>
2000                        </enumeratedValues>
2001                    </field>
2002                </fields>
2003            </register>
2004            <register>
2005                <name>CLK_HSTX_DIV</name>
2006                <addressOffset>0x00000058</addressOffset>
2007                <resetValue>0x00010000</resetValue>
2008                <fields>
2009                    <field>
2010                        <name>INT</name>
2011                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
2012                        <bitRange>[17:16]</bitRange>
2013                        <access>read-write</access>
2014                    </field>
2015                </fields>
2016            </register>
2017            <register>
2018                <name>CLK_HSTX_SELECTED</name>
2019                <addressOffset>0x0000005c</addressOffset>
2020                <description>Indicates which src is currently selected (one-hot)</description>
2021                <resetValue>0x00000001</resetValue>
2022                <fields>
2023                    <field>
2024                        <name>CLK_HSTX_SELECTED</name>
2025                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
2026                        <bitRange>[0:0]</bitRange>
2027                        <access>read-only</access>
2028                    </field>
2029                </fields>
2030            </register>
2031            <register>
2032                <name>CLK_USB_CTRL</name>
2033                <addressOffset>0x00000060</addressOffset>
2034                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
2035                <resetValue>0x00000000</resetValue>
2036                <fields>
2037                    <field>
2038                        <name>ENABLED</name>
2039                        <description>clock generator is enabled</description>
2040                        <bitRange>[28:28]</bitRange>
2041                        <access>read-only</access>
2042                    </field>
2043                    <field>
2044                        <name>NUDGE</name>
2045                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
2046                            This can be done at any time</description>
2047                        <bitRange>[20:20]</bitRange>
2048                        <access>read-write</access>
2049                    </field>
2050                    <field>
2051                        <name>PHASE</name>
2052                        <description>This delays the enable signal by up to 3 cycles of the input clock
2053                            This must be set before the clock is enabled to have any effect</description>
2054                        <bitRange>[17:16]</bitRange>
2055                        <access>read-write</access>
2056                    </field>
2057                    <field>
2058                        <name>ENABLE</name>
2059                        <description>Starts and stops the clock generator cleanly</description>
2060                        <bitRange>[11:11]</bitRange>
2061                        <access>read-write</access>
2062                    </field>
2063                    <field>
2064                        <name>KILL</name>
2065                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
2066                        <bitRange>[10:10]</bitRange>
2067                        <access>read-write</access>
2068                    </field>
2069                    <field>
2070                        <name>AUXSRC</name>
2071                        <description>Selects the auxiliary clock source, will glitch when switching</description>
2072                        <bitRange>[7:5]</bitRange>
2073                        <access>read-write</access>
2074                        <enumeratedValues>
2075                            <enumeratedValue>
2076                                <name>clksrc_pll_usb</name>
2077                                <value>0</value>
2078                            </enumeratedValue>
2079                            <enumeratedValue>
2080                                <name>clksrc_pll_sys</name>
2081                                <value>1</value>
2082                            </enumeratedValue>
2083                            <enumeratedValue>
2084                                <name>rosc_clksrc_ph</name>
2085                                <value>2</value>
2086                            </enumeratedValue>
2087                            <enumeratedValue>
2088                                <name>xosc_clksrc</name>
2089                                <value>3</value>
2090                            </enumeratedValue>
2091                            <enumeratedValue>
2092                                <name>clksrc_gpin0</name>
2093                                <value>4</value>
2094                            </enumeratedValue>
2095                            <enumeratedValue>
2096                                <name>clksrc_gpin1</name>
2097                                <value>5</value>
2098                            </enumeratedValue>
2099                        </enumeratedValues>
2100                    </field>
2101                </fields>
2102            </register>
2103            <register>
2104                <name>CLK_USB_DIV</name>
2105                <addressOffset>0x00000064</addressOffset>
2106                <resetValue>0x00010000</resetValue>
2107                <fields>
2108                    <field>
2109                        <name>INT</name>
2110                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
2111                        <bitRange>[19:16]</bitRange>
2112                        <access>read-write</access>
2113                    </field>
2114                </fields>
2115            </register>
2116            <register>
2117                <name>CLK_USB_SELECTED</name>
2118                <addressOffset>0x00000068</addressOffset>
2119                <description>Indicates which src is currently selected (one-hot)</description>
2120                <resetValue>0x00000001</resetValue>
2121                <fields>
2122                    <field>
2123                        <name>CLK_USB_SELECTED</name>
2124                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
2125                        <bitRange>[0:0]</bitRange>
2126                        <access>read-only</access>
2127                    </field>
2128                </fields>
2129            </register>
2130            <register>
2131                <name>CLK_ADC_CTRL</name>
2132                <addressOffset>0x0000006c</addressOffset>
2133                <description>Clock control, can be changed on-the-fly (except for auxsrc)</description>
2134                <resetValue>0x00000000</resetValue>
2135                <fields>
2136                    <field>
2137                        <name>ENABLED</name>
2138                        <description>clock generator is enabled</description>
2139                        <bitRange>[28:28]</bitRange>
2140                        <access>read-only</access>
2141                    </field>
2142                    <field>
2143                        <name>NUDGE</name>
2144                        <description>An edge on this signal shifts the phase of the output by 1 cycle of the input clock
2145                            This can be done at any time</description>
2146                        <bitRange>[20:20]</bitRange>
2147                        <access>read-write</access>
2148                    </field>
2149                    <field>
2150                        <name>PHASE</name>
2151                        <description>This delays the enable signal by up to 3 cycles of the input clock
2152                            This must be set before the clock is enabled to have any effect</description>
2153                        <bitRange>[17:16]</bitRange>
2154                        <access>read-write</access>
2155                    </field>
2156                    <field>
2157                        <name>ENABLE</name>
2158                        <description>Starts and stops the clock generator cleanly</description>
2159                        <bitRange>[11:11]</bitRange>
2160                        <access>read-write</access>
2161                    </field>
2162                    <field>
2163                        <name>KILL</name>
2164                        <description>Asynchronously kills the clock generator, enable must be set low before deasserting kill</description>
2165                        <bitRange>[10:10]</bitRange>
2166                        <access>read-write</access>
2167                    </field>
2168                    <field>
2169                        <name>AUXSRC</name>
2170                        <description>Selects the auxiliary clock source, will glitch when switching</description>
2171                        <bitRange>[7:5]</bitRange>
2172                        <access>read-write</access>
2173                        <enumeratedValues>
2174                            <enumeratedValue>
2175                                <name>clksrc_pll_usb</name>
2176                                <value>0</value>
2177                            </enumeratedValue>
2178                            <enumeratedValue>
2179                                <name>clksrc_pll_sys</name>
2180                                <value>1</value>
2181                            </enumeratedValue>
2182                            <enumeratedValue>
2183                                <name>rosc_clksrc_ph</name>
2184                                <value>2</value>
2185                            </enumeratedValue>
2186                            <enumeratedValue>
2187                                <name>xosc_clksrc</name>
2188                                <value>3</value>
2189                            </enumeratedValue>
2190                            <enumeratedValue>
2191                                <name>clksrc_gpin0</name>
2192                                <value>4</value>
2193                            </enumeratedValue>
2194                            <enumeratedValue>
2195                                <name>clksrc_gpin1</name>
2196                                <value>5</value>
2197                            </enumeratedValue>
2198                        </enumeratedValues>
2199                    </field>
2200                </fields>
2201            </register>
2202            <register>
2203                <name>CLK_ADC_DIV</name>
2204                <addressOffset>0x00000070</addressOffset>
2205                <resetValue>0x00010000</resetValue>
2206                <fields>
2207                    <field>
2208                        <name>INT</name>
2209                        <description>Integer part of clock divisor, 0 -&gt; max+1, can be changed on-the-fly</description>
2210                        <bitRange>[19:16]</bitRange>
2211                        <access>read-write</access>
2212                    </field>
2213                </fields>
2214            </register>
2215            <register>
2216                <name>CLK_ADC_SELECTED</name>
2217                <addressOffset>0x00000074</addressOffset>
2218                <description>Indicates which src is currently selected (one-hot)</description>
2219                <resetValue>0x00000001</resetValue>
2220                <fields>
2221                    <field>
2222                        <name>CLK_ADC_SELECTED</name>
2223                        <description>This slice does not have a glitchless mux (only the AUX_SRC field is present, not SRC) so this register is hardwired to 0x1.</description>
2224                        <bitRange>[0:0]</bitRange>
2225                        <access>read-only</access>
2226                    </field>
2227                </fields>
2228            </register>
2229            <register>
2230                <name>DFTCLK_XOSC_CTRL</name>
2231                <addressOffset>0x00000078</addressOffset>
2232                <resetValue>0x00000000</resetValue>
2233                <fields>
2234                    <field>
2235                        <name>SRC</name>
2236                        <bitRange>[1:0]</bitRange>
2237                        <access>read-write</access>
2238                        <enumeratedValues>
2239                            <enumeratedValue>
2240                                <name>NULL</name>
2241                                <value>0</value>
2242                            </enumeratedValue>
2243                            <enumeratedValue>
2244                                <name>clksrc_pll_usb_primary</name>
2245                                <value>1</value>
2246                            </enumeratedValue>
2247                            <enumeratedValue>
2248                                <name>clksrc_gpin0</name>
2249                                <value>2</value>
2250                            </enumeratedValue>
2251                        </enumeratedValues>
2252                    </field>
2253                </fields>
2254            </register>
2255            <register>
2256                <name>DFTCLK_ROSC_CTRL</name>
2257                <addressOffset>0x0000007c</addressOffset>
2258                <resetValue>0x00000000</resetValue>
2259                <fields>
2260                    <field>
2261                        <name>SRC</name>
2262                        <bitRange>[1:0]</bitRange>
2263                        <access>read-write</access>
2264                        <enumeratedValues>
2265                            <enumeratedValue>
2266                                <name>NULL</name>
2267                                <value>0</value>
2268                            </enumeratedValue>
2269                            <enumeratedValue>
2270                                <name>clksrc_pll_sys_primary_rosc</name>
2271                                <value>1</value>
2272                            </enumeratedValue>
2273                            <enumeratedValue>
2274                                <name>clksrc_gpin1</name>
2275                                <value>2</value>
2276                            </enumeratedValue>
2277                        </enumeratedValues>
2278                    </field>
2279                </fields>
2280            </register>
2281            <register>
2282                <name>DFTCLK_LPOSC_CTRL</name>
2283                <addressOffset>0x00000080</addressOffset>
2284                <resetValue>0x00000000</resetValue>
2285                <fields>
2286                    <field>
2287                        <name>SRC</name>
2288                        <bitRange>[1:0]</bitRange>
2289                        <access>read-write</access>
2290                        <enumeratedValues>
2291                            <enumeratedValue>
2292                                <name>NULL</name>
2293                                <value>0</value>
2294                            </enumeratedValue>
2295                            <enumeratedValue>
2296                                <name>clksrc_pll_usb_primary_lposc</name>
2297                                <value>1</value>
2298                            </enumeratedValue>
2299                            <enumeratedValue>
2300                                <name>clksrc_gpin1</name>
2301                                <value>2</value>
2302                            </enumeratedValue>
2303                        </enumeratedValues>
2304                    </field>
2305                </fields>
2306            </register>
2307            <register>
2308                <name>CLK_SYS_RESUS_CTRL</name>
2309                <addressOffset>0x00000084</addressOffset>
2310                <resetValue>0x000000ff</resetValue>
2311                <fields>
2312                    <field>
2313                        <name>CLEAR</name>
2314                        <description>For clearing the resus after the fault that triggered it has been corrected</description>
2315                        <bitRange>[16:16]</bitRange>
2316                        <access>read-write</access>
2317                    </field>
2318                    <field>
2319                        <name>FRCE</name>
2320                        <description>Force a resus, for test purposes only</description>
2321                        <bitRange>[12:12]</bitRange>
2322                        <access>read-write</access>
2323                    </field>
2324                    <field>
2325                        <name>ENABLE</name>
2326                        <description>Enable resus</description>
2327                        <bitRange>[8:8]</bitRange>
2328                        <access>read-write</access>
2329                    </field>
2330                    <field>
2331                        <name>TIMEOUT</name>
2332                        <description>This is expressed as a number of clk_ref cycles
2333                            and must be &gt;= 2x clk_ref_freq/min_clk_tst_freq</description>
2334                        <bitRange>[7:0]</bitRange>
2335                        <access>read-write</access>
2336                    </field>
2337                </fields>
2338            </register>
2339            <register>
2340                <name>CLK_SYS_RESUS_STATUS</name>
2341                <addressOffset>0x00000088</addressOffset>
2342                <resetValue>0x00000000</resetValue>
2343                <fields>
2344                    <field>
2345                        <name>RESUSSED</name>
2346                        <description>Clock has been resuscitated, correct the error then send ctrl_clear=1</description>
2347                        <bitRange>[0:0]</bitRange>
2348                        <access>read-only</access>
2349                    </field>
2350                </fields>
2351            </register>
2352            <register>
2353                <name>FC0_REF_KHZ</name>
2354                <addressOffset>0x0000008c</addressOffset>
2355                <description>Reference clock frequency in kHz</description>
2356                <resetValue>0x00000000</resetValue>
2357                <fields>
2358                    <field>
2359                        <name>FC0_REF_KHZ</name>
2360                        <bitRange>[19:0]</bitRange>
2361                        <access>read-write</access>
2362                    </field>
2363                </fields>
2364            </register>
2365            <register>
2366                <name>FC0_MIN_KHZ</name>
2367                <addressOffset>0x00000090</addressOffset>
2368                <description>Minimum pass frequency in kHz. This is optional. Set to 0 if you are not using the pass/fail flags</description>
2369                <resetValue>0x00000000</resetValue>
2370                <fields>
2371                    <field>
2372                        <name>FC0_MIN_KHZ</name>
2373                        <bitRange>[24:0]</bitRange>
2374                        <access>read-write</access>
2375                    </field>
2376                </fields>
2377            </register>
2378            <register>
2379                <name>FC0_MAX_KHZ</name>
2380                <addressOffset>0x00000094</addressOffset>
2381                <description>Maximum pass frequency in kHz. This is optional. Set to 0x1ffffff if you are not using the pass/fail flags</description>
2382                <resetValue>0x01ffffff</resetValue>
2383                <fields>
2384                    <field>
2385                        <name>FC0_MAX_KHZ</name>
2386                        <bitRange>[24:0]</bitRange>
2387                        <access>read-write</access>
2388                    </field>
2389                </fields>
2390            </register>
2391            <register>
2392                <name>FC0_DELAY</name>
2393                <addressOffset>0x00000098</addressOffset>
2394                <description>Delays the start of frequency counting to allow the mux to settle
2395                    Delay is measured in multiples of the reference clock period</description>
2396                <resetValue>0x00000001</resetValue>
2397                <fields>
2398                    <field>
2399                        <name>FC0_DELAY</name>
2400                        <bitRange>[2:0]</bitRange>
2401                        <access>read-write</access>
2402                    </field>
2403                </fields>
2404            </register>
2405            <register>
2406                <name>FC0_INTERVAL</name>
2407                <addressOffset>0x0000009c</addressOffset>
2408                <description>The test interval is 0.98us * 2**interval, but let&#39;s call it 1us * 2**interval
2409                    The default gives a test interval of 250us</description>
2410                <resetValue>0x00000008</resetValue>
2411                <fields>
2412                    <field>
2413                        <name>FC0_INTERVAL</name>
2414                        <bitRange>[3:0]</bitRange>
2415                        <access>read-write</access>
2416                    </field>
2417                </fields>
2418            </register>
2419            <register>
2420                <name>FC0_SRC</name>
2421                <addressOffset>0x000000a0</addressOffset>
2422                <description>Clock sent to frequency counter, set to 0 when not required
2423                    Writing to this register initiates the frequency count</description>
2424                <resetValue>0x00000000</resetValue>
2425                <fields>
2426                    <field>
2427                        <name>FC0_SRC</name>
2428                        <bitRange>[7:0]</bitRange>
2429                        <access>read-write</access>
2430                        <enumeratedValues>
2431                            <enumeratedValue>
2432                                <name>NULL</name>
2433                                <value>0</value>
2434                            </enumeratedValue>
2435                            <enumeratedValue>
2436                                <name>pll_sys_clksrc_primary</name>
2437                                <value>1</value>
2438                            </enumeratedValue>
2439                            <enumeratedValue>
2440                                <name>pll_usb_clksrc_primary</name>
2441                                <value>2</value>
2442                            </enumeratedValue>
2443                            <enumeratedValue>
2444                                <name>rosc_clksrc</name>
2445                                <value>3</value>
2446                            </enumeratedValue>
2447                            <enumeratedValue>
2448                                <name>rosc_clksrc_ph</name>
2449                                <value>4</value>
2450                            </enumeratedValue>
2451                            <enumeratedValue>
2452                                <name>xosc_clksrc</name>
2453                                <value>5</value>
2454                            </enumeratedValue>
2455                            <enumeratedValue>
2456                                <name>clksrc_gpin0</name>
2457                                <value>6</value>
2458                            </enumeratedValue>
2459                            <enumeratedValue>
2460                                <name>clksrc_gpin1</name>
2461                                <value>7</value>
2462                            </enumeratedValue>
2463                            <enumeratedValue>
2464                                <name>clk_ref</name>
2465                                <value>8</value>
2466                            </enumeratedValue>
2467                            <enumeratedValue>
2468                                <name>clk_sys</name>
2469                                <value>9</value>
2470                            </enumeratedValue>
2471                            <enumeratedValue>
2472                                <name>clk_peri</name>
2473                                <value>10</value>
2474                            </enumeratedValue>
2475                            <enumeratedValue>
2476                                <name>clk_usb</name>
2477                                <value>11</value>
2478                            </enumeratedValue>
2479                            <enumeratedValue>
2480                                <name>clk_adc</name>
2481                                <value>12</value>
2482                            </enumeratedValue>
2483                            <enumeratedValue>
2484                                <name>clk_hstx</name>
2485                                <value>13</value>
2486                            </enumeratedValue>
2487                            <enumeratedValue>
2488                                <name>lposc_clksrc</name>
2489                                <value>14</value>
2490                            </enumeratedValue>
2491                            <enumeratedValue>
2492                                <name>otp_clk2fc</name>
2493                                <value>15</value>
2494                            </enumeratedValue>
2495                            <enumeratedValue>
2496                                <name>pll_usb_clksrc_primary_dft</name>
2497                                <value>16</value>
2498                            </enumeratedValue>
2499                        </enumeratedValues>
2500                    </field>
2501                </fields>
2502            </register>
2503            <register>
2504                <name>FC0_STATUS</name>
2505                <addressOffset>0x000000a4</addressOffset>
2506                <description>Frequency counter status</description>
2507                <resetValue>0x00000000</resetValue>
2508                <fields>
2509                    <field>
2510                        <name>DIED</name>
2511                        <description>Test clock stopped during test</description>
2512                        <bitRange>[28:28]</bitRange>
2513                        <access>read-only</access>
2514                    </field>
2515                    <field>
2516                        <name>FAST</name>
2517                        <description>Test clock faster than expected, only valid when status_done=1</description>
2518                        <bitRange>[24:24]</bitRange>
2519                        <access>read-only</access>
2520                    </field>
2521                    <field>
2522                        <name>SLOW</name>
2523                        <description>Test clock slower than expected, only valid when status_done=1</description>
2524                        <bitRange>[20:20]</bitRange>
2525                        <access>read-only</access>
2526                    </field>
2527                    <field>
2528                        <name>FAIL</name>
2529                        <description>Test failed</description>
2530                        <bitRange>[16:16]</bitRange>
2531                        <access>read-only</access>
2532                    </field>
2533                    <field>
2534                        <name>WAITING</name>
2535                        <description>Waiting for test clock to start</description>
2536                        <bitRange>[12:12]</bitRange>
2537                        <access>read-only</access>
2538                    </field>
2539                    <field>
2540                        <name>RUNNING</name>
2541                        <description>Test running</description>
2542                        <bitRange>[8:8]</bitRange>
2543                        <access>read-only</access>
2544                    </field>
2545                    <field>
2546                        <name>DONE</name>
2547                        <description>Test complete</description>
2548                        <bitRange>[4:4]</bitRange>
2549                        <access>read-only</access>
2550                    </field>
2551                    <field>
2552                        <name>PASS</name>
2553                        <description>Test passed</description>
2554                        <bitRange>[0:0]</bitRange>
2555                        <access>read-only</access>
2556                    </field>
2557                </fields>
2558            </register>
2559            <register>
2560                <name>FC0_RESULT</name>
2561                <addressOffset>0x000000a8</addressOffset>
2562                <description>Result of frequency measurement, only valid when status_done=1</description>
2563                <resetValue>0x00000000</resetValue>
2564                <fields>
2565                    <field>
2566                        <name>KHZ</name>
2567                        <bitRange>[29:5]</bitRange>
2568                        <access>read-only</access>
2569                    </field>
2570                    <field>
2571                        <name>FRAC</name>
2572                        <bitRange>[4:0]</bitRange>
2573                        <access>read-only</access>
2574                    </field>
2575                </fields>
2576            </register>
2577            <register>
2578                <name>WAKE_EN0</name>
2579                <addressOffset>0x000000ac</addressOffset>
2580                <description>enable clock in wake mode</description>
2581                <resetValue>0xffffffff</resetValue>
2582                <fields>
2583                    <field>
2584                        <name>CLK_SYS_SIO</name>
2585                        <bitRange>[31:31]</bitRange>
2586                        <access>read-write</access>
2587                    </field>
2588                    <field>
2589                        <name>CLK_SYS_SHA256</name>
2590                        <bitRange>[30:30]</bitRange>
2591                        <access>read-write</access>
2592                    </field>
2593                    <field>
2594                        <name>CLK_SYS_PSM</name>
2595                        <bitRange>[29:29]</bitRange>
2596                        <access>read-write</access>
2597                    </field>
2598                    <field>
2599                        <name>CLK_SYS_ROSC</name>
2600                        <bitRange>[28:28]</bitRange>
2601                        <access>read-write</access>
2602                    </field>
2603                    <field>
2604                        <name>CLK_SYS_ROM</name>
2605                        <bitRange>[27:27]</bitRange>
2606                        <access>read-write</access>
2607                    </field>
2608                    <field>
2609                        <name>CLK_SYS_RESETS</name>
2610                        <bitRange>[26:26]</bitRange>
2611                        <access>read-write</access>
2612                    </field>
2613                    <field>
2614                        <name>CLK_SYS_PWM</name>
2615                        <bitRange>[25:25]</bitRange>
2616                        <access>read-write</access>
2617                    </field>
2618                    <field>
2619                        <name>CLK_SYS_POWMAN</name>
2620                        <bitRange>[24:24]</bitRange>
2621                        <access>read-write</access>
2622                    </field>
2623                    <field>
2624                        <name>CLK_REF_POWMAN</name>
2625                        <bitRange>[23:23]</bitRange>
2626                        <access>read-write</access>
2627                    </field>
2628                    <field>
2629                        <name>CLK_SYS_PLL_USB</name>
2630                        <bitRange>[22:22]</bitRange>
2631                        <access>read-write</access>
2632                    </field>
2633                    <field>
2634                        <name>CLK_SYS_PLL_SYS</name>
2635                        <bitRange>[21:21]</bitRange>
2636                        <access>read-write</access>
2637                    </field>
2638                    <field>
2639                        <name>CLK_SYS_PIO2</name>
2640                        <bitRange>[20:20]</bitRange>
2641                        <access>read-write</access>
2642                    </field>
2643                    <field>
2644                        <name>CLK_SYS_PIO1</name>
2645                        <bitRange>[19:19]</bitRange>
2646                        <access>read-write</access>
2647                    </field>
2648                    <field>
2649                        <name>CLK_SYS_PIO0</name>
2650                        <bitRange>[18:18]</bitRange>
2651                        <access>read-write</access>
2652                    </field>
2653                    <field>
2654                        <name>CLK_SYS_PADS</name>
2655                        <bitRange>[17:17]</bitRange>
2656                        <access>read-write</access>
2657                    </field>
2658                    <field>
2659                        <name>CLK_SYS_OTP</name>
2660                        <bitRange>[16:16]</bitRange>
2661                        <access>read-write</access>
2662                    </field>
2663                    <field>
2664                        <name>CLK_REF_OTP</name>
2665                        <bitRange>[15:15]</bitRange>
2666                        <access>read-write</access>
2667                    </field>
2668                    <field>
2669                        <name>CLK_SYS_JTAG</name>
2670                        <bitRange>[14:14]</bitRange>
2671                        <access>read-write</access>
2672                    </field>
2673                    <field>
2674                        <name>CLK_SYS_IO</name>
2675                        <bitRange>[13:13]</bitRange>
2676                        <access>read-write</access>
2677                    </field>
2678                    <field>
2679                        <name>CLK_SYS_I2C1</name>
2680                        <bitRange>[12:12]</bitRange>
2681                        <access>read-write</access>
2682                    </field>
2683                    <field>
2684                        <name>CLK_SYS_I2C0</name>
2685                        <bitRange>[11:11]</bitRange>
2686                        <access>read-write</access>
2687                    </field>
2688                    <field>
2689                        <name>CLK_SYS_HSTX</name>
2690                        <bitRange>[10:10]</bitRange>
2691                        <access>read-write</access>
2692                    </field>
2693                    <field>
2694                        <name>CLK_HSTX</name>
2695                        <bitRange>[9:9]</bitRange>
2696                        <access>read-write</access>
2697                    </field>
2698                    <field>
2699                        <name>CLK_SYS_GLITCH_DETECTOR</name>
2700                        <bitRange>[8:8]</bitRange>
2701                        <access>read-write</access>
2702                    </field>
2703                    <field>
2704                        <name>CLK_SYS_DMA</name>
2705                        <bitRange>[7:7]</bitRange>
2706                        <access>read-write</access>
2707                    </field>
2708                    <field>
2709                        <name>CLK_SYS_BUSFABRIC</name>
2710                        <bitRange>[6:6]</bitRange>
2711                        <access>read-write</access>
2712                    </field>
2713                    <field>
2714                        <name>CLK_SYS_BUSCTRL</name>
2715                        <bitRange>[5:5]</bitRange>
2716                        <access>read-write</access>
2717                    </field>
2718                    <field>
2719                        <name>CLK_SYS_BOOTRAM</name>
2720                        <bitRange>[4:4]</bitRange>
2721                        <access>read-write</access>
2722                    </field>
2723                    <field>
2724                        <name>CLK_SYS_ADC</name>
2725                        <bitRange>[3:3]</bitRange>
2726                        <access>read-write</access>
2727                    </field>
2728                    <field>
2729                        <name>CLK_ADC</name>
2730                        <bitRange>[2:2]</bitRange>
2731                        <access>read-write</access>
2732                    </field>
2733                    <field>
2734                        <name>CLK_SYS_ACCESSCTRL</name>
2735                        <bitRange>[1:1]</bitRange>
2736                        <access>read-write</access>
2737                    </field>
2738                    <field>
2739                        <name>CLK_SYS_CLOCKS</name>
2740                        <bitRange>[0:0]</bitRange>
2741                        <access>read-write</access>
2742                    </field>
2743                </fields>
2744            </register>
2745            <register>
2746                <name>WAKE_EN1</name>
2747                <addressOffset>0x000000b0</addressOffset>
2748                <description>enable clock in wake mode</description>
2749                <resetValue>0x7fffffff</resetValue>
2750                <fields>
2751                    <field>
2752                        <name>CLK_SYS_XOSC</name>
2753                        <bitRange>[30:30]</bitRange>
2754                        <access>read-write</access>
2755                    </field>
2756                    <field>
2757                        <name>CLK_SYS_XIP</name>
2758                        <bitRange>[29:29]</bitRange>
2759                        <access>read-write</access>
2760                    </field>
2761                    <field>
2762                        <name>CLK_SYS_WATCHDOG</name>
2763                        <bitRange>[28:28]</bitRange>
2764                        <access>read-write</access>
2765                    </field>
2766                    <field>
2767                        <name>CLK_USB</name>
2768                        <bitRange>[27:27]</bitRange>
2769                        <access>read-write</access>
2770                    </field>
2771                    <field>
2772                        <name>CLK_SYS_USBCTRL</name>
2773                        <bitRange>[26:26]</bitRange>
2774                        <access>read-write</access>
2775                    </field>
2776                    <field>
2777                        <name>CLK_SYS_UART1</name>
2778                        <bitRange>[25:25]</bitRange>
2779                        <access>read-write</access>
2780                    </field>
2781                    <field>
2782                        <name>CLK_PERI_UART1</name>
2783                        <bitRange>[24:24]</bitRange>
2784                        <access>read-write</access>
2785                    </field>
2786                    <field>
2787                        <name>CLK_SYS_UART0</name>
2788                        <bitRange>[23:23]</bitRange>
2789                        <access>read-write</access>
2790                    </field>
2791                    <field>
2792                        <name>CLK_PERI_UART0</name>
2793                        <bitRange>[22:22]</bitRange>
2794                        <access>read-write</access>
2795                    </field>
2796                    <field>
2797                        <name>CLK_SYS_TRNG</name>
2798                        <bitRange>[21:21]</bitRange>
2799                        <access>read-write</access>
2800                    </field>
2801                    <field>
2802                        <name>CLK_SYS_TIMER1</name>
2803                        <bitRange>[20:20]</bitRange>
2804                        <access>read-write</access>
2805                    </field>
2806                    <field>
2807                        <name>CLK_SYS_TIMER0</name>
2808                        <bitRange>[19:19]</bitRange>
2809                        <access>read-write</access>
2810                    </field>
2811                    <field>
2812                        <name>CLK_SYS_TICKS</name>
2813                        <bitRange>[18:18]</bitRange>
2814                        <access>read-write</access>
2815                    </field>
2816                    <field>
2817                        <name>CLK_REF_TICKS</name>
2818                        <bitRange>[17:17]</bitRange>
2819                        <access>read-write</access>
2820                    </field>
2821                    <field>
2822                        <name>CLK_SYS_TBMAN</name>
2823                        <bitRange>[16:16]</bitRange>
2824                        <access>read-write</access>
2825                    </field>
2826                    <field>
2827                        <name>CLK_SYS_SYSINFO</name>
2828                        <bitRange>[15:15]</bitRange>
2829                        <access>read-write</access>
2830                    </field>
2831                    <field>
2832                        <name>CLK_SYS_SYSCFG</name>
2833                        <bitRange>[14:14]</bitRange>
2834                        <access>read-write</access>
2835                    </field>
2836                    <field>
2837                        <name>CLK_SYS_SRAM9</name>
2838                        <bitRange>[13:13]</bitRange>
2839                        <access>read-write</access>
2840                    </field>
2841                    <field>
2842                        <name>CLK_SYS_SRAM8</name>
2843                        <bitRange>[12:12]</bitRange>
2844                        <access>read-write</access>
2845                    </field>
2846                    <field>
2847                        <name>CLK_SYS_SRAM7</name>
2848                        <bitRange>[11:11]</bitRange>
2849                        <access>read-write</access>
2850                    </field>
2851                    <field>
2852                        <name>CLK_SYS_SRAM6</name>
2853                        <bitRange>[10:10]</bitRange>
2854                        <access>read-write</access>
2855                    </field>
2856                    <field>
2857                        <name>CLK_SYS_SRAM5</name>
2858                        <bitRange>[9:9]</bitRange>
2859                        <access>read-write</access>
2860                    </field>
2861                    <field>
2862                        <name>CLK_SYS_SRAM4</name>
2863                        <bitRange>[8:8]</bitRange>
2864                        <access>read-write</access>
2865                    </field>
2866                    <field>
2867                        <name>CLK_SYS_SRAM3</name>
2868                        <bitRange>[7:7]</bitRange>
2869                        <access>read-write</access>
2870                    </field>
2871                    <field>
2872                        <name>CLK_SYS_SRAM2</name>
2873                        <bitRange>[6:6]</bitRange>
2874                        <access>read-write</access>
2875                    </field>
2876                    <field>
2877                        <name>CLK_SYS_SRAM1</name>
2878                        <bitRange>[5:5]</bitRange>
2879                        <access>read-write</access>
2880                    </field>
2881                    <field>
2882                        <name>CLK_SYS_SRAM0</name>
2883                        <bitRange>[4:4]</bitRange>
2884                        <access>read-write</access>
2885                    </field>
2886                    <field>
2887                        <name>CLK_SYS_SPI1</name>
2888                        <bitRange>[3:3]</bitRange>
2889                        <access>read-write</access>
2890                    </field>
2891                    <field>
2892                        <name>CLK_PERI_SPI1</name>
2893                        <bitRange>[2:2]</bitRange>
2894                        <access>read-write</access>
2895                    </field>
2896                    <field>
2897                        <name>CLK_SYS_SPI0</name>
2898                        <bitRange>[1:1]</bitRange>
2899                        <access>read-write</access>
2900                    </field>
2901                    <field>
2902                        <name>CLK_PERI_SPI0</name>
2903                        <bitRange>[0:0]</bitRange>
2904                        <access>read-write</access>
2905                    </field>
2906                </fields>
2907            </register>
2908            <register>
2909                <name>SLEEP_EN0</name>
2910                <addressOffset>0x000000b4</addressOffset>
2911                <description>enable clock in sleep mode</description>
2912                <resetValue>0xffffffff</resetValue>
2913                <fields>
2914                    <field>
2915                        <name>CLK_SYS_SIO</name>
2916                        <bitRange>[31:31]</bitRange>
2917                        <access>read-write</access>
2918                    </field>
2919                    <field>
2920                        <name>CLK_SYS_SHA256</name>
2921                        <bitRange>[30:30]</bitRange>
2922                        <access>read-write</access>
2923                    </field>
2924                    <field>
2925                        <name>CLK_SYS_PSM</name>
2926                        <bitRange>[29:29]</bitRange>
2927                        <access>read-write</access>
2928                    </field>
2929                    <field>
2930                        <name>CLK_SYS_ROSC</name>
2931                        <bitRange>[28:28]</bitRange>
2932                        <access>read-write</access>
2933                    </field>
2934                    <field>
2935                        <name>CLK_SYS_ROM</name>
2936                        <bitRange>[27:27]</bitRange>
2937                        <access>read-write</access>
2938                    </field>
2939                    <field>
2940                        <name>CLK_SYS_RESETS</name>
2941                        <bitRange>[26:26]</bitRange>
2942                        <access>read-write</access>
2943                    </field>
2944                    <field>
2945                        <name>CLK_SYS_PWM</name>
2946                        <bitRange>[25:25]</bitRange>
2947                        <access>read-write</access>
2948                    </field>
2949                    <field>
2950                        <name>CLK_SYS_POWMAN</name>
2951                        <bitRange>[24:24]</bitRange>
2952                        <access>read-write</access>
2953                    </field>
2954                    <field>
2955                        <name>CLK_REF_POWMAN</name>
2956                        <bitRange>[23:23]</bitRange>
2957                        <access>read-write</access>
2958                    </field>
2959                    <field>
2960                        <name>CLK_SYS_PLL_USB</name>
2961                        <bitRange>[22:22]</bitRange>
2962                        <access>read-write</access>
2963                    </field>
2964                    <field>
2965                        <name>CLK_SYS_PLL_SYS</name>
2966                        <bitRange>[21:21]</bitRange>
2967                        <access>read-write</access>
2968                    </field>
2969                    <field>
2970                        <name>CLK_SYS_PIO2</name>
2971                        <bitRange>[20:20]</bitRange>
2972                        <access>read-write</access>
2973                    </field>
2974                    <field>
2975                        <name>CLK_SYS_PIO1</name>
2976                        <bitRange>[19:19]</bitRange>
2977                        <access>read-write</access>
2978                    </field>
2979                    <field>
2980                        <name>CLK_SYS_PIO0</name>
2981                        <bitRange>[18:18]</bitRange>
2982                        <access>read-write</access>
2983                    </field>
2984                    <field>
2985                        <name>CLK_SYS_PADS</name>
2986                        <bitRange>[17:17]</bitRange>
2987                        <access>read-write</access>
2988                    </field>
2989                    <field>
2990                        <name>CLK_SYS_OTP</name>
2991                        <bitRange>[16:16]</bitRange>
2992                        <access>read-write</access>
2993                    </field>
2994                    <field>
2995                        <name>CLK_REF_OTP</name>
2996                        <bitRange>[15:15]</bitRange>
2997                        <access>read-write</access>
2998                    </field>
2999                    <field>
3000                        <name>CLK_SYS_JTAG</name>
3001                        <bitRange>[14:14]</bitRange>
3002                        <access>read-write</access>
3003                    </field>
3004                    <field>
3005                        <name>CLK_SYS_IO</name>
3006                        <bitRange>[13:13]</bitRange>
3007                        <access>read-write</access>
3008                    </field>
3009                    <field>
3010                        <name>CLK_SYS_I2C1</name>
3011                        <bitRange>[12:12]</bitRange>
3012                        <access>read-write</access>
3013                    </field>
3014                    <field>
3015                        <name>CLK_SYS_I2C0</name>
3016                        <bitRange>[11:11]</bitRange>
3017                        <access>read-write</access>
3018                    </field>
3019                    <field>
3020                        <name>CLK_SYS_HSTX</name>
3021                        <bitRange>[10:10]</bitRange>
3022                        <access>read-write</access>
3023                    </field>
3024                    <field>
3025                        <name>CLK_HSTX</name>
3026                        <bitRange>[9:9]</bitRange>
3027                        <access>read-write</access>
3028                    </field>
3029                    <field>
3030                        <name>CLK_SYS_GLITCH_DETECTOR</name>
3031                        <bitRange>[8:8]</bitRange>
3032                        <access>read-write</access>
3033                    </field>
3034                    <field>
3035                        <name>CLK_SYS_DMA</name>
3036                        <bitRange>[7:7]</bitRange>
3037                        <access>read-write</access>
3038                    </field>
3039                    <field>
3040                        <name>CLK_SYS_BUSFABRIC</name>
3041                        <bitRange>[6:6]</bitRange>
3042                        <access>read-write</access>
3043                    </field>
3044                    <field>
3045                        <name>CLK_SYS_BUSCTRL</name>
3046                        <bitRange>[5:5]</bitRange>
3047                        <access>read-write</access>
3048                    </field>
3049                    <field>
3050                        <name>CLK_SYS_BOOTRAM</name>
3051                        <bitRange>[4:4]</bitRange>
3052                        <access>read-write</access>
3053                    </field>
3054                    <field>
3055                        <name>CLK_SYS_ADC</name>
3056                        <bitRange>[3:3]</bitRange>
3057                        <access>read-write</access>
3058                    </field>
3059                    <field>
3060                        <name>CLK_ADC</name>
3061                        <bitRange>[2:2]</bitRange>
3062                        <access>read-write</access>
3063                    </field>
3064                    <field>
3065                        <name>CLK_SYS_ACCESSCTRL</name>
3066                        <bitRange>[1:1]</bitRange>
3067                        <access>read-write</access>
3068                    </field>
3069                    <field>
3070                        <name>CLK_SYS_CLOCKS</name>
3071                        <bitRange>[0:0]</bitRange>
3072                        <access>read-write</access>
3073                    </field>
3074                </fields>
3075            </register>
3076            <register>
3077                <name>SLEEP_EN1</name>
3078                <addressOffset>0x000000b8</addressOffset>
3079                <description>enable clock in sleep mode</description>
3080                <resetValue>0x7fffffff</resetValue>
3081                <fields>
3082                    <field>
3083                        <name>CLK_SYS_XOSC</name>
3084                        <bitRange>[30:30]</bitRange>
3085                        <access>read-write</access>
3086                    </field>
3087                    <field>
3088                        <name>CLK_SYS_XIP</name>
3089                        <bitRange>[29:29]</bitRange>
3090                        <access>read-write</access>
3091                    </field>
3092                    <field>
3093                        <name>CLK_SYS_WATCHDOG</name>
3094                        <bitRange>[28:28]</bitRange>
3095                        <access>read-write</access>
3096                    </field>
3097                    <field>
3098                        <name>CLK_USB</name>
3099                        <bitRange>[27:27]</bitRange>
3100                        <access>read-write</access>
3101                    </field>
3102                    <field>
3103                        <name>CLK_SYS_USBCTRL</name>
3104                        <bitRange>[26:26]</bitRange>
3105                        <access>read-write</access>
3106                    </field>
3107                    <field>
3108                        <name>CLK_SYS_UART1</name>
3109                        <bitRange>[25:25]</bitRange>
3110                        <access>read-write</access>
3111                    </field>
3112                    <field>
3113                        <name>CLK_PERI_UART1</name>
3114                        <bitRange>[24:24]</bitRange>
3115                        <access>read-write</access>
3116                    </field>
3117                    <field>
3118                        <name>CLK_SYS_UART0</name>
3119                        <bitRange>[23:23]</bitRange>
3120                        <access>read-write</access>
3121                    </field>
3122                    <field>
3123                        <name>CLK_PERI_UART0</name>
3124                        <bitRange>[22:22]</bitRange>
3125                        <access>read-write</access>
3126                    </field>
3127                    <field>
3128                        <name>CLK_SYS_TRNG</name>
3129                        <bitRange>[21:21]</bitRange>
3130                        <access>read-write</access>
3131                    </field>
3132                    <field>
3133                        <name>CLK_SYS_TIMER1</name>
3134                        <bitRange>[20:20]</bitRange>
3135                        <access>read-write</access>
3136                    </field>
3137                    <field>
3138                        <name>CLK_SYS_TIMER0</name>
3139                        <bitRange>[19:19]</bitRange>
3140                        <access>read-write</access>
3141                    </field>
3142                    <field>
3143                        <name>CLK_SYS_TICKS</name>
3144                        <bitRange>[18:18]</bitRange>
3145                        <access>read-write</access>
3146                    </field>
3147                    <field>
3148                        <name>CLK_REF_TICKS</name>
3149                        <bitRange>[17:17]</bitRange>
3150                        <access>read-write</access>
3151                    </field>
3152                    <field>
3153                        <name>CLK_SYS_TBMAN</name>
3154                        <bitRange>[16:16]</bitRange>
3155                        <access>read-write</access>
3156                    </field>
3157                    <field>
3158                        <name>CLK_SYS_SYSINFO</name>
3159                        <bitRange>[15:15]</bitRange>
3160                        <access>read-write</access>
3161                    </field>
3162                    <field>
3163                        <name>CLK_SYS_SYSCFG</name>
3164                        <bitRange>[14:14]</bitRange>
3165                        <access>read-write</access>
3166                    </field>
3167                    <field>
3168                        <name>CLK_SYS_SRAM9</name>
3169                        <bitRange>[13:13]</bitRange>
3170                        <access>read-write</access>
3171                    </field>
3172                    <field>
3173                        <name>CLK_SYS_SRAM8</name>
3174                        <bitRange>[12:12]</bitRange>
3175                        <access>read-write</access>
3176                    </field>
3177                    <field>
3178                        <name>CLK_SYS_SRAM7</name>
3179                        <bitRange>[11:11]</bitRange>
3180                        <access>read-write</access>
3181                    </field>
3182                    <field>
3183                        <name>CLK_SYS_SRAM6</name>
3184                        <bitRange>[10:10]</bitRange>
3185                        <access>read-write</access>
3186                    </field>
3187                    <field>
3188                        <name>CLK_SYS_SRAM5</name>
3189                        <bitRange>[9:9]</bitRange>
3190                        <access>read-write</access>
3191                    </field>
3192                    <field>
3193                        <name>CLK_SYS_SRAM4</name>
3194                        <bitRange>[8:8]</bitRange>
3195                        <access>read-write</access>
3196                    </field>
3197                    <field>
3198                        <name>CLK_SYS_SRAM3</name>
3199                        <bitRange>[7:7]</bitRange>
3200                        <access>read-write</access>
3201                    </field>
3202                    <field>
3203                        <name>CLK_SYS_SRAM2</name>
3204                        <bitRange>[6:6]</bitRange>
3205                        <access>read-write</access>
3206                    </field>
3207                    <field>
3208                        <name>CLK_SYS_SRAM1</name>
3209                        <bitRange>[5:5]</bitRange>
3210                        <access>read-write</access>
3211                    </field>
3212                    <field>
3213                        <name>CLK_SYS_SRAM0</name>
3214                        <bitRange>[4:4]</bitRange>
3215                        <access>read-write</access>
3216                    </field>
3217                    <field>
3218                        <name>CLK_SYS_SPI1</name>
3219                        <bitRange>[3:3]</bitRange>
3220                        <access>read-write</access>
3221                    </field>
3222                    <field>
3223                        <name>CLK_PERI_SPI1</name>
3224                        <bitRange>[2:2]</bitRange>
3225                        <access>read-write</access>
3226                    </field>
3227                    <field>
3228                        <name>CLK_SYS_SPI0</name>
3229                        <bitRange>[1:1]</bitRange>
3230                        <access>read-write</access>
3231                    </field>
3232                    <field>
3233                        <name>CLK_PERI_SPI0</name>
3234                        <bitRange>[0:0]</bitRange>
3235                        <access>read-write</access>
3236                    </field>
3237                </fields>
3238            </register>
3239            <register>
3240                <name>ENABLED0</name>
3241                <addressOffset>0x000000bc</addressOffset>
3242                <description>indicates the state of the clock enable</description>
3243                <resetValue>0x00000000</resetValue>
3244                <fields>
3245                    <field>
3246                        <name>CLK_SYS_SIO</name>
3247                        <bitRange>[31:31]</bitRange>
3248                        <access>read-only</access>
3249                    </field>
3250                    <field>
3251                        <name>CLK_SYS_SHA256</name>
3252                        <bitRange>[30:30]</bitRange>
3253                        <access>read-only</access>
3254                    </field>
3255                    <field>
3256                        <name>CLK_SYS_PSM</name>
3257                        <bitRange>[29:29]</bitRange>
3258                        <access>read-only</access>
3259                    </field>
3260                    <field>
3261                        <name>CLK_SYS_ROSC</name>
3262                        <bitRange>[28:28]</bitRange>
3263                        <access>read-only</access>
3264                    </field>
3265                    <field>
3266                        <name>CLK_SYS_ROM</name>
3267                        <bitRange>[27:27]</bitRange>
3268                        <access>read-only</access>
3269                    </field>
3270                    <field>
3271                        <name>CLK_SYS_RESETS</name>
3272                        <bitRange>[26:26]</bitRange>
3273                        <access>read-only</access>
3274                    </field>
3275                    <field>
3276                        <name>CLK_SYS_PWM</name>
3277                        <bitRange>[25:25]</bitRange>
3278                        <access>read-only</access>
3279                    </field>
3280                    <field>
3281                        <name>CLK_SYS_POWMAN</name>
3282                        <bitRange>[24:24]</bitRange>
3283                        <access>read-only</access>
3284                    </field>
3285                    <field>
3286                        <name>CLK_REF_POWMAN</name>
3287                        <bitRange>[23:23]</bitRange>
3288                        <access>read-only</access>
3289                    </field>
3290                    <field>
3291                        <name>CLK_SYS_PLL_USB</name>
3292                        <bitRange>[22:22]</bitRange>
3293                        <access>read-only</access>
3294                    </field>
3295                    <field>
3296                        <name>CLK_SYS_PLL_SYS</name>
3297                        <bitRange>[21:21]</bitRange>
3298                        <access>read-only</access>
3299                    </field>
3300                    <field>
3301                        <name>CLK_SYS_PIO2</name>
3302                        <bitRange>[20:20]</bitRange>
3303                        <access>read-only</access>
3304                    </field>
3305                    <field>
3306                        <name>CLK_SYS_PIO1</name>
3307                        <bitRange>[19:19]</bitRange>
3308                        <access>read-only</access>
3309                    </field>
3310                    <field>
3311                        <name>CLK_SYS_PIO0</name>
3312                        <bitRange>[18:18]</bitRange>
3313                        <access>read-only</access>
3314                    </field>
3315                    <field>
3316                        <name>CLK_SYS_PADS</name>
3317                        <bitRange>[17:17]</bitRange>
3318                        <access>read-only</access>
3319                    </field>
3320                    <field>
3321                        <name>CLK_SYS_OTP</name>
3322                        <bitRange>[16:16]</bitRange>
3323                        <access>read-only</access>
3324                    </field>
3325                    <field>
3326                        <name>CLK_REF_OTP</name>
3327                        <bitRange>[15:15]</bitRange>
3328                        <access>read-only</access>
3329                    </field>
3330                    <field>
3331                        <name>CLK_SYS_JTAG</name>
3332                        <bitRange>[14:14]</bitRange>
3333                        <access>read-only</access>
3334                    </field>
3335                    <field>
3336                        <name>CLK_SYS_IO</name>
3337                        <bitRange>[13:13]</bitRange>
3338                        <access>read-only</access>
3339                    </field>
3340                    <field>
3341                        <name>CLK_SYS_I2C1</name>
3342                        <bitRange>[12:12]</bitRange>
3343                        <access>read-only</access>
3344                    </field>
3345                    <field>
3346                        <name>CLK_SYS_I2C0</name>
3347                        <bitRange>[11:11]</bitRange>
3348                        <access>read-only</access>
3349                    </field>
3350                    <field>
3351                        <name>CLK_SYS_HSTX</name>
3352                        <bitRange>[10:10]</bitRange>
3353                        <access>read-only</access>
3354                    </field>
3355                    <field>
3356                        <name>CLK_HSTX</name>
3357                        <bitRange>[9:9]</bitRange>
3358                        <access>read-only</access>
3359                    </field>
3360                    <field>
3361                        <name>CLK_SYS_GLITCH_DETECTOR</name>
3362                        <bitRange>[8:8]</bitRange>
3363                        <access>read-only</access>
3364                    </field>
3365                    <field>
3366                        <name>CLK_SYS_DMA</name>
3367                        <bitRange>[7:7]</bitRange>
3368                        <access>read-only</access>
3369                    </field>
3370                    <field>
3371                        <name>CLK_SYS_BUSFABRIC</name>
3372                        <bitRange>[6:6]</bitRange>
3373                        <access>read-only</access>
3374                    </field>
3375                    <field>
3376                        <name>CLK_SYS_BUSCTRL</name>
3377                        <bitRange>[5:5]</bitRange>
3378                        <access>read-only</access>
3379                    </field>
3380                    <field>
3381                        <name>CLK_SYS_BOOTRAM</name>
3382                        <bitRange>[4:4]</bitRange>
3383                        <access>read-only</access>
3384                    </field>
3385                    <field>
3386                        <name>CLK_SYS_ADC</name>
3387                        <bitRange>[3:3]</bitRange>
3388                        <access>read-only</access>
3389                    </field>
3390                    <field>
3391                        <name>CLK_ADC</name>
3392                        <bitRange>[2:2]</bitRange>
3393                        <access>read-only</access>
3394                    </field>
3395                    <field>
3396                        <name>CLK_SYS_ACCESSCTRL</name>
3397                        <bitRange>[1:1]</bitRange>
3398                        <access>read-only</access>
3399                    </field>
3400                    <field>
3401                        <name>CLK_SYS_CLOCKS</name>
3402                        <bitRange>[0:0]</bitRange>
3403                        <access>read-only</access>
3404                    </field>
3405                </fields>
3406            </register>
3407            <register>
3408                <name>ENABLED1</name>
3409                <addressOffset>0x000000c0</addressOffset>
3410                <description>indicates the state of the clock enable</description>
3411                <resetValue>0x00000000</resetValue>
3412                <fields>
3413                    <field>
3414                        <name>CLK_SYS_XOSC</name>
3415                        <bitRange>[30:30]</bitRange>
3416                        <access>read-only</access>
3417                    </field>
3418                    <field>
3419                        <name>CLK_SYS_XIP</name>
3420                        <bitRange>[29:29]</bitRange>
3421                        <access>read-only</access>
3422                    </field>
3423                    <field>
3424                        <name>CLK_SYS_WATCHDOG</name>
3425                        <bitRange>[28:28]</bitRange>
3426                        <access>read-only</access>
3427                    </field>
3428                    <field>
3429                        <name>CLK_USB</name>
3430                        <bitRange>[27:27]</bitRange>
3431                        <access>read-only</access>
3432                    </field>
3433                    <field>
3434                        <name>CLK_SYS_USBCTRL</name>
3435                        <bitRange>[26:26]</bitRange>
3436                        <access>read-only</access>
3437                    </field>
3438                    <field>
3439                        <name>CLK_SYS_UART1</name>
3440                        <bitRange>[25:25]</bitRange>
3441                        <access>read-only</access>
3442                    </field>
3443                    <field>
3444                        <name>CLK_PERI_UART1</name>
3445                        <bitRange>[24:24]</bitRange>
3446                        <access>read-only</access>
3447                    </field>
3448                    <field>
3449                        <name>CLK_SYS_UART0</name>
3450                        <bitRange>[23:23]</bitRange>
3451                        <access>read-only</access>
3452                    </field>
3453                    <field>
3454                        <name>CLK_PERI_UART0</name>
3455                        <bitRange>[22:22]</bitRange>
3456                        <access>read-only</access>
3457                    </field>
3458                    <field>
3459                        <name>CLK_SYS_TRNG</name>
3460                        <bitRange>[21:21]</bitRange>
3461                        <access>read-only</access>
3462                    </field>
3463                    <field>
3464                        <name>CLK_SYS_TIMER1</name>
3465                        <bitRange>[20:20]</bitRange>
3466                        <access>read-only</access>
3467                    </field>
3468                    <field>
3469                        <name>CLK_SYS_TIMER0</name>
3470                        <bitRange>[19:19]</bitRange>
3471                        <access>read-only</access>
3472                    </field>
3473                    <field>
3474                        <name>CLK_SYS_TICKS</name>
3475                        <bitRange>[18:18]</bitRange>
3476                        <access>read-only</access>
3477                    </field>
3478                    <field>
3479                        <name>CLK_REF_TICKS</name>
3480                        <bitRange>[17:17]</bitRange>
3481                        <access>read-only</access>
3482                    </field>
3483                    <field>
3484                        <name>CLK_SYS_TBMAN</name>
3485                        <bitRange>[16:16]</bitRange>
3486                        <access>read-only</access>
3487                    </field>
3488                    <field>
3489                        <name>CLK_SYS_SYSINFO</name>
3490                        <bitRange>[15:15]</bitRange>
3491                        <access>read-only</access>
3492                    </field>
3493                    <field>
3494                        <name>CLK_SYS_SYSCFG</name>
3495                        <bitRange>[14:14]</bitRange>
3496                        <access>read-only</access>
3497                    </field>
3498                    <field>
3499                        <name>CLK_SYS_SRAM9</name>
3500                        <bitRange>[13:13]</bitRange>
3501                        <access>read-only</access>
3502                    </field>
3503                    <field>
3504                        <name>CLK_SYS_SRAM8</name>
3505                        <bitRange>[12:12]</bitRange>
3506                        <access>read-only</access>
3507                    </field>
3508                    <field>
3509                        <name>CLK_SYS_SRAM7</name>
3510                        <bitRange>[11:11]</bitRange>
3511                        <access>read-only</access>
3512                    </field>
3513                    <field>
3514                        <name>CLK_SYS_SRAM6</name>
3515                        <bitRange>[10:10]</bitRange>
3516                        <access>read-only</access>
3517                    </field>
3518                    <field>
3519                        <name>CLK_SYS_SRAM5</name>
3520                        <bitRange>[9:9]</bitRange>
3521                        <access>read-only</access>
3522                    </field>
3523                    <field>
3524                        <name>CLK_SYS_SRAM4</name>
3525                        <bitRange>[8:8]</bitRange>
3526                        <access>read-only</access>
3527                    </field>
3528                    <field>
3529                        <name>CLK_SYS_SRAM3</name>
3530                        <bitRange>[7:7]</bitRange>
3531                        <access>read-only</access>
3532                    </field>
3533                    <field>
3534                        <name>CLK_SYS_SRAM2</name>
3535                        <bitRange>[6:6]</bitRange>
3536                        <access>read-only</access>
3537                    </field>
3538                    <field>
3539                        <name>CLK_SYS_SRAM1</name>
3540                        <bitRange>[5:5]</bitRange>
3541                        <access>read-only</access>
3542                    </field>
3543                    <field>
3544                        <name>CLK_SYS_SRAM0</name>
3545                        <bitRange>[4:4]</bitRange>
3546                        <access>read-only</access>
3547                    </field>
3548                    <field>
3549                        <name>CLK_SYS_SPI1</name>
3550                        <bitRange>[3:3]</bitRange>
3551                        <access>read-only</access>
3552                    </field>
3553                    <field>
3554                        <name>CLK_PERI_SPI1</name>
3555                        <bitRange>[2:2]</bitRange>
3556                        <access>read-only</access>
3557                    </field>
3558                    <field>
3559                        <name>CLK_SYS_SPI0</name>
3560                        <bitRange>[1:1]</bitRange>
3561                        <access>read-only</access>
3562                    </field>
3563                    <field>
3564                        <name>CLK_PERI_SPI0</name>
3565                        <bitRange>[0:0]</bitRange>
3566                        <access>read-only</access>
3567                    </field>
3568                </fields>
3569            </register>
3570            <register>
3571                <name>INTR</name>
3572                <addressOffset>0x000000c4</addressOffset>
3573                <description>Raw Interrupts</description>
3574                <resetValue>0x00000000</resetValue>
3575                <fields>
3576                    <field>
3577                        <name>CLK_SYS_RESUS</name>
3578                        <bitRange>[0:0]</bitRange>
3579                        <access>read-only</access>
3580                    </field>
3581                </fields>
3582            </register>
3583            <register>
3584                <name>INTE</name>
3585                <addressOffset>0x000000c8</addressOffset>
3586                <description>Interrupt Enable</description>
3587                <resetValue>0x00000000</resetValue>
3588                <fields>
3589                    <field>
3590                        <name>CLK_SYS_RESUS</name>
3591                        <bitRange>[0:0]</bitRange>
3592                        <access>read-write</access>
3593                    </field>
3594                </fields>
3595            </register>
3596            <register>
3597                <name>INTF</name>
3598                <addressOffset>0x000000cc</addressOffset>
3599                <description>Interrupt Force</description>
3600                <resetValue>0x00000000</resetValue>
3601                <fields>
3602                    <field>
3603                        <name>CLK_SYS_RESUS</name>
3604                        <bitRange>[0:0]</bitRange>
3605                        <access>read-write</access>
3606                    </field>
3607                </fields>
3608            </register>
3609            <register>
3610                <name>INTS</name>
3611                <addressOffset>0x000000d0</addressOffset>
3612                <description>Interrupt status after masking &amp; forcing</description>
3613                <resetValue>0x00000000</resetValue>
3614                <fields>
3615                    <field>
3616                        <name>CLK_SYS_RESUS</name>
3617                        <bitRange>[0:0]</bitRange>
3618                        <access>read-only</access>
3619                    </field>
3620                </fields>
3621            </register>
3622        </registers>
3623    </peripheral>
3624    <peripheral>
3625        <name>TICKS</name>
3626        <baseAddress>0x40108000</baseAddress>
3627        <addressBlock>
3628            <offset>0</offset>
3629            <size>72</size>
3630            <usage>registers</usage>
3631        </addressBlock>
3632        <registers>
3633            <register>
3634                <name>PROC0_CTRL</name>
3635                <addressOffset>0x00000000</addressOffset>
3636                <description>Controls the tick generator</description>
3637                <resetValue>0x00000000</resetValue>
3638                <fields>
3639                    <field>
3640                        <name>RUNNING</name>
3641                        <description>Is the tick generator running?</description>
3642                        <bitRange>[1:1]</bitRange>
3643                        <access>read-only</access>
3644                    </field>
3645                    <field>
3646                        <name>ENABLE</name>
3647                        <description>start / stop tick generation</description>
3648                        <bitRange>[0:0]</bitRange>
3649                        <access>read-write</access>
3650                    </field>
3651                </fields>
3652            </register>
3653            <register>
3654                <name>PROC0_CYCLES</name>
3655                <addressOffset>0x00000004</addressOffset>
3656                <resetValue>0x00000000</resetValue>
3657                <fields>
3658                    <field>
3659                        <name>PROC0_CYCLES</name>
3660                        <description>Total number of clk_tick cycles before the next tick.</description>
3661                        <bitRange>[8:0]</bitRange>
3662                        <access>read-write</access>
3663                    </field>
3664                </fields>
3665            </register>
3666            <register>
3667                <name>PROC0_COUNT</name>
3668                <addressOffset>0x00000008</addressOffset>
3669                <resetMask>0x00000000</resetMask>
3670                <fields>
3671                    <field>
3672                        <name>PROC0_COUNT</name>
3673                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3674                        <bitRange>[8:0]</bitRange>
3675                        <access>read-only</access>
3676                    </field>
3677                </fields>
3678            </register>
3679            <register>
3680                <name>PROC1_CTRL</name>
3681                <addressOffset>0x0000000c</addressOffset>
3682                <description>Controls the tick generator</description>
3683                <resetValue>0x00000000</resetValue>
3684                <fields>
3685                    <field>
3686                        <name>RUNNING</name>
3687                        <description>Is the tick generator running?</description>
3688                        <bitRange>[1:1]</bitRange>
3689                        <access>read-only</access>
3690                    </field>
3691                    <field>
3692                        <name>ENABLE</name>
3693                        <description>start / stop tick generation</description>
3694                        <bitRange>[0:0]</bitRange>
3695                        <access>read-write</access>
3696                    </field>
3697                </fields>
3698            </register>
3699            <register>
3700                <name>PROC1_CYCLES</name>
3701                <addressOffset>0x00000010</addressOffset>
3702                <resetValue>0x00000000</resetValue>
3703                <fields>
3704                    <field>
3705                        <name>PROC1_CYCLES</name>
3706                        <description>Total number of clk_tick cycles before the next tick.</description>
3707                        <bitRange>[8:0]</bitRange>
3708                        <access>read-write</access>
3709                    </field>
3710                </fields>
3711            </register>
3712            <register>
3713                <name>PROC1_COUNT</name>
3714                <addressOffset>0x00000014</addressOffset>
3715                <resetMask>0x00000000</resetMask>
3716                <fields>
3717                    <field>
3718                        <name>PROC1_COUNT</name>
3719                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3720                        <bitRange>[8:0]</bitRange>
3721                        <access>read-only</access>
3722                    </field>
3723                </fields>
3724            </register>
3725            <register>
3726                <name>TIMER0_CTRL</name>
3727                <addressOffset>0x00000018</addressOffset>
3728                <description>Controls the tick generator</description>
3729                <resetValue>0x00000000</resetValue>
3730                <fields>
3731                    <field>
3732                        <name>RUNNING</name>
3733                        <description>Is the tick generator running?</description>
3734                        <bitRange>[1:1]</bitRange>
3735                        <access>read-only</access>
3736                    </field>
3737                    <field>
3738                        <name>ENABLE</name>
3739                        <description>start / stop tick generation</description>
3740                        <bitRange>[0:0]</bitRange>
3741                        <access>read-write</access>
3742                    </field>
3743                </fields>
3744            </register>
3745            <register>
3746                <name>TIMER0_CYCLES</name>
3747                <addressOffset>0x0000001c</addressOffset>
3748                <resetValue>0x00000000</resetValue>
3749                <fields>
3750                    <field>
3751                        <name>TIMER0_CYCLES</name>
3752                        <description>Total number of clk_tick cycles before the next tick.</description>
3753                        <bitRange>[8:0]</bitRange>
3754                        <access>read-write</access>
3755                    </field>
3756                </fields>
3757            </register>
3758            <register>
3759                <name>TIMER0_COUNT</name>
3760                <addressOffset>0x00000020</addressOffset>
3761                <resetMask>0x00000000</resetMask>
3762                <fields>
3763                    <field>
3764                        <name>TIMER0_COUNT</name>
3765                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3766                        <bitRange>[8:0]</bitRange>
3767                        <access>read-only</access>
3768                    </field>
3769                </fields>
3770            </register>
3771            <register>
3772                <name>TIMER1_CTRL</name>
3773                <addressOffset>0x00000024</addressOffset>
3774                <description>Controls the tick generator</description>
3775                <resetValue>0x00000000</resetValue>
3776                <fields>
3777                    <field>
3778                        <name>RUNNING</name>
3779                        <description>Is the tick generator running?</description>
3780                        <bitRange>[1:1]</bitRange>
3781                        <access>read-only</access>
3782                    </field>
3783                    <field>
3784                        <name>ENABLE</name>
3785                        <description>start / stop tick generation</description>
3786                        <bitRange>[0:0]</bitRange>
3787                        <access>read-write</access>
3788                    </field>
3789                </fields>
3790            </register>
3791            <register>
3792                <name>TIMER1_CYCLES</name>
3793                <addressOffset>0x00000028</addressOffset>
3794                <resetValue>0x00000000</resetValue>
3795                <fields>
3796                    <field>
3797                        <name>TIMER1_CYCLES</name>
3798                        <description>Total number of clk_tick cycles before the next tick.</description>
3799                        <bitRange>[8:0]</bitRange>
3800                        <access>read-write</access>
3801                    </field>
3802                </fields>
3803            </register>
3804            <register>
3805                <name>TIMER1_COUNT</name>
3806                <addressOffset>0x0000002c</addressOffset>
3807                <resetMask>0x00000000</resetMask>
3808                <fields>
3809                    <field>
3810                        <name>TIMER1_COUNT</name>
3811                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3812                        <bitRange>[8:0]</bitRange>
3813                        <access>read-only</access>
3814                    </field>
3815                </fields>
3816            </register>
3817            <register>
3818                <name>WATCHDOG_CTRL</name>
3819                <addressOffset>0x00000030</addressOffset>
3820                <description>Controls the tick generator</description>
3821                <resetValue>0x00000000</resetValue>
3822                <fields>
3823                    <field>
3824                        <name>RUNNING</name>
3825                        <description>Is the tick generator running?</description>
3826                        <bitRange>[1:1]</bitRange>
3827                        <access>read-only</access>
3828                    </field>
3829                    <field>
3830                        <name>ENABLE</name>
3831                        <description>start / stop tick generation</description>
3832                        <bitRange>[0:0]</bitRange>
3833                        <access>read-write</access>
3834                    </field>
3835                </fields>
3836            </register>
3837            <register>
3838                <name>WATCHDOG_CYCLES</name>
3839                <addressOffset>0x00000034</addressOffset>
3840                <resetValue>0x00000000</resetValue>
3841                <fields>
3842                    <field>
3843                        <name>WATCHDOG_CYCLES</name>
3844                        <description>Total number of clk_tick cycles before the next tick.</description>
3845                        <bitRange>[8:0]</bitRange>
3846                        <access>read-write</access>
3847                    </field>
3848                </fields>
3849            </register>
3850            <register>
3851                <name>WATCHDOG_COUNT</name>
3852                <addressOffset>0x00000038</addressOffset>
3853                <resetMask>0x00000000</resetMask>
3854                <fields>
3855                    <field>
3856                        <name>WATCHDOG_COUNT</name>
3857                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3858                        <bitRange>[8:0]</bitRange>
3859                        <access>read-only</access>
3860                    </field>
3861                </fields>
3862            </register>
3863            <register>
3864                <name>RISCV_CTRL</name>
3865                <addressOffset>0x0000003c</addressOffset>
3866                <description>Controls the tick generator</description>
3867                <resetValue>0x00000000</resetValue>
3868                <fields>
3869                    <field>
3870                        <name>RUNNING</name>
3871                        <description>Is the tick generator running?</description>
3872                        <bitRange>[1:1]</bitRange>
3873                        <access>read-only</access>
3874                    </field>
3875                    <field>
3876                        <name>ENABLE</name>
3877                        <description>start / stop tick generation</description>
3878                        <bitRange>[0:0]</bitRange>
3879                        <access>read-write</access>
3880                    </field>
3881                </fields>
3882            </register>
3883            <register>
3884                <name>RISCV_CYCLES</name>
3885                <addressOffset>0x00000040</addressOffset>
3886                <resetValue>0x00000000</resetValue>
3887                <fields>
3888                    <field>
3889                        <name>RISCV_CYCLES</name>
3890                        <description>Total number of clk_tick cycles before the next tick.</description>
3891                        <bitRange>[8:0]</bitRange>
3892                        <access>read-write</access>
3893                    </field>
3894                </fields>
3895            </register>
3896            <register>
3897                <name>RISCV_COUNT</name>
3898                <addressOffset>0x00000044</addressOffset>
3899                <resetMask>0x00000000</resetMask>
3900                <fields>
3901                    <field>
3902                        <name>RISCV_COUNT</name>
3903                        <description>Count down timer: the remaining number clk_tick cycles before the next tick is generated.</description>
3904                        <bitRange>[8:0]</bitRange>
3905                        <access>read-only</access>
3906                    </field>
3907                </fields>
3908            </register>
3909        </registers>
3910    </peripheral>
3911    <peripheral>
3912        <name>PADS_BANK0</name>
3913        <baseAddress>0x40038000</baseAddress>
3914        <addressBlock>
3915            <offset>0</offset>
3916            <size>204</size>
3917            <usage>registers</usage>
3918        </addressBlock>
3919        <registers>
3920            <register>
3921                <name>VOLTAGE_SELECT</name>
3922                <addressOffset>0x00000000</addressOffset>
3923                <description>Voltage select. Per bank control</description>
3924                <resetValue>0x00000000</resetValue>
3925                <fields>
3926                    <field>
3927                        <name>VOLTAGE_SELECT</name>
3928                        <bitRange>[0:0]</bitRange>
3929                        <access>read-write</access>
3930                        <enumeratedValues>
3931                            <enumeratedValue>
3932                                <name>3v3</name>
3933                                <value>0</value>
3934                                <description>Set voltage to 3.3V (DVDD &gt;= 2V5)</description>
3935                            </enumeratedValue>
3936                            <enumeratedValue>
3937                                <name>1v8</name>
3938                                <value>1</value>
3939                                <description>Set voltage to 1.8V (DVDD &lt;= 1V8)</description>
3940                            </enumeratedValue>
3941                        </enumeratedValues>
3942                    </field>
3943                </fields>
3944            </register>
3945            <register>
3946                <name>GPIO0</name>
3947                <addressOffset>0x00000004</addressOffset>
3948                <resetValue>0x00000116</resetValue>
3949                <fields>
3950                    <field>
3951                        <name>ISO</name>
3952                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
3953                        <bitRange>[8:8]</bitRange>
3954                        <access>read-write</access>
3955                    </field>
3956                    <field>
3957                        <name>OD</name>
3958                        <description>Output disable. Has priority over output enable from peripherals</description>
3959                        <bitRange>[7:7]</bitRange>
3960                        <access>read-write</access>
3961                    </field>
3962                    <field>
3963                        <name>IE</name>
3964                        <description>Input enable</description>
3965                        <bitRange>[6:6]</bitRange>
3966                        <access>read-write</access>
3967                    </field>
3968                    <field>
3969                        <name>DRIVE</name>
3970                        <description>Drive strength.</description>
3971                        <bitRange>[5:4]</bitRange>
3972                        <access>read-write</access>
3973                        <enumeratedValues>
3974                            <enumeratedValue>
3975                                <name>2mA</name>
3976                                <value>0</value>
3977                            </enumeratedValue>
3978                            <enumeratedValue>
3979                                <name>4mA</name>
3980                                <value>1</value>
3981                            </enumeratedValue>
3982                            <enumeratedValue>
3983                                <name>8mA</name>
3984                                <value>2</value>
3985                            </enumeratedValue>
3986                            <enumeratedValue>
3987                                <name>12mA</name>
3988                                <value>3</value>
3989                            </enumeratedValue>
3990                        </enumeratedValues>
3991                    </field>
3992                    <field>
3993                        <name>PUE</name>
3994                        <description>Pull up enable</description>
3995                        <bitRange>[3:3]</bitRange>
3996                        <access>read-write</access>
3997                    </field>
3998                    <field>
3999                        <name>PDE</name>
4000                        <description>Pull down enable</description>
4001                        <bitRange>[2:2]</bitRange>
4002                        <access>read-write</access>
4003                    </field>
4004                    <field>
4005                        <name>SCHMITT</name>
4006                        <description>Enable schmitt trigger</description>
4007                        <bitRange>[1:1]</bitRange>
4008                        <access>read-write</access>
4009                    </field>
4010                    <field>
4011                        <name>SLEWFAST</name>
4012                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4013                        <bitRange>[0:0]</bitRange>
4014                        <access>read-write</access>
4015                    </field>
4016                </fields>
4017            </register>
4018            <register>
4019                <name>GPIO1</name>
4020                <addressOffset>0x00000008</addressOffset>
4021                <resetValue>0x00000116</resetValue>
4022                <fields>
4023                    <field>
4024                        <name>ISO</name>
4025                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4026                        <bitRange>[8:8]</bitRange>
4027                        <access>read-write</access>
4028                    </field>
4029                    <field>
4030                        <name>OD</name>
4031                        <description>Output disable. Has priority over output enable from peripherals</description>
4032                        <bitRange>[7:7]</bitRange>
4033                        <access>read-write</access>
4034                    </field>
4035                    <field>
4036                        <name>IE</name>
4037                        <description>Input enable</description>
4038                        <bitRange>[6:6]</bitRange>
4039                        <access>read-write</access>
4040                    </field>
4041                    <field>
4042                        <name>DRIVE</name>
4043                        <description>Drive strength.</description>
4044                        <bitRange>[5:4]</bitRange>
4045                        <access>read-write</access>
4046                        <enumeratedValues>
4047                            <enumeratedValue>
4048                                <name>2mA</name>
4049                                <value>0</value>
4050                            </enumeratedValue>
4051                            <enumeratedValue>
4052                                <name>4mA</name>
4053                                <value>1</value>
4054                            </enumeratedValue>
4055                            <enumeratedValue>
4056                                <name>8mA</name>
4057                                <value>2</value>
4058                            </enumeratedValue>
4059                            <enumeratedValue>
4060                                <name>12mA</name>
4061                                <value>3</value>
4062                            </enumeratedValue>
4063                        </enumeratedValues>
4064                    </field>
4065                    <field>
4066                        <name>PUE</name>
4067                        <description>Pull up enable</description>
4068                        <bitRange>[3:3]</bitRange>
4069                        <access>read-write</access>
4070                    </field>
4071                    <field>
4072                        <name>PDE</name>
4073                        <description>Pull down enable</description>
4074                        <bitRange>[2:2]</bitRange>
4075                        <access>read-write</access>
4076                    </field>
4077                    <field>
4078                        <name>SCHMITT</name>
4079                        <description>Enable schmitt trigger</description>
4080                        <bitRange>[1:1]</bitRange>
4081                        <access>read-write</access>
4082                    </field>
4083                    <field>
4084                        <name>SLEWFAST</name>
4085                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4086                        <bitRange>[0:0]</bitRange>
4087                        <access>read-write</access>
4088                    </field>
4089                </fields>
4090            </register>
4091            <register>
4092                <name>GPIO2</name>
4093                <addressOffset>0x0000000c</addressOffset>
4094                <resetValue>0x00000116</resetValue>
4095                <fields>
4096                    <field>
4097                        <name>ISO</name>
4098                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4099                        <bitRange>[8:8]</bitRange>
4100                        <access>read-write</access>
4101                    </field>
4102                    <field>
4103                        <name>OD</name>
4104                        <description>Output disable. Has priority over output enable from peripherals</description>
4105                        <bitRange>[7:7]</bitRange>
4106                        <access>read-write</access>
4107                    </field>
4108                    <field>
4109                        <name>IE</name>
4110                        <description>Input enable</description>
4111                        <bitRange>[6:6]</bitRange>
4112                        <access>read-write</access>
4113                    </field>
4114                    <field>
4115                        <name>DRIVE</name>
4116                        <description>Drive strength.</description>
4117                        <bitRange>[5:4]</bitRange>
4118                        <access>read-write</access>
4119                        <enumeratedValues>
4120                            <enumeratedValue>
4121                                <name>2mA</name>
4122                                <value>0</value>
4123                            </enumeratedValue>
4124                            <enumeratedValue>
4125                                <name>4mA</name>
4126                                <value>1</value>
4127                            </enumeratedValue>
4128                            <enumeratedValue>
4129                                <name>8mA</name>
4130                                <value>2</value>
4131                            </enumeratedValue>
4132                            <enumeratedValue>
4133                                <name>12mA</name>
4134                                <value>3</value>
4135                            </enumeratedValue>
4136                        </enumeratedValues>
4137                    </field>
4138                    <field>
4139                        <name>PUE</name>
4140                        <description>Pull up enable</description>
4141                        <bitRange>[3:3]</bitRange>
4142                        <access>read-write</access>
4143                    </field>
4144                    <field>
4145                        <name>PDE</name>
4146                        <description>Pull down enable</description>
4147                        <bitRange>[2:2]</bitRange>
4148                        <access>read-write</access>
4149                    </field>
4150                    <field>
4151                        <name>SCHMITT</name>
4152                        <description>Enable schmitt trigger</description>
4153                        <bitRange>[1:1]</bitRange>
4154                        <access>read-write</access>
4155                    </field>
4156                    <field>
4157                        <name>SLEWFAST</name>
4158                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4159                        <bitRange>[0:0]</bitRange>
4160                        <access>read-write</access>
4161                    </field>
4162                </fields>
4163            </register>
4164            <register>
4165                <name>GPIO3</name>
4166                <addressOffset>0x00000010</addressOffset>
4167                <resetValue>0x00000116</resetValue>
4168                <fields>
4169                    <field>
4170                        <name>ISO</name>
4171                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4172                        <bitRange>[8:8]</bitRange>
4173                        <access>read-write</access>
4174                    </field>
4175                    <field>
4176                        <name>OD</name>
4177                        <description>Output disable. Has priority over output enable from peripherals</description>
4178                        <bitRange>[7:7]</bitRange>
4179                        <access>read-write</access>
4180                    </field>
4181                    <field>
4182                        <name>IE</name>
4183                        <description>Input enable</description>
4184                        <bitRange>[6:6]</bitRange>
4185                        <access>read-write</access>
4186                    </field>
4187                    <field>
4188                        <name>DRIVE</name>
4189                        <description>Drive strength.</description>
4190                        <bitRange>[5:4]</bitRange>
4191                        <access>read-write</access>
4192                        <enumeratedValues>
4193                            <enumeratedValue>
4194                                <name>2mA</name>
4195                                <value>0</value>
4196                            </enumeratedValue>
4197                            <enumeratedValue>
4198                                <name>4mA</name>
4199                                <value>1</value>
4200                            </enumeratedValue>
4201                            <enumeratedValue>
4202                                <name>8mA</name>
4203                                <value>2</value>
4204                            </enumeratedValue>
4205                            <enumeratedValue>
4206                                <name>12mA</name>
4207                                <value>3</value>
4208                            </enumeratedValue>
4209                        </enumeratedValues>
4210                    </field>
4211                    <field>
4212                        <name>PUE</name>
4213                        <description>Pull up enable</description>
4214                        <bitRange>[3:3]</bitRange>
4215                        <access>read-write</access>
4216                    </field>
4217                    <field>
4218                        <name>PDE</name>
4219                        <description>Pull down enable</description>
4220                        <bitRange>[2:2]</bitRange>
4221                        <access>read-write</access>
4222                    </field>
4223                    <field>
4224                        <name>SCHMITT</name>
4225                        <description>Enable schmitt trigger</description>
4226                        <bitRange>[1:1]</bitRange>
4227                        <access>read-write</access>
4228                    </field>
4229                    <field>
4230                        <name>SLEWFAST</name>
4231                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4232                        <bitRange>[0:0]</bitRange>
4233                        <access>read-write</access>
4234                    </field>
4235                </fields>
4236            </register>
4237            <register>
4238                <name>GPIO4</name>
4239                <addressOffset>0x00000014</addressOffset>
4240                <resetValue>0x00000116</resetValue>
4241                <fields>
4242                    <field>
4243                        <name>ISO</name>
4244                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4245                        <bitRange>[8:8]</bitRange>
4246                        <access>read-write</access>
4247                    </field>
4248                    <field>
4249                        <name>OD</name>
4250                        <description>Output disable. Has priority over output enable from peripherals</description>
4251                        <bitRange>[7:7]</bitRange>
4252                        <access>read-write</access>
4253                    </field>
4254                    <field>
4255                        <name>IE</name>
4256                        <description>Input enable</description>
4257                        <bitRange>[6:6]</bitRange>
4258                        <access>read-write</access>
4259                    </field>
4260                    <field>
4261                        <name>DRIVE</name>
4262                        <description>Drive strength.</description>
4263                        <bitRange>[5:4]</bitRange>
4264                        <access>read-write</access>
4265                        <enumeratedValues>
4266                            <enumeratedValue>
4267                                <name>2mA</name>
4268                                <value>0</value>
4269                            </enumeratedValue>
4270                            <enumeratedValue>
4271                                <name>4mA</name>
4272                                <value>1</value>
4273                            </enumeratedValue>
4274                            <enumeratedValue>
4275                                <name>8mA</name>
4276                                <value>2</value>
4277                            </enumeratedValue>
4278                            <enumeratedValue>
4279                                <name>12mA</name>
4280                                <value>3</value>
4281                            </enumeratedValue>
4282                        </enumeratedValues>
4283                    </field>
4284                    <field>
4285                        <name>PUE</name>
4286                        <description>Pull up enable</description>
4287                        <bitRange>[3:3]</bitRange>
4288                        <access>read-write</access>
4289                    </field>
4290                    <field>
4291                        <name>PDE</name>
4292                        <description>Pull down enable</description>
4293                        <bitRange>[2:2]</bitRange>
4294                        <access>read-write</access>
4295                    </field>
4296                    <field>
4297                        <name>SCHMITT</name>
4298                        <description>Enable schmitt trigger</description>
4299                        <bitRange>[1:1]</bitRange>
4300                        <access>read-write</access>
4301                    </field>
4302                    <field>
4303                        <name>SLEWFAST</name>
4304                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4305                        <bitRange>[0:0]</bitRange>
4306                        <access>read-write</access>
4307                    </field>
4308                </fields>
4309            </register>
4310            <register>
4311                <name>GPIO5</name>
4312                <addressOffset>0x00000018</addressOffset>
4313                <resetValue>0x00000116</resetValue>
4314                <fields>
4315                    <field>
4316                        <name>ISO</name>
4317                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4318                        <bitRange>[8:8]</bitRange>
4319                        <access>read-write</access>
4320                    </field>
4321                    <field>
4322                        <name>OD</name>
4323                        <description>Output disable. Has priority over output enable from peripherals</description>
4324                        <bitRange>[7:7]</bitRange>
4325                        <access>read-write</access>
4326                    </field>
4327                    <field>
4328                        <name>IE</name>
4329                        <description>Input enable</description>
4330                        <bitRange>[6:6]</bitRange>
4331                        <access>read-write</access>
4332                    </field>
4333                    <field>
4334                        <name>DRIVE</name>
4335                        <description>Drive strength.</description>
4336                        <bitRange>[5:4]</bitRange>
4337                        <access>read-write</access>
4338                        <enumeratedValues>
4339                            <enumeratedValue>
4340                                <name>2mA</name>
4341                                <value>0</value>
4342                            </enumeratedValue>
4343                            <enumeratedValue>
4344                                <name>4mA</name>
4345                                <value>1</value>
4346                            </enumeratedValue>
4347                            <enumeratedValue>
4348                                <name>8mA</name>
4349                                <value>2</value>
4350                            </enumeratedValue>
4351                            <enumeratedValue>
4352                                <name>12mA</name>
4353                                <value>3</value>
4354                            </enumeratedValue>
4355                        </enumeratedValues>
4356                    </field>
4357                    <field>
4358                        <name>PUE</name>
4359                        <description>Pull up enable</description>
4360                        <bitRange>[3:3]</bitRange>
4361                        <access>read-write</access>
4362                    </field>
4363                    <field>
4364                        <name>PDE</name>
4365                        <description>Pull down enable</description>
4366                        <bitRange>[2:2]</bitRange>
4367                        <access>read-write</access>
4368                    </field>
4369                    <field>
4370                        <name>SCHMITT</name>
4371                        <description>Enable schmitt trigger</description>
4372                        <bitRange>[1:1]</bitRange>
4373                        <access>read-write</access>
4374                    </field>
4375                    <field>
4376                        <name>SLEWFAST</name>
4377                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4378                        <bitRange>[0:0]</bitRange>
4379                        <access>read-write</access>
4380                    </field>
4381                </fields>
4382            </register>
4383            <register>
4384                <name>GPIO6</name>
4385                <addressOffset>0x0000001c</addressOffset>
4386                <resetValue>0x00000116</resetValue>
4387                <fields>
4388                    <field>
4389                        <name>ISO</name>
4390                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4391                        <bitRange>[8:8]</bitRange>
4392                        <access>read-write</access>
4393                    </field>
4394                    <field>
4395                        <name>OD</name>
4396                        <description>Output disable. Has priority over output enable from peripherals</description>
4397                        <bitRange>[7:7]</bitRange>
4398                        <access>read-write</access>
4399                    </field>
4400                    <field>
4401                        <name>IE</name>
4402                        <description>Input enable</description>
4403                        <bitRange>[6:6]</bitRange>
4404                        <access>read-write</access>
4405                    </field>
4406                    <field>
4407                        <name>DRIVE</name>
4408                        <description>Drive strength.</description>
4409                        <bitRange>[5:4]</bitRange>
4410                        <access>read-write</access>
4411                        <enumeratedValues>
4412                            <enumeratedValue>
4413                                <name>2mA</name>
4414                                <value>0</value>
4415                            </enumeratedValue>
4416                            <enumeratedValue>
4417                                <name>4mA</name>
4418                                <value>1</value>
4419                            </enumeratedValue>
4420                            <enumeratedValue>
4421                                <name>8mA</name>
4422                                <value>2</value>
4423                            </enumeratedValue>
4424                            <enumeratedValue>
4425                                <name>12mA</name>
4426                                <value>3</value>
4427                            </enumeratedValue>
4428                        </enumeratedValues>
4429                    </field>
4430                    <field>
4431                        <name>PUE</name>
4432                        <description>Pull up enable</description>
4433                        <bitRange>[3:3]</bitRange>
4434                        <access>read-write</access>
4435                    </field>
4436                    <field>
4437                        <name>PDE</name>
4438                        <description>Pull down enable</description>
4439                        <bitRange>[2:2]</bitRange>
4440                        <access>read-write</access>
4441                    </field>
4442                    <field>
4443                        <name>SCHMITT</name>
4444                        <description>Enable schmitt trigger</description>
4445                        <bitRange>[1:1]</bitRange>
4446                        <access>read-write</access>
4447                    </field>
4448                    <field>
4449                        <name>SLEWFAST</name>
4450                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4451                        <bitRange>[0:0]</bitRange>
4452                        <access>read-write</access>
4453                    </field>
4454                </fields>
4455            </register>
4456            <register>
4457                <name>GPIO7</name>
4458                <addressOffset>0x00000020</addressOffset>
4459                <resetValue>0x00000116</resetValue>
4460                <fields>
4461                    <field>
4462                        <name>ISO</name>
4463                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4464                        <bitRange>[8:8]</bitRange>
4465                        <access>read-write</access>
4466                    </field>
4467                    <field>
4468                        <name>OD</name>
4469                        <description>Output disable. Has priority over output enable from peripherals</description>
4470                        <bitRange>[7:7]</bitRange>
4471                        <access>read-write</access>
4472                    </field>
4473                    <field>
4474                        <name>IE</name>
4475                        <description>Input enable</description>
4476                        <bitRange>[6:6]</bitRange>
4477                        <access>read-write</access>
4478                    </field>
4479                    <field>
4480                        <name>DRIVE</name>
4481                        <description>Drive strength.</description>
4482                        <bitRange>[5:4]</bitRange>
4483                        <access>read-write</access>
4484                        <enumeratedValues>
4485                            <enumeratedValue>
4486                                <name>2mA</name>
4487                                <value>0</value>
4488                            </enumeratedValue>
4489                            <enumeratedValue>
4490                                <name>4mA</name>
4491                                <value>1</value>
4492                            </enumeratedValue>
4493                            <enumeratedValue>
4494                                <name>8mA</name>
4495                                <value>2</value>
4496                            </enumeratedValue>
4497                            <enumeratedValue>
4498                                <name>12mA</name>
4499                                <value>3</value>
4500                            </enumeratedValue>
4501                        </enumeratedValues>
4502                    </field>
4503                    <field>
4504                        <name>PUE</name>
4505                        <description>Pull up enable</description>
4506                        <bitRange>[3:3]</bitRange>
4507                        <access>read-write</access>
4508                    </field>
4509                    <field>
4510                        <name>PDE</name>
4511                        <description>Pull down enable</description>
4512                        <bitRange>[2:2]</bitRange>
4513                        <access>read-write</access>
4514                    </field>
4515                    <field>
4516                        <name>SCHMITT</name>
4517                        <description>Enable schmitt trigger</description>
4518                        <bitRange>[1:1]</bitRange>
4519                        <access>read-write</access>
4520                    </field>
4521                    <field>
4522                        <name>SLEWFAST</name>
4523                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4524                        <bitRange>[0:0]</bitRange>
4525                        <access>read-write</access>
4526                    </field>
4527                </fields>
4528            </register>
4529            <register>
4530                <name>GPIO8</name>
4531                <addressOffset>0x00000024</addressOffset>
4532                <resetValue>0x00000116</resetValue>
4533                <fields>
4534                    <field>
4535                        <name>ISO</name>
4536                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4537                        <bitRange>[8:8]</bitRange>
4538                        <access>read-write</access>
4539                    </field>
4540                    <field>
4541                        <name>OD</name>
4542                        <description>Output disable. Has priority over output enable from peripherals</description>
4543                        <bitRange>[7:7]</bitRange>
4544                        <access>read-write</access>
4545                    </field>
4546                    <field>
4547                        <name>IE</name>
4548                        <description>Input enable</description>
4549                        <bitRange>[6:6]</bitRange>
4550                        <access>read-write</access>
4551                    </field>
4552                    <field>
4553                        <name>DRIVE</name>
4554                        <description>Drive strength.</description>
4555                        <bitRange>[5:4]</bitRange>
4556                        <access>read-write</access>
4557                        <enumeratedValues>
4558                            <enumeratedValue>
4559                                <name>2mA</name>
4560                                <value>0</value>
4561                            </enumeratedValue>
4562                            <enumeratedValue>
4563                                <name>4mA</name>
4564                                <value>1</value>
4565                            </enumeratedValue>
4566                            <enumeratedValue>
4567                                <name>8mA</name>
4568                                <value>2</value>
4569                            </enumeratedValue>
4570                            <enumeratedValue>
4571                                <name>12mA</name>
4572                                <value>3</value>
4573                            </enumeratedValue>
4574                        </enumeratedValues>
4575                    </field>
4576                    <field>
4577                        <name>PUE</name>
4578                        <description>Pull up enable</description>
4579                        <bitRange>[3:3]</bitRange>
4580                        <access>read-write</access>
4581                    </field>
4582                    <field>
4583                        <name>PDE</name>
4584                        <description>Pull down enable</description>
4585                        <bitRange>[2:2]</bitRange>
4586                        <access>read-write</access>
4587                    </field>
4588                    <field>
4589                        <name>SCHMITT</name>
4590                        <description>Enable schmitt trigger</description>
4591                        <bitRange>[1:1]</bitRange>
4592                        <access>read-write</access>
4593                    </field>
4594                    <field>
4595                        <name>SLEWFAST</name>
4596                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4597                        <bitRange>[0:0]</bitRange>
4598                        <access>read-write</access>
4599                    </field>
4600                </fields>
4601            </register>
4602            <register>
4603                <name>GPIO9</name>
4604                <addressOffset>0x00000028</addressOffset>
4605                <resetValue>0x00000116</resetValue>
4606                <fields>
4607                    <field>
4608                        <name>ISO</name>
4609                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4610                        <bitRange>[8:8]</bitRange>
4611                        <access>read-write</access>
4612                    </field>
4613                    <field>
4614                        <name>OD</name>
4615                        <description>Output disable. Has priority over output enable from peripherals</description>
4616                        <bitRange>[7:7]</bitRange>
4617                        <access>read-write</access>
4618                    </field>
4619                    <field>
4620                        <name>IE</name>
4621                        <description>Input enable</description>
4622                        <bitRange>[6:6]</bitRange>
4623                        <access>read-write</access>
4624                    </field>
4625                    <field>
4626                        <name>DRIVE</name>
4627                        <description>Drive strength.</description>
4628                        <bitRange>[5:4]</bitRange>
4629                        <access>read-write</access>
4630                        <enumeratedValues>
4631                            <enumeratedValue>
4632                                <name>2mA</name>
4633                                <value>0</value>
4634                            </enumeratedValue>
4635                            <enumeratedValue>
4636                                <name>4mA</name>
4637                                <value>1</value>
4638                            </enumeratedValue>
4639                            <enumeratedValue>
4640                                <name>8mA</name>
4641                                <value>2</value>
4642                            </enumeratedValue>
4643                            <enumeratedValue>
4644                                <name>12mA</name>
4645                                <value>3</value>
4646                            </enumeratedValue>
4647                        </enumeratedValues>
4648                    </field>
4649                    <field>
4650                        <name>PUE</name>
4651                        <description>Pull up enable</description>
4652                        <bitRange>[3:3]</bitRange>
4653                        <access>read-write</access>
4654                    </field>
4655                    <field>
4656                        <name>PDE</name>
4657                        <description>Pull down enable</description>
4658                        <bitRange>[2:2]</bitRange>
4659                        <access>read-write</access>
4660                    </field>
4661                    <field>
4662                        <name>SCHMITT</name>
4663                        <description>Enable schmitt trigger</description>
4664                        <bitRange>[1:1]</bitRange>
4665                        <access>read-write</access>
4666                    </field>
4667                    <field>
4668                        <name>SLEWFAST</name>
4669                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4670                        <bitRange>[0:0]</bitRange>
4671                        <access>read-write</access>
4672                    </field>
4673                </fields>
4674            </register>
4675            <register>
4676                <name>GPIO10</name>
4677                <addressOffset>0x0000002c</addressOffset>
4678                <resetValue>0x00000116</resetValue>
4679                <fields>
4680                    <field>
4681                        <name>ISO</name>
4682                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4683                        <bitRange>[8:8]</bitRange>
4684                        <access>read-write</access>
4685                    </field>
4686                    <field>
4687                        <name>OD</name>
4688                        <description>Output disable. Has priority over output enable from peripherals</description>
4689                        <bitRange>[7:7]</bitRange>
4690                        <access>read-write</access>
4691                    </field>
4692                    <field>
4693                        <name>IE</name>
4694                        <description>Input enable</description>
4695                        <bitRange>[6:6]</bitRange>
4696                        <access>read-write</access>
4697                    </field>
4698                    <field>
4699                        <name>DRIVE</name>
4700                        <description>Drive strength.</description>
4701                        <bitRange>[5:4]</bitRange>
4702                        <access>read-write</access>
4703                        <enumeratedValues>
4704                            <enumeratedValue>
4705                                <name>2mA</name>
4706                                <value>0</value>
4707                            </enumeratedValue>
4708                            <enumeratedValue>
4709                                <name>4mA</name>
4710                                <value>1</value>
4711                            </enumeratedValue>
4712                            <enumeratedValue>
4713                                <name>8mA</name>
4714                                <value>2</value>
4715                            </enumeratedValue>
4716                            <enumeratedValue>
4717                                <name>12mA</name>
4718                                <value>3</value>
4719                            </enumeratedValue>
4720                        </enumeratedValues>
4721                    </field>
4722                    <field>
4723                        <name>PUE</name>
4724                        <description>Pull up enable</description>
4725                        <bitRange>[3:3]</bitRange>
4726                        <access>read-write</access>
4727                    </field>
4728                    <field>
4729                        <name>PDE</name>
4730                        <description>Pull down enable</description>
4731                        <bitRange>[2:2]</bitRange>
4732                        <access>read-write</access>
4733                    </field>
4734                    <field>
4735                        <name>SCHMITT</name>
4736                        <description>Enable schmitt trigger</description>
4737                        <bitRange>[1:1]</bitRange>
4738                        <access>read-write</access>
4739                    </field>
4740                    <field>
4741                        <name>SLEWFAST</name>
4742                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4743                        <bitRange>[0:0]</bitRange>
4744                        <access>read-write</access>
4745                    </field>
4746                </fields>
4747            </register>
4748            <register>
4749                <name>GPIO11</name>
4750                <addressOffset>0x00000030</addressOffset>
4751                <resetValue>0x00000116</resetValue>
4752                <fields>
4753                    <field>
4754                        <name>ISO</name>
4755                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4756                        <bitRange>[8:8]</bitRange>
4757                        <access>read-write</access>
4758                    </field>
4759                    <field>
4760                        <name>OD</name>
4761                        <description>Output disable. Has priority over output enable from peripherals</description>
4762                        <bitRange>[7:7]</bitRange>
4763                        <access>read-write</access>
4764                    </field>
4765                    <field>
4766                        <name>IE</name>
4767                        <description>Input enable</description>
4768                        <bitRange>[6:6]</bitRange>
4769                        <access>read-write</access>
4770                    </field>
4771                    <field>
4772                        <name>DRIVE</name>
4773                        <description>Drive strength.</description>
4774                        <bitRange>[5:4]</bitRange>
4775                        <access>read-write</access>
4776                        <enumeratedValues>
4777                            <enumeratedValue>
4778                                <name>2mA</name>
4779                                <value>0</value>
4780                            </enumeratedValue>
4781                            <enumeratedValue>
4782                                <name>4mA</name>
4783                                <value>1</value>
4784                            </enumeratedValue>
4785                            <enumeratedValue>
4786                                <name>8mA</name>
4787                                <value>2</value>
4788                            </enumeratedValue>
4789                            <enumeratedValue>
4790                                <name>12mA</name>
4791                                <value>3</value>
4792                            </enumeratedValue>
4793                        </enumeratedValues>
4794                    </field>
4795                    <field>
4796                        <name>PUE</name>
4797                        <description>Pull up enable</description>
4798                        <bitRange>[3:3]</bitRange>
4799                        <access>read-write</access>
4800                    </field>
4801                    <field>
4802                        <name>PDE</name>
4803                        <description>Pull down enable</description>
4804                        <bitRange>[2:2]</bitRange>
4805                        <access>read-write</access>
4806                    </field>
4807                    <field>
4808                        <name>SCHMITT</name>
4809                        <description>Enable schmitt trigger</description>
4810                        <bitRange>[1:1]</bitRange>
4811                        <access>read-write</access>
4812                    </field>
4813                    <field>
4814                        <name>SLEWFAST</name>
4815                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4816                        <bitRange>[0:0]</bitRange>
4817                        <access>read-write</access>
4818                    </field>
4819                </fields>
4820            </register>
4821            <register>
4822                <name>GPIO12</name>
4823                <addressOffset>0x00000034</addressOffset>
4824                <resetValue>0x00000116</resetValue>
4825                <fields>
4826                    <field>
4827                        <name>ISO</name>
4828                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4829                        <bitRange>[8:8]</bitRange>
4830                        <access>read-write</access>
4831                    </field>
4832                    <field>
4833                        <name>OD</name>
4834                        <description>Output disable. Has priority over output enable from peripherals</description>
4835                        <bitRange>[7:7]</bitRange>
4836                        <access>read-write</access>
4837                    </field>
4838                    <field>
4839                        <name>IE</name>
4840                        <description>Input enable</description>
4841                        <bitRange>[6:6]</bitRange>
4842                        <access>read-write</access>
4843                    </field>
4844                    <field>
4845                        <name>DRIVE</name>
4846                        <description>Drive strength.</description>
4847                        <bitRange>[5:4]</bitRange>
4848                        <access>read-write</access>
4849                        <enumeratedValues>
4850                            <enumeratedValue>
4851                                <name>2mA</name>
4852                                <value>0</value>
4853                            </enumeratedValue>
4854                            <enumeratedValue>
4855                                <name>4mA</name>
4856                                <value>1</value>
4857                            </enumeratedValue>
4858                            <enumeratedValue>
4859                                <name>8mA</name>
4860                                <value>2</value>
4861                            </enumeratedValue>
4862                            <enumeratedValue>
4863                                <name>12mA</name>
4864                                <value>3</value>
4865                            </enumeratedValue>
4866                        </enumeratedValues>
4867                    </field>
4868                    <field>
4869                        <name>PUE</name>
4870                        <description>Pull up enable</description>
4871                        <bitRange>[3:3]</bitRange>
4872                        <access>read-write</access>
4873                    </field>
4874                    <field>
4875                        <name>PDE</name>
4876                        <description>Pull down enable</description>
4877                        <bitRange>[2:2]</bitRange>
4878                        <access>read-write</access>
4879                    </field>
4880                    <field>
4881                        <name>SCHMITT</name>
4882                        <description>Enable schmitt trigger</description>
4883                        <bitRange>[1:1]</bitRange>
4884                        <access>read-write</access>
4885                    </field>
4886                    <field>
4887                        <name>SLEWFAST</name>
4888                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4889                        <bitRange>[0:0]</bitRange>
4890                        <access>read-write</access>
4891                    </field>
4892                </fields>
4893            </register>
4894            <register>
4895                <name>GPIO13</name>
4896                <addressOffset>0x00000038</addressOffset>
4897                <resetValue>0x00000116</resetValue>
4898                <fields>
4899                    <field>
4900                        <name>ISO</name>
4901                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4902                        <bitRange>[8:8]</bitRange>
4903                        <access>read-write</access>
4904                    </field>
4905                    <field>
4906                        <name>OD</name>
4907                        <description>Output disable. Has priority over output enable from peripherals</description>
4908                        <bitRange>[7:7]</bitRange>
4909                        <access>read-write</access>
4910                    </field>
4911                    <field>
4912                        <name>IE</name>
4913                        <description>Input enable</description>
4914                        <bitRange>[6:6]</bitRange>
4915                        <access>read-write</access>
4916                    </field>
4917                    <field>
4918                        <name>DRIVE</name>
4919                        <description>Drive strength.</description>
4920                        <bitRange>[5:4]</bitRange>
4921                        <access>read-write</access>
4922                        <enumeratedValues>
4923                            <enumeratedValue>
4924                                <name>2mA</name>
4925                                <value>0</value>
4926                            </enumeratedValue>
4927                            <enumeratedValue>
4928                                <name>4mA</name>
4929                                <value>1</value>
4930                            </enumeratedValue>
4931                            <enumeratedValue>
4932                                <name>8mA</name>
4933                                <value>2</value>
4934                            </enumeratedValue>
4935                            <enumeratedValue>
4936                                <name>12mA</name>
4937                                <value>3</value>
4938                            </enumeratedValue>
4939                        </enumeratedValues>
4940                    </field>
4941                    <field>
4942                        <name>PUE</name>
4943                        <description>Pull up enable</description>
4944                        <bitRange>[3:3]</bitRange>
4945                        <access>read-write</access>
4946                    </field>
4947                    <field>
4948                        <name>PDE</name>
4949                        <description>Pull down enable</description>
4950                        <bitRange>[2:2]</bitRange>
4951                        <access>read-write</access>
4952                    </field>
4953                    <field>
4954                        <name>SCHMITT</name>
4955                        <description>Enable schmitt trigger</description>
4956                        <bitRange>[1:1]</bitRange>
4957                        <access>read-write</access>
4958                    </field>
4959                    <field>
4960                        <name>SLEWFAST</name>
4961                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
4962                        <bitRange>[0:0]</bitRange>
4963                        <access>read-write</access>
4964                    </field>
4965                </fields>
4966            </register>
4967            <register>
4968                <name>GPIO14</name>
4969                <addressOffset>0x0000003c</addressOffset>
4970                <resetValue>0x00000116</resetValue>
4971                <fields>
4972                    <field>
4973                        <name>ISO</name>
4974                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
4975                        <bitRange>[8:8]</bitRange>
4976                        <access>read-write</access>
4977                    </field>
4978                    <field>
4979                        <name>OD</name>
4980                        <description>Output disable. Has priority over output enable from peripherals</description>
4981                        <bitRange>[7:7]</bitRange>
4982                        <access>read-write</access>
4983                    </field>
4984                    <field>
4985                        <name>IE</name>
4986                        <description>Input enable</description>
4987                        <bitRange>[6:6]</bitRange>
4988                        <access>read-write</access>
4989                    </field>
4990                    <field>
4991                        <name>DRIVE</name>
4992                        <description>Drive strength.</description>
4993                        <bitRange>[5:4]</bitRange>
4994                        <access>read-write</access>
4995                        <enumeratedValues>
4996                            <enumeratedValue>
4997                                <name>2mA</name>
4998                                <value>0</value>
4999                            </enumeratedValue>
5000                            <enumeratedValue>
5001                                <name>4mA</name>
5002                                <value>1</value>
5003                            </enumeratedValue>
5004                            <enumeratedValue>
5005                                <name>8mA</name>
5006                                <value>2</value>
5007                            </enumeratedValue>
5008                            <enumeratedValue>
5009                                <name>12mA</name>
5010                                <value>3</value>
5011                            </enumeratedValue>
5012                        </enumeratedValues>
5013                    </field>
5014                    <field>
5015                        <name>PUE</name>
5016                        <description>Pull up enable</description>
5017                        <bitRange>[3:3]</bitRange>
5018                        <access>read-write</access>
5019                    </field>
5020                    <field>
5021                        <name>PDE</name>
5022                        <description>Pull down enable</description>
5023                        <bitRange>[2:2]</bitRange>
5024                        <access>read-write</access>
5025                    </field>
5026                    <field>
5027                        <name>SCHMITT</name>
5028                        <description>Enable schmitt trigger</description>
5029                        <bitRange>[1:1]</bitRange>
5030                        <access>read-write</access>
5031                    </field>
5032                    <field>
5033                        <name>SLEWFAST</name>
5034                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5035                        <bitRange>[0:0]</bitRange>
5036                        <access>read-write</access>
5037                    </field>
5038                </fields>
5039            </register>
5040            <register>
5041                <name>GPIO15</name>
5042                <addressOffset>0x00000040</addressOffset>
5043                <resetValue>0x00000116</resetValue>
5044                <fields>
5045                    <field>
5046                        <name>ISO</name>
5047                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5048                        <bitRange>[8:8]</bitRange>
5049                        <access>read-write</access>
5050                    </field>
5051                    <field>
5052                        <name>OD</name>
5053                        <description>Output disable. Has priority over output enable from peripherals</description>
5054                        <bitRange>[7:7]</bitRange>
5055                        <access>read-write</access>
5056                    </field>
5057                    <field>
5058                        <name>IE</name>
5059                        <description>Input enable</description>
5060                        <bitRange>[6:6]</bitRange>
5061                        <access>read-write</access>
5062                    </field>
5063                    <field>
5064                        <name>DRIVE</name>
5065                        <description>Drive strength.</description>
5066                        <bitRange>[5:4]</bitRange>
5067                        <access>read-write</access>
5068                        <enumeratedValues>
5069                            <enumeratedValue>
5070                                <name>2mA</name>
5071                                <value>0</value>
5072                            </enumeratedValue>
5073                            <enumeratedValue>
5074                                <name>4mA</name>
5075                                <value>1</value>
5076                            </enumeratedValue>
5077                            <enumeratedValue>
5078                                <name>8mA</name>
5079                                <value>2</value>
5080                            </enumeratedValue>
5081                            <enumeratedValue>
5082                                <name>12mA</name>
5083                                <value>3</value>
5084                            </enumeratedValue>
5085                        </enumeratedValues>
5086                    </field>
5087                    <field>
5088                        <name>PUE</name>
5089                        <description>Pull up enable</description>
5090                        <bitRange>[3:3]</bitRange>
5091                        <access>read-write</access>
5092                    </field>
5093                    <field>
5094                        <name>PDE</name>
5095                        <description>Pull down enable</description>
5096                        <bitRange>[2:2]</bitRange>
5097                        <access>read-write</access>
5098                    </field>
5099                    <field>
5100                        <name>SCHMITT</name>
5101                        <description>Enable schmitt trigger</description>
5102                        <bitRange>[1:1]</bitRange>
5103                        <access>read-write</access>
5104                    </field>
5105                    <field>
5106                        <name>SLEWFAST</name>
5107                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5108                        <bitRange>[0:0]</bitRange>
5109                        <access>read-write</access>
5110                    </field>
5111                </fields>
5112            </register>
5113            <register>
5114                <name>GPIO16</name>
5115                <addressOffset>0x00000044</addressOffset>
5116                <resetValue>0x00000116</resetValue>
5117                <fields>
5118                    <field>
5119                        <name>ISO</name>
5120                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5121                        <bitRange>[8:8]</bitRange>
5122                        <access>read-write</access>
5123                    </field>
5124                    <field>
5125                        <name>OD</name>
5126                        <description>Output disable. Has priority over output enable from peripherals</description>
5127                        <bitRange>[7:7]</bitRange>
5128                        <access>read-write</access>
5129                    </field>
5130                    <field>
5131                        <name>IE</name>
5132                        <description>Input enable</description>
5133                        <bitRange>[6:6]</bitRange>
5134                        <access>read-write</access>
5135                    </field>
5136                    <field>
5137                        <name>DRIVE</name>
5138                        <description>Drive strength.</description>
5139                        <bitRange>[5:4]</bitRange>
5140                        <access>read-write</access>
5141                        <enumeratedValues>
5142                            <enumeratedValue>
5143                                <name>2mA</name>
5144                                <value>0</value>
5145                            </enumeratedValue>
5146                            <enumeratedValue>
5147                                <name>4mA</name>
5148                                <value>1</value>
5149                            </enumeratedValue>
5150                            <enumeratedValue>
5151                                <name>8mA</name>
5152                                <value>2</value>
5153                            </enumeratedValue>
5154                            <enumeratedValue>
5155                                <name>12mA</name>
5156                                <value>3</value>
5157                            </enumeratedValue>
5158                        </enumeratedValues>
5159                    </field>
5160                    <field>
5161                        <name>PUE</name>
5162                        <description>Pull up enable</description>
5163                        <bitRange>[3:3]</bitRange>
5164                        <access>read-write</access>
5165                    </field>
5166                    <field>
5167                        <name>PDE</name>
5168                        <description>Pull down enable</description>
5169                        <bitRange>[2:2]</bitRange>
5170                        <access>read-write</access>
5171                    </field>
5172                    <field>
5173                        <name>SCHMITT</name>
5174                        <description>Enable schmitt trigger</description>
5175                        <bitRange>[1:1]</bitRange>
5176                        <access>read-write</access>
5177                    </field>
5178                    <field>
5179                        <name>SLEWFAST</name>
5180                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5181                        <bitRange>[0:0]</bitRange>
5182                        <access>read-write</access>
5183                    </field>
5184                </fields>
5185            </register>
5186            <register>
5187                <name>GPIO17</name>
5188                <addressOffset>0x00000048</addressOffset>
5189                <resetValue>0x00000116</resetValue>
5190                <fields>
5191                    <field>
5192                        <name>ISO</name>
5193                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5194                        <bitRange>[8:8]</bitRange>
5195                        <access>read-write</access>
5196                    </field>
5197                    <field>
5198                        <name>OD</name>
5199                        <description>Output disable. Has priority over output enable from peripherals</description>
5200                        <bitRange>[7:7]</bitRange>
5201                        <access>read-write</access>
5202                    </field>
5203                    <field>
5204                        <name>IE</name>
5205                        <description>Input enable</description>
5206                        <bitRange>[6:6]</bitRange>
5207                        <access>read-write</access>
5208                    </field>
5209                    <field>
5210                        <name>DRIVE</name>
5211                        <description>Drive strength.</description>
5212                        <bitRange>[5:4]</bitRange>
5213                        <access>read-write</access>
5214                        <enumeratedValues>
5215                            <enumeratedValue>
5216                                <name>2mA</name>
5217                                <value>0</value>
5218                            </enumeratedValue>
5219                            <enumeratedValue>
5220                                <name>4mA</name>
5221                                <value>1</value>
5222                            </enumeratedValue>
5223                            <enumeratedValue>
5224                                <name>8mA</name>
5225                                <value>2</value>
5226                            </enumeratedValue>
5227                            <enumeratedValue>
5228                                <name>12mA</name>
5229                                <value>3</value>
5230                            </enumeratedValue>
5231                        </enumeratedValues>
5232                    </field>
5233                    <field>
5234                        <name>PUE</name>
5235                        <description>Pull up enable</description>
5236                        <bitRange>[3:3]</bitRange>
5237                        <access>read-write</access>
5238                    </field>
5239                    <field>
5240                        <name>PDE</name>
5241                        <description>Pull down enable</description>
5242                        <bitRange>[2:2]</bitRange>
5243                        <access>read-write</access>
5244                    </field>
5245                    <field>
5246                        <name>SCHMITT</name>
5247                        <description>Enable schmitt trigger</description>
5248                        <bitRange>[1:1]</bitRange>
5249                        <access>read-write</access>
5250                    </field>
5251                    <field>
5252                        <name>SLEWFAST</name>
5253                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5254                        <bitRange>[0:0]</bitRange>
5255                        <access>read-write</access>
5256                    </field>
5257                </fields>
5258            </register>
5259            <register>
5260                <name>GPIO18</name>
5261                <addressOffset>0x0000004c</addressOffset>
5262                <resetValue>0x00000116</resetValue>
5263                <fields>
5264                    <field>
5265                        <name>ISO</name>
5266                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5267                        <bitRange>[8:8]</bitRange>
5268                        <access>read-write</access>
5269                    </field>
5270                    <field>
5271                        <name>OD</name>
5272                        <description>Output disable. Has priority over output enable from peripherals</description>
5273                        <bitRange>[7:7]</bitRange>
5274                        <access>read-write</access>
5275                    </field>
5276                    <field>
5277                        <name>IE</name>
5278                        <description>Input enable</description>
5279                        <bitRange>[6:6]</bitRange>
5280                        <access>read-write</access>
5281                    </field>
5282                    <field>
5283                        <name>DRIVE</name>
5284                        <description>Drive strength.</description>
5285                        <bitRange>[5:4]</bitRange>
5286                        <access>read-write</access>
5287                        <enumeratedValues>
5288                            <enumeratedValue>
5289                                <name>2mA</name>
5290                                <value>0</value>
5291                            </enumeratedValue>
5292                            <enumeratedValue>
5293                                <name>4mA</name>
5294                                <value>1</value>
5295                            </enumeratedValue>
5296                            <enumeratedValue>
5297                                <name>8mA</name>
5298                                <value>2</value>
5299                            </enumeratedValue>
5300                            <enumeratedValue>
5301                                <name>12mA</name>
5302                                <value>3</value>
5303                            </enumeratedValue>
5304                        </enumeratedValues>
5305                    </field>
5306                    <field>
5307                        <name>PUE</name>
5308                        <description>Pull up enable</description>
5309                        <bitRange>[3:3]</bitRange>
5310                        <access>read-write</access>
5311                    </field>
5312                    <field>
5313                        <name>PDE</name>
5314                        <description>Pull down enable</description>
5315                        <bitRange>[2:2]</bitRange>
5316                        <access>read-write</access>
5317                    </field>
5318                    <field>
5319                        <name>SCHMITT</name>
5320                        <description>Enable schmitt trigger</description>
5321                        <bitRange>[1:1]</bitRange>
5322                        <access>read-write</access>
5323                    </field>
5324                    <field>
5325                        <name>SLEWFAST</name>
5326                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5327                        <bitRange>[0:0]</bitRange>
5328                        <access>read-write</access>
5329                    </field>
5330                </fields>
5331            </register>
5332            <register>
5333                <name>GPIO19</name>
5334                <addressOffset>0x00000050</addressOffset>
5335                <resetValue>0x00000116</resetValue>
5336                <fields>
5337                    <field>
5338                        <name>ISO</name>
5339                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5340                        <bitRange>[8:8]</bitRange>
5341                        <access>read-write</access>
5342                    </field>
5343                    <field>
5344                        <name>OD</name>
5345                        <description>Output disable. Has priority over output enable from peripherals</description>
5346                        <bitRange>[7:7]</bitRange>
5347                        <access>read-write</access>
5348                    </field>
5349                    <field>
5350                        <name>IE</name>
5351                        <description>Input enable</description>
5352                        <bitRange>[6:6]</bitRange>
5353                        <access>read-write</access>
5354                    </field>
5355                    <field>
5356                        <name>DRIVE</name>
5357                        <description>Drive strength.</description>
5358                        <bitRange>[5:4]</bitRange>
5359                        <access>read-write</access>
5360                        <enumeratedValues>
5361                            <enumeratedValue>
5362                                <name>2mA</name>
5363                                <value>0</value>
5364                            </enumeratedValue>
5365                            <enumeratedValue>
5366                                <name>4mA</name>
5367                                <value>1</value>
5368                            </enumeratedValue>
5369                            <enumeratedValue>
5370                                <name>8mA</name>
5371                                <value>2</value>
5372                            </enumeratedValue>
5373                            <enumeratedValue>
5374                                <name>12mA</name>
5375                                <value>3</value>
5376                            </enumeratedValue>
5377                        </enumeratedValues>
5378                    </field>
5379                    <field>
5380                        <name>PUE</name>
5381                        <description>Pull up enable</description>
5382                        <bitRange>[3:3]</bitRange>
5383                        <access>read-write</access>
5384                    </field>
5385                    <field>
5386                        <name>PDE</name>
5387                        <description>Pull down enable</description>
5388                        <bitRange>[2:2]</bitRange>
5389                        <access>read-write</access>
5390                    </field>
5391                    <field>
5392                        <name>SCHMITT</name>
5393                        <description>Enable schmitt trigger</description>
5394                        <bitRange>[1:1]</bitRange>
5395                        <access>read-write</access>
5396                    </field>
5397                    <field>
5398                        <name>SLEWFAST</name>
5399                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5400                        <bitRange>[0:0]</bitRange>
5401                        <access>read-write</access>
5402                    </field>
5403                </fields>
5404            </register>
5405            <register>
5406                <name>GPIO20</name>
5407                <addressOffset>0x00000054</addressOffset>
5408                <resetValue>0x00000116</resetValue>
5409                <fields>
5410                    <field>
5411                        <name>ISO</name>
5412                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5413                        <bitRange>[8:8]</bitRange>
5414                        <access>read-write</access>
5415                    </field>
5416                    <field>
5417                        <name>OD</name>
5418                        <description>Output disable. Has priority over output enable from peripherals</description>
5419                        <bitRange>[7:7]</bitRange>
5420                        <access>read-write</access>
5421                    </field>
5422                    <field>
5423                        <name>IE</name>
5424                        <description>Input enable</description>
5425                        <bitRange>[6:6]</bitRange>
5426                        <access>read-write</access>
5427                    </field>
5428                    <field>
5429                        <name>DRIVE</name>
5430                        <description>Drive strength.</description>
5431                        <bitRange>[5:4]</bitRange>
5432                        <access>read-write</access>
5433                        <enumeratedValues>
5434                            <enumeratedValue>
5435                                <name>2mA</name>
5436                                <value>0</value>
5437                            </enumeratedValue>
5438                            <enumeratedValue>
5439                                <name>4mA</name>
5440                                <value>1</value>
5441                            </enumeratedValue>
5442                            <enumeratedValue>
5443                                <name>8mA</name>
5444                                <value>2</value>
5445                            </enumeratedValue>
5446                            <enumeratedValue>
5447                                <name>12mA</name>
5448                                <value>3</value>
5449                            </enumeratedValue>
5450                        </enumeratedValues>
5451                    </field>
5452                    <field>
5453                        <name>PUE</name>
5454                        <description>Pull up enable</description>
5455                        <bitRange>[3:3]</bitRange>
5456                        <access>read-write</access>
5457                    </field>
5458                    <field>
5459                        <name>PDE</name>
5460                        <description>Pull down enable</description>
5461                        <bitRange>[2:2]</bitRange>
5462                        <access>read-write</access>
5463                    </field>
5464                    <field>
5465                        <name>SCHMITT</name>
5466                        <description>Enable schmitt trigger</description>
5467                        <bitRange>[1:1]</bitRange>
5468                        <access>read-write</access>
5469                    </field>
5470                    <field>
5471                        <name>SLEWFAST</name>
5472                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5473                        <bitRange>[0:0]</bitRange>
5474                        <access>read-write</access>
5475                    </field>
5476                </fields>
5477            </register>
5478            <register>
5479                <name>GPIO21</name>
5480                <addressOffset>0x00000058</addressOffset>
5481                <resetValue>0x00000116</resetValue>
5482                <fields>
5483                    <field>
5484                        <name>ISO</name>
5485                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5486                        <bitRange>[8:8]</bitRange>
5487                        <access>read-write</access>
5488                    </field>
5489                    <field>
5490                        <name>OD</name>
5491                        <description>Output disable. Has priority over output enable from peripherals</description>
5492                        <bitRange>[7:7]</bitRange>
5493                        <access>read-write</access>
5494                    </field>
5495                    <field>
5496                        <name>IE</name>
5497                        <description>Input enable</description>
5498                        <bitRange>[6:6]</bitRange>
5499                        <access>read-write</access>
5500                    </field>
5501                    <field>
5502                        <name>DRIVE</name>
5503                        <description>Drive strength.</description>
5504                        <bitRange>[5:4]</bitRange>
5505                        <access>read-write</access>
5506                        <enumeratedValues>
5507                            <enumeratedValue>
5508                                <name>2mA</name>
5509                                <value>0</value>
5510                            </enumeratedValue>
5511                            <enumeratedValue>
5512                                <name>4mA</name>
5513                                <value>1</value>
5514                            </enumeratedValue>
5515                            <enumeratedValue>
5516                                <name>8mA</name>
5517                                <value>2</value>
5518                            </enumeratedValue>
5519                            <enumeratedValue>
5520                                <name>12mA</name>
5521                                <value>3</value>
5522                            </enumeratedValue>
5523                        </enumeratedValues>
5524                    </field>
5525                    <field>
5526                        <name>PUE</name>
5527                        <description>Pull up enable</description>
5528                        <bitRange>[3:3]</bitRange>
5529                        <access>read-write</access>
5530                    </field>
5531                    <field>
5532                        <name>PDE</name>
5533                        <description>Pull down enable</description>
5534                        <bitRange>[2:2]</bitRange>
5535                        <access>read-write</access>
5536                    </field>
5537                    <field>
5538                        <name>SCHMITT</name>
5539                        <description>Enable schmitt trigger</description>
5540                        <bitRange>[1:1]</bitRange>
5541                        <access>read-write</access>
5542                    </field>
5543                    <field>
5544                        <name>SLEWFAST</name>
5545                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5546                        <bitRange>[0:0]</bitRange>
5547                        <access>read-write</access>
5548                    </field>
5549                </fields>
5550            </register>
5551            <register>
5552                <name>GPIO22</name>
5553                <addressOffset>0x0000005c</addressOffset>
5554                <resetValue>0x00000116</resetValue>
5555                <fields>
5556                    <field>
5557                        <name>ISO</name>
5558                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5559                        <bitRange>[8:8]</bitRange>
5560                        <access>read-write</access>
5561                    </field>
5562                    <field>
5563                        <name>OD</name>
5564                        <description>Output disable. Has priority over output enable from peripherals</description>
5565                        <bitRange>[7:7]</bitRange>
5566                        <access>read-write</access>
5567                    </field>
5568                    <field>
5569                        <name>IE</name>
5570                        <description>Input enable</description>
5571                        <bitRange>[6:6]</bitRange>
5572                        <access>read-write</access>
5573                    </field>
5574                    <field>
5575                        <name>DRIVE</name>
5576                        <description>Drive strength.</description>
5577                        <bitRange>[5:4]</bitRange>
5578                        <access>read-write</access>
5579                        <enumeratedValues>
5580                            <enumeratedValue>
5581                                <name>2mA</name>
5582                                <value>0</value>
5583                            </enumeratedValue>
5584                            <enumeratedValue>
5585                                <name>4mA</name>
5586                                <value>1</value>
5587                            </enumeratedValue>
5588                            <enumeratedValue>
5589                                <name>8mA</name>
5590                                <value>2</value>
5591                            </enumeratedValue>
5592                            <enumeratedValue>
5593                                <name>12mA</name>
5594                                <value>3</value>
5595                            </enumeratedValue>
5596                        </enumeratedValues>
5597                    </field>
5598                    <field>
5599                        <name>PUE</name>
5600                        <description>Pull up enable</description>
5601                        <bitRange>[3:3]</bitRange>
5602                        <access>read-write</access>
5603                    </field>
5604                    <field>
5605                        <name>PDE</name>
5606                        <description>Pull down enable</description>
5607                        <bitRange>[2:2]</bitRange>
5608                        <access>read-write</access>
5609                    </field>
5610                    <field>
5611                        <name>SCHMITT</name>
5612                        <description>Enable schmitt trigger</description>
5613                        <bitRange>[1:1]</bitRange>
5614                        <access>read-write</access>
5615                    </field>
5616                    <field>
5617                        <name>SLEWFAST</name>
5618                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5619                        <bitRange>[0:0]</bitRange>
5620                        <access>read-write</access>
5621                    </field>
5622                </fields>
5623            </register>
5624            <register>
5625                <name>GPIO23</name>
5626                <addressOffset>0x00000060</addressOffset>
5627                <resetValue>0x00000116</resetValue>
5628                <fields>
5629                    <field>
5630                        <name>ISO</name>
5631                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5632                        <bitRange>[8:8]</bitRange>
5633                        <access>read-write</access>
5634                    </field>
5635                    <field>
5636                        <name>OD</name>
5637                        <description>Output disable. Has priority over output enable from peripherals</description>
5638                        <bitRange>[7:7]</bitRange>
5639                        <access>read-write</access>
5640                    </field>
5641                    <field>
5642                        <name>IE</name>
5643                        <description>Input enable</description>
5644                        <bitRange>[6:6]</bitRange>
5645                        <access>read-write</access>
5646                    </field>
5647                    <field>
5648                        <name>DRIVE</name>
5649                        <description>Drive strength.</description>
5650                        <bitRange>[5:4]</bitRange>
5651                        <access>read-write</access>
5652                        <enumeratedValues>
5653                            <enumeratedValue>
5654                                <name>2mA</name>
5655                                <value>0</value>
5656                            </enumeratedValue>
5657                            <enumeratedValue>
5658                                <name>4mA</name>
5659                                <value>1</value>
5660                            </enumeratedValue>
5661                            <enumeratedValue>
5662                                <name>8mA</name>
5663                                <value>2</value>
5664                            </enumeratedValue>
5665                            <enumeratedValue>
5666                                <name>12mA</name>
5667                                <value>3</value>
5668                            </enumeratedValue>
5669                        </enumeratedValues>
5670                    </field>
5671                    <field>
5672                        <name>PUE</name>
5673                        <description>Pull up enable</description>
5674                        <bitRange>[3:3]</bitRange>
5675                        <access>read-write</access>
5676                    </field>
5677                    <field>
5678                        <name>PDE</name>
5679                        <description>Pull down enable</description>
5680                        <bitRange>[2:2]</bitRange>
5681                        <access>read-write</access>
5682                    </field>
5683                    <field>
5684                        <name>SCHMITT</name>
5685                        <description>Enable schmitt trigger</description>
5686                        <bitRange>[1:1]</bitRange>
5687                        <access>read-write</access>
5688                    </field>
5689                    <field>
5690                        <name>SLEWFAST</name>
5691                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5692                        <bitRange>[0:0]</bitRange>
5693                        <access>read-write</access>
5694                    </field>
5695                </fields>
5696            </register>
5697            <register>
5698                <name>GPIO24</name>
5699                <addressOffset>0x00000064</addressOffset>
5700                <resetValue>0x00000116</resetValue>
5701                <fields>
5702                    <field>
5703                        <name>ISO</name>
5704                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5705                        <bitRange>[8:8]</bitRange>
5706                        <access>read-write</access>
5707                    </field>
5708                    <field>
5709                        <name>OD</name>
5710                        <description>Output disable. Has priority over output enable from peripherals</description>
5711                        <bitRange>[7:7]</bitRange>
5712                        <access>read-write</access>
5713                    </field>
5714                    <field>
5715                        <name>IE</name>
5716                        <description>Input enable</description>
5717                        <bitRange>[6:6]</bitRange>
5718                        <access>read-write</access>
5719                    </field>
5720                    <field>
5721                        <name>DRIVE</name>
5722                        <description>Drive strength.</description>
5723                        <bitRange>[5:4]</bitRange>
5724                        <access>read-write</access>
5725                        <enumeratedValues>
5726                            <enumeratedValue>
5727                                <name>2mA</name>
5728                                <value>0</value>
5729                            </enumeratedValue>
5730                            <enumeratedValue>
5731                                <name>4mA</name>
5732                                <value>1</value>
5733                            </enumeratedValue>
5734                            <enumeratedValue>
5735                                <name>8mA</name>
5736                                <value>2</value>
5737                            </enumeratedValue>
5738                            <enumeratedValue>
5739                                <name>12mA</name>
5740                                <value>3</value>
5741                            </enumeratedValue>
5742                        </enumeratedValues>
5743                    </field>
5744                    <field>
5745                        <name>PUE</name>
5746                        <description>Pull up enable</description>
5747                        <bitRange>[3:3]</bitRange>
5748                        <access>read-write</access>
5749                    </field>
5750                    <field>
5751                        <name>PDE</name>
5752                        <description>Pull down enable</description>
5753                        <bitRange>[2:2]</bitRange>
5754                        <access>read-write</access>
5755                    </field>
5756                    <field>
5757                        <name>SCHMITT</name>
5758                        <description>Enable schmitt trigger</description>
5759                        <bitRange>[1:1]</bitRange>
5760                        <access>read-write</access>
5761                    </field>
5762                    <field>
5763                        <name>SLEWFAST</name>
5764                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5765                        <bitRange>[0:0]</bitRange>
5766                        <access>read-write</access>
5767                    </field>
5768                </fields>
5769            </register>
5770            <register>
5771                <name>GPIO25</name>
5772                <addressOffset>0x00000068</addressOffset>
5773                <resetValue>0x00000116</resetValue>
5774                <fields>
5775                    <field>
5776                        <name>ISO</name>
5777                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5778                        <bitRange>[8:8]</bitRange>
5779                        <access>read-write</access>
5780                    </field>
5781                    <field>
5782                        <name>OD</name>
5783                        <description>Output disable. Has priority over output enable from peripherals</description>
5784                        <bitRange>[7:7]</bitRange>
5785                        <access>read-write</access>
5786                    </field>
5787                    <field>
5788                        <name>IE</name>
5789                        <description>Input enable</description>
5790                        <bitRange>[6:6]</bitRange>
5791                        <access>read-write</access>
5792                    </field>
5793                    <field>
5794                        <name>DRIVE</name>
5795                        <description>Drive strength.</description>
5796                        <bitRange>[5:4]</bitRange>
5797                        <access>read-write</access>
5798                        <enumeratedValues>
5799                            <enumeratedValue>
5800                                <name>2mA</name>
5801                                <value>0</value>
5802                            </enumeratedValue>
5803                            <enumeratedValue>
5804                                <name>4mA</name>
5805                                <value>1</value>
5806                            </enumeratedValue>
5807                            <enumeratedValue>
5808                                <name>8mA</name>
5809                                <value>2</value>
5810                            </enumeratedValue>
5811                            <enumeratedValue>
5812                                <name>12mA</name>
5813                                <value>3</value>
5814                            </enumeratedValue>
5815                        </enumeratedValues>
5816                    </field>
5817                    <field>
5818                        <name>PUE</name>
5819                        <description>Pull up enable</description>
5820                        <bitRange>[3:3]</bitRange>
5821                        <access>read-write</access>
5822                    </field>
5823                    <field>
5824                        <name>PDE</name>
5825                        <description>Pull down enable</description>
5826                        <bitRange>[2:2]</bitRange>
5827                        <access>read-write</access>
5828                    </field>
5829                    <field>
5830                        <name>SCHMITT</name>
5831                        <description>Enable schmitt trigger</description>
5832                        <bitRange>[1:1]</bitRange>
5833                        <access>read-write</access>
5834                    </field>
5835                    <field>
5836                        <name>SLEWFAST</name>
5837                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5838                        <bitRange>[0:0]</bitRange>
5839                        <access>read-write</access>
5840                    </field>
5841                </fields>
5842            </register>
5843            <register>
5844                <name>GPIO26</name>
5845                <addressOffset>0x0000006c</addressOffset>
5846                <resetValue>0x00000116</resetValue>
5847                <fields>
5848                    <field>
5849                        <name>ISO</name>
5850                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5851                        <bitRange>[8:8]</bitRange>
5852                        <access>read-write</access>
5853                    </field>
5854                    <field>
5855                        <name>OD</name>
5856                        <description>Output disable. Has priority over output enable from peripherals</description>
5857                        <bitRange>[7:7]</bitRange>
5858                        <access>read-write</access>
5859                    </field>
5860                    <field>
5861                        <name>IE</name>
5862                        <description>Input enable</description>
5863                        <bitRange>[6:6]</bitRange>
5864                        <access>read-write</access>
5865                    </field>
5866                    <field>
5867                        <name>DRIVE</name>
5868                        <description>Drive strength.</description>
5869                        <bitRange>[5:4]</bitRange>
5870                        <access>read-write</access>
5871                        <enumeratedValues>
5872                            <enumeratedValue>
5873                                <name>2mA</name>
5874                                <value>0</value>
5875                            </enumeratedValue>
5876                            <enumeratedValue>
5877                                <name>4mA</name>
5878                                <value>1</value>
5879                            </enumeratedValue>
5880                            <enumeratedValue>
5881                                <name>8mA</name>
5882                                <value>2</value>
5883                            </enumeratedValue>
5884                            <enumeratedValue>
5885                                <name>12mA</name>
5886                                <value>3</value>
5887                            </enumeratedValue>
5888                        </enumeratedValues>
5889                    </field>
5890                    <field>
5891                        <name>PUE</name>
5892                        <description>Pull up enable</description>
5893                        <bitRange>[3:3]</bitRange>
5894                        <access>read-write</access>
5895                    </field>
5896                    <field>
5897                        <name>PDE</name>
5898                        <description>Pull down enable</description>
5899                        <bitRange>[2:2]</bitRange>
5900                        <access>read-write</access>
5901                    </field>
5902                    <field>
5903                        <name>SCHMITT</name>
5904                        <description>Enable schmitt trigger</description>
5905                        <bitRange>[1:1]</bitRange>
5906                        <access>read-write</access>
5907                    </field>
5908                    <field>
5909                        <name>SLEWFAST</name>
5910                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5911                        <bitRange>[0:0]</bitRange>
5912                        <access>read-write</access>
5913                    </field>
5914                </fields>
5915            </register>
5916            <register>
5917                <name>GPIO27</name>
5918                <addressOffset>0x00000070</addressOffset>
5919                <resetValue>0x00000116</resetValue>
5920                <fields>
5921                    <field>
5922                        <name>ISO</name>
5923                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5924                        <bitRange>[8:8]</bitRange>
5925                        <access>read-write</access>
5926                    </field>
5927                    <field>
5928                        <name>OD</name>
5929                        <description>Output disable. Has priority over output enable from peripherals</description>
5930                        <bitRange>[7:7]</bitRange>
5931                        <access>read-write</access>
5932                    </field>
5933                    <field>
5934                        <name>IE</name>
5935                        <description>Input enable</description>
5936                        <bitRange>[6:6]</bitRange>
5937                        <access>read-write</access>
5938                    </field>
5939                    <field>
5940                        <name>DRIVE</name>
5941                        <description>Drive strength.</description>
5942                        <bitRange>[5:4]</bitRange>
5943                        <access>read-write</access>
5944                        <enumeratedValues>
5945                            <enumeratedValue>
5946                                <name>2mA</name>
5947                                <value>0</value>
5948                            </enumeratedValue>
5949                            <enumeratedValue>
5950                                <name>4mA</name>
5951                                <value>1</value>
5952                            </enumeratedValue>
5953                            <enumeratedValue>
5954                                <name>8mA</name>
5955                                <value>2</value>
5956                            </enumeratedValue>
5957                            <enumeratedValue>
5958                                <name>12mA</name>
5959                                <value>3</value>
5960                            </enumeratedValue>
5961                        </enumeratedValues>
5962                    </field>
5963                    <field>
5964                        <name>PUE</name>
5965                        <description>Pull up enable</description>
5966                        <bitRange>[3:3]</bitRange>
5967                        <access>read-write</access>
5968                    </field>
5969                    <field>
5970                        <name>PDE</name>
5971                        <description>Pull down enable</description>
5972                        <bitRange>[2:2]</bitRange>
5973                        <access>read-write</access>
5974                    </field>
5975                    <field>
5976                        <name>SCHMITT</name>
5977                        <description>Enable schmitt trigger</description>
5978                        <bitRange>[1:1]</bitRange>
5979                        <access>read-write</access>
5980                    </field>
5981                    <field>
5982                        <name>SLEWFAST</name>
5983                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
5984                        <bitRange>[0:0]</bitRange>
5985                        <access>read-write</access>
5986                    </field>
5987                </fields>
5988            </register>
5989            <register>
5990                <name>GPIO28</name>
5991                <addressOffset>0x00000074</addressOffset>
5992                <resetValue>0x00000116</resetValue>
5993                <fields>
5994                    <field>
5995                        <name>ISO</name>
5996                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
5997                        <bitRange>[8:8]</bitRange>
5998                        <access>read-write</access>
5999                    </field>
6000                    <field>
6001                        <name>OD</name>
6002                        <description>Output disable. Has priority over output enable from peripherals</description>
6003                        <bitRange>[7:7]</bitRange>
6004                        <access>read-write</access>
6005                    </field>
6006                    <field>
6007                        <name>IE</name>
6008                        <description>Input enable</description>
6009                        <bitRange>[6:6]</bitRange>
6010                        <access>read-write</access>
6011                    </field>
6012                    <field>
6013                        <name>DRIVE</name>
6014                        <description>Drive strength.</description>
6015                        <bitRange>[5:4]</bitRange>
6016                        <access>read-write</access>
6017                        <enumeratedValues>
6018                            <enumeratedValue>
6019                                <name>2mA</name>
6020                                <value>0</value>
6021                            </enumeratedValue>
6022                            <enumeratedValue>
6023                                <name>4mA</name>
6024                                <value>1</value>
6025                            </enumeratedValue>
6026                            <enumeratedValue>
6027                                <name>8mA</name>
6028                                <value>2</value>
6029                            </enumeratedValue>
6030                            <enumeratedValue>
6031                                <name>12mA</name>
6032                                <value>3</value>
6033                            </enumeratedValue>
6034                        </enumeratedValues>
6035                    </field>
6036                    <field>
6037                        <name>PUE</name>
6038                        <description>Pull up enable</description>
6039                        <bitRange>[3:3]</bitRange>
6040                        <access>read-write</access>
6041                    </field>
6042                    <field>
6043                        <name>PDE</name>
6044                        <description>Pull down enable</description>
6045                        <bitRange>[2:2]</bitRange>
6046                        <access>read-write</access>
6047                    </field>
6048                    <field>
6049                        <name>SCHMITT</name>
6050                        <description>Enable schmitt trigger</description>
6051                        <bitRange>[1:1]</bitRange>
6052                        <access>read-write</access>
6053                    </field>
6054                    <field>
6055                        <name>SLEWFAST</name>
6056                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6057                        <bitRange>[0:0]</bitRange>
6058                        <access>read-write</access>
6059                    </field>
6060                </fields>
6061            </register>
6062            <register>
6063                <name>GPIO29</name>
6064                <addressOffset>0x00000078</addressOffset>
6065                <resetValue>0x00000116</resetValue>
6066                <fields>
6067                    <field>
6068                        <name>ISO</name>
6069                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6070                        <bitRange>[8:8]</bitRange>
6071                        <access>read-write</access>
6072                    </field>
6073                    <field>
6074                        <name>OD</name>
6075                        <description>Output disable. Has priority over output enable from peripherals</description>
6076                        <bitRange>[7:7]</bitRange>
6077                        <access>read-write</access>
6078                    </field>
6079                    <field>
6080                        <name>IE</name>
6081                        <description>Input enable</description>
6082                        <bitRange>[6:6]</bitRange>
6083                        <access>read-write</access>
6084                    </field>
6085                    <field>
6086                        <name>DRIVE</name>
6087                        <description>Drive strength.</description>
6088                        <bitRange>[5:4]</bitRange>
6089                        <access>read-write</access>
6090                        <enumeratedValues>
6091                            <enumeratedValue>
6092                                <name>2mA</name>
6093                                <value>0</value>
6094                            </enumeratedValue>
6095                            <enumeratedValue>
6096                                <name>4mA</name>
6097                                <value>1</value>
6098                            </enumeratedValue>
6099                            <enumeratedValue>
6100                                <name>8mA</name>
6101                                <value>2</value>
6102                            </enumeratedValue>
6103                            <enumeratedValue>
6104                                <name>12mA</name>
6105                                <value>3</value>
6106                            </enumeratedValue>
6107                        </enumeratedValues>
6108                    </field>
6109                    <field>
6110                        <name>PUE</name>
6111                        <description>Pull up enable</description>
6112                        <bitRange>[3:3]</bitRange>
6113                        <access>read-write</access>
6114                    </field>
6115                    <field>
6116                        <name>PDE</name>
6117                        <description>Pull down enable</description>
6118                        <bitRange>[2:2]</bitRange>
6119                        <access>read-write</access>
6120                    </field>
6121                    <field>
6122                        <name>SCHMITT</name>
6123                        <description>Enable schmitt trigger</description>
6124                        <bitRange>[1:1]</bitRange>
6125                        <access>read-write</access>
6126                    </field>
6127                    <field>
6128                        <name>SLEWFAST</name>
6129                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6130                        <bitRange>[0:0]</bitRange>
6131                        <access>read-write</access>
6132                    </field>
6133                </fields>
6134            </register>
6135            <register>
6136                <name>GPIO30</name>
6137                <addressOffset>0x0000007c</addressOffset>
6138                <resetValue>0x00000116</resetValue>
6139                <fields>
6140                    <field>
6141                        <name>ISO</name>
6142                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6143                        <bitRange>[8:8]</bitRange>
6144                        <access>read-write</access>
6145                    </field>
6146                    <field>
6147                        <name>OD</name>
6148                        <description>Output disable. Has priority over output enable from peripherals</description>
6149                        <bitRange>[7:7]</bitRange>
6150                        <access>read-write</access>
6151                    </field>
6152                    <field>
6153                        <name>IE</name>
6154                        <description>Input enable</description>
6155                        <bitRange>[6:6]</bitRange>
6156                        <access>read-write</access>
6157                    </field>
6158                    <field>
6159                        <name>DRIVE</name>
6160                        <description>Drive strength.</description>
6161                        <bitRange>[5:4]</bitRange>
6162                        <access>read-write</access>
6163                        <enumeratedValues>
6164                            <enumeratedValue>
6165                                <name>2mA</name>
6166                                <value>0</value>
6167                            </enumeratedValue>
6168                            <enumeratedValue>
6169                                <name>4mA</name>
6170                                <value>1</value>
6171                            </enumeratedValue>
6172                            <enumeratedValue>
6173                                <name>8mA</name>
6174                                <value>2</value>
6175                            </enumeratedValue>
6176                            <enumeratedValue>
6177                                <name>12mA</name>
6178                                <value>3</value>
6179                            </enumeratedValue>
6180                        </enumeratedValues>
6181                    </field>
6182                    <field>
6183                        <name>PUE</name>
6184                        <description>Pull up enable</description>
6185                        <bitRange>[3:3]</bitRange>
6186                        <access>read-write</access>
6187                    </field>
6188                    <field>
6189                        <name>PDE</name>
6190                        <description>Pull down enable</description>
6191                        <bitRange>[2:2]</bitRange>
6192                        <access>read-write</access>
6193                    </field>
6194                    <field>
6195                        <name>SCHMITT</name>
6196                        <description>Enable schmitt trigger</description>
6197                        <bitRange>[1:1]</bitRange>
6198                        <access>read-write</access>
6199                    </field>
6200                    <field>
6201                        <name>SLEWFAST</name>
6202                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6203                        <bitRange>[0:0]</bitRange>
6204                        <access>read-write</access>
6205                    </field>
6206                </fields>
6207            </register>
6208            <register>
6209                <name>GPIO31</name>
6210                <addressOffset>0x00000080</addressOffset>
6211                <resetValue>0x00000116</resetValue>
6212                <fields>
6213                    <field>
6214                        <name>ISO</name>
6215                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6216                        <bitRange>[8:8]</bitRange>
6217                        <access>read-write</access>
6218                    </field>
6219                    <field>
6220                        <name>OD</name>
6221                        <description>Output disable. Has priority over output enable from peripherals</description>
6222                        <bitRange>[7:7]</bitRange>
6223                        <access>read-write</access>
6224                    </field>
6225                    <field>
6226                        <name>IE</name>
6227                        <description>Input enable</description>
6228                        <bitRange>[6:6]</bitRange>
6229                        <access>read-write</access>
6230                    </field>
6231                    <field>
6232                        <name>DRIVE</name>
6233                        <description>Drive strength.</description>
6234                        <bitRange>[5:4]</bitRange>
6235                        <access>read-write</access>
6236                        <enumeratedValues>
6237                            <enumeratedValue>
6238                                <name>2mA</name>
6239                                <value>0</value>
6240                            </enumeratedValue>
6241                            <enumeratedValue>
6242                                <name>4mA</name>
6243                                <value>1</value>
6244                            </enumeratedValue>
6245                            <enumeratedValue>
6246                                <name>8mA</name>
6247                                <value>2</value>
6248                            </enumeratedValue>
6249                            <enumeratedValue>
6250                                <name>12mA</name>
6251                                <value>3</value>
6252                            </enumeratedValue>
6253                        </enumeratedValues>
6254                    </field>
6255                    <field>
6256                        <name>PUE</name>
6257                        <description>Pull up enable</description>
6258                        <bitRange>[3:3]</bitRange>
6259                        <access>read-write</access>
6260                    </field>
6261                    <field>
6262                        <name>PDE</name>
6263                        <description>Pull down enable</description>
6264                        <bitRange>[2:2]</bitRange>
6265                        <access>read-write</access>
6266                    </field>
6267                    <field>
6268                        <name>SCHMITT</name>
6269                        <description>Enable schmitt trigger</description>
6270                        <bitRange>[1:1]</bitRange>
6271                        <access>read-write</access>
6272                    </field>
6273                    <field>
6274                        <name>SLEWFAST</name>
6275                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6276                        <bitRange>[0:0]</bitRange>
6277                        <access>read-write</access>
6278                    </field>
6279                </fields>
6280            </register>
6281            <register>
6282                <name>GPIO32</name>
6283                <addressOffset>0x00000084</addressOffset>
6284                <resetValue>0x00000116</resetValue>
6285                <fields>
6286                    <field>
6287                        <name>ISO</name>
6288                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6289                        <bitRange>[8:8]</bitRange>
6290                        <access>read-write</access>
6291                    </field>
6292                    <field>
6293                        <name>OD</name>
6294                        <description>Output disable. Has priority over output enable from peripherals</description>
6295                        <bitRange>[7:7]</bitRange>
6296                        <access>read-write</access>
6297                    </field>
6298                    <field>
6299                        <name>IE</name>
6300                        <description>Input enable</description>
6301                        <bitRange>[6:6]</bitRange>
6302                        <access>read-write</access>
6303                    </field>
6304                    <field>
6305                        <name>DRIVE</name>
6306                        <description>Drive strength.</description>
6307                        <bitRange>[5:4]</bitRange>
6308                        <access>read-write</access>
6309                        <enumeratedValues>
6310                            <enumeratedValue>
6311                                <name>2mA</name>
6312                                <value>0</value>
6313                            </enumeratedValue>
6314                            <enumeratedValue>
6315                                <name>4mA</name>
6316                                <value>1</value>
6317                            </enumeratedValue>
6318                            <enumeratedValue>
6319                                <name>8mA</name>
6320                                <value>2</value>
6321                            </enumeratedValue>
6322                            <enumeratedValue>
6323                                <name>12mA</name>
6324                                <value>3</value>
6325                            </enumeratedValue>
6326                        </enumeratedValues>
6327                    </field>
6328                    <field>
6329                        <name>PUE</name>
6330                        <description>Pull up enable</description>
6331                        <bitRange>[3:3]</bitRange>
6332                        <access>read-write</access>
6333                    </field>
6334                    <field>
6335                        <name>PDE</name>
6336                        <description>Pull down enable</description>
6337                        <bitRange>[2:2]</bitRange>
6338                        <access>read-write</access>
6339                    </field>
6340                    <field>
6341                        <name>SCHMITT</name>
6342                        <description>Enable schmitt trigger</description>
6343                        <bitRange>[1:1]</bitRange>
6344                        <access>read-write</access>
6345                    </field>
6346                    <field>
6347                        <name>SLEWFAST</name>
6348                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6349                        <bitRange>[0:0]</bitRange>
6350                        <access>read-write</access>
6351                    </field>
6352                </fields>
6353            </register>
6354            <register>
6355                <name>GPIO33</name>
6356                <addressOffset>0x00000088</addressOffset>
6357                <resetValue>0x00000116</resetValue>
6358                <fields>
6359                    <field>
6360                        <name>ISO</name>
6361                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6362                        <bitRange>[8:8]</bitRange>
6363                        <access>read-write</access>
6364                    </field>
6365                    <field>
6366                        <name>OD</name>
6367                        <description>Output disable. Has priority over output enable from peripherals</description>
6368                        <bitRange>[7:7]</bitRange>
6369                        <access>read-write</access>
6370                    </field>
6371                    <field>
6372                        <name>IE</name>
6373                        <description>Input enable</description>
6374                        <bitRange>[6:6]</bitRange>
6375                        <access>read-write</access>
6376                    </field>
6377                    <field>
6378                        <name>DRIVE</name>
6379                        <description>Drive strength.</description>
6380                        <bitRange>[5:4]</bitRange>
6381                        <access>read-write</access>
6382                        <enumeratedValues>
6383                            <enumeratedValue>
6384                                <name>2mA</name>
6385                                <value>0</value>
6386                            </enumeratedValue>
6387                            <enumeratedValue>
6388                                <name>4mA</name>
6389                                <value>1</value>
6390                            </enumeratedValue>
6391                            <enumeratedValue>
6392                                <name>8mA</name>
6393                                <value>2</value>
6394                            </enumeratedValue>
6395                            <enumeratedValue>
6396                                <name>12mA</name>
6397                                <value>3</value>
6398                            </enumeratedValue>
6399                        </enumeratedValues>
6400                    </field>
6401                    <field>
6402                        <name>PUE</name>
6403                        <description>Pull up enable</description>
6404                        <bitRange>[3:3]</bitRange>
6405                        <access>read-write</access>
6406                    </field>
6407                    <field>
6408                        <name>PDE</name>
6409                        <description>Pull down enable</description>
6410                        <bitRange>[2:2]</bitRange>
6411                        <access>read-write</access>
6412                    </field>
6413                    <field>
6414                        <name>SCHMITT</name>
6415                        <description>Enable schmitt trigger</description>
6416                        <bitRange>[1:1]</bitRange>
6417                        <access>read-write</access>
6418                    </field>
6419                    <field>
6420                        <name>SLEWFAST</name>
6421                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6422                        <bitRange>[0:0]</bitRange>
6423                        <access>read-write</access>
6424                    </field>
6425                </fields>
6426            </register>
6427            <register>
6428                <name>GPIO34</name>
6429                <addressOffset>0x0000008c</addressOffset>
6430                <resetValue>0x00000116</resetValue>
6431                <fields>
6432                    <field>
6433                        <name>ISO</name>
6434                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6435                        <bitRange>[8:8]</bitRange>
6436                        <access>read-write</access>
6437                    </field>
6438                    <field>
6439                        <name>OD</name>
6440                        <description>Output disable. Has priority over output enable from peripherals</description>
6441                        <bitRange>[7:7]</bitRange>
6442                        <access>read-write</access>
6443                    </field>
6444                    <field>
6445                        <name>IE</name>
6446                        <description>Input enable</description>
6447                        <bitRange>[6:6]</bitRange>
6448                        <access>read-write</access>
6449                    </field>
6450                    <field>
6451                        <name>DRIVE</name>
6452                        <description>Drive strength.</description>
6453                        <bitRange>[5:4]</bitRange>
6454                        <access>read-write</access>
6455                        <enumeratedValues>
6456                            <enumeratedValue>
6457                                <name>2mA</name>
6458                                <value>0</value>
6459                            </enumeratedValue>
6460                            <enumeratedValue>
6461                                <name>4mA</name>
6462                                <value>1</value>
6463                            </enumeratedValue>
6464                            <enumeratedValue>
6465                                <name>8mA</name>
6466                                <value>2</value>
6467                            </enumeratedValue>
6468                            <enumeratedValue>
6469                                <name>12mA</name>
6470                                <value>3</value>
6471                            </enumeratedValue>
6472                        </enumeratedValues>
6473                    </field>
6474                    <field>
6475                        <name>PUE</name>
6476                        <description>Pull up enable</description>
6477                        <bitRange>[3:3]</bitRange>
6478                        <access>read-write</access>
6479                    </field>
6480                    <field>
6481                        <name>PDE</name>
6482                        <description>Pull down enable</description>
6483                        <bitRange>[2:2]</bitRange>
6484                        <access>read-write</access>
6485                    </field>
6486                    <field>
6487                        <name>SCHMITT</name>
6488                        <description>Enable schmitt trigger</description>
6489                        <bitRange>[1:1]</bitRange>
6490                        <access>read-write</access>
6491                    </field>
6492                    <field>
6493                        <name>SLEWFAST</name>
6494                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6495                        <bitRange>[0:0]</bitRange>
6496                        <access>read-write</access>
6497                    </field>
6498                </fields>
6499            </register>
6500            <register>
6501                <name>GPIO35</name>
6502                <addressOffset>0x00000090</addressOffset>
6503                <resetValue>0x00000116</resetValue>
6504                <fields>
6505                    <field>
6506                        <name>ISO</name>
6507                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6508                        <bitRange>[8:8]</bitRange>
6509                        <access>read-write</access>
6510                    </field>
6511                    <field>
6512                        <name>OD</name>
6513                        <description>Output disable. Has priority over output enable from peripherals</description>
6514                        <bitRange>[7:7]</bitRange>
6515                        <access>read-write</access>
6516                    </field>
6517                    <field>
6518                        <name>IE</name>
6519                        <description>Input enable</description>
6520                        <bitRange>[6:6]</bitRange>
6521                        <access>read-write</access>
6522                    </field>
6523                    <field>
6524                        <name>DRIVE</name>
6525                        <description>Drive strength.</description>
6526                        <bitRange>[5:4]</bitRange>
6527                        <access>read-write</access>
6528                        <enumeratedValues>
6529                            <enumeratedValue>
6530                                <name>2mA</name>
6531                                <value>0</value>
6532                            </enumeratedValue>
6533                            <enumeratedValue>
6534                                <name>4mA</name>
6535                                <value>1</value>
6536                            </enumeratedValue>
6537                            <enumeratedValue>
6538                                <name>8mA</name>
6539                                <value>2</value>
6540                            </enumeratedValue>
6541                            <enumeratedValue>
6542                                <name>12mA</name>
6543                                <value>3</value>
6544                            </enumeratedValue>
6545                        </enumeratedValues>
6546                    </field>
6547                    <field>
6548                        <name>PUE</name>
6549                        <description>Pull up enable</description>
6550                        <bitRange>[3:3]</bitRange>
6551                        <access>read-write</access>
6552                    </field>
6553                    <field>
6554                        <name>PDE</name>
6555                        <description>Pull down enable</description>
6556                        <bitRange>[2:2]</bitRange>
6557                        <access>read-write</access>
6558                    </field>
6559                    <field>
6560                        <name>SCHMITT</name>
6561                        <description>Enable schmitt trigger</description>
6562                        <bitRange>[1:1]</bitRange>
6563                        <access>read-write</access>
6564                    </field>
6565                    <field>
6566                        <name>SLEWFAST</name>
6567                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6568                        <bitRange>[0:0]</bitRange>
6569                        <access>read-write</access>
6570                    </field>
6571                </fields>
6572            </register>
6573            <register>
6574                <name>GPIO36</name>
6575                <addressOffset>0x00000094</addressOffset>
6576                <resetValue>0x00000116</resetValue>
6577                <fields>
6578                    <field>
6579                        <name>ISO</name>
6580                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6581                        <bitRange>[8:8]</bitRange>
6582                        <access>read-write</access>
6583                    </field>
6584                    <field>
6585                        <name>OD</name>
6586                        <description>Output disable. Has priority over output enable from peripherals</description>
6587                        <bitRange>[7:7]</bitRange>
6588                        <access>read-write</access>
6589                    </field>
6590                    <field>
6591                        <name>IE</name>
6592                        <description>Input enable</description>
6593                        <bitRange>[6:6]</bitRange>
6594                        <access>read-write</access>
6595                    </field>
6596                    <field>
6597                        <name>DRIVE</name>
6598                        <description>Drive strength.</description>
6599                        <bitRange>[5:4]</bitRange>
6600                        <access>read-write</access>
6601                        <enumeratedValues>
6602                            <enumeratedValue>
6603                                <name>2mA</name>
6604                                <value>0</value>
6605                            </enumeratedValue>
6606                            <enumeratedValue>
6607                                <name>4mA</name>
6608                                <value>1</value>
6609                            </enumeratedValue>
6610                            <enumeratedValue>
6611                                <name>8mA</name>
6612                                <value>2</value>
6613                            </enumeratedValue>
6614                            <enumeratedValue>
6615                                <name>12mA</name>
6616                                <value>3</value>
6617                            </enumeratedValue>
6618                        </enumeratedValues>
6619                    </field>
6620                    <field>
6621                        <name>PUE</name>
6622                        <description>Pull up enable</description>
6623                        <bitRange>[3:3]</bitRange>
6624                        <access>read-write</access>
6625                    </field>
6626                    <field>
6627                        <name>PDE</name>
6628                        <description>Pull down enable</description>
6629                        <bitRange>[2:2]</bitRange>
6630                        <access>read-write</access>
6631                    </field>
6632                    <field>
6633                        <name>SCHMITT</name>
6634                        <description>Enable schmitt trigger</description>
6635                        <bitRange>[1:1]</bitRange>
6636                        <access>read-write</access>
6637                    </field>
6638                    <field>
6639                        <name>SLEWFAST</name>
6640                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6641                        <bitRange>[0:0]</bitRange>
6642                        <access>read-write</access>
6643                    </field>
6644                </fields>
6645            </register>
6646            <register>
6647                <name>GPIO37</name>
6648                <addressOffset>0x00000098</addressOffset>
6649                <resetValue>0x00000116</resetValue>
6650                <fields>
6651                    <field>
6652                        <name>ISO</name>
6653                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6654                        <bitRange>[8:8]</bitRange>
6655                        <access>read-write</access>
6656                    </field>
6657                    <field>
6658                        <name>OD</name>
6659                        <description>Output disable. Has priority over output enable from peripherals</description>
6660                        <bitRange>[7:7]</bitRange>
6661                        <access>read-write</access>
6662                    </field>
6663                    <field>
6664                        <name>IE</name>
6665                        <description>Input enable</description>
6666                        <bitRange>[6:6]</bitRange>
6667                        <access>read-write</access>
6668                    </field>
6669                    <field>
6670                        <name>DRIVE</name>
6671                        <description>Drive strength.</description>
6672                        <bitRange>[5:4]</bitRange>
6673                        <access>read-write</access>
6674                        <enumeratedValues>
6675                            <enumeratedValue>
6676                                <name>2mA</name>
6677                                <value>0</value>
6678                            </enumeratedValue>
6679                            <enumeratedValue>
6680                                <name>4mA</name>
6681                                <value>1</value>
6682                            </enumeratedValue>
6683                            <enumeratedValue>
6684                                <name>8mA</name>
6685                                <value>2</value>
6686                            </enumeratedValue>
6687                            <enumeratedValue>
6688                                <name>12mA</name>
6689                                <value>3</value>
6690                            </enumeratedValue>
6691                        </enumeratedValues>
6692                    </field>
6693                    <field>
6694                        <name>PUE</name>
6695                        <description>Pull up enable</description>
6696                        <bitRange>[3:3]</bitRange>
6697                        <access>read-write</access>
6698                    </field>
6699                    <field>
6700                        <name>PDE</name>
6701                        <description>Pull down enable</description>
6702                        <bitRange>[2:2]</bitRange>
6703                        <access>read-write</access>
6704                    </field>
6705                    <field>
6706                        <name>SCHMITT</name>
6707                        <description>Enable schmitt trigger</description>
6708                        <bitRange>[1:1]</bitRange>
6709                        <access>read-write</access>
6710                    </field>
6711                    <field>
6712                        <name>SLEWFAST</name>
6713                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6714                        <bitRange>[0:0]</bitRange>
6715                        <access>read-write</access>
6716                    </field>
6717                </fields>
6718            </register>
6719            <register>
6720                <name>GPIO38</name>
6721                <addressOffset>0x0000009c</addressOffset>
6722                <resetValue>0x00000116</resetValue>
6723                <fields>
6724                    <field>
6725                        <name>ISO</name>
6726                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6727                        <bitRange>[8:8]</bitRange>
6728                        <access>read-write</access>
6729                    </field>
6730                    <field>
6731                        <name>OD</name>
6732                        <description>Output disable. Has priority over output enable from peripherals</description>
6733                        <bitRange>[7:7]</bitRange>
6734                        <access>read-write</access>
6735                    </field>
6736                    <field>
6737                        <name>IE</name>
6738                        <description>Input enable</description>
6739                        <bitRange>[6:6]</bitRange>
6740                        <access>read-write</access>
6741                    </field>
6742                    <field>
6743                        <name>DRIVE</name>
6744                        <description>Drive strength.</description>
6745                        <bitRange>[5:4]</bitRange>
6746                        <access>read-write</access>
6747                        <enumeratedValues>
6748                            <enumeratedValue>
6749                                <name>2mA</name>
6750                                <value>0</value>
6751                            </enumeratedValue>
6752                            <enumeratedValue>
6753                                <name>4mA</name>
6754                                <value>1</value>
6755                            </enumeratedValue>
6756                            <enumeratedValue>
6757                                <name>8mA</name>
6758                                <value>2</value>
6759                            </enumeratedValue>
6760                            <enumeratedValue>
6761                                <name>12mA</name>
6762                                <value>3</value>
6763                            </enumeratedValue>
6764                        </enumeratedValues>
6765                    </field>
6766                    <field>
6767                        <name>PUE</name>
6768                        <description>Pull up enable</description>
6769                        <bitRange>[3:3]</bitRange>
6770                        <access>read-write</access>
6771                    </field>
6772                    <field>
6773                        <name>PDE</name>
6774                        <description>Pull down enable</description>
6775                        <bitRange>[2:2]</bitRange>
6776                        <access>read-write</access>
6777                    </field>
6778                    <field>
6779                        <name>SCHMITT</name>
6780                        <description>Enable schmitt trigger</description>
6781                        <bitRange>[1:1]</bitRange>
6782                        <access>read-write</access>
6783                    </field>
6784                    <field>
6785                        <name>SLEWFAST</name>
6786                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6787                        <bitRange>[0:0]</bitRange>
6788                        <access>read-write</access>
6789                    </field>
6790                </fields>
6791            </register>
6792            <register>
6793                <name>GPIO39</name>
6794                <addressOffset>0x000000a0</addressOffset>
6795                <resetValue>0x00000116</resetValue>
6796                <fields>
6797                    <field>
6798                        <name>ISO</name>
6799                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6800                        <bitRange>[8:8]</bitRange>
6801                        <access>read-write</access>
6802                    </field>
6803                    <field>
6804                        <name>OD</name>
6805                        <description>Output disable. Has priority over output enable from peripherals</description>
6806                        <bitRange>[7:7]</bitRange>
6807                        <access>read-write</access>
6808                    </field>
6809                    <field>
6810                        <name>IE</name>
6811                        <description>Input enable</description>
6812                        <bitRange>[6:6]</bitRange>
6813                        <access>read-write</access>
6814                    </field>
6815                    <field>
6816                        <name>DRIVE</name>
6817                        <description>Drive strength.</description>
6818                        <bitRange>[5:4]</bitRange>
6819                        <access>read-write</access>
6820                        <enumeratedValues>
6821                            <enumeratedValue>
6822                                <name>2mA</name>
6823                                <value>0</value>
6824                            </enumeratedValue>
6825                            <enumeratedValue>
6826                                <name>4mA</name>
6827                                <value>1</value>
6828                            </enumeratedValue>
6829                            <enumeratedValue>
6830                                <name>8mA</name>
6831                                <value>2</value>
6832                            </enumeratedValue>
6833                            <enumeratedValue>
6834                                <name>12mA</name>
6835                                <value>3</value>
6836                            </enumeratedValue>
6837                        </enumeratedValues>
6838                    </field>
6839                    <field>
6840                        <name>PUE</name>
6841                        <description>Pull up enable</description>
6842                        <bitRange>[3:3]</bitRange>
6843                        <access>read-write</access>
6844                    </field>
6845                    <field>
6846                        <name>PDE</name>
6847                        <description>Pull down enable</description>
6848                        <bitRange>[2:2]</bitRange>
6849                        <access>read-write</access>
6850                    </field>
6851                    <field>
6852                        <name>SCHMITT</name>
6853                        <description>Enable schmitt trigger</description>
6854                        <bitRange>[1:1]</bitRange>
6855                        <access>read-write</access>
6856                    </field>
6857                    <field>
6858                        <name>SLEWFAST</name>
6859                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6860                        <bitRange>[0:0]</bitRange>
6861                        <access>read-write</access>
6862                    </field>
6863                </fields>
6864            </register>
6865            <register>
6866                <name>GPIO40</name>
6867                <addressOffset>0x000000a4</addressOffset>
6868                <resetValue>0x00000116</resetValue>
6869                <fields>
6870                    <field>
6871                        <name>ISO</name>
6872                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6873                        <bitRange>[8:8]</bitRange>
6874                        <access>read-write</access>
6875                    </field>
6876                    <field>
6877                        <name>OD</name>
6878                        <description>Output disable. Has priority over output enable from peripherals</description>
6879                        <bitRange>[7:7]</bitRange>
6880                        <access>read-write</access>
6881                    </field>
6882                    <field>
6883                        <name>IE</name>
6884                        <description>Input enable</description>
6885                        <bitRange>[6:6]</bitRange>
6886                        <access>read-write</access>
6887                    </field>
6888                    <field>
6889                        <name>DRIVE</name>
6890                        <description>Drive strength.</description>
6891                        <bitRange>[5:4]</bitRange>
6892                        <access>read-write</access>
6893                        <enumeratedValues>
6894                            <enumeratedValue>
6895                                <name>2mA</name>
6896                                <value>0</value>
6897                            </enumeratedValue>
6898                            <enumeratedValue>
6899                                <name>4mA</name>
6900                                <value>1</value>
6901                            </enumeratedValue>
6902                            <enumeratedValue>
6903                                <name>8mA</name>
6904                                <value>2</value>
6905                            </enumeratedValue>
6906                            <enumeratedValue>
6907                                <name>12mA</name>
6908                                <value>3</value>
6909                            </enumeratedValue>
6910                        </enumeratedValues>
6911                    </field>
6912                    <field>
6913                        <name>PUE</name>
6914                        <description>Pull up enable</description>
6915                        <bitRange>[3:3]</bitRange>
6916                        <access>read-write</access>
6917                    </field>
6918                    <field>
6919                        <name>PDE</name>
6920                        <description>Pull down enable</description>
6921                        <bitRange>[2:2]</bitRange>
6922                        <access>read-write</access>
6923                    </field>
6924                    <field>
6925                        <name>SCHMITT</name>
6926                        <description>Enable schmitt trigger</description>
6927                        <bitRange>[1:1]</bitRange>
6928                        <access>read-write</access>
6929                    </field>
6930                    <field>
6931                        <name>SLEWFAST</name>
6932                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
6933                        <bitRange>[0:0]</bitRange>
6934                        <access>read-write</access>
6935                    </field>
6936                </fields>
6937            </register>
6938            <register>
6939                <name>GPIO41</name>
6940                <addressOffset>0x000000a8</addressOffset>
6941                <resetValue>0x00000116</resetValue>
6942                <fields>
6943                    <field>
6944                        <name>ISO</name>
6945                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
6946                        <bitRange>[8:8]</bitRange>
6947                        <access>read-write</access>
6948                    </field>
6949                    <field>
6950                        <name>OD</name>
6951                        <description>Output disable. Has priority over output enable from peripherals</description>
6952                        <bitRange>[7:7]</bitRange>
6953                        <access>read-write</access>
6954                    </field>
6955                    <field>
6956                        <name>IE</name>
6957                        <description>Input enable</description>
6958                        <bitRange>[6:6]</bitRange>
6959                        <access>read-write</access>
6960                    </field>
6961                    <field>
6962                        <name>DRIVE</name>
6963                        <description>Drive strength.</description>
6964                        <bitRange>[5:4]</bitRange>
6965                        <access>read-write</access>
6966                        <enumeratedValues>
6967                            <enumeratedValue>
6968                                <name>2mA</name>
6969                                <value>0</value>
6970                            </enumeratedValue>
6971                            <enumeratedValue>
6972                                <name>4mA</name>
6973                                <value>1</value>
6974                            </enumeratedValue>
6975                            <enumeratedValue>
6976                                <name>8mA</name>
6977                                <value>2</value>
6978                            </enumeratedValue>
6979                            <enumeratedValue>
6980                                <name>12mA</name>
6981                                <value>3</value>
6982                            </enumeratedValue>
6983                        </enumeratedValues>
6984                    </field>
6985                    <field>
6986                        <name>PUE</name>
6987                        <description>Pull up enable</description>
6988                        <bitRange>[3:3]</bitRange>
6989                        <access>read-write</access>
6990                    </field>
6991                    <field>
6992                        <name>PDE</name>
6993                        <description>Pull down enable</description>
6994                        <bitRange>[2:2]</bitRange>
6995                        <access>read-write</access>
6996                    </field>
6997                    <field>
6998                        <name>SCHMITT</name>
6999                        <description>Enable schmitt trigger</description>
7000                        <bitRange>[1:1]</bitRange>
7001                        <access>read-write</access>
7002                    </field>
7003                    <field>
7004                        <name>SLEWFAST</name>
7005                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7006                        <bitRange>[0:0]</bitRange>
7007                        <access>read-write</access>
7008                    </field>
7009                </fields>
7010            </register>
7011            <register>
7012                <name>GPIO42</name>
7013                <addressOffset>0x000000ac</addressOffset>
7014                <resetValue>0x00000116</resetValue>
7015                <fields>
7016                    <field>
7017                        <name>ISO</name>
7018                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7019                        <bitRange>[8:8]</bitRange>
7020                        <access>read-write</access>
7021                    </field>
7022                    <field>
7023                        <name>OD</name>
7024                        <description>Output disable. Has priority over output enable from peripherals</description>
7025                        <bitRange>[7:7]</bitRange>
7026                        <access>read-write</access>
7027                    </field>
7028                    <field>
7029                        <name>IE</name>
7030                        <description>Input enable</description>
7031                        <bitRange>[6:6]</bitRange>
7032                        <access>read-write</access>
7033                    </field>
7034                    <field>
7035                        <name>DRIVE</name>
7036                        <description>Drive strength.</description>
7037                        <bitRange>[5:4]</bitRange>
7038                        <access>read-write</access>
7039                        <enumeratedValues>
7040                            <enumeratedValue>
7041                                <name>2mA</name>
7042                                <value>0</value>
7043                            </enumeratedValue>
7044                            <enumeratedValue>
7045                                <name>4mA</name>
7046                                <value>1</value>
7047                            </enumeratedValue>
7048                            <enumeratedValue>
7049                                <name>8mA</name>
7050                                <value>2</value>
7051                            </enumeratedValue>
7052                            <enumeratedValue>
7053                                <name>12mA</name>
7054                                <value>3</value>
7055                            </enumeratedValue>
7056                        </enumeratedValues>
7057                    </field>
7058                    <field>
7059                        <name>PUE</name>
7060                        <description>Pull up enable</description>
7061                        <bitRange>[3:3]</bitRange>
7062                        <access>read-write</access>
7063                    </field>
7064                    <field>
7065                        <name>PDE</name>
7066                        <description>Pull down enable</description>
7067                        <bitRange>[2:2]</bitRange>
7068                        <access>read-write</access>
7069                    </field>
7070                    <field>
7071                        <name>SCHMITT</name>
7072                        <description>Enable schmitt trigger</description>
7073                        <bitRange>[1:1]</bitRange>
7074                        <access>read-write</access>
7075                    </field>
7076                    <field>
7077                        <name>SLEWFAST</name>
7078                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7079                        <bitRange>[0:0]</bitRange>
7080                        <access>read-write</access>
7081                    </field>
7082                </fields>
7083            </register>
7084            <register>
7085                <name>GPIO43</name>
7086                <addressOffset>0x000000b0</addressOffset>
7087                <resetValue>0x00000116</resetValue>
7088                <fields>
7089                    <field>
7090                        <name>ISO</name>
7091                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7092                        <bitRange>[8:8]</bitRange>
7093                        <access>read-write</access>
7094                    </field>
7095                    <field>
7096                        <name>OD</name>
7097                        <description>Output disable. Has priority over output enable from peripherals</description>
7098                        <bitRange>[7:7]</bitRange>
7099                        <access>read-write</access>
7100                    </field>
7101                    <field>
7102                        <name>IE</name>
7103                        <description>Input enable</description>
7104                        <bitRange>[6:6]</bitRange>
7105                        <access>read-write</access>
7106                    </field>
7107                    <field>
7108                        <name>DRIVE</name>
7109                        <description>Drive strength.</description>
7110                        <bitRange>[5:4]</bitRange>
7111                        <access>read-write</access>
7112                        <enumeratedValues>
7113                            <enumeratedValue>
7114                                <name>2mA</name>
7115                                <value>0</value>
7116                            </enumeratedValue>
7117                            <enumeratedValue>
7118                                <name>4mA</name>
7119                                <value>1</value>
7120                            </enumeratedValue>
7121                            <enumeratedValue>
7122                                <name>8mA</name>
7123                                <value>2</value>
7124                            </enumeratedValue>
7125                            <enumeratedValue>
7126                                <name>12mA</name>
7127                                <value>3</value>
7128                            </enumeratedValue>
7129                        </enumeratedValues>
7130                    </field>
7131                    <field>
7132                        <name>PUE</name>
7133                        <description>Pull up enable</description>
7134                        <bitRange>[3:3]</bitRange>
7135                        <access>read-write</access>
7136                    </field>
7137                    <field>
7138                        <name>PDE</name>
7139                        <description>Pull down enable</description>
7140                        <bitRange>[2:2]</bitRange>
7141                        <access>read-write</access>
7142                    </field>
7143                    <field>
7144                        <name>SCHMITT</name>
7145                        <description>Enable schmitt trigger</description>
7146                        <bitRange>[1:1]</bitRange>
7147                        <access>read-write</access>
7148                    </field>
7149                    <field>
7150                        <name>SLEWFAST</name>
7151                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7152                        <bitRange>[0:0]</bitRange>
7153                        <access>read-write</access>
7154                    </field>
7155                </fields>
7156            </register>
7157            <register>
7158                <name>GPIO44</name>
7159                <addressOffset>0x000000b4</addressOffset>
7160                <resetValue>0x00000116</resetValue>
7161                <fields>
7162                    <field>
7163                        <name>ISO</name>
7164                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7165                        <bitRange>[8:8]</bitRange>
7166                        <access>read-write</access>
7167                    </field>
7168                    <field>
7169                        <name>OD</name>
7170                        <description>Output disable. Has priority over output enable from peripherals</description>
7171                        <bitRange>[7:7]</bitRange>
7172                        <access>read-write</access>
7173                    </field>
7174                    <field>
7175                        <name>IE</name>
7176                        <description>Input enable</description>
7177                        <bitRange>[6:6]</bitRange>
7178                        <access>read-write</access>
7179                    </field>
7180                    <field>
7181                        <name>DRIVE</name>
7182                        <description>Drive strength.</description>
7183                        <bitRange>[5:4]</bitRange>
7184                        <access>read-write</access>
7185                        <enumeratedValues>
7186                            <enumeratedValue>
7187                                <name>2mA</name>
7188                                <value>0</value>
7189                            </enumeratedValue>
7190                            <enumeratedValue>
7191                                <name>4mA</name>
7192                                <value>1</value>
7193                            </enumeratedValue>
7194                            <enumeratedValue>
7195                                <name>8mA</name>
7196                                <value>2</value>
7197                            </enumeratedValue>
7198                            <enumeratedValue>
7199                                <name>12mA</name>
7200                                <value>3</value>
7201                            </enumeratedValue>
7202                        </enumeratedValues>
7203                    </field>
7204                    <field>
7205                        <name>PUE</name>
7206                        <description>Pull up enable</description>
7207                        <bitRange>[3:3]</bitRange>
7208                        <access>read-write</access>
7209                    </field>
7210                    <field>
7211                        <name>PDE</name>
7212                        <description>Pull down enable</description>
7213                        <bitRange>[2:2]</bitRange>
7214                        <access>read-write</access>
7215                    </field>
7216                    <field>
7217                        <name>SCHMITT</name>
7218                        <description>Enable schmitt trigger</description>
7219                        <bitRange>[1:1]</bitRange>
7220                        <access>read-write</access>
7221                    </field>
7222                    <field>
7223                        <name>SLEWFAST</name>
7224                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7225                        <bitRange>[0:0]</bitRange>
7226                        <access>read-write</access>
7227                    </field>
7228                </fields>
7229            </register>
7230            <register>
7231                <name>GPIO45</name>
7232                <addressOffset>0x000000b8</addressOffset>
7233                <resetValue>0x00000116</resetValue>
7234                <fields>
7235                    <field>
7236                        <name>ISO</name>
7237                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7238                        <bitRange>[8:8]</bitRange>
7239                        <access>read-write</access>
7240                    </field>
7241                    <field>
7242                        <name>OD</name>
7243                        <description>Output disable. Has priority over output enable from peripherals</description>
7244                        <bitRange>[7:7]</bitRange>
7245                        <access>read-write</access>
7246                    </field>
7247                    <field>
7248                        <name>IE</name>
7249                        <description>Input enable</description>
7250                        <bitRange>[6:6]</bitRange>
7251                        <access>read-write</access>
7252                    </field>
7253                    <field>
7254                        <name>DRIVE</name>
7255                        <description>Drive strength.</description>
7256                        <bitRange>[5:4]</bitRange>
7257                        <access>read-write</access>
7258                        <enumeratedValues>
7259                            <enumeratedValue>
7260                                <name>2mA</name>
7261                                <value>0</value>
7262                            </enumeratedValue>
7263                            <enumeratedValue>
7264                                <name>4mA</name>
7265                                <value>1</value>
7266                            </enumeratedValue>
7267                            <enumeratedValue>
7268                                <name>8mA</name>
7269                                <value>2</value>
7270                            </enumeratedValue>
7271                            <enumeratedValue>
7272                                <name>12mA</name>
7273                                <value>3</value>
7274                            </enumeratedValue>
7275                        </enumeratedValues>
7276                    </field>
7277                    <field>
7278                        <name>PUE</name>
7279                        <description>Pull up enable</description>
7280                        <bitRange>[3:3]</bitRange>
7281                        <access>read-write</access>
7282                    </field>
7283                    <field>
7284                        <name>PDE</name>
7285                        <description>Pull down enable</description>
7286                        <bitRange>[2:2]</bitRange>
7287                        <access>read-write</access>
7288                    </field>
7289                    <field>
7290                        <name>SCHMITT</name>
7291                        <description>Enable schmitt trigger</description>
7292                        <bitRange>[1:1]</bitRange>
7293                        <access>read-write</access>
7294                    </field>
7295                    <field>
7296                        <name>SLEWFAST</name>
7297                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7298                        <bitRange>[0:0]</bitRange>
7299                        <access>read-write</access>
7300                    </field>
7301                </fields>
7302            </register>
7303            <register>
7304                <name>GPIO46</name>
7305                <addressOffset>0x000000bc</addressOffset>
7306                <resetValue>0x00000116</resetValue>
7307                <fields>
7308                    <field>
7309                        <name>ISO</name>
7310                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7311                        <bitRange>[8:8]</bitRange>
7312                        <access>read-write</access>
7313                    </field>
7314                    <field>
7315                        <name>OD</name>
7316                        <description>Output disable. Has priority over output enable from peripherals</description>
7317                        <bitRange>[7:7]</bitRange>
7318                        <access>read-write</access>
7319                    </field>
7320                    <field>
7321                        <name>IE</name>
7322                        <description>Input enable</description>
7323                        <bitRange>[6:6]</bitRange>
7324                        <access>read-write</access>
7325                    </field>
7326                    <field>
7327                        <name>DRIVE</name>
7328                        <description>Drive strength.</description>
7329                        <bitRange>[5:4]</bitRange>
7330                        <access>read-write</access>
7331                        <enumeratedValues>
7332                            <enumeratedValue>
7333                                <name>2mA</name>
7334                                <value>0</value>
7335                            </enumeratedValue>
7336                            <enumeratedValue>
7337                                <name>4mA</name>
7338                                <value>1</value>
7339                            </enumeratedValue>
7340                            <enumeratedValue>
7341                                <name>8mA</name>
7342                                <value>2</value>
7343                            </enumeratedValue>
7344                            <enumeratedValue>
7345                                <name>12mA</name>
7346                                <value>3</value>
7347                            </enumeratedValue>
7348                        </enumeratedValues>
7349                    </field>
7350                    <field>
7351                        <name>PUE</name>
7352                        <description>Pull up enable</description>
7353                        <bitRange>[3:3]</bitRange>
7354                        <access>read-write</access>
7355                    </field>
7356                    <field>
7357                        <name>PDE</name>
7358                        <description>Pull down enable</description>
7359                        <bitRange>[2:2]</bitRange>
7360                        <access>read-write</access>
7361                    </field>
7362                    <field>
7363                        <name>SCHMITT</name>
7364                        <description>Enable schmitt trigger</description>
7365                        <bitRange>[1:1]</bitRange>
7366                        <access>read-write</access>
7367                    </field>
7368                    <field>
7369                        <name>SLEWFAST</name>
7370                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7371                        <bitRange>[0:0]</bitRange>
7372                        <access>read-write</access>
7373                    </field>
7374                </fields>
7375            </register>
7376            <register>
7377                <name>GPIO47</name>
7378                <addressOffset>0x000000c0</addressOffset>
7379                <resetValue>0x00000116</resetValue>
7380                <fields>
7381                    <field>
7382                        <name>ISO</name>
7383                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7384                        <bitRange>[8:8]</bitRange>
7385                        <access>read-write</access>
7386                    </field>
7387                    <field>
7388                        <name>OD</name>
7389                        <description>Output disable. Has priority over output enable from peripherals</description>
7390                        <bitRange>[7:7]</bitRange>
7391                        <access>read-write</access>
7392                    </field>
7393                    <field>
7394                        <name>IE</name>
7395                        <description>Input enable</description>
7396                        <bitRange>[6:6]</bitRange>
7397                        <access>read-write</access>
7398                    </field>
7399                    <field>
7400                        <name>DRIVE</name>
7401                        <description>Drive strength.</description>
7402                        <bitRange>[5:4]</bitRange>
7403                        <access>read-write</access>
7404                        <enumeratedValues>
7405                            <enumeratedValue>
7406                                <name>2mA</name>
7407                                <value>0</value>
7408                            </enumeratedValue>
7409                            <enumeratedValue>
7410                                <name>4mA</name>
7411                                <value>1</value>
7412                            </enumeratedValue>
7413                            <enumeratedValue>
7414                                <name>8mA</name>
7415                                <value>2</value>
7416                            </enumeratedValue>
7417                            <enumeratedValue>
7418                                <name>12mA</name>
7419                                <value>3</value>
7420                            </enumeratedValue>
7421                        </enumeratedValues>
7422                    </field>
7423                    <field>
7424                        <name>PUE</name>
7425                        <description>Pull up enable</description>
7426                        <bitRange>[3:3]</bitRange>
7427                        <access>read-write</access>
7428                    </field>
7429                    <field>
7430                        <name>PDE</name>
7431                        <description>Pull down enable</description>
7432                        <bitRange>[2:2]</bitRange>
7433                        <access>read-write</access>
7434                    </field>
7435                    <field>
7436                        <name>SCHMITT</name>
7437                        <description>Enable schmitt trigger</description>
7438                        <bitRange>[1:1]</bitRange>
7439                        <access>read-write</access>
7440                    </field>
7441                    <field>
7442                        <name>SLEWFAST</name>
7443                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7444                        <bitRange>[0:0]</bitRange>
7445                        <access>read-write</access>
7446                    </field>
7447                </fields>
7448            </register>
7449            <register>
7450                <name>SWCLK</name>
7451                <addressOffset>0x000000c4</addressOffset>
7452                <resetValue>0x0000005a</resetValue>
7453                <fields>
7454                    <field>
7455                        <name>ISO</name>
7456                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7457                        <bitRange>[8:8]</bitRange>
7458                        <access>read-write</access>
7459                    </field>
7460                    <field>
7461                        <name>OD</name>
7462                        <description>Output disable. Has priority over output enable from peripherals</description>
7463                        <bitRange>[7:7]</bitRange>
7464                        <access>read-write</access>
7465                    </field>
7466                    <field>
7467                        <name>IE</name>
7468                        <description>Input enable</description>
7469                        <bitRange>[6:6]</bitRange>
7470                        <access>read-write</access>
7471                    </field>
7472                    <field>
7473                        <name>DRIVE</name>
7474                        <description>Drive strength.</description>
7475                        <bitRange>[5:4]</bitRange>
7476                        <access>read-write</access>
7477                        <enumeratedValues>
7478                            <enumeratedValue>
7479                                <name>2mA</name>
7480                                <value>0</value>
7481                            </enumeratedValue>
7482                            <enumeratedValue>
7483                                <name>4mA</name>
7484                                <value>1</value>
7485                            </enumeratedValue>
7486                            <enumeratedValue>
7487                                <name>8mA</name>
7488                                <value>2</value>
7489                            </enumeratedValue>
7490                            <enumeratedValue>
7491                                <name>12mA</name>
7492                                <value>3</value>
7493                            </enumeratedValue>
7494                        </enumeratedValues>
7495                    </field>
7496                    <field>
7497                        <name>PUE</name>
7498                        <description>Pull up enable</description>
7499                        <bitRange>[3:3]</bitRange>
7500                        <access>read-write</access>
7501                    </field>
7502                    <field>
7503                        <name>PDE</name>
7504                        <description>Pull down enable</description>
7505                        <bitRange>[2:2]</bitRange>
7506                        <access>read-write</access>
7507                    </field>
7508                    <field>
7509                        <name>SCHMITT</name>
7510                        <description>Enable schmitt trigger</description>
7511                        <bitRange>[1:1]</bitRange>
7512                        <access>read-write</access>
7513                    </field>
7514                    <field>
7515                        <name>SLEWFAST</name>
7516                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7517                        <bitRange>[0:0]</bitRange>
7518                        <access>read-write</access>
7519                    </field>
7520                </fields>
7521            </register>
7522            <register>
7523                <name>SWD</name>
7524                <addressOffset>0x000000c8</addressOffset>
7525                <resetValue>0x0000005a</resetValue>
7526                <fields>
7527                    <field>
7528                        <name>ISO</name>
7529                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7530                        <bitRange>[8:8]</bitRange>
7531                        <access>read-write</access>
7532                    </field>
7533                    <field>
7534                        <name>OD</name>
7535                        <description>Output disable. Has priority over output enable from peripherals</description>
7536                        <bitRange>[7:7]</bitRange>
7537                        <access>read-write</access>
7538                    </field>
7539                    <field>
7540                        <name>IE</name>
7541                        <description>Input enable</description>
7542                        <bitRange>[6:6]</bitRange>
7543                        <access>read-write</access>
7544                    </field>
7545                    <field>
7546                        <name>DRIVE</name>
7547                        <description>Drive strength.</description>
7548                        <bitRange>[5:4]</bitRange>
7549                        <access>read-write</access>
7550                        <enumeratedValues>
7551                            <enumeratedValue>
7552                                <name>2mA</name>
7553                                <value>0</value>
7554                            </enumeratedValue>
7555                            <enumeratedValue>
7556                                <name>4mA</name>
7557                                <value>1</value>
7558                            </enumeratedValue>
7559                            <enumeratedValue>
7560                                <name>8mA</name>
7561                                <value>2</value>
7562                            </enumeratedValue>
7563                            <enumeratedValue>
7564                                <name>12mA</name>
7565                                <value>3</value>
7566                            </enumeratedValue>
7567                        </enumeratedValues>
7568                    </field>
7569                    <field>
7570                        <name>PUE</name>
7571                        <description>Pull up enable</description>
7572                        <bitRange>[3:3]</bitRange>
7573                        <access>read-write</access>
7574                    </field>
7575                    <field>
7576                        <name>PDE</name>
7577                        <description>Pull down enable</description>
7578                        <bitRange>[2:2]</bitRange>
7579                        <access>read-write</access>
7580                    </field>
7581                    <field>
7582                        <name>SCHMITT</name>
7583                        <description>Enable schmitt trigger</description>
7584                        <bitRange>[1:1]</bitRange>
7585                        <access>read-write</access>
7586                    </field>
7587                    <field>
7588                        <name>SLEWFAST</name>
7589                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7590                        <bitRange>[0:0]</bitRange>
7591                        <access>read-write</access>
7592                    </field>
7593                </fields>
7594            </register>
7595        </registers>
7596    </peripheral>
7597    <peripheral>
7598        <name>PADS_QSPI</name>
7599        <baseAddress>0x40040000</baseAddress>
7600        <addressBlock>
7601            <offset>0</offset>
7602            <size>28</size>
7603            <usage>registers</usage>
7604        </addressBlock>
7605        <registers>
7606            <register>
7607                <name>VOLTAGE_SELECT</name>
7608                <addressOffset>0x00000000</addressOffset>
7609                <description>Voltage select. Per bank control</description>
7610                <resetValue>0x00000000</resetValue>
7611                <fields>
7612                    <field>
7613                        <name>VOLTAGE_SELECT</name>
7614                        <bitRange>[0:0]</bitRange>
7615                        <access>read-write</access>
7616                        <enumeratedValues>
7617                            <enumeratedValue>
7618                                <name>3v3</name>
7619                                <value>0</value>
7620                                <description>Set voltage to 3.3V (DVDD &gt;= 2V5)</description>
7621                            </enumeratedValue>
7622                            <enumeratedValue>
7623                                <name>1v8</name>
7624                                <value>1</value>
7625                                <description>Set voltage to 1.8V (DVDD &lt;= 1V8)</description>
7626                            </enumeratedValue>
7627                        </enumeratedValues>
7628                    </field>
7629                </fields>
7630            </register>
7631            <register>
7632                <name>GPIO_QSPI_SCLK</name>
7633                <addressOffset>0x00000004</addressOffset>
7634                <resetValue>0x00000156</resetValue>
7635                <fields>
7636                    <field>
7637                        <name>ISO</name>
7638                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7639                        <bitRange>[8:8]</bitRange>
7640                        <access>read-write</access>
7641                    </field>
7642                    <field>
7643                        <name>OD</name>
7644                        <description>Output disable. Has priority over output enable from peripherals</description>
7645                        <bitRange>[7:7]</bitRange>
7646                        <access>read-write</access>
7647                    </field>
7648                    <field>
7649                        <name>IE</name>
7650                        <description>Input enable</description>
7651                        <bitRange>[6:6]</bitRange>
7652                        <access>read-write</access>
7653                    </field>
7654                    <field>
7655                        <name>DRIVE</name>
7656                        <description>Drive strength.</description>
7657                        <bitRange>[5:4]</bitRange>
7658                        <access>read-write</access>
7659                        <enumeratedValues>
7660                            <enumeratedValue>
7661                                <name>2mA</name>
7662                                <value>0</value>
7663                            </enumeratedValue>
7664                            <enumeratedValue>
7665                                <name>4mA</name>
7666                                <value>1</value>
7667                            </enumeratedValue>
7668                            <enumeratedValue>
7669                                <name>8mA</name>
7670                                <value>2</value>
7671                            </enumeratedValue>
7672                            <enumeratedValue>
7673                                <name>12mA</name>
7674                                <value>3</value>
7675                            </enumeratedValue>
7676                        </enumeratedValues>
7677                    </field>
7678                    <field>
7679                        <name>PUE</name>
7680                        <description>Pull up enable</description>
7681                        <bitRange>[3:3]</bitRange>
7682                        <access>read-write</access>
7683                    </field>
7684                    <field>
7685                        <name>PDE</name>
7686                        <description>Pull down enable</description>
7687                        <bitRange>[2:2]</bitRange>
7688                        <access>read-write</access>
7689                    </field>
7690                    <field>
7691                        <name>SCHMITT</name>
7692                        <description>Enable schmitt trigger</description>
7693                        <bitRange>[1:1]</bitRange>
7694                        <access>read-write</access>
7695                    </field>
7696                    <field>
7697                        <name>SLEWFAST</name>
7698                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7699                        <bitRange>[0:0]</bitRange>
7700                        <access>read-write</access>
7701                    </field>
7702                </fields>
7703            </register>
7704            <register>
7705                <name>GPIO_QSPI_SD0</name>
7706                <addressOffset>0x00000008</addressOffset>
7707                <resetValue>0x00000156</resetValue>
7708                <fields>
7709                    <field>
7710                        <name>ISO</name>
7711                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7712                        <bitRange>[8:8]</bitRange>
7713                        <access>read-write</access>
7714                    </field>
7715                    <field>
7716                        <name>OD</name>
7717                        <description>Output disable. Has priority over output enable from peripherals</description>
7718                        <bitRange>[7:7]</bitRange>
7719                        <access>read-write</access>
7720                    </field>
7721                    <field>
7722                        <name>IE</name>
7723                        <description>Input enable</description>
7724                        <bitRange>[6:6]</bitRange>
7725                        <access>read-write</access>
7726                    </field>
7727                    <field>
7728                        <name>DRIVE</name>
7729                        <description>Drive strength.</description>
7730                        <bitRange>[5:4]</bitRange>
7731                        <access>read-write</access>
7732                        <enumeratedValues>
7733                            <enumeratedValue>
7734                                <name>2mA</name>
7735                                <value>0</value>
7736                            </enumeratedValue>
7737                            <enumeratedValue>
7738                                <name>4mA</name>
7739                                <value>1</value>
7740                            </enumeratedValue>
7741                            <enumeratedValue>
7742                                <name>8mA</name>
7743                                <value>2</value>
7744                            </enumeratedValue>
7745                            <enumeratedValue>
7746                                <name>12mA</name>
7747                                <value>3</value>
7748                            </enumeratedValue>
7749                        </enumeratedValues>
7750                    </field>
7751                    <field>
7752                        <name>PUE</name>
7753                        <description>Pull up enable</description>
7754                        <bitRange>[3:3]</bitRange>
7755                        <access>read-write</access>
7756                    </field>
7757                    <field>
7758                        <name>PDE</name>
7759                        <description>Pull down enable</description>
7760                        <bitRange>[2:2]</bitRange>
7761                        <access>read-write</access>
7762                    </field>
7763                    <field>
7764                        <name>SCHMITT</name>
7765                        <description>Enable schmitt trigger</description>
7766                        <bitRange>[1:1]</bitRange>
7767                        <access>read-write</access>
7768                    </field>
7769                    <field>
7770                        <name>SLEWFAST</name>
7771                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7772                        <bitRange>[0:0]</bitRange>
7773                        <access>read-write</access>
7774                    </field>
7775                </fields>
7776            </register>
7777            <register>
7778                <name>GPIO_QSPI_SD1</name>
7779                <addressOffset>0x0000000c</addressOffset>
7780                <resetValue>0x00000156</resetValue>
7781                <fields>
7782                    <field>
7783                        <name>ISO</name>
7784                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7785                        <bitRange>[8:8]</bitRange>
7786                        <access>read-write</access>
7787                    </field>
7788                    <field>
7789                        <name>OD</name>
7790                        <description>Output disable. Has priority over output enable from peripherals</description>
7791                        <bitRange>[7:7]</bitRange>
7792                        <access>read-write</access>
7793                    </field>
7794                    <field>
7795                        <name>IE</name>
7796                        <description>Input enable</description>
7797                        <bitRange>[6:6]</bitRange>
7798                        <access>read-write</access>
7799                    </field>
7800                    <field>
7801                        <name>DRIVE</name>
7802                        <description>Drive strength.</description>
7803                        <bitRange>[5:4]</bitRange>
7804                        <access>read-write</access>
7805                        <enumeratedValues>
7806                            <enumeratedValue>
7807                                <name>2mA</name>
7808                                <value>0</value>
7809                            </enumeratedValue>
7810                            <enumeratedValue>
7811                                <name>4mA</name>
7812                                <value>1</value>
7813                            </enumeratedValue>
7814                            <enumeratedValue>
7815                                <name>8mA</name>
7816                                <value>2</value>
7817                            </enumeratedValue>
7818                            <enumeratedValue>
7819                                <name>12mA</name>
7820                                <value>3</value>
7821                            </enumeratedValue>
7822                        </enumeratedValues>
7823                    </field>
7824                    <field>
7825                        <name>PUE</name>
7826                        <description>Pull up enable</description>
7827                        <bitRange>[3:3]</bitRange>
7828                        <access>read-write</access>
7829                    </field>
7830                    <field>
7831                        <name>PDE</name>
7832                        <description>Pull down enable</description>
7833                        <bitRange>[2:2]</bitRange>
7834                        <access>read-write</access>
7835                    </field>
7836                    <field>
7837                        <name>SCHMITT</name>
7838                        <description>Enable schmitt trigger</description>
7839                        <bitRange>[1:1]</bitRange>
7840                        <access>read-write</access>
7841                    </field>
7842                    <field>
7843                        <name>SLEWFAST</name>
7844                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7845                        <bitRange>[0:0]</bitRange>
7846                        <access>read-write</access>
7847                    </field>
7848                </fields>
7849            </register>
7850            <register>
7851                <name>GPIO_QSPI_SD2</name>
7852                <addressOffset>0x00000010</addressOffset>
7853                <resetValue>0x0000015a</resetValue>
7854                <fields>
7855                    <field>
7856                        <name>ISO</name>
7857                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7858                        <bitRange>[8:8]</bitRange>
7859                        <access>read-write</access>
7860                    </field>
7861                    <field>
7862                        <name>OD</name>
7863                        <description>Output disable. Has priority over output enable from peripherals</description>
7864                        <bitRange>[7:7]</bitRange>
7865                        <access>read-write</access>
7866                    </field>
7867                    <field>
7868                        <name>IE</name>
7869                        <description>Input enable</description>
7870                        <bitRange>[6:6]</bitRange>
7871                        <access>read-write</access>
7872                    </field>
7873                    <field>
7874                        <name>DRIVE</name>
7875                        <description>Drive strength.</description>
7876                        <bitRange>[5:4]</bitRange>
7877                        <access>read-write</access>
7878                        <enumeratedValues>
7879                            <enumeratedValue>
7880                                <name>2mA</name>
7881                                <value>0</value>
7882                            </enumeratedValue>
7883                            <enumeratedValue>
7884                                <name>4mA</name>
7885                                <value>1</value>
7886                            </enumeratedValue>
7887                            <enumeratedValue>
7888                                <name>8mA</name>
7889                                <value>2</value>
7890                            </enumeratedValue>
7891                            <enumeratedValue>
7892                                <name>12mA</name>
7893                                <value>3</value>
7894                            </enumeratedValue>
7895                        </enumeratedValues>
7896                    </field>
7897                    <field>
7898                        <name>PUE</name>
7899                        <description>Pull up enable</description>
7900                        <bitRange>[3:3]</bitRange>
7901                        <access>read-write</access>
7902                    </field>
7903                    <field>
7904                        <name>PDE</name>
7905                        <description>Pull down enable</description>
7906                        <bitRange>[2:2]</bitRange>
7907                        <access>read-write</access>
7908                    </field>
7909                    <field>
7910                        <name>SCHMITT</name>
7911                        <description>Enable schmitt trigger</description>
7912                        <bitRange>[1:1]</bitRange>
7913                        <access>read-write</access>
7914                    </field>
7915                    <field>
7916                        <name>SLEWFAST</name>
7917                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7918                        <bitRange>[0:0]</bitRange>
7919                        <access>read-write</access>
7920                    </field>
7921                </fields>
7922            </register>
7923            <register>
7924                <name>GPIO_QSPI_SD3</name>
7925                <addressOffset>0x00000014</addressOffset>
7926                <resetValue>0x0000015a</resetValue>
7927                <fields>
7928                    <field>
7929                        <name>ISO</name>
7930                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
7931                        <bitRange>[8:8]</bitRange>
7932                        <access>read-write</access>
7933                    </field>
7934                    <field>
7935                        <name>OD</name>
7936                        <description>Output disable. Has priority over output enable from peripherals</description>
7937                        <bitRange>[7:7]</bitRange>
7938                        <access>read-write</access>
7939                    </field>
7940                    <field>
7941                        <name>IE</name>
7942                        <description>Input enable</description>
7943                        <bitRange>[6:6]</bitRange>
7944                        <access>read-write</access>
7945                    </field>
7946                    <field>
7947                        <name>DRIVE</name>
7948                        <description>Drive strength.</description>
7949                        <bitRange>[5:4]</bitRange>
7950                        <access>read-write</access>
7951                        <enumeratedValues>
7952                            <enumeratedValue>
7953                                <name>2mA</name>
7954                                <value>0</value>
7955                            </enumeratedValue>
7956                            <enumeratedValue>
7957                                <name>4mA</name>
7958                                <value>1</value>
7959                            </enumeratedValue>
7960                            <enumeratedValue>
7961                                <name>8mA</name>
7962                                <value>2</value>
7963                            </enumeratedValue>
7964                            <enumeratedValue>
7965                                <name>12mA</name>
7966                                <value>3</value>
7967                            </enumeratedValue>
7968                        </enumeratedValues>
7969                    </field>
7970                    <field>
7971                        <name>PUE</name>
7972                        <description>Pull up enable</description>
7973                        <bitRange>[3:3]</bitRange>
7974                        <access>read-write</access>
7975                    </field>
7976                    <field>
7977                        <name>PDE</name>
7978                        <description>Pull down enable</description>
7979                        <bitRange>[2:2]</bitRange>
7980                        <access>read-write</access>
7981                    </field>
7982                    <field>
7983                        <name>SCHMITT</name>
7984                        <description>Enable schmitt trigger</description>
7985                        <bitRange>[1:1]</bitRange>
7986                        <access>read-write</access>
7987                    </field>
7988                    <field>
7989                        <name>SLEWFAST</name>
7990                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
7991                        <bitRange>[0:0]</bitRange>
7992                        <access>read-write</access>
7993                    </field>
7994                </fields>
7995            </register>
7996            <register>
7997                <name>GPIO_QSPI_SS</name>
7998                <addressOffset>0x00000018</addressOffset>
7999                <resetValue>0x0000015a</resetValue>
8000                <fields>
8001                    <field>
8002                        <name>ISO</name>
8003                        <description>Pad isolation control. Remove this once the pad is configured by software.</description>
8004                        <bitRange>[8:8]</bitRange>
8005                        <access>read-write</access>
8006                    </field>
8007                    <field>
8008                        <name>OD</name>
8009                        <description>Output disable. Has priority over output enable from peripherals</description>
8010                        <bitRange>[7:7]</bitRange>
8011                        <access>read-write</access>
8012                    </field>
8013                    <field>
8014                        <name>IE</name>
8015                        <description>Input enable</description>
8016                        <bitRange>[6:6]</bitRange>
8017                        <access>read-write</access>
8018                    </field>
8019                    <field>
8020                        <name>DRIVE</name>
8021                        <description>Drive strength.</description>
8022                        <bitRange>[5:4]</bitRange>
8023                        <access>read-write</access>
8024                        <enumeratedValues>
8025                            <enumeratedValue>
8026                                <name>2mA</name>
8027                                <value>0</value>
8028                            </enumeratedValue>
8029                            <enumeratedValue>
8030                                <name>4mA</name>
8031                                <value>1</value>
8032                            </enumeratedValue>
8033                            <enumeratedValue>
8034                                <name>8mA</name>
8035                                <value>2</value>
8036                            </enumeratedValue>
8037                            <enumeratedValue>
8038                                <name>12mA</name>
8039                                <value>3</value>
8040                            </enumeratedValue>
8041                        </enumeratedValues>
8042                    </field>
8043                    <field>
8044                        <name>PUE</name>
8045                        <description>Pull up enable</description>
8046                        <bitRange>[3:3]</bitRange>
8047                        <access>read-write</access>
8048                    </field>
8049                    <field>
8050                        <name>PDE</name>
8051                        <description>Pull down enable</description>
8052                        <bitRange>[2:2]</bitRange>
8053                        <access>read-write</access>
8054                    </field>
8055                    <field>
8056                        <name>SCHMITT</name>
8057                        <description>Enable schmitt trigger</description>
8058                        <bitRange>[1:1]</bitRange>
8059                        <access>read-write</access>
8060                    </field>
8061                    <field>
8062                        <name>SLEWFAST</name>
8063                        <description>Slew rate control. 1 = Fast, 0 = Slow</description>
8064                        <bitRange>[0:0]</bitRange>
8065                        <access>read-write</access>
8066                    </field>
8067                </fields>
8068            </register>
8069        </registers>
8070    </peripheral>
8071    <peripheral>
8072        <name>IO_QSPI</name>
8073        <baseAddress>0x40030000</baseAddress>
8074        <addressBlock>
8075            <offset>0</offset>
8076            <size>576</size>
8077            <usage>registers</usage>
8078        </addressBlock>
8079        <interrupt>
8080            <name>IO_IRQ_QSPI</name>
8081            <value>23</value>
8082        </interrupt>
8083        <interrupt>
8084            <name>IO_IRQ_QSPI_NS</name>
8085            <value>24</value>
8086        </interrupt>
8087        <registers>
8088            <register>
8089                <name>USBPHY_DP_STATUS</name>
8090                <addressOffset>0x00000000</addressOffset>
8091                <resetValue>0x00000000</resetValue>
8092                <fields>
8093                    <field>
8094                        <name>IRQTOPROC</name>
8095                        <description>interrupt to processors, after override is applied</description>
8096                        <bitRange>[26:26]</bitRange>
8097                        <access>read-only</access>
8098                    </field>
8099                    <field>
8100                        <name>INFROMPAD</name>
8101                        <description>input signal from pad, before filtering and override are applied</description>
8102                        <bitRange>[17:17]</bitRange>
8103                        <access>read-only</access>
8104                    </field>
8105                    <field>
8106                        <name>OETOPAD</name>
8107                        <description>output enable to pad after register override is applied</description>
8108                        <bitRange>[13:13]</bitRange>
8109                        <access>read-only</access>
8110                    </field>
8111                    <field>
8112                        <name>OUTTOPAD</name>
8113                        <description>output signal to pad after register override is applied</description>
8114                        <bitRange>[9:9]</bitRange>
8115                        <access>read-only</access>
8116                    </field>
8117                </fields>
8118            </register>
8119            <register>
8120                <name>USBPHY_DP_CTRL</name>
8121                <addressOffset>0x00000004</addressOffset>
8122                <resetValue>0x0000001f</resetValue>
8123                <fields>
8124                    <field>
8125                        <name>IRQOVER</name>
8126                        <bitRange>[29:28]</bitRange>
8127                        <access>read-write</access>
8128                        <enumeratedValues>
8129                            <enumeratedValue>
8130                                <name>NORMAL</name>
8131                                <value>0</value>
8132                                <description>don&#39;t invert the interrupt</description>
8133                            </enumeratedValue>
8134                            <enumeratedValue>
8135                                <name>INVERT</name>
8136                                <value>1</value>
8137                                <description>invert the interrupt</description>
8138                            </enumeratedValue>
8139                            <enumeratedValue>
8140                                <name>LOW</name>
8141                                <value>2</value>
8142                                <description>drive interrupt low</description>
8143                            </enumeratedValue>
8144                            <enumeratedValue>
8145                                <name>HIGH</name>
8146                                <value>3</value>
8147                                <description>drive interrupt high</description>
8148                            </enumeratedValue>
8149                        </enumeratedValues>
8150                    </field>
8151                    <field>
8152                        <name>INOVER</name>
8153                        <bitRange>[17:16]</bitRange>
8154                        <access>read-write</access>
8155                        <enumeratedValues>
8156                            <enumeratedValue>
8157                                <name>NORMAL</name>
8158                                <value>0</value>
8159                                <description>don&#39;t invert the peri input</description>
8160                            </enumeratedValue>
8161                            <enumeratedValue>
8162                                <name>INVERT</name>
8163                                <value>1</value>
8164                                <description>invert the peri input</description>
8165                            </enumeratedValue>
8166                            <enumeratedValue>
8167                                <name>LOW</name>
8168                                <value>2</value>
8169                                <description>drive peri input low</description>
8170                            </enumeratedValue>
8171                            <enumeratedValue>
8172                                <name>HIGH</name>
8173                                <value>3</value>
8174                                <description>drive peri input high</description>
8175                            </enumeratedValue>
8176                        </enumeratedValues>
8177                    </field>
8178                    <field>
8179                        <name>OEOVER</name>
8180                        <bitRange>[15:14]</bitRange>
8181                        <access>read-write</access>
8182                        <enumeratedValues>
8183                            <enumeratedValue>
8184                                <name>NORMAL</name>
8185                                <value>0</value>
8186                                <description>drive output enable from peripheral signal selected by funcsel</description>
8187                            </enumeratedValue>
8188                            <enumeratedValue>
8189                                <name>INVERT</name>
8190                                <value>1</value>
8191                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
8192                            </enumeratedValue>
8193                            <enumeratedValue>
8194                                <name>DISABLE</name>
8195                                <value>2</value>
8196                                <description>disable output</description>
8197                            </enumeratedValue>
8198                            <enumeratedValue>
8199                                <name>ENABLE</name>
8200                                <value>3</value>
8201                                <description>enable output</description>
8202                            </enumeratedValue>
8203                        </enumeratedValues>
8204                    </field>
8205                    <field>
8206                        <name>OUTOVER</name>
8207                        <bitRange>[13:12]</bitRange>
8208                        <access>read-write</access>
8209                        <enumeratedValues>
8210                            <enumeratedValue>
8211                                <name>NORMAL</name>
8212                                <value>0</value>
8213                                <description>drive output from peripheral signal selected by funcsel</description>
8214                            </enumeratedValue>
8215                            <enumeratedValue>
8216                                <name>INVERT</name>
8217                                <value>1</value>
8218                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
8219                            </enumeratedValue>
8220                            <enumeratedValue>
8221                                <name>LOW</name>
8222                                <value>2</value>
8223                                <description>drive output low</description>
8224                            </enumeratedValue>
8225                            <enumeratedValue>
8226                                <name>HIGH</name>
8227                                <value>3</value>
8228                                <description>drive output high</description>
8229                            </enumeratedValue>
8230                        </enumeratedValues>
8231                    </field>
8232                    <field>
8233                        <name>FUNCSEL</name>
8234                        <description>0-31 -&gt; selects pin function according to the gpio table
8235                            31 == NULL</description>
8236                        <bitRange>[4:0]</bitRange>
8237                        <access>read-write</access>
8238                        <enumeratedValues>
8239                            <enumeratedValue>
8240                                <name>uart1_tx</name>
8241                                <value>2</value>
8242                            </enumeratedValue>
8243                            <enumeratedValue>
8244                                <name>i2c0_sda</name>
8245                                <value>3</value>
8246                            </enumeratedValue>
8247                            <enumeratedValue>
8248                                <name>siob_proc_56</name>
8249                                <value>5</value>
8250                            </enumeratedValue>
8251                            <enumeratedValue>
8252                                <name>null</name>
8253                                <value>31</value>
8254                            </enumeratedValue>
8255                        </enumeratedValues>
8256                    </field>
8257                </fields>
8258            </register>
8259            <register>
8260                <name>USBPHY_DM_STATUS</name>
8261                <addressOffset>0x00000008</addressOffset>
8262                <resetValue>0x00000000</resetValue>
8263                <fields>
8264                    <field>
8265                        <name>IRQTOPROC</name>
8266                        <description>interrupt to processors, after override is applied</description>
8267                        <bitRange>[26:26]</bitRange>
8268                        <access>read-only</access>
8269                    </field>
8270                    <field>
8271                        <name>INFROMPAD</name>
8272                        <description>input signal from pad, before filtering and override are applied</description>
8273                        <bitRange>[17:17]</bitRange>
8274                        <access>read-only</access>
8275                    </field>
8276                    <field>
8277                        <name>OETOPAD</name>
8278                        <description>output enable to pad after register override is applied</description>
8279                        <bitRange>[13:13]</bitRange>
8280                        <access>read-only</access>
8281                    </field>
8282                    <field>
8283                        <name>OUTTOPAD</name>
8284                        <description>output signal to pad after register override is applied</description>
8285                        <bitRange>[9:9]</bitRange>
8286                        <access>read-only</access>
8287                    </field>
8288                </fields>
8289            </register>
8290            <register>
8291                <name>USBPHY_DM_CTRL</name>
8292                <addressOffset>0x0000000c</addressOffset>
8293                <resetValue>0x0000001f</resetValue>
8294                <fields>
8295                    <field>
8296                        <name>IRQOVER</name>
8297                        <bitRange>[29:28]</bitRange>
8298                        <access>read-write</access>
8299                        <enumeratedValues>
8300                            <enumeratedValue>
8301                                <name>NORMAL</name>
8302                                <value>0</value>
8303                                <description>don&#39;t invert the interrupt</description>
8304                            </enumeratedValue>
8305                            <enumeratedValue>
8306                                <name>INVERT</name>
8307                                <value>1</value>
8308                                <description>invert the interrupt</description>
8309                            </enumeratedValue>
8310                            <enumeratedValue>
8311                                <name>LOW</name>
8312                                <value>2</value>
8313                                <description>drive interrupt low</description>
8314                            </enumeratedValue>
8315                            <enumeratedValue>
8316                                <name>HIGH</name>
8317                                <value>3</value>
8318                                <description>drive interrupt high</description>
8319                            </enumeratedValue>
8320                        </enumeratedValues>
8321                    </field>
8322                    <field>
8323                        <name>INOVER</name>
8324                        <bitRange>[17:16]</bitRange>
8325                        <access>read-write</access>
8326                        <enumeratedValues>
8327                            <enumeratedValue>
8328                                <name>NORMAL</name>
8329                                <value>0</value>
8330                                <description>don&#39;t invert the peri input</description>
8331                            </enumeratedValue>
8332                            <enumeratedValue>
8333                                <name>INVERT</name>
8334                                <value>1</value>
8335                                <description>invert the peri input</description>
8336                            </enumeratedValue>
8337                            <enumeratedValue>
8338                                <name>LOW</name>
8339                                <value>2</value>
8340                                <description>drive peri input low</description>
8341                            </enumeratedValue>
8342                            <enumeratedValue>
8343                                <name>HIGH</name>
8344                                <value>3</value>
8345                                <description>drive peri input high</description>
8346                            </enumeratedValue>
8347                        </enumeratedValues>
8348                    </field>
8349                    <field>
8350                        <name>OEOVER</name>
8351                        <bitRange>[15:14]</bitRange>
8352                        <access>read-write</access>
8353                        <enumeratedValues>
8354                            <enumeratedValue>
8355                                <name>NORMAL</name>
8356                                <value>0</value>
8357                                <description>drive output enable from peripheral signal selected by funcsel</description>
8358                            </enumeratedValue>
8359                            <enumeratedValue>
8360                                <name>INVERT</name>
8361                                <value>1</value>
8362                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
8363                            </enumeratedValue>
8364                            <enumeratedValue>
8365                                <name>DISABLE</name>
8366                                <value>2</value>
8367                                <description>disable output</description>
8368                            </enumeratedValue>
8369                            <enumeratedValue>
8370                                <name>ENABLE</name>
8371                                <value>3</value>
8372                                <description>enable output</description>
8373                            </enumeratedValue>
8374                        </enumeratedValues>
8375                    </field>
8376                    <field>
8377                        <name>OUTOVER</name>
8378                        <bitRange>[13:12]</bitRange>
8379                        <access>read-write</access>
8380                        <enumeratedValues>
8381                            <enumeratedValue>
8382                                <name>NORMAL</name>
8383                                <value>0</value>
8384                                <description>drive output from peripheral signal selected by funcsel</description>
8385                            </enumeratedValue>
8386                            <enumeratedValue>
8387                                <name>INVERT</name>
8388                                <value>1</value>
8389                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
8390                            </enumeratedValue>
8391                            <enumeratedValue>
8392                                <name>LOW</name>
8393                                <value>2</value>
8394                                <description>drive output low</description>
8395                            </enumeratedValue>
8396                            <enumeratedValue>
8397                                <name>HIGH</name>
8398                                <value>3</value>
8399                                <description>drive output high</description>
8400                            </enumeratedValue>
8401                        </enumeratedValues>
8402                    </field>
8403                    <field>
8404                        <name>FUNCSEL</name>
8405                        <description>0-31 -&gt; selects pin function according to the gpio table
8406                            31 == NULL</description>
8407                        <bitRange>[4:0]</bitRange>
8408                        <access>read-write</access>
8409                        <enumeratedValues>
8410                            <enumeratedValue>
8411                                <name>uart1_rx</name>
8412                                <value>2</value>
8413                            </enumeratedValue>
8414                            <enumeratedValue>
8415                                <name>i2c0_scl</name>
8416                                <value>3</value>
8417                            </enumeratedValue>
8418                            <enumeratedValue>
8419                                <name>siob_proc_57</name>
8420                                <value>5</value>
8421                            </enumeratedValue>
8422                            <enumeratedValue>
8423                                <name>null</name>
8424                                <value>31</value>
8425                            </enumeratedValue>
8426                        </enumeratedValues>
8427                    </field>
8428                </fields>
8429            </register>
8430            <register>
8431                <name>GPIO_QSPI_SCLK_STATUS</name>
8432                <addressOffset>0x00000010</addressOffset>
8433                <resetValue>0x00000000</resetValue>
8434                <fields>
8435                    <field>
8436                        <name>IRQTOPROC</name>
8437                        <description>interrupt to processors, after override is applied</description>
8438                        <bitRange>[26:26]</bitRange>
8439                        <access>read-only</access>
8440                    </field>
8441                    <field>
8442                        <name>INFROMPAD</name>
8443                        <description>input signal from pad, before filtering and override are applied</description>
8444                        <bitRange>[17:17]</bitRange>
8445                        <access>read-only</access>
8446                    </field>
8447                    <field>
8448                        <name>OETOPAD</name>
8449                        <description>output enable to pad after register override is applied</description>
8450                        <bitRange>[13:13]</bitRange>
8451                        <access>read-only</access>
8452                    </field>
8453                    <field>
8454                        <name>OUTTOPAD</name>
8455                        <description>output signal to pad after register override is applied</description>
8456                        <bitRange>[9:9]</bitRange>
8457                        <access>read-only</access>
8458                    </field>
8459                </fields>
8460            </register>
8461            <register>
8462                <name>GPIO_QSPI_SCLK_CTRL</name>
8463                <addressOffset>0x00000014</addressOffset>
8464                <resetValue>0x0000001f</resetValue>
8465                <fields>
8466                    <field>
8467                        <name>IRQOVER</name>
8468                        <bitRange>[29:28]</bitRange>
8469                        <access>read-write</access>
8470                        <enumeratedValues>
8471                            <enumeratedValue>
8472                                <name>NORMAL</name>
8473                                <value>0</value>
8474                                <description>don&#39;t invert the interrupt</description>
8475                            </enumeratedValue>
8476                            <enumeratedValue>
8477                                <name>INVERT</name>
8478                                <value>1</value>
8479                                <description>invert the interrupt</description>
8480                            </enumeratedValue>
8481                            <enumeratedValue>
8482                                <name>LOW</name>
8483                                <value>2</value>
8484                                <description>drive interrupt low</description>
8485                            </enumeratedValue>
8486                            <enumeratedValue>
8487                                <name>HIGH</name>
8488                                <value>3</value>
8489                                <description>drive interrupt high</description>
8490                            </enumeratedValue>
8491                        </enumeratedValues>
8492                    </field>
8493                    <field>
8494                        <name>INOVER</name>
8495                        <bitRange>[17:16]</bitRange>
8496                        <access>read-write</access>
8497                        <enumeratedValues>
8498                            <enumeratedValue>
8499                                <name>NORMAL</name>
8500                                <value>0</value>
8501                                <description>don&#39;t invert the peri input</description>
8502                            </enumeratedValue>
8503                            <enumeratedValue>
8504                                <name>INVERT</name>
8505                                <value>1</value>
8506                                <description>invert the peri input</description>
8507                            </enumeratedValue>
8508                            <enumeratedValue>
8509                                <name>LOW</name>
8510                                <value>2</value>
8511                                <description>drive peri input low</description>
8512                            </enumeratedValue>
8513                            <enumeratedValue>
8514                                <name>HIGH</name>
8515                                <value>3</value>
8516                                <description>drive peri input high</description>
8517                            </enumeratedValue>
8518                        </enumeratedValues>
8519                    </field>
8520                    <field>
8521                        <name>OEOVER</name>
8522                        <bitRange>[15:14]</bitRange>
8523                        <access>read-write</access>
8524                        <enumeratedValues>
8525                            <enumeratedValue>
8526                                <name>NORMAL</name>
8527                                <value>0</value>
8528                                <description>drive output enable from peripheral signal selected by funcsel</description>
8529                            </enumeratedValue>
8530                            <enumeratedValue>
8531                                <name>INVERT</name>
8532                                <value>1</value>
8533                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
8534                            </enumeratedValue>
8535                            <enumeratedValue>
8536                                <name>DISABLE</name>
8537                                <value>2</value>
8538                                <description>disable output</description>
8539                            </enumeratedValue>
8540                            <enumeratedValue>
8541                                <name>ENABLE</name>
8542                                <value>3</value>
8543                                <description>enable output</description>
8544                            </enumeratedValue>
8545                        </enumeratedValues>
8546                    </field>
8547                    <field>
8548                        <name>OUTOVER</name>
8549                        <bitRange>[13:12]</bitRange>
8550                        <access>read-write</access>
8551                        <enumeratedValues>
8552                            <enumeratedValue>
8553                                <name>NORMAL</name>
8554                                <value>0</value>
8555                                <description>drive output from peripheral signal selected by funcsel</description>
8556                            </enumeratedValue>
8557                            <enumeratedValue>
8558                                <name>INVERT</name>
8559                                <value>1</value>
8560                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
8561                            </enumeratedValue>
8562                            <enumeratedValue>
8563                                <name>LOW</name>
8564                                <value>2</value>
8565                                <description>drive output low</description>
8566                            </enumeratedValue>
8567                            <enumeratedValue>
8568                                <name>HIGH</name>
8569                                <value>3</value>
8570                                <description>drive output high</description>
8571                            </enumeratedValue>
8572                        </enumeratedValues>
8573                    </field>
8574                    <field>
8575                        <name>FUNCSEL</name>
8576                        <description>0-31 -&gt; selects pin function according to the gpio table
8577                            31 == NULL</description>
8578                        <bitRange>[4:0]</bitRange>
8579                        <access>read-write</access>
8580                        <enumeratedValues>
8581                            <enumeratedValue>
8582                                <name>xip_sclk</name>
8583                                <value>0</value>
8584                            </enumeratedValue>
8585                            <enumeratedValue>
8586                                <name>uart1_cts</name>
8587                                <value>2</value>
8588                            </enumeratedValue>
8589                            <enumeratedValue>
8590                                <name>i2c1_sda</name>
8591                                <value>3</value>
8592                            </enumeratedValue>
8593                            <enumeratedValue>
8594                                <name>siob_proc_58</name>
8595                                <value>5</value>
8596                            </enumeratedValue>
8597                            <enumeratedValue>
8598                                <name>uart1_tx</name>
8599                                <value>11</value>
8600                            </enumeratedValue>
8601                            <enumeratedValue>
8602                                <name>null</name>
8603                                <value>31</value>
8604                            </enumeratedValue>
8605                        </enumeratedValues>
8606                    </field>
8607                </fields>
8608            </register>
8609            <register>
8610                <name>GPIO_QSPI_SS_STATUS</name>
8611                <addressOffset>0x00000018</addressOffset>
8612                <resetValue>0x00000000</resetValue>
8613                <fields>
8614                    <field>
8615                        <name>IRQTOPROC</name>
8616                        <description>interrupt to processors, after override is applied</description>
8617                        <bitRange>[26:26]</bitRange>
8618                        <access>read-only</access>
8619                    </field>
8620                    <field>
8621                        <name>INFROMPAD</name>
8622                        <description>input signal from pad, before filtering and override are applied</description>
8623                        <bitRange>[17:17]</bitRange>
8624                        <access>read-only</access>
8625                    </field>
8626                    <field>
8627                        <name>OETOPAD</name>
8628                        <description>output enable to pad after register override is applied</description>
8629                        <bitRange>[13:13]</bitRange>
8630                        <access>read-only</access>
8631                    </field>
8632                    <field>
8633                        <name>OUTTOPAD</name>
8634                        <description>output signal to pad after register override is applied</description>
8635                        <bitRange>[9:9]</bitRange>
8636                        <access>read-only</access>
8637                    </field>
8638                </fields>
8639            </register>
8640            <register>
8641                <name>GPIO_QSPI_SS_CTRL</name>
8642                <addressOffset>0x0000001c</addressOffset>
8643                <resetValue>0x0000001f</resetValue>
8644                <fields>
8645                    <field>
8646                        <name>IRQOVER</name>
8647                        <bitRange>[29:28]</bitRange>
8648                        <access>read-write</access>
8649                        <enumeratedValues>
8650                            <enumeratedValue>
8651                                <name>NORMAL</name>
8652                                <value>0</value>
8653                                <description>don&#39;t invert the interrupt</description>
8654                            </enumeratedValue>
8655                            <enumeratedValue>
8656                                <name>INVERT</name>
8657                                <value>1</value>
8658                                <description>invert the interrupt</description>
8659                            </enumeratedValue>
8660                            <enumeratedValue>
8661                                <name>LOW</name>
8662                                <value>2</value>
8663                                <description>drive interrupt low</description>
8664                            </enumeratedValue>
8665                            <enumeratedValue>
8666                                <name>HIGH</name>
8667                                <value>3</value>
8668                                <description>drive interrupt high</description>
8669                            </enumeratedValue>
8670                        </enumeratedValues>
8671                    </field>
8672                    <field>
8673                        <name>INOVER</name>
8674                        <bitRange>[17:16]</bitRange>
8675                        <access>read-write</access>
8676                        <enumeratedValues>
8677                            <enumeratedValue>
8678                                <name>NORMAL</name>
8679                                <value>0</value>
8680                                <description>don&#39;t invert the peri input</description>
8681                            </enumeratedValue>
8682                            <enumeratedValue>
8683                                <name>INVERT</name>
8684                                <value>1</value>
8685                                <description>invert the peri input</description>
8686                            </enumeratedValue>
8687                            <enumeratedValue>
8688                                <name>LOW</name>
8689                                <value>2</value>
8690                                <description>drive peri input low</description>
8691                            </enumeratedValue>
8692                            <enumeratedValue>
8693                                <name>HIGH</name>
8694                                <value>3</value>
8695                                <description>drive peri input high</description>
8696                            </enumeratedValue>
8697                        </enumeratedValues>
8698                    </field>
8699                    <field>
8700                        <name>OEOVER</name>
8701                        <bitRange>[15:14]</bitRange>
8702                        <access>read-write</access>
8703                        <enumeratedValues>
8704                            <enumeratedValue>
8705                                <name>NORMAL</name>
8706                                <value>0</value>
8707                                <description>drive output enable from peripheral signal selected by funcsel</description>
8708                            </enumeratedValue>
8709                            <enumeratedValue>
8710                                <name>INVERT</name>
8711                                <value>1</value>
8712                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
8713                            </enumeratedValue>
8714                            <enumeratedValue>
8715                                <name>DISABLE</name>
8716                                <value>2</value>
8717                                <description>disable output</description>
8718                            </enumeratedValue>
8719                            <enumeratedValue>
8720                                <name>ENABLE</name>
8721                                <value>3</value>
8722                                <description>enable output</description>
8723                            </enumeratedValue>
8724                        </enumeratedValues>
8725                    </field>
8726                    <field>
8727                        <name>OUTOVER</name>
8728                        <bitRange>[13:12]</bitRange>
8729                        <access>read-write</access>
8730                        <enumeratedValues>
8731                            <enumeratedValue>
8732                                <name>NORMAL</name>
8733                                <value>0</value>
8734                                <description>drive output from peripheral signal selected by funcsel</description>
8735                            </enumeratedValue>
8736                            <enumeratedValue>
8737                                <name>INVERT</name>
8738                                <value>1</value>
8739                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
8740                            </enumeratedValue>
8741                            <enumeratedValue>
8742                                <name>LOW</name>
8743                                <value>2</value>
8744                                <description>drive output low</description>
8745                            </enumeratedValue>
8746                            <enumeratedValue>
8747                                <name>HIGH</name>
8748                                <value>3</value>
8749                                <description>drive output high</description>
8750                            </enumeratedValue>
8751                        </enumeratedValues>
8752                    </field>
8753                    <field>
8754                        <name>FUNCSEL</name>
8755                        <description>0-31 -&gt; selects pin function according to the gpio table
8756                            31 == NULL</description>
8757                        <bitRange>[4:0]</bitRange>
8758                        <access>read-write</access>
8759                        <enumeratedValues>
8760                            <enumeratedValue>
8761                                <name>xip_ss_n_0</name>
8762                                <value>0</value>
8763                            </enumeratedValue>
8764                            <enumeratedValue>
8765                                <name>uart1_rts</name>
8766                                <value>2</value>
8767                            </enumeratedValue>
8768                            <enumeratedValue>
8769                                <name>i2c1_scl</name>
8770                                <value>3</value>
8771                            </enumeratedValue>
8772                            <enumeratedValue>
8773                                <name>siob_proc_59</name>
8774                                <value>5</value>
8775                            </enumeratedValue>
8776                            <enumeratedValue>
8777                                <name>uart1_rx</name>
8778                                <value>11</value>
8779                            </enumeratedValue>
8780                            <enumeratedValue>
8781                                <name>null</name>
8782                                <value>31</value>
8783                            </enumeratedValue>
8784                        </enumeratedValues>
8785                    </field>
8786                </fields>
8787            </register>
8788            <register>
8789                <name>GPIO_QSPI_SD0_STATUS</name>
8790                <addressOffset>0x00000020</addressOffset>
8791                <resetValue>0x00000000</resetValue>
8792                <fields>
8793                    <field>
8794                        <name>IRQTOPROC</name>
8795                        <description>interrupt to processors, after override is applied</description>
8796                        <bitRange>[26:26]</bitRange>
8797                        <access>read-only</access>
8798                    </field>
8799                    <field>
8800                        <name>INFROMPAD</name>
8801                        <description>input signal from pad, before filtering and override are applied</description>
8802                        <bitRange>[17:17]</bitRange>
8803                        <access>read-only</access>
8804                    </field>
8805                    <field>
8806                        <name>OETOPAD</name>
8807                        <description>output enable to pad after register override is applied</description>
8808                        <bitRange>[13:13]</bitRange>
8809                        <access>read-only</access>
8810                    </field>
8811                    <field>
8812                        <name>OUTTOPAD</name>
8813                        <description>output signal to pad after register override is applied</description>
8814                        <bitRange>[9:9]</bitRange>
8815                        <access>read-only</access>
8816                    </field>
8817                </fields>
8818            </register>
8819            <register>
8820                <name>GPIO_QSPI_SD0_CTRL</name>
8821                <addressOffset>0x00000024</addressOffset>
8822                <resetValue>0x0000001f</resetValue>
8823                <fields>
8824                    <field>
8825                        <name>IRQOVER</name>
8826                        <bitRange>[29:28]</bitRange>
8827                        <access>read-write</access>
8828                        <enumeratedValues>
8829                            <enumeratedValue>
8830                                <name>NORMAL</name>
8831                                <value>0</value>
8832                                <description>don&#39;t invert the interrupt</description>
8833                            </enumeratedValue>
8834                            <enumeratedValue>
8835                                <name>INVERT</name>
8836                                <value>1</value>
8837                                <description>invert the interrupt</description>
8838                            </enumeratedValue>
8839                            <enumeratedValue>
8840                                <name>LOW</name>
8841                                <value>2</value>
8842                                <description>drive interrupt low</description>
8843                            </enumeratedValue>
8844                            <enumeratedValue>
8845                                <name>HIGH</name>
8846                                <value>3</value>
8847                                <description>drive interrupt high</description>
8848                            </enumeratedValue>
8849                        </enumeratedValues>
8850                    </field>
8851                    <field>
8852                        <name>INOVER</name>
8853                        <bitRange>[17:16]</bitRange>
8854                        <access>read-write</access>
8855                        <enumeratedValues>
8856                            <enumeratedValue>
8857                                <name>NORMAL</name>
8858                                <value>0</value>
8859                                <description>don&#39;t invert the peri input</description>
8860                            </enumeratedValue>
8861                            <enumeratedValue>
8862                                <name>INVERT</name>
8863                                <value>1</value>
8864                                <description>invert the peri input</description>
8865                            </enumeratedValue>
8866                            <enumeratedValue>
8867                                <name>LOW</name>
8868                                <value>2</value>
8869                                <description>drive peri input low</description>
8870                            </enumeratedValue>
8871                            <enumeratedValue>
8872                                <name>HIGH</name>
8873                                <value>3</value>
8874                                <description>drive peri input high</description>
8875                            </enumeratedValue>
8876                        </enumeratedValues>
8877                    </field>
8878                    <field>
8879                        <name>OEOVER</name>
8880                        <bitRange>[15:14]</bitRange>
8881                        <access>read-write</access>
8882                        <enumeratedValues>
8883                            <enumeratedValue>
8884                                <name>NORMAL</name>
8885                                <value>0</value>
8886                                <description>drive output enable from peripheral signal selected by funcsel</description>
8887                            </enumeratedValue>
8888                            <enumeratedValue>
8889                                <name>INVERT</name>
8890                                <value>1</value>
8891                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
8892                            </enumeratedValue>
8893                            <enumeratedValue>
8894                                <name>DISABLE</name>
8895                                <value>2</value>
8896                                <description>disable output</description>
8897                            </enumeratedValue>
8898                            <enumeratedValue>
8899                                <name>ENABLE</name>
8900                                <value>3</value>
8901                                <description>enable output</description>
8902                            </enumeratedValue>
8903                        </enumeratedValues>
8904                    </field>
8905                    <field>
8906                        <name>OUTOVER</name>
8907                        <bitRange>[13:12]</bitRange>
8908                        <access>read-write</access>
8909                        <enumeratedValues>
8910                            <enumeratedValue>
8911                                <name>NORMAL</name>
8912                                <value>0</value>
8913                                <description>drive output from peripheral signal selected by funcsel</description>
8914                            </enumeratedValue>
8915                            <enumeratedValue>
8916                                <name>INVERT</name>
8917                                <value>1</value>
8918                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
8919                            </enumeratedValue>
8920                            <enumeratedValue>
8921                                <name>LOW</name>
8922                                <value>2</value>
8923                                <description>drive output low</description>
8924                            </enumeratedValue>
8925                            <enumeratedValue>
8926                                <name>HIGH</name>
8927                                <value>3</value>
8928                                <description>drive output high</description>
8929                            </enumeratedValue>
8930                        </enumeratedValues>
8931                    </field>
8932                    <field>
8933                        <name>FUNCSEL</name>
8934                        <description>0-31 -&gt; selects pin function according to the gpio table
8935                            31 == NULL</description>
8936                        <bitRange>[4:0]</bitRange>
8937                        <access>read-write</access>
8938                        <enumeratedValues>
8939                            <enumeratedValue>
8940                                <name>xip_sd0</name>
8941                                <value>0</value>
8942                            </enumeratedValue>
8943                            <enumeratedValue>
8944                                <name>uart0_tx</name>
8945                                <value>2</value>
8946                            </enumeratedValue>
8947                            <enumeratedValue>
8948                                <name>i2c0_sda</name>
8949                                <value>3</value>
8950                            </enumeratedValue>
8951                            <enumeratedValue>
8952                                <name>siob_proc_60</name>
8953                                <value>5</value>
8954                            </enumeratedValue>
8955                            <enumeratedValue>
8956                                <name>null</name>
8957                                <value>31</value>
8958                            </enumeratedValue>
8959                        </enumeratedValues>
8960                    </field>
8961                </fields>
8962            </register>
8963            <register>
8964                <name>GPIO_QSPI_SD1_STATUS</name>
8965                <addressOffset>0x00000028</addressOffset>
8966                <resetValue>0x00000000</resetValue>
8967                <fields>
8968                    <field>
8969                        <name>IRQTOPROC</name>
8970                        <description>interrupt to processors, after override is applied</description>
8971                        <bitRange>[26:26]</bitRange>
8972                        <access>read-only</access>
8973                    </field>
8974                    <field>
8975                        <name>INFROMPAD</name>
8976                        <description>input signal from pad, before filtering and override are applied</description>
8977                        <bitRange>[17:17]</bitRange>
8978                        <access>read-only</access>
8979                    </field>
8980                    <field>
8981                        <name>OETOPAD</name>
8982                        <description>output enable to pad after register override is applied</description>
8983                        <bitRange>[13:13]</bitRange>
8984                        <access>read-only</access>
8985                    </field>
8986                    <field>
8987                        <name>OUTTOPAD</name>
8988                        <description>output signal to pad after register override is applied</description>
8989                        <bitRange>[9:9]</bitRange>
8990                        <access>read-only</access>
8991                    </field>
8992                </fields>
8993            </register>
8994            <register>
8995                <name>GPIO_QSPI_SD1_CTRL</name>
8996                <addressOffset>0x0000002c</addressOffset>
8997                <resetValue>0x0000001f</resetValue>
8998                <fields>
8999                    <field>
9000                        <name>IRQOVER</name>
9001                        <bitRange>[29:28]</bitRange>
9002                        <access>read-write</access>
9003                        <enumeratedValues>
9004                            <enumeratedValue>
9005                                <name>NORMAL</name>
9006                                <value>0</value>
9007                                <description>don&#39;t invert the interrupt</description>
9008                            </enumeratedValue>
9009                            <enumeratedValue>
9010                                <name>INVERT</name>
9011                                <value>1</value>
9012                                <description>invert the interrupt</description>
9013                            </enumeratedValue>
9014                            <enumeratedValue>
9015                                <name>LOW</name>
9016                                <value>2</value>
9017                                <description>drive interrupt low</description>
9018                            </enumeratedValue>
9019                            <enumeratedValue>
9020                                <name>HIGH</name>
9021                                <value>3</value>
9022                                <description>drive interrupt high</description>
9023                            </enumeratedValue>
9024                        </enumeratedValues>
9025                    </field>
9026                    <field>
9027                        <name>INOVER</name>
9028                        <bitRange>[17:16]</bitRange>
9029                        <access>read-write</access>
9030                        <enumeratedValues>
9031                            <enumeratedValue>
9032                                <name>NORMAL</name>
9033                                <value>0</value>
9034                                <description>don&#39;t invert the peri input</description>
9035                            </enumeratedValue>
9036                            <enumeratedValue>
9037                                <name>INVERT</name>
9038                                <value>1</value>
9039                                <description>invert the peri input</description>
9040                            </enumeratedValue>
9041                            <enumeratedValue>
9042                                <name>LOW</name>
9043                                <value>2</value>
9044                                <description>drive peri input low</description>
9045                            </enumeratedValue>
9046                            <enumeratedValue>
9047                                <name>HIGH</name>
9048                                <value>3</value>
9049                                <description>drive peri input high</description>
9050                            </enumeratedValue>
9051                        </enumeratedValues>
9052                    </field>
9053                    <field>
9054                        <name>OEOVER</name>
9055                        <bitRange>[15:14]</bitRange>
9056                        <access>read-write</access>
9057                        <enumeratedValues>
9058                            <enumeratedValue>
9059                                <name>NORMAL</name>
9060                                <value>0</value>
9061                                <description>drive output enable from peripheral signal selected by funcsel</description>
9062                            </enumeratedValue>
9063                            <enumeratedValue>
9064                                <name>INVERT</name>
9065                                <value>1</value>
9066                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
9067                            </enumeratedValue>
9068                            <enumeratedValue>
9069                                <name>DISABLE</name>
9070                                <value>2</value>
9071                                <description>disable output</description>
9072                            </enumeratedValue>
9073                            <enumeratedValue>
9074                                <name>ENABLE</name>
9075                                <value>3</value>
9076                                <description>enable output</description>
9077                            </enumeratedValue>
9078                        </enumeratedValues>
9079                    </field>
9080                    <field>
9081                        <name>OUTOVER</name>
9082                        <bitRange>[13:12]</bitRange>
9083                        <access>read-write</access>
9084                        <enumeratedValues>
9085                            <enumeratedValue>
9086                                <name>NORMAL</name>
9087                                <value>0</value>
9088                                <description>drive output from peripheral signal selected by funcsel</description>
9089                            </enumeratedValue>
9090                            <enumeratedValue>
9091                                <name>INVERT</name>
9092                                <value>1</value>
9093                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
9094                            </enumeratedValue>
9095                            <enumeratedValue>
9096                                <name>LOW</name>
9097                                <value>2</value>
9098                                <description>drive output low</description>
9099                            </enumeratedValue>
9100                            <enumeratedValue>
9101                                <name>HIGH</name>
9102                                <value>3</value>
9103                                <description>drive output high</description>
9104                            </enumeratedValue>
9105                        </enumeratedValues>
9106                    </field>
9107                    <field>
9108                        <name>FUNCSEL</name>
9109                        <description>0-31 -&gt; selects pin function according to the gpio table
9110                            31 == NULL</description>
9111                        <bitRange>[4:0]</bitRange>
9112                        <access>read-write</access>
9113                        <enumeratedValues>
9114                            <enumeratedValue>
9115                                <name>xip_sd1</name>
9116                                <value>0</value>
9117                            </enumeratedValue>
9118                            <enumeratedValue>
9119                                <name>uart0_rx</name>
9120                                <value>2</value>
9121                            </enumeratedValue>
9122                            <enumeratedValue>
9123                                <name>i2c0_scl</name>
9124                                <value>3</value>
9125                            </enumeratedValue>
9126                            <enumeratedValue>
9127                                <name>siob_proc_61</name>
9128                                <value>5</value>
9129                            </enumeratedValue>
9130                            <enumeratedValue>
9131                                <name>null</name>
9132                                <value>31</value>
9133                            </enumeratedValue>
9134                        </enumeratedValues>
9135                    </field>
9136                </fields>
9137            </register>
9138            <register>
9139                <name>GPIO_QSPI_SD2_STATUS</name>
9140                <addressOffset>0x00000030</addressOffset>
9141                <resetValue>0x00000000</resetValue>
9142                <fields>
9143                    <field>
9144                        <name>IRQTOPROC</name>
9145                        <description>interrupt to processors, after override is applied</description>
9146                        <bitRange>[26:26]</bitRange>
9147                        <access>read-only</access>
9148                    </field>
9149                    <field>
9150                        <name>INFROMPAD</name>
9151                        <description>input signal from pad, before filtering and override are applied</description>
9152                        <bitRange>[17:17]</bitRange>
9153                        <access>read-only</access>
9154                    </field>
9155                    <field>
9156                        <name>OETOPAD</name>
9157                        <description>output enable to pad after register override is applied</description>
9158                        <bitRange>[13:13]</bitRange>
9159                        <access>read-only</access>
9160                    </field>
9161                    <field>
9162                        <name>OUTTOPAD</name>
9163                        <description>output signal to pad after register override is applied</description>
9164                        <bitRange>[9:9]</bitRange>
9165                        <access>read-only</access>
9166                    </field>
9167                </fields>
9168            </register>
9169            <register>
9170                <name>GPIO_QSPI_SD2_CTRL</name>
9171                <addressOffset>0x00000034</addressOffset>
9172                <resetValue>0x0000001f</resetValue>
9173                <fields>
9174                    <field>
9175                        <name>IRQOVER</name>
9176                        <bitRange>[29:28]</bitRange>
9177                        <access>read-write</access>
9178                        <enumeratedValues>
9179                            <enumeratedValue>
9180                                <name>NORMAL</name>
9181                                <value>0</value>
9182                                <description>don&#39;t invert the interrupt</description>
9183                            </enumeratedValue>
9184                            <enumeratedValue>
9185                                <name>INVERT</name>
9186                                <value>1</value>
9187                                <description>invert the interrupt</description>
9188                            </enumeratedValue>
9189                            <enumeratedValue>
9190                                <name>LOW</name>
9191                                <value>2</value>
9192                                <description>drive interrupt low</description>
9193                            </enumeratedValue>
9194                            <enumeratedValue>
9195                                <name>HIGH</name>
9196                                <value>3</value>
9197                                <description>drive interrupt high</description>
9198                            </enumeratedValue>
9199                        </enumeratedValues>
9200                    </field>
9201                    <field>
9202                        <name>INOVER</name>
9203                        <bitRange>[17:16]</bitRange>
9204                        <access>read-write</access>
9205                        <enumeratedValues>
9206                            <enumeratedValue>
9207                                <name>NORMAL</name>
9208                                <value>0</value>
9209                                <description>don&#39;t invert the peri input</description>
9210                            </enumeratedValue>
9211                            <enumeratedValue>
9212                                <name>INVERT</name>
9213                                <value>1</value>
9214                                <description>invert the peri input</description>
9215                            </enumeratedValue>
9216                            <enumeratedValue>
9217                                <name>LOW</name>
9218                                <value>2</value>
9219                                <description>drive peri input low</description>
9220                            </enumeratedValue>
9221                            <enumeratedValue>
9222                                <name>HIGH</name>
9223                                <value>3</value>
9224                                <description>drive peri input high</description>
9225                            </enumeratedValue>
9226                        </enumeratedValues>
9227                    </field>
9228                    <field>
9229                        <name>OEOVER</name>
9230                        <bitRange>[15:14]</bitRange>
9231                        <access>read-write</access>
9232                        <enumeratedValues>
9233                            <enumeratedValue>
9234                                <name>NORMAL</name>
9235                                <value>0</value>
9236                                <description>drive output enable from peripheral signal selected by funcsel</description>
9237                            </enumeratedValue>
9238                            <enumeratedValue>
9239                                <name>INVERT</name>
9240                                <value>1</value>
9241                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
9242                            </enumeratedValue>
9243                            <enumeratedValue>
9244                                <name>DISABLE</name>
9245                                <value>2</value>
9246                                <description>disable output</description>
9247                            </enumeratedValue>
9248                            <enumeratedValue>
9249                                <name>ENABLE</name>
9250                                <value>3</value>
9251                                <description>enable output</description>
9252                            </enumeratedValue>
9253                        </enumeratedValues>
9254                    </field>
9255                    <field>
9256                        <name>OUTOVER</name>
9257                        <bitRange>[13:12]</bitRange>
9258                        <access>read-write</access>
9259                        <enumeratedValues>
9260                            <enumeratedValue>
9261                                <name>NORMAL</name>
9262                                <value>0</value>
9263                                <description>drive output from peripheral signal selected by funcsel</description>
9264                            </enumeratedValue>
9265                            <enumeratedValue>
9266                                <name>INVERT</name>
9267                                <value>1</value>
9268                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
9269                            </enumeratedValue>
9270                            <enumeratedValue>
9271                                <name>LOW</name>
9272                                <value>2</value>
9273                                <description>drive output low</description>
9274                            </enumeratedValue>
9275                            <enumeratedValue>
9276                                <name>HIGH</name>
9277                                <value>3</value>
9278                                <description>drive output high</description>
9279                            </enumeratedValue>
9280                        </enumeratedValues>
9281                    </field>
9282                    <field>
9283                        <name>FUNCSEL</name>
9284                        <description>0-31 -&gt; selects pin function according to the gpio table
9285                            31 == NULL</description>
9286                        <bitRange>[4:0]</bitRange>
9287                        <access>read-write</access>
9288                        <enumeratedValues>
9289                            <enumeratedValue>
9290                                <name>xip_sd2</name>
9291                                <value>0</value>
9292                            </enumeratedValue>
9293                            <enumeratedValue>
9294                                <name>uart0_cts</name>
9295                                <value>2</value>
9296                            </enumeratedValue>
9297                            <enumeratedValue>
9298                                <name>i2c1_sda</name>
9299                                <value>3</value>
9300                            </enumeratedValue>
9301                            <enumeratedValue>
9302                                <name>siob_proc_62</name>
9303                                <value>5</value>
9304                            </enumeratedValue>
9305                            <enumeratedValue>
9306                                <name>uart0_tx</name>
9307                                <value>11</value>
9308                            </enumeratedValue>
9309                            <enumeratedValue>
9310                                <name>null</name>
9311                                <value>31</value>
9312                            </enumeratedValue>
9313                        </enumeratedValues>
9314                    </field>
9315                </fields>
9316            </register>
9317            <register>
9318                <name>GPIO_QSPI_SD3_STATUS</name>
9319                <addressOffset>0x00000038</addressOffset>
9320                <resetValue>0x00000000</resetValue>
9321                <fields>
9322                    <field>
9323                        <name>IRQTOPROC</name>
9324                        <description>interrupt to processors, after override is applied</description>
9325                        <bitRange>[26:26]</bitRange>
9326                        <access>read-only</access>
9327                    </field>
9328                    <field>
9329                        <name>INFROMPAD</name>
9330                        <description>input signal from pad, before filtering and override are applied</description>
9331                        <bitRange>[17:17]</bitRange>
9332                        <access>read-only</access>
9333                    </field>
9334                    <field>
9335                        <name>OETOPAD</name>
9336                        <description>output enable to pad after register override is applied</description>
9337                        <bitRange>[13:13]</bitRange>
9338                        <access>read-only</access>
9339                    </field>
9340                    <field>
9341                        <name>OUTTOPAD</name>
9342                        <description>output signal to pad after register override is applied</description>
9343                        <bitRange>[9:9]</bitRange>
9344                        <access>read-only</access>
9345                    </field>
9346                </fields>
9347            </register>
9348            <register>
9349                <name>GPIO_QSPI_SD3_CTRL</name>
9350                <addressOffset>0x0000003c</addressOffset>
9351                <resetValue>0x0000001f</resetValue>
9352                <fields>
9353                    <field>
9354                        <name>IRQOVER</name>
9355                        <bitRange>[29:28]</bitRange>
9356                        <access>read-write</access>
9357                        <enumeratedValues>
9358                            <enumeratedValue>
9359                                <name>NORMAL</name>
9360                                <value>0</value>
9361                                <description>don&#39;t invert the interrupt</description>
9362                            </enumeratedValue>
9363                            <enumeratedValue>
9364                                <name>INVERT</name>
9365                                <value>1</value>
9366                                <description>invert the interrupt</description>
9367                            </enumeratedValue>
9368                            <enumeratedValue>
9369                                <name>LOW</name>
9370                                <value>2</value>
9371                                <description>drive interrupt low</description>
9372                            </enumeratedValue>
9373                            <enumeratedValue>
9374                                <name>HIGH</name>
9375                                <value>3</value>
9376                                <description>drive interrupt high</description>
9377                            </enumeratedValue>
9378                        </enumeratedValues>
9379                    </field>
9380                    <field>
9381                        <name>INOVER</name>
9382                        <bitRange>[17:16]</bitRange>
9383                        <access>read-write</access>
9384                        <enumeratedValues>
9385                            <enumeratedValue>
9386                                <name>NORMAL</name>
9387                                <value>0</value>
9388                                <description>don&#39;t invert the peri input</description>
9389                            </enumeratedValue>
9390                            <enumeratedValue>
9391                                <name>INVERT</name>
9392                                <value>1</value>
9393                                <description>invert the peri input</description>
9394                            </enumeratedValue>
9395                            <enumeratedValue>
9396                                <name>LOW</name>
9397                                <value>2</value>
9398                                <description>drive peri input low</description>
9399                            </enumeratedValue>
9400                            <enumeratedValue>
9401                                <name>HIGH</name>
9402                                <value>3</value>
9403                                <description>drive peri input high</description>
9404                            </enumeratedValue>
9405                        </enumeratedValues>
9406                    </field>
9407                    <field>
9408                        <name>OEOVER</name>
9409                        <bitRange>[15:14]</bitRange>
9410                        <access>read-write</access>
9411                        <enumeratedValues>
9412                            <enumeratedValue>
9413                                <name>NORMAL</name>
9414                                <value>0</value>
9415                                <description>drive output enable from peripheral signal selected by funcsel</description>
9416                            </enumeratedValue>
9417                            <enumeratedValue>
9418                                <name>INVERT</name>
9419                                <value>1</value>
9420                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
9421                            </enumeratedValue>
9422                            <enumeratedValue>
9423                                <name>DISABLE</name>
9424                                <value>2</value>
9425                                <description>disable output</description>
9426                            </enumeratedValue>
9427                            <enumeratedValue>
9428                                <name>ENABLE</name>
9429                                <value>3</value>
9430                                <description>enable output</description>
9431                            </enumeratedValue>
9432                        </enumeratedValues>
9433                    </field>
9434                    <field>
9435                        <name>OUTOVER</name>
9436                        <bitRange>[13:12]</bitRange>
9437                        <access>read-write</access>
9438                        <enumeratedValues>
9439                            <enumeratedValue>
9440                                <name>NORMAL</name>
9441                                <value>0</value>
9442                                <description>drive output from peripheral signal selected by funcsel</description>
9443                            </enumeratedValue>
9444                            <enumeratedValue>
9445                                <name>INVERT</name>
9446                                <value>1</value>
9447                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
9448                            </enumeratedValue>
9449                            <enumeratedValue>
9450                                <name>LOW</name>
9451                                <value>2</value>
9452                                <description>drive output low</description>
9453                            </enumeratedValue>
9454                            <enumeratedValue>
9455                                <name>HIGH</name>
9456                                <value>3</value>
9457                                <description>drive output high</description>
9458                            </enumeratedValue>
9459                        </enumeratedValues>
9460                    </field>
9461                    <field>
9462                        <name>FUNCSEL</name>
9463                        <description>0-31 -&gt; selects pin function according to the gpio table
9464                            31 == NULL</description>
9465                        <bitRange>[4:0]</bitRange>
9466                        <access>read-write</access>
9467                        <enumeratedValues>
9468                            <enumeratedValue>
9469                                <name>xip_sd3</name>
9470                                <value>0</value>
9471                            </enumeratedValue>
9472                            <enumeratedValue>
9473                                <name>uart0_rts</name>
9474                                <value>2</value>
9475                            </enumeratedValue>
9476                            <enumeratedValue>
9477                                <name>i2c1_scl</name>
9478                                <value>3</value>
9479                            </enumeratedValue>
9480                            <enumeratedValue>
9481                                <name>siob_proc_63</name>
9482                                <value>5</value>
9483                            </enumeratedValue>
9484                            <enumeratedValue>
9485                                <name>uart0_rx</name>
9486                                <value>11</value>
9487                            </enumeratedValue>
9488                            <enumeratedValue>
9489                                <name>null</name>
9490                                <value>31</value>
9491                            </enumeratedValue>
9492                        </enumeratedValues>
9493                    </field>
9494                </fields>
9495            </register>
9496            <register>
9497                <name>IRQSUMMARY_PROC0_SECURE</name>
9498                <addressOffset>0x00000200</addressOffset>
9499                <resetValue>0x00000000</resetValue>
9500                <fields>
9501                    <field>
9502                        <name>GPIO_QSPI_SD3</name>
9503                        <bitRange>[7:7]</bitRange>
9504                        <access>read-only</access>
9505                    </field>
9506                    <field>
9507                        <name>GPIO_QSPI_SD2</name>
9508                        <bitRange>[6:6]</bitRange>
9509                        <access>read-only</access>
9510                    </field>
9511                    <field>
9512                        <name>GPIO_QSPI_SD1</name>
9513                        <bitRange>[5:5]</bitRange>
9514                        <access>read-only</access>
9515                    </field>
9516                    <field>
9517                        <name>GPIO_QSPI_SD0</name>
9518                        <bitRange>[4:4]</bitRange>
9519                        <access>read-only</access>
9520                    </field>
9521                    <field>
9522                        <name>GPIO_QSPI_SS</name>
9523                        <bitRange>[3:3]</bitRange>
9524                        <access>read-only</access>
9525                    </field>
9526                    <field>
9527                        <name>GPIO_QSPI_SCLK</name>
9528                        <bitRange>[2:2]</bitRange>
9529                        <access>read-only</access>
9530                    </field>
9531                    <field>
9532                        <name>USBPHY_DM</name>
9533                        <bitRange>[1:1]</bitRange>
9534                        <access>read-only</access>
9535                    </field>
9536                    <field>
9537                        <name>USBPHY_DP</name>
9538                        <bitRange>[0:0]</bitRange>
9539                        <access>read-only</access>
9540                    </field>
9541                </fields>
9542            </register>
9543            <register>
9544                <name>IRQSUMMARY_PROC0_NONSECURE</name>
9545                <addressOffset>0x00000204</addressOffset>
9546                <resetValue>0x00000000</resetValue>
9547                <fields>
9548                    <field>
9549                        <name>GPIO_QSPI_SD3</name>
9550                        <bitRange>[7:7]</bitRange>
9551                        <access>read-only</access>
9552                    </field>
9553                    <field>
9554                        <name>GPIO_QSPI_SD2</name>
9555                        <bitRange>[6:6]</bitRange>
9556                        <access>read-only</access>
9557                    </field>
9558                    <field>
9559                        <name>GPIO_QSPI_SD1</name>
9560                        <bitRange>[5:5]</bitRange>
9561                        <access>read-only</access>
9562                    </field>
9563                    <field>
9564                        <name>GPIO_QSPI_SD0</name>
9565                        <bitRange>[4:4]</bitRange>
9566                        <access>read-only</access>
9567                    </field>
9568                    <field>
9569                        <name>GPIO_QSPI_SS</name>
9570                        <bitRange>[3:3]</bitRange>
9571                        <access>read-only</access>
9572                    </field>
9573                    <field>
9574                        <name>GPIO_QSPI_SCLK</name>
9575                        <bitRange>[2:2]</bitRange>
9576                        <access>read-only</access>
9577                    </field>
9578                    <field>
9579                        <name>USBPHY_DM</name>
9580                        <bitRange>[1:1]</bitRange>
9581                        <access>read-only</access>
9582                    </field>
9583                    <field>
9584                        <name>USBPHY_DP</name>
9585                        <bitRange>[0:0]</bitRange>
9586                        <access>read-only</access>
9587                    </field>
9588                </fields>
9589            </register>
9590            <register>
9591                <name>IRQSUMMARY_PROC1_SECURE</name>
9592                <addressOffset>0x00000208</addressOffset>
9593                <resetValue>0x00000000</resetValue>
9594                <fields>
9595                    <field>
9596                        <name>GPIO_QSPI_SD3</name>
9597                        <bitRange>[7:7]</bitRange>
9598                        <access>read-only</access>
9599                    </field>
9600                    <field>
9601                        <name>GPIO_QSPI_SD2</name>
9602                        <bitRange>[6:6]</bitRange>
9603                        <access>read-only</access>
9604                    </field>
9605                    <field>
9606                        <name>GPIO_QSPI_SD1</name>
9607                        <bitRange>[5:5]</bitRange>
9608                        <access>read-only</access>
9609                    </field>
9610                    <field>
9611                        <name>GPIO_QSPI_SD0</name>
9612                        <bitRange>[4:4]</bitRange>
9613                        <access>read-only</access>
9614                    </field>
9615                    <field>
9616                        <name>GPIO_QSPI_SS</name>
9617                        <bitRange>[3:3]</bitRange>
9618                        <access>read-only</access>
9619                    </field>
9620                    <field>
9621                        <name>GPIO_QSPI_SCLK</name>
9622                        <bitRange>[2:2]</bitRange>
9623                        <access>read-only</access>
9624                    </field>
9625                    <field>
9626                        <name>USBPHY_DM</name>
9627                        <bitRange>[1:1]</bitRange>
9628                        <access>read-only</access>
9629                    </field>
9630                    <field>
9631                        <name>USBPHY_DP</name>
9632                        <bitRange>[0:0]</bitRange>
9633                        <access>read-only</access>
9634                    </field>
9635                </fields>
9636            </register>
9637            <register>
9638                <name>IRQSUMMARY_PROC1_NONSECURE</name>
9639                <addressOffset>0x0000020c</addressOffset>
9640                <resetValue>0x00000000</resetValue>
9641                <fields>
9642                    <field>
9643                        <name>GPIO_QSPI_SD3</name>
9644                        <bitRange>[7:7]</bitRange>
9645                        <access>read-only</access>
9646                    </field>
9647                    <field>
9648                        <name>GPIO_QSPI_SD2</name>
9649                        <bitRange>[6:6]</bitRange>
9650                        <access>read-only</access>
9651                    </field>
9652                    <field>
9653                        <name>GPIO_QSPI_SD1</name>
9654                        <bitRange>[5:5]</bitRange>
9655                        <access>read-only</access>
9656                    </field>
9657                    <field>
9658                        <name>GPIO_QSPI_SD0</name>
9659                        <bitRange>[4:4]</bitRange>
9660                        <access>read-only</access>
9661                    </field>
9662                    <field>
9663                        <name>GPIO_QSPI_SS</name>
9664                        <bitRange>[3:3]</bitRange>
9665                        <access>read-only</access>
9666                    </field>
9667                    <field>
9668                        <name>GPIO_QSPI_SCLK</name>
9669                        <bitRange>[2:2]</bitRange>
9670                        <access>read-only</access>
9671                    </field>
9672                    <field>
9673                        <name>USBPHY_DM</name>
9674                        <bitRange>[1:1]</bitRange>
9675                        <access>read-only</access>
9676                    </field>
9677                    <field>
9678                        <name>USBPHY_DP</name>
9679                        <bitRange>[0:0]</bitRange>
9680                        <access>read-only</access>
9681                    </field>
9682                </fields>
9683            </register>
9684            <register>
9685                <name>IRQSUMMARY_DORMANT_WAKE_SECURE</name>
9686                <addressOffset>0x00000210</addressOffset>
9687                <resetValue>0x00000000</resetValue>
9688                <fields>
9689                    <field>
9690                        <name>GPIO_QSPI_SD3</name>
9691                        <bitRange>[7:7]</bitRange>
9692                        <access>read-only</access>
9693                    </field>
9694                    <field>
9695                        <name>GPIO_QSPI_SD2</name>
9696                        <bitRange>[6:6]</bitRange>
9697                        <access>read-only</access>
9698                    </field>
9699                    <field>
9700                        <name>GPIO_QSPI_SD1</name>
9701                        <bitRange>[5:5]</bitRange>
9702                        <access>read-only</access>
9703                    </field>
9704                    <field>
9705                        <name>GPIO_QSPI_SD0</name>
9706                        <bitRange>[4:4]</bitRange>
9707                        <access>read-only</access>
9708                    </field>
9709                    <field>
9710                        <name>GPIO_QSPI_SS</name>
9711                        <bitRange>[3:3]</bitRange>
9712                        <access>read-only</access>
9713                    </field>
9714                    <field>
9715                        <name>GPIO_QSPI_SCLK</name>
9716                        <bitRange>[2:2]</bitRange>
9717                        <access>read-only</access>
9718                    </field>
9719                    <field>
9720                        <name>USBPHY_DM</name>
9721                        <bitRange>[1:1]</bitRange>
9722                        <access>read-only</access>
9723                    </field>
9724                    <field>
9725                        <name>USBPHY_DP</name>
9726                        <bitRange>[0:0]</bitRange>
9727                        <access>read-only</access>
9728                    </field>
9729                </fields>
9730            </register>
9731            <register>
9732                <name>IRQSUMMARY_DORMANT_WAKE_NONSECURE</name>
9733                <addressOffset>0x00000214</addressOffset>
9734                <resetValue>0x00000000</resetValue>
9735                <fields>
9736                    <field>
9737                        <name>GPIO_QSPI_SD3</name>
9738                        <bitRange>[7:7]</bitRange>
9739                        <access>read-only</access>
9740                    </field>
9741                    <field>
9742                        <name>GPIO_QSPI_SD2</name>
9743                        <bitRange>[6:6]</bitRange>
9744                        <access>read-only</access>
9745                    </field>
9746                    <field>
9747                        <name>GPIO_QSPI_SD1</name>
9748                        <bitRange>[5:5]</bitRange>
9749                        <access>read-only</access>
9750                    </field>
9751                    <field>
9752                        <name>GPIO_QSPI_SD0</name>
9753                        <bitRange>[4:4]</bitRange>
9754                        <access>read-only</access>
9755                    </field>
9756                    <field>
9757                        <name>GPIO_QSPI_SS</name>
9758                        <bitRange>[3:3]</bitRange>
9759                        <access>read-only</access>
9760                    </field>
9761                    <field>
9762                        <name>GPIO_QSPI_SCLK</name>
9763                        <bitRange>[2:2]</bitRange>
9764                        <access>read-only</access>
9765                    </field>
9766                    <field>
9767                        <name>USBPHY_DM</name>
9768                        <bitRange>[1:1]</bitRange>
9769                        <access>read-only</access>
9770                    </field>
9771                    <field>
9772                        <name>USBPHY_DP</name>
9773                        <bitRange>[0:0]</bitRange>
9774                        <access>read-only</access>
9775                    </field>
9776                </fields>
9777            </register>
9778            <register>
9779                <name>INTR</name>
9780                <addressOffset>0x00000218</addressOffset>
9781                <description>Raw Interrupts</description>
9782                <resetValue>0x00000000</resetValue>
9783                <fields>
9784                    <field>
9785                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
9786                        <bitRange>[31:31]</bitRange>
9787                        <access>read-write</access>
9788                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9789                    </field>
9790                    <field>
9791                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
9792                        <bitRange>[30:30]</bitRange>
9793                        <access>read-write</access>
9794                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9795                    </field>
9796                    <field>
9797                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
9798                        <bitRange>[29:29]</bitRange>
9799                        <access>read-only</access>
9800                    </field>
9801                    <field>
9802                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
9803                        <bitRange>[28:28]</bitRange>
9804                        <access>read-only</access>
9805                    </field>
9806                    <field>
9807                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
9808                        <bitRange>[27:27]</bitRange>
9809                        <access>read-write</access>
9810                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9811                    </field>
9812                    <field>
9813                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
9814                        <bitRange>[26:26]</bitRange>
9815                        <access>read-write</access>
9816                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9817                    </field>
9818                    <field>
9819                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
9820                        <bitRange>[25:25]</bitRange>
9821                        <access>read-only</access>
9822                    </field>
9823                    <field>
9824                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
9825                        <bitRange>[24:24]</bitRange>
9826                        <access>read-only</access>
9827                    </field>
9828                    <field>
9829                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
9830                        <bitRange>[23:23]</bitRange>
9831                        <access>read-write</access>
9832                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9833                    </field>
9834                    <field>
9835                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
9836                        <bitRange>[22:22]</bitRange>
9837                        <access>read-write</access>
9838                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9839                    </field>
9840                    <field>
9841                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
9842                        <bitRange>[21:21]</bitRange>
9843                        <access>read-only</access>
9844                    </field>
9845                    <field>
9846                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
9847                        <bitRange>[20:20]</bitRange>
9848                        <access>read-only</access>
9849                    </field>
9850                    <field>
9851                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
9852                        <bitRange>[19:19]</bitRange>
9853                        <access>read-write</access>
9854                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9855                    </field>
9856                    <field>
9857                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
9858                        <bitRange>[18:18]</bitRange>
9859                        <access>read-write</access>
9860                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9861                    </field>
9862                    <field>
9863                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
9864                        <bitRange>[17:17]</bitRange>
9865                        <access>read-only</access>
9866                    </field>
9867                    <field>
9868                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
9869                        <bitRange>[16:16]</bitRange>
9870                        <access>read-only</access>
9871                    </field>
9872                    <field>
9873                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
9874                        <bitRange>[15:15]</bitRange>
9875                        <access>read-write</access>
9876                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9877                    </field>
9878                    <field>
9879                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
9880                        <bitRange>[14:14]</bitRange>
9881                        <access>read-write</access>
9882                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9883                    </field>
9884                    <field>
9885                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
9886                        <bitRange>[13:13]</bitRange>
9887                        <access>read-only</access>
9888                    </field>
9889                    <field>
9890                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
9891                        <bitRange>[12:12]</bitRange>
9892                        <access>read-only</access>
9893                    </field>
9894                    <field>
9895                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
9896                        <bitRange>[11:11]</bitRange>
9897                        <access>read-write</access>
9898                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9899                    </field>
9900                    <field>
9901                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
9902                        <bitRange>[10:10]</bitRange>
9903                        <access>read-write</access>
9904                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9905                    </field>
9906                    <field>
9907                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
9908                        <bitRange>[9:9]</bitRange>
9909                        <access>read-only</access>
9910                    </field>
9911                    <field>
9912                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
9913                        <bitRange>[8:8]</bitRange>
9914                        <access>read-only</access>
9915                    </field>
9916                    <field>
9917                        <name>USBPHY_DM_EDGE_HIGH</name>
9918                        <bitRange>[7:7]</bitRange>
9919                        <access>read-write</access>
9920                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9921                    </field>
9922                    <field>
9923                        <name>USBPHY_DM_EDGE_LOW</name>
9924                        <bitRange>[6:6]</bitRange>
9925                        <access>read-write</access>
9926                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9927                    </field>
9928                    <field>
9929                        <name>USBPHY_DM_LEVEL_HIGH</name>
9930                        <bitRange>[5:5]</bitRange>
9931                        <access>read-only</access>
9932                    </field>
9933                    <field>
9934                        <name>USBPHY_DM_LEVEL_LOW</name>
9935                        <bitRange>[4:4]</bitRange>
9936                        <access>read-only</access>
9937                    </field>
9938                    <field>
9939                        <name>USBPHY_DP_EDGE_HIGH</name>
9940                        <bitRange>[3:3]</bitRange>
9941                        <access>read-write</access>
9942                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9943                    </field>
9944                    <field>
9945                        <name>USBPHY_DP_EDGE_LOW</name>
9946                        <bitRange>[2:2]</bitRange>
9947                        <access>read-write</access>
9948                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
9949                    </field>
9950                    <field>
9951                        <name>USBPHY_DP_LEVEL_HIGH</name>
9952                        <bitRange>[1:1]</bitRange>
9953                        <access>read-only</access>
9954                    </field>
9955                    <field>
9956                        <name>USBPHY_DP_LEVEL_LOW</name>
9957                        <bitRange>[0:0]</bitRange>
9958                        <access>read-only</access>
9959                    </field>
9960                </fields>
9961            </register>
9962            <register>
9963                <name>PROC0_INTE</name>
9964                <addressOffset>0x0000021c</addressOffset>
9965                <description>Interrupt Enable for proc0</description>
9966                <resetValue>0x00000000</resetValue>
9967                <fields>
9968                    <field>
9969                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
9970                        <bitRange>[31:31]</bitRange>
9971                        <access>read-write</access>
9972                    </field>
9973                    <field>
9974                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
9975                        <bitRange>[30:30]</bitRange>
9976                        <access>read-write</access>
9977                    </field>
9978                    <field>
9979                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
9980                        <bitRange>[29:29]</bitRange>
9981                        <access>read-write</access>
9982                    </field>
9983                    <field>
9984                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
9985                        <bitRange>[28:28]</bitRange>
9986                        <access>read-write</access>
9987                    </field>
9988                    <field>
9989                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
9990                        <bitRange>[27:27]</bitRange>
9991                        <access>read-write</access>
9992                    </field>
9993                    <field>
9994                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
9995                        <bitRange>[26:26]</bitRange>
9996                        <access>read-write</access>
9997                    </field>
9998                    <field>
9999                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10000                        <bitRange>[25:25]</bitRange>
10001                        <access>read-write</access>
10002                    </field>
10003                    <field>
10004                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10005                        <bitRange>[24:24]</bitRange>
10006                        <access>read-write</access>
10007                    </field>
10008                    <field>
10009                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10010                        <bitRange>[23:23]</bitRange>
10011                        <access>read-write</access>
10012                    </field>
10013                    <field>
10014                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10015                        <bitRange>[22:22]</bitRange>
10016                        <access>read-write</access>
10017                    </field>
10018                    <field>
10019                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10020                        <bitRange>[21:21]</bitRange>
10021                        <access>read-write</access>
10022                    </field>
10023                    <field>
10024                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10025                        <bitRange>[20:20]</bitRange>
10026                        <access>read-write</access>
10027                    </field>
10028                    <field>
10029                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10030                        <bitRange>[19:19]</bitRange>
10031                        <access>read-write</access>
10032                    </field>
10033                    <field>
10034                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10035                        <bitRange>[18:18]</bitRange>
10036                        <access>read-write</access>
10037                    </field>
10038                    <field>
10039                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10040                        <bitRange>[17:17]</bitRange>
10041                        <access>read-write</access>
10042                    </field>
10043                    <field>
10044                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10045                        <bitRange>[16:16]</bitRange>
10046                        <access>read-write</access>
10047                    </field>
10048                    <field>
10049                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10050                        <bitRange>[15:15]</bitRange>
10051                        <access>read-write</access>
10052                    </field>
10053                    <field>
10054                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10055                        <bitRange>[14:14]</bitRange>
10056                        <access>read-write</access>
10057                    </field>
10058                    <field>
10059                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10060                        <bitRange>[13:13]</bitRange>
10061                        <access>read-write</access>
10062                    </field>
10063                    <field>
10064                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10065                        <bitRange>[12:12]</bitRange>
10066                        <access>read-write</access>
10067                    </field>
10068                    <field>
10069                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10070                        <bitRange>[11:11]</bitRange>
10071                        <access>read-write</access>
10072                    </field>
10073                    <field>
10074                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10075                        <bitRange>[10:10]</bitRange>
10076                        <access>read-write</access>
10077                    </field>
10078                    <field>
10079                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10080                        <bitRange>[9:9]</bitRange>
10081                        <access>read-write</access>
10082                    </field>
10083                    <field>
10084                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10085                        <bitRange>[8:8]</bitRange>
10086                        <access>read-write</access>
10087                    </field>
10088                    <field>
10089                        <name>USBPHY_DM_EDGE_HIGH</name>
10090                        <bitRange>[7:7]</bitRange>
10091                        <access>read-write</access>
10092                    </field>
10093                    <field>
10094                        <name>USBPHY_DM_EDGE_LOW</name>
10095                        <bitRange>[6:6]</bitRange>
10096                        <access>read-write</access>
10097                    </field>
10098                    <field>
10099                        <name>USBPHY_DM_LEVEL_HIGH</name>
10100                        <bitRange>[5:5]</bitRange>
10101                        <access>read-write</access>
10102                    </field>
10103                    <field>
10104                        <name>USBPHY_DM_LEVEL_LOW</name>
10105                        <bitRange>[4:4]</bitRange>
10106                        <access>read-write</access>
10107                    </field>
10108                    <field>
10109                        <name>USBPHY_DP_EDGE_HIGH</name>
10110                        <bitRange>[3:3]</bitRange>
10111                        <access>read-write</access>
10112                    </field>
10113                    <field>
10114                        <name>USBPHY_DP_EDGE_LOW</name>
10115                        <bitRange>[2:2]</bitRange>
10116                        <access>read-write</access>
10117                    </field>
10118                    <field>
10119                        <name>USBPHY_DP_LEVEL_HIGH</name>
10120                        <bitRange>[1:1]</bitRange>
10121                        <access>read-write</access>
10122                    </field>
10123                    <field>
10124                        <name>USBPHY_DP_LEVEL_LOW</name>
10125                        <bitRange>[0:0]</bitRange>
10126                        <access>read-write</access>
10127                    </field>
10128                </fields>
10129            </register>
10130            <register>
10131                <name>PROC0_INTF</name>
10132                <addressOffset>0x00000220</addressOffset>
10133                <description>Interrupt Force for proc0</description>
10134                <resetValue>0x00000000</resetValue>
10135                <fields>
10136                    <field>
10137                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10138                        <bitRange>[31:31]</bitRange>
10139                        <access>read-write</access>
10140                    </field>
10141                    <field>
10142                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10143                        <bitRange>[30:30]</bitRange>
10144                        <access>read-write</access>
10145                    </field>
10146                    <field>
10147                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10148                        <bitRange>[29:29]</bitRange>
10149                        <access>read-write</access>
10150                    </field>
10151                    <field>
10152                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10153                        <bitRange>[28:28]</bitRange>
10154                        <access>read-write</access>
10155                    </field>
10156                    <field>
10157                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10158                        <bitRange>[27:27]</bitRange>
10159                        <access>read-write</access>
10160                    </field>
10161                    <field>
10162                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
10163                        <bitRange>[26:26]</bitRange>
10164                        <access>read-write</access>
10165                    </field>
10166                    <field>
10167                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10168                        <bitRange>[25:25]</bitRange>
10169                        <access>read-write</access>
10170                    </field>
10171                    <field>
10172                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10173                        <bitRange>[24:24]</bitRange>
10174                        <access>read-write</access>
10175                    </field>
10176                    <field>
10177                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10178                        <bitRange>[23:23]</bitRange>
10179                        <access>read-write</access>
10180                    </field>
10181                    <field>
10182                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10183                        <bitRange>[22:22]</bitRange>
10184                        <access>read-write</access>
10185                    </field>
10186                    <field>
10187                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10188                        <bitRange>[21:21]</bitRange>
10189                        <access>read-write</access>
10190                    </field>
10191                    <field>
10192                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10193                        <bitRange>[20:20]</bitRange>
10194                        <access>read-write</access>
10195                    </field>
10196                    <field>
10197                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10198                        <bitRange>[19:19]</bitRange>
10199                        <access>read-write</access>
10200                    </field>
10201                    <field>
10202                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10203                        <bitRange>[18:18]</bitRange>
10204                        <access>read-write</access>
10205                    </field>
10206                    <field>
10207                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10208                        <bitRange>[17:17]</bitRange>
10209                        <access>read-write</access>
10210                    </field>
10211                    <field>
10212                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10213                        <bitRange>[16:16]</bitRange>
10214                        <access>read-write</access>
10215                    </field>
10216                    <field>
10217                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10218                        <bitRange>[15:15]</bitRange>
10219                        <access>read-write</access>
10220                    </field>
10221                    <field>
10222                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10223                        <bitRange>[14:14]</bitRange>
10224                        <access>read-write</access>
10225                    </field>
10226                    <field>
10227                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10228                        <bitRange>[13:13]</bitRange>
10229                        <access>read-write</access>
10230                    </field>
10231                    <field>
10232                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10233                        <bitRange>[12:12]</bitRange>
10234                        <access>read-write</access>
10235                    </field>
10236                    <field>
10237                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10238                        <bitRange>[11:11]</bitRange>
10239                        <access>read-write</access>
10240                    </field>
10241                    <field>
10242                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10243                        <bitRange>[10:10]</bitRange>
10244                        <access>read-write</access>
10245                    </field>
10246                    <field>
10247                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10248                        <bitRange>[9:9]</bitRange>
10249                        <access>read-write</access>
10250                    </field>
10251                    <field>
10252                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10253                        <bitRange>[8:8]</bitRange>
10254                        <access>read-write</access>
10255                    </field>
10256                    <field>
10257                        <name>USBPHY_DM_EDGE_HIGH</name>
10258                        <bitRange>[7:7]</bitRange>
10259                        <access>read-write</access>
10260                    </field>
10261                    <field>
10262                        <name>USBPHY_DM_EDGE_LOW</name>
10263                        <bitRange>[6:6]</bitRange>
10264                        <access>read-write</access>
10265                    </field>
10266                    <field>
10267                        <name>USBPHY_DM_LEVEL_HIGH</name>
10268                        <bitRange>[5:5]</bitRange>
10269                        <access>read-write</access>
10270                    </field>
10271                    <field>
10272                        <name>USBPHY_DM_LEVEL_LOW</name>
10273                        <bitRange>[4:4]</bitRange>
10274                        <access>read-write</access>
10275                    </field>
10276                    <field>
10277                        <name>USBPHY_DP_EDGE_HIGH</name>
10278                        <bitRange>[3:3]</bitRange>
10279                        <access>read-write</access>
10280                    </field>
10281                    <field>
10282                        <name>USBPHY_DP_EDGE_LOW</name>
10283                        <bitRange>[2:2]</bitRange>
10284                        <access>read-write</access>
10285                    </field>
10286                    <field>
10287                        <name>USBPHY_DP_LEVEL_HIGH</name>
10288                        <bitRange>[1:1]</bitRange>
10289                        <access>read-write</access>
10290                    </field>
10291                    <field>
10292                        <name>USBPHY_DP_LEVEL_LOW</name>
10293                        <bitRange>[0:0]</bitRange>
10294                        <access>read-write</access>
10295                    </field>
10296                </fields>
10297            </register>
10298            <register>
10299                <name>PROC0_INTS</name>
10300                <addressOffset>0x00000224</addressOffset>
10301                <description>Interrupt status after masking &amp; forcing for proc0</description>
10302                <resetValue>0x00000000</resetValue>
10303                <fields>
10304                    <field>
10305                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10306                        <bitRange>[31:31]</bitRange>
10307                        <access>read-only</access>
10308                    </field>
10309                    <field>
10310                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10311                        <bitRange>[30:30]</bitRange>
10312                        <access>read-only</access>
10313                    </field>
10314                    <field>
10315                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10316                        <bitRange>[29:29]</bitRange>
10317                        <access>read-only</access>
10318                    </field>
10319                    <field>
10320                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10321                        <bitRange>[28:28]</bitRange>
10322                        <access>read-only</access>
10323                    </field>
10324                    <field>
10325                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10326                        <bitRange>[27:27]</bitRange>
10327                        <access>read-only</access>
10328                    </field>
10329                    <field>
10330                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
10331                        <bitRange>[26:26]</bitRange>
10332                        <access>read-only</access>
10333                    </field>
10334                    <field>
10335                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10336                        <bitRange>[25:25]</bitRange>
10337                        <access>read-only</access>
10338                    </field>
10339                    <field>
10340                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10341                        <bitRange>[24:24]</bitRange>
10342                        <access>read-only</access>
10343                    </field>
10344                    <field>
10345                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10346                        <bitRange>[23:23]</bitRange>
10347                        <access>read-only</access>
10348                    </field>
10349                    <field>
10350                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10351                        <bitRange>[22:22]</bitRange>
10352                        <access>read-only</access>
10353                    </field>
10354                    <field>
10355                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10356                        <bitRange>[21:21]</bitRange>
10357                        <access>read-only</access>
10358                    </field>
10359                    <field>
10360                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10361                        <bitRange>[20:20]</bitRange>
10362                        <access>read-only</access>
10363                    </field>
10364                    <field>
10365                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10366                        <bitRange>[19:19]</bitRange>
10367                        <access>read-only</access>
10368                    </field>
10369                    <field>
10370                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10371                        <bitRange>[18:18]</bitRange>
10372                        <access>read-only</access>
10373                    </field>
10374                    <field>
10375                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10376                        <bitRange>[17:17]</bitRange>
10377                        <access>read-only</access>
10378                    </field>
10379                    <field>
10380                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10381                        <bitRange>[16:16]</bitRange>
10382                        <access>read-only</access>
10383                    </field>
10384                    <field>
10385                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10386                        <bitRange>[15:15]</bitRange>
10387                        <access>read-only</access>
10388                    </field>
10389                    <field>
10390                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10391                        <bitRange>[14:14]</bitRange>
10392                        <access>read-only</access>
10393                    </field>
10394                    <field>
10395                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10396                        <bitRange>[13:13]</bitRange>
10397                        <access>read-only</access>
10398                    </field>
10399                    <field>
10400                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10401                        <bitRange>[12:12]</bitRange>
10402                        <access>read-only</access>
10403                    </field>
10404                    <field>
10405                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10406                        <bitRange>[11:11]</bitRange>
10407                        <access>read-only</access>
10408                    </field>
10409                    <field>
10410                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10411                        <bitRange>[10:10]</bitRange>
10412                        <access>read-only</access>
10413                    </field>
10414                    <field>
10415                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10416                        <bitRange>[9:9]</bitRange>
10417                        <access>read-only</access>
10418                    </field>
10419                    <field>
10420                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10421                        <bitRange>[8:8]</bitRange>
10422                        <access>read-only</access>
10423                    </field>
10424                    <field>
10425                        <name>USBPHY_DM_EDGE_HIGH</name>
10426                        <bitRange>[7:7]</bitRange>
10427                        <access>read-only</access>
10428                    </field>
10429                    <field>
10430                        <name>USBPHY_DM_EDGE_LOW</name>
10431                        <bitRange>[6:6]</bitRange>
10432                        <access>read-only</access>
10433                    </field>
10434                    <field>
10435                        <name>USBPHY_DM_LEVEL_HIGH</name>
10436                        <bitRange>[5:5]</bitRange>
10437                        <access>read-only</access>
10438                    </field>
10439                    <field>
10440                        <name>USBPHY_DM_LEVEL_LOW</name>
10441                        <bitRange>[4:4]</bitRange>
10442                        <access>read-only</access>
10443                    </field>
10444                    <field>
10445                        <name>USBPHY_DP_EDGE_HIGH</name>
10446                        <bitRange>[3:3]</bitRange>
10447                        <access>read-only</access>
10448                    </field>
10449                    <field>
10450                        <name>USBPHY_DP_EDGE_LOW</name>
10451                        <bitRange>[2:2]</bitRange>
10452                        <access>read-only</access>
10453                    </field>
10454                    <field>
10455                        <name>USBPHY_DP_LEVEL_HIGH</name>
10456                        <bitRange>[1:1]</bitRange>
10457                        <access>read-only</access>
10458                    </field>
10459                    <field>
10460                        <name>USBPHY_DP_LEVEL_LOW</name>
10461                        <bitRange>[0:0]</bitRange>
10462                        <access>read-only</access>
10463                    </field>
10464                </fields>
10465            </register>
10466            <register>
10467                <name>PROC1_INTE</name>
10468                <addressOffset>0x00000228</addressOffset>
10469                <description>Interrupt Enable for proc1</description>
10470                <resetValue>0x00000000</resetValue>
10471                <fields>
10472                    <field>
10473                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10474                        <bitRange>[31:31]</bitRange>
10475                        <access>read-write</access>
10476                    </field>
10477                    <field>
10478                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10479                        <bitRange>[30:30]</bitRange>
10480                        <access>read-write</access>
10481                    </field>
10482                    <field>
10483                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10484                        <bitRange>[29:29]</bitRange>
10485                        <access>read-write</access>
10486                    </field>
10487                    <field>
10488                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10489                        <bitRange>[28:28]</bitRange>
10490                        <access>read-write</access>
10491                    </field>
10492                    <field>
10493                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10494                        <bitRange>[27:27]</bitRange>
10495                        <access>read-write</access>
10496                    </field>
10497                    <field>
10498                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
10499                        <bitRange>[26:26]</bitRange>
10500                        <access>read-write</access>
10501                    </field>
10502                    <field>
10503                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10504                        <bitRange>[25:25]</bitRange>
10505                        <access>read-write</access>
10506                    </field>
10507                    <field>
10508                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10509                        <bitRange>[24:24]</bitRange>
10510                        <access>read-write</access>
10511                    </field>
10512                    <field>
10513                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10514                        <bitRange>[23:23]</bitRange>
10515                        <access>read-write</access>
10516                    </field>
10517                    <field>
10518                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10519                        <bitRange>[22:22]</bitRange>
10520                        <access>read-write</access>
10521                    </field>
10522                    <field>
10523                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10524                        <bitRange>[21:21]</bitRange>
10525                        <access>read-write</access>
10526                    </field>
10527                    <field>
10528                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10529                        <bitRange>[20:20]</bitRange>
10530                        <access>read-write</access>
10531                    </field>
10532                    <field>
10533                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10534                        <bitRange>[19:19]</bitRange>
10535                        <access>read-write</access>
10536                    </field>
10537                    <field>
10538                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10539                        <bitRange>[18:18]</bitRange>
10540                        <access>read-write</access>
10541                    </field>
10542                    <field>
10543                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10544                        <bitRange>[17:17]</bitRange>
10545                        <access>read-write</access>
10546                    </field>
10547                    <field>
10548                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10549                        <bitRange>[16:16]</bitRange>
10550                        <access>read-write</access>
10551                    </field>
10552                    <field>
10553                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10554                        <bitRange>[15:15]</bitRange>
10555                        <access>read-write</access>
10556                    </field>
10557                    <field>
10558                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10559                        <bitRange>[14:14]</bitRange>
10560                        <access>read-write</access>
10561                    </field>
10562                    <field>
10563                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10564                        <bitRange>[13:13]</bitRange>
10565                        <access>read-write</access>
10566                    </field>
10567                    <field>
10568                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10569                        <bitRange>[12:12]</bitRange>
10570                        <access>read-write</access>
10571                    </field>
10572                    <field>
10573                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10574                        <bitRange>[11:11]</bitRange>
10575                        <access>read-write</access>
10576                    </field>
10577                    <field>
10578                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10579                        <bitRange>[10:10]</bitRange>
10580                        <access>read-write</access>
10581                    </field>
10582                    <field>
10583                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10584                        <bitRange>[9:9]</bitRange>
10585                        <access>read-write</access>
10586                    </field>
10587                    <field>
10588                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10589                        <bitRange>[8:8]</bitRange>
10590                        <access>read-write</access>
10591                    </field>
10592                    <field>
10593                        <name>USBPHY_DM_EDGE_HIGH</name>
10594                        <bitRange>[7:7]</bitRange>
10595                        <access>read-write</access>
10596                    </field>
10597                    <field>
10598                        <name>USBPHY_DM_EDGE_LOW</name>
10599                        <bitRange>[6:6]</bitRange>
10600                        <access>read-write</access>
10601                    </field>
10602                    <field>
10603                        <name>USBPHY_DM_LEVEL_HIGH</name>
10604                        <bitRange>[5:5]</bitRange>
10605                        <access>read-write</access>
10606                    </field>
10607                    <field>
10608                        <name>USBPHY_DM_LEVEL_LOW</name>
10609                        <bitRange>[4:4]</bitRange>
10610                        <access>read-write</access>
10611                    </field>
10612                    <field>
10613                        <name>USBPHY_DP_EDGE_HIGH</name>
10614                        <bitRange>[3:3]</bitRange>
10615                        <access>read-write</access>
10616                    </field>
10617                    <field>
10618                        <name>USBPHY_DP_EDGE_LOW</name>
10619                        <bitRange>[2:2]</bitRange>
10620                        <access>read-write</access>
10621                    </field>
10622                    <field>
10623                        <name>USBPHY_DP_LEVEL_HIGH</name>
10624                        <bitRange>[1:1]</bitRange>
10625                        <access>read-write</access>
10626                    </field>
10627                    <field>
10628                        <name>USBPHY_DP_LEVEL_LOW</name>
10629                        <bitRange>[0:0]</bitRange>
10630                        <access>read-write</access>
10631                    </field>
10632                </fields>
10633            </register>
10634            <register>
10635                <name>PROC1_INTF</name>
10636                <addressOffset>0x0000022c</addressOffset>
10637                <description>Interrupt Force for proc1</description>
10638                <resetValue>0x00000000</resetValue>
10639                <fields>
10640                    <field>
10641                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10642                        <bitRange>[31:31]</bitRange>
10643                        <access>read-write</access>
10644                    </field>
10645                    <field>
10646                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10647                        <bitRange>[30:30]</bitRange>
10648                        <access>read-write</access>
10649                    </field>
10650                    <field>
10651                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10652                        <bitRange>[29:29]</bitRange>
10653                        <access>read-write</access>
10654                    </field>
10655                    <field>
10656                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10657                        <bitRange>[28:28]</bitRange>
10658                        <access>read-write</access>
10659                    </field>
10660                    <field>
10661                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10662                        <bitRange>[27:27]</bitRange>
10663                        <access>read-write</access>
10664                    </field>
10665                    <field>
10666                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
10667                        <bitRange>[26:26]</bitRange>
10668                        <access>read-write</access>
10669                    </field>
10670                    <field>
10671                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10672                        <bitRange>[25:25]</bitRange>
10673                        <access>read-write</access>
10674                    </field>
10675                    <field>
10676                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10677                        <bitRange>[24:24]</bitRange>
10678                        <access>read-write</access>
10679                    </field>
10680                    <field>
10681                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10682                        <bitRange>[23:23]</bitRange>
10683                        <access>read-write</access>
10684                    </field>
10685                    <field>
10686                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10687                        <bitRange>[22:22]</bitRange>
10688                        <access>read-write</access>
10689                    </field>
10690                    <field>
10691                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10692                        <bitRange>[21:21]</bitRange>
10693                        <access>read-write</access>
10694                    </field>
10695                    <field>
10696                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10697                        <bitRange>[20:20]</bitRange>
10698                        <access>read-write</access>
10699                    </field>
10700                    <field>
10701                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10702                        <bitRange>[19:19]</bitRange>
10703                        <access>read-write</access>
10704                    </field>
10705                    <field>
10706                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10707                        <bitRange>[18:18]</bitRange>
10708                        <access>read-write</access>
10709                    </field>
10710                    <field>
10711                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10712                        <bitRange>[17:17]</bitRange>
10713                        <access>read-write</access>
10714                    </field>
10715                    <field>
10716                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10717                        <bitRange>[16:16]</bitRange>
10718                        <access>read-write</access>
10719                    </field>
10720                    <field>
10721                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10722                        <bitRange>[15:15]</bitRange>
10723                        <access>read-write</access>
10724                    </field>
10725                    <field>
10726                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10727                        <bitRange>[14:14]</bitRange>
10728                        <access>read-write</access>
10729                    </field>
10730                    <field>
10731                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10732                        <bitRange>[13:13]</bitRange>
10733                        <access>read-write</access>
10734                    </field>
10735                    <field>
10736                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10737                        <bitRange>[12:12]</bitRange>
10738                        <access>read-write</access>
10739                    </field>
10740                    <field>
10741                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10742                        <bitRange>[11:11]</bitRange>
10743                        <access>read-write</access>
10744                    </field>
10745                    <field>
10746                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10747                        <bitRange>[10:10]</bitRange>
10748                        <access>read-write</access>
10749                    </field>
10750                    <field>
10751                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10752                        <bitRange>[9:9]</bitRange>
10753                        <access>read-write</access>
10754                    </field>
10755                    <field>
10756                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10757                        <bitRange>[8:8]</bitRange>
10758                        <access>read-write</access>
10759                    </field>
10760                    <field>
10761                        <name>USBPHY_DM_EDGE_HIGH</name>
10762                        <bitRange>[7:7]</bitRange>
10763                        <access>read-write</access>
10764                    </field>
10765                    <field>
10766                        <name>USBPHY_DM_EDGE_LOW</name>
10767                        <bitRange>[6:6]</bitRange>
10768                        <access>read-write</access>
10769                    </field>
10770                    <field>
10771                        <name>USBPHY_DM_LEVEL_HIGH</name>
10772                        <bitRange>[5:5]</bitRange>
10773                        <access>read-write</access>
10774                    </field>
10775                    <field>
10776                        <name>USBPHY_DM_LEVEL_LOW</name>
10777                        <bitRange>[4:4]</bitRange>
10778                        <access>read-write</access>
10779                    </field>
10780                    <field>
10781                        <name>USBPHY_DP_EDGE_HIGH</name>
10782                        <bitRange>[3:3]</bitRange>
10783                        <access>read-write</access>
10784                    </field>
10785                    <field>
10786                        <name>USBPHY_DP_EDGE_LOW</name>
10787                        <bitRange>[2:2]</bitRange>
10788                        <access>read-write</access>
10789                    </field>
10790                    <field>
10791                        <name>USBPHY_DP_LEVEL_HIGH</name>
10792                        <bitRange>[1:1]</bitRange>
10793                        <access>read-write</access>
10794                    </field>
10795                    <field>
10796                        <name>USBPHY_DP_LEVEL_LOW</name>
10797                        <bitRange>[0:0]</bitRange>
10798                        <access>read-write</access>
10799                    </field>
10800                </fields>
10801            </register>
10802            <register>
10803                <name>PROC1_INTS</name>
10804                <addressOffset>0x00000230</addressOffset>
10805                <description>Interrupt status after masking &amp; forcing for proc1</description>
10806                <resetValue>0x00000000</resetValue>
10807                <fields>
10808                    <field>
10809                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10810                        <bitRange>[31:31]</bitRange>
10811                        <access>read-only</access>
10812                    </field>
10813                    <field>
10814                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10815                        <bitRange>[30:30]</bitRange>
10816                        <access>read-only</access>
10817                    </field>
10818                    <field>
10819                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10820                        <bitRange>[29:29]</bitRange>
10821                        <access>read-only</access>
10822                    </field>
10823                    <field>
10824                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10825                        <bitRange>[28:28]</bitRange>
10826                        <access>read-only</access>
10827                    </field>
10828                    <field>
10829                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10830                        <bitRange>[27:27]</bitRange>
10831                        <access>read-only</access>
10832                    </field>
10833                    <field>
10834                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
10835                        <bitRange>[26:26]</bitRange>
10836                        <access>read-only</access>
10837                    </field>
10838                    <field>
10839                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
10840                        <bitRange>[25:25]</bitRange>
10841                        <access>read-only</access>
10842                    </field>
10843                    <field>
10844                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
10845                        <bitRange>[24:24]</bitRange>
10846                        <access>read-only</access>
10847                    </field>
10848                    <field>
10849                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
10850                        <bitRange>[23:23]</bitRange>
10851                        <access>read-only</access>
10852                    </field>
10853                    <field>
10854                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
10855                        <bitRange>[22:22]</bitRange>
10856                        <access>read-only</access>
10857                    </field>
10858                    <field>
10859                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
10860                        <bitRange>[21:21]</bitRange>
10861                        <access>read-only</access>
10862                    </field>
10863                    <field>
10864                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
10865                        <bitRange>[20:20]</bitRange>
10866                        <access>read-only</access>
10867                    </field>
10868                    <field>
10869                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
10870                        <bitRange>[19:19]</bitRange>
10871                        <access>read-only</access>
10872                    </field>
10873                    <field>
10874                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
10875                        <bitRange>[18:18]</bitRange>
10876                        <access>read-only</access>
10877                    </field>
10878                    <field>
10879                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
10880                        <bitRange>[17:17]</bitRange>
10881                        <access>read-only</access>
10882                    </field>
10883                    <field>
10884                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
10885                        <bitRange>[16:16]</bitRange>
10886                        <access>read-only</access>
10887                    </field>
10888                    <field>
10889                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
10890                        <bitRange>[15:15]</bitRange>
10891                        <access>read-only</access>
10892                    </field>
10893                    <field>
10894                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
10895                        <bitRange>[14:14]</bitRange>
10896                        <access>read-only</access>
10897                    </field>
10898                    <field>
10899                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
10900                        <bitRange>[13:13]</bitRange>
10901                        <access>read-only</access>
10902                    </field>
10903                    <field>
10904                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
10905                        <bitRange>[12:12]</bitRange>
10906                        <access>read-only</access>
10907                    </field>
10908                    <field>
10909                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
10910                        <bitRange>[11:11]</bitRange>
10911                        <access>read-only</access>
10912                    </field>
10913                    <field>
10914                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
10915                        <bitRange>[10:10]</bitRange>
10916                        <access>read-only</access>
10917                    </field>
10918                    <field>
10919                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
10920                        <bitRange>[9:9]</bitRange>
10921                        <access>read-only</access>
10922                    </field>
10923                    <field>
10924                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
10925                        <bitRange>[8:8]</bitRange>
10926                        <access>read-only</access>
10927                    </field>
10928                    <field>
10929                        <name>USBPHY_DM_EDGE_HIGH</name>
10930                        <bitRange>[7:7]</bitRange>
10931                        <access>read-only</access>
10932                    </field>
10933                    <field>
10934                        <name>USBPHY_DM_EDGE_LOW</name>
10935                        <bitRange>[6:6]</bitRange>
10936                        <access>read-only</access>
10937                    </field>
10938                    <field>
10939                        <name>USBPHY_DM_LEVEL_HIGH</name>
10940                        <bitRange>[5:5]</bitRange>
10941                        <access>read-only</access>
10942                    </field>
10943                    <field>
10944                        <name>USBPHY_DM_LEVEL_LOW</name>
10945                        <bitRange>[4:4]</bitRange>
10946                        <access>read-only</access>
10947                    </field>
10948                    <field>
10949                        <name>USBPHY_DP_EDGE_HIGH</name>
10950                        <bitRange>[3:3]</bitRange>
10951                        <access>read-only</access>
10952                    </field>
10953                    <field>
10954                        <name>USBPHY_DP_EDGE_LOW</name>
10955                        <bitRange>[2:2]</bitRange>
10956                        <access>read-only</access>
10957                    </field>
10958                    <field>
10959                        <name>USBPHY_DP_LEVEL_HIGH</name>
10960                        <bitRange>[1:1]</bitRange>
10961                        <access>read-only</access>
10962                    </field>
10963                    <field>
10964                        <name>USBPHY_DP_LEVEL_LOW</name>
10965                        <bitRange>[0:0]</bitRange>
10966                        <access>read-only</access>
10967                    </field>
10968                </fields>
10969            </register>
10970            <register>
10971                <name>DORMANT_WAKE_INTE</name>
10972                <addressOffset>0x00000234</addressOffset>
10973                <description>Interrupt Enable for dormant_wake</description>
10974                <resetValue>0x00000000</resetValue>
10975                <fields>
10976                    <field>
10977                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
10978                        <bitRange>[31:31]</bitRange>
10979                        <access>read-write</access>
10980                    </field>
10981                    <field>
10982                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
10983                        <bitRange>[30:30]</bitRange>
10984                        <access>read-write</access>
10985                    </field>
10986                    <field>
10987                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
10988                        <bitRange>[29:29]</bitRange>
10989                        <access>read-write</access>
10990                    </field>
10991                    <field>
10992                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
10993                        <bitRange>[28:28]</bitRange>
10994                        <access>read-write</access>
10995                    </field>
10996                    <field>
10997                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
10998                        <bitRange>[27:27]</bitRange>
10999                        <access>read-write</access>
11000                    </field>
11001                    <field>
11002                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
11003                        <bitRange>[26:26]</bitRange>
11004                        <access>read-write</access>
11005                    </field>
11006                    <field>
11007                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
11008                        <bitRange>[25:25]</bitRange>
11009                        <access>read-write</access>
11010                    </field>
11011                    <field>
11012                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
11013                        <bitRange>[24:24]</bitRange>
11014                        <access>read-write</access>
11015                    </field>
11016                    <field>
11017                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
11018                        <bitRange>[23:23]</bitRange>
11019                        <access>read-write</access>
11020                    </field>
11021                    <field>
11022                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
11023                        <bitRange>[22:22]</bitRange>
11024                        <access>read-write</access>
11025                    </field>
11026                    <field>
11027                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
11028                        <bitRange>[21:21]</bitRange>
11029                        <access>read-write</access>
11030                    </field>
11031                    <field>
11032                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
11033                        <bitRange>[20:20]</bitRange>
11034                        <access>read-write</access>
11035                    </field>
11036                    <field>
11037                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
11038                        <bitRange>[19:19]</bitRange>
11039                        <access>read-write</access>
11040                    </field>
11041                    <field>
11042                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
11043                        <bitRange>[18:18]</bitRange>
11044                        <access>read-write</access>
11045                    </field>
11046                    <field>
11047                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
11048                        <bitRange>[17:17]</bitRange>
11049                        <access>read-write</access>
11050                    </field>
11051                    <field>
11052                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
11053                        <bitRange>[16:16]</bitRange>
11054                        <access>read-write</access>
11055                    </field>
11056                    <field>
11057                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
11058                        <bitRange>[15:15]</bitRange>
11059                        <access>read-write</access>
11060                    </field>
11061                    <field>
11062                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
11063                        <bitRange>[14:14]</bitRange>
11064                        <access>read-write</access>
11065                    </field>
11066                    <field>
11067                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
11068                        <bitRange>[13:13]</bitRange>
11069                        <access>read-write</access>
11070                    </field>
11071                    <field>
11072                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
11073                        <bitRange>[12:12]</bitRange>
11074                        <access>read-write</access>
11075                    </field>
11076                    <field>
11077                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
11078                        <bitRange>[11:11]</bitRange>
11079                        <access>read-write</access>
11080                    </field>
11081                    <field>
11082                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
11083                        <bitRange>[10:10]</bitRange>
11084                        <access>read-write</access>
11085                    </field>
11086                    <field>
11087                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
11088                        <bitRange>[9:9]</bitRange>
11089                        <access>read-write</access>
11090                    </field>
11091                    <field>
11092                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
11093                        <bitRange>[8:8]</bitRange>
11094                        <access>read-write</access>
11095                    </field>
11096                    <field>
11097                        <name>USBPHY_DM_EDGE_HIGH</name>
11098                        <bitRange>[7:7]</bitRange>
11099                        <access>read-write</access>
11100                    </field>
11101                    <field>
11102                        <name>USBPHY_DM_EDGE_LOW</name>
11103                        <bitRange>[6:6]</bitRange>
11104                        <access>read-write</access>
11105                    </field>
11106                    <field>
11107                        <name>USBPHY_DM_LEVEL_HIGH</name>
11108                        <bitRange>[5:5]</bitRange>
11109                        <access>read-write</access>
11110                    </field>
11111                    <field>
11112                        <name>USBPHY_DM_LEVEL_LOW</name>
11113                        <bitRange>[4:4]</bitRange>
11114                        <access>read-write</access>
11115                    </field>
11116                    <field>
11117                        <name>USBPHY_DP_EDGE_HIGH</name>
11118                        <bitRange>[3:3]</bitRange>
11119                        <access>read-write</access>
11120                    </field>
11121                    <field>
11122                        <name>USBPHY_DP_EDGE_LOW</name>
11123                        <bitRange>[2:2]</bitRange>
11124                        <access>read-write</access>
11125                    </field>
11126                    <field>
11127                        <name>USBPHY_DP_LEVEL_HIGH</name>
11128                        <bitRange>[1:1]</bitRange>
11129                        <access>read-write</access>
11130                    </field>
11131                    <field>
11132                        <name>USBPHY_DP_LEVEL_LOW</name>
11133                        <bitRange>[0:0]</bitRange>
11134                        <access>read-write</access>
11135                    </field>
11136                </fields>
11137            </register>
11138            <register>
11139                <name>DORMANT_WAKE_INTF</name>
11140                <addressOffset>0x00000238</addressOffset>
11141                <description>Interrupt Force for dormant_wake</description>
11142                <resetValue>0x00000000</resetValue>
11143                <fields>
11144                    <field>
11145                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
11146                        <bitRange>[31:31]</bitRange>
11147                        <access>read-write</access>
11148                    </field>
11149                    <field>
11150                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
11151                        <bitRange>[30:30]</bitRange>
11152                        <access>read-write</access>
11153                    </field>
11154                    <field>
11155                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
11156                        <bitRange>[29:29]</bitRange>
11157                        <access>read-write</access>
11158                    </field>
11159                    <field>
11160                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
11161                        <bitRange>[28:28]</bitRange>
11162                        <access>read-write</access>
11163                    </field>
11164                    <field>
11165                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
11166                        <bitRange>[27:27]</bitRange>
11167                        <access>read-write</access>
11168                    </field>
11169                    <field>
11170                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
11171                        <bitRange>[26:26]</bitRange>
11172                        <access>read-write</access>
11173                    </field>
11174                    <field>
11175                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
11176                        <bitRange>[25:25]</bitRange>
11177                        <access>read-write</access>
11178                    </field>
11179                    <field>
11180                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
11181                        <bitRange>[24:24]</bitRange>
11182                        <access>read-write</access>
11183                    </field>
11184                    <field>
11185                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
11186                        <bitRange>[23:23]</bitRange>
11187                        <access>read-write</access>
11188                    </field>
11189                    <field>
11190                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
11191                        <bitRange>[22:22]</bitRange>
11192                        <access>read-write</access>
11193                    </field>
11194                    <field>
11195                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
11196                        <bitRange>[21:21]</bitRange>
11197                        <access>read-write</access>
11198                    </field>
11199                    <field>
11200                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
11201                        <bitRange>[20:20]</bitRange>
11202                        <access>read-write</access>
11203                    </field>
11204                    <field>
11205                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
11206                        <bitRange>[19:19]</bitRange>
11207                        <access>read-write</access>
11208                    </field>
11209                    <field>
11210                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
11211                        <bitRange>[18:18]</bitRange>
11212                        <access>read-write</access>
11213                    </field>
11214                    <field>
11215                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
11216                        <bitRange>[17:17]</bitRange>
11217                        <access>read-write</access>
11218                    </field>
11219                    <field>
11220                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
11221                        <bitRange>[16:16]</bitRange>
11222                        <access>read-write</access>
11223                    </field>
11224                    <field>
11225                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
11226                        <bitRange>[15:15]</bitRange>
11227                        <access>read-write</access>
11228                    </field>
11229                    <field>
11230                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
11231                        <bitRange>[14:14]</bitRange>
11232                        <access>read-write</access>
11233                    </field>
11234                    <field>
11235                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
11236                        <bitRange>[13:13]</bitRange>
11237                        <access>read-write</access>
11238                    </field>
11239                    <field>
11240                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
11241                        <bitRange>[12:12]</bitRange>
11242                        <access>read-write</access>
11243                    </field>
11244                    <field>
11245                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
11246                        <bitRange>[11:11]</bitRange>
11247                        <access>read-write</access>
11248                    </field>
11249                    <field>
11250                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
11251                        <bitRange>[10:10]</bitRange>
11252                        <access>read-write</access>
11253                    </field>
11254                    <field>
11255                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
11256                        <bitRange>[9:9]</bitRange>
11257                        <access>read-write</access>
11258                    </field>
11259                    <field>
11260                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
11261                        <bitRange>[8:8]</bitRange>
11262                        <access>read-write</access>
11263                    </field>
11264                    <field>
11265                        <name>USBPHY_DM_EDGE_HIGH</name>
11266                        <bitRange>[7:7]</bitRange>
11267                        <access>read-write</access>
11268                    </field>
11269                    <field>
11270                        <name>USBPHY_DM_EDGE_LOW</name>
11271                        <bitRange>[6:6]</bitRange>
11272                        <access>read-write</access>
11273                    </field>
11274                    <field>
11275                        <name>USBPHY_DM_LEVEL_HIGH</name>
11276                        <bitRange>[5:5]</bitRange>
11277                        <access>read-write</access>
11278                    </field>
11279                    <field>
11280                        <name>USBPHY_DM_LEVEL_LOW</name>
11281                        <bitRange>[4:4]</bitRange>
11282                        <access>read-write</access>
11283                    </field>
11284                    <field>
11285                        <name>USBPHY_DP_EDGE_HIGH</name>
11286                        <bitRange>[3:3]</bitRange>
11287                        <access>read-write</access>
11288                    </field>
11289                    <field>
11290                        <name>USBPHY_DP_EDGE_LOW</name>
11291                        <bitRange>[2:2]</bitRange>
11292                        <access>read-write</access>
11293                    </field>
11294                    <field>
11295                        <name>USBPHY_DP_LEVEL_HIGH</name>
11296                        <bitRange>[1:1]</bitRange>
11297                        <access>read-write</access>
11298                    </field>
11299                    <field>
11300                        <name>USBPHY_DP_LEVEL_LOW</name>
11301                        <bitRange>[0:0]</bitRange>
11302                        <access>read-write</access>
11303                    </field>
11304                </fields>
11305            </register>
11306            <register>
11307                <name>DORMANT_WAKE_INTS</name>
11308                <addressOffset>0x0000023c</addressOffset>
11309                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
11310                <resetValue>0x00000000</resetValue>
11311                <fields>
11312                    <field>
11313                        <name>GPIO_QSPI_SD3_EDGE_HIGH</name>
11314                        <bitRange>[31:31]</bitRange>
11315                        <access>read-only</access>
11316                    </field>
11317                    <field>
11318                        <name>GPIO_QSPI_SD3_EDGE_LOW</name>
11319                        <bitRange>[30:30]</bitRange>
11320                        <access>read-only</access>
11321                    </field>
11322                    <field>
11323                        <name>GPIO_QSPI_SD3_LEVEL_HIGH</name>
11324                        <bitRange>[29:29]</bitRange>
11325                        <access>read-only</access>
11326                    </field>
11327                    <field>
11328                        <name>GPIO_QSPI_SD3_LEVEL_LOW</name>
11329                        <bitRange>[28:28]</bitRange>
11330                        <access>read-only</access>
11331                    </field>
11332                    <field>
11333                        <name>GPIO_QSPI_SD2_EDGE_HIGH</name>
11334                        <bitRange>[27:27]</bitRange>
11335                        <access>read-only</access>
11336                    </field>
11337                    <field>
11338                        <name>GPIO_QSPI_SD2_EDGE_LOW</name>
11339                        <bitRange>[26:26]</bitRange>
11340                        <access>read-only</access>
11341                    </field>
11342                    <field>
11343                        <name>GPIO_QSPI_SD2_LEVEL_HIGH</name>
11344                        <bitRange>[25:25]</bitRange>
11345                        <access>read-only</access>
11346                    </field>
11347                    <field>
11348                        <name>GPIO_QSPI_SD2_LEVEL_LOW</name>
11349                        <bitRange>[24:24]</bitRange>
11350                        <access>read-only</access>
11351                    </field>
11352                    <field>
11353                        <name>GPIO_QSPI_SD1_EDGE_HIGH</name>
11354                        <bitRange>[23:23]</bitRange>
11355                        <access>read-only</access>
11356                    </field>
11357                    <field>
11358                        <name>GPIO_QSPI_SD1_EDGE_LOW</name>
11359                        <bitRange>[22:22]</bitRange>
11360                        <access>read-only</access>
11361                    </field>
11362                    <field>
11363                        <name>GPIO_QSPI_SD1_LEVEL_HIGH</name>
11364                        <bitRange>[21:21]</bitRange>
11365                        <access>read-only</access>
11366                    </field>
11367                    <field>
11368                        <name>GPIO_QSPI_SD1_LEVEL_LOW</name>
11369                        <bitRange>[20:20]</bitRange>
11370                        <access>read-only</access>
11371                    </field>
11372                    <field>
11373                        <name>GPIO_QSPI_SD0_EDGE_HIGH</name>
11374                        <bitRange>[19:19]</bitRange>
11375                        <access>read-only</access>
11376                    </field>
11377                    <field>
11378                        <name>GPIO_QSPI_SD0_EDGE_LOW</name>
11379                        <bitRange>[18:18]</bitRange>
11380                        <access>read-only</access>
11381                    </field>
11382                    <field>
11383                        <name>GPIO_QSPI_SD0_LEVEL_HIGH</name>
11384                        <bitRange>[17:17]</bitRange>
11385                        <access>read-only</access>
11386                    </field>
11387                    <field>
11388                        <name>GPIO_QSPI_SD0_LEVEL_LOW</name>
11389                        <bitRange>[16:16]</bitRange>
11390                        <access>read-only</access>
11391                    </field>
11392                    <field>
11393                        <name>GPIO_QSPI_SS_EDGE_HIGH</name>
11394                        <bitRange>[15:15]</bitRange>
11395                        <access>read-only</access>
11396                    </field>
11397                    <field>
11398                        <name>GPIO_QSPI_SS_EDGE_LOW</name>
11399                        <bitRange>[14:14]</bitRange>
11400                        <access>read-only</access>
11401                    </field>
11402                    <field>
11403                        <name>GPIO_QSPI_SS_LEVEL_HIGH</name>
11404                        <bitRange>[13:13]</bitRange>
11405                        <access>read-only</access>
11406                    </field>
11407                    <field>
11408                        <name>GPIO_QSPI_SS_LEVEL_LOW</name>
11409                        <bitRange>[12:12]</bitRange>
11410                        <access>read-only</access>
11411                    </field>
11412                    <field>
11413                        <name>GPIO_QSPI_SCLK_EDGE_HIGH</name>
11414                        <bitRange>[11:11]</bitRange>
11415                        <access>read-only</access>
11416                    </field>
11417                    <field>
11418                        <name>GPIO_QSPI_SCLK_EDGE_LOW</name>
11419                        <bitRange>[10:10]</bitRange>
11420                        <access>read-only</access>
11421                    </field>
11422                    <field>
11423                        <name>GPIO_QSPI_SCLK_LEVEL_HIGH</name>
11424                        <bitRange>[9:9]</bitRange>
11425                        <access>read-only</access>
11426                    </field>
11427                    <field>
11428                        <name>GPIO_QSPI_SCLK_LEVEL_LOW</name>
11429                        <bitRange>[8:8]</bitRange>
11430                        <access>read-only</access>
11431                    </field>
11432                    <field>
11433                        <name>USBPHY_DM_EDGE_HIGH</name>
11434                        <bitRange>[7:7]</bitRange>
11435                        <access>read-only</access>
11436                    </field>
11437                    <field>
11438                        <name>USBPHY_DM_EDGE_LOW</name>
11439                        <bitRange>[6:6]</bitRange>
11440                        <access>read-only</access>
11441                    </field>
11442                    <field>
11443                        <name>USBPHY_DM_LEVEL_HIGH</name>
11444                        <bitRange>[5:5]</bitRange>
11445                        <access>read-only</access>
11446                    </field>
11447                    <field>
11448                        <name>USBPHY_DM_LEVEL_LOW</name>
11449                        <bitRange>[4:4]</bitRange>
11450                        <access>read-only</access>
11451                    </field>
11452                    <field>
11453                        <name>USBPHY_DP_EDGE_HIGH</name>
11454                        <bitRange>[3:3]</bitRange>
11455                        <access>read-only</access>
11456                    </field>
11457                    <field>
11458                        <name>USBPHY_DP_EDGE_LOW</name>
11459                        <bitRange>[2:2]</bitRange>
11460                        <access>read-only</access>
11461                    </field>
11462                    <field>
11463                        <name>USBPHY_DP_LEVEL_HIGH</name>
11464                        <bitRange>[1:1]</bitRange>
11465                        <access>read-only</access>
11466                    </field>
11467                    <field>
11468                        <name>USBPHY_DP_LEVEL_LOW</name>
11469                        <bitRange>[0:0]</bitRange>
11470                        <access>read-only</access>
11471                    </field>
11472                </fields>
11473            </register>
11474        </registers>
11475    </peripheral>
11476    <peripheral>
11477        <name>IO_BANK0</name>
11478        <baseAddress>0x40028000</baseAddress>
11479        <addressBlock>
11480            <offset>0</offset>
11481            <size>800</size>
11482            <usage>registers</usage>
11483        </addressBlock>
11484        <interrupt>
11485            <name>IO_IRQ_BANK0</name>
11486            <value>21</value>
11487        </interrupt>
11488        <interrupt>
11489            <name>IO_IRQ_BANK0_NS</name>
11490            <value>22</value>
11491        </interrupt>
11492        <registers>
11493            <register>
11494                <name>GPIO0_STATUS</name>
11495                <addressOffset>0x00000000</addressOffset>
11496                <resetValue>0x00000000</resetValue>
11497                <fields>
11498                    <field>
11499                        <name>IRQTOPROC</name>
11500                        <description>interrupt to processors, after override is applied</description>
11501                        <bitRange>[26:26]</bitRange>
11502                        <access>read-only</access>
11503                    </field>
11504                    <field>
11505                        <name>INFROMPAD</name>
11506                        <description>input signal from pad, before filtering and override are applied</description>
11507                        <bitRange>[17:17]</bitRange>
11508                        <access>read-only</access>
11509                    </field>
11510                    <field>
11511                        <name>OETOPAD</name>
11512                        <description>output enable to pad after register override is applied</description>
11513                        <bitRange>[13:13]</bitRange>
11514                        <access>read-only</access>
11515                    </field>
11516                    <field>
11517                        <name>OUTTOPAD</name>
11518                        <description>output signal to pad after register override is applied</description>
11519                        <bitRange>[9:9]</bitRange>
11520                        <access>read-only</access>
11521                    </field>
11522                </fields>
11523            </register>
11524            <register>
11525                <name>GPIO0_CTRL</name>
11526                <addressOffset>0x00000004</addressOffset>
11527                <resetValue>0x0000001f</resetValue>
11528                <fields>
11529                    <field>
11530                        <name>IRQOVER</name>
11531                        <bitRange>[29:28]</bitRange>
11532                        <access>read-write</access>
11533                        <enumeratedValues>
11534                            <enumeratedValue>
11535                                <name>NORMAL</name>
11536                                <value>0</value>
11537                                <description>don&#39;t invert the interrupt</description>
11538                            </enumeratedValue>
11539                            <enumeratedValue>
11540                                <name>INVERT</name>
11541                                <value>1</value>
11542                                <description>invert the interrupt</description>
11543                            </enumeratedValue>
11544                            <enumeratedValue>
11545                                <name>LOW</name>
11546                                <value>2</value>
11547                                <description>drive interrupt low</description>
11548                            </enumeratedValue>
11549                            <enumeratedValue>
11550                                <name>HIGH</name>
11551                                <value>3</value>
11552                                <description>drive interrupt high</description>
11553                            </enumeratedValue>
11554                        </enumeratedValues>
11555                    </field>
11556                    <field>
11557                        <name>INOVER</name>
11558                        <bitRange>[17:16]</bitRange>
11559                        <access>read-write</access>
11560                        <enumeratedValues>
11561                            <enumeratedValue>
11562                                <name>NORMAL</name>
11563                                <value>0</value>
11564                                <description>don&#39;t invert the peri input</description>
11565                            </enumeratedValue>
11566                            <enumeratedValue>
11567                                <name>INVERT</name>
11568                                <value>1</value>
11569                                <description>invert the peri input</description>
11570                            </enumeratedValue>
11571                            <enumeratedValue>
11572                                <name>LOW</name>
11573                                <value>2</value>
11574                                <description>drive peri input low</description>
11575                            </enumeratedValue>
11576                            <enumeratedValue>
11577                                <name>HIGH</name>
11578                                <value>3</value>
11579                                <description>drive peri input high</description>
11580                            </enumeratedValue>
11581                        </enumeratedValues>
11582                    </field>
11583                    <field>
11584                        <name>OEOVER</name>
11585                        <bitRange>[15:14]</bitRange>
11586                        <access>read-write</access>
11587                        <enumeratedValues>
11588                            <enumeratedValue>
11589                                <name>NORMAL</name>
11590                                <value>0</value>
11591                                <description>drive output enable from peripheral signal selected by funcsel</description>
11592                            </enumeratedValue>
11593                            <enumeratedValue>
11594                                <name>INVERT</name>
11595                                <value>1</value>
11596                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
11597                            </enumeratedValue>
11598                            <enumeratedValue>
11599                                <name>DISABLE</name>
11600                                <value>2</value>
11601                                <description>disable output</description>
11602                            </enumeratedValue>
11603                            <enumeratedValue>
11604                                <name>ENABLE</name>
11605                                <value>3</value>
11606                                <description>enable output</description>
11607                            </enumeratedValue>
11608                        </enumeratedValues>
11609                    </field>
11610                    <field>
11611                        <name>OUTOVER</name>
11612                        <bitRange>[13:12]</bitRange>
11613                        <access>read-write</access>
11614                        <enumeratedValues>
11615                            <enumeratedValue>
11616                                <name>NORMAL</name>
11617                                <value>0</value>
11618                                <description>drive output from peripheral signal selected by funcsel</description>
11619                            </enumeratedValue>
11620                            <enumeratedValue>
11621                                <name>INVERT</name>
11622                                <value>1</value>
11623                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
11624                            </enumeratedValue>
11625                            <enumeratedValue>
11626                                <name>LOW</name>
11627                                <value>2</value>
11628                                <description>drive output low</description>
11629                            </enumeratedValue>
11630                            <enumeratedValue>
11631                                <name>HIGH</name>
11632                                <value>3</value>
11633                                <description>drive output high</description>
11634                            </enumeratedValue>
11635                        </enumeratedValues>
11636                    </field>
11637                    <field>
11638                        <name>FUNCSEL</name>
11639                        <description>0-31 -&gt; selects pin function according to the gpio table
11640                            31 == NULL</description>
11641                        <bitRange>[4:0]</bitRange>
11642                        <access>read-write</access>
11643                        <enumeratedValues>
11644                            <enumeratedValue>
11645                                <name>jtag_tck</name>
11646                                <value>0</value>
11647                            </enumeratedValue>
11648                            <enumeratedValue>
11649                                <name>spi0_rx</name>
11650                                <value>1</value>
11651                            </enumeratedValue>
11652                            <enumeratedValue>
11653                                <name>uart0_tx</name>
11654                                <value>2</value>
11655                            </enumeratedValue>
11656                            <enumeratedValue>
11657                                <name>i2c0_sda</name>
11658                                <value>3</value>
11659                            </enumeratedValue>
11660                            <enumeratedValue>
11661                                <name>pwm_a_0</name>
11662                                <value>4</value>
11663                            </enumeratedValue>
11664                            <enumeratedValue>
11665                                <name>siob_proc_0</name>
11666                                <value>5</value>
11667                            </enumeratedValue>
11668                            <enumeratedValue>
11669                                <name>pio0_0</name>
11670                                <value>6</value>
11671                            </enumeratedValue>
11672                            <enumeratedValue>
11673                                <name>pio1_0</name>
11674                                <value>7</value>
11675                            </enumeratedValue>
11676                            <enumeratedValue>
11677                                <name>pio2_0</name>
11678                                <value>8</value>
11679                            </enumeratedValue>
11680                            <enumeratedValue>
11681                                <name>xip_ss_n_1</name>
11682                                <value>9</value>
11683                            </enumeratedValue>
11684                            <enumeratedValue>
11685                                <name>usb_muxing_overcurr_detect</name>
11686                                <value>10</value>
11687                            </enumeratedValue>
11688                            <enumeratedValue>
11689                                <name>null</name>
11690                                <value>31</value>
11691                            </enumeratedValue>
11692                        </enumeratedValues>
11693                    </field>
11694                </fields>
11695            </register>
11696            <register>
11697                <name>GPIO1_STATUS</name>
11698                <addressOffset>0x00000008</addressOffset>
11699                <resetValue>0x00000000</resetValue>
11700                <fields>
11701                    <field>
11702                        <name>IRQTOPROC</name>
11703                        <description>interrupt to processors, after override is applied</description>
11704                        <bitRange>[26:26]</bitRange>
11705                        <access>read-only</access>
11706                    </field>
11707                    <field>
11708                        <name>INFROMPAD</name>
11709                        <description>input signal from pad, before filtering and override are applied</description>
11710                        <bitRange>[17:17]</bitRange>
11711                        <access>read-only</access>
11712                    </field>
11713                    <field>
11714                        <name>OETOPAD</name>
11715                        <description>output enable to pad after register override is applied</description>
11716                        <bitRange>[13:13]</bitRange>
11717                        <access>read-only</access>
11718                    </field>
11719                    <field>
11720                        <name>OUTTOPAD</name>
11721                        <description>output signal to pad after register override is applied</description>
11722                        <bitRange>[9:9]</bitRange>
11723                        <access>read-only</access>
11724                    </field>
11725                </fields>
11726            </register>
11727            <register>
11728                <name>GPIO1_CTRL</name>
11729                <addressOffset>0x0000000c</addressOffset>
11730                <resetValue>0x0000001f</resetValue>
11731                <fields>
11732                    <field>
11733                        <name>IRQOVER</name>
11734                        <bitRange>[29:28]</bitRange>
11735                        <access>read-write</access>
11736                        <enumeratedValues>
11737                            <enumeratedValue>
11738                                <name>NORMAL</name>
11739                                <value>0</value>
11740                                <description>don&#39;t invert the interrupt</description>
11741                            </enumeratedValue>
11742                            <enumeratedValue>
11743                                <name>INVERT</name>
11744                                <value>1</value>
11745                                <description>invert the interrupt</description>
11746                            </enumeratedValue>
11747                            <enumeratedValue>
11748                                <name>LOW</name>
11749                                <value>2</value>
11750                                <description>drive interrupt low</description>
11751                            </enumeratedValue>
11752                            <enumeratedValue>
11753                                <name>HIGH</name>
11754                                <value>3</value>
11755                                <description>drive interrupt high</description>
11756                            </enumeratedValue>
11757                        </enumeratedValues>
11758                    </field>
11759                    <field>
11760                        <name>INOVER</name>
11761                        <bitRange>[17:16]</bitRange>
11762                        <access>read-write</access>
11763                        <enumeratedValues>
11764                            <enumeratedValue>
11765                                <name>NORMAL</name>
11766                                <value>0</value>
11767                                <description>don&#39;t invert the peri input</description>
11768                            </enumeratedValue>
11769                            <enumeratedValue>
11770                                <name>INVERT</name>
11771                                <value>1</value>
11772                                <description>invert the peri input</description>
11773                            </enumeratedValue>
11774                            <enumeratedValue>
11775                                <name>LOW</name>
11776                                <value>2</value>
11777                                <description>drive peri input low</description>
11778                            </enumeratedValue>
11779                            <enumeratedValue>
11780                                <name>HIGH</name>
11781                                <value>3</value>
11782                                <description>drive peri input high</description>
11783                            </enumeratedValue>
11784                        </enumeratedValues>
11785                    </field>
11786                    <field>
11787                        <name>OEOVER</name>
11788                        <bitRange>[15:14]</bitRange>
11789                        <access>read-write</access>
11790                        <enumeratedValues>
11791                            <enumeratedValue>
11792                                <name>NORMAL</name>
11793                                <value>0</value>
11794                                <description>drive output enable from peripheral signal selected by funcsel</description>
11795                            </enumeratedValue>
11796                            <enumeratedValue>
11797                                <name>INVERT</name>
11798                                <value>1</value>
11799                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
11800                            </enumeratedValue>
11801                            <enumeratedValue>
11802                                <name>DISABLE</name>
11803                                <value>2</value>
11804                                <description>disable output</description>
11805                            </enumeratedValue>
11806                            <enumeratedValue>
11807                                <name>ENABLE</name>
11808                                <value>3</value>
11809                                <description>enable output</description>
11810                            </enumeratedValue>
11811                        </enumeratedValues>
11812                    </field>
11813                    <field>
11814                        <name>OUTOVER</name>
11815                        <bitRange>[13:12]</bitRange>
11816                        <access>read-write</access>
11817                        <enumeratedValues>
11818                            <enumeratedValue>
11819                                <name>NORMAL</name>
11820                                <value>0</value>
11821                                <description>drive output from peripheral signal selected by funcsel</description>
11822                            </enumeratedValue>
11823                            <enumeratedValue>
11824                                <name>INVERT</name>
11825                                <value>1</value>
11826                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
11827                            </enumeratedValue>
11828                            <enumeratedValue>
11829                                <name>LOW</name>
11830                                <value>2</value>
11831                                <description>drive output low</description>
11832                            </enumeratedValue>
11833                            <enumeratedValue>
11834                                <name>HIGH</name>
11835                                <value>3</value>
11836                                <description>drive output high</description>
11837                            </enumeratedValue>
11838                        </enumeratedValues>
11839                    </field>
11840                    <field>
11841                        <name>FUNCSEL</name>
11842                        <description>0-31 -&gt; selects pin function according to the gpio table
11843                            31 == NULL</description>
11844                        <bitRange>[4:0]</bitRange>
11845                        <access>read-write</access>
11846                        <enumeratedValues>
11847                            <enumeratedValue>
11848                                <name>jtag_tms</name>
11849                                <value>0</value>
11850                            </enumeratedValue>
11851                            <enumeratedValue>
11852                                <name>spi0_ss_n</name>
11853                                <value>1</value>
11854                            </enumeratedValue>
11855                            <enumeratedValue>
11856                                <name>uart0_rx</name>
11857                                <value>2</value>
11858                            </enumeratedValue>
11859                            <enumeratedValue>
11860                                <name>i2c0_scl</name>
11861                                <value>3</value>
11862                            </enumeratedValue>
11863                            <enumeratedValue>
11864                                <name>pwm_b_0</name>
11865                                <value>4</value>
11866                            </enumeratedValue>
11867                            <enumeratedValue>
11868                                <name>siob_proc_1</name>
11869                                <value>5</value>
11870                            </enumeratedValue>
11871                            <enumeratedValue>
11872                                <name>pio0_1</name>
11873                                <value>6</value>
11874                            </enumeratedValue>
11875                            <enumeratedValue>
11876                                <name>pio1_1</name>
11877                                <value>7</value>
11878                            </enumeratedValue>
11879                            <enumeratedValue>
11880                                <name>pio2_1</name>
11881                                <value>8</value>
11882                            </enumeratedValue>
11883                            <enumeratedValue>
11884                                <name>coresight_traceclk</name>
11885                                <value>9</value>
11886                            </enumeratedValue>
11887                            <enumeratedValue>
11888                                <name>usb_muxing_vbus_detect</name>
11889                                <value>10</value>
11890                            </enumeratedValue>
11891                            <enumeratedValue>
11892                                <name>null</name>
11893                                <value>31</value>
11894                            </enumeratedValue>
11895                        </enumeratedValues>
11896                    </field>
11897                </fields>
11898            </register>
11899            <register>
11900                <name>GPIO2_STATUS</name>
11901                <addressOffset>0x00000010</addressOffset>
11902                <resetValue>0x00000000</resetValue>
11903                <fields>
11904                    <field>
11905                        <name>IRQTOPROC</name>
11906                        <description>interrupt to processors, after override is applied</description>
11907                        <bitRange>[26:26]</bitRange>
11908                        <access>read-only</access>
11909                    </field>
11910                    <field>
11911                        <name>INFROMPAD</name>
11912                        <description>input signal from pad, before filtering and override are applied</description>
11913                        <bitRange>[17:17]</bitRange>
11914                        <access>read-only</access>
11915                    </field>
11916                    <field>
11917                        <name>OETOPAD</name>
11918                        <description>output enable to pad after register override is applied</description>
11919                        <bitRange>[13:13]</bitRange>
11920                        <access>read-only</access>
11921                    </field>
11922                    <field>
11923                        <name>OUTTOPAD</name>
11924                        <description>output signal to pad after register override is applied</description>
11925                        <bitRange>[9:9]</bitRange>
11926                        <access>read-only</access>
11927                    </field>
11928                </fields>
11929            </register>
11930            <register>
11931                <name>GPIO2_CTRL</name>
11932                <addressOffset>0x00000014</addressOffset>
11933                <resetValue>0x0000001f</resetValue>
11934                <fields>
11935                    <field>
11936                        <name>IRQOVER</name>
11937                        <bitRange>[29:28]</bitRange>
11938                        <access>read-write</access>
11939                        <enumeratedValues>
11940                            <enumeratedValue>
11941                                <name>NORMAL</name>
11942                                <value>0</value>
11943                                <description>don&#39;t invert the interrupt</description>
11944                            </enumeratedValue>
11945                            <enumeratedValue>
11946                                <name>INVERT</name>
11947                                <value>1</value>
11948                                <description>invert the interrupt</description>
11949                            </enumeratedValue>
11950                            <enumeratedValue>
11951                                <name>LOW</name>
11952                                <value>2</value>
11953                                <description>drive interrupt low</description>
11954                            </enumeratedValue>
11955                            <enumeratedValue>
11956                                <name>HIGH</name>
11957                                <value>3</value>
11958                                <description>drive interrupt high</description>
11959                            </enumeratedValue>
11960                        </enumeratedValues>
11961                    </field>
11962                    <field>
11963                        <name>INOVER</name>
11964                        <bitRange>[17:16]</bitRange>
11965                        <access>read-write</access>
11966                        <enumeratedValues>
11967                            <enumeratedValue>
11968                                <name>NORMAL</name>
11969                                <value>0</value>
11970                                <description>don&#39;t invert the peri input</description>
11971                            </enumeratedValue>
11972                            <enumeratedValue>
11973                                <name>INVERT</name>
11974                                <value>1</value>
11975                                <description>invert the peri input</description>
11976                            </enumeratedValue>
11977                            <enumeratedValue>
11978                                <name>LOW</name>
11979                                <value>2</value>
11980                                <description>drive peri input low</description>
11981                            </enumeratedValue>
11982                            <enumeratedValue>
11983                                <name>HIGH</name>
11984                                <value>3</value>
11985                                <description>drive peri input high</description>
11986                            </enumeratedValue>
11987                        </enumeratedValues>
11988                    </field>
11989                    <field>
11990                        <name>OEOVER</name>
11991                        <bitRange>[15:14]</bitRange>
11992                        <access>read-write</access>
11993                        <enumeratedValues>
11994                            <enumeratedValue>
11995                                <name>NORMAL</name>
11996                                <value>0</value>
11997                                <description>drive output enable from peripheral signal selected by funcsel</description>
11998                            </enumeratedValue>
11999                            <enumeratedValue>
12000                                <name>INVERT</name>
12001                                <value>1</value>
12002                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
12003                            </enumeratedValue>
12004                            <enumeratedValue>
12005                                <name>DISABLE</name>
12006                                <value>2</value>
12007                                <description>disable output</description>
12008                            </enumeratedValue>
12009                            <enumeratedValue>
12010                                <name>ENABLE</name>
12011                                <value>3</value>
12012                                <description>enable output</description>
12013                            </enumeratedValue>
12014                        </enumeratedValues>
12015                    </field>
12016                    <field>
12017                        <name>OUTOVER</name>
12018                        <bitRange>[13:12]</bitRange>
12019                        <access>read-write</access>
12020                        <enumeratedValues>
12021                            <enumeratedValue>
12022                                <name>NORMAL</name>
12023                                <value>0</value>
12024                                <description>drive output from peripheral signal selected by funcsel</description>
12025                            </enumeratedValue>
12026                            <enumeratedValue>
12027                                <name>INVERT</name>
12028                                <value>1</value>
12029                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
12030                            </enumeratedValue>
12031                            <enumeratedValue>
12032                                <name>LOW</name>
12033                                <value>2</value>
12034                                <description>drive output low</description>
12035                            </enumeratedValue>
12036                            <enumeratedValue>
12037                                <name>HIGH</name>
12038                                <value>3</value>
12039                                <description>drive output high</description>
12040                            </enumeratedValue>
12041                        </enumeratedValues>
12042                    </field>
12043                    <field>
12044                        <name>FUNCSEL</name>
12045                        <description>0-31 -&gt; selects pin function according to the gpio table
12046                            31 == NULL</description>
12047                        <bitRange>[4:0]</bitRange>
12048                        <access>read-write</access>
12049                        <enumeratedValues>
12050                            <enumeratedValue>
12051                                <name>jtag_tdi</name>
12052                                <value>0</value>
12053                            </enumeratedValue>
12054                            <enumeratedValue>
12055                                <name>spi0_sclk</name>
12056                                <value>1</value>
12057                            </enumeratedValue>
12058                            <enumeratedValue>
12059                                <name>uart0_cts</name>
12060                                <value>2</value>
12061                            </enumeratedValue>
12062                            <enumeratedValue>
12063                                <name>i2c1_sda</name>
12064                                <value>3</value>
12065                            </enumeratedValue>
12066                            <enumeratedValue>
12067                                <name>pwm_a_1</name>
12068                                <value>4</value>
12069                            </enumeratedValue>
12070                            <enumeratedValue>
12071                                <name>siob_proc_2</name>
12072                                <value>5</value>
12073                            </enumeratedValue>
12074                            <enumeratedValue>
12075                                <name>pio0_2</name>
12076                                <value>6</value>
12077                            </enumeratedValue>
12078                            <enumeratedValue>
12079                                <name>pio1_2</name>
12080                                <value>7</value>
12081                            </enumeratedValue>
12082                            <enumeratedValue>
12083                                <name>pio2_2</name>
12084                                <value>8</value>
12085                            </enumeratedValue>
12086                            <enumeratedValue>
12087                                <name>coresight_tracedata_0</name>
12088                                <value>9</value>
12089                            </enumeratedValue>
12090                            <enumeratedValue>
12091                                <name>usb_muxing_vbus_en</name>
12092                                <value>10</value>
12093                            </enumeratedValue>
12094                            <enumeratedValue>
12095                                <name>uart0_tx</name>
12096                                <value>11</value>
12097                            </enumeratedValue>
12098                            <enumeratedValue>
12099                                <name>null</name>
12100                                <value>31</value>
12101                            </enumeratedValue>
12102                        </enumeratedValues>
12103                    </field>
12104                </fields>
12105            </register>
12106            <register>
12107                <name>GPIO3_STATUS</name>
12108                <addressOffset>0x00000018</addressOffset>
12109                <resetValue>0x00000000</resetValue>
12110                <fields>
12111                    <field>
12112                        <name>IRQTOPROC</name>
12113                        <description>interrupt to processors, after override is applied</description>
12114                        <bitRange>[26:26]</bitRange>
12115                        <access>read-only</access>
12116                    </field>
12117                    <field>
12118                        <name>INFROMPAD</name>
12119                        <description>input signal from pad, before filtering and override are applied</description>
12120                        <bitRange>[17:17]</bitRange>
12121                        <access>read-only</access>
12122                    </field>
12123                    <field>
12124                        <name>OETOPAD</name>
12125                        <description>output enable to pad after register override is applied</description>
12126                        <bitRange>[13:13]</bitRange>
12127                        <access>read-only</access>
12128                    </field>
12129                    <field>
12130                        <name>OUTTOPAD</name>
12131                        <description>output signal to pad after register override is applied</description>
12132                        <bitRange>[9:9]</bitRange>
12133                        <access>read-only</access>
12134                    </field>
12135                </fields>
12136            </register>
12137            <register>
12138                <name>GPIO3_CTRL</name>
12139                <addressOffset>0x0000001c</addressOffset>
12140                <resetValue>0x0000001f</resetValue>
12141                <fields>
12142                    <field>
12143                        <name>IRQOVER</name>
12144                        <bitRange>[29:28]</bitRange>
12145                        <access>read-write</access>
12146                        <enumeratedValues>
12147                            <enumeratedValue>
12148                                <name>NORMAL</name>
12149                                <value>0</value>
12150                                <description>don&#39;t invert the interrupt</description>
12151                            </enumeratedValue>
12152                            <enumeratedValue>
12153                                <name>INVERT</name>
12154                                <value>1</value>
12155                                <description>invert the interrupt</description>
12156                            </enumeratedValue>
12157                            <enumeratedValue>
12158                                <name>LOW</name>
12159                                <value>2</value>
12160                                <description>drive interrupt low</description>
12161                            </enumeratedValue>
12162                            <enumeratedValue>
12163                                <name>HIGH</name>
12164                                <value>3</value>
12165                                <description>drive interrupt high</description>
12166                            </enumeratedValue>
12167                        </enumeratedValues>
12168                    </field>
12169                    <field>
12170                        <name>INOVER</name>
12171                        <bitRange>[17:16]</bitRange>
12172                        <access>read-write</access>
12173                        <enumeratedValues>
12174                            <enumeratedValue>
12175                                <name>NORMAL</name>
12176                                <value>0</value>
12177                                <description>don&#39;t invert the peri input</description>
12178                            </enumeratedValue>
12179                            <enumeratedValue>
12180                                <name>INVERT</name>
12181                                <value>1</value>
12182                                <description>invert the peri input</description>
12183                            </enumeratedValue>
12184                            <enumeratedValue>
12185                                <name>LOW</name>
12186                                <value>2</value>
12187                                <description>drive peri input low</description>
12188                            </enumeratedValue>
12189                            <enumeratedValue>
12190                                <name>HIGH</name>
12191                                <value>3</value>
12192                                <description>drive peri input high</description>
12193                            </enumeratedValue>
12194                        </enumeratedValues>
12195                    </field>
12196                    <field>
12197                        <name>OEOVER</name>
12198                        <bitRange>[15:14]</bitRange>
12199                        <access>read-write</access>
12200                        <enumeratedValues>
12201                            <enumeratedValue>
12202                                <name>NORMAL</name>
12203                                <value>0</value>
12204                                <description>drive output enable from peripheral signal selected by funcsel</description>
12205                            </enumeratedValue>
12206                            <enumeratedValue>
12207                                <name>INVERT</name>
12208                                <value>1</value>
12209                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
12210                            </enumeratedValue>
12211                            <enumeratedValue>
12212                                <name>DISABLE</name>
12213                                <value>2</value>
12214                                <description>disable output</description>
12215                            </enumeratedValue>
12216                            <enumeratedValue>
12217                                <name>ENABLE</name>
12218                                <value>3</value>
12219                                <description>enable output</description>
12220                            </enumeratedValue>
12221                        </enumeratedValues>
12222                    </field>
12223                    <field>
12224                        <name>OUTOVER</name>
12225                        <bitRange>[13:12]</bitRange>
12226                        <access>read-write</access>
12227                        <enumeratedValues>
12228                            <enumeratedValue>
12229                                <name>NORMAL</name>
12230                                <value>0</value>
12231                                <description>drive output from peripheral signal selected by funcsel</description>
12232                            </enumeratedValue>
12233                            <enumeratedValue>
12234                                <name>INVERT</name>
12235                                <value>1</value>
12236                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
12237                            </enumeratedValue>
12238                            <enumeratedValue>
12239                                <name>LOW</name>
12240                                <value>2</value>
12241                                <description>drive output low</description>
12242                            </enumeratedValue>
12243                            <enumeratedValue>
12244                                <name>HIGH</name>
12245                                <value>3</value>
12246                                <description>drive output high</description>
12247                            </enumeratedValue>
12248                        </enumeratedValues>
12249                    </field>
12250                    <field>
12251                        <name>FUNCSEL</name>
12252                        <description>0-31 -&gt; selects pin function according to the gpio table
12253                            31 == NULL</description>
12254                        <bitRange>[4:0]</bitRange>
12255                        <access>read-write</access>
12256                        <enumeratedValues>
12257                            <enumeratedValue>
12258                                <name>jtag_tdo</name>
12259                                <value>0</value>
12260                            </enumeratedValue>
12261                            <enumeratedValue>
12262                                <name>spi0_tx</name>
12263                                <value>1</value>
12264                            </enumeratedValue>
12265                            <enumeratedValue>
12266                                <name>uart0_rts</name>
12267                                <value>2</value>
12268                            </enumeratedValue>
12269                            <enumeratedValue>
12270                                <name>i2c1_scl</name>
12271                                <value>3</value>
12272                            </enumeratedValue>
12273                            <enumeratedValue>
12274                                <name>pwm_b_1</name>
12275                                <value>4</value>
12276                            </enumeratedValue>
12277                            <enumeratedValue>
12278                                <name>siob_proc_3</name>
12279                                <value>5</value>
12280                            </enumeratedValue>
12281                            <enumeratedValue>
12282                                <name>pio0_3</name>
12283                                <value>6</value>
12284                            </enumeratedValue>
12285                            <enumeratedValue>
12286                                <name>pio1_3</name>
12287                                <value>7</value>
12288                            </enumeratedValue>
12289                            <enumeratedValue>
12290                                <name>pio2_3</name>
12291                                <value>8</value>
12292                            </enumeratedValue>
12293                            <enumeratedValue>
12294                                <name>coresight_tracedata_1</name>
12295                                <value>9</value>
12296                            </enumeratedValue>
12297                            <enumeratedValue>
12298                                <name>usb_muxing_overcurr_detect</name>
12299                                <value>10</value>
12300                            </enumeratedValue>
12301                            <enumeratedValue>
12302                                <name>uart0_rx</name>
12303                                <value>11</value>
12304                            </enumeratedValue>
12305                            <enumeratedValue>
12306                                <name>null</name>
12307                                <value>31</value>
12308                            </enumeratedValue>
12309                        </enumeratedValues>
12310                    </field>
12311                </fields>
12312            </register>
12313            <register>
12314                <name>GPIO4_STATUS</name>
12315                <addressOffset>0x00000020</addressOffset>
12316                <resetValue>0x00000000</resetValue>
12317                <fields>
12318                    <field>
12319                        <name>IRQTOPROC</name>
12320                        <description>interrupt to processors, after override is applied</description>
12321                        <bitRange>[26:26]</bitRange>
12322                        <access>read-only</access>
12323                    </field>
12324                    <field>
12325                        <name>INFROMPAD</name>
12326                        <description>input signal from pad, before filtering and override are applied</description>
12327                        <bitRange>[17:17]</bitRange>
12328                        <access>read-only</access>
12329                    </field>
12330                    <field>
12331                        <name>OETOPAD</name>
12332                        <description>output enable to pad after register override is applied</description>
12333                        <bitRange>[13:13]</bitRange>
12334                        <access>read-only</access>
12335                    </field>
12336                    <field>
12337                        <name>OUTTOPAD</name>
12338                        <description>output signal to pad after register override is applied</description>
12339                        <bitRange>[9:9]</bitRange>
12340                        <access>read-only</access>
12341                    </field>
12342                </fields>
12343            </register>
12344            <register>
12345                <name>GPIO4_CTRL</name>
12346                <addressOffset>0x00000024</addressOffset>
12347                <resetValue>0x0000001f</resetValue>
12348                <fields>
12349                    <field>
12350                        <name>IRQOVER</name>
12351                        <bitRange>[29:28]</bitRange>
12352                        <access>read-write</access>
12353                        <enumeratedValues>
12354                            <enumeratedValue>
12355                                <name>NORMAL</name>
12356                                <value>0</value>
12357                                <description>don&#39;t invert the interrupt</description>
12358                            </enumeratedValue>
12359                            <enumeratedValue>
12360                                <name>INVERT</name>
12361                                <value>1</value>
12362                                <description>invert the interrupt</description>
12363                            </enumeratedValue>
12364                            <enumeratedValue>
12365                                <name>LOW</name>
12366                                <value>2</value>
12367                                <description>drive interrupt low</description>
12368                            </enumeratedValue>
12369                            <enumeratedValue>
12370                                <name>HIGH</name>
12371                                <value>3</value>
12372                                <description>drive interrupt high</description>
12373                            </enumeratedValue>
12374                        </enumeratedValues>
12375                    </field>
12376                    <field>
12377                        <name>INOVER</name>
12378                        <bitRange>[17:16]</bitRange>
12379                        <access>read-write</access>
12380                        <enumeratedValues>
12381                            <enumeratedValue>
12382                                <name>NORMAL</name>
12383                                <value>0</value>
12384                                <description>don&#39;t invert the peri input</description>
12385                            </enumeratedValue>
12386                            <enumeratedValue>
12387                                <name>INVERT</name>
12388                                <value>1</value>
12389                                <description>invert the peri input</description>
12390                            </enumeratedValue>
12391                            <enumeratedValue>
12392                                <name>LOW</name>
12393                                <value>2</value>
12394                                <description>drive peri input low</description>
12395                            </enumeratedValue>
12396                            <enumeratedValue>
12397                                <name>HIGH</name>
12398                                <value>3</value>
12399                                <description>drive peri input high</description>
12400                            </enumeratedValue>
12401                        </enumeratedValues>
12402                    </field>
12403                    <field>
12404                        <name>OEOVER</name>
12405                        <bitRange>[15:14]</bitRange>
12406                        <access>read-write</access>
12407                        <enumeratedValues>
12408                            <enumeratedValue>
12409                                <name>NORMAL</name>
12410                                <value>0</value>
12411                                <description>drive output enable from peripheral signal selected by funcsel</description>
12412                            </enumeratedValue>
12413                            <enumeratedValue>
12414                                <name>INVERT</name>
12415                                <value>1</value>
12416                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
12417                            </enumeratedValue>
12418                            <enumeratedValue>
12419                                <name>DISABLE</name>
12420                                <value>2</value>
12421                                <description>disable output</description>
12422                            </enumeratedValue>
12423                            <enumeratedValue>
12424                                <name>ENABLE</name>
12425                                <value>3</value>
12426                                <description>enable output</description>
12427                            </enumeratedValue>
12428                        </enumeratedValues>
12429                    </field>
12430                    <field>
12431                        <name>OUTOVER</name>
12432                        <bitRange>[13:12]</bitRange>
12433                        <access>read-write</access>
12434                        <enumeratedValues>
12435                            <enumeratedValue>
12436                                <name>NORMAL</name>
12437                                <value>0</value>
12438                                <description>drive output from peripheral signal selected by funcsel</description>
12439                            </enumeratedValue>
12440                            <enumeratedValue>
12441                                <name>INVERT</name>
12442                                <value>1</value>
12443                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
12444                            </enumeratedValue>
12445                            <enumeratedValue>
12446                                <name>LOW</name>
12447                                <value>2</value>
12448                                <description>drive output low</description>
12449                            </enumeratedValue>
12450                            <enumeratedValue>
12451                                <name>HIGH</name>
12452                                <value>3</value>
12453                                <description>drive output high</description>
12454                            </enumeratedValue>
12455                        </enumeratedValues>
12456                    </field>
12457                    <field>
12458                        <name>FUNCSEL</name>
12459                        <description>0-31 -&gt; selects pin function according to the gpio table
12460                            31 == NULL</description>
12461                        <bitRange>[4:0]</bitRange>
12462                        <access>read-write</access>
12463                        <enumeratedValues>
12464                            <enumeratedValue>
12465                                <name>spi0_rx</name>
12466                                <value>1</value>
12467                            </enumeratedValue>
12468                            <enumeratedValue>
12469                                <name>uart1_tx</name>
12470                                <value>2</value>
12471                            </enumeratedValue>
12472                            <enumeratedValue>
12473                                <name>i2c0_sda</name>
12474                                <value>3</value>
12475                            </enumeratedValue>
12476                            <enumeratedValue>
12477                                <name>pwm_a_2</name>
12478                                <value>4</value>
12479                            </enumeratedValue>
12480                            <enumeratedValue>
12481                                <name>siob_proc_4</name>
12482                                <value>5</value>
12483                            </enumeratedValue>
12484                            <enumeratedValue>
12485                                <name>pio0_4</name>
12486                                <value>6</value>
12487                            </enumeratedValue>
12488                            <enumeratedValue>
12489                                <name>pio1_4</name>
12490                                <value>7</value>
12491                            </enumeratedValue>
12492                            <enumeratedValue>
12493                                <name>pio2_4</name>
12494                                <value>8</value>
12495                            </enumeratedValue>
12496                            <enumeratedValue>
12497                                <name>coresight_tracedata_2</name>
12498                                <value>9</value>
12499                            </enumeratedValue>
12500                            <enumeratedValue>
12501                                <name>usb_muxing_vbus_detect</name>
12502                                <value>10</value>
12503                            </enumeratedValue>
12504                            <enumeratedValue>
12505                                <name>null</name>
12506                                <value>31</value>
12507                            </enumeratedValue>
12508                        </enumeratedValues>
12509                    </field>
12510                </fields>
12511            </register>
12512            <register>
12513                <name>GPIO5_STATUS</name>
12514                <addressOffset>0x00000028</addressOffset>
12515                <resetValue>0x00000000</resetValue>
12516                <fields>
12517                    <field>
12518                        <name>IRQTOPROC</name>
12519                        <description>interrupt to processors, after override is applied</description>
12520                        <bitRange>[26:26]</bitRange>
12521                        <access>read-only</access>
12522                    </field>
12523                    <field>
12524                        <name>INFROMPAD</name>
12525                        <description>input signal from pad, before filtering and override are applied</description>
12526                        <bitRange>[17:17]</bitRange>
12527                        <access>read-only</access>
12528                    </field>
12529                    <field>
12530                        <name>OETOPAD</name>
12531                        <description>output enable to pad after register override is applied</description>
12532                        <bitRange>[13:13]</bitRange>
12533                        <access>read-only</access>
12534                    </field>
12535                    <field>
12536                        <name>OUTTOPAD</name>
12537                        <description>output signal to pad after register override is applied</description>
12538                        <bitRange>[9:9]</bitRange>
12539                        <access>read-only</access>
12540                    </field>
12541                </fields>
12542            </register>
12543            <register>
12544                <name>GPIO5_CTRL</name>
12545                <addressOffset>0x0000002c</addressOffset>
12546                <resetValue>0x0000001f</resetValue>
12547                <fields>
12548                    <field>
12549                        <name>IRQOVER</name>
12550                        <bitRange>[29:28]</bitRange>
12551                        <access>read-write</access>
12552                        <enumeratedValues>
12553                            <enumeratedValue>
12554                                <name>NORMAL</name>
12555                                <value>0</value>
12556                                <description>don&#39;t invert the interrupt</description>
12557                            </enumeratedValue>
12558                            <enumeratedValue>
12559                                <name>INVERT</name>
12560                                <value>1</value>
12561                                <description>invert the interrupt</description>
12562                            </enumeratedValue>
12563                            <enumeratedValue>
12564                                <name>LOW</name>
12565                                <value>2</value>
12566                                <description>drive interrupt low</description>
12567                            </enumeratedValue>
12568                            <enumeratedValue>
12569                                <name>HIGH</name>
12570                                <value>3</value>
12571                                <description>drive interrupt high</description>
12572                            </enumeratedValue>
12573                        </enumeratedValues>
12574                    </field>
12575                    <field>
12576                        <name>INOVER</name>
12577                        <bitRange>[17:16]</bitRange>
12578                        <access>read-write</access>
12579                        <enumeratedValues>
12580                            <enumeratedValue>
12581                                <name>NORMAL</name>
12582                                <value>0</value>
12583                                <description>don&#39;t invert the peri input</description>
12584                            </enumeratedValue>
12585                            <enumeratedValue>
12586                                <name>INVERT</name>
12587                                <value>1</value>
12588                                <description>invert the peri input</description>
12589                            </enumeratedValue>
12590                            <enumeratedValue>
12591                                <name>LOW</name>
12592                                <value>2</value>
12593                                <description>drive peri input low</description>
12594                            </enumeratedValue>
12595                            <enumeratedValue>
12596                                <name>HIGH</name>
12597                                <value>3</value>
12598                                <description>drive peri input high</description>
12599                            </enumeratedValue>
12600                        </enumeratedValues>
12601                    </field>
12602                    <field>
12603                        <name>OEOVER</name>
12604                        <bitRange>[15:14]</bitRange>
12605                        <access>read-write</access>
12606                        <enumeratedValues>
12607                            <enumeratedValue>
12608                                <name>NORMAL</name>
12609                                <value>0</value>
12610                                <description>drive output enable from peripheral signal selected by funcsel</description>
12611                            </enumeratedValue>
12612                            <enumeratedValue>
12613                                <name>INVERT</name>
12614                                <value>1</value>
12615                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
12616                            </enumeratedValue>
12617                            <enumeratedValue>
12618                                <name>DISABLE</name>
12619                                <value>2</value>
12620                                <description>disable output</description>
12621                            </enumeratedValue>
12622                            <enumeratedValue>
12623                                <name>ENABLE</name>
12624                                <value>3</value>
12625                                <description>enable output</description>
12626                            </enumeratedValue>
12627                        </enumeratedValues>
12628                    </field>
12629                    <field>
12630                        <name>OUTOVER</name>
12631                        <bitRange>[13:12]</bitRange>
12632                        <access>read-write</access>
12633                        <enumeratedValues>
12634                            <enumeratedValue>
12635                                <name>NORMAL</name>
12636                                <value>0</value>
12637                                <description>drive output from peripheral signal selected by funcsel</description>
12638                            </enumeratedValue>
12639                            <enumeratedValue>
12640                                <name>INVERT</name>
12641                                <value>1</value>
12642                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
12643                            </enumeratedValue>
12644                            <enumeratedValue>
12645                                <name>LOW</name>
12646                                <value>2</value>
12647                                <description>drive output low</description>
12648                            </enumeratedValue>
12649                            <enumeratedValue>
12650                                <name>HIGH</name>
12651                                <value>3</value>
12652                                <description>drive output high</description>
12653                            </enumeratedValue>
12654                        </enumeratedValues>
12655                    </field>
12656                    <field>
12657                        <name>FUNCSEL</name>
12658                        <description>0-31 -&gt; selects pin function according to the gpio table
12659                            31 == NULL</description>
12660                        <bitRange>[4:0]</bitRange>
12661                        <access>read-write</access>
12662                        <enumeratedValues>
12663                            <enumeratedValue>
12664                                <name>spi0_ss_n</name>
12665                                <value>1</value>
12666                            </enumeratedValue>
12667                            <enumeratedValue>
12668                                <name>uart1_rx</name>
12669                                <value>2</value>
12670                            </enumeratedValue>
12671                            <enumeratedValue>
12672                                <name>i2c0_scl</name>
12673                                <value>3</value>
12674                            </enumeratedValue>
12675                            <enumeratedValue>
12676                                <name>pwm_b_2</name>
12677                                <value>4</value>
12678                            </enumeratedValue>
12679                            <enumeratedValue>
12680                                <name>siob_proc_5</name>
12681                                <value>5</value>
12682                            </enumeratedValue>
12683                            <enumeratedValue>
12684                                <name>pio0_5</name>
12685                                <value>6</value>
12686                            </enumeratedValue>
12687                            <enumeratedValue>
12688                                <name>pio1_5</name>
12689                                <value>7</value>
12690                            </enumeratedValue>
12691                            <enumeratedValue>
12692                                <name>pio2_5</name>
12693                                <value>8</value>
12694                            </enumeratedValue>
12695                            <enumeratedValue>
12696                                <name>coresight_tracedata_3</name>
12697                                <value>9</value>
12698                            </enumeratedValue>
12699                            <enumeratedValue>
12700                                <name>usb_muxing_vbus_en</name>
12701                                <value>10</value>
12702                            </enumeratedValue>
12703                            <enumeratedValue>
12704                                <name>null</name>
12705                                <value>31</value>
12706                            </enumeratedValue>
12707                        </enumeratedValues>
12708                    </field>
12709                </fields>
12710            </register>
12711            <register>
12712                <name>GPIO6_STATUS</name>
12713                <addressOffset>0x00000030</addressOffset>
12714                <resetValue>0x00000000</resetValue>
12715                <fields>
12716                    <field>
12717                        <name>IRQTOPROC</name>
12718                        <description>interrupt to processors, after override is applied</description>
12719                        <bitRange>[26:26]</bitRange>
12720                        <access>read-only</access>
12721                    </field>
12722                    <field>
12723                        <name>INFROMPAD</name>
12724                        <description>input signal from pad, before filtering and override are applied</description>
12725                        <bitRange>[17:17]</bitRange>
12726                        <access>read-only</access>
12727                    </field>
12728                    <field>
12729                        <name>OETOPAD</name>
12730                        <description>output enable to pad after register override is applied</description>
12731                        <bitRange>[13:13]</bitRange>
12732                        <access>read-only</access>
12733                    </field>
12734                    <field>
12735                        <name>OUTTOPAD</name>
12736                        <description>output signal to pad after register override is applied</description>
12737                        <bitRange>[9:9]</bitRange>
12738                        <access>read-only</access>
12739                    </field>
12740                </fields>
12741            </register>
12742            <register>
12743                <name>GPIO6_CTRL</name>
12744                <addressOffset>0x00000034</addressOffset>
12745                <resetValue>0x0000001f</resetValue>
12746                <fields>
12747                    <field>
12748                        <name>IRQOVER</name>
12749                        <bitRange>[29:28]</bitRange>
12750                        <access>read-write</access>
12751                        <enumeratedValues>
12752                            <enumeratedValue>
12753                                <name>NORMAL</name>
12754                                <value>0</value>
12755                                <description>don&#39;t invert the interrupt</description>
12756                            </enumeratedValue>
12757                            <enumeratedValue>
12758                                <name>INVERT</name>
12759                                <value>1</value>
12760                                <description>invert the interrupt</description>
12761                            </enumeratedValue>
12762                            <enumeratedValue>
12763                                <name>LOW</name>
12764                                <value>2</value>
12765                                <description>drive interrupt low</description>
12766                            </enumeratedValue>
12767                            <enumeratedValue>
12768                                <name>HIGH</name>
12769                                <value>3</value>
12770                                <description>drive interrupt high</description>
12771                            </enumeratedValue>
12772                        </enumeratedValues>
12773                    </field>
12774                    <field>
12775                        <name>INOVER</name>
12776                        <bitRange>[17:16]</bitRange>
12777                        <access>read-write</access>
12778                        <enumeratedValues>
12779                            <enumeratedValue>
12780                                <name>NORMAL</name>
12781                                <value>0</value>
12782                                <description>don&#39;t invert the peri input</description>
12783                            </enumeratedValue>
12784                            <enumeratedValue>
12785                                <name>INVERT</name>
12786                                <value>1</value>
12787                                <description>invert the peri input</description>
12788                            </enumeratedValue>
12789                            <enumeratedValue>
12790                                <name>LOW</name>
12791                                <value>2</value>
12792                                <description>drive peri input low</description>
12793                            </enumeratedValue>
12794                            <enumeratedValue>
12795                                <name>HIGH</name>
12796                                <value>3</value>
12797                                <description>drive peri input high</description>
12798                            </enumeratedValue>
12799                        </enumeratedValues>
12800                    </field>
12801                    <field>
12802                        <name>OEOVER</name>
12803                        <bitRange>[15:14]</bitRange>
12804                        <access>read-write</access>
12805                        <enumeratedValues>
12806                            <enumeratedValue>
12807                                <name>NORMAL</name>
12808                                <value>0</value>
12809                                <description>drive output enable from peripheral signal selected by funcsel</description>
12810                            </enumeratedValue>
12811                            <enumeratedValue>
12812                                <name>INVERT</name>
12813                                <value>1</value>
12814                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
12815                            </enumeratedValue>
12816                            <enumeratedValue>
12817                                <name>DISABLE</name>
12818                                <value>2</value>
12819                                <description>disable output</description>
12820                            </enumeratedValue>
12821                            <enumeratedValue>
12822                                <name>ENABLE</name>
12823                                <value>3</value>
12824                                <description>enable output</description>
12825                            </enumeratedValue>
12826                        </enumeratedValues>
12827                    </field>
12828                    <field>
12829                        <name>OUTOVER</name>
12830                        <bitRange>[13:12]</bitRange>
12831                        <access>read-write</access>
12832                        <enumeratedValues>
12833                            <enumeratedValue>
12834                                <name>NORMAL</name>
12835                                <value>0</value>
12836                                <description>drive output from peripheral signal selected by funcsel</description>
12837                            </enumeratedValue>
12838                            <enumeratedValue>
12839                                <name>INVERT</name>
12840                                <value>1</value>
12841                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
12842                            </enumeratedValue>
12843                            <enumeratedValue>
12844                                <name>LOW</name>
12845                                <value>2</value>
12846                                <description>drive output low</description>
12847                            </enumeratedValue>
12848                            <enumeratedValue>
12849                                <name>HIGH</name>
12850                                <value>3</value>
12851                                <description>drive output high</description>
12852                            </enumeratedValue>
12853                        </enumeratedValues>
12854                    </field>
12855                    <field>
12856                        <name>FUNCSEL</name>
12857                        <description>0-31 -&gt; selects pin function according to the gpio table
12858                            31 == NULL</description>
12859                        <bitRange>[4:0]</bitRange>
12860                        <access>read-write</access>
12861                        <enumeratedValues>
12862                            <enumeratedValue>
12863                                <name>spi0_sclk</name>
12864                                <value>1</value>
12865                            </enumeratedValue>
12866                            <enumeratedValue>
12867                                <name>uart1_cts</name>
12868                                <value>2</value>
12869                            </enumeratedValue>
12870                            <enumeratedValue>
12871                                <name>i2c1_sda</name>
12872                                <value>3</value>
12873                            </enumeratedValue>
12874                            <enumeratedValue>
12875                                <name>pwm_a_3</name>
12876                                <value>4</value>
12877                            </enumeratedValue>
12878                            <enumeratedValue>
12879                                <name>siob_proc_6</name>
12880                                <value>5</value>
12881                            </enumeratedValue>
12882                            <enumeratedValue>
12883                                <name>pio0_6</name>
12884                                <value>6</value>
12885                            </enumeratedValue>
12886                            <enumeratedValue>
12887                                <name>pio1_6</name>
12888                                <value>7</value>
12889                            </enumeratedValue>
12890                            <enumeratedValue>
12891                                <name>pio2_6</name>
12892                                <value>8</value>
12893                            </enumeratedValue>
12894                            <enumeratedValue>
12895                                <name>usb_muxing_overcurr_detect</name>
12896                                <value>10</value>
12897                            </enumeratedValue>
12898                            <enumeratedValue>
12899                                <name>uart1_tx</name>
12900                                <value>11</value>
12901                            </enumeratedValue>
12902                            <enumeratedValue>
12903                                <name>null</name>
12904                                <value>31</value>
12905                            </enumeratedValue>
12906                        </enumeratedValues>
12907                    </field>
12908                </fields>
12909            </register>
12910            <register>
12911                <name>GPIO7_STATUS</name>
12912                <addressOffset>0x00000038</addressOffset>
12913                <resetValue>0x00000000</resetValue>
12914                <fields>
12915                    <field>
12916                        <name>IRQTOPROC</name>
12917                        <description>interrupt to processors, after override is applied</description>
12918                        <bitRange>[26:26]</bitRange>
12919                        <access>read-only</access>
12920                    </field>
12921                    <field>
12922                        <name>INFROMPAD</name>
12923                        <description>input signal from pad, before filtering and override are applied</description>
12924                        <bitRange>[17:17]</bitRange>
12925                        <access>read-only</access>
12926                    </field>
12927                    <field>
12928                        <name>OETOPAD</name>
12929                        <description>output enable to pad after register override is applied</description>
12930                        <bitRange>[13:13]</bitRange>
12931                        <access>read-only</access>
12932                    </field>
12933                    <field>
12934                        <name>OUTTOPAD</name>
12935                        <description>output signal to pad after register override is applied</description>
12936                        <bitRange>[9:9]</bitRange>
12937                        <access>read-only</access>
12938                    </field>
12939                </fields>
12940            </register>
12941            <register>
12942                <name>GPIO7_CTRL</name>
12943                <addressOffset>0x0000003c</addressOffset>
12944                <resetValue>0x0000001f</resetValue>
12945                <fields>
12946                    <field>
12947                        <name>IRQOVER</name>
12948                        <bitRange>[29:28]</bitRange>
12949                        <access>read-write</access>
12950                        <enumeratedValues>
12951                            <enumeratedValue>
12952                                <name>NORMAL</name>
12953                                <value>0</value>
12954                                <description>don&#39;t invert the interrupt</description>
12955                            </enumeratedValue>
12956                            <enumeratedValue>
12957                                <name>INVERT</name>
12958                                <value>1</value>
12959                                <description>invert the interrupt</description>
12960                            </enumeratedValue>
12961                            <enumeratedValue>
12962                                <name>LOW</name>
12963                                <value>2</value>
12964                                <description>drive interrupt low</description>
12965                            </enumeratedValue>
12966                            <enumeratedValue>
12967                                <name>HIGH</name>
12968                                <value>3</value>
12969                                <description>drive interrupt high</description>
12970                            </enumeratedValue>
12971                        </enumeratedValues>
12972                    </field>
12973                    <field>
12974                        <name>INOVER</name>
12975                        <bitRange>[17:16]</bitRange>
12976                        <access>read-write</access>
12977                        <enumeratedValues>
12978                            <enumeratedValue>
12979                                <name>NORMAL</name>
12980                                <value>0</value>
12981                                <description>don&#39;t invert the peri input</description>
12982                            </enumeratedValue>
12983                            <enumeratedValue>
12984                                <name>INVERT</name>
12985                                <value>1</value>
12986                                <description>invert the peri input</description>
12987                            </enumeratedValue>
12988                            <enumeratedValue>
12989                                <name>LOW</name>
12990                                <value>2</value>
12991                                <description>drive peri input low</description>
12992                            </enumeratedValue>
12993                            <enumeratedValue>
12994                                <name>HIGH</name>
12995                                <value>3</value>
12996                                <description>drive peri input high</description>
12997                            </enumeratedValue>
12998                        </enumeratedValues>
12999                    </field>
13000                    <field>
13001                        <name>OEOVER</name>
13002                        <bitRange>[15:14]</bitRange>
13003                        <access>read-write</access>
13004                        <enumeratedValues>
13005                            <enumeratedValue>
13006                                <name>NORMAL</name>
13007                                <value>0</value>
13008                                <description>drive output enable from peripheral signal selected by funcsel</description>
13009                            </enumeratedValue>
13010                            <enumeratedValue>
13011                                <name>INVERT</name>
13012                                <value>1</value>
13013                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
13014                            </enumeratedValue>
13015                            <enumeratedValue>
13016                                <name>DISABLE</name>
13017                                <value>2</value>
13018                                <description>disable output</description>
13019                            </enumeratedValue>
13020                            <enumeratedValue>
13021                                <name>ENABLE</name>
13022                                <value>3</value>
13023                                <description>enable output</description>
13024                            </enumeratedValue>
13025                        </enumeratedValues>
13026                    </field>
13027                    <field>
13028                        <name>OUTOVER</name>
13029                        <bitRange>[13:12]</bitRange>
13030                        <access>read-write</access>
13031                        <enumeratedValues>
13032                            <enumeratedValue>
13033                                <name>NORMAL</name>
13034                                <value>0</value>
13035                                <description>drive output from peripheral signal selected by funcsel</description>
13036                            </enumeratedValue>
13037                            <enumeratedValue>
13038                                <name>INVERT</name>
13039                                <value>1</value>
13040                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
13041                            </enumeratedValue>
13042                            <enumeratedValue>
13043                                <name>LOW</name>
13044                                <value>2</value>
13045                                <description>drive output low</description>
13046                            </enumeratedValue>
13047                            <enumeratedValue>
13048                                <name>HIGH</name>
13049                                <value>3</value>
13050                                <description>drive output high</description>
13051                            </enumeratedValue>
13052                        </enumeratedValues>
13053                    </field>
13054                    <field>
13055                        <name>FUNCSEL</name>
13056                        <description>0-31 -&gt; selects pin function according to the gpio table
13057                            31 == NULL</description>
13058                        <bitRange>[4:0]</bitRange>
13059                        <access>read-write</access>
13060                        <enumeratedValues>
13061                            <enumeratedValue>
13062                                <name>spi0_tx</name>
13063                                <value>1</value>
13064                            </enumeratedValue>
13065                            <enumeratedValue>
13066                                <name>uart1_rts</name>
13067                                <value>2</value>
13068                            </enumeratedValue>
13069                            <enumeratedValue>
13070                                <name>i2c1_scl</name>
13071                                <value>3</value>
13072                            </enumeratedValue>
13073                            <enumeratedValue>
13074                                <name>pwm_b_3</name>
13075                                <value>4</value>
13076                            </enumeratedValue>
13077                            <enumeratedValue>
13078                                <name>siob_proc_7</name>
13079                                <value>5</value>
13080                            </enumeratedValue>
13081                            <enumeratedValue>
13082                                <name>pio0_7</name>
13083                                <value>6</value>
13084                            </enumeratedValue>
13085                            <enumeratedValue>
13086                                <name>pio1_7</name>
13087                                <value>7</value>
13088                            </enumeratedValue>
13089                            <enumeratedValue>
13090                                <name>pio2_7</name>
13091                                <value>8</value>
13092                            </enumeratedValue>
13093                            <enumeratedValue>
13094                                <name>usb_muxing_vbus_detect</name>
13095                                <value>10</value>
13096                            </enumeratedValue>
13097                            <enumeratedValue>
13098                                <name>uart1_rx</name>
13099                                <value>11</value>
13100                            </enumeratedValue>
13101                            <enumeratedValue>
13102                                <name>null</name>
13103                                <value>31</value>
13104                            </enumeratedValue>
13105                        </enumeratedValues>
13106                    </field>
13107                </fields>
13108            </register>
13109            <register>
13110                <name>GPIO8_STATUS</name>
13111                <addressOffset>0x00000040</addressOffset>
13112                <resetValue>0x00000000</resetValue>
13113                <fields>
13114                    <field>
13115                        <name>IRQTOPROC</name>
13116                        <description>interrupt to processors, after override is applied</description>
13117                        <bitRange>[26:26]</bitRange>
13118                        <access>read-only</access>
13119                    </field>
13120                    <field>
13121                        <name>INFROMPAD</name>
13122                        <description>input signal from pad, before filtering and override are applied</description>
13123                        <bitRange>[17:17]</bitRange>
13124                        <access>read-only</access>
13125                    </field>
13126                    <field>
13127                        <name>OETOPAD</name>
13128                        <description>output enable to pad after register override is applied</description>
13129                        <bitRange>[13:13]</bitRange>
13130                        <access>read-only</access>
13131                    </field>
13132                    <field>
13133                        <name>OUTTOPAD</name>
13134                        <description>output signal to pad after register override is applied</description>
13135                        <bitRange>[9:9]</bitRange>
13136                        <access>read-only</access>
13137                    </field>
13138                </fields>
13139            </register>
13140            <register>
13141                <name>GPIO8_CTRL</name>
13142                <addressOffset>0x00000044</addressOffset>
13143                <resetValue>0x0000001f</resetValue>
13144                <fields>
13145                    <field>
13146                        <name>IRQOVER</name>
13147                        <bitRange>[29:28]</bitRange>
13148                        <access>read-write</access>
13149                        <enumeratedValues>
13150                            <enumeratedValue>
13151                                <name>NORMAL</name>
13152                                <value>0</value>
13153                                <description>don&#39;t invert the interrupt</description>
13154                            </enumeratedValue>
13155                            <enumeratedValue>
13156                                <name>INVERT</name>
13157                                <value>1</value>
13158                                <description>invert the interrupt</description>
13159                            </enumeratedValue>
13160                            <enumeratedValue>
13161                                <name>LOW</name>
13162                                <value>2</value>
13163                                <description>drive interrupt low</description>
13164                            </enumeratedValue>
13165                            <enumeratedValue>
13166                                <name>HIGH</name>
13167                                <value>3</value>
13168                                <description>drive interrupt high</description>
13169                            </enumeratedValue>
13170                        </enumeratedValues>
13171                    </field>
13172                    <field>
13173                        <name>INOVER</name>
13174                        <bitRange>[17:16]</bitRange>
13175                        <access>read-write</access>
13176                        <enumeratedValues>
13177                            <enumeratedValue>
13178                                <name>NORMAL</name>
13179                                <value>0</value>
13180                                <description>don&#39;t invert the peri input</description>
13181                            </enumeratedValue>
13182                            <enumeratedValue>
13183                                <name>INVERT</name>
13184                                <value>1</value>
13185                                <description>invert the peri input</description>
13186                            </enumeratedValue>
13187                            <enumeratedValue>
13188                                <name>LOW</name>
13189                                <value>2</value>
13190                                <description>drive peri input low</description>
13191                            </enumeratedValue>
13192                            <enumeratedValue>
13193                                <name>HIGH</name>
13194                                <value>3</value>
13195                                <description>drive peri input high</description>
13196                            </enumeratedValue>
13197                        </enumeratedValues>
13198                    </field>
13199                    <field>
13200                        <name>OEOVER</name>
13201                        <bitRange>[15:14]</bitRange>
13202                        <access>read-write</access>
13203                        <enumeratedValues>
13204                            <enumeratedValue>
13205                                <name>NORMAL</name>
13206                                <value>0</value>
13207                                <description>drive output enable from peripheral signal selected by funcsel</description>
13208                            </enumeratedValue>
13209                            <enumeratedValue>
13210                                <name>INVERT</name>
13211                                <value>1</value>
13212                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
13213                            </enumeratedValue>
13214                            <enumeratedValue>
13215                                <name>DISABLE</name>
13216                                <value>2</value>
13217                                <description>disable output</description>
13218                            </enumeratedValue>
13219                            <enumeratedValue>
13220                                <name>ENABLE</name>
13221                                <value>3</value>
13222                                <description>enable output</description>
13223                            </enumeratedValue>
13224                        </enumeratedValues>
13225                    </field>
13226                    <field>
13227                        <name>OUTOVER</name>
13228                        <bitRange>[13:12]</bitRange>
13229                        <access>read-write</access>
13230                        <enumeratedValues>
13231                            <enumeratedValue>
13232                                <name>NORMAL</name>
13233                                <value>0</value>
13234                                <description>drive output from peripheral signal selected by funcsel</description>
13235                            </enumeratedValue>
13236                            <enumeratedValue>
13237                                <name>INVERT</name>
13238                                <value>1</value>
13239                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
13240                            </enumeratedValue>
13241                            <enumeratedValue>
13242                                <name>LOW</name>
13243                                <value>2</value>
13244                                <description>drive output low</description>
13245                            </enumeratedValue>
13246                            <enumeratedValue>
13247                                <name>HIGH</name>
13248                                <value>3</value>
13249                                <description>drive output high</description>
13250                            </enumeratedValue>
13251                        </enumeratedValues>
13252                    </field>
13253                    <field>
13254                        <name>FUNCSEL</name>
13255                        <description>0-31 -&gt; selects pin function according to the gpio table
13256                            31 == NULL</description>
13257                        <bitRange>[4:0]</bitRange>
13258                        <access>read-write</access>
13259                        <enumeratedValues>
13260                            <enumeratedValue>
13261                                <name>spi1_rx</name>
13262                                <value>1</value>
13263                            </enumeratedValue>
13264                            <enumeratedValue>
13265                                <name>uart1_tx</name>
13266                                <value>2</value>
13267                            </enumeratedValue>
13268                            <enumeratedValue>
13269                                <name>i2c0_sda</name>
13270                                <value>3</value>
13271                            </enumeratedValue>
13272                            <enumeratedValue>
13273                                <name>pwm_a_4</name>
13274                                <value>4</value>
13275                            </enumeratedValue>
13276                            <enumeratedValue>
13277                                <name>siob_proc_8</name>
13278                                <value>5</value>
13279                            </enumeratedValue>
13280                            <enumeratedValue>
13281                                <name>pio0_8</name>
13282                                <value>6</value>
13283                            </enumeratedValue>
13284                            <enumeratedValue>
13285                                <name>pio1_8</name>
13286                                <value>7</value>
13287                            </enumeratedValue>
13288                            <enumeratedValue>
13289                                <name>pio2_8</name>
13290                                <value>8</value>
13291                            </enumeratedValue>
13292                            <enumeratedValue>
13293                                <name>xip_ss_n_1</name>
13294                                <value>9</value>
13295                            </enumeratedValue>
13296                            <enumeratedValue>
13297                                <name>usb_muxing_vbus_en</name>
13298                                <value>10</value>
13299                            </enumeratedValue>
13300                            <enumeratedValue>
13301                                <name>null</name>
13302                                <value>31</value>
13303                            </enumeratedValue>
13304                        </enumeratedValues>
13305                    </field>
13306                </fields>
13307            </register>
13308            <register>
13309                <name>GPIO9_STATUS</name>
13310                <addressOffset>0x00000048</addressOffset>
13311                <resetValue>0x00000000</resetValue>
13312                <fields>
13313                    <field>
13314                        <name>IRQTOPROC</name>
13315                        <description>interrupt to processors, after override is applied</description>
13316                        <bitRange>[26:26]</bitRange>
13317                        <access>read-only</access>
13318                    </field>
13319                    <field>
13320                        <name>INFROMPAD</name>
13321                        <description>input signal from pad, before filtering and override are applied</description>
13322                        <bitRange>[17:17]</bitRange>
13323                        <access>read-only</access>
13324                    </field>
13325                    <field>
13326                        <name>OETOPAD</name>
13327                        <description>output enable to pad after register override is applied</description>
13328                        <bitRange>[13:13]</bitRange>
13329                        <access>read-only</access>
13330                    </field>
13331                    <field>
13332                        <name>OUTTOPAD</name>
13333                        <description>output signal to pad after register override is applied</description>
13334                        <bitRange>[9:9]</bitRange>
13335                        <access>read-only</access>
13336                    </field>
13337                </fields>
13338            </register>
13339            <register>
13340                <name>GPIO9_CTRL</name>
13341                <addressOffset>0x0000004c</addressOffset>
13342                <resetValue>0x0000001f</resetValue>
13343                <fields>
13344                    <field>
13345                        <name>IRQOVER</name>
13346                        <bitRange>[29:28]</bitRange>
13347                        <access>read-write</access>
13348                        <enumeratedValues>
13349                            <enumeratedValue>
13350                                <name>NORMAL</name>
13351                                <value>0</value>
13352                                <description>don&#39;t invert the interrupt</description>
13353                            </enumeratedValue>
13354                            <enumeratedValue>
13355                                <name>INVERT</name>
13356                                <value>1</value>
13357                                <description>invert the interrupt</description>
13358                            </enumeratedValue>
13359                            <enumeratedValue>
13360                                <name>LOW</name>
13361                                <value>2</value>
13362                                <description>drive interrupt low</description>
13363                            </enumeratedValue>
13364                            <enumeratedValue>
13365                                <name>HIGH</name>
13366                                <value>3</value>
13367                                <description>drive interrupt high</description>
13368                            </enumeratedValue>
13369                        </enumeratedValues>
13370                    </field>
13371                    <field>
13372                        <name>INOVER</name>
13373                        <bitRange>[17:16]</bitRange>
13374                        <access>read-write</access>
13375                        <enumeratedValues>
13376                            <enumeratedValue>
13377                                <name>NORMAL</name>
13378                                <value>0</value>
13379                                <description>don&#39;t invert the peri input</description>
13380                            </enumeratedValue>
13381                            <enumeratedValue>
13382                                <name>INVERT</name>
13383                                <value>1</value>
13384                                <description>invert the peri input</description>
13385                            </enumeratedValue>
13386                            <enumeratedValue>
13387                                <name>LOW</name>
13388                                <value>2</value>
13389                                <description>drive peri input low</description>
13390                            </enumeratedValue>
13391                            <enumeratedValue>
13392                                <name>HIGH</name>
13393                                <value>3</value>
13394                                <description>drive peri input high</description>
13395                            </enumeratedValue>
13396                        </enumeratedValues>
13397                    </field>
13398                    <field>
13399                        <name>OEOVER</name>
13400                        <bitRange>[15:14]</bitRange>
13401                        <access>read-write</access>
13402                        <enumeratedValues>
13403                            <enumeratedValue>
13404                                <name>NORMAL</name>
13405                                <value>0</value>
13406                                <description>drive output enable from peripheral signal selected by funcsel</description>
13407                            </enumeratedValue>
13408                            <enumeratedValue>
13409                                <name>INVERT</name>
13410                                <value>1</value>
13411                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
13412                            </enumeratedValue>
13413                            <enumeratedValue>
13414                                <name>DISABLE</name>
13415                                <value>2</value>
13416                                <description>disable output</description>
13417                            </enumeratedValue>
13418                            <enumeratedValue>
13419                                <name>ENABLE</name>
13420                                <value>3</value>
13421                                <description>enable output</description>
13422                            </enumeratedValue>
13423                        </enumeratedValues>
13424                    </field>
13425                    <field>
13426                        <name>OUTOVER</name>
13427                        <bitRange>[13:12]</bitRange>
13428                        <access>read-write</access>
13429                        <enumeratedValues>
13430                            <enumeratedValue>
13431                                <name>NORMAL</name>
13432                                <value>0</value>
13433                                <description>drive output from peripheral signal selected by funcsel</description>
13434                            </enumeratedValue>
13435                            <enumeratedValue>
13436                                <name>INVERT</name>
13437                                <value>1</value>
13438                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
13439                            </enumeratedValue>
13440                            <enumeratedValue>
13441                                <name>LOW</name>
13442                                <value>2</value>
13443                                <description>drive output low</description>
13444                            </enumeratedValue>
13445                            <enumeratedValue>
13446                                <name>HIGH</name>
13447                                <value>3</value>
13448                                <description>drive output high</description>
13449                            </enumeratedValue>
13450                        </enumeratedValues>
13451                    </field>
13452                    <field>
13453                        <name>FUNCSEL</name>
13454                        <description>0-31 -&gt; selects pin function according to the gpio table
13455                            31 == NULL</description>
13456                        <bitRange>[4:0]</bitRange>
13457                        <access>read-write</access>
13458                        <enumeratedValues>
13459                            <enumeratedValue>
13460                                <name>spi1_ss_n</name>
13461                                <value>1</value>
13462                            </enumeratedValue>
13463                            <enumeratedValue>
13464                                <name>uart1_rx</name>
13465                                <value>2</value>
13466                            </enumeratedValue>
13467                            <enumeratedValue>
13468                                <name>i2c0_scl</name>
13469                                <value>3</value>
13470                            </enumeratedValue>
13471                            <enumeratedValue>
13472                                <name>pwm_b_4</name>
13473                                <value>4</value>
13474                            </enumeratedValue>
13475                            <enumeratedValue>
13476                                <name>siob_proc_9</name>
13477                                <value>5</value>
13478                            </enumeratedValue>
13479                            <enumeratedValue>
13480                                <name>pio0_9</name>
13481                                <value>6</value>
13482                            </enumeratedValue>
13483                            <enumeratedValue>
13484                                <name>pio1_9</name>
13485                                <value>7</value>
13486                            </enumeratedValue>
13487                            <enumeratedValue>
13488                                <name>pio2_9</name>
13489                                <value>8</value>
13490                            </enumeratedValue>
13491                            <enumeratedValue>
13492                                <name>usb_muxing_overcurr_detect</name>
13493                                <value>10</value>
13494                            </enumeratedValue>
13495                            <enumeratedValue>
13496                                <name>null</name>
13497                                <value>31</value>
13498                            </enumeratedValue>
13499                        </enumeratedValues>
13500                    </field>
13501                </fields>
13502            </register>
13503            <register>
13504                <name>GPIO10_STATUS</name>
13505                <addressOffset>0x00000050</addressOffset>
13506                <resetValue>0x00000000</resetValue>
13507                <fields>
13508                    <field>
13509                        <name>IRQTOPROC</name>
13510                        <description>interrupt to processors, after override is applied</description>
13511                        <bitRange>[26:26]</bitRange>
13512                        <access>read-only</access>
13513                    </field>
13514                    <field>
13515                        <name>INFROMPAD</name>
13516                        <description>input signal from pad, before filtering and override are applied</description>
13517                        <bitRange>[17:17]</bitRange>
13518                        <access>read-only</access>
13519                    </field>
13520                    <field>
13521                        <name>OETOPAD</name>
13522                        <description>output enable to pad after register override is applied</description>
13523                        <bitRange>[13:13]</bitRange>
13524                        <access>read-only</access>
13525                    </field>
13526                    <field>
13527                        <name>OUTTOPAD</name>
13528                        <description>output signal to pad after register override is applied</description>
13529                        <bitRange>[9:9]</bitRange>
13530                        <access>read-only</access>
13531                    </field>
13532                </fields>
13533            </register>
13534            <register>
13535                <name>GPIO10_CTRL</name>
13536                <addressOffset>0x00000054</addressOffset>
13537                <resetValue>0x0000001f</resetValue>
13538                <fields>
13539                    <field>
13540                        <name>IRQOVER</name>
13541                        <bitRange>[29:28]</bitRange>
13542                        <access>read-write</access>
13543                        <enumeratedValues>
13544                            <enumeratedValue>
13545                                <name>NORMAL</name>
13546                                <value>0</value>
13547                                <description>don&#39;t invert the interrupt</description>
13548                            </enumeratedValue>
13549                            <enumeratedValue>
13550                                <name>INVERT</name>
13551                                <value>1</value>
13552                                <description>invert the interrupt</description>
13553                            </enumeratedValue>
13554                            <enumeratedValue>
13555                                <name>LOW</name>
13556                                <value>2</value>
13557                                <description>drive interrupt low</description>
13558                            </enumeratedValue>
13559                            <enumeratedValue>
13560                                <name>HIGH</name>
13561                                <value>3</value>
13562                                <description>drive interrupt high</description>
13563                            </enumeratedValue>
13564                        </enumeratedValues>
13565                    </field>
13566                    <field>
13567                        <name>INOVER</name>
13568                        <bitRange>[17:16]</bitRange>
13569                        <access>read-write</access>
13570                        <enumeratedValues>
13571                            <enumeratedValue>
13572                                <name>NORMAL</name>
13573                                <value>0</value>
13574                                <description>don&#39;t invert the peri input</description>
13575                            </enumeratedValue>
13576                            <enumeratedValue>
13577                                <name>INVERT</name>
13578                                <value>1</value>
13579                                <description>invert the peri input</description>
13580                            </enumeratedValue>
13581                            <enumeratedValue>
13582                                <name>LOW</name>
13583                                <value>2</value>
13584                                <description>drive peri input low</description>
13585                            </enumeratedValue>
13586                            <enumeratedValue>
13587                                <name>HIGH</name>
13588                                <value>3</value>
13589                                <description>drive peri input high</description>
13590                            </enumeratedValue>
13591                        </enumeratedValues>
13592                    </field>
13593                    <field>
13594                        <name>OEOVER</name>
13595                        <bitRange>[15:14]</bitRange>
13596                        <access>read-write</access>
13597                        <enumeratedValues>
13598                            <enumeratedValue>
13599                                <name>NORMAL</name>
13600                                <value>0</value>
13601                                <description>drive output enable from peripheral signal selected by funcsel</description>
13602                            </enumeratedValue>
13603                            <enumeratedValue>
13604                                <name>INVERT</name>
13605                                <value>1</value>
13606                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
13607                            </enumeratedValue>
13608                            <enumeratedValue>
13609                                <name>DISABLE</name>
13610                                <value>2</value>
13611                                <description>disable output</description>
13612                            </enumeratedValue>
13613                            <enumeratedValue>
13614                                <name>ENABLE</name>
13615                                <value>3</value>
13616                                <description>enable output</description>
13617                            </enumeratedValue>
13618                        </enumeratedValues>
13619                    </field>
13620                    <field>
13621                        <name>OUTOVER</name>
13622                        <bitRange>[13:12]</bitRange>
13623                        <access>read-write</access>
13624                        <enumeratedValues>
13625                            <enumeratedValue>
13626                                <name>NORMAL</name>
13627                                <value>0</value>
13628                                <description>drive output from peripheral signal selected by funcsel</description>
13629                            </enumeratedValue>
13630                            <enumeratedValue>
13631                                <name>INVERT</name>
13632                                <value>1</value>
13633                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
13634                            </enumeratedValue>
13635                            <enumeratedValue>
13636                                <name>LOW</name>
13637                                <value>2</value>
13638                                <description>drive output low</description>
13639                            </enumeratedValue>
13640                            <enumeratedValue>
13641                                <name>HIGH</name>
13642                                <value>3</value>
13643                                <description>drive output high</description>
13644                            </enumeratedValue>
13645                        </enumeratedValues>
13646                    </field>
13647                    <field>
13648                        <name>FUNCSEL</name>
13649                        <description>0-31 -&gt; selects pin function according to the gpio table
13650                            31 == NULL</description>
13651                        <bitRange>[4:0]</bitRange>
13652                        <access>read-write</access>
13653                        <enumeratedValues>
13654                            <enumeratedValue>
13655                                <name>spi1_sclk</name>
13656                                <value>1</value>
13657                            </enumeratedValue>
13658                            <enumeratedValue>
13659                                <name>uart1_cts</name>
13660                                <value>2</value>
13661                            </enumeratedValue>
13662                            <enumeratedValue>
13663                                <name>i2c1_sda</name>
13664                                <value>3</value>
13665                            </enumeratedValue>
13666                            <enumeratedValue>
13667                                <name>pwm_a_5</name>
13668                                <value>4</value>
13669                            </enumeratedValue>
13670                            <enumeratedValue>
13671                                <name>siob_proc_10</name>
13672                                <value>5</value>
13673                            </enumeratedValue>
13674                            <enumeratedValue>
13675                                <name>pio0_10</name>
13676                                <value>6</value>
13677                            </enumeratedValue>
13678                            <enumeratedValue>
13679                                <name>pio1_10</name>
13680                                <value>7</value>
13681                            </enumeratedValue>
13682                            <enumeratedValue>
13683                                <name>pio2_10</name>
13684                                <value>8</value>
13685                            </enumeratedValue>
13686                            <enumeratedValue>
13687                                <name>usb_muxing_vbus_detect</name>
13688                                <value>10</value>
13689                            </enumeratedValue>
13690                            <enumeratedValue>
13691                                <name>uart1_tx</name>
13692                                <value>11</value>
13693                            </enumeratedValue>
13694                            <enumeratedValue>
13695                                <name>null</name>
13696                                <value>31</value>
13697                            </enumeratedValue>
13698                        </enumeratedValues>
13699                    </field>
13700                </fields>
13701            </register>
13702            <register>
13703                <name>GPIO11_STATUS</name>
13704                <addressOffset>0x00000058</addressOffset>
13705                <resetValue>0x00000000</resetValue>
13706                <fields>
13707                    <field>
13708                        <name>IRQTOPROC</name>
13709                        <description>interrupt to processors, after override is applied</description>
13710                        <bitRange>[26:26]</bitRange>
13711                        <access>read-only</access>
13712                    </field>
13713                    <field>
13714                        <name>INFROMPAD</name>
13715                        <description>input signal from pad, before filtering and override are applied</description>
13716                        <bitRange>[17:17]</bitRange>
13717                        <access>read-only</access>
13718                    </field>
13719                    <field>
13720                        <name>OETOPAD</name>
13721                        <description>output enable to pad after register override is applied</description>
13722                        <bitRange>[13:13]</bitRange>
13723                        <access>read-only</access>
13724                    </field>
13725                    <field>
13726                        <name>OUTTOPAD</name>
13727                        <description>output signal to pad after register override is applied</description>
13728                        <bitRange>[9:9]</bitRange>
13729                        <access>read-only</access>
13730                    </field>
13731                </fields>
13732            </register>
13733            <register>
13734                <name>GPIO11_CTRL</name>
13735                <addressOffset>0x0000005c</addressOffset>
13736                <resetValue>0x0000001f</resetValue>
13737                <fields>
13738                    <field>
13739                        <name>IRQOVER</name>
13740                        <bitRange>[29:28]</bitRange>
13741                        <access>read-write</access>
13742                        <enumeratedValues>
13743                            <enumeratedValue>
13744                                <name>NORMAL</name>
13745                                <value>0</value>
13746                                <description>don&#39;t invert the interrupt</description>
13747                            </enumeratedValue>
13748                            <enumeratedValue>
13749                                <name>INVERT</name>
13750                                <value>1</value>
13751                                <description>invert the interrupt</description>
13752                            </enumeratedValue>
13753                            <enumeratedValue>
13754                                <name>LOW</name>
13755                                <value>2</value>
13756                                <description>drive interrupt low</description>
13757                            </enumeratedValue>
13758                            <enumeratedValue>
13759                                <name>HIGH</name>
13760                                <value>3</value>
13761                                <description>drive interrupt high</description>
13762                            </enumeratedValue>
13763                        </enumeratedValues>
13764                    </field>
13765                    <field>
13766                        <name>INOVER</name>
13767                        <bitRange>[17:16]</bitRange>
13768                        <access>read-write</access>
13769                        <enumeratedValues>
13770                            <enumeratedValue>
13771                                <name>NORMAL</name>
13772                                <value>0</value>
13773                                <description>don&#39;t invert the peri input</description>
13774                            </enumeratedValue>
13775                            <enumeratedValue>
13776                                <name>INVERT</name>
13777                                <value>1</value>
13778                                <description>invert the peri input</description>
13779                            </enumeratedValue>
13780                            <enumeratedValue>
13781                                <name>LOW</name>
13782                                <value>2</value>
13783                                <description>drive peri input low</description>
13784                            </enumeratedValue>
13785                            <enumeratedValue>
13786                                <name>HIGH</name>
13787                                <value>3</value>
13788                                <description>drive peri input high</description>
13789                            </enumeratedValue>
13790                        </enumeratedValues>
13791                    </field>
13792                    <field>
13793                        <name>OEOVER</name>
13794                        <bitRange>[15:14]</bitRange>
13795                        <access>read-write</access>
13796                        <enumeratedValues>
13797                            <enumeratedValue>
13798                                <name>NORMAL</name>
13799                                <value>0</value>
13800                                <description>drive output enable from peripheral signal selected by funcsel</description>
13801                            </enumeratedValue>
13802                            <enumeratedValue>
13803                                <name>INVERT</name>
13804                                <value>1</value>
13805                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
13806                            </enumeratedValue>
13807                            <enumeratedValue>
13808                                <name>DISABLE</name>
13809                                <value>2</value>
13810                                <description>disable output</description>
13811                            </enumeratedValue>
13812                            <enumeratedValue>
13813                                <name>ENABLE</name>
13814                                <value>3</value>
13815                                <description>enable output</description>
13816                            </enumeratedValue>
13817                        </enumeratedValues>
13818                    </field>
13819                    <field>
13820                        <name>OUTOVER</name>
13821                        <bitRange>[13:12]</bitRange>
13822                        <access>read-write</access>
13823                        <enumeratedValues>
13824                            <enumeratedValue>
13825                                <name>NORMAL</name>
13826                                <value>0</value>
13827                                <description>drive output from peripheral signal selected by funcsel</description>
13828                            </enumeratedValue>
13829                            <enumeratedValue>
13830                                <name>INVERT</name>
13831                                <value>1</value>
13832                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
13833                            </enumeratedValue>
13834                            <enumeratedValue>
13835                                <name>LOW</name>
13836                                <value>2</value>
13837                                <description>drive output low</description>
13838                            </enumeratedValue>
13839                            <enumeratedValue>
13840                                <name>HIGH</name>
13841                                <value>3</value>
13842                                <description>drive output high</description>
13843                            </enumeratedValue>
13844                        </enumeratedValues>
13845                    </field>
13846                    <field>
13847                        <name>FUNCSEL</name>
13848                        <description>0-31 -&gt; selects pin function according to the gpio table
13849                            31 == NULL</description>
13850                        <bitRange>[4:0]</bitRange>
13851                        <access>read-write</access>
13852                        <enumeratedValues>
13853                            <enumeratedValue>
13854                                <name>spi1_tx</name>
13855                                <value>1</value>
13856                            </enumeratedValue>
13857                            <enumeratedValue>
13858                                <name>uart1_rts</name>
13859                                <value>2</value>
13860                            </enumeratedValue>
13861                            <enumeratedValue>
13862                                <name>i2c1_scl</name>
13863                                <value>3</value>
13864                            </enumeratedValue>
13865                            <enumeratedValue>
13866                                <name>pwm_b_5</name>
13867                                <value>4</value>
13868                            </enumeratedValue>
13869                            <enumeratedValue>
13870                                <name>siob_proc_11</name>
13871                                <value>5</value>
13872                            </enumeratedValue>
13873                            <enumeratedValue>
13874                                <name>pio0_11</name>
13875                                <value>6</value>
13876                            </enumeratedValue>
13877                            <enumeratedValue>
13878                                <name>pio1_11</name>
13879                                <value>7</value>
13880                            </enumeratedValue>
13881                            <enumeratedValue>
13882                                <name>pio2_11</name>
13883                                <value>8</value>
13884                            </enumeratedValue>
13885                            <enumeratedValue>
13886                                <name>usb_muxing_vbus_en</name>
13887                                <value>10</value>
13888                            </enumeratedValue>
13889                            <enumeratedValue>
13890                                <name>uart1_rx</name>
13891                                <value>11</value>
13892                            </enumeratedValue>
13893                            <enumeratedValue>
13894                                <name>null</name>
13895                                <value>31</value>
13896                            </enumeratedValue>
13897                        </enumeratedValues>
13898                    </field>
13899                </fields>
13900            </register>
13901            <register>
13902                <name>GPIO12_STATUS</name>
13903                <addressOffset>0x00000060</addressOffset>
13904                <resetValue>0x00000000</resetValue>
13905                <fields>
13906                    <field>
13907                        <name>IRQTOPROC</name>
13908                        <description>interrupt to processors, after override is applied</description>
13909                        <bitRange>[26:26]</bitRange>
13910                        <access>read-only</access>
13911                    </field>
13912                    <field>
13913                        <name>INFROMPAD</name>
13914                        <description>input signal from pad, before filtering and override are applied</description>
13915                        <bitRange>[17:17]</bitRange>
13916                        <access>read-only</access>
13917                    </field>
13918                    <field>
13919                        <name>OETOPAD</name>
13920                        <description>output enable to pad after register override is applied</description>
13921                        <bitRange>[13:13]</bitRange>
13922                        <access>read-only</access>
13923                    </field>
13924                    <field>
13925                        <name>OUTTOPAD</name>
13926                        <description>output signal to pad after register override is applied</description>
13927                        <bitRange>[9:9]</bitRange>
13928                        <access>read-only</access>
13929                    </field>
13930                </fields>
13931            </register>
13932            <register>
13933                <name>GPIO12_CTRL</name>
13934                <addressOffset>0x00000064</addressOffset>
13935                <resetValue>0x0000001f</resetValue>
13936                <fields>
13937                    <field>
13938                        <name>IRQOVER</name>
13939                        <bitRange>[29:28]</bitRange>
13940                        <access>read-write</access>
13941                        <enumeratedValues>
13942                            <enumeratedValue>
13943                                <name>NORMAL</name>
13944                                <value>0</value>
13945                                <description>don&#39;t invert the interrupt</description>
13946                            </enumeratedValue>
13947                            <enumeratedValue>
13948                                <name>INVERT</name>
13949                                <value>1</value>
13950                                <description>invert the interrupt</description>
13951                            </enumeratedValue>
13952                            <enumeratedValue>
13953                                <name>LOW</name>
13954                                <value>2</value>
13955                                <description>drive interrupt low</description>
13956                            </enumeratedValue>
13957                            <enumeratedValue>
13958                                <name>HIGH</name>
13959                                <value>3</value>
13960                                <description>drive interrupt high</description>
13961                            </enumeratedValue>
13962                        </enumeratedValues>
13963                    </field>
13964                    <field>
13965                        <name>INOVER</name>
13966                        <bitRange>[17:16]</bitRange>
13967                        <access>read-write</access>
13968                        <enumeratedValues>
13969                            <enumeratedValue>
13970                                <name>NORMAL</name>
13971                                <value>0</value>
13972                                <description>don&#39;t invert the peri input</description>
13973                            </enumeratedValue>
13974                            <enumeratedValue>
13975                                <name>INVERT</name>
13976                                <value>1</value>
13977                                <description>invert the peri input</description>
13978                            </enumeratedValue>
13979                            <enumeratedValue>
13980                                <name>LOW</name>
13981                                <value>2</value>
13982                                <description>drive peri input low</description>
13983                            </enumeratedValue>
13984                            <enumeratedValue>
13985                                <name>HIGH</name>
13986                                <value>3</value>
13987                                <description>drive peri input high</description>
13988                            </enumeratedValue>
13989                        </enumeratedValues>
13990                    </field>
13991                    <field>
13992                        <name>OEOVER</name>
13993                        <bitRange>[15:14]</bitRange>
13994                        <access>read-write</access>
13995                        <enumeratedValues>
13996                            <enumeratedValue>
13997                                <name>NORMAL</name>
13998                                <value>0</value>
13999                                <description>drive output enable from peripheral signal selected by funcsel</description>
14000                            </enumeratedValue>
14001                            <enumeratedValue>
14002                                <name>INVERT</name>
14003                                <value>1</value>
14004                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
14005                            </enumeratedValue>
14006                            <enumeratedValue>
14007                                <name>DISABLE</name>
14008                                <value>2</value>
14009                                <description>disable output</description>
14010                            </enumeratedValue>
14011                            <enumeratedValue>
14012                                <name>ENABLE</name>
14013                                <value>3</value>
14014                                <description>enable output</description>
14015                            </enumeratedValue>
14016                        </enumeratedValues>
14017                    </field>
14018                    <field>
14019                        <name>OUTOVER</name>
14020                        <bitRange>[13:12]</bitRange>
14021                        <access>read-write</access>
14022                        <enumeratedValues>
14023                            <enumeratedValue>
14024                                <name>NORMAL</name>
14025                                <value>0</value>
14026                                <description>drive output from peripheral signal selected by funcsel</description>
14027                            </enumeratedValue>
14028                            <enumeratedValue>
14029                                <name>INVERT</name>
14030                                <value>1</value>
14031                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
14032                            </enumeratedValue>
14033                            <enumeratedValue>
14034                                <name>LOW</name>
14035                                <value>2</value>
14036                                <description>drive output low</description>
14037                            </enumeratedValue>
14038                            <enumeratedValue>
14039                                <name>HIGH</name>
14040                                <value>3</value>
14041                                <description>drive output high</description>
14042                            </enumeratedValue>
14043                        </enumeratedValues>
14044                    </field>
14045                    <field>
14046                        <name>FUNCSEL</name>
14047                        <description>0-31 -&gt; selects pin function according to the gpio table
14048                            31 == NULL</description>
14049                        <bitRange>[4:0]</bitRange>
14050                        <access>read-write</access>
14051                        <enumeratedValues>
14052                            <enumeratedValue>
14053                                <name>hstx_0</name>
14054                                <value>0</value>
14055                            </enumeratedValue>
14056                            <enumeratedValue>
14057                                <name>spi1_rx</name>
14058                                <value>1</value>
14059                            </enumeratedValue>
14060                            <enumeratedValue>
14061                                <name>uart0_tx</name>
14062                                <value>2</value>
14063                            </enumeratedValue>
14064                            <enumeratedValue>
14065                                <name>i2c0_sda</name>
14066                                <value>3</value>
14067                            </enumeratedValue>
14068                            <enumeratedValue>
14069                                <name>pwm_a_6</name>
14070                                <value>4</value>
14071                            </enumeratedValue>
14072                            <enumeratedValue>
14073                                <name>siob_proc_12</name>
14074                                <value>5</value>
14075                            </enumeratedValue>
14076                            <enumeratedValue>
14077                                <name>pio0_12</name>
14078                                <value>6</value>
14079                            </enumeratedValue>
14080                            <enumeratedValue>
14081                                <name>pio1_12</name>
14082                                <value>7</value>
14083                            </enumeratedValue>
14084                            <enumeratedValue>
14085                                <name>pio2_12</name>
14086                                <value>8</value>
14087                            </enumeratedValue>
14088                            <enumeratedValue>
14089                                <name>clocks_gpin_0</name>
14090                                <value>9</value>
14091                            </enumeratedValue>
14092                            <enumeratedValue>
14093                                <name>usb_muxing_overcurr_detect</name>
14094                                <value>10</value>
14095                            </enumeratedValue>
14096                            <enumeratedValue>
14097                                <name>null</name>
14098                                <value>31</value>
14099                            </enumeratedValue>
14100                        </enumeratedValues>
14101                    </field>
14102                </fields>
14103            </register>
14104            <register>
14105                <name>GPIO13_STATUS</name>
14106                <addressOffset>0x00000068</addressOffset>
14107                <resetValue>0x00000000</resetValue>
14108                <fields>
14109                    <field>
14110                        <name>IRQTOPROC</name>
14111                        <description>interrupt to processors, after override is applied</description>
14112                        <bitRange>[26:26]</bitRange>
14113                        <access>read-only</access>
14114                    </field>
14115                    <field>
14116                        <name>INFROMPAD</name>
14117                        <description>input signal from pad, before filtering and override are applied</description>
14118                        <bitRange>[17:17]</bitRange>
14119                        <access>read-only</access>
14120                    </field>
14121                    <field>
14122                        <name>OETOPAD</name>
14123                        <description>output enable to pad after register override is applied</description>
14124                        <bitRange>[13:13]</bitRange>
14125                        <access>read-only</access>
14126                    </field>
14127                    <field>
14128                        <name>OUTTOPAD</name>
14129                        <description>output signal to pad after register override is applied</description>
14130                        <bitRange>[9:9]</bitRange>
14131                        <access>read-only</access>
14132                    </field>
14133                </fields>
14134            </register>
14135            <register>
14136                <name>GPIO13_CTRL</name>
14137                <addressOffset>0x0000006c</addressOffset>
14138                <resetValue>0x0000001f</resetValue>
14139                <fields>
14140                    <field>
14141                        <name>IRQOVER</name>
14142                        <bitRange>[29:28]</bitRange>
14143                        <access>read-write</access>
14144                        <enumeratedValues>
14145                            <enumeratedValue>
14146                                <name>NORMAL</name>
14147                                <value>0</value>
14148                                <description>don&#39;t invert the interrupt</description>
14149                            </enumeratedValue>
14150                            <enumeratedValue>
14151                                <name>INVERT</name>
14152                                <value>1</value>
14153                                <description>invert the interrupt</description>
14154                            </enumeratedValue>
14155                            <enumeratedValue>
14156                                <name>LOW</name>
14157                                <value>2</value>
14158                                <description>drive interrupt low</description>
14159                            </enumeratedValue>
14160                            <enumeratedValue>
14161                                <name>HIGH</name>
14162                                <value>3</value>
14163                                <description>drive interrupt high</description>
14164                            </enumeratedValue>
14165                        </enumeratedValues>
14166                    </field>
14167                    <field>
14168                        <name>INOVER</name>
14169                        <bitRange>[17:16]</bitRange>
14170                        <access>read-write</access>
14171                        <enumeratedValues>
14172                            <enumeratedValue>
14173                                <name>NORMAL</name>
14174                                <value>0</value>
14175                                <description>don&#39;t invert the peri input</description>
14176                            </enumeratedValue>
14177                            <enumeratedValue>
14178                                <name>INVERT</name>
14179                                <value>1</value>
14180                                <description>invert the peri input</description>
14181                            </enumeratedValue>
14182                            <enumeratedValue>
14183                                <name>LOW</name>
14184                                <value>2</value>
14185                                <description>drive peri input low</description>
14186                            </enumeratedValue>
14187                            <enumeratedValue>
14188                                <name>HIGH</name>
14189                                <value>3</value>
14190                                <description>drive peri input high</description>
14191                            </enumeratedValue>
14192                        </enumeratedValues>
14193                    </field>
14194                    <field>
14195                        <name>OEOVER</name>
14196                        <bitRange>[15:14]</bitRange>
14197                        <access>read-write</access>
14198                        <enumeratedValues>
14199                            <enumeratedValue>
14200                                <name>NORMAL</name>
14201                                <value>0</value>
14202                                <description>drive output enable from peripheral signal selected by funcsel</description>
14203                            </enumeratedValue>
14204                            <enumeratedValue>
14205                                <name>INVERT</name>
14206                                <value>1</value>
14207                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
14208                            </enumeratedValue>
14209                            <enumeratedValue>
14210                                <name>DISABLE</name>
14211                                <value>2</value>
14212                                <description>disable output</description>
14213                            </enumeratedValue>
14214                            <enumeratedValue>
14215                                <name>ENABLE</name>
14216                                <value>3</value>
14217                                <description>enable output</description>
14218                            </enumeratedValue>
14219                        </enumeratedValues>
14220                    </field>
14221                    <field>
14222                        <name>OUTOVER</name>
14223                        <bitRange>[13:12]</bitRange>
14224                        <access>read-write</access>
14225                        <enumeratedValues>
14226                            <enumeratedValue>
14227                                <name>NORMAL</name>
14228                                <value>0</value>
14229                                <description>drive output from peripheral signal selected by funcsel</description>
14230                            </enumeratedValue>
14231                            <enumeratedValue>
14232                                <name>INVERT</name>
14233                                <value>1</value>
14234                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
14235                            </enumeratedValue>
14236                            <enumeratedValue>
14237                                <name>LOW</name>
14238                                <value>2</value>
14239                                <description>drive output low</description>
14240                            </enumeratedValue>
14241                            <enumeratedValue>
14242                                <name>HIGH</name>
14243                                <value>3</value>
14244                                <description>drive output high</description>
14245                            </enumeratedValue>
14246                        </enumeratedValues>
14247                    </field>
14248                    <field>
14249                        <name>FUNCSEL</name>
14250                        <description>0-31 -&gt; selects pin function according to the gpio table
14251                            31 == NULL</description>
14252                        <bitRange>[4:0]</bitRange>
14253                        <access>read-write</access>
14254                        <enumeratedValues>
14255                            <enumeratedValue>
14256                                <name>hstx_1</name>
14257                                <value>0</value>
14258                            </enumeratedValue>
14259                            <enumeratedValue>
14260                                <name>spi1_ss_n</name>
14261                                <value>1</value>
14262                            </enumeratedValue>
14263                            <enumeratedValue>
14264                                <name>uart0_rx</name>
14265                                <value>2</value>
14266                            </enumeratedValue>
14267                            <enumeratedValue>
14268                                <name>i2c0_scl</name>
14269                                <value>3</value>
14270                            </enumeratedValue>
14271                            <enumeratedValue>
14272                                <name>pwm_b_6</name>
14273                                <value>4</value>
14274                            </enumeratedValue>
14275                            <enumeratedValue>
14276                                <name>siob_proc_13</name>
14277                                <value>5</value>
14278                            </enumeratedValue>
14279                            <enumeratedValue>
14280                                <name>pio0_13</name>
14281                                <value>6</value>
14282                            </enumeratedValue>
14283                            <enumeratedValue>
14284                                <name>pio1_13</name>
14285                                <value>7</value>
14286                            </enumeratedValue>
14287                            <enumeratedValue>
14288                                <name>pio2_13</name>
14289                                <value>8</value>
14290                            </enumeratedValue>
14291                            <enumeratedValue>
14292                                <name>clocks_gpout_0</name>
14293                                <value>9</value>
14294                            </enumeratedValue>
14295                            <enumeratedValue>
14296                                <name>usb_muxing_vbus_detect</name>
14297                                <value>10</value>
14298                            </enumeratedValue>
14299                            <enumeratedValue>
14300                                <name>null</name>
14301                                <value>31</value>
14302                            </enumeratedValue>
14303                        </enumeratedValues>
14304                    </field>
14305                </fields>
14306            </register>
14307            <register>
14308                <name>GPIO14_STATUS</name>
14309                <addressOffset>0x00000070</addressOffset>
14310                <resetValue>0x00000000</resetValue>
14311                <fields>
14312                    <field>
14313                        <name>IRQTOPROC</name>
14314                        <description>interrupt to processors, after override is applied</description>
14315                        <bitRange>[26:26]</bitRange>
14316                        <access>read-only</access>
14317                    </field>
14318                    <field>
14319                        <name>INFROMPAD</name>
14320                        <description>input signal from pad, before filtering and override are applied</description>
14321                        <bitRange>[17:17]</bitRange>
14322                        <access>read-only</access>
14323                    </field>
14324                    <field>
14325                        <name>OETOPAD</name>
14326                        <description>output enable to pad after register override is applied</description>
14327                        <bitRange>[13:13]</bitRange>
14328                        <access>read-only</access>
14329                    </field>
14330                    <field>
14331                        <name>OUTTOPAD</name>
14332                        <description>output signal to pad after register override is applied</description>
14333                        <bitRange>[9:9]</bitRange>
14334                        <access>read-only</access>
14335                    </field>
14336                </fields>
14337            </register>
14338            <register>
14339                <name>GPIO14_CTRL</name>
14340                <addressOffset>0x00000074</addressOffset>
14341                <resetValue>0x0000001f</resetValue>
14342                <fields>
14343                    <field>
14344                        <name>IRQOVER</name>
14345                        <bitRange>[29:28]</bitRange>
14346                        <access>read-write</access>
14347                        <enumeratedValues>
14348                            <enumeratedValue>
14349                                <name>NORMAL</name>
14350                                <value>0</value>
14351                                <description>don&#39;t invert the interrupt</description>
14352                            </enumeratedValue>
14353                            <enumeratedValue>
14354                                <name>INVERT</name>
14355                                <value>1</value>
14356                                <description>invert the interrupt</description>
14357                            </enumeratedValue>
14358                            <enumeratedValue>
14359                                <name>LOW</name>
14360                                <value>2</value>
14361                                <description>drive interrupt low</description>
14362                            </enumeratedValue>
14363                            <enumeratedValue>
14364                                <name>HIGH</name>
14365                                <value>3</value>
14366                                <description>drive interrupt high</description>
14367                            </enumeratedValue>
14368                        </enumeratedValues>
14369                    </field>
14370                    <field>
14371                        <name>INOVER</name>
14372                        <bitRange>[17:16]</bitRange>
14373                        <access>read-write</access>
14374                        <enumeratedValues>
14375                            <enumeratedValue>
14376                                <name>NORMAL</name>
14377                                <value>0</value>
14378                                <description>don&#39;t invert the peri input</description>
14379                            </enumeratedValue>
14380                            <enumeratedValue>
14381                                <name>INVERT</name>
14382                                <value>1</value>
14383                                <description>invert the peri input</description>
14384                            </enumeratedValue>
14385                            <enumeratedValue>
14386                                <name>LOW</name>
14387                                <value>2</value>
14388                                <description>drive peri input low</description>
14389                            </enumeratedValue>
14390                            <enumeratedValue>
14391                                <name>HIGH</name>
14392                                <value>3</value>
14393                                <description>drive peri input high</description>
14394                            </enumeratedValue>
14395                        </enumeratedValues>
14396                    </field>
14397                    <field>
14398                        <name>OEOVER</name>
14399                        <bitRange>[15:14]</bitRange>
14400                        <access>read-write</access>
14401                        <enumeratedValues>
14402                            <enumeratedValue>
14403                                <name>NORMAL</name>
14404                                <value>0</value>
14405                                <description>drive output enable from peripheral signal selected by funcsel</description>
14406                            </enumeratedValue>
14407                            <enumeratedValue>
14408                                <name>INVERT</name>
14409                                <value>1</value>
14410                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
14411                            </enumeratedValue>
14412                            <enumeratedValue>
14413                                <name>DISABLE</name>
14414                                <value>2</value>
14415                                <description>disable output</description>
14416                            </enumeratedValue>
14417                            <enumeratedValue>
14418                                <name>ENABLE</name>
14419                                <value>3</value>
14420                                <description>enable output</description>
14421                            </enumeratedValue>
14422                        </enumeratedValues>
14423                    </field>
14424                    <field>
14425                        <name>OUTOVER</name>
14426                        <bitRange>[13:12]</bitRange>
14427                        <access>read-write</access>
14428                        <enumeratedValues>
14429                            <enumeratedValue>
14430                                <name>NORMAL</name>
14431                                <value>0</value>
14432                                <description>drive output from peripheral signal selected by funcsel</description>
14433                            </enumeratedValue>
14434                            <enumeratedValue>
14435                                <name>INVERT</name>
14436                                <value>1</value>
14437                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
14438                            </enumeratedValue>
14439                            <enumeratedValue>
14440                                <name>LOW</name>
14441                                <value>2</value>
14442                                <description>drive output low</description>
14443                            </enumeratedValue>
14444                            <enumeratedValue>
14445                                <name>HIGH</name>
14446                                <value>3</value>
14447                                <description>drive output high</description>
14448                            </enumeratedValue>
14449                        </enumeratedValues>
14450                    </field>
14451                    <field>
14452                        <name>FUNCSEL</name>
14453                        <description>0-31 -&gt; selects pin function according to the gpio table
14454                            31 == NULL</description>
14455                        <bitRange>[4:0]</bitRange>
14456                        <access>read-write</access>
14457                        <enumeratedValues>
14458                            <enumeratedValue>
14459                                <name>hstx_2</name>
14460                                <value>0</value>
14461                            </enumeratedValue>
14462                            <enumeratedValue>
14463                                <name>spi1_sclk</name>
14464                                <value>1</value>
14465                            </enumeratedValue>
14466                            <enumeratedValue>
14467                                <name>uart0_cts</name>
14468                                <value>2</value>
14469                            </enumeratedValue>
14470                            <enumeratedValue>
14471                                <name>i2c1_sda</name>
14472                                <value>3</value>
14473                            </enumeratedValue>
14474                            <enumeratedValue>
14475                                <name>pwm_a_7</name>
14476                                <value>4</value>
14477                            </enumeratedValue>
14478                            <enumeratedValue>
14479                                <name>siob_proc_14</name>
14480                                <value>5</value>
14481                            </enumeratedValue>
14482                            <enumeratedValue>
14483                                <name>pio0_14</name>
14484                                <value>6</value>
14485                            </enumeratedValue>
14486                            <enumeratedValue>
14487                                <name>pio1_14</name>
14488                                <value>7</value>
14489                            </enumeratedValue>
14490                            <enumeratedValue>
14491                                <name>pio2_14</name>
14492                                <value>8</value>
14493                            </enumeratedValue>
14494                            <enumeratedValue>
14495                                <name>clocks_gpin_1</name>
14496                                <value>9</value>
14497                            </enumeratedValue>
14498                            <enumeratedValue>
14499                                <name>usb_muxing_vbus_en</name>
14500                                <value>10</value>
14501                            </enumeratedValue>
14502                            <enumeratedValue>
14503                                <name>uart0_tx</name>
14504                                <value>11</value>
14505                            </enumeratedValue>
14506                            <enumeratedValue>
14507                                <name>null</name>
14508                                <value>31</value>
14509                            </enumeratedValue>
14510                        </enumeratedValues>
14511                    </field>
14512                </fields>
14513            </register>
14514            <register>
14515                <name>GPIO15_STATUS</name>
14516                <addressOffset>0x00000078</addressOffset>
14517                <resetValue>0x00000000</resetValue>
14518                <fields>
14519                    <field>
14520                        <name>IRQTOPROC</name>
14521                        <description>interrupt to processors, after override is applied</description>
14522                        <bitRange>[26:26]</bitRange>
14523                        <access>read-only</access>
14524                    </field>
14525                    <field>
14526                        <name>INFROMPAD</name>
14527                        <description>input signal from pad, before filtering and override are applied</description>
14528                        <bitRange>[17:17]</bitRange>
14529                        <access>read-only</access>
14530                    </field>
14531                    <field>
14532                        <name>OETOPAD</name>
14533                        <description>output enable to pad after register override is applied</description>
14534                        <bitRange>[13:13]</bitRange>
14535                        <access>read-only</access>
14536                    </field>
14537                    <field>
14538                        <name>OUTTOPAD</name>
14539                        <description>output signal to pad after register override is applied</description>
14540                        <bitRange>[9:9]</bitRange>
14541                        <access>read-only</access>
14542                    </field>
14543                </fields>
14544            </register>
14545            <register>
14546                <name>GPIO15_CTRL</name>
14547                <addressOffset>0x0000007c</addressOffset>
14548                <resetValue>0x0000001f</resetValue>
14549                <fields>
14550                    <field>
14551                        <name>IRQOVER</name>
14552                        <bitRange>[29:28]</bitRange>
14553                        <access>read-write</access>
14554                        <enumeratedValues>
14555                            <enumeratedValue>
14556                                <name>NORMAL</name>
14557                                <value>0</value>
14558                                <description>don&#39;t invert the interrupt</description>
14559                            </enumeratedValue>
14560                            <enumeratedValue>
14561                                <name>INVERT</name>
14562                                <value>1</value>
14563                                <description>invert the interrupt</description>
14564                            </enumeratedValue>
14565                            <enumeratedValue>
14566                                <name>LOW</name>
14567                                <value>2</value>
14568                                <description>drive interrupt low</description>
14569                            </enumeratedValue>
14570                            <enumeratedValue>
14571                                <name>HIGH</name>
14572                                <value>3</value>
14573                                <description>drive interrupt high</description>
14574                            </enumeratedValue>
14575                        </enumeratedValues>
14576                    </field>
14577                    <field>
14578                        <name>INOVER</name>
14579                        <bitRange>[17:16]</bitRange>
14580                        <access>read-write</access>
14581                        <enumeratedValues>
14582                            <enumeratedValue>
14583                                <name>NORMAL</name>
14584                                <value>0</value>
14585                                <description>don&#39;t invert the peri input</description>
14586                            </enumeratedValue>
14587                            <enumeratedValue>
14588                                <name>INVERT</name>
14589                                <value>1</value>
14590                                <description>invert the peri input</description>
14591                            </enumeratedValue>
14592                            <enumeratedValue>
14593                                <name>LOW</name>
14594                                <value>2</value>
14595                                <description>drive peri input low</description>
14596                            </enumeratedValue>
14597                            <enumeratedValue>
14598                                <name>HIGH</name>
14599                                <value>3</value>
14600                                <description>drive peri input high</description>
14601                            </enumeratedValue>
14602                        </enumeratedValues>
14603                    </field>
14604                    <field>
14605                        <name>OEOVER</name>
14606                        <bitRange>[15:14]</bitRange>
14607                        <access>read-write</access>
14608                        <enumeratedValues>
14609                            <enumeratedValue>
14610                                <name>NORMAL</name>
14611                                <value>0</value>
14612                                <description>drive output enable from peripheral signal selected by funcsel</description>
14613                            </enumeratedValue>
14614                            <enumeratedValue>
14615                                <name>INVERT</name>
14616                                <value>1</value>
14617                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
14618                            </enumeratedValue>
14619                            <enumeratedValue>
14620                                <name>DISABLE</name>
14621                                <value>2</value>
14622                                <description>disable output</description>
14623                            </enumeratedValue>
14624                            <enumeratedValue>
14625                                <name>ENABLE</name>
14626                                <value>3</value>
14627                                <description>enable output</description>
14628                            </enumeratedValue>
14629                        </enumeratedValues>
14630                    </field>
14631                    <field>
14632                        <name>OUTOVER</name>
14633                        <bitRange>[13:12]</bitRange>
14634                        <access>read-write</access>
14635                        <enumeratedValues>
14636                            <enumeratedValue>
14637                                <name>NORMAL</name>
14638                                <value>0</value>
14639                                <description>drive output from peripheral signal selected by funcsel</description>
14640                            </enumeratedValue>
14641                            <enumeratedValue>
14642                                <name>INVERT</name>
14643                                <value>1</value>
14644                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
14645                            </enumeratedValue>
14646                            <enumeratedValue>
14647                                <name>LOW</name>
14648                                <value>2</value>
14649                                <description>drive output low</description>
14650                            </enumeratedValue>
14651                            <enumeratedValue>
14652                                <name>HIGH</name>
14653                                <value>3</value>
14654                                <description>drive output high</description>
14655                            </enumeratedValue>
14656                        </enumeratedValues>
14657                    </field>
14658                    <field>
14659                        <name>FUNCSEL</name>
14660                        <description>0-31 -&gt; selects pin function according to the gpio table
14661                            31 == NULL</description>
14662                        <bitRange>[4:0]</bitRange>
14663                        <access>read-write</access>
14664                        <enumeratedValues>
14665                            <enumeratedValue>
14666                                <name>hstx_3</name>
14667                                <value>0</value>
14668                            </enumeratedValue>
14669                            <enumeratedValue>
14670                                <name>spi1_tx</name>
14671                                <value>1</value>
14672                            </enumeratedValue>
14673                            <enumeratedValue>
14674                                <name>uart0_rts</name>
14675                                <value>2</value>
14676                            </enumeratedValue>
14677                            <enumeratedValue>
14678                                <name>i2c1_scl</name>
14679                                <value>3</value>
14680                            </enumeratedValue>
14681                            <enumeratedValue>
14682                                <name>pwm_b_7</name>
14683                                <value>4</value>
14684                            </enumeratedValue>
14685                            <enumeratedValue>
14686                                <name>siob_proc_15</name>
14687                                <value>5</value>
14688                            </enumeratedValue>
14689                            <enumeratedValue>
14690                                <name>pio0_15</name>
14691                                <value>6</value>
14692                            </enumeratedValue>
14693                            <enumeratedValue>
14694                                <name>pio1_15</name>
14695                                <value>7</value>
14696                            </enumeratedValue>
14697                            <enumeratedValue>
14698                                <name>pio2_15</name>
14699                                <value>8</value>
14700                            </enumeratedValue>
14701                            <enumeratedValue>
14702                                <name>clocks_gpout_1</name>
14703                                <value>9</value>
14704                            </enumeratedValue>
14705                            <enumeratedValue>
14706                                <name>usb_muxing_overcurr_detect</name>
14707                                <value>10</value>
14708                            </enumeratedValue>
14709                            <enumeratedValue>
14710                                <name>uart0_rx</name>
14711                                <value>11</value>
14712                            </enumeratedValue>
14713                            <enumeratedValue>
14714                                <name>null</name>
14715                                <value>31</value>
14716                            </enumeratedValue>
14717                        </enumeratedValues>
14718                    </field>
14719                </fields>
14720            </register>
14721            <register>
14722                <name>GPIO16_STATUS</name>
14723                <addressOffset>0x00000080</addressOffset>
14724                <resetValue>0x00000000</resetValue>
14725                <fields>
14726                    <field>
14727                        <name>IRQTOPROC</name>
14728                        <description>interrupt to processors, after override is applied</description>
14729                        <bitRange>[26:26]</bitRange>
14730                        <access>read-only</access>
14731                    </field>
14732                    <field>
14733                        <name>INFROMPAD</name>
14734                        <description>input signal from pad, before filtering and override are applied</description>
14735                        <bitRange>[17:17]</bitRange>
14736                        <access>read-only</access>
14737                    </field>
14738                    <field>
14739                        <name>OETOPAD</name>
14740                        <description>output enable to pad after register override is applied</description>
14741                        <bitRange>[13:13]</bitRange>
14742                        <access>read-only</access>
14743                    </field>
14744                    <field>
14745                        <name>OUTTOPAD</name>
14746                        <description>output signal to pad after register override is applied</description>
14747                        <bitRange>[9:9]</bitRange>
14748                        <access>read-only</access>
14749                    </field>
14750                </fields>
14751            </register>
14752            <register>
14753                <name>GPIO16_CTRL</name>
14754                <addressOffset>0x00000084</addressOffset>
14755                <resetValue>0x0000001f</resetValue>
14756                <fields>
14757                    <field>
14758                        <name>IRQOVER</name>
14759                        <bitRange>[29:28]</bitRange>
14760                        <access>read-write</access>
14761                        <enumeratedValues>
14762                            <enumeratedValue>
14763                                <name>NORMAL</name>
14764                                <value>0</value>
14765                                <description>don&#39;t invert the interrupt</description>
14766                            </enumeratedValue>
14767                            <enumeratedValue>
14768                                <name>INVERT</name>
14769                                <value>1</value>
14770                                <description>invert the interrupt</description>
14771                            </enumeratedValue>
14772                            <enumeratedValue>
14773                                <name>LOW</name>
14774                                <value>2</value>
14775                                <description>drive interrupt low</description>
14776                            </enumeratedValue>
14777                            <enumeratedValue>
14778                                <name>HIGH</name>
14779                                <value>3</value>
14780                                <description>drive interrupt high</description>
14781                            </enumeratedValue>
14782                        </enumeratedValues>
14783                    </field>
14784                    <field>
14785                        <name>INOVER</name>
14786                        <bitRange>[17:16]</bitRange>
14787                        <access>read-write</access>
14788                        <enumeratedValues>
14789                            <enumeratedValue>
14790                                <name>NORMAL</name>
14791                                <value>0</value>
14792                                <description>don&#39;t invert the peri input</description>
14793                            </enumeratedValue>
14794                            <enumeratedValue>
14795                                <name>INVERT</name>
14796                                <value>1</value>
14797                                <description>invert the peri input</description>
14798                            </enumeratedValue>
14799                            <enumeratedValue>
14800                                <name>LOW</name>
14801                                <value>2</value>
14802                                <description>drive peri input low</description>
14803                            </enumeratedValue>
14804                            <enumeratedValue>
14805                                <name>HIGH</name>
14806                                <value>3</value>
14807                                <description>drive peri input high</description>
14808                            </enumeratedValue>
14809                        </enumeratedValues>
14810                    </field>
14811                    <field>
14812                        <name>OEOVER</name>
14813                        <bitRange>[15:14]</bitRange>
14814                        <access>read-write</access>
14815                        <enumeratedValues>
14816                            <enumeratedValue>
14817                                <name>NORMAL</name>
14818                                <value>0</value>
14819                                <description>drive output enable from peripheral signal selected by funcsel</description>
14820                            </enumeratedValue>
14821                            <enumeratedValue>
14822                                <name>INVERT</name>
14823                                <value>1</value>
14824                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
14825                            </enumeratedValue>
14826                            <enumeratedValue>
14827                                <name>DISABLE</name>
14828                                <value>2</value>
14829                                <description>disable output</description>
14830                            </enumeratedValue>
14831                            <enumeratedValue>
14832                                <name>ENABLE</name>
14833                                <value>3</value>
14834                                <description>enable output</description>
14835                            </enumeratedValue>
14836                        </enumeratedValues>
14837                    </field>
14838                    <field>
14839                        <name>OUTOVER</name>
14840                        <bitRange>[13:12]</bitRange>
14841                        <access>read-write</access>
14842                        <enumeratedValues>
14843                            <enumeratedValue>
14844                                <name>NORMAL</name>
14845                                <value>0</value>
14846                                <description>drive output from peripheral signal selected by funcsel</description>
14847                            </enumeratedValue>
14848                            <enumeratedValue>
14849                                <name>INVERT</name>
14850                                <value>1</value>
14851                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
14852                            </enumeratedValue>
14853                            <enumeratedValue>
14854                                <name>LOW</name>
14855                                <value>2</value>
14856                                <description>drive output low</description>
14857                            </enumeratedValue>
14858                            <enumeratedValue>
14859                                <name>HIGH</name>
14860                                <value>3</value>
14861                                <description>drive output high</description>
14862                            </enumeratedValue>
14863                        </enumeratedValues>
14864                    </field>
14865                    <field>
14866                        <name>FUNCSEL</name>
14867                        <description>0-31 -&gt; selects pin function according to the gpio table
14868                            31 == NULL</description>
14869                        <bitRange>[4:0]</bitRange>
14870                        <access>read-write</access>
14871                        <enumeratedValues>
14872                            <enumeratedValue>
14873                                <name>hstx_4</name>
14874                                <value>0</value>
14875                            </enumeratedValue>
14876                            <enumeratedValue>
14877                                <name>spi0_rx</name>
14878                                <value>1</value>
14879                            </enumeratedValue>
14880                            <enumeratedValue>
14881                                <name>uart0_tx</name>
14882                                <value>2</value>
14883                            </enumeratedValue>
14884                            <enumeratedValue>
14885                                <name>i2c0_sda</name>
14886                                <value>3</value>
14887                            </enumeratedValue>
14888                            <enumeratedValue>
14889                                <name>pwm_a_0</name>
14890                                <value>4</value>
14891                            </enumeratedValue>
14892                            <enumeratedValue>
14893                                <name>siob_proc_16</name>
14894                                <value>5</value>
14895                            </enumeratedValue>
14896                            <enumeratedValue>
14897                                <name>pio0_16</name>
14898                                <value>6</value>
14899                            </enumeratedValue>
14900                            <enumeratedValue>
14901                                <name>pio1_16</name>
14902                                <value>7</value>
14903                            </enumeratedValue>
14904                            <enumeratedValue>
14905                                <name>pio2_16</name>
14906                                <value>8</value>
14907                            </enumeratedValue>
14908                            <enumeratedValue>
14909                                <name>usb_muxing_vbus_detect</name>
14910                                <value>10</value>
14911                            </enumeratedValue>
14912                            <enumeratedValue>
14913                                <name>null</name>
14914                                <value>31</value>
14915                            </enumeratedValue>
14916                        </enumeratedValues>
14917                    </field>
14918                </fields>
14919            </register>
14920            <register>
14921                <name>GPIO17_STATUS</name>
14922                <addressOffset>0x00000088</addressOffset>
14923                <resetValue>0x00000000</resetValue>
14924                <fields>
14925                    <field>
14926                        <name>IRQTOPROC</name>
14927                        <description>interrupt to processors, after override is applied</description>
14928                        <bitRange>[26:26]</bitRange>
14929                        <access>read-only</access>
14930                    </field>
14931                    <field>
14932                        <name>INFROMPAD</name>
14933                        <description>input signal from pad, before filtering and override are applied</description>
14934                        <bitRange>[17:17]</bitRange>
14935                        <access>read-only</access>
14936                    </field>
14937                    <field>
14938                        <name>OETOPAD</name>
14939                        <description>output enable to pad after register override is applied</description>
14940                        <bitRange>[13:13]</bitRange>
14941                        <access>read-only</access>
14942                    </field>
14943                    <field>
14944                        <name>OUTTOPAD</name>
14945                        <description>output signal to pad after register override is applied</description>
14946                        <bitRange>[9:9]</bitRange>
14947                        <access>read-only</access>
14948                    </field>
14949                </fields>
14950            </register>
14951            <register>
14952                <name>GPIO17_CTRL</name>
14953                <addressOffset>0x0000008c</addressOffset>
14954                <resetValue>0x0000001f</resetValue>
14955                <fields>
14956                    <field>
14957                        <name>IRQOVER</name>
14958                        <bitRange>[29:28]</bitRange>
14959                        <access>read-write</access>
14960                        <enumeratedValues>
14961                            <enumeratedValue>
14962                                <name>NORMAL</name>
14963                                <value>0</value>
14964                                <description>don&#39;t invert the interrupt</description>
14965                            </enumeratedValue>
14966                            <enumeratedValue>
14967                                <name>INVERT</name>
14968                                <value>1</value>
14969                                <description>invert the interrupt</description>
14970                            </enumeratedValue>
14971                            <enumeratedValue>
14972                                <name>LOW</name>
14973                                <value>2</value>
14974                                <description>drive interrupt low</description>
14975                            </enumeratedValue>
14976                            <enumeratedValue>
14977                                <name>HIGH</name>
14978                                <value>3</value>
14979                                <description>drive interrupt high</description>
14980                            </enumeratedValue>
14981                        </enumeratedValues>
14982                    </field>
14983                    <field>
14984                        <name>INOVER</name>
14985                        <bitRange>[17:16]</bitRange>
14986                        <access>read-write</access>
14987                        <enumeratedValues>
14988                            <enumeratedValue>
14989                                <name>NORMAL</name>
14990                                <value>0</value>
14991                                <description>don&#39;t invert the peri input</description>
14992                            </enumeratedValue>
14993                            <enumeratedValue>
14994                                <name>INVERT</name>
14995                                <value>1</value>
14996                                <description>invert the peri input</description>
14997                            </enumeratedValue>
14998                            <enumeratedValue>
14999                                <name>LOW</name>
15000                                <value>2</value>
15001                                <description>drive peri input low</description>
15002                            </enumeratedValue>
15003                            <enumeratedValue>
15004                                <name>HIGH</name>
15005                                <value>3</value>
15006                                <description>drive peri input high</description>
15007                            </enumeratedValue>
15008                        </enumeratedValues>
15009                    </field>
15010                    <field>
15011                        <name>OEOVER</name>
15012                        <bitRange>[15:14]</bitRange>
15013                        <access>read-write</access>
15014                        <enumeratedValues>
15015                            <enumeratedValue>
15016                                <name>NORMAL</name>
15017                                <value>0</value>
15018                                <description>drive output enable from peripheral signal selected by funcsel</description>
15019                            </enumeratedValue>
15020                            <enumeratedValue>
15021                                <name>INVERT</name>
15022                                <value>1</value>
15023                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
15024                            </enumeratedValue>
15025                            <enumeratedValue>
15026                                <name>DISABLE</name>
15027                                <value>2</value>
15028                                <description>disable output</description>
15029                            </enumeratedValue>
15030                            <enumeratedValue>
15031                                <name>ENABLE</name>
15032                                <value>3</value>
15033                                <description>enable output</description>
15034                            </enumeratedValue>
15035                        </enumeratedValues>
15036                    </field>
15037                    <field>
15038                        <name>OUTOVER</name>
15039                        <bitRange>[13:12]</bitRange>
15040                        <access>read-write</access>
15041                        <enumeratedValues>
15042                            <enumeratedValue>
15043                                <name>NORMAL</name>
15044                                <value>0</value>
15045                                <description>drive output from peripheral signal selected by funcsel</description>
15046                            </enumeratedValue>
15047                            <enumeratedValue>
15048                                <name>INVERT</name>
15049                                <value>1</value>
15050                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
15051                            </enumeratedValue>
15052                            <enumeratedValue>
15053                                <name>LOW</name>
15054                                <value>2</value>
15055                                <description>drive output low</description>
15056                            </enumeratedValue>
15057                            <enumeratedValue>
15058                                <name>HIGH</name>
15059                                <value>3</value>
15060                                <description>drive output high</description>
15061                            </enumeratedValue>
15062                        </enumeratedValues>
15063                    </field>
15064                    <field>
15065                        <name>FUNCSEL</name>
15066                        <description>0-31 -&gt; selects pin function according to the gpio table
15067                            31 == NULL</description>
15068                        <bitRange>[4:0]</bitRange>
15069                        <access>read-write</access>
15070                        <enumeratedValues>
15071                            <enumeratedValue>
15072                                <name>hstx_5</name>
15073                                <value>0</value>
15074                            </enumeratedValue>
15075                            <enumeratedValue>
15076                                <name>spi0_ss_n</name>
15077                                <value>1</value>
15078                            </enumeratedValue>
15079                            <enumeratedValue>
15080                                <name>uart0_rx</name>
15081                                <value>2</value>
15082                            </enumeratedValue>
15083                            <enumeratedValue>
15084                                <name>i2c0_scl</name>
15085                                <value>3</value>
15086                            </enumeratedValue>
15087                            <enumeratedValue>
15088                                <name>pwm_b_0</name>
15089                                <value>4</value>
15090                            </enumeratedValue>
15091                            <enumeratedValue>
15092                                <name>siob_proc_17</name>
15093                                <value>5</value>
15094                            </enumeratedValue>
15095                            <enumeratedValue>
15096                                <name>pio0_17</name>
15097                                <value>6</value>
15098                            </enumeratedValue>
15099                            <enumeratedValue>
15100                                <name>pio1_17</name>
15101                                <value>7</value>
15102                            </enumeratedValue>
15103                            <enumeratedValue>
15104                                <name>pio2_17</name>
15105                                <value>8</value>
15106                            </enumeratedValue>
15107                            <enumeratedValue>
15108                                <name>usb_muxing_vbus_en</name>
15109                                <value>10</value>
15110                            </enumeratedValue>
15111                            <enumeratedValue>
15112                                <name>null</name>
15113                                <value>31</value>
15114                            </enumeratedValue>
15115                        </enumeratedValues>
15116                    </field>
15117                </fields>
15118            </register>
15119            <register>
15120                <name>GPIO18_STATUS</name>
15121                <addressOffset>0x00000090</addressOffset>
15122                <resetValue>0x00000000</resetValue>
15123                <fields>
15124                    <field>
15125                        <name>IRQTOPROC</name>
15126                        <description>interrupt to processors, after override is applied</description>
15127                        <bitRange>[26:26]</bitRange>
15128                        <access>read-only</access>
15129                    </field>
15130                    <field>
15131                        <name>INFROMPAD</name>
15132                        <description>input signal from pad, before filtering and override are applied</description>
15133                        <bitRange>[17:17]</bitRange>
15134                        <access>read-only</access>
15135                    </field>
15136                    <field>
15137                        <name>OETOPAD</name>
15138                        <description>output enable to pad after register override is applied</description>
15139                        <bitRange>[13:13]</bitRange>
15140                        <access>read-only</access>
15141                    </field>
15142                    <field>
15143                        <name>OUTTOPAD</name>
15144                        <description>output signal to pad after register override is applied</description>
15145                        <bitRange>[9:9]</bitRange>
15146                        <access>read-only</access>
15147                    </field>
15148                </fields>
15149            </register>
15150            <register>
15151                <name>GPIO18_CTRL</name>
15152                <addressOffset>0x00000094</addressOffset>
15153                <resetValue>0x0000001f</resetValue>
15154                <fields>
15155                    <field>
15156                        <name>IRQOVER</name>
15157                        <bitRange>[29:28]</bitRange>
15158                        <access>read-write</access>
15159                        <enumeratedValues>
15160                            <enumeratedValue>
15161                                <name>NORMAL</name>
15162                                <value>0</value>
15163                                <description>don&#39;t invert the interrupt</description>
15164                            </enumeratedValue>
15165                            <enumeratedValue>
15166                                <name>INVERT</name>
15167                                <value>1</value>
15168                                <description>invert the interrupt</description>
15169                            </enumeratedValue>
15170                            <enumeratedValue>
15171                                <name>LOW</name>
15172                                <value>2</value>
15173                                <description>drive interrupt low</description>
15174                            </enumeratedValue>
15175                            <enumeratedValue>
15176                                <name>HIGH</name>
15177                                <value>3</value>
15178                                <description>drive interrupt high</description>
15179                            </enumeratedValue>
15180                        </enumeratedValues>
15181                    </field>
15182                    <field>
15183                        <name>INOVER</name>
15184                        <bitRange>[17:16]</bitRange>
15185                        <access>read-write</access>
15186                        <enumeratedValues>
15187                            <enumeratedValue>
15188                                <name>NORMAL</name>
15189                                <value>0</value>
15190                                <description>don&#39;t invert the peri input</description>
15191                            </enumeratedValue>
15192                            <enumeratedValue>
15193                                <name>INVERT</name>
15194                                <value>1</value>
15195                                <description>invert the peri input</description>
15196                            </enumeratedValue>
15197                            <enumeratedValue>
15198                                <name>LOW</name>
15199                                <value>2</value>
15200                                <description>drive peri input low</description>
15201                            </enumeratedValue>
15202                            <enumeratedValue>
15203                                <name>HIGH</name>
15204                                <value>3</value>
15205                                <description>drive peri input high</description>
15206                            </enumeratedValue>
15207                        </enumeratedValues>
15208                    </field>
15209                    <field>
15210                        <name>OEOVER</name>
15211                        <bitRange>[15:14]</bitRange>
15212                        <access>read-write</access>
15213                        <enumeratedValues>
15214                            <enumeratedValue>
15215                                <name>NORMAL</name>
15216                                <value>0</value>
15217                                <description>drive output enable from peripheral signal selected by funcsel</description>
15218                            </enumeratedValue>
15219                            <enumeratedValue>
15220                                <name>INVERT</name>
15221                                <value>1</value>
15222                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
15223                            </enumeratedValue>
15224                            <enumeratedValue>
15225                                <name>DISABLE</name>
15226                                <value>2</value>
15227                                <description>disable output</description>
15228                            </enumeratedValue>
15229                            <enumeratedValue>
15230                                <name>ENABLE</name>
15231                                <value>3</value>
15232                                <description>enable output</description>
15233                            </enumeratedValue>
15234                        </enumeratedValues>
15235                    </field>
15236                    <field>
15237                        <name>OUTOVER</name>
15238                        <bitRange>[13:12]</bitRange>
15239                        <access>read-write</access>
15240                        <enumeratedValues>
15241                            <enumeratedValue>
15242                                <name>NORMAL</name>
15243                                <value>0</value>
15244                                <description>drive output from peripheral signal selected by funcsel</description>
15245                            </enumeratedValue>
15246                            <enumeratedValue>
15247                                <name>INVERT</name>
15248                                <value>1</value>
15249                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
15250                            </enumeratedValue>
15251                            <enumeratedValue>
15252                                <name>LOW</name>
15253                                <value>2</value>
15254                                <description>drive output low</description>
15255                            </enumeratedValue>
15256                            <enumeratedValue>
15257                                <name>HIGH</name>
15258                                <value>3</value>
15259                                <description>drive output high</description>
15260                            </enumeratedValue>
15261                        </enumeratedValues>
15262                    </field>
15263                    <field>
15264                        <name>FUNCSEL</name>
15265                        <description>0-31 -&gt; selects pin function according to the gpio table
15266                            31 == NULL</description>
15267                        <bitRange>[4:0]</bitRange>
15268                        <access>read-write</access>
15269                        <enumeratedValues>
15270                            <enumeratedValue>
15271                                <name>hstx_6</name>
15272                                <value>0</value>
15273                            </enumeratedValue>
15274                            <enumeratedValue>
15275                                <name>spi0_sclk</name>
15276                                <value>1</value>
15277                            </enumeratedValue>
15278                            <enumeratedValue>
15279                                <name>uart0_cts</name>
15280                                <value>2</value>
15281                            </enumeratedValue>
15282                            <enumeratedValue>
15283                                <name>i2c1_sda</name>
15284                                <value>3</value>
15285                            </enumeratedValue>
15286                            <enumeratedValue>
15287                                <name>pwm_a_1</name>
15288                                <value>4</value>
15289                            </enumeratedValue>
15290                            <enumeratedValue>
15291                                <name>siob_proc_18</name>
15292                                <value>5</value>
15293                            </enumeratedValue>
15294                            <enumeratedValue>
15295                                <name>pio0_18</name>
15296                                <value>6</value>
15297                            </enumeratedValue>
15298                            <enumeratedValue>
15299                                <name>pio1_18</name>
15300                                <value>7</value>
15301                            </enumeratedValue>
15302                            <enumeratedValue>
15303                                <name>pio2_18</name>
15304                                <value>8</value>
15305                            </enumeratedValue>
15306                            <enumeratedValue>
15307                                <name>usb_muxing_overcurr_detect</name>
15308                                <value>10</value>
15309                            </enumeratedValue>
15310                            <enumeratedValue>
15311                                <name>uart0_tx</name>
15312                                <value>11</value>
15313                            </enumeratedValue>
15314                            <enumeratedValue>
15315                                <name>null</name>
15316                                <value>31</value>
15317                            </enumeratedValue>
15318                        </enumeratedValues>
15319                    </field>
15320                </fields>
15321            </register>
15322            <register>
15323                <name>GPIO19_STATUS</name>
15324                <addressOffset>0x00000098</addressOffset>
15325                <resetValue>0x00000000</resetValue>
15326                <fields>
15327                    <field>
15328                        <name>IRQTOPROC</name>
15329                        <description>interrupt to processors, after override is applied</description>
15330                        <bitRange>[26:26]</bitRange>
15331                        <access>read-only</access>
15332                    </field>
15333                    <field>
15334                        <name>INFROMPAD</name>
15335                        <description>input signal from pad, before filtering and override are applied</description>
15336                        <bitRange>[17:17]</bitRange>
15337                        <access>read-only</access>
15338                    </field>
15339                    <field>
15340                        <name>OETOPAD</name>
15341                        <description>output enable to pad after register override is applied</description>
15342                        <bitRange>[13:13]</bitRange>
15343                        <access>read-only</access>
15344                    </field>
15345                    <field>
15346                        <name>OUTTOPAD</name>
15347                        <description>output signal to pad after register override is applied</description>
15348                        <bitRange>[9:9]</bitRange>
15349                        <access>read-only</access>
15350                    </field>
15351                </fields>
15352            </register>
15353            <register>
15354                <name>GPIO19_CTRL</name>
15355                <addressOffset>0x0000009c</addressOffset>
15356                <resetValue>0x0000001f</resetValue>
15357                <fields>
15358                    <field>
15359                        <name>IRQOVER</name>
15360                        <bitRange>[29:28]</bitRange>
15361                        <access>read-write</access>
15362                        <enumeratedValues>
15363                            <enumeratedValue>
15364                                <name>NORMAL</name>
15365                                <value>0</value>
15366                                <description>don&#39;t invert the interrupt</description>
15367                            </enumeratedValue>
15368                            <enumeratedValue>
15369                                <name>INVERT</name>
15370                                <value>1</value>
15371                                <description>invert the interrupt</description>
15372                            </enumeratedValue>
15373                            <enumeratedValue>
15374                                <name>LOW</name>
15375                                <value>2</value>
15376                                <description>drive interrupt low</description>
15377                            </enumeratedValue>
15378                            <enumeratedValue>
15379                                <name>HIGH</name>
15380                                <value>3</value>
15381                                <description>drive interrupt high</description>
15382                            </enumeratedValue>
15383                        </enumeratedValues>
15384                    </field>
15385                    <field>
15386                        <name>INOVER</name>
15387                        <bitRange>[17:16]</bitRange>
15388                        <access>read-write</access>
15389                        <enumeratedValues>
15390                            <enumeratedValue>
15391                                <name>NORMAL</name>
15392                                <value>0</value>
15393                                <description>don&#39;t invert the peri input</description>
15394                            </enumeratedValue>
15395                            <enumeratedValue>
15396                                <name>INVERT</name>
15397                                <value>1</value>
15398                                <description>invert the peri input</description>
15399                            </enumeratedValue>
15400                            <enumeratedValue>
15401                                <name>LOW</name>
15402                                <value>2</value>
15403                                <description>drive peri input low</description>
15404                            </enumeratedValue>
15405                            <enumeratedValue>
15406                                <name>HIGH</name>
15407                                <value>3</value>
15408                                <description>drive peri input high</description>
15409                            </enumeratedValue>
15410                        </enumeratedValues>
15411                    </field>
15412                    <field>
15413                        <name>OEOVER</name>
15414                        <bitRange>[15:14]</bitRange>
15415                        <access>read-write</access>
15416                        <enumeratedValues>
15417                            <enumeratedValue>
15418                                <name>NORMAL</name>
15419                                <value>0</value>
15420                                <description>drive output enable from peripheral signal selected by funcsel</description>
15421                            </enumeratedValue>
15422                            <enumeratedValue>
15423                                <name>INVERT</name>
15424                                <value>1</value>
15425                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
15426                            </enumeratedValue>
15427                            <enumeratedValue>
15428                                <name>DISABLE</name>
15429                                <value>2</value>
15430                                <description>disable output</description>
15431                            </enumeratedValue>
15432                            <enumeratedValue>
15433                                <name>ENABLE</name>
15434                                <value>3</value>
15435                                <description>enable output</description>
15436                            </enumeratedValue>
15437                        </enumeratedValues>
15438                    </field>
15439                    <field>
15440                        <name>OUTOVER</name>
15441                        <bitRange>[13:12]</bitRange>
15442                        <access>read-write</access>
15443                        <enumeratedValues>
15444                            <enumeratedValue>
15445                                <name>NORMAL</name>
15446                                <value>0</value>
15447                                <description>drive output from peripheral signal selected by funcsel</description>
15448                            </enumeratedValue>
15449                            <enumeratedValue>
15450                                <name>INVERT</name>
15451                                <value>1</value>
15452                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
15453                            </enumeratedValue>
15454                            <enumeratedValue>
15455                                <name>LOW</name>
15456                                <value>2</value>
15457                                <description>drive output low</description>
15458                            </enumeratedValue>
15459                            <enumeratedValue>
15460                                <name>HIGH</name>
15461                                <value>3</value>
15462                                <description>drive output high</description>
15463                            </enumeratedValue>
15464                        </enumeratedValues>
15465                    </field>
15466                    <field>
15467                        <name>FUNCSEL</name>
15468                        <description>0-31 -&gt; selects pin function according to the gpio table
15469                            31 == NULL</description>
15470                        <bitRange>[4:0]</bitRange>
15471                        <access>read-write</access>
15472                        <enumeratedValues>
15473                            <enumeratedValue>
15474                                <name>hstx_7</name>
15475                                <value>0</value>
15476                            </enumeratedValue>
15477                            <enumeratedValue>
15478                                <name>spi0_tx</name>
15479                                <value>1</value>
15480                            </enumeratedValue>
15481                            <enumeratedValue>
15482                                <name>uart0_rts</name>
15483                                <value>2</value>
15484                            </enumeratedValue>
15485                            <enumeratedValue>
15486                                <name>i2c1_scl</name>
15487                                <value>3</value>
15488                            </enumeratedValue>
15489                            <enumeratedValue>
15490                                <name>pwm_b_1</name>
15491                                <value>4</value>
15492                            </enumeratedValue>
15493                            <enumeratedValue>
15494                                <name>siob_proc_19</name>
15495                                <value>5</value>
15496                            </enumeratedValue>
15497                            <enumeratedValue>
15498                                <name>pio0_19</name>
15499                                <value>6</value>
15500                            </enumeratedValue>
15501                            <enumeratedValue>
15502                                <name>pio1_19</name>
15503                                <value>7</value>
15504                            </enumeratedValue>
15505                            <enumeratedValue>
15506                                <name>pio2_19</name>
15507                                <value>8</value>
15508                            </enumeratedValue>
15509                            <enumeratedValue>
15510                                <name>xip_ss_n_1</name>
15511                                <value>9</value>
15512                            </enumeratedValue>
15513                            <enumeratedValue>
15514                                <name>usb_muxing_vbus_detect</name>
15515                                <value>10</value>
15516                            </enumeratedValue>
15517                            <enumeratedValue>
15518                                <name>uart0_rx</name>
15519                                <value>11</value>
15520                            </enumeratedValue>
15521                            <enumeratedValue>
15522                                <name>null</name>
15523                                <value>31</value>
15524                            </enumeratedValue>
15525                        </enumeratedValues>
15526                    </field>
15527                </fields>
15528            </register>
15529            <register>
15530                <name>GPIO20_STATUS</name>
15531                <addressOffset>0x000000a0</addressOffset>
15532                <resetValue>0x00000000</resetValue>
15533                <fields>
15534                    <field>
15535                        <name>IRQTOPROC</name>
15536                        <description>interrupt to processors, after override is applied</description>
15537                        <bitRange>[26:26]</bitRange>
15538                        <access>read-only</access>
15539                    </field>
15540                    <field>
15541                        <name>INFROMPAD</name>
15542                        <description>input signal from pad, before filtering and override are applied</description>
15543                        <bitRange>[17:17]</bitRange>
15544                        <access>read-only</access>
15545                    </field>
15546                    <field>
15547                        <name>OETOPAD</name>
15548                        <description>output enable to pad after register override is applied</description>
15549                        <bitRange>[13:13]</bitRange>
15550                        <access>read-only</access>
15551                    </field>
15552                    <field>
15553                        <name>OUTTOPAD</name>
15554                        <description>output signal to pad after register override is applied</description>
15555                        <bitRange>[9:9]</bitRange>
15556                        <access>read-only</access>
15557                    </field>
15558                </fields>
15559            </register>
15560            <register>
15561                <name>GPIO20_CTRL</name>
15562                <addressOffset>0x000000a4</addressOffset>
15563                <resetValue>0x0000001f</resetValue>
15564                <fields>
15565                    <field>
15566                        <name>IRQOVER</name>
15567                        <bitRange>[29:28]</bitRange>
15568                        <access>read-write</access>
15569                        <enumeratedValues>
15570                            <enumeratedValue>
15571                                <name>NORMAL</name>
15572                                <value>0</value>
15573                                <description>don&#39;t invert the interrupt</description>
15574                            </enumeratedValue>
15575                            <enumeratedValue>
15576                                <name>INVERT</name>
15577                                <value>1</value>
15578                                <description>invert the interrupt</description>
15579                            </enumeratedValue>
15580                            <enumeratedValue>
15581                                <name>LOW</name>
15582                                <value>2</value>
15583                                <description>drive interrupt low</description>
15584                            </enumeratedValue>
15585                            <enumeratedValue>
15586                                <name>HIGH</name>
15587                                <value>3</value>
15588                                <description>drive interrupt high</description>
15589                            </enumeratedValue>
15590                        </enumeratedValues>
15591                    </field>
15592                    <field>
15593                        <name>INOVER</name>
15594                        <bitRange>[17:16]</bitRange>
15595                        <access>read-write</access>
15596                        <enumeratedValues>
15597                            <enumeratedValue>
15598                                <name>NORMAL</name>
15599                                <value>0</value>
15600                                <description>don&#39;t invert the peri input</description>
15601                            </enumeratedValue>
15602                            <enumeratedValue>
15603                                <name>INVERT</name>
15604                                <value>1</value>
15605                                <description>invert the peri input</description>
15606                            </enumeratedValue>
15607                            <enumeratedValue>
15608                                <name>LOW</name>
15609                                <value>2</value>
15610                                <description>drive peri input low</description>
15611                            </enumeratedValue>
15612                            <enumeratedValue>
15613                                <name>HIGH</name>
15614                                <value>3</value>
15615                                <description>drive peri input high</description>
15616                            </enumeratedValue>
15617                        </enumeratedValues>
15618                    </field>
15619                    <field>
15620                        <name>OEOVER</name>
15621                        <bitRange>[15:14]</bitRange>
15622                        <access>read-write</access>
15623                        <enumeratedValues>
15624                            <enumeratedValue>
15625                                <name>NORMAL</name>
15626                                <value>0</value>
15627                                <description>drive output enable from peripheral signal selected by funcsel</description>
15628                            </enumeratedValue>
15629                            <enumeratedValue>
15630                                <name>INVERT</name>
15631                                <value>1</value>
15632                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
15633                            </enumeratedValue>
15634                            <enumeratedValue>
15635                                <name>DISABLE</name>
15636                                <value>2</value>
15637                                <description>disable output</description>
15638                            </enumeratedValue>
15639                            <enumeratedValue>
15640                                <name>ENABLE</name>
15641                                <value>3</value>
15642                                <description>enable output</description>
15643                            </enumeratedValue>
15644                        </enumeratedValues>
15645                    </field>
15646                    <field>
15647                        <name>OUTOVER</name>
15648                        <bitRange>[13:12]</bitRange>
15649                        <access>read-write</access>
15650                        <enumeratedValues>
15651                            <enumeratedValue>
15652                                <name>NORMAL</name>
15653                                <value>0</value>
15654                                <description>drive output from peripheral signal selected by funcsel</description>
15655                            </enumeratedValue>
15656                            <enumeratedValue>
15657                                <name>INVERT</name>
15658                                <value>1</value>
15659                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
15660                            </enumeratedValue>
15661                            <enumeratedValue>
15662                                <name>LOW</name>
15663                                <value>2</value>
15664                                <description>drive output low</description>
15665                            </enumeratedValue>
15666                            <enumeratedValue>
15667                                <name>HIGH</name>
15668                                <value>3</value>
15669                                <description>drive output high</description>
15670                            </enumeratedValue>
15671                        </enumeratedValues>
15672                    </field>
15673                    <field>
15674                        <name>FUNCSEL</name>
15675                        <description>0-31 -&gt; selects pin function according to the gpio table
15676                            31 == NULL</description>
15677                        <bitRange>[4:0]</bitRange>
15678                        <access>read-write</access>
15679                        <enumeratedValues>
15680                            <enumeratedValue>
15681                                <name>spi0_rx</name>
15682                                <value>1</value>
15683                            </enumeratedValue>
15684                            <enumeratedValue>
15685                                <name>uart1_tx</name>
15686                                <value>2</value>
15687                            </enumeratedValue>
15688                            <enumeratedValue>
15689                                <name>i2c0_sda</name>
15690                                <value>3</value>
15691                            </enumeratedValue>
15692                            <enumeratedValue>
15693                                <name>pwm_a_2</name>
15694                                <value>4</value>
15695                            </enumeratedValue>
15696                            <enumeratedValue>
15697                                <name>siob_proc_20</name>
15698                                <value>5</value>
15699                            </enumeratedValue>
15700                            <enumeratedValue>
15701                                <name>pio0_20</name>
15702                                <value>6</value>
15703                            </enumeratedValue>
15704                            <enumeratedValue>
15705                                <name>pio1_20</name>
15706                                <value>7</value>
15707                            </enumeratedValue>
15708                            <enumeratedValue>
15709                                <name>pio2_20</name>
15710                                <value>8</value>
15711                            </enumeratedValue>
15712                            <enumeratedValue>
15713                                <name>clocks_gpin_0</name>
15714                                <value>9</value>
15715                            </enumeratedValue>
15716                            <enumeratedValue>
15717                                <name>usb_muxing_vbus_en</name>
15718                                <value>10</value>
15719                            </enumeratedValue>
15720                            <enumeratedValue>
15721                                <name>null</name>
15722                                <value>31</value>
15723                            </enumeratedValue>
15724                        </enumeratedValues>
15725                    </field>
15726                </fields>
15727            </register>
15728            <register>
15729                <name>GPIO21_STATUS</name>
15730                <addressOffset>0x000000a8</addressOffset>
15731                <resetValue>0x00000000</resetValue>
15732                <fields>
15733                    <field>
15734                        <name>IRQTOPROC</name>
15735                        <description>interrupt to processors, after override is applied</description>
15736                        <bitRange>[26:26]</bitRange>
15737                        <access>read-only</access>
15738                    </field>
15739                    <field>
15740                        <name>INFROMPAD</name>
15741                        <description>input signal from pad, before filtering and override are applied</description>
15742                        <bitRange>[17:17]</bitRange>
15743                        <access>read-only</access>
15744                    </field>
15745                    <field>
15746                        <name>OETOPAD</name>
15747                        <description>output enable to pad after register override is applied</description>
15748                        <bitRange>[13:13]</bitRange>
15749                        <access>read-only</access>
15750                    </field>
15751                    <field>
15752                        <name>OUTTOPAD</name>
15753                        <description>output signal to pad after register override is applied</description>
15754                        <bitRange>[9:9]</bitRange>
15755                        <access>read-only</access>
15756                    </field>
15757                </fields>
15758            </register>
15759            <register>
15760                <name>GPIO21_CTRL</name>
15761                <addressOffset>0x000000ac</addressOffset>
15762                <resetValue>0x0000001f</resetValue>
15763                <fields>
15764                    <field>
15765                        <name>IRQOVER</name>
15766                        <bitRange>[29:28]</bitRange>
15767                        <access>read-write</access>
15768                        <enumeratedValues>
15769                            <enumeratedValue>
15770                                <name>NORMAL</name>
15771                                <value>0</value>
15772                                <description>don&#39;t invert the interrupt</description>
15773                            </enumeratedValue>
15774                            <enumeratedValue>
15775                                <name>INVERT</name>
15776                                <value>1</value>
15777                                <description>invert the interrupt</description>
15778                            </enumeratedValue>
15779                            <enumeratedValue>
15780                                <name>LOW</name>
15781                                <value>2</value>
15782                                <description>drive interrupt low</description>
15783                            </enumeratedValue>
15784                            <enumeratedValue>
15785                                <name>HIGH</name>
15786                                <value>3</value>
15787                                <description>drive interrupt high</description>
15788                            </enumeratedValue>
15789                        </enumeratedValues>
15790                    </field>
15791                    <field>
15792                        <name>INOVER</name>
15793                        <bitRange>[17:16]</bitRange>
15794                        <access>read-write</access>
15795                        <enumeratedValues>
15796                            <enumeratedValue>
15797                                <name>NORMAL</name>
15798                                <value>0</value>
15799                                <description>don&#39;t invert the peri input</description>
15800                            </enumeratedValue>
15801                            <enumeratedValue>
15802                                <name>INVERT</name>
15803                                <value>1</value>
15804                                <description>invert the peri input</description>
15805                            </enumeratedValue>
15806                            <enumeratedValue>
15807                                <name>LOW</name>
15808                                <value>2</value>
15809                                <description>drive peri input low</description>
15810                            </enumeratedValue>
15811                            <enumeratedValue>
15812                                <name>HIGH</name>
15813                                <value>3</value>
15814                                <description>drive peri input high</description>
15815                            </enumeratedValue>
15816                        </enumeratedValues>
15817                    </field>
15818                    <field>
15819                        <name>OEOVER</name>
15820                        <bitRange>[15:14]</bitRange>
15821                        <access>read-write</access>
15822                        <enumeratedValues>
15823                            <enumeratedValue>
15824                                <name>NORMAL</name>
15825                                <value>0</value>
15826                                <description>drive output enable from peripheral signal selected by funcsel</description>
15827                            </enumeratedValue>
15828                            <enumeratedValue>
15829                                <name>INVERT</name>
15830                                <value>1</value>
15831                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
15832                            </enumeratedValue>
15833                            <enumeratedValue>
15834                                <name>DISABLE</name>
15835                                <value>2</value>
15836                                <description>disable output</description>
15837                            </enumeratedValue>
15838                            <enumeratedValue>
15839                                <name>ENABLE</name>
15840                                <value>3</value>
15841                                <description>enable output</description>
15842                            </enumeratedValue>
15843                        </enumeratedValues>
15844                    </field>
15845                    <field>
15846                        <name>OUTOVER</name>
15847                        <bitRange>[13:12]</bitRange>
15848                        <access>read-write</access>
15849                        <enumeratedValues>
15850                            <enumeratedValue>
15851                                <name>NORMAL</name>
15852                                <value>0</value>
15853                                <description>drive output from peripheral signal selected by funcsel</description>
15854                            </enumeratedValue>
15855                            <enumeratedValue>
15856                                <name>INVERT</name>
15857                                <value>1</value>
15858                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
15859                            </enumeratedValue>
15860                            <enumeratedValue>
15861                                <name>LOW</name>
15862                                <value>2</value>
15863                                <description>drive output low</description>
15864                            </enumeratedValue>
15865                            <enumeratedValue>
15866                                <name>HIGH</name>
15867                                <value>3</value>
15868                                <description>drive output high</description>
15869                            </enumeratedValue>
15870                        </enumeratedValues>
15871                    </field>
15872                    <field>
15873                        <name>FUNCSEL</name>
15874                        <description>0-31 -&gt; selects pin function according to the gpio table
15875                            31 == NULL</description>
15876                        <bitRange>[4:0]</bitRange>
15877                        <access>read-write</access>
15878                        <enumeratedValues>
15879                            <enumeratedValue>
15880                                <name>spi0_ss_n</name>
15881                                <value>1</value>
15882                            </enumeratedValue>
15883                            <enumeratedValue>
15884                                <name>uart1_rx</name>
15885                                <value>2</value>
15886                            </enumeratedValue>
15887                            <enumeratedValue>
15888                                <name>i2c0_scl</name>
15889                                <value>3</value>
15890                            </enumeratedValue>
15891                            <enumeratedValue>
15892                                <name>pwm_b_2</name>
15893                                <value>4</value>
15894                            </enumeratedValue>
15895                            <enumeratedValue>
15896                                <name>siob_proc_21</name>
15897                                <value>5</value>
15898                            </enumeratedValue>
15899                            <enumeratedValue>
15900                                <name>pio0_21</name>
15901                                <value>6</value>
15902                            </enumeratedValue>
15903                            <enumeratedValue>
15904                                <name>pio1_21</name>
15905                                <value>7</value>
15906                            </enumeratedValue>
15907                            <enumeratedValue>
15908                                <name>pio2_21</name>
15909                                <value>8</value>
15910                            </enumeratedValue>
15911                            <enumeratedValue>
15912                                <name>clocks_gpout_0</name>
15913                                <value>9</value>
15914                            </enumeratedValue>
15915                            <enumeratedValue>
15916                                <name>usb_muxing_overcurr_detect</name>
15917                                <value>10</value>
15918                            </enumeratedValue>
15919                            <enumeratedValue>
15920                                <name>null</name>
15921                                <value>31</value>
15922                            </enumeratedValue>
15923                        </enumeratedValues>
15924                    </field>
15925                </fields>
15926            </register>
15927            <register>
15928                <name>GPIO22_STATUS</name>
15929                <addressOffset>0x000000b0</addressOffset>
15930                <resetValue>0x00000000</resetValue>
15931                <fields>
15932                    <field>
15933                        <name>IRQTOPROC</name>
15934                        <description>interrupt to processors, after override is applied</description>
15935                        <bitRange>[26:26]</bitRange>
15936                        <access>read-only</access>
15937                    </field>
15938                    <field>
15939                        <name>INFROMPAD</name>
15940                        <description>input signal from pad, before filtering and override are applied</description>
15941                        <bitRange>[17:17]</bitRange>
15942                        <access>read-only</access>
15943                    </field>
15944                    <field>
15945                        <name>OETOPAD</name>
15946                        <description>output enable to pad after register override is applied</description>
15947                        <bitRange>[13:13]</bitRange>
15948                        <access>read-only</access>
15949                    </field>
15950                    <field>
15951                        <name>OUTTOPAD</name>
15952                        <description>output signal to pad after register override is applied</description>
15953                        <bitRange>[9:9]</bitRange>
15954                        <access>read-only</access>
15955                    </field>
15956                </fields>
15957            </register>
15958            <register>
15959                <name>GPIO22_CTRL</name>
15960                <addressOffset>0x000000b4</addressOffset>
15961                <resetValue>0x0000001f</resetValue>
15962                <fields>
15963                    <field>
15964                        <name>IRQOVER</name>
15965                        <bitRange>[29:28]</bitRange>
15966                        <access>read-write</access>
15967                        <enumeratedValues>
15968                            <enumeratedValue>
15969                                <name>NORMAL</name>
15970                                <value>0</value>
15971                                <description>don&#39;t invert the interrupt</description>
15972                            </enumeratedValue>
15973                            <enumeratedValue>
15974                                <name>INVERT</name>
15975                                <value>1</value>
15976                                <description>invert the interrupt</description>
15977                            </enumeratedValue>
15978                            <enumeratedValue>
15979                                <name>LOW</name>
15980                                <value>2</value>
15981                                <description>drive interrupt low</description>
15982                            </enumeratedValue>
15983                            <enumeratedValue>
15984                                <name>HIGH</name>
15985                                <value>3</value>
15986                                <description>drive interrupt high</description>
15987                            </enumeratedValue>
15988                        </enumeratedValues>
15989                    </field>
15990                    <field>
15991                        <name>INOVER</name>
15992                        <bitRange>[17:16]</bitRange>
15993                        <access>read-write</access>
15994                        <enumeratedValues>
15995                            <enumeratedValue>
15996                                <name>NORMAL</name>
15997                                <value>0</value>
15998                                <description>don&#39;t invert the peri input</description>
15999                            </enumeratedValue>
16000                            <enumeratedValue>
16001                                <name>INVERT</name>
16002                                <value>1</value>
16003                                <description>invert the peri input</description>
16004                            </enumeratedValue>
16005                            <enumeratedValue>
16006                                <name>LOW</name>
16007                                <value>2</value>
16008                                <description>drive peri input low</description>
16009                            </enumeratedValue>
16010                            <enumeratedValue>
16011                                <name>HIGH</name>
16012                                <value>3</value>
16013                                <description>drive peri input high</description>
16014                            </enumeratedValue>
16015                        </enumeratedValues>
16016                    </field>
16017                    <field>
16018                        <name>OEOVER</name>
16019                        <bitRange>[15:14]</bitRange>
16020                        <access>read-write</access>
16021                        <enumeratedValues>
16022                            <enumeratedValue>
16023                                <name>NORMAL</name>
16024                                <value>0</value>
16025                                <description>drive output enable from peripheral signal selected by funcsel</description>
16026                            </enumeratedValue>
16027                            <enumeratedValue>
16028                                <name>INVERT</name>
16029                                <value>1</value>
16030                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
16031                            </enumeratedValue>
16032                            <enumeratedValue>
16033                                <name>DISABLE</name>
16034                                <value>2</value>
16035                                <description>disable output</description>
16036                            </enumeratedValue>
16037                            <enumeratedValue>
16038                                <name>ENABLE</name>
16039                                <value>3</value>
16040                                <description>enable output</description>
16041                            </enumeratedValue>
16042                        </enumeratedValues>
16043                    </field>
16044                    <field>
16045                        <name>OUTOVER</name>
16046                        <bitRange>[13:12]</bitRange>
16047                        <access>read-write</access>
16048                        <enumeratedValues>
16049                            <enumeratedValue>
16050                                <name>NORMAL</name>
16051                                <value>0</value>
16052                                <description>drive output from peripheral signal selected by funcsel</description>
16053                            </enumeratedValue>
16054                            <enumeratedValue>
16055                                <name>INVERT</name>
16056                                <value>1</value>
16057                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
16058                            </enumeratedValue>
16059                            <enumeratedValue>
16060                                <name>LOW</name>
16061                                <value>2</value>
16062                                <description>drive output low</description>
16063                            </enumeratedValue>
16064                            <enumeratedValue>
16065                                <name>HIGH</name>
16066                                <value>3</value>
16067                                <description>drive output high</description>
16068                            </enumeratedValue>
16069                        </enumeratedValues>
16070                    </field>
16071                    <field>
16072                        <name>FUNCSEL</name>
16073                        <description>0-31 -&gt; selects pin function according to the gpio table
16074                            31 == NULL</description>
16075                        <bitRange>[4:0]</bitRange>
16076                        <access>read-write</access>
16077                        <enumeratedValues>
16078                            <enumeratedValue>
16079                                <name>spi0_sclk</name>
16080                                <value>1</value>
16081                            </enumeratedValue>
16082                            <enumeratedValue>
16083                                <name>uart1_cts</name>
16084                                <value>2</value>
16085                            </enumeratedValue>
16086                            <enumeratedValue>
16087                                <name>i2c1_sda</name>
16088                                <value>3</value>
16089                            </enumeratedValue>
16090                            <enumeratedValue>
16091                                <name>pwm_a_3</name>
16092                                <value>4</value>
16093                            </enumeratedValue>
16094                            <enumeratedValue>
16095                                <name>siob_proc_22</name>
16096                                <value>5</value>
16097                            </enumeratedValue>
16098                            <enumeratedValue>
16099                                <name>pio0_22</name>
16100                                <value>6</value>
16101                            </enumeratedValue>
16102                            <enumeratedValue>
16103                                <name>pio1_22</name>
16104                                <value>7</value>
16105                            </enumeratedValue>
16106                            <enumeratedValue>
16107                                <name>pio2_22</name>
16108                                <value>8</value>
16109                            </enumeratedValue>
16110                            <enumeratedValue>
16111                                <name>clocks_gpin_1</name>
16112                                <value>9</value>
16113                            </enumeratedValue>
16114                            <enumeratedValue>
16115                                <name>usb_muxing_vbus_detect</name>
16116                                <value>10</value>
16117                            </enumeratedValue>
16118                            <enumeratedValue>
16119                                <name>uart1_tx</name>
16120                                <value>11</value>
16121                            </enumeratedValue>
16122                            <enumeratedValue>
16123                                <name>null</name>
16124                                <value>31</value>
16125                            </enumeratedValue>
16126                        </enumeratedValues>
16127                    </field>
16128                </fields>
16129            </register>
16130            <register>
16131                <name>GPIO23_STATUS</name>
16132                <addressOffset>0x000000b8</addressOffset>
16133                <resetValue>0x00000000</resetValue>
16134                <fields>
16135                    <field>
16136                        <name>IRQTOPROC</name>
16137                        <description>interrupt to processors, after override is applied</description>
16138                        <bitRange>[26:26]</bitRange>
16139                        <access>read-only</access>
16140                    </field>
16141                    <field>
16142                        <name>INFROMPAD</name>
16143                        <description>input signal from pad, before filtering and override are applied</description>
16144                        <bitRange>[17:17]</bitRange>
16145                        <access>read-only</access>
16146                    </field>
16147                    <field>
16148                        <name>OETOPAD</name>
16149                        <description>output enable to pad after register override is applied</description>
16150                        <bitRange>[13:13]</bitRange>
16151                        <access>read-only</access>
16152                    </field>
16153                    <field>
16154                        <name>OUTTOPAD</name>
16155                        <description>output signal to pad after register override is applied</description>
16156                        <bitRange>[9:9]</bitRange>
16157                        <access>read-only</access>
16158                    </field>
16159                </fields>
16160            </register>
16161            <register>
16162                <name>GPIO23_CTRL</name>
16163                <addressOffset>0x000000bc</addressOffset>
16164                <resetValue>0x0000001f</resetValue>
16165                <fields>
16166                    <field>
16167                        <name>IRQOVER</name>
16168                        <bitRange>[29:28]</bitRange>
16169                        <access>read-write</access>
16170                        <enumeratedValues>
16171                            <enumeratedValue>
16172                                <name>NORMAL</name>
16173                                <value>0</value>
16174                                <description>don&#39;t invert the interrupt</description>
16175                            </enumeratedValue>
16176                            <enumeratedValue>
16177                                <name>INVERT</name>
16178                                <value>1</value>
16179                                <description>invert the interrupt</description>
16180                            </enumeratedValue>
16181                            <enumeratedValue>
16182                                <name>LOW</name>
16183                                <value>2</value>
16184                                <description>drive interrupt low</description>
16185                            </enumeratedValue>
16186                            <enumeratedValue>
16187                                <name>HIGH</name>
16188                                <value>3</value>
16189                                <description>drive interrupt high</description>
16190                            </enumeratedValue>
16191                        </enumeratedValues>
16192                    </field>
16193                    <field>
16194                        <name>INOVER</name>
16195                        <bitRange>[17:16]</bitRange>
16196                        <access>read-write</access>
16197                        <enumeratedValues>
16198                            <enumeratedValue>
16199                                <name>NORMAL</name>
16200                                <value>0</value>
16201                                <description>don&#39;t invert the peri input</description>
16202                            </enumeratedValue>
16203                            <enumeratedValue>
16204                                <name>INVERT</name>
16205                                <value>1</value>
16206                                <description>invert the peri input</description>
16207                            </enumeratedValue>
16208                            <enumeratedValue>
16209                                <name>LOW</name>
16210                                <value>2</value>
16211                                <description>drive peri input low</description>
16212                            </enumeratedValue>
16213                            <enumeratedValue>
16214                                <name>HIGH</name>
16215                                <value>3</value>
16216                                <description>drive peri input high</description>
16217                            </enumeratedValue>
16218                        </enumeratedValues>
16219                    </field>
16220                    <field>
16221                        <name>OEOVER</name>
16222                        <bitRange>[15:14]</bitRange>
16223                        <access>read-write</access>
16224                        <enumeratedValues>
16225                            <enumeratedValue>
16226                                <name>NORMAL</name>
16227                                <value>0</value>
16228                                <description>drive output enable from peripheral signal selected by funcsel</description>
16229                            </enumeratedValue>
16230                            <enumeratedValue>
16231                                <name>INVERT</name>
16232                                <value>1</value>
16233                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
16234                            </enumeratedValue>
16235                            <enumeratedValue>
16236                                <name>DISABLE</name>
16237                                <value>2</value>
16238                                <description>disable output</description>
16239                            </enumeratedValue>
16240                            <enumeratedValue>
16241                                <name>ENABLE</name>
16242                                <value>3</value>
16243                                <description>enable output</description>
16244                            </enumeratedValue>
16245                        </enumeratedValues>
16246                    </field>
16247                    <field>
16248                        <name>OUTOVER</name>
16249                        <bitRange>[13:12]</bitRange>
16250                        <access>read-write</access>
16251                        <enumeratedValues>
16252                            <enumeratedValue>
16253                                <name>NORMAL</name>
16254                                <value>0</value>
16255                                <description>drive output from peripheral signal selected by funcsel</description>
16256                            </enumeratedValue>
16257                            <enumeratedValue>
16258                                <name>INVERT</name>
16259                                <value>1</value>
16260                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
16261                            </enumeratedValue>
16262                            <enumeratedValue>
16263                                <name>LOW</name>
16264                                <value>2</value>
16265                                <description>drive output low</description>
16266                            </enumeratedValue>
16267                            <enumeratedValue>
16268                                <name>HIGH</name>
16269                                <value>3</value>
16270                                <description>drive output high</description>
16271                            </enumeratedValue>
16272                        </enumeratedValues>
16273                    </field>
16274                    <field>
16275                        <name>FUNCSEL</name>
16276                        <description>0-31 -&gt; selects pin function according to the gpio table
16277                            31 == NULL</description>
16278                        <bitRange>[4:0]</bitRange>
16279                        <access>read-write</access>
16280                        <enumeratedValues>
16281                            <enumeratedValue>
16282                                <name>spi0_tx</name>
16283                                <value>1</value>
16284                            </enumeratedValue>
16285                            <enumeratedValue>
16286                                <name>uart1_rts</name>
16287                                <value>2</value>
16288                            </enumeratedValue>
16289                            <enumeratedValue>
16290                                <name>i2c1_scl</name>
16291                                <value>3</value>
16292                            </enumeratedValue>
16293                            <enumeratedValue>
16294                                <name>pwm_b_3</name>
16295                                <value>4</value>
16296                            </enumeratedValue>
16297                            <enumeratedValue>
16298                                <name>siob_proc_23</name>
16299                                <value>5</value>
16300                            </enumeratedValue>
16301                            <enumeratedValue>
16302                                <name>pio0_23</name>
16303                                <value>6</value>
16304                            </enumeratedValue>
16305                            <enumeratedValue>
16306                                <name>pio1_23</name>
16307                                <value>7</value>
16308                            </enumeratedValue>
16309                            <enumeratedValue>
16310                                <name>pio2_23</name>
16311                                <value>8</value>
16312                            </enumeratedValue>
16313                            <enumeratedValue>
16314                                <name>clocks_gpout_1</name>
16315                                <value>9</value>
16316                            </enumeratedValue>
16317                            <enumeratedValue>
16318                                <name>usb_muxing_vbus_en</name>
16319                                <value>10</value>
16320                            </enumeratedValue>
16321                            <enumeratedValue>
16322                                <name>uart1_rx</name>
16323                                <value>11</value>
16324                            </enumeratedValue>
16325                            <enumeratedValue>
16326                                <name>null</name>
16327                                <value>31</value>
16328                            </enumeratedValue>
16329                        </enumeratedValues>
16330                    </field>
16331                </fields>
16332            </register>
16333            <register>
16334                <name>GPIO24_STATUS</name>
16335                <addressOffset>0x000000c0</addressOffset>
16336                <resetValue>0x00000000</resetValue>
16337                <fields>
16338                    <field>
16339                        <name>IRQTOPROC</name>
16340                        <description>interrupt to processors, after override is applied</description>
16341                        <bitRange>[26:26]</bitRange>
16342                        <access>read-only</access>
16343                    </field>
16344                    <field>
16345                        <name>INFROMPAD</name>
16346                        <description>input signal from pad, before filtering and override are applied</description>
16347                        <bitRange>[17:17]</bitRange>
16348                        <access>read-only</access>
16349                    </field>
16350                    <field>
16351                        <name>OETOPAD</name>
16352                        <description>output enable to pad after register override is applied</description>
16353                        <bitRange>[13:13]</bitRange>
16354                        <access>read-only</access>
16355                    </field>
16356                    <field>
16357                        <name>OUTTOPAD</name>
16358                        <description>output signal to pad after register override is applied</description>
16359                        <bitRange>[9:9]</bitRange>
16360                        <access>read-only</access>
16361                    </field>
16362                </fields>
16363            </register>
16364            <register>
16365                <name>GPIO24_CTRL</name>
16366                <addressOffset>0x000000c4</addressOffset>
16367                <resetValue>0x0000001f</resetValue>
16368                <fields>
16369                    <field>
16370                        <name>IRQOVER</name>
16371                        <bitRange>[29:28]</bitRange>
16372                        <access>read-write</access>
16373                        <enumeratedValues>
16374                            <enumeratedValue>
16375                                <name>NORMAL</name>
16376                                <value>0</value>
16377                                <description>don&#39;t invert the interrupt</description>
16378                            </enumeratedValue>
16379                            <enumeratedValue>
16380                                <name>INVERT</name>
16381                                <value>1</value>
16382                                <description>invert the interrupt</description>
16383                            </enumeratedValue>
16384                            <enumeratedValue>
16385                                <name>LOW</name>
16386                                <value>2</value>
16387                                <description>drive interrupt low</description>
16388                            </enumeratedValue>
16389                            <enumeratedValue>
16390                                <name>HIGH</name>
16391                                <value>3</value>
16392                                <description>drive interrupt high</description>
16393                            </enumeratedValue>
16394                        </enumeratedValues>
16395                    </field>
16396                    <field>
16397                        <name>INOVER</name>
16398                        <bitRange>[17:16]</bitRange>
16399                        <access>read-write</access>
16400                        <enumeratedValues>
16401                            <enumeratedValue>
16402                                <name>NORMAL</name>
16403                                <value>0</value>
16404                                <description>don&#39;t invert the peri input</description>
16405                            </enumeratedValue>
16406                            <enumeratedValue>
16407                                <name>INVERT</name>
16408                                <value>1</value>
16409                                <description>invert the peri input</description>
16410                            </enumeratedValue>
16411                            <enumeratedValue>
16412                                <name>LOW</name>
16413                                <value>2</value>
16414                                <description>drive peri input low</description>
16415                            </enumeratedValue>
16416                            <enumeratedValue>
16417                                <name>HIGH</name>
16418                                <value>3</value>
16419                                <description>drive peri input high</description>
16420                            </enumeratedValue>
16421                        </enumeratedValues>
16422                    </field>
16423                    <field>
16424                        <name>OEOVER</name>
16425                        <bitRange>[15:14]</bitRange>
16426                        <access>read-write</access>
16427                        <enumeratedValues>
16428                            <enumeratedValue>
16429                                <name>NORMAL</name>
16430                                <value>0</value>
16431                                <description>drive output enable from peripheral signal selected by funcsel</description>
16432                            </enumeratedValue>
16433                            <enumeratedValue>
16434                                <name>INVERT</name>
16435                                <value>1</value>
16436                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
16437                            </enumeratedValue>
16438                            <enumeratedValue>
16439                                <name>DISABLE</name>
16440                                <value>2</value>
16441                                <description>disable output</description>
16442                            </enumeratedValue>
16443                            <enumeratedValue>
16444                                <name>ENABLE</name>
16445                                <value>3</value>
16446                                <description>enable output</description>
16447                            </enumeratedValue>
16448                        </enumeratedValues>
16449                    </field>
16450                    <field>
16451                        <name>OUTOVER</name>
16452                        <bitRange>[13:12]</bitRange>
16453                        <access>read-write</access>
16454                        <enumeratedValues>
16455                            <enumeratedValue>
16456                                <name>NORMAL</name>
16457                                <value>0</value>
16458                                <description>drive output from peripheral signal selected by funcsel</description>
16459                            </enumeratedValue>
16460                            <enumeratedValue>
16461                                <name>INVERT</name>
16462                                <value>1</value>
16463                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
16464                            </enumeratedValue>
16465                            <enumeratedValue>
16466                                <name>LOW</name>
16467                                <value>2</value>
16468                                <description>drive output low</description>
16469                            </enumeratedValue>
16470                            <enumeratedValue>
16471                                <name>HIGH</name>
16472                                <value>3</value>
16473                                <description>drive output high</description>
16474                            </enumeratedValue>
16475                        </enumeratedValues>
16476                    </field>
16477                    <field>
16478                        <name>FUNCSEL</name>
16479                        <description>0-31 -&gt; selects pin function according to the gpio table
16480                            31 == NULL</description>
16481                        <bitRange>[4:0]</bitRange>
16482                        <access>read-write</access>
16483                        <enumeratedValues>
16484                            <enumeratedValue>
16485                                <name>spi1_rx</name>
16486                                <value>1</value>
16487                            </enumeratedValue>
16488                            <enumeratedValue>
16489                                <name>uart1_tx</name>
16490                                <value>2</value>
16491                            </enumeratedValue>
16492                            <enumeratedValue>
16493                                <name>i2c0_sda</name>
16494                                <value>3</value>
16495                            </enumeratedValue>
16496                            <enumeratedValue>
16497                                <name>pwm_a_4</name>
16498                                <value>4</value>
16499                            </enumeratedValue>
16500                            <enumeratedValue>
16501                                <name>siob_proc_24</name>
16502                                <value>5</value>
16503                            </enumeratedValue>
16504                            <enumeratedValue>
16505                                <name>pio0_24</name>
16506                                <value>6</value>
16507                            </enumeratedValue>
16508                            <enumeratedValue>
16509                                <name>pio1_24</name>
16510                                <value>7</value>
16511                            </enumeratedValue>
16512                            <enumeratedValue>
16513                                <name>pio2_24</name>
16514                                <value>8</value>
16515                            </enumeratedValue>
16516                            <enumeratedValue>
16517                                <name>clocks_gpout_2</name>
16518                                <value>9</value>
16519                            </enumeratedValue>
16520                            <enumeratedValue>
16521                                <name>usb_muxing_overcurr_detect</name>
16522                                <value>10</value>
16523                            </enumeratedValue>
16524                            <enumeratedValue>
16525                                <name>null</name>
16526                                <value>31</value>
16527                            </enumeratedValue>
16528                        </enumeratedValues>
16529                    </field>
16530                </fields>
16531            </register>
16532            <register>
16533                <name>GPIO25_STATUS</name>
16534                <addressOffset>0x000000c8</addressOffset>
16535                <resetValue>0x00000000</resetValue>
16536                <fields>
16537                    <field>
16538                        <name>IRQTOPROC</name>
16539                        <description>interrupt to processors, after override is applied</description>
16540                        <bitRange>[26:26]</bitRange>
16541                        <access>read-only</access>
16542                    </field>
16543                    <field>
16544                        <name>INFROMPAD</name>
16545                        <description>input signal from pad, before filtering and override are applied</description>
16546                        <bitRange>[17:17]</bitRange>
16547                        <access>read-only</access>
16548                    </field>
16549                    <field>
16550                        <name>OETOPAD</name>
16551                        <description>output enable to pad after register override is applied</description>
16552                        <bitRange>[13:13]</bitRange>
16553                        <access>read-only</access>
16554                    </field>
16555                    <field>
16556                        <name>OUTTOPAD</name>
16557                        <description>output signal to pad after register override is applied</description>
16558                        <bitRange>[9:9]</bitRange>
16559                        <access>read-only</access>
16560                    </field>
16561                </fields>
16562            </register>
16563            <register>
16564                <name>GPIO25_CTRL</name>
16565                <addressOffset>0x000000cc</addressOffset>
16566                <resetValue>0x0000001f</resetValue>
16567                <fields>
16568                    <field>
16569                        <name>IRQOVER</name>
16570                        <bitRange>[29:28]</bitRange>
16571                        <access>read-write</access>
16572                        <enumeratedValues>
16573                            <enumeratedValue>
16574                                <name>NORMAL</name>
16575                                <value>0</value>
16576                                <description>don&#39;t invert the interrupt</description>
16577                            </enumeratedValue>
16578                            <enumeratedValue>
16579                                <name>INVERT</name>
16580                                <value>1</value>
16581                                <description>invert the interrupt</description>
16582                            </enumeratedValue>
16583                            <enumeratedValue>
16584                                <name>LOW</name>
16585                                <value>2</value>
16586                                <description>drive interrupt low</description>
16587                            </enumeratedValue>
16588                            <enumeratedValue>
16589                                <name>HIGH</name>
16590                                <value>3</value>
16591                                <description>drive interrupt high</description>
16592                            </enumeratedValue>
16593                        </enumeratedValues>
16594                    </field>
16595                    <field>
16596                        <name>INOVER</name>
16597                        <bitRange>[17:16]</bitRange>
16598                        <access>read-write</access>
16599                        <enumeratedValues>
16600                            <enumeratedValue>
16601                                <name>NORMAL</name>
16602                                <value>0</value>
16603                                <description>don&#39;t invert the peri input</description>
16604                            </enumeratedValue>
16605                            <enumeratedValue>
16606                                <name>INVERT</name>
16607                                <value>1</value>
16608                                <description>invert the peri input</description>
16609                            </enumeratedValue>
16610                            <enumeratedValue>
16611                                <name>LOW</name>
16612                                <value>2</value>
16613                                <description>drive peri input low</description>
16614                            </enumeratedValue>
16615                            <enumeratedValue>
16616                                <name>HIGH</name>
16617                                <value>3</value>
16618                                <description>drive peri input high</description>
16619                            </enumeratedValue>
16620                        </enumeratedValues>
16621                    </field>
16622                    <field>
16623                        <name>OEOVER</name>
16624                        <bitRange>[15:14]</bitRange>
16625                        <access>read-write</access>
16626                        <enumeratedValues>
16627                            <enumeratedValue>
16628                                <name>NORMAL</name>
16629                                <value>0</value>
16630                                <description>drive output enable from peripheral signal selected by funcsel</description>
16631                            </enumeratedValue>
16632                            <enumeratedValue>
16633                                <name>INVERT</name>
16634                                <value>1</value>
16635                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
16636                            </enumeratedValue>
16637                            <enumeratedValue>
16638                                <name>DISABLE</name>
16639                                <value>2</value>
16640                                <description>disable output</description>
16641                            </enumeratedValue>
16642                            <enumeratedValue>
16643                                <name>ENABLE</name>
16644                                <value>3</value>
16645                                <description>enable output</description>
16646                            </enumeratedValue>
16647                        </enumeratedValues>
16648                    </field>
16649                    <field>
16650                        <name>OUTOVER</name>
16651                        <bitRange>[13:12]</bitRange>
16652                        <access>read-write</access>
16653                        <enumeratedValues>
16654                            <enumeratedValue>
16655                                <name>NORMAL</name>
16656                                <value>0</value>
16657                                <description>drive output from peripheral signal selected by funcsel</description>
16658                            </enumeratedValue>
16659                            <enumeratedValue>
16660                                <name>INVERT</name>
16661                                <value>1</value>
16662                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
16663                            </enumeratedValue>
16664                            <enumeratedValue>
16665                                <name>LOW</name>
16666                                <value>2</value>
16667                                <description>drive output low</description>
16668                            </enumeratedValue>
16669                            <enumeratedValue>
16670                                <name>HIGH</name>
16671                                <value>3</value>
16672                                <description>drive output high</description>
16673                            </enumeratedValue>
16674                        </enumeratedValues>
16675                    </field>
16676                    <field>
16677                        <name>FUNCSEL</name>
16678                        <description>0-31 -&gt; selects pin function according to the gpio table
16679                            31 == NULL</description>
16680                        <bitRange>[4:0]</bitRange>
16681                        <access>read-write</access>
16682                        <enumeratedValues>
16683                            <enumeratedValue>
16684                                <name>spi1_ss_n</name>
16685                                <value>1</value>
16686                            </enumeratedValue>
16687                            <enumeratedValue>
16688                                <name>uart1_rx</name>
16689                                <value>2</value>
16690                            </enumeratedValue>
16691                            <enumeratedValue>
16692                                <name>i2c0_scl</name>
16693                                <value>3</value>
16694                            </enumeratedValue>
16695                            <enumeratedValue>
16696                                <name>pwm_b_4</name>
16697                                <value>4</value>
16698                            </enumeratedValue>
16699                            <enumeratedValue>
16700                                <name>siob_proc_25</name>
16701                                <value>5</value>
16702                            </enumeratedValue>
16703                            <enumeratedValue>
16704                                <name>pio0_25</name>
16705                                <value>6</value>
16706                            </enumeratedValue>
16707                            <enumeratedValue>
16708                                <name>pio1_25</name>
16709                                <value>7</value>
16710                            </enumeratedValue>
16711                            <enumeratedValue>
16712                                <name>pio2_25</name>
16713                                <value>8</value>
16714                            </enumeratedValue>
16715                            <enumeratedValue>
16716                                <name>clocks_gpout_3</name>
16717                                <value>9</value>
16718                            </enumeratedValue>
16719                            <enumeratedValue>
16720                                <name>usb_muxing_vbus_detect</name>
16721                                <value>10</value>
16722                            </enumeratedValue>
16723                            <enumeratedValue>
16724                                <name>null</name>
16725                                <value>31</value>
16726                            </enumeratedValue>
16727                        </enumeratedValues>
16728                    </field>
16729                </fields>
16730            </register>
16731            <register>
16732                <name>GPIO26_STATUS</name>
16733                <addressOffset>0x000000d0</addressOffset>
16734                <resetValue>0x00000000</resetValue>
16735                <fields>
16736                    <field>
16737                        <name>IRQTOPROC</name>
16738                        <description>interrupt to processors, after override is applied</description>
16739                        <bitRange>[26:26]</bitRange>
16740                        <access>read-only</access>
16741                    </field>
16742                    <field>
16743                        <name>INFROMPAD</name>
16744                        <description>input signal from pad, before filtering and override are applied</description>
16745                        <bitRange>[17:17]</bitRange>
16746                        <access>read-only</access>
16747                    </field>
16748                    <field>
16749                        <name>OETOPAD</name>
16750                        <description>output enable to pad after register override is applied</description>
16751                        <bitRange>[13:13]</bitRange>
16752                        <access>read-only</access>
16753                    </field>
16754                    <field>
16755                        <name>OUTTOPAD</name>
16756                        <description>output signal to pad after register override is applied</description>
16757                        <bitRange>[9:9]</bitRange>
16758                        <access>read-only</access>
16759                    </field>
16760                </fields>
16761            </register>
16762            <register>
16763                <name>GPIO26_CTRL</name>
16764                <addressOffset>0x000000d4</addressOffset>
16765                <resetValue>0x0000001f</resetValue>
16766                <fields>
16767                    <field>
16768                        <name>IRQOVER</name>
16769                        <bitRange>[29:28]</bitRange>
16770                        <access>read-write</access>
16771                        <enumeratedValues>
16772                            <enumeratedValue>
16773                                <name>NORMAL</name>
16774                                <value>0</value>
16775                                <description>don&#39;t invert the interrupt</description>
16776                            </enumeratedValue>
16777                            <enumeratedValue>
16778                                <name>INVERT</name>
16779                                <value>1</value>
16780                                <description>invert the interrupt</description>
16781                            </enumeratedValue>
16782                            <enumeratedValue>
16783                                <name>LOW</name>
16784                                <value>2</value>
16785                                <description>drive interrupt low</description>
16786                            </enumeratedValue>
16787                            <enumeratedValue>
16788                                <name>HIGH</name>
16789                                <value>3</value>
16790                                <description>drive interrupt high</description>
16791                            </enumeratedValue>
16792                        </enumeratedValues>
16793                    </field>
16794                    <field>
16795                        <name>INOVER</name>
16796                        <bitRange>[17:16]</bitRange>
16797                        <access>read-write</access>
16798                        <enumeratedValues>
16799                            <enumeratedValue>
16800                                <name>NORMAL</name>
16801                                <value>0</value>
16802                                <description>don&#39;t invert the peri input</description>
16803                            </enumeratedValue>
16804                            <enumeratedValue>
16805                                <name>INVERT</name>
16806                                <value>1</value>
16807                                <description>invert the peri input</description>
16808                            </enumeratedValue>
16809                            <enumeratedValue>
16810                                <name>LOW</name>
16811                                <value>2</value>
16812                                <description>drive peri input low</description>
16813                            </enumeratedValue>
16814                            <enumeratedValue>
16815                                <name>HIGH</name>
16816                                <value>3</value>
16817                                <description>drive peri input high</description>
16818                            </enumeratedValue>
16819                        </enumeratedValues>
16820                    </field>
16821                    <field>
16822                        <name>OEOVER</name>
16823                        <bitRange>[15:14]</bitRange>
16824                        <access>read-write</access>
16825                        <enumeratedValues>
16826                            <enumeratedValue>
16827                                <name>NORMAL</name>
16828                                <value>0</value>
16829                                <description>drive output enable from peripheral signal selected by funcsel</description>
16830                            </enumeratedValue>
16831                            <enumeratedValue>
16832                                <name>INVERT</name>
16833                                <value>1</value>
16834                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
16835                            </enumeratedValue>
16836                            <enumeratedValue>
16837                                <name>DISABLE</name>
16838                                <value>2</value>
16839                                <description>disable output</description>
16840                            </enumeratedValue>
16841                            <enumeratedValue>
16842                                <name>ENABLE</name>
16843                                <value>3</value>
16844                                <description>enable output</description>
16845                            </enumeratedValue>
16846                        </enumeratedValues>
16847                    </field>
16848                    <field>
16849                        <name>OUTOVER</name>
16850                        <bitRange>[13:12]</bitRange>
16851                        <access>read-write</access>
16852                        <enumeratedValues>
16853                            <enumeratedValue>
16854                                <name>NORMAL</name>
16855                                <value>0</value>
16856                                <description>drive output from peripheral signal selected by funcsel</description>
16857                            </enumeratedValue>
16858                            <enumeratedValue>
16859                                <name>INVERT</name>
16860                                <value>1</value>
16861                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
16862                            </enumeratedValue>
16863                            <enumeratedValue>
16864                                <name>LOW</name>
16865                                <value>2</value>
16866                                <description>drive output low</description>
16867                            </enumeratedValue>
16868                            <enumeratedValue>
16869                                <name>HIGH</name>
16870                                <value>3</value>
16871                                <description>drive output high</description>
16872                            </enumeratedValue>
16873                        </enumeratedValues>
16874                    </field>
16875                    <field>
16876                        <name>FUNCSEL</name>
16877                        <description>0-31 -&gt; selects pin function according to the gpio table
16878                            31 == NULL</description>
16879                        <bitRange>[4:0]</bitRange>
16880                        <access>read-write</access>
16881                        <enumeratedValues>
16882                            <enumeratedValue>
16883                                <name>spi1_sclk</name>
16884                                <value>1</value>
16885                            </enumeratedValue>
16886                            <enumeratedValue>
16887                                <name>uart1_cts</name>
16888                                <value>2</value>
16889                            </enumeratedValue>
16890                            <enumeratedValue>
16891                                <name>i2c1_sda</name>
16892                                <value>3</value>
16893                            </enumeratedValue>
16894                            <enumeratedValue>
16895                                <name>pwm_a_5</name>
16896                                <value>4</value>
16897                            </enumeratedValue>
16898                            <enumeratedValue>
16899                                <name>siob_proc_26</name>
16900                                <value>5</value>
16901                            </enumeratedValue>
16902                            <enumeratedValue>
16903                                <name>pio0_26</name>
16904                                <value>6</value>
16905                            </enumeratedValue>
16906                            <enumeratedValue>
16907                                <name>pio1_26</name>
16908                                <value>7</value>
16909                            </enumeratedValue>
16910                            <enumeratedValue>
16911                                <name>pio2_26</name>
16912                                <value>8</value>
16913                            </enumeratedValue>
16914                            <enumeratedValue>
16915                                <name>usb_muxing_vbus_en</name>
16916                                <value>10</value>
16917                            </enumeratedValue>
16918                            <enumeratedValue>
16919                                <name>uart1_tx</name>
16920                                <value>11</value>
16921                            </enumeratedValue>
16922                            <enumeratedValue>
16923                                <name>null</name>
16924                                <value>31</value>
16925                            </enumeratedValue>
16926                        </enumeratedValues>
16927                    </field>
16928                </fields>
16929            </register>
16930            <register>
16931                <name>GPIO27_STATUS</name>
16932                <addressOffset>0x000000d8</addressOffset>
16933                <resetValue>0x00000000</resetValue>
16934                <fields>
16935                    <field>
16936                        <name>IRQTOPROC</name>
16937                        <description>interrupt to processors, after override is applied</description>
16938                        <bitRange>[26:26]</bitRange>
16939                        <access>read-only</access>
16940                    </field>
16941                    <field>
16942                        <name>INFROMPAD</name>
16943                        <description>input signal from pad, before filtering and override are applied</description>
16944                        <bitRange>[17:17]</bitRange>
16945                        <access>read-only</access>
16946                    </field>
16947                    <field>
16948                        <name>OETOPAD</name>
16949                        <description>output enable to pad after register override is applied</description>
16950                        <bitRange>[13:13]</bitRange>
16951                        <access>read-only</access>
16952                    </field>
16953                    <field>
16954                        <name>OUTTOPAD</name>
16955                        <description>output signal to pad after register override is applied</description>
16956                        <bitRange>[9:9]</bitRange>
16957                        <access>read-only</access>
16958                    </field>
16959                </fields>
16960            </register>
16961            <register>
16962                <name>GPIO27_CTRL</name>
16963                <addressOffset>0x000000dc</addressOffset>
16964                <resetValue>0x0000001f</resetValue>
16965                <fields>
16966                    <field>
16967                        <name>IRQOVER</name>
16968                        <bitRange>[29:28]</bitRange>
16969                        <access>read-write</access>
16970                        <enumeratedValues>
16971                            <enumeratedValue>
16972                                <name>NORMAL</name>
16973                                <value>0</value>
16974                                <description>don&#39;t invert the interrupt</description>
16975                            </enumeratedValue>
16976                            <enumeratedValue>
16977                                <name>INVERT</name>
16978                                <value>1</value>
16979                                <description>invert the interrupt</description>
16980                            </enumeratedValue>
16981                            <enumeratedValue>
16982                                <name>LOW</name>
16983                                <value>2</value>
16984                                <description>drive interrupt low</description>
16985                            </enumeratedValue>
16986                            <enumeratedValue>
16987                                <name>HIGH</name>
16988                                <value>3</value>
16989                                <description>drive interrupt high</description>
16990                            </enumeratedValue>
16991                        </enumeratedValues>
16992                    </field>
16993                    <field>
16994                        <name>INOVER</name>
16995                        <bitRange>[17:16]</bitRange>
16996                        <access>read-write</access>
16997                        <enumeratedValues>
16998                            <enumeratedValue>
16999                                <name>NORMAL</name>
17000                                <value>0</value>
17001                                <description>don&#39;t invert the peri input</description>
17002                            </enumeratedValue>
17003                            <enumeratedValue>
17004                                <name>INVERT</name>
17005                                <value>1</value>
17006                                <description>invert the peri input</description>
17007                            </enumeratedValue>
17008                            <enumeratedValue>
17009                                <name>LOW</name>
17010                                <value>2</value>
17011                                <description>drive peri input low</description>
17012                            </enumeratedValue>
17013                            <enumeratedValue>
17014                                <name>HIGH</name>
17015                                <value>3</value>
17016                                <description>drive peri input high</description>
17017                            </enumeratedValue>
17018                        </enumeratedValues>
17019                    </field>
17020                    <field>
17021                        <name>OEOVER</name>
17022                        <bitRange>[15:14]</bitRange>
17023                        <access>read-write</access>
17024                        <enumeratedValues>
17025                            <enumeratedValue>
17026                                <name>NORMAL</name>
17027                                <value>0</value>
17028                                <description>drive output enable from peripheral signal selected by funcsel</description>
17029                            </enumeratedValue>
17030                            <enumeratedValue>
17031                                <name>INVERT</name>
17032                                <value>1</value>
17033                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
17034                            </enumeratedValue>
17035                            <enumeratedValue>
17036                                <name>DISABLE</name>
17037                                <value>2</value>
17038                                <description>disable output</description>
17039                            </enumeratedValue>
17040                            <enumeratedValue>
17041                                <name>ENABLE</name>
17042                                <value>3</value>
17043                                <description>enable output</description>
17044                            </enumeratedValue>
17045                        </enumeratedValues>
17046                    </field>
17047                    <field>
17048                        <name>OUTOVER</name>
17049                        <bitRange>[13:12]</bitRange>
17050                        <access>read-write</access>
17051                        <enumeratedValues>
17052                            <enumeratedValue>
17053                                <name>NORMAL</name>
17054                                <value>0</value>
17055                                <description>drive output from peripheral signal selected by funcsel</description>
17056                            </enumeratedValue>
17057                            <enumeratedValue>
17058                                <name>INVERT</name>
17059                                <value>1</value>
17060                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
17061                            </enumeratedValue>
17062                            <enumeratedValue>
17063                                <name>LOW</name>
17064                                <value>2</value>
17065                                <description>drive output low</description>
17066                            </enumeratedValue>
17067                            <enumeratedValue>
17068                                <name>HIGH</name>
17069                                <value>3</value>
17070                                <description>drive output high</description>
17071                            </enumeratedValue>
17072                        </enumeratedValues>
17073                    </field>
17074                    <field>
17075                        <name>FUNCSEL</name>
17076                        <description>0-31 -&gt; selects pin function according to the gpio table
17077                            31 == NULL</description>
17078                        <bitRange>[4:0]</bitRange>
17079                        <access>read-write</access>
17080                        <enumeratedValues>
17081                            <enumeratedValue>
17082                                <name>spi1_tx</name>
17083                                <value>1</value>
17084                            </enumeratedValue>
17085                            <enumeratedValue>
17086                                <name>uart1_rts</name>
17087                                <value>2</value>
17088                            </enumeratedValue>
17089                            <enumeratedValue>
17090                                <name>i2c1_scl</name>
17091                                <value>3</value>
17092                            </enumeratedValue>
17093                            <enumeratedValue>
17094                                <name>pwm_b_5</name>
17095                                <value>4</value>
17096                            </enumeratedValue>
17097                            <enumeratedValue>
17098                                <name>siob_proc_27</name>
17099                                <value>5</value>
17100                            </enumeratedValue>
17101                            <enumeratedValue>
17102                                <name>pio0_27</name>
17103                                <value>6</value>
17104                            </enumeratedValue>
17105                            <enumeratedValue>
17106                                <name>pio1_27</name>
17107                                <value>7</value>
17108                            </enumeratedValue>
17109                            <enumeratedValue>
17110                                <name>pio2_27</name>
17111                                <value>8</value>
17112                            </enumeratedValue>
17113                            <enumeratedValue>
17114                                <name>usb_muxing_overcurr_detect</name>
17115                                <value>10</value>
17116                            </enumeratedValue>
17117                            <enumeratedValue>
17118                                <name>uart1_rx</name>
17119                                <value>11</value>
17120                            </enumeratedValue>
17121                            <enumeratedValue>
17122                                <name>null</name>
17123                                <value>31</value>
17124                            </enumeratedValue>
17125                        </enumeratedValues>
17126                    </field>
17127                </fields>
17128            </register>
17129            <register>
17130                <name>GPIO28_STATUS</name>
17131                <addressOffset>0x000000e0</addressOffset>
17132                <resetValue>0x00000000</resetValue>
17133                <fields>
17134                    <field>
17135                        <name>IRQTOPROC</name>
17136                        <description>interrupt to processors, after override is applied</description>
17137                        <bitRange>[26:26]</bitRange>
17138                        <access>read-only</access>
17139                    </field>
17140                    <field>
17141                        <name>INFROMPAD</name>
17142                        <description>input signal from pad, before filtering and override are applied</description>
17143                        <bitRange>[17:17]</bitRange>
17144                        <access>read-only</access>
17145                    </field>
17146                    <field>
17147                        <name>OETOPAD</name>
17148                        <description>output enable to pad after register override is applied</description>
17149                        <bitRange>[13:13]</bitRange>
17150                        <access>read-only</access>
17151                    </field>
17152                    <field>
17153                        <name>OUTTOPAD</name>
17154                        <description>output signal to pad after register override is applied</description>
17155                        <bitRange>[9:9]</bitRange>
17156                        <access>read-only</access>
17157                    </field>
17158                </fields>
17159            </register>
17160            <register>
17161                <name>GPIO28_CTRL</name>
17162                <addressOffset>0x000000e4</addressOffset>
17163                <resetValue>0x0000001f</resetValue>
17164                <fields>
17165                    <field>
17166                        <name>IRQOVER</name>
17167                        <bitRange>[29:28]</bitRange>
17168                        <access>read-write</access>
17169                        <enumeratedValues>
17170                            <enumeratedValue>
17171                                <name>NORMAL</name>
17172                                <value>0</value>
17173                                <description>don&#39;t invert the interrupt</description>
17174                            </enumeratedValue>
17175                            <enumeratedValue>
17176                                <name>INVERT</name>
17177                                <value>1</value>
17178                                <description>invert the interrupt</description>
17179                            </enumeratedValue>
17180                            <enumeratedValue>
17181                                <name>LOW</name>
17182                                <value>2</value>
17183                                <description>drive interrupt low</description>
17184                            </enumeratedValue>
17185                            <enumeratedValue>
17186                                <name>HIGH</name>
17187                                <value>3</value>
17188                                <description>drive interrupt high</description>
17189                            </enumeratedValue>
17190                        </enumeratedValues>
17191                    </field>
17192                    <field>
17193                        <name>INOVER</name>
17194                        <bitRange>[17:16]</bitRange>
17195                        <access>read-write</access>
17196                        <enumeratedValues>
17197                            <enumeratedValue>
17198                                <name>NORMAL</name>
17199                                <value>0</value>
17200                                <description>don&#39;t invert the peri input</description>
17201                            </enumeratedValue>
17202                            <enumeratedValue>
17203                                <name>INVERT</name>
17204                                <value>1</value>
17205                                <description>invert the peri input</description>
17206                            </enumeratedValue>
17207                            <enumeratedValue>
17208                                <name>LOW</name>
17209                                <value>2</value>
17210                                <description>drive peri input low</description>
17211                            </enumeratedValue>
17212                            <enumeratedValue>
17213                                <name>HIGH</name>
17214                                <value>3</value>
17215                                <description>drive peri input high</description>
17216                            </enumeratedValue>
17217                        </enumeratedValues>
17218                    </field>
17219                    <field>
17220                        <name>OEOVER</name>
17221                        <bitRange>[15:14]</bitRange>
17222                        <access>read-write</access>
17223                        <enumeratedValues>
17224                            <enumeratedValue>
17225                                <name>NORMAL</name>
17226                                <value>0</value>
17227                                <description>drive output enable from peripheral signal selected by funcsel</description>
17228                            </enumeratedValue>
17229                            <enumeratedValue>
17230                                <name>INVERT</name>
17231                                <value>1</value>
17232                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
17233                            </enumeratedValue>
17234                            <enumeratedValue>
17235                                <name>DISABLE</name>
17236                                <value>2</value>
17237                                <description>disable output</description>
17238                            </enumeratedValue>
17239                            <enumeratedValue>
17240                                <name>ENABLE</name>
17241                                <value>3</value>
17242                                <description>enable output</description>
17243                            </enumeratedValue>
17244                        </enumeratedValues>
17245                    </field>
17246                    <field>
17247                        <name>OUTOVER</name>
17248                        <bitRange>[13:12]</bitRange>
17249                        <access>read-write</access>
17250                        <enumeratedValues>
17251                            <enumeratedValue>
17252                                <name>NORMAL</name>
17253                                <value>0</value>
17254                                <description>drive output from peripheral signal selected by funcsel</description>
17255                            </enumeratedValue>
17256                            <enumeratedValue>
17257                                <name>INVERT</name>
17258                                <value>1</value>
17259                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
17260                            </enumeratedValue>
17261                            <enumeratedValue>
17262                                <name>LOW</name>
17263                                <value>2</value>
17264                                <description>drive output low</description>
17265                            </enumeratedValue>
17266                            <enumeratedValue>
17267                                <name>HIGH</name>
17268                                <value>3</value>
17269                                <description>drive output high</description>
17270                            </enumeratedValue>
17271                        </enumeratedValues>
17272                    </field>
17273                    <field>
17274                        <name>FUNCSEL</name>
17275                        <description>0-31 -&gt; selects pin function according to the gpio table
17276                            31 == NULL</description>
17277                        <bitRange>[4:0]</bitRange>
17278                        <access>read-write</access>
17279                        <enumeratedValues>
17280                            <enumeratedValue>
17281                                <name>spi1_rx</name>
17282                                <value>1</value>
17283                            </enumeratedValue>
17284                            <enumeratedValue>
17285                                <name>uart0_tx</name>
17286                                <value>2</value>
17287                            </enumeratedValue>
17288                            <enumeratedValue>
17289                                <name>i2c0_sda</name>
17290                                <value>3</value>
17291                            </enumeratedValue>
17292                            <enumeratedValue>
17293                                <name>pwm_a_6</name>
17294                                <value>4</value>
17295                            </enumeratedValue>
17296                            <enumeratedValue>
17297                                <name>siob_proc_28</name>
17298                                <value>5</value>
17299                            </enumeratedValue>
17300                            <enumeratedValue>
17301                                <name>pio0_28</name>
17302                                <value>6</value>
17303                            </enumeratedValue>
17304                            <enumeratedValue>
17305                                <name>pio1_28</name>
17306                                <value>7</value>
17307                            </enumeratedValue>
17308                            <enumeratedValue>
17309                                <name>pio2_28</name>
17310                                <value>8</value>
17311                            </enumeratedValue>
17312                            <enumeratedValue>
17313                                <name>usb_muxing_vbus_detect</name>
17314                                <value>10</value>
17315                            </enumeratedValue>
17316                            <enumeratedValue>
17317                                <name>null</name>
17318                                <value>31</value>
17319                            </enumeratedValue>
17320                        </enumeratedValues>
17321                    </field>
17322                </fields>
17323            </register>
17324            <register>
17325                <name>GPIO29_STATUS</name>
17326                <addressOffset>0x000000e8</addressOffset>
17327                <resetValue>0x00000000</resetValue>
17328                <fields>
17329                    <field>
17330                        <name>IRQTOPROC</name>
17331                        <description>interrupt to processors, after override is applied</description>
17332                        <bitRange>[26:26]</bitRange>
17333                        <access>read-only</access>
17334                    </field>
17335                    <field>
17336                        <name>INFROMPAD</name>
17337                        <description>input signal from pad, before filtering and override are applied</description>
17338                        <bitRange>[17:17]</bitRange>
17339                        <access>read-only</access>
17340                    </field>
17341                    <field>
17342                        <name>OETOPAD</name>
17343                        <description>output enable to pad after register override is applied</description>
17344                        <bitRange>[13:13]</bitRange>
17345                        <access>read-only</access>
17346                    </field>
17347                    <field>
17348                        <name>OUTTOPAD</name>
17349                        <description>output signal to pad after register override is applied</description>
17350                        <bitRange>[9:9]</bitRange>
17351                        <access>read-only</access>
17352                    </field>
17353                </fields>
17354            </register>
17355            <register>
17356                <name>GPIO29_CTRL</name>
17357                <addressOffset>0x000000ec</addressOffset>
17358                <resetValue>0x0000001f</resetValue>
17359                <fields>
17360                    <field>
17361                        <name>IRQOVER</name>
17362                        <bitRange>[29:28]</bitRange>
17363                        <access>read-write</access>
17364                        <enumeratedValues>
17365                            <enumeratedValue>
17366                                <name>NORMAL</name>
17367                                <value>0</value>
17368                                <description>don&#39;t invert the interrupt</description>
17369                            </enumeratedValue>
17370                            <enumeratedValue>
17371                                <name>INVERT</name>
17372                                <value>1</value>
17373                                <description>invert the interrupt</description>
17374                            </enumeratedValue>
17375                            <enumeratedValue>
17376                                <name>LOW</name>
17377                                <value>2</value>
17378                                <description>drive interrupt low</description>
17379                            </enumeratedValue>
17380                            <enumeratedValue>
17381                                <name>HIGH</name>
17382                                <value>3</value>
17383                                <description>drive interrupt high</description>
17384                            </enumeratedValue>
17385                        </enumeratedValues>
17386                    </field>
17387                    <field>
17388                        <name>INOVER</name>
17389                        <bitRange>[17:16]</bitRange>
17390                        <access>read-write</access>
17391                        <enumeratedValues>
17392                            <enumeratedValue>
17393                                <name>NORMAL</name>
17394                                <value>0</value>
17395                                <description>don&#39;t invert the peri input</description>
17396                            </enumeratedValue>
17397                            <enumeratedValue>
17398                                <name>INVERT</name>
17399                                <value>1</value>
17400                                <description>invert the peri input</description>
17401                            </enumeratedValue>
17402                            <enumeratedValue>
17403                                <name>LOW</name>
17404                                <value>2</value>
17405                                <description>drive peri input low</description>
17406                            </enumeratedValue>
17407                            <enumeratedValue>
17408                                <name>HIGH</name>
17409                                <value>3</value>
17410                                <description>drive peri input high</description>
17411                            </enumeratedValue>
17412                        </enumeratedValues>
17413                    </field>
17414                    <field>
17415                        <name>OEOVER</name>
17416                        <bitRange>[15:14]</bitRange>
17417                        <access>read-write</access>
17418                        <enumeratedValues>
17419                            <enumeratedValue>
17420                                <name>NORMAL</name>
17421                                <value>0</value>
17422                                <description>drive output enable from peripheral signal selected by funcsel</description>
17423                            </enumeratedValue>
17424                            <enumeratedValue>
17425                                <name>INVERT</name>
17426                                <value>1</value>
17427                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
17428                            </enumeratedValue>
17429                            <enumeratedValue>
17430                                <name>DISABLE</name>
17431                                <value>2</value>
17432                                <description>disable output</description>
17433                            </enumeratedValue>
17434                            <enumeratedValue>
17435                                <name>ENABLE</name>
17436                                <value>3</value>
17437                                <description>enable output</description>
17438                            </enumeratedValue>
17439                        </enumeratedValues>
17440                    </field>
17441                    <field>
17442                        <name>OUTOVER</name>
17443                        <bitRange>[13:12]</bitRange>
17444                        <access>read-write</access>
17445                        <enumeratedValues>
17446                            <enumeratedValue>
17447                                <name>NORMAL</name>
17448                                <value>0</value>
17449                                <description>drive output from peripheral signal selected by funcsel</description>
17450                            </enumeratedValue>
17451                            <enumeratedValue>
17452                                <name>INVERT</name>
17453                                <value>1</value>
17454                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
17455                            </enumeratedValue>
17456                            <enumeratedValue>
17457                                <name>LOW</name>
17458                                <value>2</value>
17459                                <description>drive output low</description>
17460                            </enumeratedValue>
17461                            <enumeratedValue>
17462                                <name>HIGH</name>
17463                                <value>3</value>
17464                                <description>drive output high</description>
17465                            </enumeratedValue>
17466                        </enumeratedValues>
17467                    </field>
17468                    <field>
17469                        <name>FUNCSEL</name>
17470                        <description>0-31 -&gt; selects pin function according to the gpio table
17471                            31 == NULL</description>
17472                        <bitRange>[4:0]</bitRange>
17473                        <access>read-write</access>
17474                        <enumeratedValues>
17475                            <enumeratedValue>
17476                                <name>spi1_ss_n</name>
17477                                <value>1</value>
17478                            </enumeratedValue>
17479                            <enumeratedValue>
17480                                <name>uart0_rx</name>
17481                                <value>2</value>
17482                            </enumeratedValue>
17483                            <enumeratedValue>
17484                                <name>i2c0_scl</name>
17485                                <value>3</value>
17486                            </enumeratedValue>
17487                            <enumeratedValue>
17488                                <name>pwm_b_6</name>
17489                                <value>4</value>
17490                            </enumeratedValue>
17491                            <enumeratedValue>
17492                                <name>siob_proc_29</name>
17493                                <value>5</value>
17494                            </enumeratedValue>
17495                            <enumeratedValue>
17496                                <name>pio0_29</name>
17497                                <value>6</value>
17498                            </enumeratedValue>
17499                            <enumeratedValue>
17500                                <name>pio1_29</name>
17501                                <value>7</value>
17502                            </enumeratedValue>
17503                            <enumeratedValue>
17504                                <name>pio2_29</name>
17505                                <value>8</value>
17506                            </enumeratedValue>
17507                            <enumeratedValue>
17508                                <name>usb_muxing_vbus_en</name>
17509                                <value>10</value>
17510                            </enumeratedValue>
17511                            <enumeratedValue>
17512                                <name>null</name>
17513                                <value>31</value>
17514                            </enumeratedValue>
17515                        </enumeratedValues>
17516                    </field>
17517                </fields>
17518            </register>
17519            <register>
17520                <name>GPIO30_STATUS</name>
17521                <addressOffset>0x000000f0</addressOffset>
17522                <resetValue>0x00000000</resetValue>
17523                <fields>
17524                    <field>
17525                        <name>IRQTOPROC</name>
17526                        <description>interrupt to processors, after override is applied</description>
17527                        <bitRange>[26:26]</bitRange>
17528                        <access>read-only</access>
17529                    </field>
17530                    <field>
17531                        <name>INFROMPAD</name>
17532                        <description>input signal from pad, before filtering and override are applied</description>
17533                        <bitRange>[17:17]</bitRange>
17534                        <access>read-only</access>
17535                    </field>
17536                    <field>
17537                        <name>OETOPAD</name>
17538                        <description>output enable to pad after register override is applied</description>
17539                        <bitRange>[13:13]</bitRange>
17540                        <access>read-only</access>
17541                    </field>
17542                    <field>
17543                        <name>OUTTOPAD</name>
17544                        <description>output signal to pad after register override is applied</description>
17545                        <bitRange>[9:9]</bitRange>
17546                        <access>read-only</access>
17547                    </field>
17548                </fields>
17549            </register>
17550            <register>
17551                <name>GPIO30_CTRL</name>
17552                <addressOffset>0x000000f4</addressOffset>
17553                <resetValue>0x0000001f</resetValue>
17554                <fields>
17555                    <field>
17556                        <name>IRQOVER</name>
17557                        <bitRange>[29:28]</bitRange>
17558                        <access>read-write</access>
17559                        <enumeratedValues>
17560                            <enumeratedValue>
17561                                <name>NORMAL</name>
17562                                <value>0</value>
17563                                <description>don&#39;t invert the interrupt</description>
17564                            </enumeratedValue>
17565                            <enumeratedValue>
17566                                <name>INVERT</name>
17567                                <value>1</value>
17568                                <description>invert the interrupt</description>
17569                            </enumeratedValue>
17570                            <enumeratedValue>
17571                                <name>LOW</name>
17572                                <value>2</value>
17573                                <description>drive interrupt low</description>
17574                            </enumeratedValue>
17575                            <enumeratedValue>
17576                                <name>HIGH</name>
17577                                <value>3</value>
17578                                <description>drive interrupt high</description>
17579                            </enumeratedValue>
17580                        </enumeratedValues>
17581                    </field>
17582                    <field>
17583                        <name>INOVER</name>
17584                        <bitRange>[17:16]</bitRange>
17585                        <access>read-write</access>
17586                        <enumeratedValues>
17587                            <enumeratedValue>
17588                                <name>NORMAL</name>
17589                                <value>0</value>
17590                                <description>don&#39;t invert the peri input</description>
17591                            </enumeratedValue>
17592                            <enumeratedValue>
17593                                <name>INVERT</name>
17594                                <value>1</value>
17595                                <description>invert the peri input</description>
17596                            </enumeratedValue>
17597                            <enumeratedValue>
17598                                <name>LOW</name>
17599                                <value>2</value>
17600                                <description>drive peri input low</description>
17601                            </enumeratedValue>
17602                            <enumeratedValue>
17603                                <name>HIGH</name>
17604                                <value>3</value>
17605                                <description>drive peri input high</description>
17606                            </enumeratedValue>
17607                        </enumeratedValues>
17608                    </field>
17609                    <field>
17610                        <name>OEOVER</name>
17611                        <bitRange>[15:14]</bitRange>
17612                        <access>read-write</access>
17613                        <enumeratedValues>
17614                            <enumeratedValue>
17615                                <name>NORMAL</name>
17616                                <value>0</value>
17617                                <description>drive output enable from peripheral signal selected by funcsel</description>
17618                            </enumeratedValue>
17619                            <enumeratedValue>
17620                                <name>INVERT</name>
17621                                <value>1</value>
17622                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
17623                            </enumeratedValue>
17624                            <enumeratedValue>
17625                                <name>DISABLE</name>
17626                                <value>2</value>
17627                                <description>disable output</description>
17628                            </enumeratedValue>
17629                            <enumeratedValue>
17630                                <name>ENABLE</name>
17631                                <value>3</value>
17632                                <description>enable output</description>
17633                            </enumeratedValue>
17634                        </enumeratedValues>
17635                    </field>
17636                    <field>
17637                        <name>OUTOVER</name>
17638                        <bitRange>[13:12]</bitRange>
17639                        <access>read-write</access>
17640                        <enumeratedValues>
17641                            <enumeratedValue>
17642                                <name>NORMAL</name>
17643                                <value>0</value>
17644                                <description>drive output from peripheral signal selected by funcsel</description>
17645                            </enumeratedValue>
17646                            <enumeratedValue>
17647                                <name>INVERT</name>
17648                                <value>1</value>
17649                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
17650                            </enumeratedValue>
17651                            <enumeratedValue>
17652                                <name>LOW</name>
17653                                <value>2</value>
17654                                <description>drive output low</description>
17655                            </enumeratedValue>
17656                            <enumeratedValue>
17657                                <name>HIGH</name>
17658                                <value>3</value>
17659                                <description>drive output high</description>
17660                            </enumeratedValue>
17661                        </enumeratedValues>
17662                    </field>
17663                    <field>
17664                        <name>FUNCSEL</name>
17665                        <description>0-31 -&gt; selects pin function according to the gpio table
17666                            31 == NULL</description>
17667                        <bitRange>[4:0]</bitRange>
17668                        <access>read-write</access>
17669                        <enumeratedValues>
17670                            <enumeratedValue>
17671                                <name>spi1_sclk</name>
17672                                <value>1</value>
17673                            </enumeratedValue>
17674                            <enumeratedValue>
17675                                <name>uart0_cts</name>
17676                                <value>2</value>
17677                            </enumeratedValue>
17678                            <enumeratedValue>
17679                                <name>i2c1_sda</name>
17680                                <value>3</value>
17681                            </enumeratedValue>
17682                            <enumeratedValue>
17683                                <name>pwm_a_7</name>
17684                                <value>4</value>
17685                            </enumeratedValue>
17686                            <enumeratedValue>
17687                                <name>siob_proc_30</name>
17688                                <value>5</value>
17689                            </enumeratedValue>
17690                            <enumeratedValue>
17691                                <name>pio0_30</name>
17692                                <value>6</value>
17693                            </enumeratedValue>
17694                            <enumeratedValue>
17695                                <name>pio1_30</name>
17696                                <value>7</value>
17697                            </enumeratedValue>
17698                            <enumeratedValue>
17699                                <name>pio2_30</name>
17700                                <value>8</value>
17701                            </enumeratedValue>
17702                            <enumeratedValue>
17703                                <name>usb_muxing_overcurr_detect</name>
17704                                <value>10</value>
17705                            </enumeratedValue>
17706                            <enumeratedValue>
17707                                <name>uart0_tx</name>
17708                                <value>11</value>
17709                            </enumeratedValue>
17710                            <enumeratedValue>
17711                                <name>null</name>
17712                                <value>31</value>
17713                            </enumeratedValue>
17714                        </enumeratedValues>
17715                    </field>
17716                </fields>
17717            </register>
17718            <register>
17719                <name>GPIO31_STATUS</name>
17720                <addressOffset>0x000000f8</addressOffset>
17721                <resetValue>0x00000000</resetValue>
17722                <fields>
17723                    <field>
17724                        <name>IRQTOPROC</name>
17725                        <description>interrupt to processors, after override is applied</description>
17726                        <bitRange>[26:26]</bitRange>
17727                        <access>read-only</access>
17728                    </field>
17729                    <field>
17730                        <name>INFROMPAD</name>
17731                        <description>input signal from pad, before filtering and override are applied</description>
17732                        <bitRange>[17:17]</bitRange>
17733                        <access>read-only</access>
17734                    </field>
17735                    <field>
17736                        <name>OETOPAD</name>
17737                        <description>output enable to pad after register override is applied</description>
17738                        <bitRange>[13:13]</bitRange>
17739                        <access>read-only</access>
17740                    </field>
17741                    <field>
17742                        <name>OUTTOPAD</name>
17743                        <description>output signal to pad after register override is applied</description>
17744                        <bitRange>[9:9]</bitRange>
17745                        <access>read-only</access>
17746                    </field>
17747                </fields>
17748            </register>
17749            <register>
17750                <name>GPIO31_CTRL</name>
17751                <addressOffset>0x000000fc</addressOffset>
17752                <resetValue>0x0000001f</resetValue>
17753                <fields>
17754                    <field>
17755                        <name>IRQOVER</name>
17756                        <bitRange>[29:28]</bitRange>
17757                        <access>read-write</access>
17758                        <enumeratedValues>
17759                            <enumeratedValue>
17760                                <name>NORMAL</name>
17761                                <value>0</value>
17762                                <description>don&#39;t invert the interrupt</description>
17763                            </enumeratedValue>
17764                            <enumeratedValue>
17765                                <name>INVERT</name>
17766                                <value>1</value>
17767                                <description>invert the interrupt</description>
17768                            </enumeratedValue>
17769                            <enumeratedValue>
17770                                <name>LOW</name>
17771                                <value>2</value>
17772                                <description>drive interrupt low</description>
17773                            </enumeratedValue>
17774                            <enumeratedValue>
17775                                <name>HIGH</name>
17776                                <value>3</value>
17777                                <description>drive interrupt high</description>
17778                            </enumeratedValue>
17779                        </enumeratedValues>
17780                    </field>
17781                    <field>
17782                        <name>INOVER</name>
17783                        <bitRange>[17:16]</bitRange>
17784                        <access>read-write</access>
17785                        <enumeratedValues>
17786                            <enumeratedValue>
17787                                <name>NORMAL</name>
17788                                <value>0</value>
17789                                <description>don&#39;t invert the peri input</description>
17790                            </enumeratedValue>
17791                            <enumeratedValue>
17792                                <name>INVERT</name>
17793                                <value>1</value>
17794                                <description>invert the peri input</description>
17795                            </enumeratedValue>
17796                            <enumeratedValue>
17797                                <name>LOW</name>
17798                                <value>2</value>
17799                                <description>drive peri input low</description>
17800                            </enumeratedValue>
17801                            <enumeratedValue>
17802                                <name>HIGH</name>
17803                                <value>3</value>
17804                                <description>drive peri input high</description>
17805                            </enumeratedValue>
17806                        </enumeratedValues>
17807                    </field>
17808                    <field>
17809                        <name>OEOVER</name>
17810                        <bitRange>[15:14]</bitRange>
17811                        <access>read-write</access>
17812                        <enumeratedValues>
17813                            <enumeratedValue>
17814                                <name>NORMAL</name>
17815                                <value>0</value>
17816                                <description>drive output enable from peripheral signal selected by funcsel</description>
17817                            </enumeratedValue>
17818                            <enumeratedValue>
17819                                <name>INVERT</name>
17820                                <value>1</value>
17821                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
17822                            </enumeratedValue>
17823                            <enumeratedValue>
17824                                <name>DISABLE</name>
17825                                <value>2</value>
17826                                <description>disable output</description>
17827                            </enumeratedValue>
17828                            <enumeratedValue>
17829                                <name>ENABLE</name>
17830                                <value>3</value>
17831                                <description>enable output</description>
17832                            </enumeratedValue>
17833                        </enumeratedValues>
17834                    </field>
17835                    <field>
17836                        <name>OUTOVER</name>
17837                        <bitRange>[13:12]</bitRange>
17838                        <access>read-write</access>
17839                        <enumeratedValues>
17840                            <enumeratedValue>
17841                                <name>NORMAL</name>
17842                                <value>0</value>
17843                                <description>drive output from peripheral signal selected by funcsel</description>
17844                            </enumeratedValue>
17845                            <enumeratedValue>
17846                                <name>INVERT</name>
17847                                <value>1</value>
17848                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
17849                            </enumeratedValue>
17850                            <enumeratedValue>
17851                                <name>LOW</name>
17852                                <value>2</value>
17853                                <description>drive output low</description>
17854                            </enumeratedValue>
17855                            <enumeratedValue>
17856                                <name>HIGH</name>
17857                                <value>3</value>
17858                                <description>drive output high</description>
17859                            </enumeratedValue>
17860                        </enumeratedValues>
17861                    </field>
17862                    <field>
17863                        <name>FUNCSEL</name>
17864                        <description>0-31 -&gt; selects pin function according to the gpio table
17865                            31 == NULL</description>
17866                        <bitRange>[4:0]</bitRange>
17867                        <access>read-write</access>
17868                        <enumeratedValues>
17869                            <enumeratedValue>
17870                                <name>spi1_tx</name>
17871                                <value>1</value>
17872                            </enumeratedValue>
17873                            <enumeratedValue>
17874                                <name>uart0_rts</name>
17875                                <value>2</value>
17876                            </enumeratedValue>
17877                            <enumeratedValue>
17878                                <name>i2c1_scl</name>
17879                                <value>3</value>
17880                            </enumeratedValue>
17881                            <enumeratedValue>
17882                                <name>pwm_b_7</name>
17883                                <value>4</value>
17884                            </enumeratedValue>
17885                            <enumeratedValue>
17886                                <name>siob_proc_31</name>
17887                                <value>5</value>
17888                            </enumeratedValue>
17889                            <enumeratedValue>
17890                                <name>pio0_31</name>
17891                                <value>6</value>
17892                            </enumeratedValue>
17893                            <enumeratedValue>
17894                                <name>pio1_31</name>
17895                                <value>7</value>
17896                            </enumeratedValue>
17897                            <enumeratedValue>
17898                                <name>pio2_31</name>
17899                                <value>8</value>
17900                            </enumeratedValue>
17901                            <enumeratedValue>
17902                                <name>usb_muxing_vbus_detect</name>
17903                                <value>10</value>
17904                            </enumeratedValue>
17905                            <enumeratedValue>
17906                                <name>uart0_rx</name>
17907                                <value>11</value>
17908                            </enumeratedValue>
17909                            <enumeratedValue>
17910                                <name>null</name>
17911                                <value>31</value>
17912                            </enumeratedValue>
17913                        </enumeratedValues>
17914                    </field>
17915                </fields>
17916            </register>
17917            <register>
17918                <name>GPIO32_STATUS</name>
17919                <addressOffset>0x00000100</addressOffset>
17920                <resetValue>0x00000000</resetValue>
17921                <fields>
17922                    <field>
17923                        <name>IRQTOPROC</name>
17924                        <description>interrupt to processors, after override is applied</description>
17925                        <bitRange>[26:26]</bitRange>
17926                        <access>read-only</access>
17927                    </field>
17928                    <field>
17929                        <name>INFROMPAD</name>
17930                        <description>input signal from pad, before filtering and override are applied</description>
17931                        <bitRange>[17:17]</bitRange>
17932                        <access>read-only</access>
17933                    </field>
17934                    <field>
17935                        <name>OETOPAD</name>
17936                        <description>output enable to pad after register override is applied</description>
17937                        <bitRange>[13:13]</bitRange>
17938                        <access>read-only</access>
17939                    </field>
17940                    <field>
17941                        <name>OUTTOPAD</name>
17942                        <description>output signal to pad after register override is applied</description>
17943                        <bitRange>[9:9]</bitRange>
17944                        <access>read-only</access>
17945                    </field>
17946                </fields>
17947            </register>
17948            <register>
17949                <name>GPIO32_CTRL</name>
17950                <addressOffset>0x00000104</addressOffset>
17951                <resetValue>0x0000001f</resetValue>
17952                <fields>
17953                    <field>
17954                        <name>IRQOVER</name>
17955                        <bitRange>[29:28]</bitRange>
17956                        <access>read-write</access>
17957                        <enumeratedValues>
17958                            <enumeratedValue>
17959                                <name>NORMAL</name>
17960                                <value>0</value>
17961                                <description>don&#39;t invert the interrupt</description>
17962                            </enumeratedValue>
17963                            <enumeratedValue>
17964                                <name>INVERT</name>
17965                                <value>1</value>
17966                                <description>invert the interrupt</description>
17967                            </enumeratedValue>
17968                            <enumeratedValue>
17969                                <name>LOW</name>
17970                                <value>2</value>
17971                                <description>drive interrupt low</description>
17972                            </enumeratedValue>
17973                            <enumeratedValue>
17974                                <name>HIGH</name>
17975                                <value>3</value>
17976                                <description>drive interrupt high</description>
17977                            </enumeratedValue>
17978                        </enumeratedValues>
17979                    </field>
17980                    <field>
17981                        <name>INOVER</name>
17982                        <bitRange>[17:16]</bitRange>
17983                        <access>read-write</access>
17984                        <enumeratedValues>
17985                            <enumeratedValue>
17986                                <name>NORMAL</name>
17987                                <value>0</value>
17988                                <description>don&#39;t invert the peri input</description>
17989                            </enumeratedValue>
17990                            <enumeratedValue>
17991                                <name>INVERT</name>
17992                                <value>1</value>
17993                                <description>invert the peri input</description>
17994                            </enumeratedValue>
17995                            <enumeratedValue>
17996                                <name>LOW</name>
17997                                <value>2</value>
17998                                <description>drive peri input low</description>
17999                            </enumeratedValue>
18000                            <enumeratedValue>
18001                                <name>HIGH</name>
18002                                <value>3</value>
18003                                <description>drive peri input high</description>
18004                            </enumeratedValue>
18005                        </enumeratedValues>
18006                    </field>
18007                    <field>
18008                        <name>OEOVER</name>
18009                        <bitRange>[15:14]</bitRange>
18010                        <access>read-write</access>
18011                        <enumeratedValues>
18012                            <enumeratedValue>
18013                                <name>NORMAL</name>
18014                                <value>0</value>
18015                                <description>drive output enable from peripheral signal selected by funcsel</description>
18016                            </enumeratedValue>
18017                            <enumeratedValue>
18018                                <name>INVERT</name>
18019                                <value>1</value>
18020                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
18021                            </enumeratedValue>
18022                            <enumeratedValue>
18023                                <name>DISABLE</name>
18024                                <value>2</value>
18025                                <description>disable output</description>
18026                            </enumeratedValue>
18027                            <enumeratedValue>
18028                                <name>ENABLE</name>
18029                                <value>3</value>
18030                                <description>enable output</description>
18031                            </enumeratedValue>
18032                        </enumeratedValues>
18033                    </field>
18034                    <field>
18035                        <name>OUTOVER</name>
18036                        <bitRange>[13:12]</bitRange>
18037                        <access>read-write</access>
18038                        <enumeratedValues>
18039                            <enumeratedValue>
18040                                <name>NORMAL</name>
18041                                <value>0</value>
18042                                <description>drive output from peripheral signal selected by funcsel</description>
18043                            </enumeratedValue>
18044                            <enumeratedValue>
18045                                <name>INVERT</name>
18046                                <value>1</value>
18047                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
18048                            </enumeratedValue>
18049                            <enumeratedValue>
18050                                <name>LOW</name>
18051                                <value>2</value>
18052                                <description>drive output low</description>
18053                            </enumeratedValue>
18054                            <enumeratedValue>
18055                                <name>HIGH</name>
18056                                <value>3</value>
18057                                <description>drive output high</description>
18058                            </enumeratedValue>
18059                        </enumeratedValues>
18060                    </field>
18061                    <field>
18062                        <name>FUNCSEL</name>
18063                        <description>0-31 -&gt; selects pin function according to the gpio table
18064                            31 == NULL</description>
18065                        <bitRange>[4:0]</bitRange>
18066                        <access>read-write</access>
18067                        <enumeratedValues>
18068                            <enumeratedValue>
18069                                <name>spi0_rx</name>
18070                                <value>1</value>
18071                            </enumeratedValue>
18072                            <enumeratedValue>
18073                                <name>uart0_tx</name>
18074                                <value>2</value>
18075                            </enumeratedValue>
18076                            <enumeratedValue>
18077                                <name>i2c0_sda</name>
18078                                <value>3</value>
18079                            </enumeratedValue>
18080                            <enumeratedValue>
18081                                <name>pwm_a_8</name>
18082                                <value>4</value>
18083                            </enumeratedValue>
18084                            <enumeratedValue>
18085                                <name>siob_proc_32</name>
18086                                <value>5</value>
18087                            </enumeratedValue>
18088                            <enumeratedValue>
18089                                <name>pio0_32</name>
18090                                <value>6</value>
18091                            </enumeratedValue>
18092                            <enumeratedValue>
18093                                <name>pio1_32</name>
18094                                <value>7</value>
18095                            </enumeratedValue>
18096                            <enumeratedValue>
18097                                <name>pio2_32</name>
18098                                <value>8</value>
18099                            </enumeratedValue>
18100                            <enumeratedValue>
18101                                <name>usb_muxing_vbus_en</name>
18102                                <value>10</value>
18103                            </enumeratedValue>
18104                            <enumeratedValue>
18105                                <name>null</name>
18106                                <value>31</value>
18107                            </enumeratedValue>
18108                        </enumeratedValues>
18109                    </field>
18110                </fields>
18111            </register>
18112            <register>
18113                <name>GPIO33_STATUS</name>
18114                <addressOffset>0x00000108</addressOffset>
18115                <resetValue>0x00000000</resetValue>
18116                <fields>
18117                    <field>
18118                        <name>IRQTOPROC</name>
18119                        <description>interrupt to processors, after override is applied</description>
18120                        <bitRange>[26:26]</bitRange>
18121                        <access>read-only</access>
18122                    </field>
18123                    <field>
18124                        <name>INFROMPAD</name>
18125                        <description>input signal from pad, before filtering and override are applied</description>
18126                        <bitRange>[17:17]</bitRange>
18127                        <access>read-only</access>
18128                    </field>
18129                    <field>
18130                        <name>OETOPAD</name>
18131                        <description>output enable to pad after register override is applied</description>
18132                        <bitRange>[13:13]</bitRange>
18133                        <access>read-only</access>
18134                    </field>
18135                    <field>
18136                        <name>OUTTOPAD</name>
18137                        <description>output signal to pad after register override is applied</description>
18138                        <bitRange>[9:9]</bitRange>
18139                        <access>read-only</access>
18140                    </field>
18141                </fields>
18142            </register>
18143            <register>
18144                <name>GPIO33_CTRL</name>
18145                <addressOffset>0x0000010c</addressOffset>
18146                <resetValue>0x0000001f</resetValue>
18147                <fields>
18148                    <field>
18149                        <name>IRQOVER</name>
18150                        <bitRange>[29:28]</bitRange>
18151                        <access>read-write</access>
18152                        <enumeratedValues>
18153                            <enumeratedValue>
18154                                <name>NORMAL</name>
18155                                <value>0</value>
18156                                <description>don&#39;t invert the interrupt</description>
18157                            </enumeratedValue>
18158                            <enumeratedValue>
18159                                <name>INVERT</name>
18160                                <value>1</value>
18161                                <description>invert the interrupt</description>
18162                            </enumeratedValue>
18163                            <enumeratedValue>
18164                                <name>LOW</name>
18165                                <value>2</value>
18166                                <description>drive interrupt low</description>
18167                            </enumeratedValue>
18168                            <enumeratedValue>
18169                                <name>HIGH</name>
18170                                <value>3</value>
18171                                <description>drive interrupt high</description>
18172                            </enumeratedValue>
18173                        </enumeratedValues>
18174                    </field>
18175                    <field>
18176                        <name>INOVER</name>
18177                        <bitRange>[17:16]</bitRange>
18178                        <access>read-write</access>
18179                        <enumeratedValues>
18180                            <enumeratedValue>
18181                                <name>NORMAL</name>
18182                                <value>0</value>
18183                                <description>don&#39;t invert the peri input</description>
18184                            </enumeratedValue>
18185                            <enumeratedValue>
18186                                <name>INVERT</name>
18187                                <value>1</value>
18188                                <description>invert the peri input</description>
18189                            </enumeratedValue>
18190                            <enumeratedValue>
18191                                <name>LOW</name>
18192                                <value>2</value>
18193                                <description>drive peri input low</description>
18194                            </enumeratedValue>
18195                            <enumeratedValue>
18196                                <name>HIGH</name>
18197                                <value>3</value>
18198                                <description>drive peri input high</description>
18199                            </enumeratedValue>
18200                        </enumeratedValues>
18201                    </field>
18202                    <field>
18203                        <name>OEOVER</name>
18204                        <bitRange>[15:14]</bitRange>
18205                        <access>read-write</access>
18206                        <enumeratedValues>
18207                            <enumeratedValue>
18208                                <name>NORMAL</name>
18209                                <value>0</value>
18210                                <description>drive output enable from peripheral signal selected by funcsel</description>
18211                            </enumeratedValue>
18212                            <enumeratedValue>
18213                                <name>INVERT</name>
18214                                <value>1</value>
18215                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
18216                            </enumeratedValue>
18217                            <enumeratedValue>
18218                                <name>DISABLE</name>
18219                                <value>2</value>
18220                                <description>disable output</description>
18221                            </enumeratedValue>
18222                            <enumeratedValue>
18223                                <name>ENABLE</name>
18224                                <value>3</value>
18225                                <description>enable output</description>
18226                            </enumeratedValue>
18227                        </enumeratedValues>
18228                    </field>
18229                    <field>
18230                        <name>OUTOVER</name>
18231                        <bitRange>[13:12]</bitRange>
18232                        <access>read-write</access>
18233                        <enumeratedValues>
18234                            <enumeratedValue>
18235                                <name>NORMAL</name>
18236                                <value>0</value>
18237                                <description>drive output from peripheral signal selected by funcsel</description>
18238                            </enumeratedValue>
18239                            <enumeratedValue>
18240                                <name>INVERT</name>
18241                                <value>1</value>
18242                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
18243                            </enumeratedValue>
18244                            <enumeratedValue>
18245                                <name>LOW</name>
18246                                <value>2</value>
18247                                <description>drive output low</description>
18248                            </enumeratedValue>
18249                            <enumeratedValue>
18250                                <name>HIGH</name>
18251                                <value>3</value>
18252                                <description>drive output high</description>
18253                            </enumeratedValue>
18254                        </enumeratedValues>
18255                    </field>
18256                    <field>
18257                        <name>FUNCSEL</name>
18258                        <description>0-31 -&gt; selects pin function according to the gpio table
18259                            31 == NULL</description>
18260                        <bitRange>[4:0]</bitRange>
18261                        <access>read-write</access>
18262                        <enumeratedValues>
18263                            <enumeratedValue>
18264                                <name>spi0_ss_n</name>
18265                                <value>1</value>
18266                            </enumeratedValue>
18267                            <enumeratedValue>
18268                                <name>uart0_rx</name>
18269                                <value>2</value>
18270                            </enumeratedValue>
18271                            <enumeratedValue>
18272                                <name>i2c0_scl</name>
18273                                <value>3</value>
18274                            </enumeratedValue>
18275                            <enumeratedValue>
18276                                <name>pwm_b_8</name>
18277                                <value>4</value>
18278                            </enumeratedValue>
18279                            <enumeratedValue>
18280                                <name>siob_proc_33</name>
18281                                <value>5</value>
18282                            </enumeratedValue>
18283                            <enumeratedValue>
18284                                <name>pio0_33</name>
18285                                <value>6</value>
18286                            </enumeratedValue>
18287                            <enumeratedValue>
18288                                <name>pio1_33</name>
18289                                <value>7</value>
18290                            </enumeratedValue>
18291                            <enumeratedValue>
18292                                <name>pio2_33</name>
18293                                <value>8</value>
18294                            </enumeratedValue>
18295                            <enumeratedValue>
18296                                <name>usb_muxing_overcurr_detect</name>
18297                                <value>10</value>
18298                            </enumeratedValue>
18299                            <enumeratedValue>
18300                                <name>null</name>
18301                                <value>31</value>
18302                            </enumeratedValue>
18303                        </enumeratedValues>
18304                    </field>
18305                </fields>
18306            </register>
18307            <register>
18308                <name>GPIO34_STATUS</name>
18309                <addressOffset>0x00000110</addressOffset>
18310                <resetValue>0x00000000</resetValue>
18311                <fields>
18312                    <field>
18313                        <name>IRQTOPROC</name>
18314                        <description>interrupt to processors, after override is applied</description>
18315                        <bitRange>[26:26]</bitRange>
18316                        <access>read-only</access>
18317                    </field>
18318                    <field>
18319                        <name>INFROMPAD</name>
18320                        <description>input signal from pad, before filtering and override are applied</description>
18321                        <bitRange>[17:17]</bitRange>
18322                        <access>read-only</access>
18323                    </field>
18324                    <field>
18325                        <name>OETOPAD</name>
18326                        <description>output enable to pad after register override is applied</description>
18327                        <bitRange>[13:13]</bitRange>
18328                        <access>read-only</access>
18329                    </field>
18330                    <field>
18331                        <name>OUTTOPAD</name>
18332                        <description>output signal to pad after register override is applied</description>
18333                        <bitRange>[9:9]</bitRange>
18334                        <access>read-only</access>
18335                    </field>
18336                </fields>
18337            </register>
18338            <register>
18339                <name>GPIO34_CTRL</name>
18340                <addressOffset>0x00000114</addressOffset>
18341                <resetValue>0x0000001f</resetValue>
18342                <fields>
18343                    <field>
18344                        <name>IRQOVER</name>
18345                        <bitRange>[29:28]</bitRange>
18346                        <access>read-write</access>
18347                        <enumeratedValues>
18348                            <enumeratedValue>
18349                                <name>NORMAL</name>
18350                                <value>0</value>
18351                                <description>don&#39;t invert the interrupt</description>
18352                            </enumeratedValue>
18353                            <enumeratedValue>
18354                                <name>INVERT</name>
18355                                <value>1</value>
18356                                <description>invert the interrupt</description>
18357                            </enumeratedValue>
18358                            <enumeratedValue>
18359                                <name>LOW</name>
18360                                <value>2</value>
18361                                <description>drive interrupt low</description>
18362                            </enumeratedValue>
18363                            <enumeratedValue>
18364                                <name>HIGH</name>
18365                                <value>3</value>
18366                                <description>drive interrupt high</description>
18367                            </enumeratedValue>
18368                        </enumeratedValues>
18369                    </field>
18370                    <field>
18371                        <name>INOVER</name>
18372                        <bitRange>[17:16]</bitRange>
18373                        <access>read-write</access>
18374                        <enumeratedValues>
18375                            <enumeratedValue>
18376                                <name>NORMAL</name>
18377                                <value>0</value>
18378                                <description>don&#39;t invert the peri input</description>
18379                            </enumeratedValue>
18380                            <enumeratedValue>
18381                                <name>INVERT</name>
18382                                <value>1</value>
18383                                <description>invert the peri input</description>
18384                            </enumeratedValue>
18385                            <enumeratedValue>
18386                                <name>LOW</name>
18387                                <value>2</value>
18388                                <description>drive peri input low</description>
18389                            </enumeratedValue>
18390                            <enumeratedValue>
18391                                <name>HIGH</name>
18392                                <value>3</value>
18393                                <description>drive peri input high</description>
18394                            </enumeratedValue>
18395                        </enumeratedValues>
18396                    </field>
18397                    <field>
18398                        <name>OEOVER</name>
18399                        <bitRange>[15:14]</bitRange>
18400                        <access>read-write</access>
18401                        <enumeratedValues>
18402                            <enumeratedValue>
18403                                <name>NORMAL</name>
18404                                <value>0</value>
18405                                <description>drive output enable from peripheral signal selected by funcsel</description>
18406                            </enumeratedValue>
18407                            <enumeratedValue>
18408                                <name>INVERT</name>
18409                                <value>1</value>
18410                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
18411                            </enumeratedValue>
18412                            <enumeratedValue>
18413                                <name>DISABLE</name>
18414                                <value>2</value>
18415                                <description>disable output</description>
18416                            </enumeratedValue>
18417                            <enumeratedValue>
18418                                <name>ENABLE</name>
18419                                <value>3</value>
18420                                <description>enable output</description>
18421                            </enumeratedValue>
18422                        </enumeratedValues>
18423                    </field>
18424                    <field>
18425                        <name>OUTOVER</name>
18426                        <bitRange>[13:12]</bitRange>
18427                        <access>read-write</access>
18428                        <enumeratedValues>
18429                            <enumeratedValue>
18430                                <name>NORMAL</name>
18431                                <value>0</value>
18432                                <description>drive output from peripheral signal selected by funcsel</description>
18433                            </enumeratedValue>
18434                            <enumeratedValue>
18435                                <name>INVERT</name>
18436                                <value>1</value>
18437                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
18438                            </enumeratedValue>
18439                            <enumeratedValue>
18440                                <name>LOW</name>
18441                                <value>2</value>
18442                                <description>drive output low</description>
18443                            </enumeratedValue>
18444                            <enumeratedValue>
18445                                <name>HIGH</name>
18446                                <value>3</value>
18447                                <description>drive output high</description>
18448                            </enumeratedValue>
18449                        </enumeratedValues>
18450                    </field>
18451                    <field>
18452                        <name>FUNCSEL</name>
18453                        <description>0-31 -&gt; selects pin function according to the gpio table
18454                            31 == NULL</description>
18455                        <bitRange>[4:0]</bitRange>
18456                        <access>read-write</access>
18457                        <enumeratedValues>
18458                            <enumeratedValue>
18459                                <name>spi0_sclk</name>
18460                                <value>1</value>
18461                            </enumeratedValue>
18462                            <enumeratedValue>
18463                                <name>uart0_cts</name>
18464                                <value>2</value>
18465                            </enumeratedValue>
18466                            <enumeratedValue>
18467                                <name>i2c1_sda</name>
18468                                <value>3</value>
18469                            </enumeratedValue>
18470                            <enumeratedValue>
18471                                <name>pwm_a_9</name>
18472                                <value>4</value>
18473                            </enumeratedValue>
18474                            <enumeratedValue>
18475                                <name>siob_proc_34</name>
18476                                <value>5</value>
18477                            </enumeratedValue>
18478                            <enumeratedValue>
18479                                <name>pio0_34</name>
18480                                <value>6</value>
18481                            </enumeratedValue>
18482                            <enumeratedValue>
18483                                <name>pio1_34</name>
18484                                <value>7</value>
18485                            </enumeratedValue>
18486                            <enumeratedValue>
18487                                <name>pio2_34</name>
18488                                <value>8</value>
18489                            </enumeratedValue>
18490                            <enumeratedValue>
18491                                <name>usb_muxing_vbus_detect</name>
18492                                <value>10</value>
18493                            </enumeratedValue>
18494                            <enumeratedValue>
18495                                <name>uart0_tx</name>
18496                                <value>11</value>
18497                            </enumeratedValue>
18498                            <enumeratedValue>
18499                                <name>null</name>
18500                                <value>31</value>
18501                            </enumeratedValue>
18502                        </enumeratedValues>
18503                    </field>
18504                </fields>
18505            </register>
18506            <register>
18507                <name>GPIO35_STATUS</name>
18508                <addressOffset>0x00000118</addressOffset>
18509                <resetValue>0x00000000</resetValue>
18510                <fields>
18511                    <field>
18512                        <name>IRQTOPROC</name>
18513                        <description>interrupt to processors, after override is applied</description>
18514                        <bitRange>[26:26]</bitRange>
18515                        <access>read-only</access>
18516                    </field>
18517                    <field>
18518                        <name>INFROMPAD</name>
18519                        <description>input signal from pad, before filtering and override are applied</description>
18520                        <bitRange>[17:17]</bitRange>
18521                        <access>read-only</access>
18522                    </field>
18523                    <field>
18524                        <name>OETOPAD</name>
18525                        <description>output enable to pad after register override is applied</description>
18526                        <bitRange>[13:13]</bitRange>
18527                        <access>read-only</access>
18528                    </field>
18529                    <field>
18530                        <name>OUTTOPAD</name>
18531                        <description>output signal to pad after register override is applied</description>
18532                        <bitRange>[9:9]</bitRange>
18533                        <access>read-only</access>
18534                    </field>
18535                </fields>
18536            </register>
18537            <register>
18538                <name>GPIO35_CTRL</name>
18539                <addressOffset>0x0000011c</addressOffset>
18540                <resetValue>0x0000001f</resetValue>
18541                <fields>
18542                    <field>
18543                        <name>IRQOVER</name>
18544                        <bitRange>[29:28]</bitRange>
18545                        <access>read-write</access>
18546                        <enumeratedValues>
18547                            <enumeratedValue>
18548                                <name>NORMAL</name>
18549                                <value>0</value>
18550                                <description>don&#39;t invert the interrupt</description>
18551                            </enumeratedValue>
18552                            <enumeratedValue>
18553                                <name>INVERT</name>
18554                                <value>1</value>
18555                                <description>invert the interrupt</description>
18556                            </enumeratedValue>
18557                            <enumeratedValue>
18558                                <name>LOW</name>
18559                                <value>2</value>
18560                                <description>drive interrupt low</description>
18561                            </enumeratedValue>
18562                            <enumeratedValue>
18563                                <name>HIGH</name>
18564                                <value>3</value>
18565                                <description>drive interrupt high</description>
18566                            </enumeratedValue>
18567                        </enumeratedValues>
18568                    </field>
18569                    <field>
18570                        <name>INOVER</name>
18571                        <bitRange>[17:16]</bitRange>
18572                        <access>read-write</access>
18573                        <enumeratedValues>
18574                            <enumeratedValue>
18575                                <name>NORMAL</name>
18576                                <value>0</value>
18577                                <description>don&#39;t invert the peri input</description>
18578                            </enumeratedValue>
18579                            <enumeratedValue>
18580                                <name>INVERT</name>
18581                                <value>1</value>
18582                                <description>invert the peri input</description>
18583                            </enumeratedValue>
18584                            <enumeratedValue>
18585                                <name>LOW</name>
18586                                <value>2</value>
18587                                <description>drive peri input low</description>
18588                            </enumeratedValue>
18589                            <enumeratedValue>
18590                                <name>HIGH</name>
18591                                <value>3</value>
18592                                <description>drive peri input high</description>
18593                            </enumeratedValue>
18594                        </enumeratedValues>
18595                    </field>
18596                    <field>
18597                        <name>OEOVER</name>
18598                        <bitRange>[15:14]</bitRange>
18599                        <access>read-write</access>
18600                        <enumeratedValues>
18601                            <enumeratedValue>
18602                                <name>NORMAL</name>
18603                                <value>0</value>
18604                                <description>drive output enable from peripheral signal selected by funcsel</description>
18605                            </enumeratedValue>
18606                            <enumeratedValue>
18607                                <name>INVERT</name>
18608                                <value>1</value>
18609                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
18610                            </enumeratedValue>
18611                            <enumeratedValue>
18612                                <name>DISABLE</name>
18613                                <value>2</value>
18614                                <description>disable output</description>
18615                            </enumeratedValue>
18616                            <enumeratedValue>
18617                                <name>ENABLE</name>
18618                                <value>3</value>
18619                                <description>enable output</description>
18620                            </enumeratedValue>
18621                        </enumeratedValues>
18622                    </field>
18623                    <field>
18624                        <name>OUTOVER</name>
18625                        <bitRange>[13:12]</bitRange>
18626                        <access>read-write</access>
18627                        <enumeratedValues>
18628                            <enumeratedValue>
18629                                <name>NORMAL</name>
18630                                <value>0</value>
18631                                <description>drive output from peripheral signal selected by funcsel</description>
18632                            </enumeratedValue>
18633                            <enumeratedValue>
18634                                <name>INVERT</name>
18635                                <value>1</value>
18636                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
18637                            </enumeratedValue>
18638                            <enumeratedValue>
18639                                <name>LOW</name>
18640                                <value>2</value>
18641                                <description>drive output low</description>
18642                            </enumeratedValue>
18643                            <enumeratedValue>
18644                                <name>HIGH</name>
18645                                <value>3</value>
18646                                <description>drive output high</description>
18647                            </enumeratedValue>
18648                        </enumeratedValues>
18649                    </field>
18650                    <field>
18651                        <name>FUNCSEL</name>
18652                        <description>0-31 -&gt; selects pin function according to the gpio table
18653                            31 == NULL</description>
18654                        <bitRange>[4:0]</bitRange>
18655                        <access>read-write</access>
18656                        <enumeratedValues>
18657                            <enumeratedValue>
18658                                <name>spi0_tx</name>
18659                                <value>1</value>
18660                            </enumeratedValue>
18661                            <enumeratedValue>
18662                                <name>uart0_rts</name>
18663                                <value>2</value>
18664                            </enumeratedValue>
18665                            <enumeratedValue>
18666                                <name>i2c1_scl</name>
18667                                <value>3</value>
18668                            </enumeratedValue>
18669                            <enumeratedValue>
18670                                <name>pwm_b_9</name>
18671                                <value>4</value>
18672                            </enumeratedValue>
18673                            <enumeratedValue>
18674                                <name>siob_proc_35</name>
18675                                <value>5</value>
18676                            </enumeratedValue>
18677                            <enumeratedValue>
18678                                <name>pio0_35</name>
18679                                <value>6</value>
18680                            </enumeratedValue>
18681                            <enumeratedValue>
18682                                <name>pio1_35</name>
18683                                <value>7</value>
18684                            </enumeratedValue>
18685                            <enumeratedValue>
18686                                <name>pio2_35</name>
18687                                <value>8</value>
18688                            </enumeratedValue>
18689                            <enumeratedValue>
18690                                <name>usb_muxing_vbus_en</name>
18691                                <value>10</value>
18692                            </enumeratedValue>
18693                            <enumeratedValue>
18694                                <name>uart0_rx</name>
18695                                <value>11</value>
18696                            </enumeratedValue>
18697                            <enumeratedValue>
18698                                <name>null</name>
18699                                <value>31</value>
18700                            </enumeratedValue>
18701                        </enumeratedValues>
18702                    </field>
18703                </fields>
18704            </register>
18705            <register>
18706                <name>GPIO36_STATUS</name>
18707                <addressOffset>0x00000120</addressOffset>
18708                <resetValue>0x00000000</resetValue>
18709                <fields>
18710                    <field>
18711                        <name>IRQTOPROC</name>
18712                        <description>interrupt to processors, after override is applied</description>
18713                        <bitRange>[26:26]</bitRange>
18714                        <access>read-only</access>
18715                    </field>
18716                    <field>
18717                        <name>INFROMPAD</name>
18718                        <description>input signal from pad, before filtering and override are applied</description>
18719                        <bitRange>[17:17]</bitRange>
18720                        <access>read-only</access>
18721                    </field>
18722                    <field>
18723                        <name>OETOPAD</name>
18724                        <description>output enable to pad after register override is applied</description>
18725                        <bitRange>[13:13]</bitRange>
18726                        <access>read-only</access>
18727                    </field>
18728                    <field>
18729                        <name>OUTTOPAD</name>
18730                        <description>output signal to pad after register override is applied</description>
18731                        <bitRange>[9:9]</bitRange>
18732                        <access>read-only</access>
18733                    </field>
18734                </fields>
18735            </register>
18736            <register>
18737                <name>GPIO36_CTRL</name>
18738                <addressOffset>0x00000124</addressOffset>
18739                <resetValue>0x0000001f</resetValue>
18740                <fields>
18741                    <field>
18742                        <name>IRQOVER</name>
18743                        <bitRange>[29:28]</bitRange>
18744                        <access>read-write</access>
18745                        <enumeratedValues>
18746                            <enumeratedValue>
18747                                <name>NORMAL</name>
18748                                <value>0</value>
18749                                <description>don&#39;t invert the interrupt</description>
18750                            </enumeratedValue>
18751                            <enumeratedValue>
18752                                <name>INVERT</name>
18753                                <value>1</value>
18754                                <description>invert the interrupt</description>
18755                            </enumeratedValue>
18756                            <enumeratedValue>
18757                                <name>LOW</name>
18758                                <value>2</value>
18759                                <description>drive interrupt low</description>
18760                            </enumeratedValue>
18761                            <enumeratedValue>
18762                                <name>HIGH</name>
18763                                <value>3</value>
18764                                <description>drive interrupt high</description>
18765                            </enumeratedValue>
18766                        </enumeratedValues>
18767                    </field>
18768                    <field>
18769                        <name>INOVER</name>
18770                        <bitRange>[17:16]</bitRange>
18771                        <access>read-write</access>
18772                        <enumeratedValues>
18773                            <enumeratedValue>
18774                                <name>NORMAL</name>
18775                                <value>0</value>
18776                                <description>don&#39;t invert the peri input</description>
18777                            </enumeratedValue>
18778                            <enumeratedValue>
18779                                <name>INVERT</name>
18780                                <value>1</value>
18781                                <description>invert the peri input</description>
18782                            </enumeratedValue>
18783                            <enumeratedValue>
18784                                <name>LOW</name>
18785                                <value>2</value>
18786                                <description>drive peri input low</description>
18787                            </enumeratedValue>
18788                            <enumeratedValue>
18789                                <name>HIGH</name>
18790                                <value>3</value>
18791                                <description>drive peri input high</description>
18792                            </enumeratedValue>
18793                        </enumeratedValues>
18794                    </field>
18795                    <field>
18796                        <name>OEOVER</name>
18797                        <bitRange>[15:14]</bitRange>
18798                        <access>read-write</access>
18799                        <enumeratedValues>
18800                            <enumeratedValue>
18801                                <name>NORMAL</name>
18802                                <value>0</value>
18803                                <description>drive output enable from peripheral signal selected by funcsel</description>
18804                            </enumeratedValue>
18805                            <enumeratedValue>
18806                                <name>INVERT</name>
18807                                <value>1</value>
18808                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
18809                            </enumeratedValue>
18810                            <enumeratedValue>
18811                                <name>DISABLE</name>
18812                                <value>2</value>
18813                                <description>disable output</description>
18814                            </enumeratedValue>
18815                            <enumeratedValue>
18816                                <name>ENABLE</name>
18817                                <value>3</value>
18818                                <description>enable output</description>
18819                            </enumeratedValue>
18820                        </enumeratedValues>
18821                    </field>
18822                    <field>
18823                        <name>OUTOVER</name>
18824                        <bitRange>[13:12]</bitRange>
18825                        <access>read-write</access>
18826                        <enumeratedValues>
18827                            <enumeratedValue>
18828                                <name>NORMAL</name>
18829                                <value>0</value>
18830                                <description>drive output from peripheral signal selected by funcsel</description>
18831                            </enumeratedValue>
18832                            <enumeratedValue>
18833                                <name>INVERT</name>
18834                                <value>1</value>
18835                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
18836                            </enumeratedValue>
18837                            <enumeratedValue>
18838                                <name>LOW</name>
18839                                <value>2</value>
18840                                <description>drive output low</description>
18841                            </enumeratedValue>
18842                            <enumeratedValue>
18843                                <name>HIGH</name>
18844                                <value>3</value>
18845                                <description>drive output high</description>
18846                            </enumeratedValue>
18847                        </enumeratedValues>
18848                    </field>
18849                    <field>
18850                        <name>FUNCSEL</name>
18851                        <description>0-31 -&gt; selects pin function according to the gpio table
18852                            31 == NULL</description>
18853                        <bitRange>[4:0]</bitRange>
18854                        <access>read-write</access>
18855                        <enumeratedValues>
18856                            <enumeratedValue>
18857                                <name>spi0_rx</name>
18858                                <value>1</value>
18859                            </enumeratedValue>
18860                            <enumeratedValue>
18861                                <name>uart1_tx</name>
18862                                <value>2</value>
18863                            </enumeratedValue>
18864                            <enumeratedValue>
18865                                <name>i2c0_sda</name>
18866                                <value>3</value>
18867                            </enumeratedValue>
18868                            <enumeratedValue>
18869                                <name>pwm_a_10</name>
18870                                <value>4</value>
18871                            </enumeratedValue>
18872                            <enumeratedValue>
18873                                <name>siob_proc_36</name>
18874                                <value>5</value>
18875                            </enumeratedValue>
18876                            <enumeratedValue>
18877                                <name>pio0_36</name>
18878                                <value>6</value>
18879                            </enumeratedValue>
18880                            <enumeratedValue>
18881                                <name>pio1_36</name>
18882                                <value>7</value>
18883                            </enumeratedValue>
18884                            <enumeratedValue>
18885                                <name>pio2_36</name>
18886                                <value>8</value>
18887                            </enumeratedValue>
18888                            <enumeratedValue>
18889                                <name>usb_muxing_overcurr_detect</name>
18890                                <value>10</value>
18891                            </enumeratedValue>
18892                            <enumeratedValue>
18893                                <name>null</name>
18894                                <value>31</value>
18895                            </enumeratedValue>
18896                        </enumeratedValues>
18897                    </field>
18898                </fields>
18899            </register>
18900            <register>
18901                <name>GPIO37_STATUS</name>
18902                <addressOffset>0x00000128</addressOffset>
18903                <resetValue>0x00000000</resetValue>
18904                <fields>
18905                    <field>
18906                        <name>IRQTOPROC</name>
18907                        <description>interrupt to processors, after override is applied</description>
18908                        <bitRange>[26:26]</bitRange>
18909                        <access>read-only</access>
18910                    </field>
18911                    <field>
18912                        <name>INFROMPAD</name>
18913                        <description>input signal from pad, before filtering and override are applied</description>
18914                        <bitRange>[17:17]</bitRange>
18915                        <access>read-only</access>
18916                    </field>
18917                    <field>
18918                        <name>OETOPAD</name>
18919                        <description>output enable to pad after register override is applied</description>
18920                        <bitRange>[13:13]</bitRange>
18921                        <access>read-only</access>
18922                    </field>
18923                    <field>
18924                        <name>OUTTOPAD</name>
18925                        <description>output signal to pad after register override is applied</description>
18926                        <bitRange>[9:9]</bitRange>
18927                        <access>read-only</access>
18928                    </field>
18929                </fields>
18930            </register>
18931            <register>
18932                <name>GPIO37_CTRL</name>
18933                <addressOffset>0x0000012c</addressOffset>
18934                <resetValue>0x0000001f</resetValue>
18935                <fields>
18936                    <field>
18937                        <name>IRQOVER</name>
18938                        <bitRange>[29:28]</bitRange>
18939                        <access>read-write</access>
18940                        <enumeratedValues>
18941                            <enumeratedValue>
18942                                <name>NORMAL</name>
18943                                <value>0</value>
18944                                <description>don&#39;t invert the interrupt</description>
18945                            </enumeratedValue>
18946                            <enumeratedValue>
18947                                <name>INVERT</name>
18948                                <value>1</value>
18949                                <description>invert the interrupt</description>
18950                            </enumeratedValue>
18951                            <enumeratedValue>
18952                                <name>LOW</name>
18953                                <value>2</value>
18954                                <description>drive interrupt low</description>
18955                            </enumeratedValue>
18956                            <enumeratedValue>
18957                                <name>HIGH</name>
18958                                <value>3</value>
18959                                <description>drive interrupt high</description>
18960                            </enumeratedValue>
18961                        </enumeratedValues>
18962                    </field>
18963                    <field>
18964                        <name>INOVER</name>
18965                        <bitRange>[17:16]</bitRange>
18966                        <access>read-write</access>
18967                        <enumeratedValues>
18968                            <enumeratedValue>
18969                                <name>NORMAL</name>
18970                                <value>0</value>
18971                                <description>don&#39;t invert the peri input</description>
18972                            </enumeratedValue>
18973                            <enumeratedValue>
18974                                <name>INVERT</name>
18975                                <value>1</value>
18976                                <description>invert the peri input</description>
18977                            </enumeratedValue>
18978                            <enumeratedValue>
18979                                <name>LOW</name>
18980                                <value>2</value>
18981                                <description>drive peri input low</description>
18982                            </enumeratedValue>
18983                            <enumeratedValue>
18984                                <name>HIGH</name>
18985                                <value>3</value>
18986                                <description>drive peri input high</description>
18987                            </enumeratedValue>
18988                        </enumeratedValues>
18989                    </field>
18990                    <field>
18991                        <name>OEOVER</name>
18992                        <bitRange>[15:14]</bitRange>
18993                        <access>read-write</access>
18994                        <enumeratedValues>
18995                            <enumeratedValue>
18996                                <name>NORMAL</name>
18997                                <value>0</value>
18998                                <description>drive output enable from peripheral signal selected by funcsel</description>
18999                            </enumeratedValue>
19000                            <enumeratedValue>
19001                                <name>INVERT</name>
19002                                <value>1</value>
19003                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19004                            </enumeratedValue>
19005                            <enumeratedValue>
19006                                <name>DISABLE</name>
19007                                <value>2</value>
19008                                <description>disable output</description>
19009                            </enumeratedValue>
19010                            <enumeratedValue>
19011                                <name>ENABLE</name>
19012                                <value>3</value>
19013                                <description>enable output</description>
19014                            </enumeratedValue>
19015                        </enumeratedValues>
19016                    </field>
19017                    <field>
19018                        <name>OUTOVER</name>
19019                        <bitRange>[13:12]</bitRange>
19020                        <access>read-write</access>
19021                        <enumeratedValues>
19022                            <enumeratedValue>
19023                                <name>NORMAL</name>
19024                                <value>0</value>
19025                                <description>drive output from peripheral signal selected by funcsel</description>
19026                            </enumeratedValue>
19027                            <enumeratedValue>
19028                                <name>INVERT</name>
19029                                <value>1</value>
19030                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
19031                            </enumeratedValue>
19032                            <enumeratedValue>
19033                                <name>LOW</name>
19034                                <value>2</value>
19035                                <description>drive output low</description>
19036                            </enumeratedValue>
19037                            <enumeratedValue>
19038                                <name>HIGH</name>
19039                                <value>3</value>
19040                                <description>drive output high</description>
19041                            </enumeratedValue>
19042                        </enumeratedValues>
19043                    </field>
19044                    <field>
19045                        <name>FUNCSEL</name>
19046                        <description>0-31 -&gt; selects pin function according to the gpio table
19047                            31 == NULL</description>
19048                        <bitRange>[4:0]</bitRange>
19049                        <access>read-write</access>
19050                        <enumeratedValues>
19051                            <enumeratedValue>
19052                                <name>spi0_ss_n</name>
19053                                <value>1</value>
19054                            </enumeratedValue>
19055                            <enumeratedValue>
19056                                <name>uart1_rx</name>
19057                                <value>2</value>
19058                            </enumeratedValue>
19059                            <enumeratedValue>
19060                                <name>i2c0_scl</name>
19061                                <value>3</value>
19062                            </enumeratedValue>
19063                            <enumeratedValue>
19064                                <name>pwm_b_10</name>
19065                                <value>4</value>
19066                            </enumeratedValue>
19067                            <enumeratedValue>
19068                                <name>siob_proc_37</name>
19069                                <value>5</value>
19070                            </enumeratedValue>
19071                            <enumeratedValue>
19072                                <name>pio0_37</name>
19073                                <value>6</value>
19074                            </enumeratedValue>
19075                            <enumeratedValue>
19076                                <name>pio1_37</name>
19077                                <value>7</value>
19078                            </enumeratedValue>
19079                            <enumeratedValue>
19080                                <name>pio2_37</name>
19081                                <value>8</value>
19082                            </enumeratedValue>
19083                            <enumeratedValue>
19084                                <name>usb_muxing_vbus_detect</name>
19085                                <value>10</value>
19086                            </enumeratedValue>
19087                            <enumeratedValue>
19088                                <name>null</name>
19089                                <value>31</value>
19090                            </enumeratedValue>
19091                        </enumeratedValues>
19092                    </field>
19093                </fields>
19094            </register>
19095            <register>
19096                <name>GPIO38_STATUS</name>
19097                <addressOffset>0x00000130</addressOffset>
19098                <resetValue>0x00000000</resetValue>
19099                <fields>
19100                    <field>
19101                        <name>IRQTOPROC</name>
19102                        <description>interrupt to processors, after override is applied</description>
19103                        <bitRange>[26:26]</bitRange>
19104                        <access>read-only</access>
19105                    </field>
19106                    <field>
19107                        <name>INFROMPAD</name>
19108                        <description>input signal from pad, before filtering and override are applied</description>
19109                        <bitRange>[17:17]</bitRange>
19110                        <access>read-only</access>
19111                    </field>
19112                    <field>
19113                        <name>OETOPAD</name>
19114                        <description>output enable to pad after register override is applied</description>
19115                        <bitRange>[13:13]</bitRange>
19116                        <access>read-only</access>
19117                    </field>
19118                    <field>
19119                        <name>OUTTOPAD</name>
19120                        <description>output signal to pad after register override is applied</description>
19121                        <bitRange>[9:9]</bitRange>
19122                        <access>read-only</access>
19123                    </field>
19124                </fields>
19125            </register>
19126            <register>
19127                <name>GPIO38_CTRL</name>
19128                <addressOffset>0x00000134</addressOffset>
19129                <resetValue>0x0000001f</resetValue>
19130                <fields>
19131                    <field>
19132                        <name>IRQOVER</name>
19133                        <bitRange>[29:28]</bitRange>
19134                        <access>read-write</access>
19135                        <enumeratedValues>
19136                            <enumeratedValue>
19137                                <name>NORMAL</name>
19138                                <value>0</value>
19139                                <description>don&#39;t invert the interrupt</description>
19140                            </enumeratedValue>
19141                            <enumeratedValue>
19142                                <name>INVERT</name>
19143                                <value>1</value>
19144                                <description>invert the interrupt</description>
19145                            </enumeratedValue>
19146                            <enumeratedValue>
19147                                <name>LOW</name>
19148                                <value>2</value>
19149                                <description>drive interrupt low</description>
19150                            </enumeratedValue>
19151                            <enumeratedValue>
19152                                <name>HIGH</name>
19153                                <value>3</value>
19154                                <description>drive interrupt high</description>
19155                            </enumeratedValue>
19156                        </enumeratedValues>
19157                    </field>
19158                    <field>
19159                        <name>INOVER</name>
19160                        <bitRange>[17:16]</bitRange>
19161                        <access>read-write</access>
19162                        <enumeratedValues>
19163                            <enumeratedValue>
19164                                <name>NORMAL</name>
19165                                <value>0</value>
19166                                <description>don&#39;t invert the peri input</description>
19167                            </enumeratedValue>
19168                            <enumeratedValue>
19169                                <name>INVERT</name>
19170                                <value>1</value>
19171                                <description>invert the peri input</description>
19172                            </enumeratedValue>
19173                            <enumeratedValue>
19174                                <name>LOW</name>
19175                                <value>2</value>
19176                                <description>drive peri input low</description>
19177                            </enumeratedValue>
19178                            <enumeratedValue>
19179                                <name>HIGH</name>
19180                                <value>3</value>
19181                                <description>drive peri input high</description>
19182                            </enumeratedValue>
19183                        </enumeratedValues>
19184                    </field>
19185                    <field>
19186                        <name>OEOVER</name>
19187                        <bitRange>[15:14]</bitRange>
19188                        <access>read-write</access>
19189                        <enumeratedValues>
19190                            <enumeratedValue>
19191                                <name>NORMAL</name>
19192                                <value>0</value>
19193                                <description>drive output enable from peripheral signal selected by funcsel</description>
19194                            </enumeratedValue>
19195                            <enumeratedValue>
19196                                <name>INVERT</name>
19197                                <value>1</value>
19198                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19199                            </enumeratedValue>
19200                            <enumeratedValue>
19201                                <name>DISABLE</name>
19202                                <value>2</value>
19203                                <description>disable output</description>
19204                            </enumeratedValue>
19205                            <enumeratedValue>
19206                                <name>ENABLE</name>
19207                                <value>3</value>
19208                                <description>enable output</description>
19209                            </enumeratedValue>
19210                        </enumeratedValues>
19211                    </field>
19212                    <field>
19213                        <name>OUTOVER</name>
19214                        <bitRange>[13:12]</bitRange>
19215                        <access>read-write</access>
19216                        <enumeratedValues>
19217                            <enumeratedValue>
19218                                <name>NORMAL</name>
19219                                <value>0</value>
19220                                <description>drive output from peripheral signal selected by funcsel</description>
19221                            </enumeratedValue>
19222                            <enumeratedValue>
19223                                <name>INVERT</name>
19224                                <value>1</value>
19225                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
19226                            </enumeratedValue>
19227                            <enumeratedValue>
19228                                <name>LOW</name>
19229                                <value>2</value>
19230                                <description>drive output low</description>
19231                            </enumeratedValue>
19232                            <enumeratedValue>
19233                                <name>HIGH</name>
19234                                <value>3</value>
19235                                <description>drive output high</description>
19236                            </enumeratedValue>
19237                        </enumeratedValues>
19238                    </field>
19239                    <field>
19240                        <name>FUNCSEL</name>
19241                        <description>0-31 -&gt; selects pin function according to the gpio table
19242                            31 == NULL</description>
19243                        <bitRange>[4:0]</bitRange>
19244                        <access>read-write</access>
19245                        <enumeratedValues>
19246                            <enumeratedValue>
19247                                <name>spi0_sclk</name>
19248                                <value>1</value>
19249                            </enumeratedValue>
19250                            <enumeratedValue>
19251                                <name>uart1_cts</name>
19252                                <value>2</value>
19253                            </enumeratedValue>
19254                            <enumeratedValue>
19255                                <name>i2c1_sda</name>
19256                                <value>3</value>
19257                            </enumeratedValue>
19258                            <enumeratedValue>
19259                                <name>pwm_a_11</name>
19260                                <value>4</value>
19261                            </enumeratedValue>
19262                            <enumeratedValue>
19263                                <name>siob_proc_38</name>
19264                                <value>5</value>
19265                            </enumeratedValue>
19266                            <enumeratedValue>
19267                                <name>pio0_38</name>
19268                                <value>6</value>
19269                            </enumeratedValue>
19270                            <enumeratedValue>
19271                                <name>pio1_38</name>
19272                                <value>7</value>
19273                            </enumeratedValue>
19274                            <enumeratedValue>
19275                                <name>pio2_38</name>
19276                                <value>8</value>
19277                            </enumeratedValue>
19278                            <enumeratedValue>
19279                                <name>usb_muxing_vbus_en</name>
19280                                <value>10</value>
19281                            </enumeratedValue>
19282                            <enumeratedValue>
19283                                <name>uart1_tx</name>
19284                                <value>11</value>
19285                            </enumeratedValue>
19286                            <enumeratedValue>
19287                                <name>null</name>
19288                                <value>31</value>
19289                            </enumeratedValue>
19290                        </enumeratedValues>
19291                    </field>
19292                </fields>
19293            </register>
19294            <register>
19295                <name>GPIO39_STATUS</name>
19296                <addressOffset>0x00000138</addressOffset>
19297                <resetValue>0x00000000</resetValue>
19298                <fields>
19299                    <field>
19300                        <name>IRQTOPROC</name>
19301                        <description>interrupt to processors, after override is applied</description>
19302                        <bitRange>[26:26]</bitRange>
19303                        <access>read-only</access>
19304                    </field>
19305                    <field>
19306                        <name>INFROMPAD</name>
19307                        <description>input signal from pad, before filtering and override are applied</description>
19308                        <bitRange>[17:17]</bitRange>
19309                        <access>read-only</access>
19310                    </field>
19311                    <field>
19312                        <name>OETOPAD</name>
19313                        <description>output enable to pad after register override is applied</description>
19314                        <bitRange>[13:13]</bitRange>
19315                        <access>read-only</access>
19316                    </field>
19317                    <field>
19318                        <name>OUTTOPAD</name>
19319                        <description>output signal to pad after register override is applied</description>
19320                        <bitRange>[9:9]</bitRange>
19321                        <access>read-only</access>
19322                    </field>
19323                </fields>
19324            </register>
19325            <register>
19326                <name>GPIO39_CTRL</name>
19327                <addressOffset>0x0000013c</addressOffset>
19328                <resetValue>0x0000001f</resetValue>
19329                <fields>
19330                    <field>
19331                        <name>IRQOVER</name>
19332                        <bitRange>[29:28]</bitRange>
19333                        <access>read-write</access>
19334                        <enumeratedValues>
19335                            <enumeratedValue>
19336                                <name>NORMAL</name>
19337                                <value>0</value>
19338                                <description>don&#39;t invert the interrupt</description>
19339                            </enumeratedValue>
19340                            <enumeratedValue>
19341                                <name>INVERT</name>
19342                                <value>1</value>
19343                                <description>invert the interrupt</description>
19344                            </enumeratedValue>
19345                            <enumeratedValue>
19346                                <name>LOW</name>
19347                                <value>2</value>
19348                                <description>drive interrupt low</description>
19349                            </enumeratedValue>
19350                            <enumeratedValue>
19351                                <name>HIGH</name>
19352                                <value>3</value>
19353                                <description>drive interrupt high</description>
19354                            </enumeratedValue>
19355                        </enumeratedValues>
19356                    </field>
19357                    <field>
19358                        <name>INOVER</name>
19359                        <bitRange>[17:16]</bitRange>
19360                        <access>read-write</access>
19361                        <enumeratedValues>
19362                            <enumeratedValue>
19363                                <name>NORMAL</name>
19364                                <value>0</value>
19365                                <description>don&#39;t invert the peri input</description>
19366                            </enumeratedValue>
19367                            <enumeratedValue>
19368                                <name>INVERT</name>
19369                                <value>1</value>
19370                                <description>invert the peri input</description>
19371                            </enumeratedValue>
19372                            <enumeratedValue>
19373                                <name>LOW</name>
19374                                <value>2</value>
19375                                <description>drive peri input low</description>
19376                            </enumeratedValue>
19377                            <enumeratedValue>
19378                                <name>HIGH</name>
19379                                <value>3</value>
19380                                <description>drive peri input high</description>
19381                            </enumeratedValue>
19382                        </enumeratedValues>
19383                    </field>
19384                    <field>
19385                        <name>OEOVER</name>
19386                        <bitRange>[15:14]</bitRange>
19387                        <access>read-write</access>
19388                        <enumeratedValues>
19389                            <enumeratedValue>
19390                                <name>NORMAL</name>
19391                                <value>0</value>
19392                                <description>drive output enable from peripheral signal selected by funcsel</description>
19393                            </enumeratedValue>
19394                            <enumeratedValue>
19395                                <name>INVERT</name>
19396                                <value>1</value>
19397                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19398                            </enumeratedValue>
19399                            <enumeratedValue>
19400                                <name>DISABLE</name>
19401                                <value>2</value>
19402                                <description>disable output</description>
19403                            </enumeratedValue>
19404                            <enumeratedValue>
19405                                <name>ENABLE</name>
19406                                <value>3</value>
19407                                <description>enable output</description>
19408                            </enumeratedValue>
19409                        </enumeratedValues>
19410                    </field>
19411                    <field>
19412                        <name>OUTOVER</name>
19413                        <bitRange>[13:12]</bitRange>
19414                        <access>read-write</access>
19415                        <enumeratedValues>
19416                            <enumeratedValue>
19417                                <name>NORMAL</name>
19418                                <value>0</value>
19419                                <description>drive output from peripheral signal selected by funcsel</description>
19420                            </enumeratedValue>
19421                            <enumeratedValue>
19422                                <name>INVERT</name>
19423                                <value>1</value>
19424                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
19425                            </enumeratedValue>
19426                            <enumeratedValue>
19427                                <name>LOW</name>
19428                                <value>2</value>
19429                                <description>drive output low</description>
19430                            </enumeratedValue>
19431                            <enumeratedValue>
19432                                <name>HIGH</name>
19433                                <value>3</value>
19434                                <description>drive output high</description>
19435                            </enumeratedValue>
19436                        </enumeratedValues>
19437                    </field>
19438                    <field>
19439                        <name>FUNCSEL</name>
19440                        <description>0-31 -&gt; selects pin function according to the gpio table
19441                            31 == NULL</description>
19442                        <bitRange>[4:0]</bitRange>
19443                        <access>read-write</access>
19444                        <enumeratedValues>
19445                            <enumeratedValue>
19446                                <name>spi0_tx</name>
19447                                <value>1</value>
19448                            </enumeratedValue>
19449                            <enumeratedValue>
19450                                <name>uart1_rts</name>
19451                                <value>2</value>
19452                            </enumeratedValue>
19453                            <enumeratedValue>
19454                                <name>i2c1_scl</name>
19455                                <value>3</value>
19456                            </enumeratedValue>
19457                            <enumeratedValue>
19458                                <name>pwm_b_11</name>
19459                                <value>4</value>
19460                            </enumeratedValue>
19461                            <enumeratedValue>
19462                                <name>siob_proc_39</name>
19463                                <value>5</value>
19464                            </enumeratedValue>
19465                            <enumeratedValue>
19466                                <name>pio0_39</name>
19467                                <value>6</value>
19468                            </enumeratedValue>
19469                            <enumeratedValue>
19470                                <name>pio1_39</name>
19471                                <value>7</value>
19472                            </enumeratedValue>
19473                            <enumeratedValue>
19474                                <name>pio2_39</name>
19475                                <value>8</value>
19476                            </enumeratedValue>
19477                            <enumeratedValue>
19478                                <name>usb_muxing_overcurr_detect</name>
19479                                <value>10</value>
19480                            </enumeratedValue>
19481                            <enumeratedValue>
19482                                <name>uart1_rx</name>
19483                                <value>11</value>
19484                            </enumeratedValue>
19485                            <enumeratedValue>
19486                                <name>null</name>
19487                                <value>31</value>
19488                            </enumeratedValue>
19489                        </enumeratedValues>
19490                    </field>
19491                </fields>
19492            </register>
19493            <register>
19494                <name>GPIO40_STATUS</name>
19495                <addressOffset>0x00000140</addressOffset>
19496                <resetValue>0x00000000</resetValue>
19497                <fields>
19498                    <field>
19499                        <name>IRQTOPROC</name>
19500                        <description>interrupt to processors, after override is applied</description>
19501                        <bitRange>[26:26]</bitRange>
19502                        <access>read-only</access>
19503                    </field>
19504                    <field>
19505                        <name>INFROMPAD</name>
19506                        <description>input signal from pad, before filtering and override are applied</description>
19507                        <bitRange>[17:17]</bitRange>
19508                        <access>read-only</access>
19509                    </field>
19510                    <field>
19511                        <name>OETOPAD</name>
19512                        <description>output enable to pad after register override is applied</description>
19513                        <bitRange>[13:13]</bitRange>
19514                        <access>read-only</access>
19515                    </field>
19516                    <field>
19517                        <name>OUTTOPAD</name>
19518                        <description>output signal to pad after register override is applied</description>
19519                        <bitRange>[9:9]</bitRange>
19520                        <access>read-only</access>
19521                    </field>
19522                </fields>
19523            </register>
19524            <register>
19525                <name>GPIO40_CTRL</name>
19526                <addressOffset>0x00000144</addressOffset>
19527                <resetValue>0x0000001f</resetValue>
19528                <fields>
19529                    <field>
19530                        <name>IRQOVER</name>
19531                        <bitRange>[29:28]</bitRange>
19532                        <access>read-write</access>
19533                        <enumeratedValues>
19534                            <enumeratedValue>
19535                                <name>NORMAL</name>
19536                                <value>0</value>
19537                                <description>don&#39;t invert the interrupt</description>
19538                            </enumeratedValue>
19539                            <enumeratedValue>
19540                                <name>INVERT</name>
19541                                <value>1</value>
19542                                <description>invert the interrupt</description>
19543                            </enumeratedValue>
19544                            <enumeratedValue>
19545                                <name>LOW</name>
19546                                <value>2</value>
19547                                <description>drive interrupt low</description>
19548                            </enumeratedValue>
19549                            <enumeratedValue>
19550                                <name>HIGH</name>
19551                                <value>3</value>
19552                                <description>drive interrupt high</description>
19553                            </enumeratedValue>
19554                        </enumeratedValues>
19555                    </field>
19556                    <field>
19557                        <name>INOVER</name>
19558                        <bitRange>[17:16]</bitRange>
19559                        <access>read-write</access>
19560                        <enumeratedValues>
19561                            <enumeratedValue>
19562                                <name>NORMAL</name>
19563                                <value>0</value>
19564                                <description>don&#39;t invert the peri input</description>
19565                            </enumeratedValue>
19566                            <enumeratedValue>
19567                                <name>INVERT</name>
19568                                <value>1</value>
19569                                <description>invert the peri input</description>
19570                            </enumeratedValue>
19571                            <enumeratedValue>
19572                                <name>LOW</name>
19573                                <value>2</value>
19574                                <description>drive peri input low</description>
19575                            </enumeratedValue>
19576                            <enumeratedValue>
19577                                <name>HIGH</name>
19578                                <value>3</value>
19579                                <description>drive peri input high</description>
19580                            </enumeratedValue>
19581                        </enumeratedValues>
19582                    </field>
19583                    <field>
19584                        <name>OEOVER</name>
19585                        <bitRange>[15:14]</bitRange>
19586                        <access>read-write</access>
19587                        <enumeratedValues>
19588                            <enumeratedValue>
19589                                <name>NORMAL</name>
19590                                <value>0</value>
19591                                <description>drive output enable from peripheral signal selected by funcsel</description>
19592                            </enumeratedValue>
19593                            <enumeratedValue>
19594                                <name>INVERT</name>
19595                                <value>1</value>
19596                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19597                            </enumeratedValue>
19598                            <enumeratedValue>
19599                                <name>DISABLE</name>
19600                                <value>2</value>
19601                                <description>disable output</description>
19602                            </enumeratedValue>
19603                            <enumeratedValue>
19604                                <name>ENABLE</name>
19605                                <value>3</value>
19606                                <description>enable output</description>
19607                            </enumeratedValue>
19608                        </enumeratedValues>
19609                    </field>
19610                    <field>
19611                        <name>OUTOVER</name>
19612                        <bitRange>[13:12]</bitRange>
19613                        <access>read-write</access>
19614                        <enumeratedValues>
19615                            <enumeratedValue>
19616                                <name>NORMAL</name>
19617                                <value>0</value>
19618                                <description>drive output from peripheral signal selected by funcsel</description>
19619                            </enumeratedValue>
19620                            <enumeratedValue>
19621                                <name>INVERT</name>
19622                                <value>1</value>
19623                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
19624                            </enumeratedValue>
19625                            <enumeratedValue>
19626                                <name>LOW</name>
19627                                <value>2</value>
19628                                <description>drive output low</description>
19629                            </enumeratedValue>
19630                            <enumeratedValue>
19631                                <name>HIGH</name>
19632                                <value>3</value>
19633                                <description>drive output high</description>
19634                            </enumeratedValue>
19635                        </enumeratedValues>
19636                    </field>
19637                    <field>
19638                        <name>FUNCSEL</name>
19639                        <description>0-31 -&gt; selects pin function according to the gpio table
19640                            31 == NULL</description>
19641                        <bitRange>[4:0]</bitRange>
19642                        <access>read-write</access>
19643                        <enumeratedValues>
19644                            <enumeratedValue>
19645                                <name>spi1_rx</name>
19646                                <value>1</value>
19647                            </enumeratedValue>
19648                            <enumeratedValue>
19649                                <name>uart1_tx</name>
19650                                <value>2</value>
19651                            </enumeratedValue>
19652                            <enumeratedValue>
19653                                <name>i2c0_sda</name>
19654                                <value>3</value>
19655                            </enumeratedValue>
19656                            <enumeratedValue>
19657                                <name>pwm_a_8</name>
19658                                <value>4</value>
19659                            </enumeratedValue>
19660                            <enumeratedValue>
19661                                <name>siob_proc_40</name>
19662                                <value>5</value>
19663                            </enumeratedValue>
19664                            <enumeratedValue>
19665                                <name>pio0_40</name>
19666                                <value>6</value>
19667                            </enumeratedValue>
19668                            <enumeratedValue>
19669                                <name>pio1_40</name>
19670                                <value>7</value>
19671                            </enumeratedValue>
19672                            <enumeratedValue>
19673                                <name>pio2_40</name>
19674                                <value>8</value>
19675                            </enumeratedValue>
19676                            <enumeratedValue>
19677                                <name>usb_muxing_vbus_detect</name>
19678                                <value>10</value>
19679                            </enumeratedValue>
19680                            <enumeratedValue>
19681                                <name>null</name>
19682                                <value>31</value>
19683                            </enumeratedValue>
19684                        </enumeratedValues>
19685                    </field>
19686                </fields>
19687            </register>
19688            <register>
19689                <name>GPIO41_STATUS</name>
19690                <addressOffset>0x00000148</addressOffset>
19691                <resetValue>0x00000000</resetValue>
19692                <fields>
19693                    <field>
19694                        <name>IRQTOPROC</name>
19695                        <description>interrupt to processors, after override is applied</description>
19696                        <bitRange>[26:26]</bitRange>
19697                        <access>read-only</access>
19698                    </field>
19699                    <field>
19700                        <name>INFROMPAD</name>
19701                        <description>input signal from pad, before filtering and override are applied</description>
19702                        <bitRange>[17:17]</bitRange>
19703                        <access>read-only</access>
19704                    </field>
19705                    <field>
19706                        <name>OETOPAD</name>
19707                        <description>output enable to pad after register override is applied</description>
19708                        <bitRange>[13:13]</bitRange>
19709                        <access>read-only</access>
19710                    </field>
19711                    <field>
19712                        <name>OUTTOPAD</name>
19713                        <description>output signal to pad after register override is applied</description>
19714                        <bitRange>[9:9]</bitRange>
19715                        <access>read-only</access>
19716                    </field>
19717                </fields>
19718            </register>
19719            <register>
19720                <name>GPIO41_CTRL</name>
19721                <addressOffset>0x0000014c</addressOffset>
19722                <resetValue>0x0000001f</resetValue>
19723                <fields>
19724                    <field>
19725                        <name>IRQOVER</name>
19726                        <bitRange>[29:28]</bitRange>
19727                        <access>read-write</access>
19728                        <enumeratedValues>
19729                            <enumeratedValue>
19730                                <name>NORMAL</name>
19731                                <value>0</value>
19732                                <description>don&#39;t invert the interrupt</description>
19733                            </enumeratedValue>
19734                            <enumeratedValue>
19735                                <name>INVERT</name>
19736                                <value>1</value>
19737                                <description>invert the interrupt</description>
19738                            </enumeratedValue>
19739                            <enumeratedValue>
19740                                <name>LOW</name>
19741                                <value>2</value>
19742                                <description>drive interrupt low</description>
19743                            </enumeratedValue>
19744                            <enumeratedValue>
19745                                <name>HIGH</name>
19746                                <value>3</value>
19747                                <description>drive interrupt high</description>
19748                            </enumeratedValue>
19749                        </enumeratedValues>
19750                    </field>
19751                    <field>
19752                        <name>INOVER</name>
19753                        <bitRange>[17:16]</bitRange>
19754                        <access>read-write</access>
19755                        <enumeratedValues>
19756                            <enumeratedValue>
19757                                <name>NORMAL</name>
19758                                <value>0</value>
19759                                <description>don&#39;t invert the peri input</description>
19760                            </enumeratedValue>
19761                            <enumeratedValue>
19762                                <name>INVERT</name>
19763                                <value>1</value>
19764                                <description>invert the peri input</description>
19765                            </enumeratedValue>
19766                            <enumeratedValue>
19767                                <name>LOW</name>
19768                                <value>2</value>
19769                                <description>drive peri input low</description>
19770                            </enumeratedValue>
19771                            <enumeratedValue>
19772                                <name>HIGH</name>
19773                                <value>3</value>
19774                                <description>drive peri input high</description>
19775                            </enumeratedValue>
19776                        </enumeratedValues>
19777                    </field>
19778                    <field>
19779                        <name>OEOVER</name>
19780                        <bitRange>[15:14]</bitRange>
19781                        <access>read-write</access>
19782                        <enumeratedValues>
19783                            <enumeratedValue>
19784                                <name>NORMAL</name>
19785                                <value>0</value>
19786                                <description>drive output enable from peripheral signal selected by funcsel</description>
19787                            </enumeratedValue>
19788                            <enumeratedValue>
19789                                <name>INVERT</name>
19790                                <value>1</value>
19791                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19792                            </enumeratedValue>
19793                            <enumeratedValue>
19794                                <name>DISABLE</name>
19795                                <value>2</value>
19796                                <description>disable output</description>
19797                            </enumeratedValue>
19798                            <enumeratedValue>
19799                                <name>ENABLE</name>
19800                                <value>3</value>
19801                                <description>enable output</description>
19802                            </enumeratedValue>
19803                        </enumeratedValues>
19804                    </field>
19805                    <field>
19806                        <name>OUTOVER</name>
19807                        <bitRange>[13:12]</bitRange>
19808                        <access>read-write</access>
19809                        <enumeratedValues>
19810                            <enumeratedValue>
19811                                <name>NORMAL</name>
19812                                <value>0</value>
19813                                <description>drive output from peripheral signal selected by funcsel</description>
19814                            </enumeratedValue>
19815                            <enumeratedValue>
19816                                <name>INVERT</name>
19817                                <value>1</value>
19818                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
19819                            </enumeratedValue>
19820                            <enumeratedValue>
19821                                <name>LOW</name>
19822                                <value>2</value>
19823                                <description>drive output low</description>
19824                            </enumeratedValue>
19825                            <enumeratedValue>
19826                                <name>HIGH</name>
19827                                <value>3</value>
19828                                <description>drive output high</description>
19829                            </enumeratedValue>
19830                        </enumeratedValues>
19831                    </field>
19832                    <field>
19833                        <name>FUNCSEL</name>
19834                        <description>0-31 -&gt; selects pin function according to the gpio table
19835                            31 == NULL</description>
19836                        <bitRange>[4:0]</bitRange>
19837                        <access>read-write</access>
19838                        <enumeratedValues>
19839                            <enumeratedValue>
19840                                <name>spi1_ss_n</name>
19841                                <value>1</value>
19842                            </enumeratedValue>
19843                            <enumeratedValue>
19844                                <name>uart1_rx</name>
19845                                <value>2</value>
19846                            </enumeratedValue>
19847                            <enumeratedValue>
19848                                <name>i2c0_scl</name>
19849                                <value>3</value>
19850                            </enumeratedValue>
19851                            <enumeratedValue>
19852                                <name>pwm_b_8</name>
19853                                <value>4</value>
19854                            </enumeratedValue>
19855                            <enumeratedValue>
19856                                <name>siob_proc_41</name>
19857                                <value>5</value>
19858                            </enumeratedValue>
19859                            <enumeratedValue>
19860                                <name>pio0_41</name>
19861                                <value>6</value>
19862                            </enumeratedValue>
19863                            <enumeratedValue>
19864                                <name>pio1_41</name>
19865                                <value>7</value>
19866                            </enumeratedValue>
19867                            <enumeratedValue>
19868                                <name>pio2_41</name>
19869                                <value>8</value>
19870                            </enumeratedValue>
19871                            <enumeratedValue>
19872                                <name>usb_muxing_vbus_en</name>
19873                                <value>10</value>
19874                            </enumeratedValue>
19875                            <enumeratedValue>
19876                                <name>null</name>
19877                                <value>31</value>
19878                            </enumeratedValue>
19879                        </enumeratedValues>
19880                    </field>
19881                </fields>
19882            </register>
19883            <register>
19884                <name>GPIO42_STATUS</name>
19885                <addressOffset>0x00000150</addressOffset>
19886                <resetValue>0x00000000</resetValue>
19887                <fields>
19888                    <field>
19889                        <name>IRQTOPROC</name>
19890                        <description>interrupt to processors, after override is applied</description>
19891                        <bitRange>[26:26]</bitRange>
19892                        <access>read-only</access>
19893                    </field>
19894                    <field>
19895                        <name>INFROMPAD</name>
19896                        <description>input signal from pad, before filtering and override are applied</description>
19897                        <bitRange>[17:17]</bitRange>
19898                        <access>read-only</access>
19899                    </field>
19900                    <field>
19901                        <name>OETOPAD</name>
19902                        <description>output enable to pad after register override is applied</description>
19903                        <bitRange>[13:13]</bitRange>
19904                        <access>read-only</access>
19905                    </field>
19906                    <field>
19907                        <name>OUTTOPAD</name>
19908                        <description>output signal to pad after register override is applied</description>
19909                        <bitRange>[9:9]</bitRange>
19910                        <access>read-only</access>
19911                    </field>
19912                </fields>
19913            </register>
19914            <register>
19915                <name>GPIO42_CTRL</name>
19916                <addressOffset>0x00000154</addressOffset>
19917                <resetValue>0x0000001f</resetValue>
19918                <fields>
19919                    <field>
19920                        <name>IRQOVER</name>
19921                        <bitRange>[29:28]</bitRange>
19922                        <access>read-write</access>
19923                        <enumeratedValues>
19924                            <enumeratedValue>
19925                                <name>NORMAL</name>
19926                                <value>0</value>
19927                                <description>don&#39;t invert the interrupt</description>
19928                            </enumeratedValue>
19929                            <enumeratedValue>
19930                                <name>INVERT</name>
19931                                <value>1</value>
19932                                <description>invert the interrupt</description>
19933                            </enumeratedValue>
19934                            <enumeratedValue>
19935                                <name>LOW</name>
19936                                <value>2</value>
19937                                <description>drive interrupt low</description>
19938                            </enumeratedValue>
19939                            <enumeratedValue>
19940                                <name>HIGH</name>
19941                                <value>3</value>
19942                                <description>drive interrupt high</description>
19943                            </enumeratedValue>
19944                        </enumeratedValues>
19945                    </field>
19946                    <field>
19947                        <name>INOVER</name>
19948                        <bitRange>[17:16]</bitRange>
19949                        <access>read-write</access>
19950                        <enumeratedValues>
19951                            <enumeratedValue>
19952                                <name>NORMAL</name>
19953                                <value>0</value>
19954                                <description>don&#39;t invert the peri input</description>
19955                            </enumeratedValue>
19956                            <enumeratedValue>
19957                                <name>INVERT</name>
19958                                <value>1</value>
19959                                <description>invert the peri input</description>
19960                            </enumeratedValue>
19961                            <enumeratedValue>
19962                                <name>LOW</name>
19963                                <value>2</value>
19964                                <description>drive peri input low</description>
19965                            </enumeratedValue>
19966                            <enumeratedValue>
19967                                <name>HIGH</name>
19968                                <value>3</value>
19969                                <description>drive peri input high</description>
19970                            </enumeratedValue>
19971                        </enumeratedValues>
19972                    </field>
19973                    <field>
19974                        <name>OEOVER</name>
19975                        <bitRange>[15:14]</bitRange>
19976                        <access>read-write</access>
19977                        <enumeratedValues>
19978                            <enumeratedValue>
19979                                <name>NORMAL</name>
19980                                <value>0</value>
19981                                <description>drive output enable from peripheral signal selected by funcsel</description>
19982                            </enumeratedValue>
19983                            <enumeratedValue>
19984                                <name>INVERT</name>
19985                                <value>1</value>
19986                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
19987                            </enumeratedValue>
19988                            <enumeratedValue>
19989                                <name>DISABLE</name>
19990                                <value>2</value>
19991                                <description>disable output</description>
19992                            </enumeratedValue>
19993                            <enumeratedValue>
19994                                <name>ENABLE</name>
19995                                <value>3</value>
19996                                <description>enable output</description>
19997                            </enumeratedValue>
19998                        </enumeratedValues>
19999                    </field>
20000                    <field>
20001                        <name>OUTOVER</name>
20002                        <bitRange>[13:12]</bitRange>
20003                        <access>read-write</access>
20004                        <enumeratedValues>
20005                            <enumeratedValue>
20006                                <name>NORMAL</name>
20007                                <value>0</value>
20008                                <description>drive output from peripheral signal selected by funcsel</description>
20009                            </enumeratedValue>
20010                            <enumeratedValue>
20011                                <name>INVERT</name>
20012                                <value>1</value>
20013                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
20014                            </enumeratedValue>
20015                            <enumeratedValue>
20016                                <name>LOW</name>
20017                                <value>2</value>
20018                                <description>drive output low</description>
20019                            </enumeratedValue>
20020                            <enumeratedValue>
20021                                <name>HIGH</name>
20022                                <value>3</value>
20023                                <description>drive output high</description>
20024                            </enumeratedValue>
20025                        </enumeratedValues>
20026                    </field>
20027                    <field>
20028                        <name>FUNCSEL</name>
20029                        <description>0-31 -&gt; selects pin function according to the gpio table
20030                            31 == NULL</description>
20031                        <bitRange>[4:0]</bitRange>
20032                        <access>read-write</access>
20033                        <enumeratedValues>
20034                            <enumeratedValue>
20035                                <name>spi1_sclk</name>
20036                                <value>1</value>
20037                            </enumeratedValue>
20038                            <enumeratedValue>
20039                                <name>uart1_cts</name>
20040                                <value>2</value>
20041                            </enumeratedValue>
20042                            <enumeratedValue>
20043                                <name>i2c1_sda</name>
20044                                <value>3</value>
20045                            </enumeratedValue>
20046                            <enumeratedValue>
20047                                <name>pwm_a_9</name>
20048                                <value>4</value>
20049                            </enumeratedValue>
20050                            <enumeratedValue>
20051                                <name>siob_proc_42</name>
20052                                <value>5</value>
20053                            </enumeratedValue>
20054                            <enumeratedValue>
20055                                <name>pio0_42</name>
20056                                <value>6</value>
20057                            </enumeratedValue>
20058                            <enumeratedValue>
20059                                <name>pio1_42</name>
20060                                <value>7</value>
20061                            </enumeratedValue>
20062                            <enumeratedValue>
20063                                <name>pio2_42</name>
20064                                <value>8</value>
20065                            </enumeratedValue>
20066                            <enumeratedValue>
20067                                <name>usb_muxing_overcurr_detect</name>
20068                                <value>10</value>
20069                            </enumeratedValue>
20070                            <enumeratedValue>
20071                                <name>uart1_tx</name>
20072                                <value>11</value>
20073                            </enumeratedValue>
20074                            <enumeratedValue>
20075                                <name>null</name>
20076                                <value>31</value>
20077                            </enumeratedValue>
20078                        </enumeratedValues>
20079                    </field>
20080                </fields>
20081            </register>
20082            <register>
20083                <name>GPIO43_STATUS</name>
20084                <addressOffset>0x00000158</addressOffset>
20085                <resetValue>0x00000000</resetValue>
20086                <fields>
20087                    <field>
20088                        <name>IRQTOPROC</name>
20089                        <description>interrupt to processors, after override is applied</description>
20090                        <bitRange>[26:26]</bitRange>
20091                        <access>read-only</access>
20092                    </field>
20093                    <field>
20094                        <name>INFROMPAD</name>
20095                        <description>input signal from pad, before filtering and override are applied</description>
20096                        <bitRange>[17:17]</bitRange>
20097                        <access>read-only</access>
20098                    </field>
20099                    <field>
20100                        <name>OETOPAD</name>
20101                        <description>output enable to pad after register override is applied</description>
20102                        <bitRange>[13:13]</bitRange>
20103                        <access>read-only</access>
20104                    </field>
20105                    <field>
20106                        <name>OUTTOPAD</name>
20107                        <description>output signal to pad after register override is applied</description>
20108                        <bitRange>[9:9]</bitRange>
20109                        <access>read-only</access>
20110                    </field>
20111                </fields>
20112            </register>
20113            <register>
20114                <name>GPIO43_CTRL</name>
20115                <addressOffset>0x0000015c</addressOffset>
20116                <resetValue>0x0000001f</resetValue>
20117                <fields>
20118                    <field>
20119                        <name>IRQOVER</name>
20120                        <bitRange>[29:28]</bitRange>
20121                        <access>read-write</access>
20122                        <enumeratedValues>
20123                            <enumeratedValue>
20124                                <name>NORMAL</name>
20125                                <value>0</value>
20126                                <description>don&#39;t invert the interrupt</description>
20127                            </enumeratedValue>
20128                            <enumeratedValue>
20129                                <name>INVERT</name>
20130                                <value>1</value>
20131                                <description>invert the interrupt</description>
20132                            </enumeratedValue>
20133                            <enumeratedValue>
20134                                <name>LOW</name>
20135                                <value>2</value>
20136                                <description>drive interrupt low</description>
20137                            </enumeratedValue>
20138                            <enumeratedValue>
20139                                <name>HIGH</name>
20140                                <value>3</value>
20141                                <description>drive interrupt high</description>
20142                            </enumeratedValue>
20143                        </enumeratedValues>
20144                    </field>
20145                    <field>
20146                        <name>INOVER</name>
20147                        <bitRange>[17:16]</bitRange>
20148                        <access>read-write</access>
20149                        <enumeratedValues>
20150                            <enumeratedValue>
20151                                <name>NORMAL</name>
20152                                <value>0</value>
20153                                <description>don&#39;t invert the peri input</description>
20154                            </enumeratedValue>
20155                            <enumeratedValue>
20156                                <name>INVERT</name>
20157                                <value>1</value>
20158                                <description>invert the peri input</description>
20159                            </enumeratedValue>
20160                            <enumeratedValue>
20161                                <name>LOW</name>
20162                                <value>2</value>
20163                                <description>drive peri input low</description>
20164                            </enumeratedValue>
20165                            <enumeratedValue>
20166                                <name>HIGH</name>
20167                                <value>3</value>
20168                                <description>drive peri input high</description>
20169                            </enumeratedValue>
20170                        </enumeratedValues>
20171                    </field>
20172                    <field>
20173                        <name>OEOVER</name>
20174                        <bitRange>[15:14]</bitRange>
20175                        <access>read-write</access>
20176                        <enumeratedValues>
20177                            <enumeratedValue>
20178                                <name>NORMAL</name>
20179                                <value>0</value>
20180                                <description>drive output enable from peripheral signal selected by funcsel</description>
20181                            </enumeratedValue>
20182                            <enumeratedValue>
20183                                <name>INVERT</name>
20184                                <value>1</value>
20185                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
20186                            </enumeratedValue>
20187                            <enumeratedValue>
20188                                <name>DISABLE</name>
20189                                <value>2</value>
20190                                <description>disable output</description>
20191                            </enumeratedValue>
20192                            <enumeratedValue>
20193                                <name>ENABLE</name>
20194                                <value>3</value>
20195                                <description>enable output</description>
20196                            </enumeratedValue>
20197                        </enumeratedValues>
20198                    </field>
20199                    <field>
20200                        <name>OUTOVER</name>
20201                        <bitRange>[13:12]</bitRange>
20202                        <access>read-write</access>
20203                        <enumeratedValues>
20204                            <enumeratedValue>
20205                                <name>NORMAL</name>
20206                                <value>0</value>
20207                                <description>drive output from peripheral signal selected by funcsel</description>
20208                            </enumeratedValue>
20209                            <enumeratedValue>
20210                                <name>INVERT</name>
20211                                <value>1</value>
20212                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
20213                            </enumeratedValue>
20214                            <enumeratedValue>
20215                                <name>LOW</name>
20216                                <value>2</value>
20217                                <description>drive output low</description>
20218                            </enumeratedValue>
20219                            <enumeratedValue>
20220                                <name>HIGH</name>
20221                                <value>3</value>
20222                                <description>drive output high</description>
20223                            </enumeratedValue>
20224                        </enumeratedValues>
20225                    </field>
20226                    <field>
20227                        <name>FUNCSEL</name>
20228                        <description>0-31 -&gt; selects pin function according to the gpio table
20229                            31 == NULL</description>
20230                        <bitRange>[4:0]</bitRange>
20231                        <access>read-write</access>
20232                        <enumeratedValues>
20233                            <enumeratedValue>
20234                                <name>spi1_tx</name>
20235                                <value>1</value>
20236                            </enumeratedValue>
20237                            <enumeratedValue>
20238                                <name>uart1_rts</name>
20239                                <value>2</value>
20240                            </enumeratedValue>
20241                            <enumeratedValue>
20242                                <name>i2c1_scl</name>
20243                                <value>3</value>
20244                            </enumeratedValue>
20245                            <enumeratedValue>
20246                                <name>pwm_b_9</name>
20247                                <value>4</value>
20248                            </enumeratedValue>
20249                            <enumeratedValue>
20250                                <name>siob_proc_43</name>
20251                                <value>5</value>
20252                            </enumeratedValue>
20253                            <enumeratedValue>
20254                                <name>pio0_43</name>
20255                                <value>6</value>
20256                            </enumeratedValue>
20257                            <enumeratedValue>
20258                                <name>pio1_43</name>
20259                                <value>7</value>
20260                            </enumeratedValue>
20261                            <enumeratedValue>
20262                                <name>pio2_43</name>
20263                                <value>8</value>
20264                            </enumeratedValue>
20265                            <enumeratedValue>
20266                                <name>usb_muxing_vbus_detect</name>
20267                                <value>10</value>
20268                            </enumeratedValue>
20269                            <enumeratedValue>
20270                                <name>uart1_rx</name>
20271                                <value>11</value>
20272                            </enumeratedValue>
20273                            <enumeratedValue>
20274                                <name>null</name>
20275                                <value>31</value>
20276                            </enumeratedValue>
20277                        </enumeratedValues>
20278                    </field>
20279                </fields>
20280            </register>
20281            <register>
20282                <name>GPIO44_STATUS</name>
20283                <addressOffset>0x00000160</addressOffset>
20284                <resetValue>0x00000000</resetValue>
20285                <fields>
20286                    <field>
20287                        <name>IRQTOPROC</name>
20288                        <description>interrupt to processors, after override is applied</description>
20289                        <bitRange>[26:26]</bitRange>
20290                        <access>read-only</access>
20291                    </field>
20292                    <field>
20293                        <name>INFROMPAD</name>
20294                        <description>input signal from pad, before filtering and override are applied</description>
20295                        <bitRange>[17:17]</bitRange>
20296                        <access>read-only</access>
20297                    </field>
20298                    <field>
20299                        <name>OETOPAD</name>
20300                        <description>output enable to pad after register override is applied</description>
20301                        <bitRange>[13:13]</bitRange>
20302                        <access>read-only</access>
20303                    </field>
20304                    <field>
20305                        <name>OUTTOPAD</name>
20306                        <description>output signal to pad after register override is applied</description>
20307                        <bitRange>[9:9]</bitRange>
20308                        <access>read-only</access>
20309                    </field>
20310                </fields>
20311            </register>
20312            <register>
20313                <name>GPIO44_CTRL</name>
20314                <addressOffset>0x00000164</addressOffset>
20315                <resetValue>0x0000001f</resetValue>
20316                <fields>
20317                    <field>
20318                        <name>IRQOVER</name>
20319                        <bitRange>[29:28]</bitRange>
20320                        <access>read-write</access>
20321                        <enumeratedValues>
20322                            <enumeratedValue>
20323                                <name>NORMAL</name>
20324                                <value>0</value>
20325                                <description>don&#39;t invert the interrupt</description>
20326                            </enumeratedValue>
20327                            <enumeratedValue>
20328                                <name>INVERT</name>
20329                                <value>1</value>
20330                                <description>invert the interrupt</description>
20331                            </enumeratedValue>
20332                            <enumeratedValue>
20333                                <name>LOW</name>
20334                                <value>2</value>
20335                                <description>drive interrupt low</description>
20336                            </enumeratedValue>
20337                            <enumeratedValue>
20338                                <name>HIGH</name>
20339                                <value>3</value>
20340                                <description>drive interrupt high</description>
20341                            </enumeratedValue>
20342                        </enumeratedValues>
20343                    </field>
20344                    <field>
20345                        <name>INOVER</name>
20346                        <bitRange>[17:16]</bitRange>
20347                        <access>read-write</access>
20348                        <enumeratedValues>
20349                            <enumeratedValue>
20350                                <name>NORMAL</name>
20351                                <value>0</value>
20352                                <description>don&#39;t invert the peri input</description>
20353                            </enumeratedValue>
20354                            <enumeratedValue>
20355                                <name>INVERT</name>
20356                                <value>1</value>
20357                                <description>invert the peri input</description>
20358                            </enumeratedValue>
20359                            <enumeratedValue>
20360                                <name>LOW</name>
20361                                <value>2</value>
20362                                <description>drive peri input low</description>
20363                            </enumeratedValue>
20364                            <enumeratedValue>
20365                                <name>HIGH</name>
20366                                <value>3</value>
20367                                <description>drive peri input high</description>
20368                            </enumeratedValue>
20369                        </enumeratedValues>
20370                    </field>
20371                    <field>
20372                        <name>OEOVER</name>
20373                        <bitRange>[15:14]</bitRange>
20374                        <access>read-write</access>
20375                        <enumeratedValues>
20376                            <enumeratedValue>
20377                                <name>NORMAL</name>
20378                                <value>0</value>
20379                                <description>drive output enable from peripheral signal selected by funcsel</description>
20380                            </enumeratedValue>
20381                            <enumeratedValue>
20382                                <name>INVERT</name>
20383                                <value>1</value>
20384                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
20385                            </enumeratedValue>
20386                            <enumeratedValue>
20387                                <name>DISABLE</name>
20388                                <value>2</value>
20389                                <description>disable output</description>
20390                            </enumeratedValue>
20391                            <enumeratedValue>
20392                                <name>ENABLE</name>
20393                                <value>3</value>
20394                                <description>enable output</description>
20395                            </enumeratedValue>
20396                        </enumeratedValues>
20397                    </field>
20398                    <field>
20399                        <name>OUTOVER</name>
20400                        <bitRange>[13:12]</bitRange>
20401                        <access>read-write</access>
20402                        <enumeratedValues>
20403                            <enumeratedValue>
20404                                <name>NORMAL</name>
20405                                <value>0</value>
20406                                <description>drive output from peripheral signal selected by funcsel</description>
20407                            </enumeratedValue>
20408                            <enumeratedValue>
20409                                <name>INVERT</name>
20410                                <value>1</value>
20411                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
20412                            </enumeratedValue>
20413                            <enumeratedValue>
20414                                <name>LOW</name>
20415                                <value>2</value>
20416                                <description>drive output low</description>
20417                            </enumeratedValue>
20418                            <enumeratedValue>
20419                                <name>HIGH</name>
20420                                <value>3</value>
20421                                <description>drive output high</description>
20422                            </enumeratedValue>
20423                        </enumeratedValues>
20424                    </field>
20425                    <field>
20426                        <name>FUNCSEL</name>
20427                        <description>0-31 -&gt; selects pin function according to the gpio table
20428                            31 == NULL</description>
20429                        <bitRange>[4:0]</bitRange>
20430                        <access>read-write</access>
20431                        <enumeratedValues>
20432                            <enumeratedValue>
20433                                <name>spi1_rx</name>
20434                                <value>1</value>
20435                            </enumeratedValue>
20436                            <enumeratedValue>
20437                                <name>uart0_tx</name>
20438                                <value>2</value>
20439                            </enumeratedValue>
20440                            <enumeratedValue>
20441                                <name>i2c0_sda</name>
20442                                <value>3</value>
20443                            </enumeratedValue>
20444                            <enumeratedValue>
20445                                <name>pwm_a_10</name>
20446                                <value>4</value>
20447                            </enumeratedValue>
20448                            <enumeratedValue>
20449                                <name>siob_proc_44</name>
20450                                <value>5</value>
20451                            </enumeratedValue>
20452                            <enumeratedValue>
20453                                <name>pio0_44</name>
20454                                <value>6</value>
20455                            </enumeratedValue>
20456                            <enumeratedValue>
20457                                <name>pio1_44</name>
20458                                <value>7</value>
20459                            </enumeratedValue>
20460                            <enumeratedValue>
20461                                <name>pio2_44</name>
20462                                <value>8</value>
20463                            </enumeratedValue>
20464                            <enumeratedValue>
20465                                <name>usb_muxing_vbus_en</name>
20466                                <value>10</value>
20467                            </enumeratedValue>
20468                            <enumeratedValue>
20469                                <name>null</name>
20470                                <value>31</value>
20471                            </enumeratedValue>
20472                        </enumeratedValues>
20473                    </field>
20474                </fields>
20475            </register>
20476            <register>
20477                <name>GPIO45_STATUS</name>
20478                <addressOffset>0x00000168</addressOffset>
20479                <resetValue>0x00000000</resetValue>
20480                <fields>
20481                    <field>
20482                        <name>IRQTOPROC</name>
20483                        <description>interrupt to processors, after override is applied</description>
20484                        <bitRange>[26:26]</bitRange>
20485                        <access>read-only</access>
20486                    </field>
20487                    <field>
20488                        <name>INFROMPAD</name>
20489                        <description>input signal from pad, before filtering and override are applied</description>
20490                        <bitRange>[17:17]</bitRange>
20491                        <access>read-only</access>
20492                    </field>
20493                    <field>
20494                        <name>OETOPAD</name>
20495                        <description>output enable to pad after register override is applied</description>
20496                        <bitRange>[13:13]</bitRange>
20497                        <access>read-only</access>
20498                    </field>
20499                    <field>
20500                        <name>OUTTOPAD</name>
20501                        <description>output signal to pad after register override is applied</description>
20502                        <bitRange>[9:9]</bitRange>
20503                        <access>read-only</access>
20504                    </field>
20505                </fields>
20506            </register>
20507            <register>
20508                <name>GPIO45_CTRL</name>
20509                <addressOffset>0x0000016c</addressOffset>
20510                <resetValue>0x0000001f</resetValue>
20511                <fields>
20512                    <field>
20513                        <name>IRQOVER</name>
20514                        <bitRange>[29:28]</bitRange>
20515                        <access>read-write</access>
20516                        <enumeratedValues>
20517                            <enumeratedValue>
20518                                <name>NORMAL</name>
20519                                <value>0</value>
20520                                <description>don&#39;t invert the interrupt</description>
20521                            </enumeratedValue>
20522                            <enumeratedValue>
20523                                <name>INVERT</name>
20524                                <value>1</value>
20525                                <description>invert the interrupt</description>
20526                            </enumeratedValue>
20527                            <enumeratedValue>
20528                                <name>LOW</name>
20529                                <value>2</value>
20530                                <description>drive interrupt low</description>
20531                            </enumeratedValue>
20532                            <enumeratedValue>
20533                                <name>HIGH</name>
20534                                <value>3</value>
20535                                <description>drive interrupt high</description>
20536                            </enumeratedValue>
20537                        </enumeratedValues>
20538                    </field>
20539                    <field>
20540                        <name>INOVER</name>
20541                        <bitRange>[17:16]</bitRange>
20542                        <access>read-write</access>
20543                        <enumeratedValues>
20544                            <enumeratedValue>
20545                                <name>NORMAL</name>
20546                                <value>0</value>
20547                                <description>don&#39;t invert the peri input</description>
20548                            </enumeratedValue>
20549                            <enumeratedValue>
20550                                <name>INVERT</name>
20551                                <value>1</value>
20552                                <description>invert the peri input</description>
20553                            </enumeratedValue>
20554                            <enumeratedValue>
20555                                <name>LOW</name>
20556                                <value>2</value>
20557                                <description>drive peri input low</description>
20558                            </enumeratedValue>
20559                            <enumeratedValue>
20560                                <name>HIGH</name>
20561                                <value>3</value>
20562                                <description>drive peri input high</description>
20563                            </enumeratedValue>
20564                        </enumeratedValues>
20565                    </field>
20566                    <field>
20567                        <name>OEOVER</name>
20568                        <bitRange>[15:14]</bitRange>
20569                        <access>read-write</access>
20570                        <enumeratedValues>
20571                            <enumeratedValue>
20572                                <name>NORMAL</name>
20573                                <value>0</value>
20574                                <description>drive output enable from peripheral signal selected by funcsel</description>
20575                            </enumeratedValue>
20576                            <enumeratedValue>
20577                                <name>INVERT</name>
20578                                <value>1</value>
20579                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
20580                            </enumeratedValue>
20581                            <enumeratedValue>
20582                                <name>DISABLE</name>
20583                                <value>2</value>
20584                                <description>disable output</description>
20585                            </enumeratedValue>
20586                            <enumeratedValue>
20587                                <name>ENABLE</name>
20588                                <value>3</value>
20589                                <description>enable output</description>
20590                            </enumeratedValue>
20591                        </enumeratedValues>
20592                    </field>
20593                    <field>
20594                        <name>OUTOVER</name>
20595                        <bitRange>[13:12]</bitRange>
20596                        <access>read-write</access>
20597                        <enumeratedValues>
20598                            <enumeratedValue>
20599                                <name>NORMAL</name>
20600                                <value>0</value>
20601                                <description>drive output from peripheral signal selected by funcsel</description>
20602                            </enumeratedValue>
20603                            <enumeratedValue>
20604                                <name>INVERT</name>
20605                                <value>1</value>
20606                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
20607                            </enumeratedValue>
20608                            <enumeratedValue>
20609                                <name>LOW</name>
20610                                <value>2</value>
20611                                <description>drive output low</description>
20612                            </enumeratedValue>
20613                            <enumeratedValue>
20614                                <name>HIGH</name>
20615                                <value>3</value>
20616                                <description>drive output high</description>
20617                            </enumeratedValue>
20618                        </enumeratedValues>
20619                    </field>
20620                    <field>
20621                        <name>FUNCSEL</name>
20622                        <description>0-31 -&gt; selects pin function according to the gpio table
20623                            31 == NULL</description>
20624                        <bitRange>[4:0]</bitRange>
20625                        <access>read-write</access>
20626                        <enumeratedValues>
20627                            <enumeratedValue>
20628                                <name>spi1_ss_n</name>
20629                                <value>1</value>
20630                            </enumeratedValue>
20631                            <enumeratedValue>
20632                                <name>uart0_rx</name>
20633                                <value>2</value>
20634                            </enumeratedValue>
20635                            <enumeratedValue>
20636                                <name>i2c0_scl</name>
20637                                <value>3</value>
20638                            </enumeratedValue>
20639                            <enumeratedValue>
20640                                <name>pwm_b_10</name>
20641                                <value>4</value>
20642                            </enumeratedValue>
20643                            <enumeratedValue>
20644                                <name>siob_proc_45</name>
20645                                <value>5</value>
20646                            </enumeratedValue>
20647                            <enumeratedValue>
20648                                <name>pio0_45</name>
20649                                <value>6</value>
20650                            </enumeratedValue>
20651                            <enumeratedValue>
20652                                <name>pio1_45</name>
20653                                <value>7</value>
20654                            </enumeratedValue>
20655                            <enumeratedValue>
20656                                <name>pio2_45</name>
20657                                <value>8</value>
20658                            </enumeratedValue>
20659                            <enumeratedValue>
20660                                <name>usb_muxing_overcurr_detect</name>
20661                                <value>10</value>
20662                            </enumeratedValue>
20663                            <enumeratedValue>
20664                                <name>null</name>
20665                                <value>31</value>
20666                            </enumeratedValue>
20667                        </enumeratedValues>
20668                    </field>
20669                </fields>
20670            </register>
20671            <register>
20672                <name>GPIO46_STATUS</name>
20673                <addressOffset>0x00000170</addressOffset>
20674                <resetValue>0x00000000</resetValue>
20675                <fields>
20676                    <field>
20677                        <name>IRQTOPROC</name>
20678                        <description>interrupt to processors, after override is applied</description>
20679                        <bitRange>[26:26]</bitRange>
20680                        <access>read-only</access>
20681                    </field>
20682                    <field>
20683                        <name>INFROMPAD</name>
20684                        <description>input signal from pad, before filtering and override are applied</description>
20685                        <bitRange>[17:17]</bitRange>
20686                        <access>read-only</access>
20687                    </field>
20688                    <field>
20689                        <name>OETOPAD</name>
20690                        <description>output enable to pad after register override is applied</description>
20691                        <bitRange>[13:13]</bitRange>
20692                        <access>read-only</access>
20693                    </field>
20694                    <field>
20695                        <name>OUTTOPAD</name>
20696                        <description>output signal to pad after register override is applied</description>
20697                        <bitRange>[9:9]</bitRange>
20698                        <access>read-only</access>
20699                    </field>
20700                </fields>
20701            </register>
20702            <register>
20703                <name>GPIO46_CTRL</name>
20704                <addressOffset>0x00000174</addressOffset>
20705                <resetValue>0x0000001f</resetValue>
20706                <fields>
20707                    <field>
20708                        <name>IRQOVER</name>
20709                        <bitRange>[29:28]</bitRange>
20710                        <access>read-write</access>
20711                        <enumeratedValues>
20712                            <enumeratedValue>
20713                                <name>NORMAL</name>
20714                                <value>0</value>
20715                                <description>don&#39;t invert the interrupt</description>
20716                            </enumeratedValue>
20717                            <enumeratedValue>
20718                                <name>INVERT</name>
20719                                <value>1</value>
20720                                <description>invert the interrupt</description>
20721                            </enumeratedValue>
20722                            <enumeratedValue>
20723                                <name>LOW</name>
20724                                <value>2</value>
20725                                <description>drive interrupt low</description>
20726                            </enumeratedValue>
20727                            <enumeratedValue>
20728                                <name>HIGH</name>
20729                                <value>3</value>
20730                                <description>drive interrupt high</description>
20731                            </enumeratedValue>
20732                        </enumeratedValues>
20733                    </field>
20734                    <field>
20735                        <name>INOVER</name>
20736                        <bitRange>[17:16]</bitRange>
20737                        <access>read-write</access>
20738                        <enumeratedValues>
20739                            <enumeratedValue>
20740                                <name>NORMAL</name>
20741                                <value>0</value>
20742                                <description>don&#39;t invert the peri input</description>
20743                            </enumeratedValue>
20744                            <enumeratedValue>
20745                                <name>INVERT</name>
20746                                <value>1</value>
20747                                <description>invert the peri input</description>
20748                            </enumeratedValue>
20749                            <enumeratedValue>
20750                                <name>LOW</name>
20751                                <value>2</value>
20752                                <description>drive peri input low</description>
20753                            </enumeratedValue>
20754                            <enumeratedValue>
20755                                <name>HIGH</name>
20756                                <value>3</value>
20757                                <description>drive peri input high</description>
20758                            </enumeratedValue>
20759                        </enumeratedValues>
20760                    </field>
20761                    <field>
20762                        <name>OEOVER</name>
20763                        <bitRange>[15:14]</bitRange>
20764                        <access>read-write</access>
20765                        <enumeratedValues>
20766                            <enumeratedValue>
20767                                <name>NORMAL</name>
20768                                <value>0</value>
20769                                <description>drive output enable from peripheral signal selected by funcsel</description>
20770                            </enumeratedValue>
20771                            <enumeratedValue>
20772                                <name>INVERT</name>
20773                                <value>1</value>
20774                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
20775                            </enumeratedValue>
20776                            <enumeratedValue>
20777                                <name>DISABLE</name>
20778                                <value>2</value>
20779                                <description>disable output</description>
20780                            </enumeratedValue>
20781                            <enumeratedValue>
20782                                <name>ENABLE</name>
20783                                <value>3</value>
20784                                <description>enable output</description>
20785                            </enumeratedValue>
20786                        </enumeratedValues>
20787                    </field>
20788                    <field>
20789                        <name>OUTOVER</name>
20790                        <bitRange>[13:12]</bitRange>
20791                        <access>read-write</access>
20792                        <enumeratedValues>
20793                            <enumeratedValue>
20794                                <name>NORMAL</name>
20795                                <value>0</value>
20796                                <description>drive output from peripheral signal selected by funcsel</description>
20797                            </enumeratedValue>
20798                            <enumeratedValue>
20799                                <name>INVERT</name>
20800                                <value>1</value>
20801                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
20802                            </enumeratedValue>
20803                            <enumeratedValue>
20804                                <name>LOW</name>
20805                                <value>2</value>
20806                                <description>drive output low</description>
20807                            </enumeratedValue>
20808                            <enumeratedValue>
20809                                <name>HIGH</name>
20810                                <value>3</value>
20811                                <description>drive output high</description>
20812                            </enumeratedValue>
20813                        </enumeratedValues>
20814                    </field>
20815                    <field>
20816                        <name>FUNCSEL</name>
20817                        <description>0-31 -&gt; selects pin function according to the gpio table
20818                            31 == NULL</description>
20819                        <bitRange>[4:0]</bitRange>
20820                        <access>read-write</access>
20821                        <enumeratedValues>
20822                            <enumeratedValue>
20823                                <name>spi1_sclk</name>
20824                                <value>1</value>
20825                            </enumeratedValue>
20826                            <enumeratedValue>
20827                                <name>uart0_cts</name>
20828                                <value>2</value>
20829                            </enumeratedValue>
20830                            <enumeratedValue>
20831                                <name>i2c1_sda</name>
20832                                <value>3</value>
20833                            </enumeratedValue>
20834                            <enumeratedValue>
20835                                <name>pwm_a_11</name>
20836                                <value>4</value>
20837                            </enumeratedValue>
20838                            <enumeratedValue>
20839                                <name>siob_proc_46</name>
20840                                <value>5</value>
20841                            </enumeratedValue>
20842                            <enumeratedValue>
20843                                <name>pio0_46</name>
20844                                <value>6</value>
20845                            </enumeratedValue>
20846                            <enumeratedValue>
20847                                <name>pio1_46</name>
20848                                <value>7</value>
20849                            </enumeratedValue>
20850                            <enumeratedValue>
20851                                <name>pio2_46</name>
20852                                <value>8</value>
20853                            </enumeratedValue>
20854                            <enumeratedValue>
20855                                <name>usb_muxing_vbus_detect</name>
20856                                <value>10</value>
20857                            </enumeratedValue>
20858                            <enumeratedValue>
20859                                <name>uart0_tx</name>
20860                                <value>11</value>
20861                            </enumeratedValue>
20862                            <enumeratedValue>
20863                                <name>null</name>
20864                                <value>31</value>
20865                            </enumeratedValue>
20866                        </enumeratedValues>
20867                    </field>
20868                </fields>
20869            </register>
20870            <register>
20871                <name>GPIO47_STATUS</name>
20872                <addressOffset>0x00000178</addressOffset>
20873                <resetValue>0x00000000</resetValue>
20874                <fields>
20875                    <field>
20876                        <name>IRQTOPROC</name>
20877                        <description>interrupt to processors, after override is applied</description>
20878                        <bitRange>[26:26]</bitRange>
20879                        <access>read-only</access>
20880                    </field>
20881                    <field>
20882                        <name>INFROMPAD</name>
20883                        <description>input signal from pad, before filtering and override are applied</description>
20884                        <bitRange>[17:17]</bitRange>
20885                        <access>read-only</access>
20886                    </field>
20887                    <field>
20888                        <name>OETOPAD</name>
20889                        <description>output enable to pad after register override is applied</description>
20890                        <bitRange>[13:13]</bitRange>
20891                        <access>read-only</access>
20892                    </field>
20893                    <field>
20894                        <name>OUTTOPAD</name>
20895                        <description>output signal to pad after register override is applied</description>
20896                        <bitRange>[9:9]</bitRange>
20897                        <access>read-only</access>
20898                    </field>
20899                </fields>
20900            </register>
20901            <register>
20902                <name>GPIO47_CTRL</name>
20903                <addressOffset>0x0000017c</addressOffset>
20904                <resetValue>0x0000001f</resetValue>
20905                <fields>
20906                    <field>
20907                        <name>IRQOVER</name>
20908                        <bitRange>[29:28]</bitRange>
20909                        <access>read-write</access>
20910                        <enumeratedValues>
20911                            <enumeratedValue>
20912                                <name>NORMAL</name>
20913                                <value>0</value>
20914                                <description>don&#39;t invert the interrupt</description>
20915                            </enumeratedValue>
20916                            <enumeratedValue>
20917                                <name>INVERT</name>
20918                                <value>1</value>
20919                                <description>invert the interrupt</description>
20920                            </enumeratedValue>
20921                            <enumeratedValue>
20922                                <name>LOW</name>
20923                                <value>2</value>
20924                                <description>drive interrupt low</description>
20925                            </enumeratedValue>
20926                            <enumeratedValue>
20927                                <name>HIGH</name>
20928                                <value>3</value>
20929                                <description>drive interrupt high</description>
20930                            </enumeratedValue>
20931                        </enumeratedValues>
20932                    </field>
20933                    <field>
20934                        <name>INOVER</name>
20935                        <bitRange>[17:16]</bitRange>
20936                        <access>read-write</access>
20937                        <enumeratedValues>
20938                            <enumeratedValue>
20939                                <name>NORMAL</name>
20940                                <value>0</value>
20941                                <description>don&#39;t invert the peri input</description>
20942                            </enumeratedValue>
20943                            <enumeratedValue>
20944                                <name>INVERT</name>
20945                                <value>1</value>
20946                                <description>invert the peri input</description>
20947                            </enumeratedValue>
20948                            <enumeratedValue>
20949                                <name>LOW</name>
20950                                <value>2</value>
20951                                <description>drive peri input low</description>
20952                            </enumeratedValue>
20953                            <enumeratedValue>
20954                                <name>HIGH</name>
20955                                <value>3</value>
20956                                <description>drive peri input high</description>
20957                            </enumeratedValue>
20958                        </enumeratedValues>
20959                    </field>
20960                    <field>
20961                        <name>OEOVER</name>
20962                        <bitRange>[15:14]</bitRange>
20963                        <access>read-write</access>
20964                        <enumeratedValues>
20965                            <enumeratedValue>
20966                                <name>NORMAL</name>
20967                                <value>0</value>
20968                                <description>drive output enable from peripheral signal selected by funcsel</description>
20969                            </enumeratedValue>
20970                            <enumeratedValue>
20971                                <name>INVERT</name>
20972                                <value>1</value>
20973                                <description>drive output enable from inverse of peripheral signal selected by funcsel</description>
20974                            </enumeratedValue>
20975                            <enumeratedValue>
20976                                <name>DISABLE</name>
20977                                <value>2</value>
20978                                <description>disable output</description>
20979                            </enumeratedValue>
20980                            <enumeratedValue>
20981                                <name>ENABLE</name>
20982                                <value>3</value>
20983                                <description>enable output</description>
20984                            </enumeratedValue>
20985                        </enumeratedValues>
20986                    </field>
20987                    <field>
20988                        <name>OUTOVER</name>
20989                        <bitRange>[13:12]</bitRange>
20990                        <access>read-write</access>
20991                        <enumeratedValues>
20992                            <enumeratedValue>
20993                                <name>NORMAL</name>
20994                                <value>0</value>
20995                                <description>drive output from peripheral signal selected by funcsel</description>
20996                            </enumeratedValue>
20997                            <enumeratedValue>
20998                                <name>INVERT</name>
20999                                <value>1</value>
21000                                <description>drive output from inverse of peripheral signal selected by funcsel</description>
21001                            </enumeratedValue>
21002                            <enumeratedValue>
21003                                <name>LOW</name>
21004                                <value>2</value>
21005                                <description>drive output low</description>
21006                            </enumeratedValue>
21007                            <enumeratedValue>
21008                                <name>HIGH</name>
21009                                <value>3</value>
21010                                <description>drive output high</description>
21011                            </enumeratedValue>
21012                        </enumeratedValues>
21013                    </field>
21014                    <field>
21015                        <name>FUNCSEL</name>
21016                        <description>0-31 -&gt; selects pin function according to the gpio table
21017                            31 == NULL</description>
21018                        <bitRange>[4:0]</bitRange>
21019                        <access>read-write</access>
21020                        <enumeratedValues>
21021                            <enumeratedValue>
21022                                <name>spi1_tx</name>
21023                                <value>1</value>
21024                            </enumeratedValue>
21025                            <enumeratedValue>
21026                                <name>uart0_rts</name>
21027                                <value>2</value>
21028                            </enumeratedValue>
21029                            <enumeratedValue>
21030                                <name>i2c1_scl</name>
21031                                <value>3</value>
21032                            </enumeratedValue>
21033                            <enumeratedValue>
21034                                <name>pwm_b_11</name>
21035                                <value>4</value>
21036                            </enumeratedValue>
21037                            <enumeratedValue>
21038                                <name>siob_proc_47</name>
21039                                <value>5</value>
21040                            </enumeratedValue>
21041                            <enumeratedValue>
21042                                <name>pio0_47</name>
21043                                <value>6</value>
21044                            </enumeratedValue>
21045                            <enumeratedValue>
21046                                <name>pio1_47</name>
21047                                <value>7</value>
21048                            </enumeratedValue>
21049                            <enumeratedValue>
21050                                <name>pio2_47</name>
21051                                <value>8</value>
21052                            </enumeratedValue>
21053                            <enumeratedValue>
21054                                <name>xip_ss_n_1</name>
21055                                <value>9</value>
21056                            </enumeratedValue>
21057                            <enumeratedValue>
21058                                <name>usb_muxing_vbus_en</name>
21059                                <value>10</value>
21060                            </enumeratedValue>
21061                            <enumeratedValue>
21062                                <name>uart0_rx</name>
21063                                <value>11</value>
21064                            </enumeratedValue>
21065                            <enumeratedValue>
21066                                <name>null</name>
21067                                <value>31</value>
21068                            </enumeratedValue>
21069                        </enumeratedValues>
21070                    </field>
21071                </fields>
21072            </register>
21073            <register>
21074                <name>IRQSUMMARY_PROC0_SECURE0</name>
21075                <addressOffset>0x00000200</addressOffset>
21076                <resetValue>0x00000000</resetValue>
21077                <fields>
21078                    <field>
21079                        <name>GPIO31</name>
21080                        <bitRange>[31:31]</bitRange>
21081                        <access>read-only</access>
21082                    </field>
21083                    <field>
21084                        <name>GPIO30</name>
21085                        <bitRange>[30:30]</bitRange>
21086                        <access>read-only</access>
21087                    </field>
21088                    <field>
21089                        <name>GPIO29</name>
21090                        <bitRange>[29:29]</bitRange>
21091                        <access>read-only</access>
21092                    </field>
21093                    <field>
21094                        <name>GPIO28</name>
21095                        <bitRange>[28:28]</bitRange>
21096                        <access>read-only</access>
21097                    </field>
21098                    <field>
21099                        <name>GPIO27</name>
21100                        <bitRange>[27:27]</bitRange>
21101                        <access>read-only</access>
21102                    </field>
21103                    <field>
21104                        <name>GPIO26</name>
21105                        <bitRange>[26:26]</bitRange>
21106                        <access>read-only</access>
21107                    </field>
21108                    <field>
21109                        <name>GPIO25</name>
21110                        <bitRange>[25:25]</bitRange>
21111                        <access>read-only</access>
21112                    </field>
21113                    <field>
21114                        <name>GPIO24</name>
21115                        <bitRange>[24:24]</bitRange>
21116                        <access>read-only</access>
21117                    </field>
21118                    <field>
21119                        <name>GPIO23</name>
21120                        <bitRange>[23:23]</bitRange>
21121                        <access>read-only</access>
21122                    </field>
21123                    <field>
21124                        <name>GPIO22</name>
21125                        <bitRange>[22:22]</bitRange>
21126                        <access>read-only</access>
21127                    </field>
21128                    <field>
21129                        <name>GPIO21</name>
21130                        <bitRange>[21:21]</bitRange>
21131                        <access>read-only</access>
21132                    </field>
21133                    <field>
21134                        <name>GPIO20</name>
21135                        <bitRange>[20:20]</bitRange>
21136                        <access>read-only</access>
21137                    </field>
21138                    <field>
21139                        <name>GPIO19</name>
21140                        <bitRange>[19:19]</bitRange>
21141                        <access>read-only</access>
21142                    </field>
21143                    <field>
21144                        <name>GPIO18</name>
21145                        <bitRange>[18:18]</bitRange>
21146                        <access>read-only</access>
21147                    </field>
21148                    <field>
21149                        <name>GPIO17</name>
21150                        <bitRange>[17:17]</bitRange>
21151                        <access>read-only</access>
21152                    </field>
21153                    <field>
21154                        <name>GPIO16</name>
21155                        <bitRange>[16:16]</bitRange>
21156                        <access>read-only</access>
21157                    </field>
21158                    <field>
21159                        <name>GPIO15</name>
21160                        <bitRange>[15:15]</bitRange>
21161                        <access>read-only</access>
21162                    </field>
21163                    <field>
21164                        <name>GPIO14</name>
21165                        <bitRange>[14:14]</bitRange>
21166                        <access>read-only</access>
21167                    </field>
21168                    <field>
21169                        <name>GPIO13</name>
21170                        <bitRange>[13:13]</bitRange>
21171                        <access>read-only</access>
21172                    </field>
21173                    <field>
21174                        <name>GPIO12</name>
21175                        <bitRange>[12:12]</bitRange>
21176                        <access>read-only</access>
21177                    </field>
21178                    <field>
21179                        <name>GPIO11</name>
21180                        <bitRange>[11:11]</bitRange>
21181                        <access>read-only</access>
21182                    </field>
21183                    <field>
21184                        <name>GPIO10</name>
21185                        <bitRange>[10:10]</bitRange>
21186                        <access>read-only</access>
21187                    </field>
21188                    <field>
21189                        <name>GPIO9</name>
21190                        <bitRange>[9:9]</bitRange>
21191                        <access>read-only</access>
21192                    </field>
21193                    <field>
21194                        <name>GPIO8</name>
21195                        <bitRange>[8:8]</bitRange>
21196                        <access>read-only</access>
21197                    </field>
21198                    <field>
21199                        <name>GPIO7</name>
21200                        <bitRange>[7:7]</bitRange>
21201                        <access>read-only</access>
21202                    </field>
21203                    <field>
21204                        <name>GPIO6</name>
21205                        <bitRange>[6:6]</bitRange>
21206                        <access>read-only</access>
21207                    </field>
21208                    <field>
21209                        <name>GPIO5</name>
21210                        <bitRange>[5:5]</bitRange>
21211                        <access>read-only</access>
21212                    </field>
21213                    <field>
21214                        <name>GPIO4</name>
21215                        <bitRange>[4:4]</bitRange>
21216                        <access>read-only</access>
21217                    </field>
21218                    <field>
21219                        <name>GPIO3</name>
21220                        <bitRange>[3:3]</bitRange>
21221                        <access>read-only</access>
21222                    </field>
21223                    <field>
21224                        <name>GPIO2</name>
21225                        <bitRange>[2:2]</bitRange>
21226                        <access>read-only</access>
21227                    </field>
21228                    <field>
21229                        <name>GPIO1</name>
21230                        <bitRange>[1:1]</bitRange>
21231                        <access>read-only</access>
21232                    </field>
21233                    <field>
21234                        <name>GPIO0</name>
21235                        <bitRange>[0:0]</bitRange>
21236                        <access>read-only</access>
21237                    </field>
21238                </fields>
21239            </register>
21240            <register>
21241                <name>IRQSUMMARY_PROC0_SECURE1</name>
21242                <addressOffset>0x00000204</addressOffset>
21243                <resetValue>0x00000000</resetValue>
21244                <fields>
21245                    <field>
21246                        <name>GPIO47</name>
21247                        <bitRange>[15:15]</bitRange>
21248                        <access>read-only</access>
21249                    </field>
21250                    <field>
21251                        <name>GPIO46</name>
21252                        <bitRange>[14:14]</bitRange>
21253                        <access>read-only</access>
21254                    </field>
21255                    <field>
21256                        <name>GPIO45</name>
21257                        <bitRange>[13:13]</bitRange>
21258                        <access>read-only</access>
21259                    </field>
21260                    <field>
21261                        <name>GPIO44</name>
21262                        <bitRange>[12:12]</bitRange>
21263                        <access>read-only</access>
21264                    </field>
21265                    <field>
21266                        <name>GPIO43</name>
21267                        <bitRange>[11:11]</bitRange>
21268                        <access>read-only</access>
21269                    </field>
21270                    <field>
21271                        <name>GPIO42</name>
21272                        <bitRange>[10:10]</bitRange>
21273                        <access>read-only</access>
21274                    </field>
21275                    <field>
21276                        <name>GPIO41</name>
21277                        <bitRange>[9:9]</bitRange>
21278                        <access>read-only</access>
21279                    </field>
21280                    <field>
21281                        <name>GPIO40</name>
21282                        <bitRange>[8:8]</bitRange>
21283                        <access>read-only</access>
21284                    </field>
21285                    <field>
21286                        <name>GPIO39</name>
21287                        <bitRange>[7:7]</bitRange>
21288                        <access>read-only</access>
21289                    </field>
21290                    <field>
21291                        <name>GPIO38</name>
21292                        <bitRange>[6:6]</bitRange>
21293                        <access>read-only</access>
21294                    </field>
21295                    <field>
21296                        <name>GPIO37</name>
21297                        <bitRange>[5:5]</bitRange>
21298                        <access>read-only</access>
21299                    </field>
21300                    <field>
21301                        <name>GPIO36</name>
21302                        <bitRange>[4:4]</bitRange>
21303                        <access>read-only</access>
21304                    </field>
21305                    <field>
21306                        <name>GPIO35</name>
21307                        <bitRange>[3:3]</bitRange>
21308                        <access>read-only</access>
21309                    </field>
21310                    <field>
21311                        <name>GPIO34</name>
21312                        <bitRange>[2:2]</bitRange>
21313                        <access>read-only</access>
21314                    </field>
21315                    <field>
21316                        <name>GPIO33</name>
21317                        <bitRange>[1:1]</bitRange>
21318                        <access>read-only</access>
21319                    </field>
21320                    <field>
21321                        <name>GPIO32</name>
21322                        <bitRange>[0:0]</bitRange>
21323                        <access>read-only</access>
21324                    </field>
21325                </fields>
21326            </register>
21327            <register>
21328                <name>IRQSUMMARY_PROC0_NONSECURE0</name>
21329                <addressOffset>0x00000208</addressOffset>
21330                <resetValue>0x00000000</resetValue>
21331                <fields>
21332                    <field>
21333                        <name>GPIO31</name>
21334                        <bitRange>[31:31]</bitRange>
21335                        <access>read-only</access>
21336                    </field>
21337                    <field>
21338                        <name>GPIO30</name>
21339                        <bitRange>[30:30]</bitRange>
21340                        <access>read-only</access>
21341                    </field>
21342                    <field>
21343                        <name>GPIO29</name>
21344                        <bitRange>[29:29]</bitRange>
21345                        <access>read-only</access>
21346                    </field>
21347                    <field>
21348                        <name>GPIO28</name>
21349                        <bitRange>[28:28]</bitRange>
21350                        <access>read-only</access>
21351                    </field>
21352                    <field>
21353                        <name>GPIO27</name>
21354                        <bitRange>[27:27]</bitRange>
21355                        <access>read-only</access>
21356                    </field>
21357                    <field>
21358                        <name>GPIO26</name>
21359                        <bitRange>[26:26]</bitRange>
21360                        <access>read-only</access>
21361                    </field>
21362                    <field>
21363                        <name>GPIO25</name>
21364                        <bitRange>[25:25]</bitRange>
21365                        <access>read-only</access>
21366                    </field>
21367                    <field>
21368                        <name>GPIO24</name>
21369                        <bitRange>[24:24]</bitRange>
21370                        <access>read-only</access>
21371                    </field>
21372                    <field>
21373                        <name>GPIO23</name>
21374                        <bitRange>[23:23]</bitRange>
21375                        <access>read-only</access>
21376                    </field>
21377                    <field>
21378                        <name>GPIO22</name>
21379                        <bitRange>[22:22]</bitRange>
21380                        <access>read-only</access>
21381                    </field>
21382                    <field>
21383                        <name>GPIO21</name>
21384                        <bitRange>[21:21]</bitRange>
21385                        <access>read-only</access>
21386                    </field>
21387                    <field>
21388                        <name>GPIO20</name>
21389                        <bitRange>[20:20]</bitRange>
21390                        <access>read-only</access>
21391                    </field>
21392                    <field>
21393                        <name>GPIO19</name>
21394                        <bitRange>[19:19]</bitRange>
21395                        <access>read-only</access>
21396                    </field>
21397                    <field>
21398                        <name>GPIO18</name>
21399                        <bitRange>[18:18]</bitRange>
21400                        <access>read-only</access>
21401                    </field>
21402                    <field>
21403                        <name>GPIO17</name>
21404                        <bitRange>[17:17]</bitRange>
21405                        <access>read-only</access>
21406                    </field>
21407                    <field>
21408                        <name>GPIO16</name>
21409                        <bitRange>[16:16]</bitRange>
21410                        <access>read-only</access>
21411                    </field>
21412                    <field>
21413                        <name>GPIO15</name>
21414                        <bitRange>[15:15]</bitRange>
21415                        <access>read-only</access>
21416                    </field>
21417                    <field>
21418                        <name>GPIO14</name>
21419                        <bitRange>[14:14]</bitRange>
21420                        <access>read-only</access>
21421                    </field>
21422                    <field>
21423                        <name>GPIO13</name>
21424                        <bitRange>[13:13]</bitRange>
21425                        <access>read-only</access>
21426                    </field>
21427                    <field>
21428                        <name>GPIO12</name>
21429                        <bitRange>[12:12]</bitRange>
21430                        <access>read-only</access>
21431                    </field>
21432                    <field>
21433                        <name>GPIO11</name>
21434                        <bitRange>[11:11]</bitRange>
21435                        <access>read-only</access>
21436                    </field>
21437                    <field>
21438                        <name>GPIO10</name>
21439                        <bitRange>[10:10]</bitRange>
21440                        <access>read-only</access>
21441                    </field>
21442                    <field>
21443                        <name>GPIO9</name>
21444                        <bitRange>[9:9]</bitRange>
21445                        <access>read-only</access>
21446                    </field>
21447                    <field>
21448                        <name>GPIO8</name>
21449                        <bitRange>[8:8]</bitRange>
21450                        <access>read-only</access>
21451                    </field>
21452                    <field>
21453                        <name>GPIO7</name>
21454                        <bitRange>[7:7]</bitRange>
21455                        <access>read-only</access>
21456                    </field>
21457                    <field>
21458                        <name>GPIO6</name>
21459                        <bitRange>[6:6]</bitRange>
21460                        <access>read-only</access>
21461                    </field>
21462                    <field>
21463                        <name>GPIO5</name>
21464                        <bitRange>[5:5]</bitRange>
21465                        <access>read-only</access>
21466                    </field>
21467                    <field>
21468                        <name>GPIO4</name>
21469                        <bitRange>[4:4]</bitRange>
21470                        <access>read-only</access>
21471                    </field>
21472                    <field>
21473                        <name>GPIO3</name>
21474                        <bitRange>[3:3]</bitRange>
21475                        <access>read-only</access>
21476                    </field>
21477                    <field>
21478                        <name>GPIO2</name>
21479                        <bitRange>[2:2]</bitRange>
21480                        <access>read-only</access>
21481                    </field>
21482                    <field>
21483                        <name>GPIO1</name>
21484                        <bitRange>[1:1]</bitRange>
21485                        <access>read-only</access>
21486                    </field>
21487                    <field>
21488                        <name>GPIO0</name>
21489                        <bitRange>[0:0]</bitRange>
21490                        <access>read-only</access>
21491                    </field>
21492                </fields>
21493            </register>
21494            <register>
21495                <name>IRQSUMMARY_PROC0_NONSECURE1</name>
21496                <addressOffset>0x0000020c</addressOffset>
21497                <resetValue>0x00000000</resetValue>
21498                <fields>
21499                    <field>
21500                        <name>GPIO47</name>
21501                        <bitRange>[15:15]</bitRange>
21502                        <access>read-only</access>
21503                    </field>
21504                    <field>
21505                        <name>GPIO46</name>
21506                        <bitRange>[14:14]</bitRange>
21507                        <access>read-only</access>
21508                    </field>
21509                    <field>
21510                        <name>GPIO45</name>
21511                        <bitRange>[13:13]</bitRange>
21512                        <access>read-only</access>
21513                    </field>
21514                    <field>
21515                        <name>GPIO44</name>
21516                        <bitRange>[12:12]</bitRange>
21517                        <access>read-only</access>
21518                    </field>
21519                    <field>
21520                        <name>GPIO43</name>
21521                        <bitRange>[11:11]</bitRange>
21522                        <access>read-only</access>
21523                    </field>
21524                    <field>
21525                        <name>GPIO42</name>
21526                        <bitRange>[10:10]</bitRange>
21527                        <access>read-only</access>
21528                    </field>
21529                    <field>
21530                        <name>GPIO41</name>
21531                        <bitRange>[9:9]</bitRange>
21532                        <access>read-only</access>
21533                    </field>
21534                    <field>
21535                        <name>GPIO40</name>
21536                        <bitRange>[8:8]</bitRange>
21537                        <access>read-only</access>
21538                    </field>
21539                    <field>
21540                        <name>GPIO39</name>
21541                        <bitRange>[7:7]</bitRange>
21542                        <access>read-only</access>
21543                    </field>
21544                    <field>
21545                        <name>GPIO38</name>
21546                        <bitRange>[6:6]</bitRange>
21547                        <access>read-only</access>
21548                    </field>
21549                    <field>
21550                        <name>GPIO37</name>
21551                        <bitRange>[5:5]</bitRange>
21552                        <access>read-only</access>
21553                    </field>
21554                    <field>
21555                        <name>GPIO36</name>
21556                        <bitRange>[4:4]</bitRange>
21557                        <access>read-only</access>
21558                    </field>
21559                    <field>
21560                        <name>GPIO35</name>
21561                        <bitRange>[3:3]</bitRange>
21562                        <access>read-only</access>
21563                    </field>
21564                    <field>
21565                        <name>GPIO34</name>
21566                        <bitRange>[2:2]</bitRange>
21567                        <access>read-only</access>
21568                    </field>
21569                    <field>
21570                        <name>GPIO33</name>
21571                        <bitRange>[1:1]</bitRange>
21572                        <access>read-only</access>
21573                    </field>
21574                    <field>
21575                        <name>GPIO32</name>
21576                        <bitRange>[0:0]</bitRange>
21577                        <access>read-only</access>
21578                    </field>
21579                </fields>
21580            </register>
21581            <register>
21582                <name>IRQSUMMARY_PROC1_SECURE0</name>
21583                <addressOffset>0x00000210</addressOffset>
21584                <resetValue>0x00000000</resetValue>
21585                <fields>
21586                    <field>
21587                        <name>GPIO31</name>
21588                        <bitRange>[31:31]</bitRange>
21589                        <access>read-only</access>
21590                    </field>
21591                    <field>
21592                        <name>GPIO30</name>
21593                        <bitRange>[30:30]</bitRange>
21594                        <access>read-only</access>
21595                    </field>
21596                    <field>
21597                        <name>GPIO29</name>
21598                        <bitRange>[29:29]</bitRange>
21599                        <access>read-only</access>
21600                    </field>
21601                    <field>
21602                        <name>GPIO28</name>
21603                        <bitRange>[28:28]</bitRange>
21604                        <access>read-only</access>
21605                    </field>
21606                    <field>
21607                        <name>GPIO27</name>
21608                        <bitRange>[27:27]</bitRange>
21609                        <access>read-only</access>
21610                    </field>
21611                    <field>
21612                        <name>GPIO26</name>
21613                        <bitRange>[26:26]</bitRange>
21614                        <access>read-only</access>
21615                    </field>
21616                    <field>
21617                        <name>GPIO25</name>
21618                        <bitRange>[25:25]</bitRange>
21619                        <access>read-only</access>
21620                    </field>
21621                    <field>
21622                        <name>GPIO24</name>
21623                        <bitRange>[24:24]</bitRange>
21624                        <access>read-only</access>
21625                    </field>
21626                    <field>
21627                        <name>GPIO23</name>
21628                        <bitRange>[23:23]</bitRange>
21629                        <access>read-only</access>
21630                    </field>
21631                    <field>
21632                        <name>GPIO22</name>
21633                        <bitRange>[22:22]</bitRange>
21634                        <access>read-only</access>
21635                    </field>
21636                    <field>
21637                        <name>GPIO21</name>
21638                        <bitRange>[21:21]</bitRange>
21639                        <access>read-only</access>
21640                    </field>
21641                    <field>
21642                        <name>GPIO20</name>
21643                        <bitRange>[20:20]</bitRange>
21644                        <access>read-only</access>
21645                    </field>
21646                    <field>
21647                        <name>GPIO19</name>
21648                        <bitRange>[19:19]</bitRange>
21649                        <access>read-only</access>
21650                    </field>
21651                    <field>
21652                        <name>GPIO18</name>
21653                        <bitRange>[18:18]</bitRange>
21654                        <access>read-only</access>
21655                    </field>
21656                    <field>
21657                        <name>GPIO17</name>
21658                        <bitRange>[17:17]</bitRange>
21659                        <access>read-only</access>
21660                    </field>
21661                    <field>
21662                        <name>GPIO16</name>
21663                        <bitRange>[16:16]</bitRange>
21664                        <access>read-only</access>
21665                    </field>
21666                    <field>
21667                        <name>GPIO15</name>
21668                        <bitRange>[15:15]</bitRange>
21669                        <access>read-only</access>
21670                    </field>
21671                    <field>
21672                        <name>GPIO14</name>
21673                        <bitRange>[14:14]</bitRange>
21674                        <access>read-only</access>
21675                    </field>
21676                    <field>
21677                        <name>GPIO13</name>
21678                        <bitRange>[13:13]</bitRange>
21679                        <access>read-only</access>
21680                    </field>
21681                    <field>
21682                        <name>GPIO12</name>
21683                        <bitRange>[12:12]</bitRange>
21684                        <access>read-only</access>
21685                    </field>
21686                    <field>
21687                        <name>GPIO11</name>
21688                        <bitRange>[11:11]</bitRange>
21689                        <access>read-only</access>
21690                    </field>
21691                    <field>
21692                        <name>GPIO10</name>
21693                        <bitRange>[10:10]</bitRange>
21694                        <access>read-only</access>
21695                    </field>
21696                    <field>
21697                        <name>GPIO9</name>
21698                        <bitRange>[9:9]</bitRange>
21699                        <access>read-only</access>
21700                    </field>
21701                    <field>
21702                        <name>GPIO8</name>
21703                        <bitRange>[8:8]</bitRange>
21704                        <access>read-only</access>
21705                    </field>
21706                    <field>
21707                        <name>GPIO7</name>
21708                        <bitRange>[7:7]</bitRange>
21709                        <access>read-only</access>
21710                    </field>
21711                    <field>
21712                        <name>GPIO6</name>
21713                        <bitRange>[6:6]</bitRange>
21714                        <access>read-only</access>
21715                    </field>
21716                    <field>
21717                        <name>GPIO5</name>
21718                        <bitRange>[5:5]</bitRange>
21719                        <access>read-only</access>
21720                    </field>
21721                    <field>
21722                        <name>GPIO4</name>
21723                        <bitRange>[4:4]</bitRange>
21724                        <access>read-only</access>
21725                    </field>
21726                    <field>
21727                        <name>GPIO3</name>
21728                        <bitRange>[3:3]</bitRange>
21729                        <access>read-only</access>
21730                    </field>
21731                    <field>
21732                        <name>GPIO2</name>
21733                        <bitRange>[2:2]</bitRange>
21734                        <access>read-only</access>
21735                    </field>
21736                    <field>
21737                        <name>GPIO1</name>
21738                        <bitRange>[1:1]</bitRange>
21739                        <access>read-only</access>
21740                    </field>
21741                    <field>
21742                        <name>GPIO0</name>
21743                        <bitRange>[0:0]</bitRange>
21744                        <access>read-only</access>
21745                    </field>
21746                </fields>
21747            </register>
21748            <register>
21749                <name>IRQSUMMARY_PROC1_SECURE1</name>
21750                <addressOffset>0x00000214</addressOffset>
21751                <resetValue>0x00000000</resetValue>
21752                <fields>
21753                    <field>
21754                        <name>GPIO47</name>
21755                        <bitRange>[15:15]</bitRange>
21756                        <access>read-only</access>
21757                    </field>
21758                    <field>
21759                        <name>GPIO46</name>
21760                        <bitRange>[14:14]</bitRange>
21761                        <access>read-only</access>
21762                    </field>
21763                    <field>
21764                        <name>GPIO45</name>
21765                        <bitRange>[13:13]</bitRange>
21766                        <access>read-only</access>
21767                    </field>
21768                    <field>
21769                        <name>GPIO44</name>
21770                        <bitRange>[12:12]</bitRange>
21771                        <access>read-only</access>
21772                    </field>
21773                    <field>
21774                        <name>GPIO43</name>
21775                        <bitRange>[11:11]</bitRange>
21776                        <access>read-only</access>
21777                    </field>
21778                    <field>
21779                        <name>GPIO42</name>
21780                        <bitRange>[10:10]</bitRange>
21781                        <access>read-only</access>
21782                    </field>
21783                    <field>
21784                        <name>GPIO41</name>
21785                        <bitRange>[9:9]</bitRange>
21786                        <access>read-only</access>
21787                    </field>
21788                    <field>
21789                        <name>GPIO40</name>
21790                        <bitRange>[8:8]</bitRange>
21791                        <access>read-only</access>
21792                    </field>
21793                    <field>
21794                        <name>GPIO39</name>
21795                        <bitRange>[7:7]</bitRange>
21796                        <access>read-only</access>
21797                    </field>
21798                    <field>
21799                        <name>GPIO38</name>
21800                        <bitRange>[6:6]</bitRange>
21801                        <access>read-only</access>
21802                    </field>
21803                    <field>
21804                        <name>GPIO37</name>
21805                        <bitRange>[5:5]</bitRange>
21806                        <access>read-only</access>
21807                    </field>
21808                    <field>
21809                        <name>GPIO36</name>
21810                        <bitRange>[4:4]</bitRange>
21811                        <access>read-only</access>
21812                    </field>
21813                    <field>
21814                        <name>GPIO35</name>
21815                        <bitRange>[3:3]</bitRange>
21816                        <access>read-only</access>
21817                    </field>
21818                    <field>
21819                        <name>GPIO34</name>
21820                        <bitRange>[2:2]</bitRange>
21821                        <access>read-only</access>
21822                    </field>
21823                    <field>
21824                        <name>GPIO33</name>
21825                        <bitRange>[1:1]</bitRange>
21826                        <access>read-only</access>
21827                    </field>
21828                    <field>
21829                        <name>GPIO32</name>
21830                        <bitRange>[0:0]</bitRange>
21831                        <access>read-only</access>
21832                    </field>
21833                </fields>
21834            </register>
21835            <register>
21836                <name>IRQSUMMARY_PROC1_NONSECURE0</name>
21837                <addressOffset>0x00000218</addressOffset>
21838                <resetValue>0x00000000</resetValue>
21839                <fields>
21840                    <field>
21841                        <name>GPIO31</name>
21842                        <bitRange>[31:31]</bitRange>
21843                        <access>read-only</access>
21844                    </field>
21845                    <field>
21846                        <name>GPIO30</name>
21847                        <bitRange>[30:30]</bitRange>
21848                        <access>read-only</access>
21849                    </field>
21850                    <field>
21851                        <name>GPIO29</name>
21852                        <bitRange>[29:29]</bitRange>
21853                        <access>read-only</access>
21854                    </field>
21855                    <field>
21856                        <name>GPIO28</name>
21857                        <bitRange>[28:28]</bitRange>
21858                        <access>read-only</access>
21859                    </field>
21860                    <field>
21861                        <name>GPIO27</name>
21862                        <bitRange>[27:27]</bitRange>
21863                        <access>read-only</access>
21864                    </field>
21865                    <field>
21866                        <name>GPIO26</name>
21867                        <bitRange>[26:26]</bitRange>
21868                        <access>read-only</access>
21869                    </field>
21870                    <field>
21871                        <name>GPIO25</name>
21872                        <bitRange>[25:25]</bitRange>
21873                        <access>read-only</access>
21874                    </field>
21875                    <field>
21876                        <name>GPIO24</name>
21877                        <bitRange>[24:24]</bitRange>
21878                        <access>read-only</access>
21879                    </field>
21880                    <field>
21881                        <name>GPIO23</name>
21882                        <bitRange>[23:23]</bitRange>
21883                        <access>read-only</access>
21884                    </field>
21885                    <field>
21886                        <name>GPIO22</name>
21887                        <bitRange>[22:22]</bitRange>
21888                        <access>read-only</access>
21889                    </field>
21890                    <field>
21891                        <name>GPIO21</name>
21892                        <bitRange>[21:21]</bitRange>
21893                        <access>read-only</access>
21894                    </field>
21895                    <field>
21896                        <name>GPIO20</name>
21897                        <bitRange>[20:20]</bitRange>
21898                        <access>read-only</access>
21899                    </field>
21900                    <field>
21901                        <name>GPIO19</name>
21902                        <bitRange>[19:19]</bitRange>
21903                        <access>read-only</access>
21904                    </field>
21905                    <field>
21906                        <name>GPIO18</name>
21907                        <bitRange>[18:18]</bitRange>
21908                        <access>read-only</access>
21909                    </field>
21910                    <field>
21911                        <name>GPIO17</name>
21912                        <bitRange>[17:17]</bitRange>
21913                        <access>read-only</access>
21914                    </field>
21915                    <field>
21916                        <name>GPIO16</name>
21917                        <bitRange>[16:16]</bitRange>
21918                        <access>read-only</access>
21919                    </field>
21920                    <field>
21921                        <name>GPIO15</name>
21922                        <bitRange>[15:15]</bitRange>
21923                        <access>read-only</access>
21924                    </field>
21925                    <field>
21926                        <name>GPIO14</name>
21927                        <bitRange>[14:14]</bitRange>
21928                        <access>read-only</access>
21929                    </field>
21930                    <field>
21931                        <name>GPIO13</name>
21932                        <bitRange>[13:13]</bitRange>
21933                        <access>read-only</access>
21934                    </field>
21935                    <field>
21936                        <name>GPIO12</name>
21937                        <bitRange>[12:12]</bitRange>
21938                        <access>read-only</access>
21939                    </field>
21940                    <field>
21941                        <name>GPIO11</name>
21942                        <bitRange>[11:11]</bitRange>
21943                        <access>read-only</access>
21944                    </field>
21945                    <field>
21946                        <name>GPIO10</name>
21947                        <bitRange>[10:10]</bitRange>
21948                        <access>read-only</access>
21949                    </field>
21950                    <field>
21951                        <name>GPIO9</name>
21952                        <bitRange>[9:9]</bitRange>
21953                        <access>read-only</access>
21954                    </field>
21955                    <field>
21956                        <name>GPIO8</name>
21957                        <bitRange>[8:8]</bitRange>
21958                        <access>read-only</access>
21959                    </field>
21960                    <field>
21961                        <name>GPIO7</name>
21962                        <bitRange>[7:7]</bitRange>
21963                        <access>read-only</access>
21964                    </field>
21965                    <field>
21966                        <name>GPIO6</name>
21967                        <bitRange>[6:6]</bitRange>
21968                        <access>read-only</access>
21969                    </field>
21970                    <field>
21971                        <name>GPIO5</name>
21972                        <bitRange>[5:5]</bitRange>
21973                        <access>read-only</access>
21974                    </field>
21975                    <field>
21976                        <name>GPIO4</name>
21977                        <bitRange>[4:4]</bitRange>
21978                        <access>read-only</access>
21979                    </field>
21980                    <field>
21981                        <name>GPIO3</name>
21982                        <bitRange>[3:3]</bitRange>
21983                        <access>read-only</access>
21984                    </field>
21985                    <field>
21986                        <name>GPIO2</name>
21987                        <bitRange>[2:2]</bitRange>
21988                        <access>read-only</access>
21989                    </field>
21990                    <field>
21991                        <name>GPIO1</name>
21992                        <bitRange>[1:1]</bitRange>
21993                        <access>read-only</access>
21994                    </field>
21995                    <field>
21996                        <name>GPIO0</name>
21997                        <bitRange>[0:0]</bitRange>
21998                        <access>read-only</access>
21999                    </field>
22000                </fields>
22001            </register>
22002            <register>
22003                <name>IRQSUMMARY_PROC1_NONSECURE1</name>
22004                <addressOffset>0x0000021c</addressOffset>
22005                <resetValue>0x00000000</resetValue>
22006                <fields>
22007                    <field>
22008                        <name>GPIO47</name>
22009                        <bitRange>[15:15]</bitRange>
22010                        <access>read-only</access>
22011                    </field>
22012                    <field>
22013                        <name>GPIO46</name>
22014                        <bitRange>[14:14]</bitRange>
22015                        <access>read-only</access>
22016                    </field>
22017                    <field>
22018                        <name>GPIO45</name>
22019                        <bitRange>[13:13]</bitRange>
22020                        <access>read-only</access>
22021                    </field>
22022                    <field>
22023                        <name>GPIO44</name>
22024                        <bitRange>[12:12]</bitRange>
22025                        <access>read-only</access>
22026                    </field>
22027                    <field>
22028                        <name>GPIO43</name>
22029                        <bitRange>[11:11]</bitRange>
22030                        <access>read-only</access>
22031                    </field>
22032                    <field>
22033                        <name>GPIO42</name>
22034                        <bitRange>[10:10]</bitRange>
22035                        <access>read-only</access>
22036                    </field>
22037                    <field>
22038                        <name>GPIO41</name>
22039                        <bitRange>[9:9]</bitRange>
22040                        <access>read-only</access>
22041                    </field>
22042                    <field>
22043                        <name>GPIO40</name>
22044                        <bitRange>[8:8]</bitRange>
22045                        <access>read-only</access>
22046                    </field>
22047                    <field>
22048                        <name>GPIO39</name>
22049                        <bitRange>[7:7]</bitRange>
22050                        <access>read-only</access>
22051                    </field>
22052                    <field>
22053                        <name>GPIO38</name>
22054                        <bitRange>[6:6]</bitRange>
22055                        <access>read-only</access>
22056                    </field>
22057                    <field>
22058                        <name>GPIO37</name>
22059                        <bitRange>[5:5]</bitRange>
22060                        <access>read-only</access>
22061                    </field>
22062                    <field>
22063                        <name>GPIO36</name>
22064                        <bitRange>[4:4]</bitRange>
22065                        <access>read-only</access>
22066                    </field>
22067                    <field>
22068                        <name>GPIO35</name>
22069                        <bitRange>[3:3]</bitRange>
22070                        <access>read-only</access>
22071                    </field>
22072                    <field>
22073                        <name>GPIO34</name>
22074                        <bitRange>[2:2]</bitRange>
22075                        <access>read-only</access>
22076                    </field>
22077                    <field>
22078                        <name>GPIO33</name>
22079                        <bitRange>[1:1]</bitRange>
22080                        <access>read-only</access>
22081                    </field>
22082                    <field>
22083                        <name>GPIO32</name>
22084                        <bitRange>[0:0]</bitRange>
22085                        <access>read-only</access>
22086                    </field>
22087                </fields>
22088            </register>
22089            <register>
22090                <name>IRQSUMMARY_DORMANT_WAKE_SECURE0</name>
22091                <addressOffset>0x00000220</addressOffset>
22092                <resetValue>0x00000000</resetValue>
22093                <fields>
22094                    <field>
22095                        <name>GPIO31</name>
22096                        <bitRange>[31:31]</bitRange>
22097                        <access>read-only</access>
22098                    </field>
22099                    <field>
22100                        <name>GPIO30</name>
22101                        <bitRange>[30:30]</bitRange>
22102                        <access>read-only</access>
22103                    </field>
22104                    <field>
22105                        <name>GPIO29</name>
22106                        <bitRange>[29:29]</bitRange>
22107                        <access>read-only</access>
22108                    </field>
22109                    <field>
22110                        <name>GPIO28</name>
22111                        <bitRange>[28:28]</bitRange>
22112                        <access>read-only</access>
22113                    </field>
22114                    <field>
22115                        <name>GPIO27</name>
22116                        <bitRange>[27:27]</bitRange>
22117                        <access>read-only</access>
22118                    </field>
22119                    <field>
22120                        <name>GPIO26</name>
22121                        <bitRange>[26:26]</bitRange>
22122                        <access>read-only</access>
22123                    </field>
22124                    <field>
22125                        <name>GPIO25</name>
22126                        <bitRange>[25:25]</bitRange>
22127                        <access>read-only</access>
22128                    </field>
22129                    <field>
22130                        <name>GPIO24</name>
22131                        <bitRange>[24:24]</bitRange>
22132                        <access>read-only</access>
22133                    </field>
22134                    <field>
22135                        <name>GPIO23</name>
22136                        <bitRange>[23:23]</bitRange>
22137                        <access>read-only</access>
22138                    </field>
22139                    <field>
22140                        <name>GPIO22</name>
22141                        <bitRange>[22:22]</bitRange>
22142                        <access>read-only</access>
22143                    </field>
22144                    <field>
22145                        <name>GPIO21</name>
22146                        <bitRange>[21:21]</bitRange>
22147                        <access>read-only</access>
22148                    </field>
22149                    <field>
22150                        <name>GPIO20</name>
22151                        <bitRange>[20:20]</bitRange>
22152                        <access>read-only</access>
22153                    </field>
22154                    <field>
22155                        <name>GPIO19</name>
22156                        <bitRange>[19:19]</bitRange>
22157                        <access>read-only</access>
22158                    </field>
22159                    <field>
22160                        <name>GPIO18</name>
22161                        <bitRange>[18:18]</bitRange>
22162                        <access>read-only</access>
22163                    </field>
22164                    <field>
22165                        <name>GPIO17</name>
22166                        <bitRange>[17:17]</bitRange>
22167                        <access>read-only</access>
22168                    </field>
22169                    <field>
22170                        <name>GPIO16</name>
22171                        <bitRange>[16:16]</bitRange>
22172                        <access>read-only</access>
22173                    </field>
22174                    <field>
22175                        <name>GPIO15</name>
22176                        <bitRange>[15:15]</bitRange>
22177                        <access>read-only</access>
22178                    </field>
22179                    <field>
22180                        <name>GPIO14</name>
22181                        <bitRange>[14:14]</bitRange>
22182                        <access>read-only</access>
22183                    </field>
22184                    <field>
22185                        <name>GPIO13</name>
22186                        <bitRange>[13:13]</bitRange>
22187                        <access>read-only</access>
22188                    </field>
22189                    <field>
22190                        <name>GPIO12</name>
22191                        <bitRange>[12:12]</bitRange>
22192                        <access>read-only</access>
22193                    </field>
22194                    <field>
22195                        <name>GPIO11</name>
22196                        <bitRange>[11:11]</bitRange>
22197                        <access>read-only</access>
22198                    </field>
22199                    <field>
22200                        <name>GPIO10</name>
22201                        <bitRange>[10:10]</bitRange>
22202                        <access>read-only</access>
22203                    </field>
22204                    <field>
22205                        <name>GPIO9</name>
22206                        <bitRange>[9:9]</bitRange>
22207                        <access>read-only</access>
22208                    </field>
22209                    <field>
22210                        <name>GPIO8</name>
22211                        <bitRange>[8:8]</bitRange>
22212                        <access>read-only</access>
22213                    </field>
22214                    <field>
22215                        <name>GPIO7</name>
22216                        <bitRange>[7:7]</bitRange>
22217                        <access>read-only</access>
22218                    </field>
22219                    <field>
22220                        <name>GPIO6</name>
22221                        <bitRange>[6:6]</bitRange>
22222                        <access>read-only</access>
22223                    </field>
22224                    <field>
22225                        <name>GPIO5</name>
22226                        <bitRange>[5:5]</bitRange>
22227                        <access>read-only</access>
22228                    </field>
22229                    <field>
22230                        <name>GPIO4</name>
22231                        <bitRange>[4:4]</bitRange>
22232                        <access>read-only</access>
22233                    </field>
22234                    <field>
22235                        <name>GPIO3</name>
22236                        <bitRange>[3:3]</bitRange>
22237                        <access>read-only</access>
22238                    </field>
22239                    <field>
22240                        <name>GPIO2</name>
22241                        <bitRange>[2:2]</bitRange>
22242                        <access>read-only</access>
22243                    </field>
22244                    <field>
22245                        <name>GPIO1</name>
22246                        <bitRange>[1:1]</bitRange>
22247                        <access>read-only</access>
22248                    </field>
22249                    <field>
22250                        <name>GPIO0</name>
22251                        <bitRange>[0:0]</bitRange>
22252                        <access>read-only</access>
22253                    </field>
22254                </fields>
22255            </register>
22256            <register>
22257                <name>IRQSUMMARY_DORMANT_WAKE_SECURE1</name>
22258                <addressOffset>0x00000224</addressOffset>
22259                <resetValue>0x00000000</resetValue>
22260                <fields>
22261                    <field>
22262                        <name>GPIO47</name>
22263                        <bitRange>[15:15]</bitRange>
22264                        <access>read-only</access>
22265                    </field>
22266                    <field>
22267                        <name>GPIO46</name>
22268                        <bitRange>[14:14]</bitRange>
22269                        <access>read-only</access>
22270                    </field>
22271                    <field>
22272                        <name>GPIO45</name>
22273                        <bitRange>[13:13]</bitRange>
22274                        <access>read-only</access>
22275                    </field>
22276                    <field>
22277                        <name>GPIO44</name>
22278                        <bitRange>[12:12]</bitRange>
22279                        <access>read-only</access>
22280                    </field>
22281                    <field>
22282                        <name>GPIO43</name>
22283                        <bitRange>[11:11]</bitRange>
22284                        <access>read-only</access>
22285                    </field>
22286                    <field>
22287                        <name>GPIO42</name>
22288                        <bitRange>[10:10]</bitRange>
22289                        <access>read-only</access>
22290                    </field>
22291                    <field>
22292                        <name>GPIO41</name>
22293                        <bitRange>[9:9]</bitRange>
22294                        <access>read-only</access>
22295                    </field>
22296                    <field>
22297                        <name>GPIO40</name>
22298                        <bitRange>[8:8]</bitRange>
22299                        <access>read-only</access>
22300                    </field>
22301                    <field>
22302                        <name>GPIO39</name>
22303                        <bitRange>[7:7]</bitRange>
22304                        <access>read-only</access>
22305                    </field>
22306                    <field>
22307                        <name>GPIO38</name>
22308                        <bitRange>[6:6]</bitRange>
22309                        <access>read-only</access>
22310                    </field>
22311                    <field>
22312                        <name>GPIO37</name>
22313                        <bitRange>[5:5]</bitRange>
22314                        <access>read-only</access>
22315                    </field>
22316                    <field>
22317                        <name>GPIO36</name>
22318                        <bitRange>[4:4]</bitRange>
22319                        <access>read-only</access>
22320                    </field>
22321                    <field>
22322                        <name>GPIO35</name>
22323                        <bitRange>[3:3]</bitRange>
22324                        <access>read-only</access>
22325                    </field>
22326                    <field>
22327                        <name>GPIO34</name>
22328                        <bitRange>[2:2]</bitRange>
22329                        <access>read-only</access>
22330                    </field>
22331                    <field>
22332                        <name>GPIO33</name>
22333                        <bitRange>[1:1]</bitRange>
22334                        <access>read-only</access>
22335                    </field>
22336                    <field>
22337                        <name>GPIO32</name>
22338                        <bitRange>[0:0]</bitRange>
22339                        <access>read-only</access>
22340                    </field>
22341                </fields>
22342            </register>
22343            <register>
22344                <name>IRQSUMMARY_DORMANT_WAKE_NONSECURE0</name>
22345                <addressOffset>0x00000228</addressOffset>
22346                <resetValue>0x00000000</resetValue>
22347                <fields>
22348                    <field>
22349                        <name>GPIO31</name>
22350                        <bitRange>[31:31]</bitRange>
22351                        <access>read-only</access>
22352                    </field>
22353                    <field>
22354                        <name>GPIO30</name>
22355                        <bitRange>[30:30]</bitRange>
22356                        <access>read-only</access>
22357                    </field>
22358                    <field>
22359                        <name>GPIO29</name>
22360                        <bitRange>[29:29]</bitRange>
22361                        <access>read-only</access>
22362                    </field>
22363                    <field>
22364                        <name>GPIO28</name>
22365                        <bitRange>[28:28]</bitRange>
22366                        <access>read-only</access>
22367                    </field>
22368                    <field>
22369                        <name>GPIO27</name>
22370                        <bitRange>[27:27]</bitRange>
22371                        <access>read-only</access>
22372                    </field>
22373                    <field>
22374                        <name>GPIO26</name>
22375                        <bitRange>[26:26]</bitRange>
22376                        <access>read-only</access>
22377                    </field>
22378                    <field>
22379                        <name>GPIO25</name>
22380                        <bitRange>[25:25]</bitRange>
22381                        <access>read-only</access>
22382                    </field>
22383                    <field>
22384                        <name>GPIO24</name>
22385                        <bitRange>[24:24]</bitRange>
22386                        <access>read-only</access>
22387                    </field>
22388                    <field>
22389                        <name>GPIO23</name>
22390                        <bitRange>[23:23]</bitRange>
22391                        <access>read-only</access>
22392                    </field>
22393                    <field>
22394                        <name>GPIO22</name>
22395                        <bitRange>[22:22]</bitRange>
22396                        <access>read-only</access>
22397                    </field>
22398                    <field>
22399                        <name>GPIO21</name>
22400                        <bitRange>[21:21]</bitRange>
22401                        <access>read-only</access>
22402                    </field>
22403                    <field>
22404                        <name>GPIO20</name>
22405                        <bitRange>[20:20]</bitRange>
22406                        <access>read-only</access>
22407                    </field>
22408                    <field>
22409                        <name>GPIO19</name>
22410                        <bitRange>[19:19]</bitRange>
22411                        <access>read-only</access>
22412                    </field>
22413                    <field>
22414                        <name>GPIO18</name>
22415                        <bitRange>[18:18]</bitRange>
22416                        <access>read-only</access>
22417                    </field>
22418                    <field>
22419                        <name>GPIO17</name>
22420                        <bitRange>[17:17]</bitRange>
22421                        <access>read-only</access>
22422                    </field>
22423                    <field>
22424                        <name>GPIO16</name>
22425                        <bitRange>[16:16]</bitRange>
22426                        <access>read-only</access>
22427                    </field>
22428                    <field>
22429                        <name>GPIO15</name>
22430                        <bitRange>[15:15]</bitRange>
22431                        <access>read-only</access>
22432                    </field>
22433                    <field>
22434                        <name>GPIO14</name>
22435                        <bitRange>[14:14]</bitRange>
22436                        <access>read-only</access>
22437                    </field>
22438                    <field>
22439                        <name>GPIO13</name>
22440                        <bitRange>[13:13]</bitRange>
22441                        <access>read-only</access>
22442                    </field>
22443                    <field>
22444                        <name>GPIO12</name>
22445                        <bitRange>[12:12]</bitRange>
22446                        <access>read-only</access>
22447                    </field>
22448                    <field>
22449                        <name>GPIO11</name>
22450                        <bitRange>[11:11]</bitRange>
22451                        <access>read-only</access>
22452                    </field>
22453                    <field>
22454                        <name>GPIO10</name>
22455                        <bitRange>[10:10]</bitRange>
22456                        <access>read-only</access>
22457                    </field>
22458                    <field>
22459                        <name>GPIO9</name>
22460                        <bitRange>[9:9]</bitRange>
22461                        <access>read-only</access>
22462                    </field>
22463                    <field>
22464                        <name>GPIO8</name>
22465                        <bitRange>[8:8]</bitRange>
22466                        <access>read-only</access>
22467                    </field>
22468                    <field>
22469                        <name>GPIO7</name>
22470                        <bitRange>[7:7]</bitRange>
22471                        <access>read-only</access>
22472                    </field>
22473                    <field>
22474                        <name>GPIO6</name>
22475                        <bitRange>[6:6]</bitRange>
22476                        <access>read-only</access>
22477                    </field>
22478                    <field>
22479                        <name>GPIO5</name>
22480                        <bitRange>[5:5]</bitRange>
22481                        <access>read-only</access>
22482                    </field>
22483                    <field>
22484                        <name>GPIO4</name>
22485                        <bitRange>[4:4]</bitRange>
22486                        <access>read-only</access>
22487                    </field>
22488                    <field>
22489                        <name>GPIO3</name>
22490                        <bitRange>[3:3]</bitRange>
22491                        <access>read-only</access>
22492                    </field>
22493                    <field>
22494                        <name>GPIO2</name>
22495                        <bitRange>[2:2]</bitRange>
22496                        <access>read-only</access>
22497                    </field>
22498                    <field>
22499                        <name>GPIO1</name>
22500                        <bitRange>[1:1]</bitRange>
22501                        <access>read-only</access>
22502                    </field>
22503                    <field>
22504                        <name>GPIO0</name>
22505                        <bitRange>[0:0]</bitRange>
22506                        <access>read-only</access>
22507                    </field>
22508                </fields>
22509            </register>
22510            <register>
22511                <name>IRQSUMMARY_DORMANT_WAKE_NONSECURE1</name>
22512                <addressOffset>0x0000022c</addressOffset>
22513                <resetValue>0x00000000</resetValue>
22514                <fields>
22515                    <field>
22516                        <name>GPIO47</name>
22517                        <bitRange>[15:15]</bitRange>
22518                        <access>read-only</access>
22519                    </field>
22520                    <field>
22521                        <name>GPIO46</name>
22522                        <bitRange>[14:14]</bitRange>
22523                        <access>read-only</access>
22524                    </field>
22525                    <field>
22526                        <name>GPIO45</name>
22527                        <bitRange>[13:13]</bitRange>
22528                        <access>read-only</access>
22529                    </field>
22530                    <field>
22531                        <name>GPIO44</name>
22532                        <bitRange>[12:12]</bitRange>
22533                        <access>read-only</access>
22534                    </field>
22535                    <field>
22536                        <name>GPIO43</name>
22537                        <bitRange>[11:11]</bitRange>
22538                        <access>read-only</access>
22539                    </field>
22540                    <field>
22541                        <name>GPIO42</name>
22542                        <bitRange>[10:10]</bitRange>
22543                        <access>read-only</access>
22544                    </field>
22545                    <field>
22546                        <name>GPIO41</name>
22547                        <bitRange>[9:9]</bitRange>
22548                        <access>read-only</access>
22549                    </field>
22550                    <field>
22551                        <name>GPIO40</name>
22552                        <bitRange>[8:8]</bitRange>
22553                        <access>read-only</access>
22554                    </field>
22555                    <field>
22556                        <name>GPIO39</name>
22557                        <bitRange>[7:7]</bitRange>
22558                        <access>read-only</access>
22559                    </field>
22560                    <field>
22561                        <name>GPIO38</name>
22562                        <bitRange>[6:6]</bitRange>
22563                        <access>read-only</access>
22564                    </field>
22565                    <field>
22566                        <name>GPIO37</name>
22567                        <bitRange>[5:5]</bitRange>
22568                        <access>read-only</access>
22569                    </field>
22570                    <field>
22571                        <name>GPIO36</name>
22572                        <bitRange>[4:4]</bitRange>
22573                        <access>read-only</access>
22574                    </field>
22575                    <field>
22576                        <name>GPIO35</name>
22577                        <bitRange>[3:3]</bitRange>
22578                        <access>read-only</access>
22579                    </field>
22580                    <field>
22581                        <name>GPIO34</name>
22582                        <bitRange>[2:2]</bitRange>
22583                        <access>read-only</access>
22584                    </field>
22585                    <field>
22586                        <name>GPIO33</name>
22587                        <bitRange>[1:1]</bitRange>
22588                        <access>read-only</access>
22589                    </field>
22590                    <field>
22591                        <name>GPIO32</name>
22592                        <bitRange>[0:0]</bitRange>
22593                        <access>read-only</access>
22594                    </field>
22595                </fields>
22596            </register>
22597            <register>
22598                <name>INTR0</name>
22599                <addressOffset>0x00000230</addressOffset>
22600                <description>Raw Interrupts</description>
22601                <resetValue>0x00000000</resetValue>
22602                <fields>
22603                    <field>
22604                        <name>GPIO7_EDGE_HIGH</name>
22605                        <bitRange>[31:31]</bitRange>
22606                        <access>read-write</access>
22607                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22608                    </field>
22609                    <field>
22610                        <name>GPIO7_EDGE_LOW</name>
22611                        <bitRange>[30:30]</bitRange>
22612                        <access>read-write</access>
22613                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22614                    </field>
22615                    <field>
22616                        <name>GPIO7_LEVEL_HIGH</name>
22617                        <bitRange>[29:29]</bitRange>
22618                        <access>read-only</access>
22619                    </field>
22620                    <field>
22621                        <name>GPIO7_LEVEL_LOW</name>
22622                        <bitRange>[28:28]</bitRange>
22623                        <access>read-only</access>
22624                    </field>
22625                    <field>
22626                        <name>GPIO6_EDGE_HIGH</name>
22627                        <bitRange>[27:27]</bitRange>
22628                        <access>read-write</access>
22629                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22630                    </field>
22631                    <field>
22632                        <name>GPIO6_EDGE_LOW</name>
22633                        <bitRange>[26:26]</bitRange>
22634                        <access>read-write</access>
22635                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22636                    </field>
22637                    <field>
22638                        <name>GPIO6_LEVEL_HIGH</name>
22639                        <bitRange>[25:25]</bitRange>
22640                        <access>read-only</access>
22641                    </field>
22642                    <field>
22643                        <name>GPIO6_LEVEL_LOW</name>
22644                        <bitRange>[24:24]</bitRange>
22645                        <access>read-only</access>
22646                    </field>
22647                    <field>
22648                        <name>GPIO5_EDGE_HIGH</name>
22649                        <bitRange>[23:23]</bitRange>
22650                        <access>read-write</access>
22651                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22652                    </field>
22653                    <field>
22654                        <name>GPIO5_EDGE_LOW</name>
22655                        <bitRange>[22:22]</bitRange>
22656                        <access>read-write</access>
22657                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22658                    </field>
22659                    <field>
22660                        <name>GPIO5_LEVEL_HIGH</name>
22661                        <bitRange>[21:21]</bitRange>
22662                        <access>read-only</access>
22663                    </field>
22664                    <field>
22665                        <name>GPIO5_LEVEL_LOW</name>
22666                        <bitRange>[20:20]</bitRange>
22667                        <access>read-only</access>
22668                    </field>
22669                    <field>
22670                        <name>GPIO4_EDGE_HIGH</name>
22671                        <bitRange>[19:19]</bitRange>
22672                        <access>read-write</access>
22673                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22674                    </field>
22675                    <field>
22676                        <name>GPIO4_EDGE_LOW</name>
22677                        <bitRange>[18:18]</bitRange>
22678                        <access>read-write</access>
22679                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22680                    </field>
22681                    <field>
22682                        <name>GPIO4_LEVEL_HIGH</name>
22683                        <bitRange>[17:17]</bitRange>
22684                        <access>read-only</access>
22685                    </field>
22686                    <field>
22687                        <name>GPIO4_LEVEL_LOW</name>
22688                        <bitRange>[16:16]</bitRange>
22689                        <access>read-only</access>
22690                    </field>
22691                    <field>
22692                        <name>GPIO3_EDGE_HIGH</name>
22693                        <bitRange>[15:15]</bitRange>
22694                        <access>read-write</access>
22695                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22696                    </field>
22697                    <field>
22698                        <name>GPIO3_EDGE_LOW</name>
22699                        <bitRange>[14:14]</bitRange>
22700                        <access>read-write</access>
22701                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22702                    </field>
22703                    <field>
22704                        <name>GPIO3_LEVEL_HIGH</name>
22705                        <bitRange>[13:13]</bitRange>
22706                        <access>read-only</access>
22707                    </field>
22708                    <field>
22709                        <name>GPIO3_LEVEL_LOW</name>
22710                        <bitRange>[12:12]</bitRange>
22711                        <access>read-only</access>
22712                    </field>
22713                    <field>
22714                        <name>GPIO2_EDGE_HIGH</name>
22715                        <bitRange>[11:11]</bitRange>
22716                        <access>read-write</access>
22717                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22718                    </field>
22719                    <field>
22720                        <name>GPIO2_EDGE_LOW</name>
22721                        <bitRange>[10:10]</bitRange>
22722                        <access>read-write</access>
22723                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22724                    </field>
22725                    <field>
22726                        <name>GPIO2_LEVEL_HIGH</name>
22727                        <bitRange>[9:9]</bitRange>
22728                        <access>read-only</access>
22729                    </field>
22730                    <field>
22731                        <name>GPIO2_LEVEL_LOW</name>
22732                        <bitRange>[8:8]</bitRange>
22733                        <access>read-only</access>
22734                    </field>
22735                    <field>
22736                        <name>GPIO1_EDGE_HIGH</name>
22737                        <bitRange>[7:7]</bitRange>
22738                        <access>read-write</access>
22739                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22740                    </field>
22741                    <field>
22742                        <name>GPIO1_EDGE_LOW</name>
22743                        <bitRange>[6:6]</bitRange>
22744                        <access>read-write</access>
22745                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22746                    </field>
22747                    <field>
22748                        <name>GPIO1_LEVEL_HIGH</name>
22749                        <bitRange>[5:5]</bitRange>
22750                        <access>read-only</access>
22751                    </field>
22752                    <field>
22753                        <name>GPIO1_LEVEL_LOW</name>
22754                        <bitRange>[4:4]</bitRange>
22755                        <access>read-only</access>
22756                    </field>
22757                    <field>
22758                        <name>GPIO0_EDGE_HIGH</name>
22759                        <bitRange>[3:3]</bitRange>
22760                        <access>read-write</access>
22761                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22762                    </field>
22763                    <field>
22764                        <name>GPIO0_EDGE_LOW</name>
22765                        <bitRange>[2:2]</bitRange>
22766                        <access>read-write</access>
22767                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22768                    </field>
22769                    <field>
22770                        <name>GPIO0_LEVEL_HIGH</name>
22771                        <bitRange>[1:1]</bitRange>
22772                        <access>read-only</access>
22773                    </field>
22774                    <field>
22775                        <name>GPIO0_LEVEL_LOW</name>
22776                        <bitRange>[0:0]</bitRange>
22777                        <access>read-only</access>
22778                    </field>
22779                </fields>
22780            </register>
22781            <register>
22782                <name>INTR1</name>
22783                <addressOffset>0x00000234</addressOffset>
22784                <description>Raw Interrupts</description>
22785                <resetValue>0x00000000</resetValue>
22786                <fields>
22787                    <field>
22788                        <name>GPIO15_EDGE_HIGH</name>
22789                        <bitRange>[31:31]</bitRange>
22790                        <access>read-write</access>
22791                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22792                    </field>
22793                    <field>
22794                        <name>GPIO15_EDGE_LOW</name>
22795                        <bitRange>[30:30]</bitRange>
22796                        <access>read-write</access>
22797                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22798                    </field>
22799                    <field>
22800                        <name>GPIO15_LEVEL_HIGH</name>
22801                        <bitRange>[29:29]</bitRange>
22802                        <access>read-only</access>
22803                    </field>
22804                    <field>
22805                        <name>GPIO15_LEVEL_LOW</name>
22806                        <bitRange>[28:28]</bitRange>
22807                        <access>read-only</access>
22808                    </field>
22809                    <field>
22810                        <name>GPIO14_EDGE_HIGH</name>
22811                        <bitRange>[27:27]</bitRange>
22812                        <access>read-write</access>
22813                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22814                    </field>
22815                    <field>
22816                        <name>GPIO14_EDGE_LOW</name>
22817                        <bitRange>[26:26]</bitRange>
22818                        <access>read-write</access>
22819                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22820                    </field>
22821                    <field>
22822                        <name>GPIO14_LEVEL_HIGH</name>
22823                        <bitRange>[25:25]</bitRange>
22824                        <access>read-only</access>
22825                    </field>
22826                    <field>
22827                        <name>GPIO14_LEVEL_LOW</name>
22828                        <bitRange>[24:24]</bitRange>
22829                        <access>read-only</access>
22830                    </field>
22831                    <field>
22832                        <name>GPIO13_EDGE_HIGH</name>
22833                        <bitRange>[23:23]</bitRange>
22834                        <access>read-write</access>
22835                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22836                    </field>
22837                    <field>
22838                        <name>GPIO13_EDGE_LOW</name>
22839                        <bitRange>[22:22]</bitRange>
22840                        <access>read-write</access>
22841                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22842                    </field>
22843                    <field>
22844                        <name>GPIO13_LEVEL_HIGH</name>
22845                        <bitRange>[21:21]</bitRange>
22846                        <access>read-only</access>
22847                    </field>
22848                    <field>
22849                        <name>GPIO13_LEVEL_LOW</name>
22850                        <bitRange>[20:20]</bitRange>
22851                        <access>read-only</access>
22852                    </field>
22853                    <field>
22854                        <name>GPIO12_EDGE_HIGH</name>
22855                        <bitRange>[19:19]</bitRange>
22856                        <access>read-write</access>
22857                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22858                    </field>
22859                    <field>
22860                        <name>GPIO12_EDGE_LOW</name>
22861                        <bitRange>[18:18]</bitRange>
22862                        <access>read-write</access>
22863                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22864                    </field>
22865                    <field>
22866                        <name>GPIO12_LEVEL_HIGH</name>
22867                        <bitRange>[17:17]</bitRange>
22868                        <access>read-only</access>
22869                    </field>
22870                    <field>
22871                        <name>GPIO12_LEVEL_LOW</name>
22872                        <bitRange>[16:16]</bitRange>
22873                        <access>read-only</access>
22874                    </field>
22875                    <field>
22876                        <name>GPIO11_EDGE_HIGH</name>
22877                        <bitRange>[15:15]</bitRange>
22878                        <access>read-write</access>
22879                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22880                    </field>
22881                    <field>
22882                        <name>GPIO11_EDGE_LOW</name>
22883                        <bitRange>[14:14]</bitRange>
22884                        <access>read-write</access>
22885                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22886                    </field>
22887                    <field>
22888                        <name>GPIO11_LEVEL_HIGH</name>
22889                        <bitRange>[13:13]</bitRange>
22890                        <access>read-only</access>
22891                    </field>
22892                    <field>
22893                        <name>GPIO11_LEVEL_LOW</name>
22894                        <bitRange>[12:12]</bitRange>
22895                        <access>read-only</access>
22896                    </field>
22897                    <field>
22898                        <name>GPIO10_EDGE_HIGH</name>
22899                        <bitRange>[11:11]</bitRange>
22900                        <access>read-write</access>
22901                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22902                    </field>
22903                    <field>
22904                        <name>GPIO10_EDGE_LOW</name>
22905                        <bitRange>[10:10]</bitRange>
22906                        <access>read-write</access>
22907                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22908                    </field>
22909                    <field>
22910                        <name>GPIO10_LEVEL_HIGH</name>
22911                        <bitRange>[9:9]</bitRange>
22912                        <access>read-only</access>
22913                    </field>
22914                    <field>
22915                        <name>GPIO10_LEVEL_LOW</name>
22916                        <bitRange>[8:8]</bitRange>
22917                        <access>read-only</access>
22918                    </field>
22919                    <field>
22920                        <name>GPIO9_EDGE_HIGH</name>
22921                        <bitRange>[7:7]</bitRange>
22922                        <access>read-write</access>
22923                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22924                    </field>
22925                    <field>
22926                        <name>GPIO9_EDGE_LOW</name>
22927                        <bitRange>[6:6]</bitRange>
22928                        <access>read-write</access>
22929                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22930                    </field>
22931                    <field>
22932                        <name>GPIO9_LEVEL_HIGH</name>
22933                        <bitRange>[5:5]</bitRange>
22934                        <access>read-only</access>
22935                    </field>
22936                    <field>
22937                        <name>GPIO9_LEVEL_LOW</name>
22938                        <bitRange>[4:4]</bitRange>
22939                        <access>read-only</access>
22940                    </field>
22941                    <field>
22942                        <name>GPIO8_EDGE_HIGH</name>
22943                        <bitRange>[3:3]</bitRange>
22944                        <access>read-write</access>
22945                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22946                    </field>
22947                    <field>
22948                        <name>GPIO8_EDGE_LOW</name>
22949                        <bitRange>[2:2]</bitRange>
22950                        <access>read-write</access>
22951                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22952                    </field>
22953                    <field>
22954                        <name>GPIO8_LEVEL_HIGH</name>
22955                        <bitRange>[1:1]</bitRange>
22956                        <access>read-only</access>
22957                    </field>
22958                    <field>
22959                        <name>GPIO8_LEVEL_LOW</name>
22960                        <bitRange>[0:0]</bitRange>
22961                        <access>read-only</access>
22962                    </field>
22963                </fields>
22964            </register>
22965            <register>
22966                <name>INTR2</name>
22967                <addressOffset>0x00000238</addressOffset>
22968                <description>Raw Interrupts</description>
22969                <resetValue>0x00000000</resetValue>
22970                <fields>
22971                    <field>
22972                        <name>GPIO23_EDGE_HIGH</name>
22973                        <bitRange>[31:31]</bitRange>
22974                        <access>read-write</access>
22975                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22976                    </field>
22977                    <field>
22978                        <name>GPIO23_EDGE_LOW</name>
22979                        <bitRange>[30:30]</bitRange>
22980                        <access>read-write</access>
22981                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22982                    </field>
22983                    <field>
22984                        <name>GPIO23_LEVEL_HIGH</name>
22985                        <bitRange>[29:29]</bitRange>
22986                        <access>read-only</access>
22987                    </field>
22988                    <field>
22989                        <name>GPIO23_LEVEL_LOW</name>
22990                        <bitRange>[28:28]</bitRange>
22991                        <access>read-only</access>
22992                    </field>
22993                    <field>
22994                        <name>GPIO22_EDGE_HIGH</name>
22995                        <bitRange>[27:27]</bitRange>
22996                        <access>read-write</access>
22997                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
22998                    </field>
22999                    <field>
23000                        <name>GPIO22_EDGE_LOW</name>
23001                        <bitRange>[26:26]</bitRange>
23002                        <access>read-write</access>
23003                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23004                    </field>
23005                    <field>
23006                        <name>GPIO22_LEVEL_HIGH</name>
23007                        <bitRange>[25:25]</bitRange>
23008                        <access>read-only</access>
23009                    </field>
23010                    <field>
23011                        <name>GPIO22_LEVEL_LOW</name>
23012                        <bitRange>[24:24]</bitRange>
23013                        <access>read-only</access>
23014                    </field>
23015                    <field>
23016                        <name>GPIO21_EDGE_HIGH</name>
23017                        <bitRange>[23:23]</bitRange>
23018                        <access>read-write</access>
23019                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23020                    </field>
23021                    <field>
23022                        <name>GPIO21_EDGE_LOW</name>
23023                        <bitRange>[22:22]</bitRange>
23024                        <access>read-write</access>
23025                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23026                    </field>
23027                    <field>
23028                        <name>GPIO21_LEVEL_HIGH</name>
23029                        <bitRange>[21:21]</bitRange>
23030                        <access>read-only</access>
23031                    </field>
23032                    <field>
23033                        <name>GPIO21_LEVEL_LOW</name>
23034                        <bitRange>[20:20]</bitRange>
23035                        <access>read-only</access>
23036                    </field>
23037                    <field>
23038                        <name>GPIO20_EDGE_HIGH</name>
23039                        <bitRange>[19:19]</bitRange>
23040                        <access>read-write</access>
23041                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23042                    </field>
23043                    <field>
23044                        <name>GPIO20_EDGE_LOW</name>
23045                        <bitRange>[18:18]</bitRange>
23046                        <access>read-write</access>
23047                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23048                    </field>
23049                    <field>
23050                        <name>GPIO20_LEVEL_HIGH</name>
23051                        <bitRange>[17:17]</bitRange>
23052                        <access>read-only</access>
23053                    </field>
23054                    <field>
23055                        <name>GPIO20_LEVEL_LOW</name>
23056                        <bitRange>[16:16]</bitRange>
23057                        <access>read-only</access>
23058                    </field>
23059                    <field>
23060                        <name>GPIO19_EDGE_HIGH</name>
23061                        <bitRange>[15:15]</bitRange>
23062                        <access>read-write</access>
23063                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23064                    </field>
23065                    <field>
23066                        <name>GPIO19_EDGE_LOW</name>
23067                        <bitRange>[14:14]</bitRange>
23068                        <access>read-write</access>
23069                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23070                    </field>
23071                    <field>
23072                        <name>GPIO19_LEVEL_HIGH</name>
23073                        <bitRange>[13:13]</bitRange>
23074                        <access>read-only</access>
23075                    </field>
23076                    <field>
23077                        <name>GPIO19_LEVEL_LOW</name>
23078                        <bitRange>[12:12]</bitRange>
23079                        <access>read-only</access>
23080                    </field>
23081                    <field>
23082                        <name>GPIO18_EDGE_HIGH</name>
23083                        <bitRange>[11:11]</bitRange>
23084                        <access>read-write</access>
23085                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23086                    </field>
23087                    <field>
23088                        <name>GPIO18_EDGE_LOW</name>
23089                        <bitRange>[10:10]</bitRange>
23090                        <access>read-write</access>
23091                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23092                    </field>
23093                    <field>
23094                        <name>GPIO18_LEVEL_HIGH</name>
23095                        <bitRange>[9:9]</bitRange>
23096                        <access>read-only</access>
23097                    </field>
23098                    <field>
23099                        <name>GPIO18_LEVEL_LOW</name>
23100                        <bitRange>[8:8]</bitRange>
23101                        <access>read-only</access>
23102                    </field>
23103                    <field>
23104                        <name>GPIO17_EDGE_HIGH</name>
23105                        <bitRange>[7:7]</bitRange>
23106                        <access>read-write</access>
23107                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23108                    </field>
23109                    <field>
23110                        <name>GPIO17_EDGE_LOW</name>
23111                        <bitRange>[6:6]</bitRange>
23112                        <access>read-write</access>
23113                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23114                    </field>
23115                    <field>
23116                        <name>GPIO17_LEVEL_HIGH</name>
23117                        <bitRange>[5:5]</bitRange>
23118                        <access>read-only</access>
23119                    </field>
23120                    <field>
23121                        <name>GPIO17_LEVEL_LOW</name>
23122                        <bitRange>[4:4]</bitRange>
23123                        <access>read-only</access>
23124                    </field>
23125                    <field>
23126                        <name>GPIO16_EDGE_HIGH</name>
23127                        <bitRange>[3:3]</bitRange>
23128                        <access>read-write</access>
23129                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23130                    </field>
23131                    <field>
23132                        <name>GPIO16_EDGE_LOW</name>
23133                        <bitRange>[2:2]</bitRange>
23134                        <access>read-write</access>
23135                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23136                    </field>
23137                    <field>
23138                        <name>GPIO16_LEVEL_HIGH</name>
23139                        <bitRange>[1:1]</bitRange>
23140                        <access>read-only</access>
23141                    </field>
23142                    <field>
23143                        <name>GPIO16_LEVEL_LOW</name>
23144                        <bitRange>[0:0]</bitRange>
23145                        <access>read-only</access>
23146                    </field>
23147                </fields>
23148            </register>
23149            <register>
23150                <name>INTR3</name>
23151                <addressOffset>0x0000023c</addressOffset>
23152                <description>Raw Interrupts</description>
23153                <resetValue>0x00000000</resetValue>
23154                <fields>
23155                    <field>
23156                        <name>GPIO31_EDGE_HIGH</name>
23157                        <bitRange>[31:31]</bitRange>
23158                        <access>read-write</access>
23159                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23160                    </field>
23161                    <field>
23162                        <name>GPIO31_EDGE_LOW</name>
23163                        <bitRange>[30:30]</bitRange>
23164                        <access>read-write</access>
23165                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23166                    </field>
23167                    <field>
23168                        <name>GPIO31_LEVEL_HIGH</name>
23169                        <bitRange>[29:29]</bitRange>
23170                        <access>read-only</access>
23171                    </field>
23172                    <field>
23173                        <name>GPIO31_LEVEL_LOW</name>
23174                        <bitRange>[28:28]</bitRange>
23175                        <access>read-only</access>
23176                    </field>
23177                    <field>
23178                        <name>GPIO30_EDGE_HIGH</name>
23179                        <bitRange>[27:27]</bitRange>
23180                        <access>read-write</access>
23181                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23182                    </field>
23183                    <field>
23184                        <name>GPIO30_EDGE_LOW</name>
23185                        <bitRange>[26:26]</bitRange>
23186                        <access>read-write</access>
23187                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23188                    </field>
23189                    <field>
23190                        <name>GPIO30_LEVEL_HIGH</name>
23191                        <bitRange>[25:25]</bitRange>
23192                        <access>read-only</access>
23193                    </field>
23194                    <field>
23195                        <name>GPIO30_LEVEL_LOW</name>
23196                        <bitRange>[24:24]</bitRange>
23197                        <access>read-only</access>
23198                    </field>
23199                    <field>
23200                        <name>GPIO29_EDGE_HIGH</name>
23201                        <bitRange>[23:23]</bitRange>
23202                        <access>read-write</access>
23203                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23204                    </field>
23205                    <field>
23206                        <name>GPIO29_EDGE_LOW</name>
23207                        <bitRange>[22:22]</bitRange>
23208                        <access>read-write</access>
23209                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23210                    </field>
23211                    <field>
23212                        <name>GPIO29_LEVEL_HIGH</name>
23213                        <bitRange>[21:21]</bitRange>
23214                        <access>read-only</access>
23215                    </field>
23216                    <field>
23217                        <name>GPIO29_LEVEL_LOW</name>
23218                        <bitRange>[20:20]</bitRange>
23219                        <access>read-only</access>
23220                    </field>
23221                    <field>
23222                        <name>GPIO28_EDGE_HIGH</name>
23223                        <bitRange>[19:19]</bitRange>
23224                        <access>read-write</access>
23225                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23226                    </field>
23227                    <field>
23228                        <name>GPIO28_EDGE_LOW</name>
23229                        <bitRange>[18:18]</bitRange>
23230                        <access>read-write</access>
23231                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23232                    </field>
23233                    <field>
23234                        <name>GPIO28_LEVEL_HIGH</name>
23235                        <bitRange>[17:17]</bitRange>
23236                        <access>read-only</access>
23237                    </field>
23238                    <field>
23239                        <name>GPIO28_LEVEL_LOW</name>
23240                        <bitRange>[16:16]</bitRange>
23241                        <access>read-only</access>
23242                    </field>
23243                    <field>
23244                        <name>GPIO27_EDGE_HIGH</name>
23245                        <bitRange>[15:15]</bitRange>
23246                        <access>read-write</access>
23247                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23248                    </field>
23249                    <field>
23250                        <name>GPIO27_EDGE_LOW</name>
23251                        <bitRange>[14:14]</bitRange>
23252                        <access>read-write</access>
23253                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23254                    </field>
23255                    <field>
23256                        <name>GPIO27_LEVEL_HIGH</name>
23257                        <bitRange>[13:13]</bitRange>
23258                        <access>read-only</access>
23259                    </field>
23260                    <field>
23261                        <name>GPIO27_LEVEL_LOW</name>
23262                        <bitRange>[12:12]</bitRange>
23263                        <access>read-only</access>
23264                    </field>
23265                    <field>
23266                        <name>GPIO26_EDGE_HIGH</name>
23267                        <bitRange>[11:11]</bitRange>
23268                        <access>read-write</access>
23269                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23270                    </field>
23271                    <field>
23272                        <name>GPIO26_EDGE_LOW</name>
23273                        <bitRange>[10:10]</bitRange>
23274                        <access>read-write</access>
23275                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23276                    </field>
23277                    <field>
23278                        <name>GPIO26_LEVEL_HIGH</name>
23279                        <bitRange>[9:9]</bitRange>
23280                        <access>read-only</access>
23281                    </field>
23282                    <field>
23283                        <name>GPIO26_LEVEL_LOW</name>
23284                        <bitRange>[8:8]</bitRange>
23285                        <access>read-only</access>
23286                    </field>
23287                    <field>
23288                        <name>GPIO25_EDGE_HIGH</name>
23289                        <bitRange>[7:7]</bitRange>
23290                        <access>read-write</access>
23291                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23292                    </field>
23293                    <field>
23294                        <name>GPIO25_EDGE_LOW</name>
23295                        <bitRange>[6:6]</bitRange>
23296                        <access>read-write</access>
23297                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23298                    </field>
23299                    <field>
23300                        <name>GPIO25_LEVEL_HIGH</name>
23301                        <bitRange>[5:5]</bitRange>
23302                        <access>read-only</access>
23303                    </field>
23304                    <field>
23305                        <name>GPIO25_LEVEL_LOW</name>
23306                        <bitRange>[4:4]</bitRange>
23307                        <access>read-only</access>
23308                    </field>
23309                    <field>
23310                        <name>GPIO24_EDGE_HIGH</name>
23311                        <bitRange>[3:3]</bitRange>
23312                        <access>read-write</access>
23313                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23314                    </field>
23315                    <field>
23316                        <name>GPIO24_EDGE_LOW</name>
23317                        <bitRange>[2:2]</bitRange>
23318                        <access>read-write</access>
23319                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23320                    </field>
23321                    <field>
23322                        <name>GPIO24_LEVEL_HIGH</name>
23323                        <bitRange>[1:1]</bitRange>
23324                        <access>read-only</access>
23325                    </field>
23326                    <field>
23327                        <name>GPIO24_LEVEL_LOW</name>
23328                        <bitRange>[0:0]</bitRange>
23329                        <access>read-only</access>
23330                    </field>
23331                </fields>
23332            </register>
23333            <register>
23334                <name>INTR4</name>
23335                <addressOffset>0x00000240</addressOffset>
23336                <description>Raw Interrupts</description>
23337                <resetValue>0x00000000</resetValue>
23338                <fields>
23339                    <field>
23340                        <name>GPIO39_EDGE_HIGH</name>
23341                        <bitRange>[31:31]</bitRange>
23342                        <access>read-write</access>
23343                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23344                    </field>
23345                    <field>
23346                        <name>GPIO39_EDGE_LOW</name>
23347                        <bitRange>[30:30]</bitRange>
23348                        <access>read-write</access>
23349                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23350                    </field>
23351                    <field>
23352                        <name>GPIO39_LEVEL_HIGH</name>
23353                        <bitRange>[29:29]</bitRange>
23354                        <access>read-only</access>
23355                    </field>
23356                    <field>
23357                        <name>GPIO39_LEVEL_LOW</name>
23358                        <bitRange>[28:28]</bitRange>
23359                        <access>read-only</access>
23360                    </field>
23361                    <field>
23362                        <name>GPIO38_EDGE_HIGH</name>
23363                        <bitRange>[27:27]</bitRange>
23364                        <access>read-write</access>
23365                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23366                    </field>
23367                    <field>
23368                        <name>GPIO38_EDGE_LOW</name>
23369                        <bitRange>[26:26]</bitRange>
23370                        <access>read-write</access>
23371                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23372                    </field>
23373                    <field>
23374                        <name>GPIO38_LEVEL_HIGH</name>
23375                        <bitRange>[25:25]</bitRange>
23376                        <access>read-only</access>
23377                    </field>
23378                    <field>
23379                        <name>GPIO38_LEVEL_LOW</name>
23380                        <bitRange>[24:24]</bitRange>
23381                        <access>read-only</access>
23382                    </field>
23383                    <field>
23384                        <name>GPIO37_EDGE_HIGH</name>
23385                        <bitRange>[23:23]</bitRange>
23386                        <access>read-write</access>
23387                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23388                    </field>
23389                    <field>
23390                        <name>GPIO37_EDGE_LOW</name>
23391                        <bitRange>[22:22]</bitRange>
23392                        <access>read-write</access>
23393                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23394                    </field>
23395                    <field>
23396                        <name>GPIO37_LEVEL_HIGH</name>
23397                        <bitRange>[21:21]</bitRange>
23398                        <access>read-only</access>
23399                    </field>
23400                    <field>
23401                        <name>GPIO37_LEVEL_LOW</name>
23402                        <bitRange>[20:20]</bitRange>
23403                        <access>read-only</access>
23404                    </field>
23405                    <field>
23406                        <name>GPIO36_EDGE_HIGH</name>
23407                        <bitRange>[19:19]</bitRange>
23408                        <access>read-write</access>
23409                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23410                    </field>
23411                    <field>
23412                        <name>GPIO36_EDGE_LOW</name>
23413                        <bitRange>[18:18]</bitRange>
23414                        <access>read-write</access>
23415                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23416                    </field>
23417                    <field>
23418                        <name>GPIO36_LEVEL_HIGH</name>
23419                        <bitRange>[17:17]</bitRange>
23420                        <access>read-only</access>
23421                    </field>
23422                    <field>
23423                        <name>GPIO36_LEVEL_LOW</name>
23424                        <bitRange>[16:16]</bitRange>
23425                        <access>read-only</access>
23426                    </field>
23427                    <field>
23428                        <name>GPIO35_EDGE_HIGH</name>
23429                        <bitRange>[15:15]</bitRange>
23430                        <access>read-write</access>
23431                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23432                    </field>
23433                    <field>
23434                        <name>GPIO35_EDGE_LOW</name>
23435                        <bitRange>[14:14]</bitRange>
23436                        <access>read-write</access>
23437                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23438                    </field>
23439                    <field>
23440                        <name>GPIO35_LEVEL_HIGH</name>
23441                        <bitRange>[13:13]</bitRange>
23442                        <access>read-only</access>
23443                    </field>
23444                    <field>
23445                        <name>GPIO35_LEVEL_LOW</name>
23446                        <bitRange>[12:12]</bitRange>
23447                        <access>read-only</access>
23448                    </field>
23449                    <field>
23450                        <name>GPIO34_EDGE_HIGH</name>
23451                        <bitRange>[11:11]</bitRange>
23452                        <access>read-write</access>
23453                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23454                    </field>
23455                    <field>
23456                        <name>GPIO34_EDGE_LOW</name>
23457                        <bitRange>[10:10]</bitRange>
23458                        <access>read-write</access>
23459                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23460                    </field>
23461                    <field>
23462                        <name>GPIO34_LEVEL_HIGH</name>
23463                        <bitRange>[9:9]</bitRange>
23464                        <access>read-only</access>
23465                    </field>
23466                    <field>
23467                        <name>GPIO34_LEVEL_LOW</name>
23468                        <bitRange>[8:8]</bitRange>
23469                        <access>read-only</access>
23470                    </field>
23471                    <field>
23472                        <name>GPIO33_EDGE_HIGH</name>
23473                        <bitRange>[7:7]</bitRange>
23474                        <access>read-write</access>
23475                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23476                    </field>
23477                    <field>
23478                        <name>GPIO33_EDGE_LOW</name>
23479                        <bitRange>[6:6]</bitRange>
23480                        <access>read-write</access>
23481                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23482                    </field>
23483                    <field>
23484                        <name>GPIO33_LEVEL_HIGH</name>
23485                        <bitRange>[5:5]</bitRange>
23486                        <access>read-only</access>
23487                    </field>
23488                    <field>
23489                        <name>GPIO33_LEVEL_LOW</name>
23490                        <bitRange>[4:4]</bitRange>
23491                        <access>read-only</access>
23492                    </field>
23493                    <field>
23494                        <name>GPIO32_EDGE_HIGH</name>
23495                        <bitRange>[3:3]</bitRange>
23496                        <access>read-write</access>
23497                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23498                    </field>
23499                    <field>
23500                        <name>GPIO32_EDGE_LOW</name>
23501                        <bitRange>[2:2]</bitRange>
23502                        <access>read-write</access>
23503                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23504                    </field>
23505                    <field>
23506                        <name>GPIO32_LEVEL_HIGH</name>
23507                        <bitRange>[1:1]</bitRange>
23508                        <access>read-only</access>
23509                    </field>
23510                    <field>
23511                        <name>GPIO32_LEVEL_LOW</name>
23512                        <bitRange>[0:0]</bitRange>
23513                        <access>read-only</access>
23514                    </field>
23515                </fields>
23516            </register>
23517            <register>
23518                <name>INTR5</name>
23519                <addressOffset>0x00000244</addressOffset>
23520                <description>Raw Interrupts</description>
23521                <resetValue>0x00000000</resetValue>
23522                <fields>
23523                    <field>
23524                        <name>GPIO47_EDGE_HIGH</name>
23525                        <bitRange>[31:31]</bitRange>
23526                        <access>read-write</access>
23527                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23528                    </field>
23529                    <field>
23530                        <name>GPIO47_EDGE_LOW</name>
23531                        <bitRange>[30:30]</bitRange>
23532                        <access>read-write</access>
23533                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23534                    </field>
23535                    <field>
23536                        <name>GPIO47_LEVEL_HIGH</name>
23537                        <bitRange>[29:29]</bitRange>
23538                        <access>read-only</access>
23539                    </field>
23540                    <field>
23541                        <name>GPIO47_LEVEL_LOW</name>
23542                        <bitRange>[28:28]</bitRange>
23543                        <access>read-only</access>
23544                    </field>
23545                    <field>
23546                        <name>GPIO46_EDGE_HIGH</name>
23547                        <bitRange>[27:27]</bitRange>
23548                        <access>read-write</access>
23549                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23550                    </field>
23551                    <field>
23552                        <name>GPIO46_EDGE_LOW</name>
23553                        <bitRange>[26:26]</bitRange>
23554                        <access>read-write</access>
23555                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23556                    </field>
23557                    <field>
23558                        <name>GPIO46_LEVEL_HIGH</name>
23559                        <bitRange>[25:25]</bitRange>
23560                        <access>read-only</access>
23561                    </field>
23562                    <field>
23563                        <name>GPIO46_LEVEL_LOW</name>
23564                        <bitRange>[24:24]</bitRange>
23565                        <access>read-only</access>
23566                    </field>
23567                    <field>
23568                        <name>GPIO45_EDGE_HIGH</name>
23569                        <bitRange>[23:23]</bitRange>
23570                        <access>read-write</access>
23571                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23572                    </field>
23573                    <field>
23574                        <name>GPIO45_EDGE_LOW</name>
23575                        <bitRange>[22:22]</bitRange>
23576                        <access>read-write</access>
23577                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23578                    </field>
23579                    <field>
23580                        <name>GPIO45_LEVEL_HIGH</name>
23581                        <bitRange>[21:21]</bitRange>
23582                        <access>read-only</access>
23583                    </field>
23584                    <field>
23585                        <name>GPIO45_LEVEL_LOW</name>
23586                        <bitRange>[20:20]</bitRange>
23587                        <access>read-only</access>
23588                    </field>
23589                    <field>
23590                        <name>GPIO44_EDGE_HIGH</name>
23591                        <bitRange>[19:19]</bitRange>
23592                        <access>read-write</access>
23593                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23594                    </field>
23595                    <field>
23596                        <name>GPIO44_EDGE_LOW</name>
23597                        <bitRange>[18:18]</bitRange>
23598                        <access>read-write</access>
23599                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23600                    </field>
23601                    <field>
23602                        <name>GPIO44_LEVEL_HIGH</name>
23603                        <bitRange>[17:17]</bitRange>
23604                        <access>read-only</access>
23605                    </field>
23606                    <field>
23607                        <name>GPIO44_LEVEL_LOW</name>
23608                        <bitRange>[16:16]</bitRange>
23609                        <access>read-only</access>
23610                    </field>
23611                    <field>
23612                        <name>GPIO43_EDGE_HIGH</name>
23613                        <bitRange>[15:15]</bitRange>
23614                        <access>read-write</access>
23615                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23616                    </field>
23617                    <field>
23618                        <name>GPIO43_EDGE_LOW</name>
23619                        <bitRange>[14:14]</bitRange>
23620                        <access>read-write</access>
23621                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23622                    </field>
23623                    <field>
23624                        <name>GPIO43_LEVEL_HIGH</name>
23625                        <bitRange>[13:13]</bitRange>
23626                        <access>read-only</access>
23627                    </field>
23628                    <field>
23629                        <name>GPIO43_LEVEL_LOW</name>
23630                        <bitRange>[12:12]</bitRange>
23631                        <access>read-only</access>
23632                    </field>
23633                    <field>
23634                        <name>GPIO42_EDGE_HIGH</name>
23635                        <bitRange>[11:11]</bitRange>
23636                        <access>read-write</access>
23637                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23638                    </field>
23639                    <field>
23640                        <name>GPIO42_EDGE_LOW</name>
23641                        <bitRange>[10:10]</bitRange>
23642                        <access>read-write</access>
23643                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23644                    </field>
23645                    <field>
23646                        <name>GPIO42_LEVEL_HIGH</name>
23647                        <bitRange>[9:9]</bitRange>
23648                        <access>read-only</access>
23649                    </field>
23650                    <field>
23651                        <name>GPIO42_LEVEL_LOW</name>
23652                        <bitRange>[8:8]</bitRange>
23653                        <access>read-only</access>
23654                    </field>
23655                    <field>
23656                        <name>GPIO41_EDGE_HIGH</name>
23657                        <bitRange>[7:7]</bitRange>
23658                        <access>read-write</access>
23659                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23660                    </field>
23661                    <field>
23662                        <name>GPIO41_EDGE_LOW</name>
23663                        <bitRange>[6:6]</bitRange>
23664                        <access>read-write</access>
23665                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23666                    </field>
23667                    <field>
23668                        <name>GPIO41_LEVEL_HIGH</name>
23669                        <bitRange>[5:5]</bitRange>
23670                        <access>read-only</access>
23671                    </field>
23672                    <field>
23673                        <name>GPIO41_LEVEL_LOW</name>
23674                        <bitRange>[4:4]</bitRange>
23675                        <access>read-only</access>
23676                    </field>
23677                    <field>
23678                        <name>GPIO40_EDGE_HIGH</name>
23679                        <bitRange>[3:3]</bitRange>
23680                        <access>read-write</access>
23681                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23682                    </field>
23683                    <field>
23684                        <name>GPIO40_EDGE_LOW</name>
23685                        <bitRange>[2:2]</bitRange>
23686                        <access>read-write</access>
23687                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
23688                    </field>
23689                    <field>
23690                        <name>GPIO40_LEVEL_HIGH</name>
23691                        <bitRange>[1:1]</bitRange>
23692                        <access>read-only</access>
23693                    </field>
23694                    <field>
23695                        <name>GPIO40_LEVEL_LOW</name>
23696                        <bitRange>[0:0]</bitRange>
23697                        <access>read-only</access>
23698                    </field>
23699                </fields>
23700            </register>
23701            <register>
23702                <name>PROC0_INTE0</name>
23703                <addressOffset>0x00000248</addressOffset>
23704                <description>Interrupt Enable for proc0</description>
23705                <resetValue>0x00000000</resetValue>
23706                <fields>
23707                    <field>
23708                        <name>GPIO7_EDGE_HIGH</name>
23709                        <bitRange>[31:31]</bitRange>
23710                        <access>read-write</access>
23711                    </field>
23712                    <field>
23713                        <name>GPIO7_EDGE_LOW</name>
23714                        <bitRange>[30:30]</bitRange>
23715                        <access>read-write</access>
23716                    </field>
23717                    <field>
23718                        <name>GPIO7_LEVEL_HIGH</name>
23719                        <bitRange>[29:29]</bitRange>
23720                        <access>read-write</access>
23721                    </field>
23722                    <field>
23723                        <name>GPIO7_LEVEL_LOW</name>
23724                        <bitRange>[28:28]</bitRange>
23725                        <access>read-write</access>
23726                    </field>
23727                    <field>
23728                        <name>GPIO6_EDGE_HIGH</name>
23729                        <bitRange>[27:27]</bitRange>
23730                        <access>read-write</access>
23731                    </field>
23732                    <field>
23733                        <name>GPIO6_EDGE_LOW</name>
23734                        <bitRange>[26:26]</bitRange>
23735                        <access>read-write</access>
23736                    </field>
23737                    <field>
23738                        <name>GPIO6_LEVEL_HIGH</name>
23739                        <bitRange>[25:25]</bitRange>
23740                        <access>read-write</access>
23741                    </field>
23742                    <field>
23743                        <name>GPIO6_LEVEL_LOW</name>
23744                        <bitRange>[24:24]</bitRange>
23745                        <access>read-write</access>
23746                    </field>
23747                    <field>
23748                        <name>GPIO5_EDGE_HIGH</name>
23749                        <bitRange>[23:23]</bitRange>
23750                        <access>read-write</access>
23751                    </field>
23752                    <field>
23753                        <name>GPIO5_EDGE_LOW</name>
23754                        <bitRange>[22:22]</bitRange>
23755                        <access>read-write</access>
23756                    </field>
23757                    <field>
23758                        <name>GPIO5_LEVEL_HIGH</name>
23759                        <bitRange>[21:21]</bitRange>
23760                        <access>read-write</access>
23761                    </field>
23762                    <field>
23763                        <name>GPIO5_LEVEL_LOW</name>
23764                        <bitRange>[20:20]</bitRange>
23765                        <access>read-write</access>
23766                    </field>
23767                    <field>
23768                        <name>GPIO4_EDGE_HIGH</name>
23769                        <bitRange>[19:19]</bitRange>
23770                        <access>read-write</access>
23771                    </field>
23772                    <field>
23773                        <name>GPIO4_EDGE_LOW</name>
23774                        <bitRange>[18:18]</bitRange>
23775                        <access>read-write</access>
23776                    </field>
23777                    <field>
23778                        <name>GPIO4_LEVEL_HIGH</name>
23779                        <bitRange>[17:17]</bitRange>
23780                        <access>read-write</access>
23781                    </field>
23782                    <field>
23783                        <name>GPIO4_LEVEL_LOW</name>
23784                        <bitRange>[16:16]</bitRange>
23785                        <access>read-write</access>
23786                    </field>
23787                    <field>
23788                        <name>GPIO3_EDGE_HIGH</name>
23789                        <bitRange>[15:15]</bitRange>
23790                        <access>read-write</access>
23791                    </field>
23792                    <field>
23793                        <name>GPIO3_EDGE_LOW</name>
23794                        <bitRange>[14:14]</bitRange>
23795                        <access>read-write</access>
23796                    </field>
23797                    <field>
23798                        <name>GPIO3_LEVEL_HIGH</name>
23799                        <bitRange>[13:13]</bitRange>
23800                        <access>read-write</access>
23801                    </field>
23802                    <field>
23803                        <name>GPIO3_LEVEL_LOW</name>
23804                        <bitRange>[12:12]</bitRange>
23805                        <access>read-write</access>
23806                    </field>
23807                    <field>
23808                        <name>GPIO2_EDGE_HIGH</name>
23809                        <bitRange>[11:11]</bitRange>
23810                        <access>read-write</access>
23811                    </field>
23812                    <field>
23813                        <name>GPIO2_EDGE_LOW</name>
23814                        <bitRange>[10:10]</bitRange>
23815                        <access>read-write</access>
23816                    </field>
23817                    <field>
23818                        <name>GPIO2_LEVEL_HIGH</name>
23819                        <bitRange>[9:9]</bitRange>
23820                        <access>read-write</access>
23821                    </field>
23822                    <field>
23823                        <name>GPIO2_LEVEL_LOW</name>
23824                        <bitRange>[8:8]</bitRange>
23825                        <access>read-write</access>
23826                    </field>
23827                    <field>
23828                        <name>GPIO1_EDGE_HIGH</name>
23829                        <bitRange>[7:7]</bitRange>
23830                        <access>read-write</access>
23831                    </field>
23832                    <field>
23833                        <name>GPIO1_EDGE_LOW</name>
23834                        <bitRange>[6:6]</bitRange>
23835                        <access>read-write</access>
23836                    </field>
23837                    <field>
23838                        <name>GPIO1_LEVEL_HIGH</name>
23839                        <bitRange>[5:5]</bitRange>
23840                        <access>read-write</access>
23841                    </field>
23842                    <field>
23843                        <name>GPIO1_LEVEL_LOW</name>
23844                        <bitRange>[4:4]</bitRange>
23845                        <access>read-write</access>
23846                    </field>
23847                    <field>
23848                        <name>GPIO0_EDGE_HIGH</name>
23849                        <bitRange>[3:3]</bitRange>
23850                        <access>read-write</access>
23851                    </field>
23852                    <field>
23853                        <name>GPIO0_EDGE_LOW</name>
23854                        <bitRange>[2:2]</bitRange>
23855                        <access>read-write</access>
23856                    </field>
23857                    <field>
23858                        <name>GPIO0_LEVEL_HIGH</name>
23859                        <bitRange>[1:1]</bitRange>
23860                        <access>read-write</access>
23861                    </field>
23862                    <field>
23863                        <name>GPIO0_LEVEL_LOW</name>
23864                        <bitRange>[0:0]</bitRange>
23865                        <access>read-write</access>
23866                    </field>
23867                </fields>
23868            </register>
23869            <register>
23870                <name>PROC0_INTE1</name>
23871                <addressOffset>0x0000024c</addressOffset>
23872                <description>Interrupt Enable for proc0</description>
23873                <resetValue>0x00000000</resetValue>
23874                <fields>
23875                    <field>
23876                        <name>GPIO15_EDGE_HIGH</name>
23877                        <bitRange>[31:31]</bitRange>
23878                        <access>read-write</access>
23879                    </field>
23880                    <field>
23881                        <name>GPIO15_EDGE_LOW</name>
23882                        <bitRange>[30:30]</bitRange>
23883                        <access>read-write</access>
23884                    </field>
23885                    <field>
23886                        <name>GPIO15_LEVEL_HIGH</name>
23887                        <bitRange>[29:29]</bitRange>
23888                        <access>read-write</access>
23889                    </field>
23890                    <field>
23891                        <name>GPIO15_LEVEL_LOW</name>
23892                        <bitRange>[28:28]</bitRange>
23893                        <access>read-write</access>
23894                    </field>
23895                    <field>
23896                        <name>GPIO14_EDGE_HIGH</name>
23897                        <bitRange>[27:27]</bitRange>
23898                        <access>read-write</access>
23899                    </field>
23900                    <field>
23901                        <name>GPIO14_EDGE_LOW</name>
23902                        <bitRange>[26:26]</bitRange>
23903                        <access>read-write</access>
23904                    </field>
23905                    <field>
23906                        <name>GPIO14_LEVEL_HIGH</name>
23907                        <bitRange>[25:25]</bitRange>
23908                        <access>read-write</access>
23909                    </field>
23910                    <field>
23911                        <name>GPIO14_LEVEL_LOW</name>
23912                        <bitRange>[24:24]</bitRange>
23913                        <access>read-write</access>
23914                    </field>
23915                    <field>
23916                        <name>GPIO13_EDGE_HIGH</name>
23917                        <bitRange>[23:23]</bitRange>
23918                        <access>read-write</access>
23919                    </field>
23920                    <field>
23921                        <name>GPIO13_EDGE_LOW</name>
23922                        <bitRange>[22:22]</bitRange>
23923                        <access>read-write</access>
23924                    </field>
23925                    <field>
23926                        <name>GPIO13_LEVEL_HIGH</name>
23927                        <bitRange>[21:21]</bitRange>
23928                        <access>read-write</access>
23929                    </field>
23930                    <field>
23931                        <name>GPIO13_LEVEL_LOW</name>
23932                        <bitRange>[20:20]</bitRange>
23933                        <access>read-write</access>
23934                    </field>
23935                    <field>
23936                        <name>GPIO12_EDGE_HIGH</name>
23937                        <bitRange>[19:19]</bitRange>
23938                        <access>read-write</access>
23939                    </field>
23940                    <field>
23941                        <name>GPIO12_EDGE_LOW</name>
23942                        <bitRange>[18:18]</bitRange>
23943                        <access>read-write</access>
23944                    </field>
23945                    <field>
23946                        <name>GPIO12_LEVEL_HIGH</name>
23947                        <bitRange>[17:17]</bitRange>
23948                        <access>read-write</access>
23949                    </field>
23950                    <field>
23951                        <name>GPIO12_LEVEL_LOW</name>
23952                        <bitRange>[16:16]</bitRange>
23953                        <access>read-write</access>
23954                    </field>
23955                    <field>
23956                        <name>GPIO11_EDGE_HIGH</name>
23957                        <bitRange>[15:15]</bitRange>
23958                        <access>read-write</access>
23959                    </field>
23960                    <field>
23961                        <name>GPIO11_EDGE_LOW</name>
23962                        <bitRange>[14:14]</bitRange>
23963                        <access>read-write</access>
23964                    </field>
23965                    <field>
23966                        <name>GPIO11_LEVEL_HIGH</name>
23967                        <bitRange>[13:13]</bitRange>
23968                        <access>read-write</access>
23969                    </field>
23970                    <field>
23971                        <name>GPIO11_LEVEL_LOW</name>
23972                        <bitRange>[12:12]</bitRange>
23973                        <access>read-write</access>
23974                    </field>
23975                    <field>
23976                        <name>GPIO10_EDGE_HIGH</name>
23977                        <bitRange>[11:11]</bitRange>
23978                        <access>read-write</access>
23979                    </field>
23980                    <field>
23981                        <name>GPIO10_EDGE_LOW</name>
23982                        <bitRange>[10:10]</bitRange>
23983                        <access>read-write</access>
23984                    </field>
23985                    <field>
23986                        <name>GPIO10_LEVEL_HIGH</name>
23987                        <bitRange>[9:9]</bitRange>
23988                        <access>read-write</access>
23989                    </field>
23990                    <field>
23991                        <name>GPIO10_LEVEL_LOW</name>
23992                        <bitRange>[8:8]</bitRange>
23993                        <access>read-write</access>
23994                    </field>
23995                    <field>
23996                        <name>GPIO9_EDGE_HIGH</name>
23997                        <bitRange>[7:7]</bitRange>
23998                        <access>read-write</access>
23999                    </field>
24000                    <field>
24001                        <name>GPIO9_EDGE_LOW</name>
24002                        <bitRange>[6:6]</bitRange>
24003                        <access>read-write</access>
24004                    </field>
24005                    <field>
24006                        <name>GPIO9_LEVEL_HIGH</name>
24007                        <bitRange>[5:5]</bitRange>
24008                        <access>read-write</access>
24009                    </field>
24010                    <field>
24011                        <name>GPIO9_LEVEL_LOW</name>
24012                        <bitRange>[4:4]</bitRange>
24013                        <access>read-write</access>
24014                    </field>
24015                    <field>
24016                        <name>GPIO8_EDGE_HIGH</name>
24017                        <bitRange>[3:3]</bitRange>
24018                        <access>read-write</access>
24019                    </field>
24020                    <field>
24021                        <name>GPIO8_EDGE_LOW</name>
24022                        <bitRange>[2:2]</bitRange>
24023                        <access>read-write</access>
24024                    </field>
24025                    <field>
24026                        <name>GPIO8_LEVEL_HIGH</name>
24027                        <bitRange>[1:1]</bitRange>
24028                        <access>read-write</access>
24029                    </field>
24030                    <field>
24031                        <name>GPIO8_LEVEL_LOW</name>
24032                        <bitRange>[0:0]</bitRange>
24033                        <access>read-write</access>
24034                    </field>
24035                </fields>
24036            </register>
24037            <register>
24038                <name>PROC0_INTE2</name>
24039                <addressOffset>0x00000250</addressOffset>
24040                <description>Interrupt Enable for proc0</description>
24041                <resetValue>0x00000000</resetValue>
24042                <fields>
24043                    <field>
24044                        <name>GPIO23_EDGE_HIGH</name>
24045                        <bitRange>[31:31]</bitRange>
24046                        <access>read-write</access>
24047                    </field>
24048                    <field>
24049                        <name>GPIO23_EDGE_LOW</name>
24050                        <bitRange>[30:30]</bitRange>
24051                        <access>read-write</access>
24052                    </field>
24053                    <field>
24054                        <name>GPIO23_LEVEL_HIGH</name>
24055                        <bitRange>[29:29]</bitRange>
24056                        <access>read-write</access>
24057                    </field>
24058                    <field>
24059                        <name>GPIO23_LEVEL_LOW</name>
24060                        <bitRange>[28:28]</bitRange>
24061                        <access>read-write</access>
24062                    </field>
24063                    <field>
24064                        <name>GPIO22_EDGE_HIGH</name>
24065                        <bitRange>[27:27]</bitRange>
24066                        <access>read-write</access>
24067                    </field>
24068                    <field>
24069                        <name>GPIO22_EDGE_LOW</name>
24070                        <bitRange>[26:26]</bitRange>
24071                        <access>read-write</access>
24072                    </field>
24073                    <field>
24074                        <name>GPIO22_LEVEL_HIGH</name>
24075                        <bitRange>[25:25]</bitRange>
24076                        <access>read-write</access>
24077                    </field>
24078                    <field>
24079                        <name>GPIO22_LEVEL_LOW</name>
24080                        <bitRange>[24:24]</bitRange>
24081                        <access>read-write</access>
24082                    </field>
24083                    <field>
24084                        <name>GPIO21_EDGE_HIGH</name>
24085                        <bitRange>[23:23]</bitRange>
24086                        <access>read-write</access>
24087                    </field>
24088                    <field>
24089                        <name>GPIO21_EDGE_LOW</name>
24090                        <bitRange>[22:22]</bitRange>
24091                        <access>read-write</access>
24092                    </field>
24093                    <field>
24094                        <name>GPIO21_LEVEL_HIGH</name>
24095                        <bitRange>[21:21]</bitRange>
24096                        <access>read-write</access>
24097                    </field>
24098                    <field>
24099                        <name>GPIO21_LEVEL_LOW</name>
24100                        <bitRange>[20:20]</bitRange>
24101                        <access>read-write</access>
24102                    </field>
24103                    <field>
24104                        <name>GPIO20_EDGE_HIGH</name>
24105                        <bitRange>[19:19]</bitRange>
24106                        <access>read-write</access>
24107                    </field>
24108                    <field>
24109                        <name>GPIO20_EDGE_LOW</name>
24110                        <bitRange>[18:18]</bitRange>
24111                        <access>read-write</access>
24112                    </field>
24113                    <field>
24114                        <name>GPIO20_LEVEL_HIGH</name>
24115                        <bitRange>[17:17]</bitRange>
24116                        <access>read-write</access>
24117                    </field>
24118                    <field>
24119                        <name>GPIO20_LEVEL_LOW</name>
24120                        <bitRange>[16:16]</bitRange>
24121                        <access>read-write</access>
24122                    </field>
24123                    <field>
24124                        <name>GPIO19_EDGE_HIGH</name>
24125                        <bitRange>[15:15]</bitRange>
24126                        <access>read-write</access>
24127                    </field>
24128                    <field>
24129                        <name>GPIO19_EDGE_LOW</name>
24130                        <bitRange>[14:14]</bitRange>
24131                        <access>read-write</access>
24132                    </field>
24133                    <field>
24134                        <name>GPIO19_LEVEL_HIGH</name>
24135                        <bitRange>[13:13]</bitRange>
24136                        <access>read-write</access>
24137                    </field>
24138                    <field>
24139                        <name>GPIO19_LEVEL_LOW</name>
24140                        <bitRange>[12:12]</bitRange>
24141                        <access>read-write</access>
24142                    </field>
24143                    <field>
24144                        <name>GPIO18_EDGE_HIGH</name>
24145                        <bitRange>[11:11]</bitRange>
24146                        <access>read-write</access>
24147                    </field>
24148                    <field>
24149                        <name>GPIO18_EDGE_LOW</name>
24150                        <bitRange>[10:10]</bitRange>
24151                        <access>read-write</access>
24152                    </field>
24153                    <field>
24154                        <name>GPIO18_LEVEL_HIGH</name>
24155                        <bitRange>[9:9]</bitRange>
24156                        <access>read-write</access>
24157                    </field>
24158                    <field>
24159                        <name>GPIO18_LEVEL_LOW</name>
24160                        <bitRange>[8:8]</bitRange>
24161                        <access>read-write</access>
24162                    </field>
24163                    <field>
24164                        <name>GPIO17_EDGE_HIGH</name>
24165                        <bitRange>[7:7]</bitRange>
24166                        <access>read-write</access>
24167                    </field>
24168                    <field>
24169                        <name>GPIO17_EDGE_LOW</name>
24170                        <bitRange>[6:6]</bitRange>
24171                        <access>read-write</access>
24172                    </field>
24173                    <field>
24174                        <name>GPIO17_LEVEL_HIGH</name>
24175                        <bitRange>[5:5]</bitRange>
24176                        <access>read-write</access>
24177                    </field>
24178                    <field>
24179                        <name>GPIO17_LEVEL_LOW</name>
24180                        <bitRange>[4:4]</bitRange>
24181                        <access>read-write</access>
24182                    </field>
24183                    <field>
24184                        <name>GPIO16_EDGE_HIGH</name>
24185                        <bitRange>[3:3]</bitRange>
24186                        <access>read-write</access>
24187                    </field>
24188                    <field>
24189                        <name>GPIO16_EDGE_LOW</name>
24190                        <bitRange>[2:2]</bitRange>
24191                        <access>read-write</access>
24192                    </field>
24193                    <field>
24194                        <name>GPIO16_LEVEL_HIGH</name>
24195                        <bitRange>[1:1]</bitRange>
24196                        <access>read-write</access>
24197                    </field>
24198                    <field>
24199                        <name>GPIO16_LEVEL_LOW</name>
24200                        <bitRange>[0:0]</bitRange>
24201                        <access>read-write</access>
24202                    </field>
24203                </fields>
24204            </register>
24205            <register>
24206                <name>PROC0_INTE3</name>
24207                <addressOffset>0x00000254</addressOffset>
24208                <description>Interrupt Enable for proc0</description>
24209                <resetValue>0x00000000</resetValue>
24210                <fields>
24211                    <field>
24212                        <name>GPIO31_EDGE_HIGH</name>
24213                        <bitRange>[31:31]</bitRange>
24214                        <access>read-write</access>
24215                    </field>
24216                    <field>
24217                        <name>GPIO31_EDGE_LOW</name>
24218                        <bitRange>[30:30]</bitRange>
24219                        <access>read-write</access>
24220                    </field>
24221                    <field>
24222                        <name>GPIO31_LEVEL_HIGH</name>
24223                        <bitRange>[29:29]</bitRange>
24224                        <access>read-write</access>
24225                    </field>
24226                    <field>
24227                        <name>GPIO31_LEVEL_LOW</name>
24228                        <bitRange>[28:28]</bitRange>
24229                        <access>read-write</access>
24230                    </field>
24231                    <field>
24232                        <name>GPIO30_EDGE_HIGH</name>
24233                        <bitRange>[27:27]</bitRange>
24234                        <access>read-write</access>
24235                    </field>
24236                    <field>
24237                        <name>GPIO30_EDGE_LOW</name>
24238                        <bitRange>[26:26]</bitRange>
24239                        <access>read-write</access>
24240                    </field>
24241                    <field>
24242                        <name>GPIO30_LEVEL_HIGH</name>
24243                        <bitRange>[25:25]</bitRange>
24244                        <access>read-write</access>
24245                    </field>
24246                    <field>
24247                        <name>GPIO30_LEVEL_LOW</name>
24248                        <bitRange>[24:24]</bitRange>
24249                        <access>read-write</access>
24250                    </field>
24251                    <field>
24252                        <name>GPIO29_EDGE_HIGH</name>
24253                        <bitRange>[23:23]</bitRange>
24254                        <access>read-write</access>
24255                    </field>
24256                    <field>
24257                        <name>GPIO29_EDGE_LOW</name>
24258                        <bitRange>[22:22]</bitRange>
24259                        <access>read-write</access>
24260                    </field>
24261                    <field>
24262                        <name>GPIO29_LEVEL_HIGH</name>
24263                        <bitRange>[21:21]</bitRange>
24264                        <access>read-write</access>
24265                    </field>
24266                    <field>
24267                        <name>GPIO29_LEVEL_LOW</name>
24268                        <bitRange>[20:20]</bitRange>
24269                        <access>read-write</access>
24270                    </field>
24271                    <field>
24272                        <name>GPIO28_EDGE_HIGH</name>
24273                        <bitRange>[19:19]</bitRange>
24274                        <access>read-write</access>
24275                    </field>
24276                    <field>
24277                        <name>GPIO28_EDGE_LOW</name>
24278                        <bitRange>[18:18]</bitRange>
24279                        <access>read-write</access>
24280                    </field>
24281                    <field>
24282                        <name>GPIO28_LEVEL_HIGH</name>
24283                        <bitRange>[17:17]</bitRange>
24284                        <access>read-write</access>
24285                    </field>
24286                    <field>
24287                        <name>GPIO28_LEVEL_LOW</name>
24288                        <bitRange>[16:16]</bitRange>
24289                        <access>read-write</access>
24290                    </field>
24291                    <field>
24292                        <name>GPIO27_EDGE_HIGH</name>
24293                        <bitRange>[15:15]</bitRange>
24294                        <access>read-write</access>
24295                    </field>
24296                    <field>
24297                        <name>GPIO27_EDGE_LOW</name>
24298                        <bitRange>[14:14]</bitRange>
24299                        <access>read-write</access>
24300                    </field>
24301                    <field>
24302                        <name>GPIO27_LEVEL_HIGH</name>
24303                        <bitRange>[13:13]</bitRange>
24304                        <access>read-write</access>
24305                    </field>
24306                    <field>
24307                        <name>GPIO27_LEVEL_LOW</name>
24308                        <bitRange>[12:12]</bitRange>
24309                        <access>read-write</access>
24310                    </field>
24311                    <field>
24312                        <name>GPIO26_EDGE_HIGH</name>
24313                        <bitRange>[11:11]</bitRange>
24314                        <access>read-write</access>
24315                    </field>
24316                    <field>
24317                        <name>GPIO26_EDGE_LOW</name>
24318                        <bitRange>[10:10]</bitRange>
24319                        <access>read-write</access>
24320                    </field>
24321                    <field>
24322                        <name>GPIO26_LEVEL_HIGH</name>
24323                        <bitRange>[9:9]</bitRange>
24324                        <access>read-write</access>
24325                    </field>
24326                    <field>
24327                        <name>GPIO26_LEVEL_LOW</name>
24328                        <bitRange>[8:8]</bitRange>
24329                        <access>read-write</access>
24330                    </field>
24331                    <field>
24332                        <name>GPIO25_EDGE_HIGH</name>
24333                        <bitRange>[7:7]</bitRange>
24334                        <access>read-write</access>
24335                    </field>
24336                    <field>
24337                        <name>GPIO25_EDGE_LOW</name>
24338                        <bitRange>[6:6]</bitRange>
24339                        <access>read-write</access>
24340                    </field>
24341                    <field>
24342                        <name>GPIO25_LEVEL_HIGH</name>
24343                        <bitRange>[5:5]</bitRange>
24344                        <access>read-write</access>
24345                    </field>
24346                    <field>
24347                        <name>GPIO25_LEVEL_LOW</name>
24348                        <bitRange>[4:4]</bitRange>
24349                        <access>read-write</access>
24350                    </field>
24351                    <field>
24352                        <name>GPIO24_EDGE_HIGH</name>
24353                        <bitRange>[3:3]</bitRange>
24354                        <access>read-write</access>
24355                    </field>
24356                    <field>
24357                        <name>GPIO24_EDGE_LOW</name>
24358                        <bitRange>[2:2]</bitRange>
24359                        <access>read-write</access>
24360                    </field>
24361                    <field>
24362                        <name>GPIO24_LEVEL_HIGH</name>
24363                        <bitRange>[1:1]</bitRange>
24364                        <access>read-write</access>
24365                    </field>
24366                    <field>
24367                        <name>GPIO24_LEVEL_LOW</name>
24368                        <bitRange>[0:0]</bitRange>
24369                        <access>read-write</access>
24370                    </field>
24371                </fields>
24372            </register>
24373            <register>
24374                <name>PROC0_INTE4</name>
24375                <addressOffset>0x00000258</addressOffset>
24376                <description>Interrupt Enable for proc0</description>
24377                <resetValue>0x00000000</resetValue>
24378                <fields>
24379                    <field>
24380                        <name>GPIO39_EDGE_HIGH</name>
24381                        <bitRange>[31:31]</bitRange>
24382                        <access>read-write</access>
24383                    </field>
24384                    <field>
24385                        <name>GPIO39_EDGE_LOW</name>
24386                        <bitRange>[30:30]</bitRange>
24387                        <access>read-write</access>
24388                    </field>
24389                    <field>
24390                        <name>GPIO39_LEVEL_HIGH</name>
24391                        <bitRange>[29:29]</bitRange>
24392                        <access>read-write</access>
24393                    </field>
24394                    <field>
24395                        <name>GPIO39_LEVEL_LOW</name>
24396                        <bitRange>[28:28]</bitRange>
24397                        <access>read-write</access>
24398                    </field>
24399                    <field>
24400                        <name>GPIO38_EDGE_HIGH</name>
24401                        <bitRange>[27:27]</bitRange>
24402                        <access>read-write</access>
24403                    </field>
24404                    <field>
24405                        <name>GPIO38_EDGE_LOW</name>
24406                        <bitRange>[26:26]</bitRange>
24407                        <access>read-write</access>
24408                    </field>
24409                    <field>
24410                        <name>GPIO38_LEVEL_HIGH</name>
24411                        <bitRange>[25:25]</bitRange>
24412                        <access>read-write</access>
24413                    </field>
24414                    <field>
24415                        <name>GPIO38_LEVEL_LOW</name>
24416                        <bitRange>[24:24]</bitRange>
24417                        <access>read-write</access>
24418                    </field>
24419                    <field>
24420                        <name>GPIO37_EDGE_HIGH</name>
24421                        <bitRange>[23:23]</bitRange>
24422                        <access>read-write</access>
24423                    </field>
24424                    <field>
24425                        <name>GPIO37_EDGE_LOW</name>
24426                        <bitRange>[22:22]</bitRange>
24427                        <access>read-write</access>
24428                    </field>
24429                    <field>
24430                        <name>GPIO37_LEVEL_HIGH</name>
24431                        <bitRange>[21:21]</bitRange>
24432                        <access>read-write</access>
24433                    </field>
24434                    <field>
24435                        <name>GPIO37_LEVEL_LOW</name>
24436                        <bitRange>[20:20]</bitRange>
24437                        <access>read-write</access>
24438                    </field>
24439                    <field>
24440                        <name>GPIO36_EDGE_HIGH</name>
24441                        <bitRange>[19:19]</bitRange>
24442                        <access>read-write</access>
24443                    </field>
24444                    <field>
24445                        <name>GPIO36_EDGE_LOW</name>
24446                        <bitRange>[18:18]</bitRange>
24447                        <access>read-write</access>
24448                    </field>
24449                    <field>
24450                        <name>GPIO36_LEVEL_HIGH</name>
24451                        <bitRange>[17:17]</bitRange>
24452                        <access>read-write</access>
24453                    </field>
24454                    <field>
24455                        <name>GPIO36_LEVEL_LOW</name>
24456                        <bitRange>[16:16]</bitRange>
24457                        <access>read-write</access>
24458                    </field>
24459                    <field>
24460                        <name>GPIO35_EDGE_HIGH</name>
24461                        <bitRange>[15:15]</bitRange>
24462                        <access>read-write</access>
24463                    </field>
24464                    <field>
24465                        <name>GPIO35_EDGE_LOW</name>
24466                        <bitRange>[14:14]</bitRange>
24467                        <access>read-write</access>
24468                    </field>
24469                    <field>
24470                        <name>GPIO35_LEVEL_HIGH</name>
24471                        <bitRange>[13:13]</bitRange>
24472                        <access>read-write</access>
24473                    </field>
24474                    <field>
24475                        <name>GPIO35_LEVEL_LOW</name>
24476                        <bitRange>[12:12]</bitRange>
24477                        <access>read-write</access>
24478                    </field>
24479                    <field>
24480                        <name>GPIO34_EDGE_HIGH</name>
24481                        <bitRange>[11:11]</bitRange>
24482                        <access>read-write</access>
24483                    </field>
24484                    <field>
24485                        <name>GPIO34_EDGE_LOW</name>
24486                        <bitRange>[10:10]</bitRange>
24487                        <access>read-write</access>
24488                    </field>
24489                    <field>
24490                        <name>GPIO34_LEVEL_HIGH</name>
24491                        <bitRange>[9:9]</bitRange>
24492                        <access>read-write</access>
24493                    </field>
24494                    <field>
24495                        <name>GPIO34_LEVEL_LOW</name>
24496                        <bitRange>[8:8]</bitRange>
24497                        <access>read-write</access>
24498                    </field>
24499                    <field>
24500                        <name>GPIO33_EDGE_HIGH</name>
24501                        <bitRange>[7:7]</bitRange>
24502                        <access>read-write</access>
24503                    </field>
24504                    <field>
24505                        <name>GPIO33_EDGE_LOW</name>
24506                        <bitRange>[6:6]</bitRange>
24507                        <access>read-write</access>
24508                    </field>
24509                    <field>
24510                        <name>GPIO33_LEVEL_HIGH</name>
24511                        <bitRange>[5:5]</bitRange>
24512                        <access>read-write</access>
24513                    </field>
24514                    <field>
24515                        <name>GPIO33_LEVEL_LOW</name>
24516                        <bitRange>[4:4]</bitRange>
24517                        <access>read-write</access>
24518                    </field>
24519                    <field>
24520                        <name>GPIO32_EDGE_HIGH</name>
24521                        <bitRange>[3:3]</bitRange>
24522                        <access>read-write</access>
24523                    </field>
24524                    <field>
24525                        <name>GPIO32_EDGE_LOW</name>
24526                        <bitRange>[2:2]</bitRange>
24527                        <access>read-write</access>
24528                    </field>
24529                    <field>
24530                        <name>GPIO32_LEVEL_HIGH</name>
24531                        <bitRange>[1:1]</bitRange>
24532                        <access>read-write</access>
24533                    </field>
24534                    <field>
24535                        <name>GPIO32_LEVEL_LOW</name>
24536                        <bitRange>[0:0]</bitRange>
24537                        <access>read-write</access>
24538                    </field>
24539                </fields>
24540            </register>
24541            <register>
24542                <name>PROC0_INTE5</name>
24543                <addressOffset>0x0000025c</addressOffset>
24544                <description>Interrupt Enable for proc0</description>
24545                <resetValue>0x00000000</resetValue>
24546                <fields>
24547                    <field>
24548                        <name>GPIO47_EDGE_HIGH</name>
24549                        <bitRange>[31:31]</bitRange>
24550                        <access>read-write</access>
24551                    </field>
24552                    <field>
24553                        <name>GPIO47_EDGE_LOW</name>
24554                        <bitRange>[30:30]</bitRange>
24555                        <access>read-write</access>
24556                    </field>
24557                    <field>
24558                        <name>GPIO47_LEVEL_HIGH</name>
24559                        <bitRange>[29:29]</bitRange>
24560                        <access>read-write</access>
24561                    </field>
24562                    <field>
24563                        <name>GPIO47_LEVEL_LOW</name>
24564                        <bitRange>[28:28]</bitRange>
24565                        <access>read-write</access>
24566                    </field>
24567                    <field>
24568                        <name>GPIO46_EDGE_HIGH</name>
24569                        <bitRange>[27:27]</bitRange>
24570                        <access>read-write</access>
24571                    </field>
24572                    <field>
24573                        <name>GPIO46_EDGE_LOW</name>
24574                        <bitRange>[26:26]</bitRange>
24575                        <access>read-write</access>
24576                    </field>
24577                    <field>
24578                        <name>GPIO46_LEVEL_HIGH</name>
24579                        <bitRange>[25:25]</bitRange>
24580                        <access>read-write</access>
24581                    </field>
24582                    <field>
24583                        <name>GPIO46_LEVEL_LOW</name>
24584                        <bitRange>[24:24]</bitRange>
24585                        <access>read-write</access>
24586                    </field>
24587                    <field>
24588                        <name>GPIO45_EDGE_HIGH</name>
24589                        <bitRange>[23:23]</bitRange>
24590                        <access>read-write</access>
24591                    </field>
24592                    <field>
24593                        <name>GPIO45_EDGE_LOW</name>
24594                        <bitRange>[22:22]</bitRange>
24595                        <access>read-write</access>
24596                    </field>
24597                    <field>
24598                        <name>GPIO45_LEVEL_HIGH</name>
24599                        <bitRange>[21:21]</bitRange>
24600                        <access>read-write</access>
24601                    </field>
24602                    <field>
24603                        <name>GPIO45_LEVEL_LOW</name>
24604                        <bitRange>[20:20]</bitRange>
24605                        <access>read-write</access>
24606                    </field>
24607                    <field>
24608                        <name>GPIO44_EDGE_HIGH</name>
24609                        <bitRange>[19:19]</bitRange>
24610                        <access>read-write</access>
24611                    </field>
24612                    <field>
24613                        <name>GPIO44_EDGE_LOW</name>
24614                        <bitRange>[18:18]</bitRange>
24615                        <access>read-write</access>
24616                    </field>
24617                    <field>
24618                        <name>GPIO44_LEVEL_HIGH</name>
24619                        <bitRange>[17:17]</bitRange>
24620                        <access>read-write</access>
24621                    </field>
24622                    <field>
24623                        <name>GPIO44_LEVEL_LOW</name>
24624                        <bitRange>[16:16]</bitRange>
24625                        <access>read-write</access>
24626                    </field>
24627                    <field>
24628                        <name>GPIO43_EDGE_HIGH</name>
24629                        <bitRange>[15:15]</bitRange>
24630                        <access>read-write</access>
24631                    </field>
24632                    <field>
24633                        <name>GPIO43_EDGE_LOW</name>
24634                        <bitRange>[14:14]</bitRange>
24635                        <access>read-write</access>
24636                    </field>
24637                    <field>
24638                        <name>GPIO43_LEVEL_HIGH</name>
24639                        <bitRange>[13:13]</bitRange>
24640                        <access>read-write</access>
24641                    </field>
24642                    <field>
24643                        <name>GPIO43_LEVEL_LOW</name>
24644                        <bitRange>[12:12]</bitRange>
24645                        <access>read-write</access>
24646                    </field>
24647                    <field>
24648                        <name>GPIO42_EDGE_HIGH</name>
24649                        <bitRange>[11:11]</bitRange>
24650                        <access>read-write</access>
24651                    </field>
24652                    <field>
24653                        <name>GPIO42_EDGE_LOW</name>
24654                        <bitRange>[10:10]</bitRange>
24655                        <access>read-write</access>
24656                    </field>
24657                    <field>
24658                        <name>GPIO42_LEVEL_HIGH</name>
24659                        <bitRange>[9:9]</bitRange>
24660                        <access>read-write</access>
24661                    </field>
24662                    <field>
24663                        <name>GPIO42_LEVEL_LOW</name>
24664                        <bitRange>[8:8]</bitRange>
24665                        <access>read-write</access>
24666                    </field>
24667                    <field>
24668                        <name>GPIO41_EDGE_HIGH</name>
24669                        <bitRange>[7:7]</bitRange>
24670                        <access>read-write</access>
24671                    </field>
24672                    <field>
24673                        <name>GPIO41_EDGE_LOW</name>
24674                        <bitRange>[6:6]</bitRange>
24675                        <access>read-write</access>
24676                    </field>
24677                    <field>
24678                        <name>GPIO41_LEVEL_HIGH</name>
24679                        <bitRange>[5:5]</bitRange>
24680                        <access>read-write</access>
24681                    </field>
24682                    <field>
24683                        <name>GPIO41_LEVEL_LOW</name>
24684                        <bitRange>[4:4]</bitRange>
24685                        <access>read-write</access>
24686                    </field>
24687                    <field>
24688                        <name>GPIO40_EDGE_HIGH</name>
24689                        <bitRange>[3:3]</bitRange>
24690                        <access>read-write</access>
24691                    </field>
24692                    <field>
24693                        <name>GPIO40_EDGE_LOW</name>
24694                        <bitRange>[2:2]</bitRange>
24695                        <access>read-write</access>
24696                    </field>
24697                    <field>
24698                        <name>GPIO40_LEVEL_HIGH</name>
24699                        <bitRange>[1:1]</bitRange>
24700                        <access>read-write</access>
24701                    </field>
24702                    <field>
24703                        <name>GPIO40_LEVEL_LOW</name>
24704                        <bitRange>[0:0]</bitRange>
24705                        <access>read-write</access>
24706                    </field>
24707                </fields>
24708            </register>
24709            <register>
24710                <name>PROC0_INTF0</name>
24711                <addressOffset>0x00000260</addressOffset>
24712                <description>Interrupt Force for proc0</description>
24713                <resetValue>0x00000000</resetValue>
24714                <fields>
24715                    <field>
24716                        <name>GPIO7_EDGE_HIGH</name>
24717                        <bitRange>[31:31]</bitRange>
24718                        <access>read-write</access>
24719                    </field>
24720                    <field>
24721                        <name>GPIO7_EDGE_LOW</name>
24722                        <bitRange>[30:30]</bitRange>
24723                        <access>read-write</access>
24724                    </field>
24725                    <field>
24726                        <name>GPIO7_LEVEL_HIGH</name>
24727                        <bitRange>[29:29]</bitRange>
24728                        <access>read-write</access>
24729                    </field>
24730                    <field>
24731                        <name>GPIO7_LEVEL_LOW</name>
24732                        <bitRange>[28:28]</bitRange>
24733                        <access>read-write</access>
24734                    </field>
24735                    <field>
24736                        <name>GPIO6_EDGE_HIGH</name>
24737                        <bitRange>[27:27]</bitRange>
24738                        <access>read-write</access>
24739                    </field>
24740                    <field>
24741                        <name>GPIO6_EDGE_LOW</name>
24742                        <bitRange>[26:26]</bitRange>
24743                        <access>read-write</access>
24744                    </field>
24745                    <field>
24746                        <name>GPIO6_LEVEL_HIGH</name>
24747                        <bitRange>[25:25]</bitRange>
24748                        <access>read-write</access>
24749                    </field>
24750                    <field>
24751                        <name>GPIO6_LEVEL_LOW</name>
24752                        <bitRange>[24:24]</bitRange>
24753                        <access>read-write</access>
24754                    </field>
24755                    <field>
24756                        <name>GPIO5_EDGE_HIGH</name>
24757                        <bitRange>[23:23]</bitRange>
24758                        <access>read-write</access>
24759                    </field>
24760                    <field>
24761                        <name>GPIO5_EDGE_LOW</name>
24762                        <bitRange>[22:22]</bitRange>
24763                        <access>read-write</access>
24764                    </field>
24765                    <field>
24766                        <name>GPIO5_LEVEL_HIGH</name>
24767                        <bitRange>[21:21]</bitRange>
24768                        <access>read-write</access>
24769                    </field>
24770                    <field>
24771                        <name>GPIO5_LEVEL_LOW</name>
24772                        <bitRange>[20:20]</bitRange>
24773                        <access>read-write</access>
24774                    </field>
24775                    <field>
24776                        <name>GPIO4_EDGE_HIGH</name>
24777                        <bitRange>[19:19]</bitRange>
24778                        <access>read-write</access>
24779                    </field>
24780                    <field>
24781                        <name>GPIO4_EDGE_LOW</name>
24782                        <bitRange>[18:18]</bitRange>
24783                        <access>read-write</access>
24784                    </field>
24785                    <field>
24786                        <name>GPIO4_LEVEL_HIGH</name>
24787                        <bitRange>[17:17]</bitRange>
24788                        <access>read-write</access>
24789                    </field>
24790                    <field>
24791                        <name>GPIO4_LEVEL_LOW</name>
24792                        <bitRange>[16:16]</bitRange>
24793                        <access>read-write</access>
24794                    </field>
24795                    <field>
24796                        <name>GPIO3_EDGE_HIGH</name>
24797                        <bitRange>[15:15]</bitRange>
24798                        <access>read-write</access>
24799                    </field>
24800                    <field>
24801                        <name>GPIO3_EDGE_LOW</name>
24802                        <bitRange>[14:14]</bitRange>
24803                        <access>read-write</access>
24804                    </field>
24805                    <field>
24806                        <name>GPIO3_LEVEL_HIGH</name>
24807                        <bitRange>[13:13]</bitRange>
24808                        <access>read-write</access>
24809                    </field>
24810                    <field>
24811                        <name>GPIO3_LEVEL_LOW</name>
24812                        <bitRange>[12:12]</bitRange>
24813                        <access>read-write</access>
24814                    </field>
24815                    <field>
24816                        <name>GPIO2_EDGE_HIGH</name>
24817                        <bitRange>[11:11]</bitRange>
24818                        <access>read-write</access>
24819                    </field>
24820                    <field>
24821                        <name>GPIO2_EDGE_LOW</name>
24822                        <bitRange>[10:10]</bitRange>
24823                        <access>read-write</access>
24824                    </field>
24825                    <field>
24826                        <name>GPIO2_LEVEL_HIGH</name>
24827                        <bitRange>[9:9]</bitRange>
24828                        <access>read-write</access>
24829                    </field>
24830                    <field>
24831                        <name>GPIO2_LEVEL_LOW</name>
24832                        <bitRange>[8:8]</bitRange>
24833                        <access>read-write</access>
24834                    </field>
24835                    <field>
24836                        <name>GPIO1_EDGE_HIGH</name>
24837                        <bitRange>[7:7]</bitRange>
24838                        <access>read-write</access>
24839                    </field>
24840                    <field>
24841                        <name>GPIO1_EDGE_LOW</name>
24842                        <bitRange>[6:6]</bitRange>
24843                        <access>read-write</access>
24844                    </field>
24845                    <field>
24846                        <name>GPIO1_LEVEL_HIGH</name>
24847                        <bitRange>[5:5]</bitRange>
24848                        <access>read-write</access>
24849                    </field>
24850                    <field>
24851                        <name>GPIO1_LEVEL_LOW</name>
24852                        <bitRange>[4:4]</bitRange>
24853                        <access>read-write</access>
24854                    </field>
24855                    <field>
24856                        <name>GPIO0_EDGE_HIGH</name>
24857                        <bitRange>[3:3]</bitRange>
24858                        <access>read-write</access>
24859                    </field>
24860                    <field>
24861                        <name>GPIO0_EDGE_LOW</name>
24862                        <bitRange>[2:2]</bitRange>
24863                        <access>read-write</access>
24864                    </field>
24865                    <field>
24866                        <name>GPIO0_LEVEL_HIGH</name>
24867                        <bitRange>[1:1]</bitRange>
24868                        <access>read-write</access>
24869                    </field>
24870                    <field>
24871                        <name>GPIO0_LEVEL_LOW</name>
24872                        <bitRange>[0:0]</bitRange>
24873                        <access>read-write</access>
24874                    </field>
24875                </fields>
24876            </register>
24877            <register>
24878                <name>PROC0_INTF1</name>
24879                <addressOffset>0x00000264</addressOffset>
24880                <description>Interrupt Force for proc0</description>
24881                <resetValue>0x00000000</resetValue>
24882                <fields>
24883                    <field>
24884                        <name>GPIO15_EDGE_HIGH</name>
24885                        <bitRange>[31:31]</bitRange>
24886                        <access>read-write</access>
24887                    </field>
24888                    <field>
24889                        <name>GPIO15_EDGE_LOW</name>
24890                        <bitRange>[30:30]</bitRange>
24891                        <access>read-write</access>
24892                    </field>
24893                    <field>
24894                        <name>GPIO15_LEVEL_HIGH</name>
24895                        <bitRange>[29:29]</bitRange>
24896                        <access>read-write</access>
24897                    </field>
24898                    <field>
24899                        <name>GPIO15_LEVEL_LOW</name>
24900                        <bitRange>[28:28]</bitRange>
24901                        <access>read-write</access>
24902                    </field>
24903                    <field>
24904                        <name>GPIO14_EDGE_HIGH</name>
24905                        <bitRange>[27:27]</bitRange>
24906                        <access>read-write</access>
24907                    </field>
24908                    <field>
24909                        <name>GPIO14_EDGE_LOW</name>
24910                        <bitRange>[26:26]</bitRange>
24911                        <access>read-write</access>
24912                    </field>
24913                    <field>
24914                        <name>GPIO14_LEVEL_HIGH</name>
24915                        <bitRange>[25:25]</bitRange>
24916                        <access>read-write</access>
24917                    </field>
24918                    <field>
24919                        <name>GPIO14_LEVEL_LOW</name>
24920                        <bitRange>[24:24]</bitRange>
24921                        <access>read-write</access>
24922                    </field>
24923                    <field>
24924                        <name>GPIO13_EDGE_HIGH</name>
24925                        <bitRange>[23:23]</bitRange>
24926                        <access>read-write</access>
24927                    </field>
24928                    <field>
24929                        <name>GPIO13_EDGE_LOW</name>
24930                        <bitRange>[22:22]</bitRange>
24931                        <access>read-write</access>
24932                    </field>
24933                    <field>
24934                        <name>GPIO13_LEVEL_HIGH</name>
24935                        <bitRange>[21:21]</bitRange>
24936                        <access>read-write</access>
24937                    </field>
24938                    <field>
24939                        <name>GPIO13_LEVEL_LOW</name>
24940                        <bitRange>[20:20]</bitRange>
24941                        <access>read-write</access>
24942                    </field>
24943                    <field>
24944                        <name>GPIO12_EDGE_HIGH</name>
24945                        <bitRange>[19:19]</bitRange>
24946                        <access>read-write</access>
24947                    </field>
24948                    <field>
24949                        <name>GPIO12_EDGE_LOW</name>
24950                        <bitRange>[18:18]</bitRange>
24951                        <access>read-write</access>
24952                    </field>
24953                    <field>
24954                        <name>GPIO12_LEVEL_HIGH</name>
24955                        <bitRange>[17:17]</bitRange>
24956                        <access>read-write</access>
24957                    </field>
24958                    <field>
24959                        <name>GPIO12_LEVEL_LOW</name>
24960                        <bitRange>[16:16]</bitRange>
24961                        <access>read-write</access>
24962                    </field>
24963                    <field>
24964                        <name>GPIO11_EDGE_HIGH</name>
24965                        <bitRange>[15:15]</bitRange>
24966                        <access>read-write</access>
24967                    </field>
24968                    <field>
24969                        <name>GPIO11_EDGE_LOW</name>
24970                        <bitRange>[14:14]</bitRange>
24971                        <access>read-write</access>
24972                    </field>
24973                    <field>
24974                        <name>GPIO11_LEVEL_HIGH</name>
24975                        <bitRange>[13:13]</bitRange>
24976                        <access>read-write</access>
24977                    </field>
24978                    <field>
24979                        <name>GPIO11_LEVEL_LOW</name>
24980                        <bitRange>[12:12]</bitRange>
24981                        <access>read-write</access>
24982                    </field>
24983                    <field>
24984                        <name>GPIO10_EDGE_HIGH</name>
24985                        <bitRange>[11:11]</bitRange>
24986                        <access>read-write</access>
24987                    </field>
24988                    <field>
24989                        <name>GPIO10_EDGE_LOW</name>
24990                        <bitRange>[10:10]</bitRange>
24991                        <access>read-write</access>
24992                    </field>
24993                    <field>
24994                        <name>GPIO10_LEVEL_HIGH</name>
24995                        <bitRange>[9:9]</bitRange>
24996                        <access>read-write</access>
24997                    </field>
24998                    <field>
24999                        <name>GPIO10_LEVEL_LOW</name>
25000                        <bitRange>[8:8]</bitRange>
25001                        <access>read-write</access>
25002                    </field>
25003                    <field>
25004                        <name>GPIO9_EDGE_HIGH</name>
25005                        <bitRange>[7:7]</bitRange>
25006                        <access>read-write</access>
25007                    </field>
25008                    <field>
25009                        <name>GPIO9_EDGE_LOW</name>
25010                        <bitRange>[6:6]</bitRange>
25011                        <access>read-write</access>
25012                    </field>
25013                    <field>
25014                        <name>GPIO9_LEVEL_HIGH</name>
25015                        <bitRange>[5:5]</bitRange>
25016                        <access>read-write</access>
25017                    </field>
25018                    <field>
25019                        <name>GPIO9_LEVEL_LOW</name>
25020                        <bitRange>[4:4]</bitRange>
25021                        <access>read-write</access>
25022                    </field>
25023                    <field>
25024                        <name>GPIO8_EDGE_HIGH</name>
25025                        <bitRange>[3:3]</bitRange>
25026                        <access>read-write</access>
25027                    </field>
25028                    <field>
25029                        <name>GPIO8_EDGE_LOW</name>
25030                        <bitRange>[2:2]</bitRange>
25031                        <access>read-write</access>
25032                    </field>
25033                    <field>
25034                        <name>GPIO8_LEVEL_HIGH</name>
25035                        <bitRange>[1:1]</bitRange>
25036                        <access>read-write</access>
25037                    </field>
25038                    <field>
25039                        <name>GPIO8_LEVEL_LOW</name>
25040                        <bitRange>[0:0]</bitRange>
25041                        <access>read-write</access>
25042                    </field>
25043                </fields>
25044            </register>
25045            <register>
25046                <name>PROC0_INTF2</name>
25047                <addressOffset>0x00000268</addressOffset>
25048                <description>Interrupt Force for proc0</description>
25049                <resetValue>0x00000000</resetValue>
25050                <fields>
25051                    <field>
25052                        <name>GPIO23_EDGE_HIGH</name>
25053                        <bitRange>[31:31]</bitRange>
25054                        <access>read-write</access>
25055                    </field>
25056                    <field>
25057                        <name>GPIO23_EDGE_LOW</name>
25058                        <bitRange>[30:30]</bitRange>
25059                        <access>read-write</access>
25060                    </field>
25061                    <field>
25062                        <name>GPIO23_LEVEL_HIGH</name>
25063                        <bitRange>[29:29]</bitRange>
25064                        <access>read-write</access>
25065                    </field>
25066                    <field>
25067                        <name>GPIO23_LEVEL_LOW</name>
25068                        <bitRange>[28:28]</bitRange>
25069                        <access>read-write</access>
25070                    </field>
25071                    <field>
25072                        <name>GPIO22_EDGE_HIGH</name>
25073                        <bitRange>[27:27]</bitRange>
25074                        <access>read-write</access>
25075                    </field>
25076                    <field>
25077                        <name>GPIO22_EDGE_LOW</name>
25078                        <bitRange>[26:26]</bitRange>
25079                        <access>read-write</access>
25080                    </field>
25081                    <field>
25082                        <name>GPIO22_LEVEL_HIGH</name>
25083                        <bitRange>[25:25]</bitRange>
25084                        <access>read-write</access>
25085                    </field>
25086                    <field>
25087                        <name>GPIO22_LEVEL_LOW</name>
25088                        <bitRange>[24:24]</bitRange>
25089                        <access>read-write</access>
25090                    </field>
25091                    <field>
25092                        <name>GPIO21_EDGE_HIGH</name>
25093                        <bitRange>[23:23]</bitRange>
25094                        <access>read-write</access>
25095                    </field>
25096                    <field>
25097                        <name>GPIO21_EDGE_LOW</name>
25098                        <bitRange>[22:22]</bitRange>
25099                        <access>read-write</access>
25100                    </field>
25101                    <field>
25102                        <name>GPIO21_LEVEL_HIGH</name>
25103                        <bitRange>[21:21]</bitRange>
25104                        <access>read-write</access>
25105                    </field>
25106                    <field>
25107                        <name>GPIO21_LEVEL_LOW</name>
25108                        <bitRange>[20:20]</bitRange>
25109                        <access>read-write</access>
25110                    </field>
25111                    <field>
25112                        <name>GPIO20_EDGE_HIGH</name>
25113                        <bitRange>[19:19]</bitRange>
25114                        <access>read-write</access>
25115                    </field>
25116                    <field>
25117                        <name>GPIO20_EDGE_LOW</name>
25118                        <bitRange>[18:18]</bitRange>
25119                        <access>read-write</access>
25120                    </field>
25121                    <field>
25122                        <name>GPIO20_LEVEL_HIGH</name>
25123                        <bitRange>[17:17]</bitRange>
25124                        <access>read-write</access>
25125                    </field>
25126                    <field>
25127                        <name>GPIO20_LEVEL_LOW</name>
25128                        <bitRange>[16:16]</bitRange>
25129                        <access>read-write</access>
25130                    </field>
25131                    <field>
25132                        <name>GPIO19_EDGE_HIGH</name>
25133                        <bitRange>[15:15]</bitRange>
25134                        <access>read-write</access>
25135                    </field>
25136                    <field>
25137                        <name>GPIO19_EDGE_LOW</name>
25138                        <bitRange>[14:14]</bitRange>
25139                        <access>read-write</access>
25140                    </field>
25141                    <field>
25142                        <name>GPIO19_LEVEL_HIGH</name>
25143                        <bitRange>[13:13]</bitRange>
25144                        <access>read-write</access>
25145                    </field>
25146                    <field>
25147                        <name>GPIO19_LEVEL_LOW</name>
25148                        <bitRange>[12:12]</bitRange>
25149                        <access>read-write</access>
25150                    </field>
25151                    <field>
25152                        <name>GPIO18_EDGE_HIGH</name>
25153                        <bitRange>[11:11]</bitRange>
25154                        <access>read-write</access>
25155                    </field>
25156                    <field>
25157                        <name>GPIO18_EDGE_LOW</name>
25158                        <bitRange>[10:10]</bitRange>
25159                        <access>read-write</access>
25160                    </field>
25161                    <field>
25162                        <name>GPIO18_LEVEL_HIGH</name>
25163                        <bitRange>[9:9]</bitRange>
25164                        <access>read-write</access>
25165                    </field>
25166                    <field>
25167                        <name>GPIO18_LEVEL_LOW</name>
25168                        <bitRange>[8:8]</bitRange>
25169                        <access>read-write</access>
25170                    </field>
25171                    <field>
25172                        <name>GPIO17_EDGE_HIGH</name>
25173                        <bitRange>[7:7]</bitRange>
25174                        <access>read-write</access>
25175                    </field>
25176                    <field>
25177                        <name>GPIO17_EDGE_LOW</name>
25178                        <bitRange>[6:6]</bitRange>
25179                        <access>read-write</access>
25180                    </field>
25181                    <field>
25182                        <name>GPIO17_LEVEL_HIGH</name>
25183                        <bitRange>[5:5]</bitRange>
25184                        <access>read-write</access>
25185                    </field>
25186                    <field>
25187                        <name>GPIO17_LEVEL_LOW</name>
25188                        <bitRange>[4:4]</bitRange>
25189                        <access>read-write</access>
25190                    </field>
25191                    <field>
25192                        <name>GPIO16_EDGE_HIGH</name>
25193                        <bitRange>[3:3]</bitRange>
25194                        <access>read-write</access>
25195                    </field>
25196                    <field>
25197                        <name>GPIO16_EDGE_LOW</name>
25198                        <bitRange>[2:2]</bitRange>
25199                        <access>read-write</access>
25200                    </field>
25201                    <field>
25202                        <name>GPIO16_LEVEL_HIGH</name>
25203                        <bitRange>[1:1]</bitRange>
25204                        <access>read-write</access>
25205                    </field>
25206                    <field>
25207                        <name>GPIO16_LEVEL_LOW</name>
25208                        <bitRange>[0:0]</bitRange>
25209                        <access>read-write</access>
25210                    </field>
25211                </fields>
25212            </register>
25213            <register>
25214                <name>PROC0_INTF3</name>
25215                <addressOffset>0x0000026c</addressOffset>
25216                <description>Interrupt Force for proc0</description>
25217                <resetValue>0x00000000</resetValue>
25218                <fields>
25219                    <field>
25220                        <name>GPIO31_EDGE_HIGH</name>
25221                        <bitRange>[31:31]</bitRange>
25222                        <access>read-write</access>
25223                    </field>
25224                    <field>
25225                        <name>GPIO31_EDGE_LOW</name>
25226                        <bitRange>[30:30]</bitRange>
25227                        <access>read-write</access>
25228                    </field>
25229                    <field>
25230                        <name>GPIO31_LEVEL_HIGH</name>
25231                        <bitRange>[29:29]</bitRange>
25232                        <access>read-write</access>
25233                    </field>
25234                    <field>
25235                        <name>GPIO31_LEVEL_LOW</name>
25236                        <bitRange>[28:28]</bitRange>
25237                        <access>read-write</access>
25238                    </field>
25239                    <field>
25240                        <name>GPIO30_EDGE_HIGH</name>
25241                        <bitRange>[27:27]</bitRange>
25242                        <access>read-write</access>
25243                    </field>
25244                    <field>
25245                        <name>GPIO30_EDGE_LOW</name>
25246                        <bitRange>[26:26]</bitRange>
25247                        <access>read-write</access>
25248                    </field>
25249                    <field>
25250                        <name>GPIO30_LEVEL_HIGH</name>
25251                        <bitRange>[25:25]</bitRange>
25252                        <access>read-write</access>
25253                    </field>
25254                    <field>
25255                        <name>GPIO30_LEVEL_LOW</name>
25256                        <bitRange>[24:24]</bitRange>
25257                        <access>read-write</access>
25258                    </field>
25259                    <field>
25260                        <name>GPIO29_EDGE_HIGH</name>
25261                        <bitRange>[23:23]</bitRange>
25262                        <access>read-write</access>
25263                    </field>
25264                    <field>
25265                        <name>GPIO29_EDGE_LOW</name>
25266                        <bitRange>[22:22]</bitRange>
25267                        <access>read-write</access>
25268                    </field>
25269                    <field>
25270                        <name>GPIO29_LEVEL_HIGH</name>
25271                        <bitRange>[21:21]</bitRange>
25272                        <access>read-write</access>
25273                    </field>
25274                    <field>
25275                        <name>GPIO29_LEVEL_LOW</name>
25276                        <bitRange>[20:20]</bitRange>
25277                        <access>read-write</access>
25278                    </field>
25279                    <field>
25280                        <name>GPIO28_EDGE_HIGH</name>
25281                        <bitRange>[19:19]</bitRange>
25282                        <access>read-write</access>
25283                    </field>
25284                    <field>
25285                        <name>GPIO28_EDGE_LOW</name>
25286                        <bitRange>[18:18]</bitRange>
25287                        <access>read-write</access>
25288                    </field>
25289                    <field>
25290                        <name>GPIO28_LEVEL_HIGH</name>
25291                        <bitRange>[17:17]</bitRange>
25292                        <access>read-write</access>
25293                    </field>
25294                    <field>
25295                        <name>GPIO28_LEVEL_LOW</name>
25296                        <bitRange>[16:16]</bitRange>
25297                        <access>read-write</access>
25298                    </field>
25299                    <field>
25300                        <name>GPIO27_EDGE_HIGH</name>
25301                        <bitRange>[15:15]</bitRange>
25302                        <access>read-write</access>
25303                    </field>
25304                    <field>
25305                        <name>GPIO27_EDGE_LOW</name>
25306                        <bitRange>[14:14]</bitRange>
25307                        <access>read-write</access>
25308                    </field>
25309                    <field>
25310                        <name>GPIO27_LEVEL_HIGH</name>
25311                        <bitRange>[13:13]</bitRange>
25312                        <access>read-write</access>
25313                    </field>
25314                    <field>
25315                        <name>GPIO27_LEVEL_LOW</name>
25316                        <bitRange>[12:12]</bitRange>
25317                        <access>read-write</access>
25318                    </field>
25319                    <field>
25320                        <name>GPIO26_EDGE_HIGH</name>
25321                        <bitRange>[11:11]</bitRange>
25322                        <access>read-write</access>
25323                    </field>
25324                    <field>
25325                        <name>GPIO26_EDGE_LOW</name>
25326                        <bitRange>[10:10]</bitRange>
25327                        <access>read-write</access>
25328                    </field>
25329                    <field>
25330                        <name>GPIO26_LEVEL_HIGH</name>
25331                        <bitRange>[9:9]</bitRange>
25332                        <access>read-write</access>
25333                    </field>
25334                    <field>
25335                        <name>GPIO26_LEVEL_LOW</name>
25336                        <bitRange>[8:8]</bitRange>
25337                        <access>read-write</access>
25338                    </field>
25339                    <field>
25340                        <name>GPIO25_EDGE_HIGH</name>
25341                        <bitRange>[7:7]</bitRange>
25342                        <access>read-write</access>
25343                    </field>
25344                    <field>
25345                        <name>GPIO25_EDGE_LOW</name>
25346                        <bitRange>[6:6]</bitRange>
25347                        <access>read-write</access>
25348                    </field>
25349                    <field>
25350                        <name>GPIO25_LEVEL_HIGH</name>
25351                        <bitRange>[5:5]</bitRange>
25352                        <access>read-write</access>
25353                    </field>
25354                    <field>
25355                        <name>GPIO25_LEVEL_LOW</name>
25356                        <bitRange>[4:4]</bitRange>
25357                        <access>read-write</access>
25358                    </field>
25359                    <field>
25360                        <name>GPIO24_EDGE_HIGH</name>
25361                        <bitRange>[3:3]</bitRange>
25362                        <access>read-write</access>
25363                    </field>
25364                    <field>
25365                        <name>GPIO24_EDGE_LOW</name>
25366                        <bitRange>[2:2]</bitRange>
25367                        <access>read-write</access>
25368                    </field>
25369                    <field>
25370                        <name>GPIO24_LEVEL_HIGH</name>
25371                        <bitRange>[1:1]</bitRange>
25372                        <access>read-write</access>
25373                    </field>
25374                    <field>
25375                        <name>GPIO24_LEVEL_LOW</name>
25376                        <bitRange>[0:0]</bitRange>
25377                        <access>read-write</access>
25378                    </field>
25379                </fields>
25380            </register>
25381            <register>
25382                <name>PROC0_INTF4</name>
25383                <addressOffset>0x00000270</addressOffset>
25384                <description>Interrupt Force for proc0</description>
25385                <resetValue>0x00000000</resetValue>
25386                <fields>
25387                    <field>
25388                        <name>GPIO39_EDGE_HIGH</name>
25389                        <bitRange>[31:31]</bitRange>
25390                        <access>read-write</access>
25391                    </field>
25392                    <field>
25393                        <name>GPIO39_EDGE_LOW</name>
25394                        <bitRange>[30:30]</bitRange>
25395                        <access>read-write</access>
25396                    </field>
25397                    <field>
25398                        <name>GPIO39_LEVEL_HIGH</name>
25399                        <bitRange>[29:29]</bitRange>
25400                        <access>read-write</access>
25401                    </field>
25402                    <field>
25403                        <name>GPIO39_LEVEL_LOW</name>
25404                        <bitRange>[28:28]</bitRange>
25405                        <access>read-write</access>
25406                    </field>
25407                    <field>
25408                        <name>GPIO38_EDGE_HIGH</name>
25409                        <bitRange>[27:27]</bitRange>
25410                        <access>read-write</access>
25411                    </field>
25412                    <field>
25413                        <name>GPIO38_EDGE_LOW</name>
25414                        <bitRange>[26:26]</bitRange>
25415                        <access>read-write</access>
25416                    </field>
25417                    <field>
25418                        <name>GPIO38_LEVEL_HIGH</name>
25419                        <bitRange>[25:25]</bitRange>
25420                        <access>read-write</access>
25421                    </field>
25422                    <field>
25423                        <name>GPIO38_LEVEL_LOW</name>
25424                        <bitRange>[24:24]</bitRange>
25425                        <access>read-write</access>
25426                    </field>
25427                    <field>
25428                        <name>GPIO37_EDGE_HIGH</name>
25429                        <bitRange>[23:23]</bitRange>
25430                        <access>read-write</access>
25431                    </field>
25432                    <field>
25433                        <name>GPIO37_EDGE_LOW</name>
25434                        <bitRange>[22:22]</bitRange>
25435                        <access>read-write</access>
25436                    </field>
25437                    <field>
25438                        <name>GPIO37_LEVEL_HIGH</name>
25439                        <bitRange>[21:21]</bitRange>
25440                        <access>read-write</access>
25441                    </field>
25442                    <field>
25443                        <name>GPIO37_LEVEL_LOW</name>
25444                        <bitRange>[20:20]</bitRange>
25445                        <access>read-write</access>
25446                    </field>
25447                    <field>
25448                        <name>GPIO36_EDGE_HIGH</name>
25449                        <bitRange>[19:19]</bitRange>
25450                        <access>read-write</access>
25451                    </field>
25452                    <field>
25453                        <name>GPIO36_EDGE_LOW</name>
25454                        <bitRange>[18:18]</bitRange>
25455                        <access>read-write</access>
25456                    </field>
25457                    <field>
25458                        <name>GPIO36_LEVEL_HIGH</name>
25459                        <bitRange>[17:17]</bitRange>
25460                        <access>read-write</access>
25461                    </field>
25462                    <field>
25463                        <name>GPIO36_LEVEL_LOW</name>
25464                        <bitRange>[16:16]</bitRange>
25465                        <access>read-write</access>
25466                    </field>
25467                    <field>
25468                        <name>GPIO35_EDGE_HIGH</name>
25469                        <bitRange>[15:15]</bitRange>
25470                        <access>read-write</access>
25471                    </field>
25472                    <field>
25473                        <name>GPIO35_EDGE_LOW</name>
25474                        <bitRange>[14:14]</bitRange>
25475                        <access>read-write</access>
25476                    </field>
25477                    <field>
25478                        <name>GPIO35_LEVEL_HIGH</name>
25479                        <bitRange>[13:13]</bitRange>
25480                        <access>read-write</access>
25481                    </field>
25482                    <field>
25483                        <name>GPIO35_LEVEL_LOW</name>
25484                        <bitRange>[12:12]</bitRange>
25485                        <access>read-write</access>
25486                    </field>
25487                    <field>
25488                        <name>GPIO34_EDGE_HIGH</name>
25489                        <bitRange>[11:11]</bitRange>
25490                        <access>read-write</access>
25491                    </field>
25492                    <field>
25493                        <name>GPIO34_EDGE_LOW</name>
25494                        <bitRange>[10:10]</bitRange>
25495                        <access>read-write</access>
25496                    </field>
25497                    <field>
25498                        <name>GPIO34_LEVEL_HIGH</name>
25499                        <bitRange>[9:9]</bitRange>
25500                        <access>read-write</access>
25501                    </field>
25502                    <field>
25503                        <name>GPIO34_LEVEL_LOW</name>
25504                        <bitRange>[8:8]</bitRange>
25505                        <access>read-write</access>
25506                    </field>
25507                    <field>
25508                        <name>GPIO33_EDGE_HIGH</name>
25509                        <bitRange>[7:7]</bitRange>
25510                        <access>read-write</access>
25511                    </field>
25512                    <field>
25513                        <name>GPIO33_EDGE_LOW</name>
25514                        <bitRange>[6:6]</bitRange>
25515                        <access>read-write</access>
25516                    </field>
25517                    <field>
25518                        <name>GPIO33_LEVEL_HIGH</name>
25519                        <bitRange>[5:5]</bitRange>
25520                        <access>read-write</access>
25521                    </field>
25522                    <field>
25523                        <name>GPIO33_LEVEL_LOW</name>
25524                        <bitRange>[4:4]</bitRange>
25525                        <access>read-write</access>
25526                    </field>
25527                    <field>
25528                        <name>GPIO32_EDGE_HIGH</name>
25529                        <bitRange>[3:3]</bitRange>
25530                        <access>read-write</access>
25531                    </field>
25532                    <field>
25533                        <name>GPIO32_EDGE_LOW</name>
25534                        <bitRange>[2:2]</bitRange>
25535                        <access>read-write</access>
25536                    </field>
25537                    <field>
25538                        <name>GPIO32_LEVEL_HIGH</name>
25539                        <bitRange>[1:1]</bitRange>
25540                        <access>read-write</access>
25541                    </field>
25542                    <field>
25543                        <name>GPIO32_LEVEL_LOW</name>
25544                        <bitRange>[0:0]</bitRange>
25545                        <access>read-write</access>
25546                    </field>
25547                </fields>
25548            </register>
25549            <register>
25550                <name>PROC0_INTF5</name>
25551                <addressOffset>0x00000274</addressOffset>
25552                <description>Interrupt Force for proc0</description>
25553                <resetValue>0x00000000</resetValue>
25554                <fields>
25555                    <field>
25556                        <name>GPIO47_EDGE_HIGH</name>
25557                        <bitRange>[31:31]</bitRange>
25558                        <access>read-write</access>
25559                    </field>
25560                    <field>
25561                        <name>GPIO47_EDGE_LOW</name>
25562                        <bitRange>[30:30]</bitRange>
25563                        <access>read-write</access>
25564                    </field>
25565                    <field>
25566                        <name>GPIO47_LEVEL_HIGH</name>
25567                        <bitRange>[29:29]</bitRange>
25568                        <access>read-write</access>
25569                    </field>
25570                    <field>
25571                        <name>GPIO47_LEVEL_LOW</name>
25572                        <bitRange>[28:28]</bitRange>
25573                        <access>read-write</access>
25574                    </field>
25575                    <field>
25576                        <name>GPIO46_EDGE_HIGH</name>
25577                        <bitRange>[27:27]</bitRange>
25578                        <access>read-write</access>
25579                    </field>
25580                    <field>
25581                        <name>GPIO46_EDGE_LOW</name>
25582                        <bitRange>[26:26]</bitRange>
25583                        <access>read-write</access>
25584                    </field>
25585                    <field>
25586                        <name>GPIO46_LEVEL_HIGH</name>
25587                        <bitRange>[25:25]</bitRange>
25588                        <access>read-write</access>
25589                    </field>
25590                    <field>
25591                        <name>GPIO46_LEVEL_LOW</name>
25592                        <bitRange>[24:24]</bitRange>
25593                        <access>read-write</access>
25594                    </field>
25595                    <field>
25596                        <name>GPIO45_EDGE_HIGH</name>
25597                        <bitRange>[23:23]</bitRange>
25598                        <access>read-write</access>
25599                    </field>
25600                    <field>
25601                        <name>GPIO45_EDGE_LOW</name>
25602                        <bitRange>[22:22]</bitRange>
25603                        <access>read-write</access>
25604                    </field>
25605                    <field>
25606                        <name>GPIO45_LEVEL_HIGH</name>
25607                        <bitRange>[21:21]</bitRange>
25608                        <access>read-write</access>
25609                    </field>
25610                    <field>
25611                        <name>GPIO45_LEVEL_LOW</name>
25612                        <bitRange>[20:20]</bitRange>
25613                        <access>read-write</access>
25614                    </field>
25615                    <field>
25616                        <name>GPIO44_EDGE_HIGH</name>
25617                        <bitRange>[19:19]</bitRange>
25618                        <access>read-write</access>
25619                    </field>
25620                    <field>
25621                        <name>GPIO44_EDGE_LOW</name>
25622                        <bitRange>[18:18]</bitRange>
25623                        <access>read-write</access>
25624                    </field>
25625                    <field>
25626                        <name>GPIO44_LEVEL_HIGH</name>
25627                        <bitRange>[17:17]</bitRange>
25628                        <access>read-write</access>
25629                    </field>
25630                    <field>
25631                        <name>GPIO44_LEVEL_LOW</name>
25632                        <bitRange>[16:16]</bitRange>
25633                        <access>read-write</access>
25634                    </field>
25635                    <field>
25636                        <name>GPIO43_EDGE_HIGH</name>
25637                        <bitRange>[15:15]</bitRange>
25638                        <access>read-write</access>
25639                    </field>
25640                    <field>
25641                        <name>GPIO43_EDGE_LOW</name>
25642                        <bitRange>[14:14]</bitRange>
25643                        <access>read-write</access>
25644                    </field>
25645                    <field>
25646                        <name>GPIO43_LEVEL_HIGH</name>
25647                        <bitRange>[13:13]</bitRange>
25648                        <access>read-write</access>
25649                    </field>
25650                    <field>
25651                        <name>GPIO43_LEVEL_LOW</name>
25652                        <bitRange>[12:12]</bitRange>
25653                        <access>read-write</access>
25654                    </field>
25655                    <field>
25656                        <name>GPIO42_EDGE_HIGH</name>
25657                        <bitRange>[11:11]</bitRange>
25658                        <access>read-write</access>
25659                    </field>
25660                    <field>
25661                        <name>GPIO42_EDGE_LOW</name>
25662                        <bitRange>[10:10]</bitRange>
25663                        <access>read-write</access>
25664                    </field>
25665                    <field>
25666                        <name>GPIO42_LEVEL_HIGH</name>
25667                        <bitRange>[9:9]</bitRange>
25668                        <access>read-write</access>
25669                    </field>
25670                    <field>
25671                        <name>GPIO42_LEVEL_LOW</name>
25672                        <bitRange>[8:8]</bitRange>
25673                        <access>read-write</access>
25674                    </field>
25675                    <field>
25676                        <name>GPIO41_EDGE_HIGH</name>
25677                        <bitRange>[7:7]</bitRange>
25678                        <access>read-write</access>
25679                    </field>
25680                    <field>
25681                        <name>GPIO41_EDGE_LOW</name>
25682                        <bitRange>[6:6]</bitRange>
25683                        <access>read-write</access>
25684                    </field>
25685                    <field>
25686                        <name>GPIO41_LEVEL_HIGH</name>
25687                        <bitRange>[5:5]</bitRange>
25688                        <access>read-write</access>
25689                    </field>
25690                    <field>
25691                        <name>GPIO41_LEVEL_LOW</name>
25692                        <bitRange>[4:4]</bitRange>
25693                        <access>read-write</access>
25694                    </field>
25695                    <field>
25696                        <name>GPIO40_EDGE_HIGH</name>
25697                        <bitRange>[3:3]</bitRange>
25698                        <access>read-write</access>
25699                    </field>
25700                    <field>
25701                        <name>GPIO40_EDGE_LOW</name>
25702                        <bitRange>[2:2]</bitRange>
25703                        <access>read-write</access>
25704                    </field>
25705                    <field>
25706                        <name>GPIO40_LEVEL_HIGH</name>
25707                        <bitRange>[1:1]</bitRange>
25708                        <access>read-write</access>
25709                    </field>
25710                    <field>
25711                        <name>GPIO40_LEVEL_LOW</name>
25712                        <bitRange>[0:0]</bitRange>
25713                        <access>read-write</access>
25714                    </field>
25715                </fields>
25716            </register>
25717            <register>
25718                <name>PROC0_INTS0</name>
25719                <addressOffset>0x00000278</addressOffset>
25720                <description>Interrupt status after masking &amp; forcing for proc0</description>
25721                <resetValue>0x00000000</resetValue>
25722                <fields>
25723                    <field>
25724                        <name>GPIO7_EDGE_HIGH</name>
25725                        <bitRange>[31:31]</bitRange>
25726                        <access>read-only</access>
25727                    </field>
25728                    <field>
25729                        <name>GPIO7_EDGE_LOW</name>
25730                        <bitRange>[30:30]</bitRange>
25731                        <access>read-only</access>
25732                    </field>
25733                    <field>
25734                        <name>GPIO7_LEVEL_HIGH</name>
25735                        <bitRange>[29:29]</bitRange>
25736                        <access>read-only</access>
25737                    </field>
25738                    <field>
25739                        <name>GPIO7_LEVEL_LOW</name>
25740                        <bitRange>[28:28]</bitRange>
25741                        <access>read-only</access>
25742                    </field>
25743                    <field>
25744                        <name>GPIO6_EDGE_HIGH</name>
25745                        <bitRange>[27:27]</bitRange>
25746                        <access>read-only</access>
25747                    </field>
25748                    <field>
25749                        <name>GPIO6_EDGE_LOW</name>
25750                        <bitRange>[26:26]</bitRange>
25751                        <access>read-only</access>
25752                    </field>
25753                    <field>
25754                        <name>GPIO6_LEVEL_HIGH</name>
25755                        <bitRange>[25:25]</bitRange>
25756                        <access>read-only</access>
25757                    </field>
25758                    <field>
25759                        <name>GPIO6_LEVEL_LOW</name>
25760                        <bitRange>[24:24]</bitRange>
25761                        <access>read-only</access>
25762                    </field>
25763                    <field>
25764                        <name>GPIO5_EDGE_HIGH</name>
25765                        <bitRange>[23:23]</bitRange>
25766                        <access>read-only</access>
25767                    </field>
25768                    <field>
25769                        <name>GPIO5_EDGE_LOW</name>
25770                        <bitRange>[22:22]</bitRange>
25771                        <access>read-only</access>
25772                    </field>
25773                    <field>
25774                        <name>GPIO5_LEVEL_HIGH</name>
25775                        <bitRange>[21:21]</bitRange>
25776                        <access>read-only</access>
25777                    </field>
25778                    <field>
25779                        <name>GPIO5_LEVEL_LOW</name>
25780                        <bitRange>[20:20]</bitRange>
25781                        <access>read-only</access>
25782                    </field>
25783                    <field>
25784                        <name>GPIO4_EDGE_HIGH</name>
25785                        <bitRange>[19:19]</bitRange>
25786                        <access>read-only</access>
25787                    </field>
25788                    <field>
25789                        <name>GPIO4_EDGE_LOW</name>
25790                        <bitRange>[18:18]</bitRange>
25791                        <access>read-only</access>
25792                    </field>
25793                    <field>
25794                        <name>GPIO4_LEVEL_HIGH</name>
25795                        <bitRange>[17:17]</bitRange>
25796                        <access>read-only</access>
25797                    </field>
25798                    <field>
25799                        <name>GPIO4_LEVEL_LOW</name>
25800                        <bitRange>[16:16]</bitRange>
25801                        <access>read-only</access>
25802                    </field>
25803                    <field>
25804                        <name>GPIO3_EDGE_HIGH</name>
25805                        <bitRange>[15:15]</bitRange>
25806                        <access>read-only</access>
25807                    </field>
25808                    <field>
25809                        <name>GPIO3_EDGE_LOW</name>
25810                        <bitRange>[14:14]</bitRange>
25811                        <access>read-only</access>
25812                    </field>
25813                    <field>
25814                        <name>GPIO3_LEVEL_HIGH</name>
25815                        <bitRange>[13:13]</bitRange>
25816                        <access>read-only</access>
25817                    </field>
25818                    <field>
25819                        <name>GPIO3_LEVEL_LOW</name>
25820                        <bitRange>[12:12]</bitRange>
25821                        <access>read-only</access>
25822                    </field>
25823                    <field>
25824                        <name>GPIO2_EDGE_HIGH</name>
25825                        <bitRange>[11:11]</bitRange>
25826                        <access>read-only</access>
25827                    </field>
25828                    <field>
25829                        <name>GPIO2_EDGE_LOW</name>
25830                        <bitRange>[10:10]</bitRange>
25831                        <access>read-only</access>
25832                    </field>
25833                    <field>
25834                        <name>GPIO2_LEVEL_HIGH</name>
25835                        <bitRange>[9:9]</bitRange>
25836                        <access>read-only</access>
25837                    </field>
25838                    <field>
25839                        <name>GPIO2_LEVEL_LOW</name>
25840                        <bitRange>[8:8]</bitRange>
25841                        <access>read-only</access>
25842                    </field>
25843                    <field>
25844                        <name>GPIO1_EDGE_HIGH</name>
25845                        <bitRange>[7:7]</bitRange>
25846                        <access>read-only</access>
25847                    </field>
25848                    <field>
25849                        <name>GPIO1_EDGE_LOW</name>
25850                        <bitRange>[6:6]</bitRange>
25851                        <access>read-only</access>
25852                    </field>
25853                    <field>
25854                        <name>GPIO1_LEVEL_HIGH</name>
25855                        <bitRange>[5:5]</bitRange>
25856                        <access>read-only</access>
25857                    </field>
25858                    <field>
25859                        <name>GPIO1_LEVEL_LOW</name>
25860                        <bitRange>[4:4]</bitRange>
25861                        <access>read-only</access>
25862                    </field>
25863                    <field>
25864                        <name>GPIO0_EDGE_HIGH</name>
25865                        <bitRange>[3:3]</bitRange>
25866                        <access>read-only</access>
25867                    </field>
25868                    <field>
25869                        <name>GPIO0_EDGE_LOW</name>
25870                        <bitRange>[2:2]</bitRange>
25871                        <access>read-only</access>
25872                    </field>
25873                    <field>
25874                        <name>GPIO0_LEVEL_HIGH</name>
25875                        <bitRange>[1:1]</bitRange>
25876                        <access>read-only</access>
25877                    </field>
25878                    <field>
25879                        <name>GPIO0_LEVEL_LOW</name>
25880                        <bitRange>[0:0]</bitRange>
25881                        <access>read-only</access>
25882                    </field>
25883                </fields>
25884            </register>
25885            <register>
25886                <name>PROC0_INTS1</name>
25887                <addressOffset>0x0000027c</addressOffset>
25888                <description>Interrupt status after masking &amp; forcing for proc0</description>
25889                <resetValue>0x00000000</resetValue>
25890                <fields>
25891                    <field>
25892                        <name>GPIO15_EDGE_HIGH</name>
25893                        <bitRange>[31:31]</bitRange>
25894                        <access>read-only</access>
25895                    </field>
25896                    <field>
25897                        <name>GPIO15_EDGE_LOW</name>
25898                        <bitRange>[30:30]</bitRange>
25899                        <access>read-only</access>
25900                    </field>
25901                    <field>
25902                        <name>GPIO15_LEVEL_HIGH</name>
25903                        <bitRange>[29:29]</bitRange>
25904                        <access>read-only</access>
25905                    </field>
25906                    <field>
25907                        <name>GPIO15_LEVEL_LOW</name>
25908                        <bitRange>[28:28]</bitRange>
25909                        <access>read-only</access>
25910                    </field>
25911                    <field>
25912                        <name>GPIO14_EDGE_HIGH</name>
25913                        <bitRange>[27:27]</bitRange>
25914                        <access>read-only</access>
25915                    </field>
25916                    <field>
25917                        <name>GPIO14_EDGE_LOW</name>
25918                        <bitRange>[26:26]</bitRange>
25919                        <access>read-only</access>
25920                    </field>
25921                    <field>
25922                        <name>GPIO14_LEVEL_HIGH</name>
25923                        <bitRange>[25:25]</bitRange>
25924                        <access>read-only</access>
25925                    </field>
25926                    <field>
25927                        <name>GPIO14_LEVEL_LOW</name>
25928                        <bitRange>[24:24]</bitRange>
25929                        <access>read-only</access>
25930                    </field>
25931                    <field>
25932                        <name>GPIO13_EDGE_HIGH</name>
25933                        <bitRange>[23:23]</bitRange>
25934                        <access>read-only</access>
25935                    </field>
25936                    <field>
25937                        <name>GPIO13_EDGE_LOW</name>
25938                        <bitRange>[22:22]</bitRange>
25939                        <access>read-only</access>
25940                    </field>
25941                    <field>
25942                        <name>GPIO13_LEVEL_HIGH</name>
25943                        <bitRange>[21:21]</bitRange>
25944                        <access>read-only</access>
25945                    </field>
25946                    <field>
25947                        <name>GPIO13_LEVEL_LOW</name>
25948                        <bitRange>[20:20]</bitRange>
25949                        <access>read-only</access>
25950                    </field>
25951                    <field>
25952                        <name>GPIO12_EDGE_HIGH</name>
25953                        <bitRange>[19:19]</bitRange>
25954                        <access>read-only</access>
25955                    </field>
25956                    <field>
25957                        <name>GPIO12_EDGE_LOW</name>
25958                        <bitRange>[18:18]</bitRange>
25959                        <access>read-only</access>
25960                    </field>
25961                    <field>
25962                        <name>GPIO12_LEVEL_HIGH</name>
25963                        <bitRange>[17:17]</bitRange>
25964                        <access>read-only</access>
25965                    </field>
25966                    <field>
25967                        <name>GPIO12_LEVEL_LOW</name>
25968                        <bitRange>[16:16]</bitRange>
25969                        <access>read-only</access>
25970                    </field>
25971                    <field>
25972                        <name>GPIO11_EDGE_HIGH</name>
25973                        <bitRange>[15:15]</bitRange>
25974                        <access>read-only</access>
25975                    </field>
25976                    <field>
25977                        <name>GPIO11_EDGE_LOW</name>
25978                        <bitRange>[14:14]</bitRange>
25979                        <access>read-only</access>
25980                    </field>
25981                    <field>
25982                        <name>GPIO11_LEVEL_HIGH</name>
25983                        <bitRange>[13:13]</bitRange>
25984                        <access>read-only</access>
25985                    </field>
25986                    <field>
25987                        <name>GPIO11_LEVEL_LOW</name>
25988                        <bitRange>[12:12]</bitRange>
25989                        <access>read-only</access>
25990                    </field>
25991                    <field>
25992                        <name>GPIO10_EDGE_HIGH</name>
25993                        <bitRange>[11:11]</bitRange>
25994                        <access>read-only</access>
25995                    </field>
25996                    <field>
25997                        <name>GPIO10_EDGE_LOW</name>
25998                        <bitRange>[10:10]</bitRange>
25999                        <access>read-only</access>
26000                    </field>
26001                    <field>
26002                        <name>GPIO10_LEVEL_HIGH</name>
26003                        <bitRange>[9:9]</bitRange>
26004                        <access>read-only</access>
26005                    </field>
26006                    <field>
26007                        <name>GPIO10_LEVEL_LOW</name>
26008                        <bitRange>[8:8]</bitRange>
26009                        <access>read-only</access>
26010                    </field>
26011                    <field>
26012                        <name>GPIO9_EDGE_HIGH</name>
26013                        <bitRange>[7:7]</bitRange>
26014                        <access>read-only</access>
26015                    </field>
26016                    <field>
26017                        <name>GPIO9_EDGE_LOW</name>
26018                        <bitRange>[6:6]</bitRange>
26019                        <access>read-only</access>
26020                    </field>
26021                    <field>
26022                        <name>GPIO9_LEVEL_HIGH</name>
26023                        <bitRange>[5:5]</bitRange>
26024                        <access>read-only</access>
26025                    </field>
26026                    <field>
26027                        <name>GPIO9_LEVEL_LOW</name>
26028                        <bitRange>[4:4]</bitRange>
26029                        <access>read-only</access>
26030                    </field>
26031                    <field>
26032                        <name>GPIO8_EDGE_HIGH</name>
26033                        <bitRange>[3:3]</bitRange>
26034                        <access>read-only</access>
26035                    </field>
26036                    <field>
26037                        <name>GPIO8_EDGE_LOW</name>
26038                        <bitRange>[2:2]</bitRange>
26039                        <access>read-only</access>
26040                    </field>
26041                    <field>
26042                        <name>GPIO8_LEVEL_HIGH</name>
26043                        <bitRange>[1:1]</bitRange>
26044                        <access>read-only</access>
26045                    </field>
26046                    <field>
26047                        <name>GPIO8_LEVEL_LOW</name>
26048                        <bitRange>[0:0]</bitRange>
26049                        <access>read-only</access>
26050                    </field>
26051                </fields>
26052            </register>
26053            <register>
26054                <name>PROC0_INTS2</name>
26055                <addressOffset>0x00000280</addressOffset>
26056                <description>Interrupt status after masking &amp; forcing for proc0</description>
26057                <resetValue>0x00000000</resetValue>
26058                <fields>
26059                    <field>
26060                        <name>GPIO23_EDGE_HIGH</name>
26061                        <bitRange>[31:31]</bitRange>
26062                        <access>read-only</access>
26063                    </field>
26064                    <field>
26065                        <name>GPIO23_EDGE_LOW</name>
26066                        <bitRange>[30:30]</bitRange>
26067                        <access>read-only</access>
26068                    </field>
26069                    <field>
26070                        <name>GPIO23_LEVEL_HIGH</name>
26071                        <bitRange>[29:29]</bitRange>
26072                        <access>read-only</access>
26073                    </field>
26074                    <field>
26075                        <name>GPIO23_LEVEL_LOW</name>
26076                        <bitRange>[28:28]</bitRange>
26077                        <access>read-only</access>
26078                    </field>
26079                    <field>
26080                        <name>GPIO22_EDGE_HIGH</name>
26081                        <bitRange>[27:27]</bitRange>
26082                        <access>read-only</access>
26083                    </field>
26084                    <field>
26085                        <name>GPIO22_EDGE_LOW</name>
26086                        <bitRange>[26:26]</bitRange>
26087                        <access>read-only</access>
26088                    </field>
26089                    <field>
26090                        <name>GPIO22_LEVEL_HIGH</name>
26091                        <bitRange>[25:25]</bitRange>
26092                        <access>read-only</access>
26093                    </field>
26094                    <field>
26095                        <name>GPIO22_LEVEL_LOW</name>
26096                        <bitRange>[24:24]</bitRange>
26097                        <access>read-only</access>
26098                    </field>
26099                    <field>
26100                        <name>GPIO21_EDGE_HIGH</name>
26101                        <bitRange>[23:23]</bitRange>
26102                        <access>read-only</access>
26103                    </field>
26104                    <field>
26105                        <name>GPIO21_EDGE_LOW</name>
26106                        <bitRange>[22:22]</bitRange>
26107                        <access>read-only</access>
26108                    </field>
26109                    <field>
26110                        <name>GPIO21_LEVEL_HIGH</name>
26111                        <bitRange>[21:21]</bitRange>
26112                        <access>read-only</access>
26113                    </field>
26114                    <field>
26115                        <name>GPIO21_LEVEL_LOW</name>
26116                        <bitRange>[20:20]</bitRange>
26117                        <access>read-only</access>
26118                    </field>
26119                    <field>
26120                        <name>GPIO20_EDGE_HIGH</name>
26121                        <bitRange>[19:19]</bitRange>
26122                        <access>read-only</access>
26123                    </field>
26124                    <field>
26125                        <name>GPIO20_EDGE_LOW</name>
26126                        <bitRange>[18:18]</bitRange>
26127                        <access>read-only</access>
26128                    </field>
26129                    <field>
26130                        <name>GPIO20_LEVEL_HIGH</name>
26131                        <bitRange>[17:17]</bitRange>
26132                        <access>read-only</access>
26133                    </field>
26134                    <field>
26135                        <name>GPIO20_LEVEL_LOW</name>
26136                        <bitRange>[16:16]</bitRange>
26137                        <access>read-only</access>
26138                    </field>
26139                    <field>
26140                        <name>GPIO19_EDGE_HIGH</name>
26141                        <bitRange>[15:15]</bitRange>
26142                        <access>read-only</access>
26143                    </field>
26144                    <field>
26145                        <name>GPIO19_EDGE_LOW</name>
26146                        <bitRange>[14:14]</bitRange>
26147                        <access>read-only</access>
26148                    </field>
26149                    <field>
26150                        <name>GPIO19_LEVEL_HIGH</name>
26151                        <bitRange>[13:13]</bitRange>
26152                        <access>read-only</access>
26153                    </field>
26154                    <field>
26155                        <name>GPIO19_LEVEL_LOW</name>
26156                        <bitRange>[12:12]</bitRange>
26157                        <access>read-only</access>
26158                    </field>
26159                    <field>
26160                        <name>GPIO18_EDGE_HIGH</name>
26161                        <bitRange>[11:11]</bitRange>
26162                        <access>read-only</access>
26163                    </field>
26164                    <field>
26165                        <name>GPIO18_EDGE_LOW</name>
26166                        <bitRange>[10:10]</bitRange>
26167                        <access>read-only</access>
26168                    </field>
26169                    <field>
26170                        <name>GPIO18_LEVEL_HIGH</name>
26171                        <bitRange>[9:9]</bitRange>
26172                        <access>read-only</access>
26173                    </field>
26174                    <field>
26175                        <name>GPIO18_LEVEL_LOW</name>
26176                        <bitRange>[8:8]</bitRange>
26177                        <access>read-only</access>
26178                    </field>
26179                    <field>
26180                        <name>GPIO17_EDGE_HIGH</name>
26181                        <bitRange>[7:7]</bitRange>
26182                        <access>read-only</access>
26183                    </field>
26184                    <field>
26185                        <name>GPIO17_EDGE_LOW</name>
26186                        <bitRange>[6:6]</bitRange>
26187                        <access>read-only</access>
26188                    </field>
26189                    <field>
26190                        <name>GPIO17_LEVEL_HIGH</name>
26191                        <bitRange>[5:5]</bitRange>
26192                        <access>read-only</access>
26193                    </field>
26194                    <field>
26195                        <name>GPIO17_LEVEL_LOW</name>
26196                        <bitRange>[4:4]</bitRange>
26197                        <access>read-only</access>
26198                    </field>
26199                    <field>
26200                        <name>GPIO16_EDGE_HIGH</name>
26201                        <bitRange>[3:3]</bitRange>
26202                        <access>read-only</access>
26203                    </field>
26204                    <field>
26205                        <name>GPIO16_EDGE_LOW</name>
26206                        <bitRange>[2:2]</bitRange>
26207                        <access>read-only</access>
26208                    </field>
26209                    <field>
26210                        <name>GPIO16_LEVEL_HIGH</name>
26211                        <bitRange>[1:1]</bitRange>
26212                        <access>read-only</access>
26213                    </field>
26214                    <field>
26215                        <name>GPIO16_LEVEL_LOW</name>
26216                        <bitRange>[0:0]</bitRange>
26217                        <access>read-only</access>
26218                    </field>
26219                </fields>
26220            </register>
26221            <register>
26222                <name>PROC0_INTS3</name>
26223                <addressOffset>0x00000284</addressOffset>
26224                <description>Interrupt status after masking &amp; forcing for proc0</description>
26225                <resetValue>0x00000000</resetValue>
26226                <fields>
26227                    <field>
26228                        <name>GPIO31_EDGE_HIGH</name>
26229                        <bitRange>[31:31]</bitRange>
26230                        <access>read-only</access>
26231                    </field>
26232                    <field>
26233                        <name>GPIO31_EDGE_LOW</name>
26234                        <bitRange>[30:30]</bitRange>
26235                        <access>read-only</access>
26236                    </field>
26237                    <field>
26238                        <name>GPIO31_LEVEL_HIGH</name>
26239                        <bitRange>[29:29]</bitRange>
26240                        <access>read-only</access>
26241                    </field>
26242                    <field>
26243                        <name>GPIO31_LEVEL_LOW</name>
26244                        <bitRange>[28:28]</bitRange>
26245                        <access>read-only</access>
26246                    </field>
26247                    <field>
26248                        <name>GPIO30_EDGE_HIGH</name>
26249                        <bitRange>[27:27]</bitRange>
26250                        <access>read-only</access>
26251                    </field>
26252                    <field>
26253                        <name>GPIO30_EDGE_LOW</name>
26254                        <bitRange>[26:26]</bitRange>
26255                        <access>read-only</access>
26256                    </field>
26257                    <field>
26258                        <name>GPIO30_LEVEL_HIGH</name>
26259                        <bitRange>[25:25]</bitRange>
26260                        <access>read-only</access>
26261                    </field>
26262                    <field>
26263                        <name>GPIO30_LEVEL_LOW</name>
26264                        <bitRange>[24:24]</bitRange>
26265                        <access>read-only</access>
26266                    </field>
26267                    <field>
26268                        <name>GPIO29_EDGE_HIGH</name>
26269                        <bitRange>[23:23]</bitRange>
26270                        <access>read-only</access>
26271                    </field>
26272                    <field>
26273                        <name>GPIO29_EDGE_LOW</name>
26274                        <bitRange>[22:22]</bitRange>
26275                        <access>read-only</access>
26276                    </field>
26277                    <field>
26278                        <name>GPIO29_LEVEL_HIGH</name>
26279                        <bitRange>[21:21]</bitRange>
26280                        <access>read-only</access>
26281                    </field>
26282                    <field>
26283                        <name>GPIO29_LEVEL_LOW</name>
26284                        <bitRange>[20:20]</bitRange>
26285                        <access>read-only</access>
26286                    </field>
26287                    <field>
26288                        <name>GPIO28_EDGE_HIGH</name>
26289                        <bitRange>[19:19]</bitRange>
26290                        <access>read-only</access>
26291                    </field>
26292                    <field>
26293                        <name>GPIO28_EDGE_LOW</name>
26294                        <bitRange>[18:18]</bitRange>
26295                        <access>read-only</access>
26296                    </field>
26297                    <field>
26298                        <name>GPIO28_LEVEL_HIGH</name>
26299                        <bitRange>[17:17]</bitRange>
26300                        <access>read-only</access>
26301                    </field>
26302                    <field>
26303                        <name>GPIO28_LEVEL_LOW</name>
26304                        <bitRange>[16:16]</bitRange>
26305                        <access>read-only</access>
26306                    </field>
26307                    <field>
26308                        <name>GPIO27_EDGE_HIGH</name>
26309                        <bitRange>[15:15]</bitRange>
26310                        <access>read-only</access>
26311                    </field>
26312                    <field>
26313                        <name>GPIO27_EDGE_LOW</name>
26314                        <bitRange>[14:14]</bitRange>
26315                        <access>read-only</access>
26316                    </field>
26317                    <field>
26318                        <name>GPIO27_LEVEL_HIGH</name>
26319                        <bitRange>[13:13]</bitRange>
26320                        <access>read-only</access>
26321                    </field>
26322                    <field>
26323                        <name>GPIO27_LEVEL_LOW</name>
26324                        <bitRange>[12:12]</bitRange>
26325                        <access>read-only</access>
26326                    </field>
26327                    <field>
26328                        <name>GPIO26_EDGE_HIGH</name>
26329                        <bitRange>[11:11]</bitRange>
26330                        <access>read-only</access>
26331                    </field>
26332                    <field>
26333                        <name>GPIO26_EDGE_LOW</name>
26334                        <bitRange>[10:10]</bitRange>
26335                        <access>read-only</access>
26336                    </field>
26337                    <field>
26338                        <name>GPIO26_LEVEL_HIGH</name>
26339                        <bitRange>[9:9]</bitRange>
26340                        <access>read-only</access>
26341                    </field>
26342                    <field>
26343                        <name>GPIO26_LEVEL_LOW</name>
26344                        <bitRange>[8:8]</bitRange>
26345                        <access>read-only</access>
26346                    </field>
26347                    <field>
26348                        <name>GPIO25_EDGE_HIGH</name>
26349                        <bitRange>[7:7]</bitRange>
26350                        <access>read-only</access>
26351                    </field>
26352                    <field>
26353                        <name>GPIO25_EDGE_LOW</name>
26354                        <bitRange>[6:6]</bitRange>
26355                        <access>read-only</access>
26356                    </field>
26357                    <field>
26358                        <name>GPIO25_LEVEL_HIGH</name>
26359                        <bitRange>[5:5]</bitRange>
26360                        <access>read-only</access>
26361                    </field>
26362                    <field>
26363                        <name>GPIO25_LEVEL_LOW</name>
26364                        <bitRange>[4:4]</bitRange>
26365                        <access>read-only</access>
26366                    </field>
26367                    <field>
26368                        <name>GPIO24_EDGE_HIGH</name>
26369                        <bitRange>[3:3]</bitRange>
26370                        <access>read-only</access>
26371                    </field>
26372                    <field>
26373                        <name>GPIO24_EDGE_LOW</name>
26374                        <bitRange>[2:2]</bitRange>
26375                        <access>read-only</access>
26376                    </field>
26377                    <field>
26378                        <name>GPIO24_LEVEL_HIGH</name>
26379                        <bitRange>[1:1]</bitRange>
26380                        <access>read-only</access>
26381                    </field>
26382                    <field>
26383                        <name>GPIO24_LEVEL_LOW</name>
26384                        <bitRange>[0:0]</bitRange>
26385                        <access>read-only</access>
26386                    </field>
26387                </fields>
26388            </register>
26389            <register>
26390                <name>PROC0_INTS4</name>
26391                <addressOffset>0x00000288</addressOffset>
26392                <description>Interrupt status after masking &amp; forcing for proc0</description>
26393                <resetValue>0x00000000</resetValue>
26394                <fields>
26395                    <field>
26396                        <name>GPIO39_EDGE_HIGH</name>
26397                        <bitRange>[31:31]</bitRange>
26398                        <access>read-only</access>
26399                    </field>
26400                    <field>
26401                        <name>GPIO39_EDGE_LOW</name>
26402                        <bitRange>[30:30]</bitRange>
26403                        <access>read-only</access>
26404                    </field>
26405                    <field>
26406                        <name>GPIO39_LEVEL_HIGH</name>
26407                        <bitRange>[29:29]</bitRange>
26408                        <access>read-only</access>
26409                    </field>
26410                    <field>
26411                        <name>GPIO39_LEVEL_LOW</name>
26412                        <bitRange>[28:28]</bitRange>
26413                        <access>read-only</access>
26414                    </field>
26415                    <field>
26416                        <name>GPIO38_EDGE_HIGH</name>
26417                        <bitRange>[27:27]</bitRange>
26418                        <access>read-only</access>
26419                    </field>
26420                    <field>
26421                        <name>GPIO38_EDGE_LOW</name>
26422                        <bitRange>[26:26]</bitRange>
26423                        <access>read-only</access>
26424                    </field>
26425                    <field>
26426                        <name>GPIO38_LEVEL_HIGH</name>
26427                        <bitRange>[25:25]</bitRange>
26428                        <access>read-only</access>
26429                    </field>
26430                    <field>
26431                        <name>GPIO38_LEVEL_LOW</name>
26432                        <bitRange>[24:24]</bitRange>
26433                        <access>read-only</access>
26434                    </field>
26435                    <field>
26436                        <name>GPIO37_EDGE_HIGH</name>
26437                        <bitRange>[23:23]</bitRange>
26438                        <access>read-only</access>
26439                    </field>
26440                    <field>
26441                        <name>GPIO37_EDGE_LOW</name>
26442                        <bitRange>[22:22]</bitRange>
26443                        <access>read-only</access>
26444                    </field>
26445                    <field>
26446                        <name>GPIO37_LEVEL_HIGH</name>
26447                        <bitRange>[21:21]</bitRange>
26448                        <access>read-only</access>
26449                    </field>
26450                    <field>
26451                        <name>GPIO37_LEVEL_LOW</name>
26452                        <bitRange>[20:20]</bitRange>
26453                        <access>read-only</access>
26454                    </field>
26455                    <field>
26456                        <name>GPIO36_EDGE_HIGH</name>
26457                        <bitRange>[19:19]</bitRange>
26458                        <access>read-only</access>
26459                    </field>
26460                    <field>
26461                        <name>GPIO36_EDGE_LOW</name>
26462                        <bitRange>[18:18]</bitRange>
26463                        <access>read-only</access>
26464                    </field>
26465                    <field>
26466                        <name>GPIO36_LEVEL_HIGH</name>
26467                        <bitRange>[17:17]</bitRange>
26468                        <access>read-only</access>
26469                    </field>
26470                    <field>
26471                        <name>GPIO36_LEVEL_LOW</name>
26472                        <bitRange>[16:16]</bitRange>
26473                        <access>read-only</access>
26474                    </field>
26475                    <field>
26476                        <name>GPIO35_EDGE_HIGH</name>
26477                        <bitRange>[15:15]</bitRange>
26478                        <access>read-only</access>
26479                    </field>
26480                    <field>
26481                        <name>GPIO35_EDGE_LOW</name>
26482                        <bitRange>[14:14]</bitRange>
26483                        <access>read-only</access>
26484                    </field>
26485                    <field>
26486                        <name>GPIO35_LEVEL_HIGH</name>
26487                        <bitRange>[13:13]</bitRange>
26488                        <access>read-only</access>
26489                    </field>
26490                    <field>
26491                        <name>GPIO35_LEVEL_LOW</name>
26492                        <bitRange>[12:12]</bitRange>
26493                        <access>read-only</access>
26494                    </field>
26495                    <field>
26496                        <name>GPIO34_EDGE_HIGH</name>
26497                        <bitRange>[11:11]</bitRange>
26498                        <access>read-only</access>
26499                    </field>
26500                    <field>
26501                        <name>GPIO34_EDGE_LOW</name>
26502                        <bitRange>[10:10]</bitRange>
26503                        <access>read-only</access>
26504                    </field>
26505                    <field>
26506                        <name>GPIO34_LEVEL_HIGH</name>
26507                        <bitRange>[9:9]</bitRange>
26508                        <access>read-only</access>
26509                    </field>
26510                    <field>
26511                        <name>GPIO34_LEVEL_LOW</name>
26512                        <bitRange>[8:8]</bitRange>
26513                        <access>read-only</access>
26514                    </field>
26515                    <field>
26516                        <name>GPIO33_EDGE_HIGH</name>
26517                        <bitRange>[7:7]</bitRange>
26518                        <access>read-only</access>
26519                    </field>
26520                    <field>
26521                        <name>GPIO33_EDGE_LOW</name>
26522                        <bitRange>[6:6]</bitRange>
26523                        <access>read-only</access>
26524                    </field>
26525                    <field>
26526                        <name>GPIO33_LEVEL_HIGH</name>
26527                        <bitRange>[5:5]</bitRange>
26528                        <access>read-only</access>
26529                    </field>
26530                    <field>
26531                        <name>GPIO33_LEVEL_LOW</name>
26532                        <bitRange>[4:4]</bitRange>
26533                        <access>read-only</access>
26534                    </field>
26535                    <field>
26536                        <name>GPIO32_EDGE_HIGH</name>
26537                        <bitRange>[3:3]</bitRange>
26538                        <access>read-only</access>
26539                    </field>
26540                    <field>
26541                        <name>GPIO32_EDGE_LOW</name>
26542                        <bitRange>[2:2]</bitRange>
26543                        <access>read-only</access>
26544                    </field>
26545                    <field>
26546                        <name>GPIO32_LEVEL_HIGH</name>
26547                        <bitRange>[1:1]</bitRange>
26548                        <access>read-only</access>
26549                    </field>
26550                    <field>
26551                        <name>GPIO32_LEVEL_LOW</name>
26552                        <bitRange>[0:0]</bitRange>
26553                        <access>read-only</access>
26554                    </field>
26555                </fields>
26556            </register>
26557            <register>
26558                <name>PROC0_INTS5</name>
26559                <addressOffset>0x0000028c</addressOffset>
26560                <description>Interrupt status after masking &amp; forcing for proc0</description>
26561                <resetValue>0x00000000</resetValue>
26562                <fields>
26563                    <field>
26564                        <name>GPIO47_EDGE_HIGH</name>
26565                        <bitRange>[31:31]</bitRange>
26566                        <access>read-only</access>
26567                    </field>
26568                    <field>
26569                        <name>GPIO47_EDGE_LOW</name>
26570                        <bitRange>[30:30]</bitRange>
26571                        <access>read-only</access>
26572                    </field>
26573                    <field>
26574                        <name>GPIO47_LEVEL_HIGH</name>
26575                        <bitRange>[29:29]</bitRange>
26576                        <access>read-only</access>
26577                    </field>
26578                    <field>
26579                        <name>GPIO47_LEVEL_LOW</name>
26580                        <bitRange>[28:28]</bitRange>
26581                        <access>read-only</access>
26582                    </field>
26583                    <field>
26584                        <name>GPIO46_EDGE_HIGH</name>
26585                        <bitRange>[27:27]</bitRange>
26586                        <access>read-only</access>
26587                    </field>
26588                    <field>
26589                        <name>GPIO46_EDGE_LOW</name>
26590                        <bitRange>[26:26]</bitRange>
26591                        <access>read-only</access>
26592                    </field>
26593                    <field>
26594                        <name>GPIO46_LEVEL_HIGH</name>
26595                        <bitRange>[25:25]</bitRange>
26596                        <access>read-only</access>
26597                    </field>
26598                    <field>
26599                        <name>GPIO46_LEVEL_LOW</name>
26600                        <bitRange>[24:24]</bitRange>
26601                        <access>read-only</access>
26602                    </field>
26603                    <field>
26604                        <name>GPIO45_EDGE_HIGH</name>
26605                        <bitRange>[23:23]</bitRange>
26606                        <access>read-only</access>
26607                    </field>
26608                    <field>
26609                        <name>GPIO45_EDGE_LOW</name>
26610                        <bitRange>[22:22]</bitRange>
26611                        <access>read-only</access>
26612                    </field>
26613                    <field>
26614                        <name>GPIO45_LEVEL_HIGH</name>
26615                        <bitRange>[21:21]</bitRange>
26616                        <access>read-only</access>
26617                    </field>
26618                    <field>
26619                        <name>GPIO45_LEVEL_LOW</name>
26620                        <bitRange>[20:20]</bitRange>
26621                        <access>read-only</access>
26622                    </field>
26623                    <field>
26624                        <name>GPIO44_EDGE_HIGH</name>
26625                        <bitRange>[19:19]</bitRange>
26626                        <access>read-only</access>
26627                    </field>
26628                    <field>
26629                        <name>GPIO44_EDGE_LOW</name>
26630                        <bitRange>[18:18]</bitRange>
26631                        <access>read-only</access>
26632                    </field>
26633                    <field>
26634                        <name>GPIO44_LEVEL_HIGH</name>
26635                        <bitRange>[17:17]</bitRange>
26636                        <access>read-only</access>
26637                    </field>
26638                    <field>
26639                        <name>GPIO44_LEVEL_LOW</name>
26640                        <bitRange>[16:16]</bitRange>
26641                        <access>read-only</access>
26642                    </field>
26643                    <field>
26644                        <name>GPIO43_EDGE_HIGH</name>
26645                        <bitRange>[15:15]</bitRange>
26646                        <access>read-only</access>
26647                    </field>
26648                    <field>
26649                        <name>GPIO43_EDGE_LOW</name>
26650                        <bitRange>[14:14]</bitRange>
26651                        <access>read-only</access>
26652                    </field>
26653                    <field>
26654                        <name>GPIO43_LEVEL_HIGH</name>
26655                        <bitRange>[13:13]</bitRange>
26656                        <access>read-only</access>
26657                    </field>
26658                    <field>
26659                        <name>GPIO43_LEVEL_LOW</name>
26660                        <bitRange>[12:12]</bitRange>
26661                        <access>read-only</access>
26662                    </field>
26663                    <field>
26664                        <name>GPIO42_EDGE_HIGH</name>
26665                        <bitRange>[11:11]</bitRange>
26666                        <access>read-only</access>
26667                    </field>
26668                    <field>
26669                        <name>GPIO42_EDGE_LOW</name>
26670                        <bitRange>[10:10]</bitRange>
26671                        <access>read-only</access>
26672                    </field>
26673                    <field>
26674                        <name>GPIO42_LEVEL_HIGH</name>
26675                        <bitRange>[9:9]</bitRange>
26676                        <access>read-only</access>
26677                    </field>
26678                    <field>
26679                        <name>GPIO42_LEVEL_LOW</name>
26680                        <bitRange>[8:8]</bitRange>
26681                        <access>read-only</access>
26682                    </field>
26683                    <field>
26684                        <name>GPIO41_EDGE_HIGH</name>
26685                        <bitRange>[7:7]</bitRange>
26686                        <access>read-only</access>
26687                    </field>
26688                    <field>
26689                        <name>GPIO41_EDGE_LOW</name>
26690                        <bitRange>[6:6]</bitRange>
26691                        <access>read-only</access>
26692                    </field>
26693                    <field>
26694                        <name>GPIO41_LEVEL_HIGH</name>
26695                        <bitRange>[5:5]</bitRange>
26696                        <access>read-only</access>
26697                    </field>
26698                    <field>
26699                        <name>GPIO41_LEVEL_LOW</name>
26700                        <bitRange>[4:4]</bitRange>
26701                        <access>read-only</access>
26702                    </field>
26703                    <field>
26704                        <name>GPIO40_EDGE_HIGH</name>
26705                        <bitRange>[3:3]</bitRange>
26706                        <access>read-only</access>
26707                    </field>
26708                    <field>
26709                        <name>GPIO40_EDGE_LOW</name>
26710                        <bitRange>[2:2]</bitRange>
26711                        <access>read-only</access>
26712                    </field>
26713                    <field>
26714                        <name>GPIO40_LEVEL_HIGH</name>
26715                        <bitRange>[1:1]</bitRange>
26716                        <access>read-only</access>
26717                    </field>
26718                    <field>
26719                        <name>GPIO40_LEVEL_LOW</name>
26720                        <bitRange>[0:0]</bitRange>
26721                        <access>read-only</access>
26722                    </field>
26723                </fields>
26724            </register>
26725            <register>
26726                <name>PROC1_INTE0</name>
26727                <addressOffset>0x00000290</addressOffset>
26728                <description>Interrupt Enable for proc1</description>
26729                <resetValue>0x00000000</resetValue>
26730                <fields>
26731                    <field>
26732                        <name>GPIO7_EDGE_HIGH</name>
26733                        <bitRange>[31:31]</bitRange>
26734                        <access>read-write</access>
26735                    </field>
26736                    <field>
26737                        <name>GPIO7_EDGE_LOW</name>
26738                        <bitRange>[30:30]</bitRange>
26739                        <access>read-write</access>
26740                    </field>
26741                    <field>
26742                        <name>GPIO7_LEVEL_HIGH</name>
26743                        <bitRange>[29:29]</bitRange>
26744                        <access>read-write</access>
26745                    </field>
26746                    <field>
26747                        <name>GPIO7_LEVEL_LOW</name>
26748                        <bitRange>[28:28]</bitRange>
26749                        <access>read-write</access>
26750                    </field>
26751                    <field>
26752                        <name>GPIO6_EDGE_HIGH</name>
26753                        <bitRange>[27:27]</bitRange>
26754                        <access>read-write</access>
26755                    </field>
26756                    <field>
26757                        <name>GPIO6_EDGE_LOW</name>
26758                        <bitRange>[26:26]</bitRange>
26759                        <access>read-write</access>
26760                    </field>
26761                    <field>
26762                        <name>GPIO6_LEVEL_HIGH</name>
26763                        <bitRange>[25:25]</bitRange>
26764                        <access>read-write</access>
26765                    </field>
26766                    <field>
26767                        <name>GPIO6_LEVEL_LOW</name>
26768                        <bitRange>[24:24]</bitRange>
26769                        <access>read-write</access>
26770                    </field>
26771                    <field>
26772                        <name>GPIO5_EDGE_HIGH</name>
26773                        <bitRange>[23:23]</bitRange>
26774                        <access>read-write</access>
26775                    </field>
26776                    <field>
26777                        <name>GPIO5_EDGE_LOW</name>
26778                        <bitRange>[22:22]</bitRange>
26779                        <access>read-write</access>
26780                    </field>
26781                    <field>
26782                        <name>GPIO5_LEVEL_HIGH</name>
26783                        <bitRange>[21:21]</bitRange>
26784                        <access>read-write</access>
26785                    </field>
26786                    <field>
26787                        <name>GPIO5_LEVEL_LOW</name>
26788                        <bitRange>[20:20]</bitRange>
26789                        <access>read-write</access>
26790                    </field>
26791                    <field>
26792                        <name>GPIO4_EDGE_HIGH</name>
26793                        <bitRange>[19:19]</bitRange>
26794                        <access>read-write</access>
26795                    </field>
26796                    <field>
26797                        <name>GPIO4_EDGE_LOW</name>
26798                        <bitRange>[18:18]</bitRange>
26799                        <access>read-write</access>
26800                    </field>
26801                    <field>
26802                        <name>GPIO4_LEVEL_HIGH</name>
26803                        <bitRange>[17:17]</bitRange>
26804                        <access>read-write</access>
26805                    </field>
26806                    <field>
26807                        <name>GPIO4_LEVEL_LOW</name>
26808                        <bitRange>[16:16]</bitRange>
26809                        <access>read-write</access>
26810                    </field>
26811                    <field>
26812                        <name>GPIO3_EDGE_HIGH</name>
26813                        <bitRange>[15:15]</bitRange>
26814                        <access>read-write</access>
26815                    </field>
26816                    <field>
26817                        <name>GPIO3_EDGE_LOW</name>
26818                        <bitRange>[14:14]</bitRange>
26819                        <access>read-write</access>
26820                    </field>
26821                    <field>
26822                        <name>GPIO3_LEVEL_HIGH</name>
26823                        <bitRange>[13:13]</bitRange>
26824                        <access>read-write</access>
26825                    </field>
26826                    <field>
26827                        <name>GPIO3_LEVEL_LOW</name>
26828                        <bitRange>[12:12]</bitRange>
26829                        <access>read-write</access>
26830                    </field>
26831                    <field>
26832                        <name>GPIO2_EDGE_HIGH</name>
26833                        <bitRange>[11:11]</bitRange>
26834                        <access>read-write</access>
26835                    </field>
26836                    <field>
26837                        <name>GPIO2_EDGE_LOW</name>
26838                        <bitRange>[10:10]</bitRange>
26839                        <access>read-write</access>
26840                    </field>
26841                    <field>
26842                        <name>GPIO2_LEVEL_HIGH</name>
26843                        <bitRange>[9:9]</bitRange>
26844                        <access>read-write</access>
26845                    </field>
26846                    <field>
26847                        <name>GPIO2_LEVEL_LOW</name>
26848                        <bitRange>[8:8]</bitRange>
26849                        <access>read-write</access>
26850                    </field>
26851                    <field>
26852                        <name>GPIO1_EDGE_HIGH</name>
26853                        <bitRange>[7:7]</bitRange>
26854                        <access>read-write</access>
26855                    </field>
26856                    <field>
26857                        <name>GPIO1_EDGE_LOW</name>
26858                        <bitRange>[6:6]</bitRange>
26859                        <access>read-write</access>
26860                    </field>
26861                    <field>
26862                        <name>GPIO1_LEVEL_HIGH</name>
26863                        <bitRange>[5:5]</bitRange>
26864                        <access>read-write</access>
26865                    </field>
26866                    <field>
26867                        <name>GPIO1_LEVEL_LOW</name>
26868                        <bitRange>[4:4]</bitRange>
26869                        <access>read-write</access>
26870                    </field>
26871                    <field>
26872                        <name>GPIO0_EDGE_HIGH</name>
26873                        <bitRange>[3:3]</bitRange>
26874                        <access>read-write</access>
26875                    </field>
26876                    <field>
26877                        <name>GPIO0_EDGE_LOW</name>
26878                        <bitRange>[2:2]</bitRange>
26879                        <access>read-write</access>
26880                    </field>
26881                    <field>
26882                        <name>GPIO0_LEVEL_HIGH</name>
26883                        <bitRange>[1:1]</bitRange>
26884                        <access>read-write</access>
26885                    </field>
26886                    <field>
26887                        <name>GPIO0_LEVEL_LOW</name>
26888                        <bitRange>[0:0]</bitRange>
26889                        <access>read-write</access>
26890                    </field>
26891                </fields>
26892            </register>
26893            <register>
26894                <name>PROC1_INTE1</name>
26895                <addressOffset>0x00000294</addressOffset>
26896                <description>Interrupt Enable for proc1</description>
26897                <resetValue>0x00000000</resetValue>
26898                <fields>
26899                    <field>
26900                        <name>GPIO15_EDGE_HIGH</name>
26901                        <bitRange>[31:31]</bitRange>
26902                        <access>read-write</access>
26903                    </field>
26904                    <field>
26905                        <name>GPIO15_EDGE_LOW</name>
26906                        <bitRange>[30:30]</bitRange>
26907                        <access>read-write</access>
26908                    </field>
26909                    <field>
26910                        <name>GPIO15_LEVEL_HIGH</name>
26911                        <bitRange>[29:29]</bitRange>
26912                        <access>read-write</access>
26913                    </field>
26914                    <field>
26915                        <name>GPIO15_LEVEL_LOW</name>
26916                        <bitRange>[28:28]</bitRange>
26917                        <access>read-write</access>
26918                    </field>
26919                    <field>
26920                        <name>GPIO14_EDGE_HIGH</name>
26921                        <bitRange>[27:27]</bitRange>
26922                        <access>read-write</access>
26923                    </field>
26924                    <field>
26925                        <name>GPIO14_EDGE_LOW</name>
26926                        <bitRange>[26:26]</bitRange>
26927                        <access>read-write</access>
26928                    </field>
26929                    <field>
26930                        <name>GPIO14_LEVEL_HIGH</name>
26931                        <bitRange>[25:25]</bitRange>
26932                        <access>read-write</access>
26933                    </field>
26934                    <field>
26935                        <name>GPIO14_LEVEL_LOW</name>
26936                        <bitRange>[24:24]</bitRange>
26937                        <access>read-write</access>
26938                    </field>
26939                    <field>
26940                        <name>GPIO13_EDGE_HIGH</name>
26941                        <bitRange>[23:23]</bitRange>
26942                        <access>read-write</access>
26943                    </field>
26944                    <field>
26945                        <name>GPIO13_EDGE_LOW</name>
26946                        <bitRange>[22:22]</bitRange>
26947                        <access>read-write</access>
26948                    </field>
26949                    <field>
26950                        <name>GPIO13_LEVEL_HIGH</name>
26951                        <bitRange>[21:21]</bitRange>
26952                        <access>read-write</access>
26953                    </field>
26954                    <field>
26955                        <name>GPIO13_LEVEL_LOW</name>
26956                        <bitRange>[20:20]</bitRange>
26957                        <access>read-write</access>
26958                    </field>
26959                    <field>
26960                        <name>GPIO12_EDGE_HIGH</name>
26961                        <bitRange>[19:19]</bitRange>
26962                        <access>read-write</access>
26963                    </field>
26964                    <field>
26965                        <name>GPIO12_EDGE_LOW</name>
26966                        <bitRange>[18:18]</bitRange>
26967                        <access>read-write</access>
26968                    </field>
26969                    <field>
26970                        <name>GPIO12_LEVEL_HIGH</name>
26971                        <bitRange>[17:17]</bitRange>
26972                        <access>read-write</access>
26973                    </field>
26974                    <field>
26975                        <name>GPIO12_LEVEL_LOW</name>
26976                        <bitRange>[16:16]</bitRange>
26977                        <access>read-write</access>
26978                    </field>
26979                    <field>
26980                        <name>GPIO11_EDGE_HIGH</name>
26981                        <bitRange>[15:15]</bitRange>
26982                        <access>read-write</access>
26983                    </field>
26984                    <field>
26985                        <name>GPIO11_EDGE_LOW</name>
26986                        <bitRange>[14:14]</bitRange>
26987                        <access>read-write</access>
26988                    </field>
26989                    <field>
26990                        <name>GPIO11_LEVEL_HIGH</name>
26991                        <bitRange>[13:13]</bitRange>
26992                        <access>read-write</access>
26993                    </field>
26994                    <field>
26995                        <name>GPIO11_LEVEL_LOW</name>
26996                        <bitRange>[12:12]</bitRange>
26997                        <access>read-write</access>
26998                    </field>
26999                    <field>
27000                        <name>GPIO10_EDGE_HIGH</name>
27001                        <bitRange>[11:11]</bitRange>
27002                        <access>read-write</access>
27003                    </field>
27004                    <field>
27005                        <name>GPIO10_EDGE_LOW</name>
27006                        <bitRange>[10:10]</bitRange>
27007                        <access>read-write</access>
27008                    </field>
27009                    <field>
27010                        <name>GPIO10_LEVEL_HIGH</name>
27011                        <bitRange>[9:9]</bitRange>
27012                        <access>read-write</access>
27013                    </field>
27014                    <field>
27015                        <name>GPIO10_LEVEL_LOW</name>
27016                        <bitRange>[8:8]</bitRange>
27017                        <access>read-write</access>
27018                    </field>
27019                    <field>
27020                        <name>GPIO9_EDGE_HIGH</name>
27021                        <bitRange>[7:7]</bitRange>
27022                        <access>read-write</access>
27023                    </field>
27024                    <field>
27025                        <name>GPIO9_EDGE_LOW</name>
27026                        <bitRange>[6:6]</bitRange>
27027                        <access>read-write</access>
27028                    </field>
27029                    <field>
27030                        <name>GPIO9_LEVEL_HIGH</name>
27031                        <bitRange>[5:5]</bitRange>
27032                        <access>read-write</access>
27033                    </field>
27034                    <field>
27035                        <name>GPIO9_LEVEL_LOW</name>
27036                        <bitRange>[4:4]</bitRange>
27037                        <access>read-write</access>
27038                    </field>
27039                    <field>
27040                        <name>GPIO8_EDGE_HIGH</name>
27041                        <bitRange>[3:3]</bitRange>
27042                        <access>read-write</access>
27043                    </field>
27044                    <field>
27045                        <name>GPIO8_EDGE_LOW</name>
27046                        <bitRange>[2:2]</bitRange>
27047                        <access>read-write</access>
27048                    </field>
27049                    <field>
27050                        <name>GPIO8_LEVEL_HIGH</name>
27051                        <bitRange>[1:1]</bitRange>
27052                        <access>read-write</access>
27053                    </field>
27054                    <field>
27055                        <name>GPIO8_LEVEL_LOW</name>
27056                        <bitRange>[0:0]</bitRange>
27057                        <access>read-write</access>
27058                    </field>
27059                </fields>
27060            </register>
27061            <register>
27062                <name>PROC1_INTE2</name>
27063                <addressOffset>0x00000298</addressOffset>
27064                <description>Interrupt Enable for proc1</description>
27065                <resetValue>0x00000000</resetValue>
27066                <fields>
27067                    <field>
27068                        <name>GPIO23_EDGE_HIGH</name>
27069                        <bitRange>[31:31]</bitRange>
27070                        <access>read-write</access>
27071                    </field>
27072                    <field>
27073                        <name>GPIO23_EDGE_LOW</name>
27074                        <bitRange>[30:30]</bitRange>
27075                        <access>read-write</access>
27076                    </field>
27077                    <field>
27078                        <name>GPIO23_LEVEL_HIGH</name>
27079                        <bitRange>[29:29]</bitRange>
27080                        <access>read-write</access>
27081                    </field>
27082                    <field>
27083                        <name>GPIO23_LEVEL_LOW</name>
27084                        <bitRange>[28:28]</bitRange>
27085                        <access>read-write</access>
27086                    </field>
27087                    <field>
27088                        <name>GPIO22_EDGE_HIGH</name>
27089                        <bitRange>[27:27]</bitRange>
27090                        <access>read-write</access>
27091                    </field>
27092                    <field>
27093                        <name>GPIO22_EDGE_LOW</name>
27094                        <bitRange>[26:26]</bitRange>
27095                        <access>read-write</access>
27096                    </field>
27097                    <field>
27098                        <name>GPIO22_LEVEL_HIGH</name>
27099                        <bitRange>[25:25]</bitRange>
27100                        <access>read-write</access>
27101                    </field>
27102                    <field>
27103                        <name>GPIO22_LEVEL_LOW</name>
27104                        <bitRange>[24:24]</bitRange>
27105                        <access>read-write</access>
27106                    </field>
27107                    <field>
27108                        <name>GPIO21_EDGE_HIGH</name>
27109                        <bitRange>[23:23]</bitRange>
27110                        <access>read-write</access>
27111                    </field>
27112                    <field>
27113                        <name>GPIO21_EDGE_LOW</name>
27114                        <bitRange>[22:22]</bitRange>
27115                        <access>read-write</access>
27116                    </field>
27117                    <field>
27118                        <name>GPIO21_LEVEL_HIGH</name>
27119                        <bitRange>[21:21]</bitRange>
27120                        <access>read-write</access>
27121                    </field>
27122                    <field>
27123                        <name>GPIO21_LEVEL_LOW</name>
27124                        <bitRange>[20:20]</bitRange>
27125                        <access>read-write</access>
27126                    </field>
27127                    <field>
27128                        <name>GPIO20_EDGE_HIGH</name>
27129                        <bitRange>[19:19]</bitRange>
27130                        <access>read-write</access>
27131                    </field>
27132                    <field>
27133                        <name>GPIO20_EDGE_LOW</name>
27134                        <bitRange>[18:18]</bitRange>
27135                        <access>read-write</access>
27136                    </field>
27137                    <field>
27138                        <name>GPIO20_LEVEL_HIGH</name>
27139                        <bitRange>[17:17]</bitRange>
27140                        <access>read-write</access>
27141                    </field>
27142                    <field>
27143                        <name>GPIO20_LEVEL_LOW</name>
27144                        <bitRange>[16:16]</bitRange>
27145                        <access>read-write</access>
27146                    </field>
27147                    <field>
27148                        <name>GPIO19_EDGE_HIGH</name>
27149                        <bitRange>[15:15]</bitRange>
27150                        <access>read-write</access>
27151                    </field>
27152                    <field>
27153                        <name>GPIO19_EDGE_LOW</name>
27154                        <bitRange>[14:14]</bitRange>
27155                        <access>read-write</access>
27156                    </field>
27157                    <field>
27158                        <name>GPIO19_LEVEL_HIGH</name>
27159                        <bitRange>[13:13]</bitRange>
27160                        <access>read-write</access>
27161                    </field>
27162                    <field>
27163                        <name>GPIO19_LEVEL_LOW</name>
27164                        <bitRange>[12:12]</bitRange>
27165                        <access>read-write</access>
27166                    </field>
27167                    <field>
27168                        <name>GPIO18_EDGE_HIGH</name>
27169                        <bitRange>[11:11]</bitRange>
27170                        <access>read-write</access>
27171                    </field>
27172                    <field>
27173                        <name>GPIO18_EDGE_LOW</name>
27174                        <bitRange>[10:10]</bitRange>
27175                        <access>read-write</access>
27176                    </field>
27177                    <field>
27178                        <name>GPIO18_LEVEL_HIGH</name>
27179                        <bitRange>[9:9]</bitRange>
27180                        <access>read-write</access>
27181                    </field>
27182                    <field>
27183                        <name>GPIO18_LEVEL_LOW</name>
27184                        <bitRange>[8:8]</bitRange>
27185                        <access>read-write</access>
27186                    </field>
27187                    <field>
27188                        <name>GPIO17_EDGE_HIGH</name>
27189                        <bitRange>[7:7]</bitRange>
27190                        <access>read-write</access>
27191                    </field>
27192                    <field>
27193                        <name>GPIO17_EDGE_LOW</name>
27194                        <bitRange>[6:6]</bitRange>
27195                        <access>read-write</access>
27196                    </field>
27197                    <field>
27198                        <name>GPIO17_LEVEL_HIGH</name>
27199                        <bitRange>[5:5]</bitRange>
27200                        <access>read-write</access>
27201                    </field>
27202                    <field>
27203                        <name>GPIO17_LEVEL_LOW</name>
27204                        <bitRange>[4:4]</bitRange>
27205                        <access>read-write</access>
27206                    </field>
27207                    <field>
27208                        <name>GPIO16_EDGE_HIGH</name>
27209                        <bitRange>[3:3]</bitRange>
27210                        <access>read-write</access>
27211                    </field>
27212                    <field>
27213                        <name>GPIO16_EDGE_LOW</name>
27214                        <bitRange>[2:2]</bitRange>
27215                        <access>read-write</access>
27216                    </field>
27217                    <field>
27218                        <name>GPIO16_LEVEL_HIGH</name>
27219                        <bitRange>[1:1]</bitRange>
27220                        <access>read-write</access>
27221                    </field>
27222                    <field>
27223                        <name>GPIO16_LEVEL_LOW</name>
27224                        <bitRange>[0:0]</bitRange>
27225                        <access>read-write</access>
27226                    </field>
27227                </fields>
27228            </register>
27229            <register>
27230                <name>PROC1_INTE3</name>
27231                <addressOffset>0x0000029c</addressOffset>
27232                <description>Interrupt Enable for proc1</description>
27233                <resetValue>0x00000000</resetValue>
27234                <fields>
27235                    <field>
27236                        <name>GPIO31_EDGE_HIGH</name>
27237                        <bitRange>[31:31]</bitRange>
27238                        <access>read-write</access>
27239                    </field>
27240                    <field>
27241                        <name>GPIO31_EDGE_LOW</name>
27242                        <bitRange>[30:30]</bitRange>
27243                        <access>read-write</access>
27244                    </field>
27245                    <field>
27246                        <name>GPIO31_LEVEL_HIGH</name>
27247                        <bitRange>[29:29]</bitRange>
27248                        <access>read-write</access>
27249                    </field>
27250                    <field>
27251                        <name>GPIO31_LEVEL_LOW</name>
27252                        <bitRange>[28:28]</bitRange>
27253                        <access>read-write</access>
27254                    </field>
27255                    <field>
27256                        <name>GPIO30_EDGE_HIGH</name>
27257                        <bitRange>[27:27]</bitRange>
27258                        <access>read-write</access>
27259                    </field>
27260                    <field>
27261                        <name>GPIO30_EDGE_LOW</name>
27262                        <bitRange>[26:26]</bitRange>
27263                        <access>read-write</access>
27264                    </field>
27265                    <field>
27266                        <name>GPIO30_LEVEL_HIGH</name>
27267                        <bitRange>[25:25]</bitRange>
27268                        <access>read-write</access>
27269                    </field>
27270                    <field>
27271                        <name>GPIO30_LEVEL_LOW</name>
27272                        <bitRange>[24:24]</bitRange>
27273                        <access>read-write</access>
27274                    </field>
27275                    <field>
27276                        <name>GPIO29_EDGE_HIGH</name>
27277                        <bitRange>[23:23]</bitRange>
27278                        <access>read-write</access>
27279                    </field>
27280                    <field>
27281                        <name>GPIO29_EDGE_LOW</name>
27282                        <bitRange>[22:22]</bitRange>
27283                        <access>read-write</access>
27284                    </field>
27285                    <field>
27286                        <name>GPIO29_LEVEL_HIGH</name>
27287                        <bitRange>[21:21]</bitRange>
27288                        <access>read-write</access>
27289                    </field>
27290                    <field>
27291                        <name>GPIO29_LEVEL_LOW</name>
27292                        <bitRange>[20:20]</bitRange>
27293                        <access>read-write</access>
27294                    </field>
27295                    <field>
27296                        <name>GPIO28_EDGE_HIGH</name>
27297                        <bitRange>[19:19]</bitRange>
27298                        <access>read-write</access>
27299                    </field>
27300                    <field>
27301                        <name>GPIO28_EDGE_LOW</name>
27302                        <bitRange>[18:18]</bitRange>
27303                        <access>read-write</access>
27304                    </field>
27305                    <field>
27306                        <name>GPIO28_LEVEL_HIGH</name>
27307                        <bitRange>[17:17]</bitRange>
27308                        <access>read-write</access>
27309                    </field>
27310                    <field>
27311                        <name>GPIO28_LEVEL_LOW</name>
27312                        <bitRange>[16:16]</bitRange>
27313                        <access>read-write</access>
27314                    </field>
27315                    <field>
27316                        <name>GPIO27_EDGE_HIGH</name>
27317                        <bitRange>[15:15]</bitRange>
27318                        <access>read-write</access>
27319                    </field>
27320                    <field>
27321                        <name>GPIO27_EDGE_LOW</name>
27322                        <bitRange>[14:14]</bitRange>
27323                        <access>read-write</access>
27324                    </field>
27325                    <field>
27326                        <name>GPIO27_LEVEL_HIGH</name>
27327                        <bitRange>[13:13]</bitRange>
27328                        <access>read-write</access>
27329                    </field>
27330                    <field>
27331                        <name>GPIO27_LEVEL_LOW</name>
27332                        <bitRange>[12:12]</bitRange>
27333                        <access>read-write</access>
27334                    </field>
27335                    <field>
27336                        <name>GPIO26_EDGE_HIGH</name>
27337                        <bitRange>[11:11]</bitRange>
27338                        <access>read-write</access>
27339                    </field>
27340                    <field>
27341                        <name>GPIO26_EDGE_LOW</name>
27342                        <bitRange>[10:10]</bitRange>
27343                        <access>read-write</access>
27344                    </field>
27345                    <field>
27346                        <name>GPIO26_LEVEL_HIGH</name>
27347                        <bitRange>[9:9]</bitRange>
27348                        <access>read-write</access>
27349                    </field>
27350                    <field>
27351                        <name>GPIO26_LEVEL_LOW</name>
27352                        <bitRange>[8:8]</bitRange>
27353                        <access>read-write</access>
27354                    </field>
27355                    <field>
27356                        <name>GPIO25_EDGE_HIGH</name>
27357                        <bitRange>[7:7]</bitRange>
27358                        <access>read-write</access>
27359                    </field>
27360                    <field>
27361                        <name>GPIO25_EDGE_LOW</name>
27362                        <bitRange>[6:6]</bitRange>
27363                        <access>read-write</access>
27364                    </field>
27365                    <field>
27366                        <name>GPIO25_LEVEL_HIGH</name>
27367                        <bitRange>[5:5]</bitRange>
27368                        <access>read-write</access>
27369                    </field>
27370                    <field>
27371                        <name>GPIO25_LEVEL_LOW</name>
27372                        <bitRange>[4:4]</bitRange>
27373                        <access>read-write</access>
27374                    </field>
27375                    <field>
27376                        <name>GPIO24_EDGE_HIGH</name>
27377                        <bitRange>[3:3]</bitRange>
27378                        <access>read-write</access>
27379                    </field>
27380                    <field>
27381                        <name>GPIO24_EDGE_LOW</name>
27382                        <bitRange>[2:2]</bitRange>
27383                        <access>read-write</access>
27384                    </field>
27385                    <field>
27386                        <name>GPIO24_LEVEL_HIGH</name>
27387                        <bitRange>[1:1]</bitRange>
27388                        <access>read-write</access>
27389                    </field>
27390                    <field>
27391                        <name>GPIO24_LEVEL_LOW</name>
27392                        <bitRange>[0:0]</bitRange>
27393                        <access>read-write</access>
27394                    </field>
27395                </fields>
27396            </register>
27397            <register>
27398                <name>PROC1_INTE4</name>
27399                <addressOffset>0x000002a0</addressOffset>
27400                <description>Interrupt Enable for proc1</description>
27401                <resetValue>0x00000000</resetValue>
27402                <fields>
27403                    <field>
27404                        <name>GPIO39_EDGE_HIGH</name>
27405                        <bitRange>[31:31]</bitRange>
27406                        <access>read-write</access>
27407                    </field>
27408                    <field>
27409                        <name>GPIO39_EDGE_LOW</name>
27410                        <bitRange>[30:30]</bitRange>
27411                        <access>read-write</access>
27412                    </field>
27413                    <field>
27414                        <name>GPIO39_LEVEL_HIGH</name>
27415                        <bitRange>[29:29]</bitRange>
27416                        <access>read-write</access>
27417                    </field>
27418                    <field>
27419                        <name>GPIO39_LEVEL_LOW</name>
27420                        <bitRange>[28:28]</bitRange>
27421                        <access>read-write</access>
27422                    </field>
27423                    <field>
27424                        <name>GPIO38_EDGE_HIGH</name>
27425                        <bitRange>[27:27]</bitRange>
27426                        <access>read-write</access>
27427                    </field>
27428                    <field>
27429                        <name>GPIO38_EDGE_LOW</name>
27430                        <bitRange>[26:26]</bitRange>
27431                        <access>read-write</access>
27432                    </field>
27433                    <field>
27434                        <name>GPIO38_LEVEL_HIGH</name>
27435                        <bitRange>[25:25]</bitRange>
27436                        <access>read-write</access>
27437                    </field>
27438                    <field>
27439                        <name>GPIO38_LEVEL_LOW</name>
27440                        <bitRange>[24:24]</bitRange>
27441                        <access>read-write</access>
27442                    </field>
27443                    <field>
27444                        <name>GPIO37_EDGE_HIGH</name>
27445                        <bitRange>[23:23]</bitRange>
27446                        <access>read-write</access>
27447                    </field>
27448                    <field>
27449                        <name>GPIO37_EDGE_LOW</name>
27450                        <bitRange>[22:22]</bitRange>
27451                        <access>read-write</access>
27452                    </field>
27453                    <field>
27454                        <name>GPIO37_LEVEL_HIGH</name>
27455                        <bitRange>[21:21]</bitRange>
27456                        <access>read-write</access>
27457                    </field>
27458                    <field>
27459                        <name>GPIO37_LEVEL_LOW</name>
27460                        <bitRange>[20:20]</bitRange>
27461                        <access>read-write</access>
27462                    </field>
27463                    <field>
27464                        <name>GPIO36_EDGE_HIGH</name>
27465                        <bitRange>[19:19]</bitRange>
27466                        <access>read-write</access>
27467                    </field>
27468                    <field>
27469                        <name>GPIO36_EDGE_LOW</name>
27470                        <bitRange>[18:18]</bitRange>
27471                        <access>read-write</access>
27472                    </field>
27473                    <field>
27474                        <name>GPIO36_LEVEL_HIGH</name>
27475                        <bitRange>[17:17]</bitRange>
27476                        <access>read-write</access>
27477                    </field>
27478                    <field>
27479                        <name>GPIO36_LEVEL_LOW</name>
27480                        <bitRange>[16:16]</bitRange>
27481                        <access>read-write</access>
27482                    </field>
27483                    <field>
27484                        <name>GPIO35_EDGE_HIGH</name>
27485                        <bitRange>[15:15]</bitRange>
27486                        <access>read-write</access>
27487                    </field>
27488                    <field>
27489                        <name>GPIO35_EDGE_LOW</name>
27490                        <bitRange>[14:14]</bitRange>
27491                        <access>read-write</access>
27492                    </field>
27493                    <field>
27494                        <name>GPIO35_LEVEL_HIGH</name>
27495                        <bitRange>[13:13]</bitRange>
27496                        <access>read-write</access>
27497                    </field>
27498                    <field>
27499                        <name>GPIO35_LEVEL_LOW</name>
27500                        <bitRange>[12:12]</bitRange>
27501                        <access>read-write</access>
27502                    </field>
27503                    <field>
27504                        <name>GPIO34_EDGE_HIGH</name>
27505                        <bitRange>[11:11]</bitRange>
27506                        <access>read-write</access>
27507                    </field>
27508                    <field>
27509                        <name>GPIO34_EDGE_LOW</name>
27510                        <bitRange>[10:10]</bitRange>
27511                        <access>read-write</access>
27512                    </field>
27513                    <field>
27514                        <name>GPIO34_LEVEL_HIGH</name>
27515                        <bitRange>[9:9]</bitRange>
27516                        <access>read-write</access>
27517                    </field>
27518                    <field>
27519                        <name>GPIO34_LEVEL_LOW</name>
27520                        <bitRange>[8:8]</bitRange>
27521                        <access>read-write</access>
27522                    </field>
27523                    <field>
27524                        <name>GPIO33_EDGE_HIGH</name>
27525                        <bitRange>[7:7]</bitRange>
27526                        <access>read-write</access>
27527                    </field>
27528                    <field>
27529                        <name>GPIO33_EDGE_LOW</name>
27530                        <bitRange>[6:6]</bitRange>
27531                        <access>read-write</access>
27532                    </field>
27533                    <field>
27534                        <name>GPIO33_LEVEL_HIGH</name>
27535                        <bitRange>[5:5]</bitRange>
27536                        <access>read-write</access>
27537                    </field>
27538                    <field>
27539                        <name>GPIO33_LEVEL_LOW</name>
27540                        <bitRange>[4:4]</bitRange>
27541                        <access>read-write</access>
27542                    </field>
27543                    <field>
27544                        <name>GPIO32_EDGE_HIGH</name>
27545                        <bitRange>[3:3]</bitRange>
27546                        <access>read-write</access>
27547                    </field>
27548                    <field>
27549                        <name>GPIO32_EDGE_LOW</name>
27550                        <bitRange>[2:2]</bitRange>
27551                        <access>read-write</access>
27552                    </field>
27553                    <field>
27554                        <name>GPIO32_LEVEL_HIGH</name>
27555                        <bitRange>[1:1]</bitRange>
27556                        <access>read-write</access>
27557                    </field>
27558                    <field>
27559                        <name>GPIO32_LEVEL_LOW</name>
27560                        <bitRange>[0:0]</bitRange>
27561                        <access>read-write</access>
27562                    </field>
27563                </fields>
27564            </register>
27565            <register>
27566                <name>PROC1_INTE5</name>
27567                <addressOffset>0x000002a4</addressOffset>
27568                <description>Interrupt Enable for proc1</description>
27569                <resetValue>0x00000000</resetValue>
27570                <fields>
27571                    <field>
27572                        <name>GPIO47_EDGE_HIGH</name>
27573                        <bitRange>[31:31]</bitRange>
27574                        <access>read-write</access>
27575                    </field>
27576                    <field>
27577                        <name>GPIO47_EDGE_LOW</name>
27578                        <bitRange>[30:30]</bitRange>
27579                        <access>read-write</access>
27580                    </field>
27581                    <field>
27582                        <name>GPIO47_LEVEL_HIGH</name>
27583                        <bitRange>[29:29]</bitRange>
27584                        <access>read-write</access>
27585                    </field>
27586                    <field>
27587                        <name>GPIO47_LEVEL_LOW</name>
27588                        <bitRange>[28:28]</bitRange>
27589                        <access>read-write</access>
27590                    </field>
27591                    <field>
27592                        <name>GPIO46_EDGE_HIGH</name>
27593                        <bitRange>[27:27]</bitRange>
27594                        <access>read-write</access>
27595                    </field>
27596                    <field>
27597                        <name>GPIO46_EDGE_LOW</name>
27598                        <bitRange>[26:26]</bitRange>
27599                        <access>read-write</access>
27600                    </field>
27601                    <field>
27602                        <name>GPIO46_LEVEL_HIGH</name>
27603                        <bitRange>[25:25]</bitRange>
27604                        <access>read-write</access>
27605                    </field>
27606                    <field>
27607                        <name>GPIO46_LEVEL_LOW</name>
27608                        <bitRange>[24:24]</bitRange>
27609                        <access>read-write</access>
27610                    </field>
27611                    <field>
27612                        <name>GPIO45_EDGE_HIGH</name>
27613                        <bitRange>[23:23]</bitRange>
27614                        <access>read-write</access>
27615                    </field>
27616                    <field>
27617                        <name>GPIO45_EDGE_LOW</name>
27618                        <bitRange>[22:22]</bitRange>
27619                        <access>read-write</access>
27620                    </field>
27621                    <field>
27622                        <name>GPIO45_LEVEL_HIGH</name>
27623                        <bitRange>[21:21]</bitRange>
27624                        <access>read-write</access>
27625                    </field>
27626                    <field>
27627                        <name>GPIO45_LEVEL_LOW</name>
27628                        <bitRange>[20:20]</bitRange>
27629                        <access>read-write</access>
27630                    </field>
27631                    <field>
27632                        <name>GPIO44_EDGE_HIGH</name>
27633                        <bitRange>[19:19]</bitRange>
27634                        <access>read-write</access>
27635                    </field>
27636                    <field>
27637                        <name>GPIO44_EDGE_LOW</name>
27638                        <bitRange>[18:18]</bitRange>
27639                        <access>read-write</access>
27640                    </field>
27641                    <field>
27642                        <name>GPIO44_LEVEL_HIGH</name>
27643                        <bitRange>[17:17]</bitRange>
27644                        <access>read-write</access>
27645                    </field>
27646                    <field>
27647                        <name>GPIO44_LEVEL_LOW</name>
27648                        <bitRange>[16:16]</bitRange>
27649                        <access>read-write</access>
27650                    </field>
27651                    <field>
27652                        <name>GPIO43_EDGE_HIGH</name>
27653                        <bitRange>[15:15]</bitRange>
27654                        <access>read-write</access>
27655                    </field>
27656                    <field>
27657                        <name>GPIO43_EDGE_LOW</name>
27658                        <bitRange>[14:14]</bitRange>
27659                        <access>read-write</access>
27660                    </field>
27661                    <field>
27662                        <name>GPIO43_LEVEL_HIGH</name>
27663                        <bitRange>[13:13]</bitRange>
27664                        <access>read-write</access>
27665                    </field>
27666                    <field>
27667                        <name>GPIO43_LEVEL_LOW</name>
27668                        <bitRange>[12:12]</bitRange>
27669                        <access>read-write</access>
27670                    </field>
27671                    <field>
27672                        <name>GPIO42_EDGE_HIGH</name>
27673                        <bitRange>[11:11]</bitRange>
27674                        <access>read-write</access>
27675                    </field>
27676                    <field>
27677                        <name>GPIO42_EDGE_LOW</name>
27678                        <bitRange>[10:10]</bitRange>
27679                        <access>read-write</access>
27680                    </field>
27681                    <field>
27682                        <name>GPIO42_LEVEL_HIGH</name>
27683                        <bitRange>[9:9]</bitRange>
27684                        <access>read-write</access>
27685                    </field>
27686                    <field>
27687                        <name>GPIO42_LEVEL_LOW</name>
27688                        <bitRange>[8:8]</bitRange>
27689                        <access>read-write</access>
27690                    </field>
27691                    <field>
27692                        <name>GPIO41_EDGE_HIGH</name>
27693                        <bitRange>[7:7]</bitRange>
27694                        <access>read-write</access>
27695                    </field>
27696                    <field>
27697                        <name>GPIO41_EDGE_LOW</name>
27698                        <bitRange>[6:6]</bitRange>
27699                        <access>read-write</access>
27700                    </field>
27701                    <field>
27702                        <name>GPIO41_LEVEL_HIGH</name>
27703                        <bitRange>[5:5]</bitRange>
27704                        <access>read-write</access>
27705                    </field>
27706                    <field>
27707                        <name>GPIO41_LEVEL_LOW</name>
27708                        <bitRange>[4:4]</bitRange>
27709                        <access>read-write</access>
27710                    </field>
27711                    <field>
27712                        <name>GPIO40_EDGE_HIGH</name>
27713                        <bitRange>[3:3]</bitRange>
27714                        <access>read-write</access>
27715                    </field>
27716                    <field>
27717                        <name>GPIO40_EDGE_LOW</name>
27718                        <bitRange>[2:2]</bitRange>
27719                        <access>read-write</access>
27720                    </field>
27721                    <field>
27722                        <name>GPIO40_LEVEL_HIGH</name>
27723                        <bitRange>[1:1]</bitRange>
27724                        <access>read-write</access>
27725                    </field>
27726                    <field>
27727                        <name>GPIO40_LEVEL_LOW</name>
27728                        <bitRange>[0:0]</bitRange>
27729                        <access>read-write</access>
27730                    </field>
27731                </fields>
27732            </register>
27733            <register>
27734                <name>PROC1_INTF0</name>
27735                <addressOffset>0x000002a8</addressOffset>
27736                <description>Interrupt Force for proc1</description>
27737                <resetValue>0x00000000</resetValue>
27738                <fields>
27739                    <field>
27740                        <name>GPIO7_EDGE_HIGH</name>
27741                        <bitRange>[31:31]</bitRange>
27742                        <access>read-write</access>
27743                    </field>
27744                    <field>
27745                        <name>GPIO7_EDGE_LOW</name>
27746                        <bitRange>[30:30]</bitRange>
27747                        <access>read-write</access>
27748                    </field>
27749                    <field>
27750                        <name>GPIO7_LEVEL_HIGH</name>
27751                        <bitRange>[29:29]</bitRange>
27752                        <access>read-write</access>
27753                    </field>
27754                    <field>
27755                        <name>GPIO7_LEVEL_LOW</name>
27756                        <bitRange>[28:28]</bitRange>
27757                        <access>read-write</access>
27758                    </field>
27759                    <field>
27760                        <name>GPIO6_EDGE_HIGH</name>
27761                        <bitRange>[27:27]</bitRange>
27762                        <access>read-write</access>
27763                    </field>
27764                    <field>
27765                        <name>GPIO6_EDGE_LOW</name>
27766                        <bitRange>[26:26]</bitRange>
27767                        <access>read-write</access>
27768                    </field>
27769                    <field>
27770                        <name>GPIO6_LEVEL_HIGH</name>
27771                        <bitRange>[25:25]</bitRange>
27772                        <access>read-write</access>
27773                    </field>
27774                    <field>
27775                        <name>GPIO6_LEVEL_LOW</name>
27776                        <bitRange>[24:24]</bitRange>
27777                        <access>read-write</access>
27778                    </field>
27779                    <field>
27780                        <name>GPIO5_EDGE_HIGH</name>
27781                        <bitRange>[23:23]</bitRange>
27782                        <access>read-write</access>
27783                    </field>
27784                    <field>
27785                        <name>GPIO5_EDGE_LOW</name>
27786                        <bitRange>[22:22]</bitRange>
27787                        <access>read-write</access>
27788                    </field>
27789                    <field>
27790                        <name>GPIO5_LEVEL_HIGH</name>
27791                        <bitRange>[21:21]</bitRange>
27792                        <access>read-write</access>
27793                    </field>
27794                    <field>
27795                        <name>GPIO5_LEVEL_LOW</name>
27796                        <bitRange>[20:20]</bitRange>
27797                        <access>read-write</access>
27798                    </field>
27799                    <field>
27800                        <name>GPIO4_EDGE_HIGH</name>
27801                        <bitRange>[19:19]</bitRange>
27802                        <access>read-write</access>
27803                    </field>
27804                    <field>
27805                        <name>GPIO4_EDGE_LOW</name>
27806                        <bitRange>[18:18]</bitRange>
27807                        <access>read-write</access>
27808                    </field>
27809                    <field>
27810                        <name>GPIO4_LEVEL_HIGH</name>
27811                        <bitRange>[17:17]</bitRange>
27812                        <access>read-write</access>
27813                    </field>
27814                    <field>
27815                        <name>GPIO4_LEVEL_LOW</name>
27816                        <bitRange>[16:16]</bitRange>
27817                        <access>read-write</access>
27818                    </field>
27819                    <field>
27820                        <name>GPIO3_EDGE_HIGH</name>
27821                        <bitRange>[15:15]</bitRange>
27822                        <access>read-write</access>
27823                    </field>
27824                    <field>
27825                        <name>GPIO3_EDGE_LOW</name>
27826                        <bitRange>[14:14]</bitRange>
27827                        <access>read-write</access>
27828                    </field>
27829                    <field>
27830                        <name>GPIO3_LEVEL_HIGH</name>
27831                        <bitRange>[13:13]</bitRange>
27832                        <access>read-write</access>
27833                    </field>
27834                    <field>
27835                        <name>GPIO3_LEVEL_LOW</name>
27836                        <bitRange>[12:12]</bitRange>
27837                        <access>read-write</access>
27838                    </field>
27839                    <field>
27840                        <name>GPIO2_EDGE_HIGH</name>
27841                        <bitRange>[11:11]</bitRange>
27842                        <access>read-write</access>
27843                    </field>
27844                    <field>
27845                        <name>GPIO2_EDGE_LOW</name>
27846                        <bitRange>[10:10]</bitRange>
27847                        <access>read-write</access>
27848                    </field>
27849                    <field>
27850                        <name>GPIO2_LEVEL_HIGH</name>
27851                        <bitRange>[9:9]</bitRange>
27852                        <access>read-write</access>
27853                    </field>
27854                    <field>
27855                        <name>GPIO2_LEVEL_LOW</name>
27856                        <bitRange>[8:8]</bitRange>
27857                        <access>read-write</access>
27858                    </field>
27859                    <field>
27860                        <name>GPIO1_EDGE_HIGH</name>
27861                        <bitRange>[7:7]</bitRange>
27862                        <access>read-write</access>
27863                    </field>
27864                    <field>
27865                        <name>GPIO1_EDGE_LOW</name>
27866                        <bitRange>[6:6]</bitRange>
27867                        <access>read-write</access>
27868                    </field>
27869                    <field>
27870                        <name>GPIO1_LEVEL_HIGH</name>
27871                        <bitRange>[5:5]</bitRange>
27872                        <access>read-write</access>
27873                    </field>
27874                    <field>
27875                        <name>GPIO1_LEVEL_LOW</name>
27876                        <bitRange>[4:4]</bitRange>
27877                        <access>read-write</access>
27878                    </field>
27879                    <field>
27880                        <name>GPIO0_EDGE_HIGH</name>
27881                        <bitRange>[3:3]</bitRange>
27882                        <access>read-write</access>
27883                    </field>
27884                    <field>
27885                        <name>GPIO0_EDGE_LOW</name>
27886                        <bitRange>[2:2]</bitRange>
27887                        <access>read-write</access>
27888                    </field>
27889                    <field>
27890                        <name>GPIO0_LEVEL_HIGH</name>
27891                        <bitRange>[1:1]</bitRange>
27892                        <access>read-write</access>
27893                    </field>
27894                    <field>
27895                        <name>GPIO0_LEVEL_LOW</name>
27896                        <bitRange>[0:0]</bitRange>
27897                        <access>read-write</access>
27898                    </field>
27899                </fields>
27900            </register>
27901            <register>
27902                <name>PROC1_INTF1</name>
27903                <addressOffset>0x000002ac</addressOffset>
27904                <description>Interrupt Force for proc1</description>
27905                <resetValue>0x00000000</resetValue>
27906                <fields>
27907                    <field>
27908                        <name>GPIO15_EDGE_HIGH</name>
27909                        <bitRange>[31:31]</bitRange>
27910                        <access>read-write</access>
27911                    </field>
27912                    <field>
27913                        <name>GPIO15_EDGE_LOW</name>
27914                        <bitRange>[30:30]</bitRange>
27915                        <access>read-write</access>
27916                    </field>
27917                    <field>
27918                        <name>GPIO15_LEVEL_HIGH</name>
27919                        <bitRange>[29:29]</bitRange>
27920                        <access>read-write</access>
27921                    </field>
27922                    <field>
27923                        <name>GPIO15_LEVEL_LOW</name>
27924                        <bitRange>[28:28]</bitRange>
27925                        <access>read-write</access>
27926                    </field>
27927                    <field>
27928                        <name>GPIO14_EDGE_HIGH</name>
27929                        <bitRange>[27:27]</bitRange>
27930                        <access>read-write</access>
27931                    </field>
27932                    <field>
27933                        <name>GPIO14_EDGE_LOW</name>
27934                        <bitRange>[26:26]</bitRange>
27935                        <access>read-write</access>
27936                    </field>
27937                    <field>
27938                        <name>GPIO14_LEVEL_HIGH</name>
27939                        <bitRange>[25:25]</bitRange>
27940                        <access>read-write</access>
27941                    </field>
27942                    <field>
27943                        <name>GPIO14_LEVEL_LOW</name>
27944                        <bitRange>[24:24]</bitRange>
27945                        <access>read-write</access>
27946                    </field>
27947                    <field>
27948                        <name>GPIO13_EDGE_HIGH</name>
27949                        <bitRange>[23:23]</bitRange>
27950                        <access>read-write</access>
27951                    </field>
27952                    <field>
27953                        <name>GPIO13_EDGE_LOW</name>
27954                        <bitRange>[22:22]</bitRange>
27955                        <access>read-write</access>
27956                    </field>
27957                    <field>
27958                        <name>GPIO13_LEVEL_HIGH</name>
27959                        <bitRange>[21:21]</bitRange>
27960                        <access>read-write</access>
27961                    </field>
27962                    <field>
27963                        <name>GPIO13_LEVEL_LOW</name>
27964                        <bitRange>[20:20]</bitRange>
27965                        <access>read-write</access>
27966                    </field>
27967                    <field>
27968                        <name>GPIO12_EDGE_HIGH</name>
27969                        <bitRange>[19:19]</bitRange>
27970                        <access>read-write</access>
27971                    </field>
27972                    <field>
27973                        <name>GPIO12_EDGE_LOW</name>
27974                        <bitRange>[18:18]</bitRange>
27975                        <access>read-write</access>
27976                    </field>
27977                    <field>
27978                        <name>GPIO12_LEVEL_HIGH</name>
27979                        <bitRange>[17:17]</bitRange>
27980                        <access>read-write</access>
27981                    </field>
27982                    <field>
27983                        <name>GPIO12_LEVEL_LOW</name>
27984                        <bitRange>[16:16]</bitRange>
27985                        <access>read-write</access>
27986                    </field>
27987                    <field>
27988                        <name>GPIO11_EDGE_HIGH</name>
27989                        <bitRange>[15:15]</bitRange>
27990                        <access>read-write</access>
27991                    </field>
27992                    <field>
27993                        <name>GPIO11_EDGE_LOW</name>
27994                        <bitRange>[14:14]</bitRange>
27995                        <access>read-write</access>
27996                    </field>
27997                    <field>
27998                        <name>GPIO11_LEVEL_HIGH</name>
27999                        <bitRange>[13:13]</bitRange>
28000                        <access>read-write</access>
28001                    </field>
28002                    <field>
28003                        <name>GPIO11_LEVEL_LOW</name>
28004                        <bitRange>[12:12]</bitRange>
28005                        <access>read-write</access>
28006                    </field>
28007                    <field>
28008                        <name>GPIO10_EDGE_HIGH</name>
28009                        <bitRange>[11:11]</bitRange>
28010                        <access>read-write</access>
28011                    </field>
28012                    <field>
28013                        <name>GPIO10_EDGE_LOW</name>
28014                        <bitRange>[10:10]</bitRange>
28015                        <access>read-write</access>
28016                    </field>
28017                    <field>
28018                        <name>GPIO10_LEVEL_HIGH</name>
28019                        <bitRange>[9:9]</bitRange>
28020                        <access>read-write</access>
28021                    </field>
28022                    <field>
28023                        <name>GPIO10_LEVEL_LOW</name>
28024                        <bitRange>[8:8]</bitRange>
28025                        <access>read-write</access>
28026                    </field>
28027                    <field>
28028                        <name>GPIO9_EDGE_HIGH</name>
28029                        <bitRange>[7:7]</bitRange>
28030                        <access>read-write</access>
28031                    </field>
28032                    <field>
28033                        <name>GPIO9_EDGE_LOW</name>
28034                        <bitRange>[6:6]</bitRange>
28035                        <access>read-write</access>
28036                    </field>
28037                    <field>
28038                        <name>GPIO9_LEVEL_HIGH</name>
28039                        <bitRange>[5:5]</bitRange>
28040                        <access>read-write</access>
28041                    </field>
28042                    <field>
28043                        <name>GPIO9_LEVEL_LOW</name>
28044                        <bitRange>[4:4]</bitRange>
28045                        <access>read-write</access>
28046                    </field>
28047                    <field>
28048                        <name>GPIO8_EDGE_HIGH</name>
28049                        <bitRange>[3:3]</bitRange>
28050                        <access>read-write</access>
28051                    </field>
28052                    <field>
28053                        <name>GPIO8_EDGE_LOW</name>
28054                        <bitRange>[2:2]</bitRange>
28055                        <access>read-write</access>
28056                    </field>
28057                    <field>
28058                        <name>GPIO8_LEVEL_HIGH</name>
28059                        <bitRange>[1:1]</bitRange>
28060                        <access>read-write</access>
28061                    </field>
28062                    <field>
28063                        <name>GPIO8_LEVEL_LOW</name>
28064                        <bitRange>[0:0]</bitRange>
28065                        <access>read-write</access>
28066                    </field>
28067                </fields>
28068            </register>
28069            <register>
28070                <name>PROC1_INTF2</name>
28071                <addressOffset>0x000002b0</addressOffset>
28072                <description>Interrupt Force for proc1</description>
28073                <resetValue>0x00000000</resetValue>
28074                <fields>
28075                    <field>
28076                        <name>GPIO23_EDGE_HIGH</name>
28077                        <bitRange>[31:31]</bitRange>
28078                        <access>read-write</access>
28079                    </field>
28080                    <field>
28081                        <name>GPIO23_EDGE_LOW</name>
28082                        <bitRange>[30:30]</bitRange>
28083                        <access>read-write</access>
28084                    </field>
28085                    <field>
28086                        <name>GPIO23_LEVEL_HIGH</name>
28087                        <bitRange>[29:29]</bitRange>
28088                        <access>read-write</access>
28089                    </field>
28090                    <field>
28091                        <name>GPIO23_LEVEL_LOW</name>
28092                        <bitRange>[28:28]</bitRange>
28093                        <access>read-write</access>
28094                    </field>
28095                    <field>
28096                        <name>GPIO22_EDGE_HIGH</name>
28097                        <bitRange>[27:27]</bitRange>
28098                        <access>read-write</access>
28099                    </field>
28100                    <field>
28101                        <name>GPIO22_EDGE_LOW</name>
28102                        <bitRange>[26:26]</bitRange>
28103                        <access>read-write</access>
28104                    </field>
28105                    <field>
28106                        <name>GPIO22_LEVEL_HIGH</name>
28107                        <bitRange>[25:25]</bitRange>
28108                        <access>read-write</access>
28109                    </field>
28110                    <field>
28111                        <name>GPIO22_LEVEL_LOW</name>
28112                        <bitRange>[24:24]</bitRange>
28113                        <access>read-write</access>
28114                    </field>
28115                    <field>
28116                        <name>GPIO21_EDGE_HIGH</name>
28117                        <bitRange>[23:23]</bitRange>
28118                        <access>read-write</access>
28119                    </field>
28120                    <field>
28121                        <name>GPIO21_EDGE_LOW</name>
28122                        <bitRange>[22:22]</bitRange>
28123                        <access>read-write</access>
28124                    </field>
28125                    <field>
28126                        <name>GPIO21_LEVEL_HIGH</name>
28127                        <bitRange>[21:21]</bitRange>
28128                        <access>read-write</access>
28129                    </field>
28130                    <field>
28131                        <name>GPIO21_LEVEL_LOW</name>
28132                        <bitRange>[20:20]</bitRange>
28133                        <access>read-write</access>
28134                    </field>
28135                    <field>
28136                        <name>GPIO20_EDGE_HIGH</name>
28137                        <bitRange>[19:19]</bitRange>
28138                        <access>read-write</access>
28139                    </field>
28140                    <field>
28141                        <name>GPIO20_EDGE_LOW</name>
28142                        <bitRange>[18:18]</bitRange>
28143                        <access>read-write</access>
28144                    </field>
28145                    <field>
28146                        <name>GPIO20_LEVEL_HIGH</name>
28147                        <bitRange>[17:17]</bitRange>
28148                        <access>read-write</access>
28149                    </field>
28150                    <field>
28151                        <name>GPIO20_LEVEL_LOW</name>
28152                        <bitRange>[16:16]</bitRange>
28153                        <access>read-write</access>
28154                    </field>
28155                    <field>
28156                        <name>GPIO19_EDGE_HIGH</name>
28157                        <bitRange>[15:15]</bitRange>
28158                        <access>read-write</access>
28159                    </field>
28160                    <field>
28161                        <name>GPIO19_EDGE_LOW</name>
28162                        <bitRange>[14:14]</bitRange>
28163                        <access>read-write</access>
28164                    </field>
28165                    <field>
28166                        <name>GPIO19_LEVEL_HIGH</name>
28167                        <bitRange>[13:13]</bitRange>
28168                        <access>read-write</access>
28169                    </field>
28170                    <field>
28171                        <name>GPIO19_LEVEL_LOW</name>
28172                        <bitRange>[12:12]</bitRange>
28173                        <access>read-write</access>
28174                    </field>
28175                    <field>
28176                        <name>GPIO18_EDGE_HIGH</name>
28177                        <bitRange>[11:11]</bitRange>
28178                        <access>read-write</access>
28179                    </field>
28180                    <field>
28181                        <name>GPIO18_EDGE_LOW</name>
28182                        <bitRange>[10:10]</bitRange>
28183                        <access>read-write</access>
28184                    </field>
28185                    <field>
28186                        <name>GPIO18_LEVEL_HIGH</name>
28187                        <bitRange>[9:9]</bitRange>
28188                        <access>read-write</access>
28189                    </field>
28190                    <field>
28191                        <name>GPIO18_LEVEL_LOW</name>
28192                        <bitRange>[8:8]</bitRange>
28193                        <access>read-write</access>
28194                    </field>
28195                    <field>
28196                        <name>GPIO17_EDGE_HIGH</name>
28197                        <bitRange>[7:7]</bitRange>
28198                        <access>read-write</access>
28199                    </field>
28200                    <field>
28201                        <name>GPIO17_EDGE_LOW</name>
28202                        <bitRange>[6:6]</bitRange>
28203                        <access>read-write</access>
28204                    </field>
28205                    <field>
28206                        <name>GPIO17_LEVEL_HIGH</name>
28207                        <bitRange>[5:5]</bitRange>
28208                        <access>read-write</access>
28209                    </field>
28210                    <field>
28211                        <name>GPIO17_LEVEL_LOW</name>
28212                        <bitRange>[4:4]</bitRange>
28213                        <access>read-write</access>
28214                    </field>
28215                    <field>
28216                        <name>GPIO16_EDGE_HIGH</name>
28217                        <bitRange>[3:3]</bitRange>
28218                        <access>read-write</access>
28219                    </field>
28220                    <field>
28221                        <name>GPIO16_EDGE_LOW</name>
28222                        <bitRange>[2:2]</bitRange>
28223                        <access>read-write</access>
28224                    </field>
28225                    <field>
28226                        <name>GPIO16_LEVEL_HIGH</name>
28227                        <bitRange>[1:1]</bitRange>
28228                        <access>read-write</access>
28229                    </field>
28230                    <field>
28231                        <name>GPIO16_LEVEL_LOW</name>
28232                        <bitRange>[0:0]</bitRange>
28233                        <access>read-write</access>
28234                    </field>
28235                </fields>
28236            </register>
28237            <register>
28238                <name>PROC1_INTF3</name>
28239                <addressOffset>0x000002b4</addressOffset>
28240                <description>Interrupt Force for proc1</description>
28241                <resetValue>0x00000000</resetValue>
28242                <fields>
28243                    <field>
28244                        <name>GPIO31_EDGE_HIGH</name>
28245                        <bitRange>[31:31]</bitRange>
28246                        <access>read-write</access>
28247                    </field>
28248                    <field>
28249                        <name>GPIO31_EDGE_LOW</name>
28250                        <bitRange>[30:30]</bitRange>
28251                        <access>read-write</access>
28252                    </field>
28253                    <field>
28254                        <name>GPIO31_LEVEL_HIGH</name>
28255                        <bitRange>[29:29]</bitRange>
28256                        <access>read-write</access>
28257                    </field>
28258                    <field>
28259                        <name>GPIO31_LEVEL_LOW</name>
28260                        <bitRange>[28:28]</bitRange>
28261                        <access>read-write</access>
28262                    </field>
28263                    <field>
28264                        <name>GPIO30_EDGE_HIGH</name>
28265                        <bitRange>[27:27]</bitRange>
28266                        <access>read-write</access>
28267                    </field>
28268                    <field>
28269                        <name>GPIO30_EDGE_LOW</name>
28270                        <bitRange>[26:26]</bitRange>
28271                        <access>read-write</access>
28272                    </field>
28273                    <field>
28274                        <name>GPIO30_LEVEL_HIGH</name>
28275                        <bitRange>[25:25]</bitRange>
28276                        <access>read-write</access>
28277                    </field>
28278                    <field>
28279                        <name>GPIO30_LEVEL_LOW</name>
28280                        <bitRange>[24:24]</bitRange>
28281                        <access>read-write</access>
28282                    </field>
28283                    <field>
28284                        <name>GPIO29_EDGE_HIGH</name>
28285                        <bitRange>[23:23]</bitRange>
28286                        <access>read-write</access>
28287                    </field>
28288                    <field>
28289                        <name>GPIO29_EDGE_LOW</name>
28290                        <bitRange>[22:22]</bitRange>
28291                        <access>read-write</access>
28292                    </field>
28293                    <field>
28294                        <name>GPIO29_LEVEL_HIGH</name>
28295                        <bitRange>[21:21]</bitRange>
28296                        <access>read-write</access>
28297                    </field>
28298                    <field>
28299                        <name>GPIO29_LEVEL_LOW</name>
28300                        <bitRange>[20:20]</bitRange>
28301                        <access>read-write</access>
28302                    </field>
28303                    <field>
28304                        <name>GPIO28_EDGE_HIGH</name>
28305                        <bitRange>[19:19]</bitRange>
28306                        <access>read-write</access>
28307                    </field>
28308                    <field>
28309                        <name>GPIO28_EDGE_LOW</name>
28310                        <bitRange>[18:18]</bitRange>
28311                        <access>read-write</access>
28312                    </field>
28313                    <field>
28314                        <name>GPIO28_LEVEL_HIGH</name>
28315                        <bitRange>[17:17]</bitRange>
28316                        <access>read-write</access>
28317                    </field>
28318                    <field>
28319                        <name>GPIO28_LEVEL_LOW</name>
28320                        <bitRange>[16:16]</bitRange>
28321                        <access>read-write</access>
28322                    </field>
28323                    <field>
28324                        <name>GPIO27_EDGE_HIGH</name>
28325                        <bitRange>[15:15]</bitRange>
28326                        <access>read-write</access>
28327                    </field>
28328                    <field>
28329                        <name>GPIO27_EDGE_LOW</name>
28330                        <bitRange>[14:14]</bitRange>
28331                        <access>read-write</access>
28332                    </field>
28333                    <field>
28334                        <name>GPIO27_LEVEL_HIGH</name>
28335                        <bitRange>[13:13]</bitRange>
28336                        <access>read-write</access>
28337                    </field>
28338                    <field>
28339                        <name>GPIO27_LEVEL_LOW</name>
28340                        <bitRange>[12:12]</bitRange>
28341                        <access>read-write</access>
28342                    </field>
28343                    <field>
28344                        <name>GPIO26_EDGE_HIGH</name>
28345                        <bitRange>[11:11]</bitRange>
28346                        <access>read-write</access>
28347                    </field>
28348                    <field>
28349                        <name>GPIO26_EDGE_LOW</name>
28350                        <bitRange>[10:10]</bitRange>
28351                        <access>read-write</access>
28352                    </field>
28353                    <field>
28354                        <name>GPIO26_LEVEL_HIGH</name>
28355                        <bitRange>[9:9]</bitRange>
28356                        <access>read-write</access>
28357                    </field>
28358                    <field>
28359                        <name>GPIO26_LEVEL_LOW</name>
28360                        <bitRange>[8:8]</bitRange>
28361                        <access>read-write</access>
28362                    </field>
28363                    <field>
28364                        <name>GPIO25_EDGE_HIGH</name>
28365                        <bitRange>[7:7]</bitRange>
28366                        <access>read-write</access>
28367                    </field>
28368                    <field>
28369                        <name>GPIO25_EDGE_LOW</name>
28370                        <bitRange>[6:6]</bitRange>
28371                        <access>read-write</access>
28372                    </field>
28373                    <field>
28374                        <name>GPIO25_LEVEL_HIGH</name>
28375                        <bitRange>[5:5]</bitRange>
28376                        <access>read-write</access>
28377                    </field>
28378                    <field>
28379                        <name>GPIO25_LEVEL_LOW</name>
28380                        <bitRange>[4:4]</bitRange>
28381                        <access>read-write</access>
28382                    </field>
28383                    <field>
28384                        <name>GPIO24_EDGE_HIGH</name>
28385                        <bitRange>[3:3]</bitRange>
28386                        <access>read-write</access>
28387                    </field>
28388                    <field>
28389                        <name>GPIO24_EDGE_LOW</name>
28390                        <bitRange>[2:2]</bitRange>
28391                        <access>read-write</access>
28392                    </field>
28393                    <field>
28394                        <name>GPIO24_LEVEL_HIGH</name>
28395                        <bitRange>[1:1]</bitRange>
28396                        <access>read-write</access>
28397                    </field>
28398                    <field>
28399                        <name>GPIO24_LEVEL_LOW</name>
28400                        <bitRange>[0:0]</bitRange>
28401                        <access>read-write</access>
28402                    </field>
28403                </fields>
28404            </register>
28405            <register>
28406                <name>PROC1_INTF4</name>
28407                <addressOffset>0x000002b8</addressOffset>
28408                <description>Interrupt Force for proc1</description>
28409                <resetValue>0x00000000</resetValue>
28410                <fields>
28411                    <field>
28412                        <name>GPIO39_EDGE_HIGH</name>
28413                        <bitRange>[31:31]</bitRange>
28414                        <access>read-write</access>
28415                    </field>
28416                    <field>
28417                        <name>GPIO39_EDGE_LOW</name>
28418                        <bitRange>[30:30]</bitRange>
28419                        <access>read-write</access>
28420                    </field>
28421                    <field>
28422                        <name>GPIO39_LEVEL_HIGH</name>
28423                        <bitRange>[29:29]</bitRange>
28424                        <access>read-write</access>
28425                    </field>
28426                    <field>
28427                        <name>GPIO39_LEVEL_LOW</name>
28428                        <bitRange>[28:28]</bitRange>
28429                        <access>read-write</access>
28430                    </field>
28431                    <field>
28432                        <name>GPIO38_EDGE_HIGH</name>
28433                        <bitRange>[27:27]</bitRange>
28434                        <access>read-write</access>
28435                    </field>
28436                    <field>
28437                        <name>GPIO38_EDGE_LOW</name>
28438                        <bitRange>[26:26]</bitRange>
28439                        <access>read-write</access>
28440                    </field>
28441                    <field>
28442                        <name>GPIO38_LEVEL_HIGH</name>
28443                        <bitRange>[25:25]</bitRange>
28444                        <access>read-write</access>
28445                    </field>
28446                    <field>
28447                        <name>GPIO38_LEVEL_LOW</name>
28448                        <bitRange>[24:24]</bitRange>
28449                        <access>read-write</access>
28450                    </field>
28451                    <field>
28452                        <name>GPIO37_EDGE_HIGH</name>
28453                        <bitRange>[23:23]</bitRange>
28454                        <access>read-write</access>
28455                    </field>
28456                    <field>
28457                        <name>GPIO37_EDGE_LOW</name>
28458                        <bitRange>[22:22]</bitRange>
28459                        <access>read-write</access>
28460                    </field>
28461                    <field>
28462                        <name>GPIO37_LEVEL_HIGH</name>
28463                        <bitRange>[21:21]</bitRange>
28464                        <access>read-write</access>
28465                    </field>
28466                    <field>
28467                        <name>GPIO37_LEVEL_LOW</name>
28468                        <bitRange>[20:20]</bitRange>
28469                        <access>read-write</access>
28470                    </field>
28471                    <field>
28472                        <name>GPIO36_EDGE_HIGH</name>
28473                        <bitRange>[19:19]</bitRange>
28474                        <access>read-write</access>
28475                    </field>
28476                    <field>
28477                        <name>GPIO36_EDGE_LOW</name>
28478                        <bitRange>[18:18]</bitRange>
28479                        <access>read-write</access>
28480                    </field>
28481                    <field>
28482                        <name>GPIO36_LEVEL_HIGH</name>
28483                        <bitRange>[17:17]</bitRange>
28484                        <access>read-write</access>
28485                    </field>
28486                    <field>
28487                        <name>GPIO36_LEVEL_LOW</name>
28488                        <bitRange>[16:16]</bitRange>
28489                        <access>read-write</access>
28490                    </field>
28491                    <field>
28492                        <name>GPIO35_EDGE_HIGH</name>
28493                        <bitRange>[15:15]</bitRange>
28494                        <access>read-write</access>
28495                    </field>
28496                    <field>
28497                        <name>GPIO35_EDGE_LOW</name>
28498                        <bitRange>[14:14]</bitRange>
28499                        <access>read-write</access>
28500                    </field>
28501                    <field>
28502                        <name>GPIO35_LEVEL_HIGH</name>
28503                        <bitRange>[13:13]</bitRange>
28504                        <access>read-write</access>
28505                    </field>
28506                    <field>
28507                        <name>GPIO35_LEVEL_LOW</name>
28508                        <bitRange>[12:12]</bitRange>
28509                        <access>read-write</access>
28510                    </field>
28511                    <field>
28512                        <name>GPIO34_EDGE_HIGH</name>
28513                        <bitRange>[11:11]</bitRange>
28514                        <access>read-write</access>
28515                    </field>
28516                    <field>
28517                        <name>GPIO34_EDGE_LOW</name>
28518                        <bitRange>[10:10]</bitRange>
28519                        <access>read-write</access>
28520                    </field>
28521                    <field>
28522                        <name>GPIO34_LEVEL_HIGH</name>
28523                        <bitRange>[9:9]</bitRange>
28524                        <access>read-write</access>
28525                    </field>
28526                    <field>
28527                        <name>GPIO34_LEVEL_LOW</name>
28528                        <bitRange>[8:8]</bitRange>
28529                        <access>read-write</access>
28530                    </field>
28531                    <field>
28532                        <name>GPIO33_EDGE_HIGH</name>
28533                        <bitRange>[7:7]</bitRange>
28534                        <access>read-write</access>
28535                    </field>
28536                    <field>
28537                        <name>GPIO33_EDGE_LOW</name>
28538                        <bitRange>[6:6]</bitRange>
28539                        <access>read-write</access>
28540                    </field>
28541                    <field>
28542                        <name>GPIO33_LEVEL_HIGH</name>
28543                        <bitRange>[5:5]</bitRange>
28544                        <access>read-write</access>
28545                    </field>
28546                    <field>
28547                        <name>GPIO33_LEVEL_LOW</name>
28548                        <bitRange>[4:4]</bitRange>
28549                        <access>read-write</access>
28550                    </field>
28551                    <field>
28552                        <name>GPIO32_EDGE_HIGH</name>
28553                        <bitRange>[3:3]</bitRange>
28554                        <access>read-write</access>
28555                    </field>
28556                    <field>
28557                        <name>GPIO32_EDGE_LOW</name>
28558                        <bitRange>[2:2]</bitRange>
28559                        <access>read-write</access>
28560                    </field>
28561                    <field>
28562                        <name>GPIO32_LEVEL_HIGH</name>
28563                        <bitRange>[1:1]</bitRange>
28564                        <access>read-write</access>
28565                    </field>
28566                    <field>
28567                        <name>GPIO32_LEVEL_LOW</name>
28568                        <bitRange>[0:0]</bitRange>
28569                        <access>read-write</access>
28570                    </field>
28571                </fields>
28572            </register>
28573            <register>
28574                <name>PROC1_INTF5</name>
28575                <addressOffset>0x000002bc</addressOffset>
28576                <description>Interrupt Force for proc1</description>
28577                <resetValue>0x00000000</resetValue>
28578                <fields>
28579                    <field>
28580                        <name>GPIO47_EDGE_HIGH</name>
28581                        <bitRange>[31:31]</bitRange>
28582                        <access>read-write</access>
28583                    </field>
28584                    <field>
28585                        <name>GPIO47_EDGE_LOW</name>
28586                        <bitRange>[30:30]</bitRange>
28587                        <access>read-write</access>
28588                    </field>
28589                    <field>
28590                        <name>GPIO47_LEVEL_HIGH</name>
28591                        <bitRange>[29:29]</bitRange>
28592                        <access>read-write</access>
28593                    </field>
28594                    <field>
28595                        <name>GPIO47_LEVEL_LOW</name>
28596                        <bitRange>[28:28]</bitRange>
28597                        <access>read-write</access>
28598                    </field>
28599                    <field>
28600                        <name>GPIO46_EDGE_HIGH</name>
28601                        <bitRange>[27:27]</bitRange>
28602                        <access>read-write</access>
28603                    </field>
28604                    <field>
28605                        <name>GPIO46_EDGE_LOW</name>
28606                        <bitRange>[26:26]</bitRange>
28607                        <access>read-write</access>
28608                    </field>
28609                    <field>
28610                        <name>GPIO46_LEVEL_HIGH</name>
28611                        <bitRange>[25:25]</bitRange>
28612                        <access>read-write</access>
28613                    </field>
28614                    <field>
28615                        <name>GPIO46_LEVEL_LOW</name>
28616                        <bitRange>[24:24]</bitRange>
28617                        <access>read-write</access>
28618                    </field>
28619                    <field>
28620                        <name>GPIO45_EDGE_HIGH</name>
28621                        <bitRange>[23:23]</bitRange>
28622                        <access>read-write</access>
28623                    </field>
28624                    <field>
28625                        <name>GPIO45_EDGE_LOW</name>
28626                        <bitRange>[22:22]</bitRange>
28627                        <access>read-write</access>
28628                    </field>
28629                    <field>
28630                        <name>GPIO45_LEVEL_HIGH</name>
28631                        <bitRange>[21:21]</bitRange>
28632                        <access>read-write</access>
28633                    </field>
28634                    <field>
28635                        <name>GPIO45_LEVEL_LOW</name>
28636                        <bitRange>[20:20]</bitRange>
28637                        <access>read-write</access>
28638                    </field>
28639                    <field>
28640                        <name>GPIO44_EDGE_HIGH</name>
28641                        <bitRange>[19:19]</bitRange>
28642                        <access>read-write</access>
28643                    </field>
28644                    <field>
28645                        <name>GPIO44_EDGE_LOW</name>
28646                        <bitRange>[18:18]</bitRange>
28647                        <access>read-write</access>
28648                    </field>
28649                    <field>
28650                        <name>GPIO44_LEVEL_HIGH</name>
28651                        <bitRange>[17:17]</bitRange>
28652                        <access>read-write</access>
28653                    </field>
28654                    <field>
28655                        <name>GPIO44_LEVEL_LOW</name>
28656                        <bitRange>[16:16]</bitRange>
28657                        <access>read-write</access>
28658                    </field>
28659                    <field>
28660                        <name>GPIO43_EDGE_HIGH</name>
28661                        <bitRange>[15:15]</bitRange>
28662                        <access>read-write</access>
28663                    </field>
28664                    <field>
28665                        <name>GPIO43_EDGE_LOW</name>
28666                        <bitRange>[14:14]</bitRange>
28667                        <access>read-write</access>
28668                    </field>
28669                    <field>
28670                        <name>GPIO43_LEVEL_HIGH</name>
28671                        <bitRange>[13:13]</bitRange>
28672                        <access>read-write</access>
28673                    </field>
28674                    <field>
28675                        <name>GPIO43_LEVEL_LOW</name>
28676                        <bitRange>[12:12]</bitRange>
28677                        <access>read-write</access>
28678                    </field>
28679                    <field>
28680                        <name>GPIO42_EDGE_HIGH</name>
28681                        <bitRange>[11:11]</bitRange>
28682                        <access>read-write</access>
28683                    </field>
28684                    <field>
28685                        <name>GPIO42_EDGE_LOW</name>
28686                        <bitRange>[10:10]</bitRange>
28687                        <access>read-write</access>
28688                    </field>
28689                    <field>
28690                        <name>GPIO42_LEVEL_HIGH</name>
28691                        <bitRange>[9:9]</bitRange>
28692                        <access>read-write</access>
28693                    </field>
28694                    <field>
28695                        <name>GPIO42_LEVEL_LOW</name>
28696                        <bitRange>[8:8]</bitRange>
28697                        <access>read-write</access>
28698                    </field>
28699                    <field>
28700                        <name>GPIO41_EDGE_HIGH</name>
28701                        <bitRange>[7:7]</bitRange>
28702                        <access>read-write</access>
28703                    </field>
28704                    <field>
28705                        <name>GPIO41_EDGE_LOW</name>
28706                        <bitRange>[6:6]</bitRange>
28707                        <access>read-write</access>
28708                    </field>
28709                    <field>
28710                        <name>GPIO41_LEVEL_HIGH</name>
28711                        <bitRange>[5:5]</bitRange>
28712                        <access>read-write</access>
28713                    </field>
28714                    <field>
28715                        <name>GPIO41_LEVEL_LOW</name>
28716                        <bitRange>[4:4]</bitRange>
28717                        <access>read-write</access>
28718                    </field>
28719                    <field>
28720                        <name>GPIO40_EDGE_HIGH</name>
28721                        <bitRange>[3:3]</bitRange>
28722                        <access>read-write</access>
28723                    </field>
28724                    <field>
28725                        <name>GPIO40_EDGE_LOW</name>
28726                        <bitRange>[2:2]</bitRange>
28727                        <access>read-write</access>
28728                    </field>
28729                    <field>
28730                        <name>GPIO40_LEVEL_HIGH</name>
28731                        <bitRange>[1:1]</bitRange>
28732                        <access>read-write</access>
28733                    </field>
28734                    <field>
28735                        <name>GPIO40_LEVEL_LOW</name>
28736                        <bitRange>[0:0]</bitRange>
28737                        <access>read-write</access>
28738                    </field>
28739                </fields>
28740            </register>
28741            <register>
28742                <name>PROC1_INTS0</name>
28743                <addressOffset>0x000002c0</addressOffset>
28744                <description>Interrupt status after masking &amp; forcing for proc1</description>
28745                <resetValue>0x00000000</resetValue>
28746                <fields>
28747                    <field>
28748                        <name>GPIO7_EDGE_HIGH</name>
28749                        <bitRange>[31:31]</bitRange>
28750                        <access>read-only</access>
28751                    </field>
28752                    <field>
28753                        <name>GPIO7_EDGE_LOW</name>
28754                        <bitRange>[30:30]</bitRange>
28755                        <access>read-only</access>
28756                    </field>
28757                    <field>
28758                        <name>GPIO7_LEVEL_HIGH</name>
28759                        <bitRange>[29:29]</bitRange>
28760                        <access>read-only</access>
28761                    </field>
28762                    <field>
28763                        <name>GPIO7_LEVEL_LOW</name>
28764                        <bitRange>[28:28]</bitRange>
28765                        <access>read-only</access>
28766                    </field>
28767                    <field>
28768                        <name>GPIO6_EDGE_HIGH</name>
28769                        <bitRange>[27:27]</bitRange>
28770                        <access>read-only</access>
28771                    </field>
28772                    <field>
28773                        <name>GPIO6_EDGE_LOW</name>
28774                        <bitRange>[26:26]</bitRange>
28775                        <access>read-only</access>
28776                    </field>
28777                    <field>
28778                        <name>GPIO6_LEVEL_HIGH</name>
28779                        <bitRange>[25:25]</bitRange>
28780                        <access>read-only</access>
28781                    </field>
28782                    <field>
28783                        <name>GPIO6_LEVEL_LOW</name>
28784                        <bitRange>[24:24]</bitRange>
28785                        <access>read-only</access>
28786                    </field>
28787                    <field>
28788                        <name>GPIO5_EDGE_HIGH</name>
28789                        <bitRange>[23:23]</bitRange>
28790                        <access>read-only</access>
28791                    </field>
28792                    <field>
28793                        <name>GPIO5_EDGE_LOW</name>
28794                        <bitRange>[22:22]</bitRange>
28795                        <access>read-only</access>
28796                    </field>
28797                    <field>
28798                        <name>GPIO5_LEVEL_HIGH</name>
28799                        <bitRange>[21:21]</bitRange>
28800                        <access>read-only</access>
28801                    </field>
28802                    <field>
28803                        <name>GPIO5_LEVEL_LOW</name>
28804                        <bitRange>[20:20]</bitRange>
28805                        <access>read-only</access>
28806                    </field>
28807                    <field>
28808                        <name>GPIO4_EDGE_HIGH</name>
28809                        <bitRange>[19:19]</bitRange>
28810                        <access>read-only</access>
28811                    </field>
28812                    <field>
28813                        <name>GPIO4_EDGE_LOW</name>
28814                        <bitRange>[18:18]</bitRange>
28815                        <access>read-only</access>
28816                    </field>
28817                    <field>
28818                        <name>GPIO4_LEVEL_HIGH</name>
28819                        <bitRange>[17:17]</bitRange>
28820                        <access>read-only</access>
28821                    </field>
28822                    <field>
28823                        <name>GPIO4_LEVEL_LOW</name>
28824                        <bitRange>[16:16]</bitRange>
28825                        <access>read-only</access>
28826                    </field>
28827                    <field>
28828                        <name>GPIO3_EDGE_HIGH</name>
28829                        <bitRange>[15:15]</bitRange>
28830                        <access>read-only</access>
28831                    </field>
28832                    <field>
28833                        <name>GPIO3_EDGE_LOW</name>
28834                        <bitRange>[14:14]</bitRange>
28835                        <access>read-only</access>
28836                    </field>
28837                    <field>
28838                        <name>GPIO3_LEVEL_HIGH</name>
28839                        <bitRange>[13:13]</bitRange>
28840                        <access>read-only</access>
28841                    </field>
28842                    <field>
28843                        <name>GPIO3_LEVEL_LOW</name>
28844                        <bitRange>[12:12]</bitRange>
28845                        <access>read-only</access>
28846                    </field>
28847                    <field>
28848                        <name>GPIO2_EDGE_HIGH</name>
28849                        <bitRange>[11:11]</bitRange>
28850                        <access>read-only</access>
28851                    </field>
28852                    <field>
28853                        <name>GPIO2_EDGE_LOW</name>
28854                        <bitRange>[10:10]</bitRange>
28855                        <access>read-only</access>
28856                    </field>
28857                    <field>
28858                        <name>GPIO2_LEVEL_HIGH</name>
28859                        <bitRange>[9:9]</bitRange>
28860                        <access>read-only</access>
28861                    </field>
28862                    <field>
28863                        <name>GPIO2_LEVEL_LOW</name>
28864                        <bitRange>[8:8]</bitRange>
28865                        <access>read-only</access>
28866                    </field>
28867                    <field>
28868                        <name>GPIO1_EDGE_HIGH</name>
28869                        <bitRange>[7:7]</bitRange>
28870                        <access>read-only</access>
28871                    </field>
28872                    <field>
28873                        <name>GPIO1_EDGE_LOW</name>
28874                        <bitRange>[6:6]</bitRange>
28875                        <access>read-only</access>
28876                    </field>
28877                    <field>
28878                        <name>GPIO1_LEVEL_HIGH</name>
28879                        <bitRange>[5:5]</bitRange>
28880                        <access>read-only</access>
28881                    </field>
28882                    <field>
28883                        <name>GPIO1_LEVEL_LOW</name>
28884                        <bitRange>[4:4]</bitRange>
28885                        <access>read-only</access>
28886                    </field>
28887                    <field>
28888                        <name>GPIO0_EDGE_HIGH</name>
28889                        <bitRange>[3:3]</bitRange>
28890                        <access>read-only</access>
28891                    </field>
28892                    <field>
28893                        <name>GPIO0_EDGE_LOW</name>
28894                        <bitRange>[2:2]</bitRange>
28895                        <access>read-only</access>
28896                    </field>
28897                    <field>
28898                        <name>GPIO0_LEVEL_HIGH</name>
28899                        <bitRange>[1:1]</bitRange>
28900                        <access>read-only</access>
28901                    </field>
28902                    <field>
28903                        <name>GPIO0_LEVEL_LOW</name>
28904                        <bitRange>[0:0]</bitRange>
28905                        <access>read-only</access>
28906                    </field>
28907                </fields>
28908            </register>
28909            <register>
28910                <name>PROC1_INTS1</name>
28911                <addressOffset>0x000002c4</addressOffset>
28912                <description>Interrupt status after masking &amp; forcing for proc1</description>
28913                <resetValue>0x00000000</resetValue>
28914                <fields>
28915                    <field>
28916                        <name>GPIO15_EDGE_HIGH</name>
28917                        <bitRange>[31:31]</bitRange>
28918                        <access>read-only</access>
28919                    </field>
28920                    <field>
28921                        <name>GPIO15_EDGE_LOW</name>
28922                        <bitRange>[30:30]</bitRange>
28923                        <access>read-only</access>
28924                    </field>
28925                    <field>
28926                        <name>GPIO15_LEVEL_HIGH</name>
28927                        <bitRange>[29:29]</bitRange>
28928                        <access>read-only</access>
28929                    </field>
28930                    <field>
28931                        <name>GPIO15_LEVEL_LOW</name>
28932                        <bitRange>[28:28]</bitRange>
28933                        <access>read-only</access>
28934                    </field>
28935                    <field>
28936                        <name>GPIO14_EDGE_HIGH</name>
28937                        <bitRange>[27:27]</bitRange>
28938                        <access>read-only</access>
28939                    </field>
28940                    <field>
28941                        <name>GPIO14_EDGE_LOW</name>
28942                        <bitRange>[26:26]</bitRange>
28943                        <access>read-only</access>
28944                    </field>
28945                    <field>
28946                        <name>GPIO14_LEVEL_HIGH</name>
28947                        <bitRange>[25:25]</bitRange>
28948                        <access>read-only</access>
28949                    </field>
28950                    <field>
28951                        <name>GPIO14_LEVEL_LOW</name>
28952                        <bitRange>[24:24]</bitRange>
28953                        <access>read-only</access>
28954                    </field>
28955                    <field>
28956                        <name>GPIO13_EDGE_HIGH</name>
28957                        <bitRange>[23:23]</bitRange>
28958                        <access>read-only</access>
28959                    </field>
28960                    <field>
28961                        <name>GPIO13_EDGE_LOW</name>
28962                        <bitRange>[22:22]</bitRange>
28963                        <access>read-only</access>
28964                    </field>
28965                    <field>
28966                        <name>GPIO13_LEVEL_HIGH</name>
28967                        <bitRange>[21:21]</bitRange>
28968                        <access>read-only</access>
28969                    </field>
28970                    <field>
28971                        <name>GPIO13_LEVEL_LOW</name>
28972                        <bitRange>[20:20]</bitRange>
28973                        <access>read-only</access>
28974                    </field>
28975                    <field>
28976                        <name>GPIO12_EDGE_HIGH</name>
28977                        <bitRange>[19:19]</bitRange>
28978                        <access>read-only</access>
28979                    </field>
28980                    <field>
28981                        <name>GPIO12_EDGE_LOW</name>
28982                        <bitRange>[18:18]</bitRange>
28983                        <access>read-only</access>
28984                    </field>
28985                    <field>
28986                        <name>GPIO12_LEVEL_HIGH</name>
28987                        <bitRange>[17:17]</bitRange>
28988                        <access>read-only</access>
28989                    </field>
28990                    <field>
28991                        <name>GPIO12_LEVEL_LOW</name>
28992                        <bitRange>[16:16]</bitRange>
28993                        <access>read-only</access>
28994                    </field>
28995                    <field>
28996                        <name>GPIO11_EDGE_HIGH</name>
28997                        <bitRange>[15:15]</bitRange>
28998                        <access>read-only</access>
28999                    </field>
29000                    <field>
29001                        <name>GPIO11_EDGE_LOW</name>
29002                        <bitRange>[14:14]</bitRange>
29003                        <access>read-only</access>
29004                    </field>
29005                    <field>
29006                        <name>GPIO11_LEVEL_HIGH</name>
29007                        <bitRange>[13:13]</bitRange>
29008                        <access>read-only</access>
29009                    </field>
29010                    <field>
29011                        <name>GPIO11_LEVEL_LOW</name>
29012                        <bitRange>[12:12]</bitRange>
29013                        <access>read-only</access>
29014                    </field>
29015                    <field>
29016                        <name>GPIO10_EDGE_HIGH</name>
29017                        <bitRange>[11:11]</bitRange>
29018                        <access>read-only</access>
29019                    </field>
29020                    <field>
29021                        <name>GPIO10_EDGE_LOW</name>
29022                        <bitRange>[10:10]</bitRange>
29023                        <access>read-only</access>
29024                    </field>
29025                    <field>
29026                        <name>GPIO10_LEVEL_HIGH</name>
29027                        <bitRange>[9:9]</bitRange>
29028                        <access>read-only</access>
29029                    </field>
29030                    <field>
29031                        <name>GPIO10_LEVEL_LOW</name>
29032                        <bitRange>[8:8]</bitRange>
29033                        <access>read-only</access>
29034                    </field>
29035                    <field>
29036                        <name>GPIO9_EDGE_HIGH</name>
29037                        <bitRange>[7:7]</bitRange>
29038                        <access>read-only</access>
29039                    </field>
29040                    <field>
29041                        <name>GPIO9_EDGE_LOW</name>
29042                        <bitRange>[6:6]</bitRange>
29043                        <access>read-only</access>
29044                    </field>
29045                    <field>
29046                        <name>GPIO9_LEVEL_HIGH</name>
29047                        <bitRange>[5:5]</bitRange>
29048                        <access>read-only</access>
29049                    </field>
29050                    <field>
29051                        <name>GPIO9_LEVEL_LOW</name>
29052                        <bitRange>[4:4]</bitRange>
29053                        <access>read-only</access>
29054                    </field>
29055                    <field>
29056                        <name>GPIO8_EDGE_HIGH</name>
29057                        <bitRange>[3:3]</bitRange>
29058                        <access>read-only</access>
29059                    </field>
29060                    <field>
29061                        <name>GPIO8_EDGE_LOW</name>
29062                        <bitRange>[2:2]</bitRange>
29063                        <access>read-only</access>
29064                    </field>
29065                    <field>
29066                        <name>GPIO8_LEVEL_HIGH</name>
29067                        <bitRange>[1:1]</bitRange>
29068                        <access>read-only</access>
29069                    </field>
29070                    <field>
29071                        <name>GPIO8_LEVEL_LOW</name>
29072                        <bitRange>[0:0]</bitRange>
29073                        <access>read-only</access>
29074                    </field>
29075                </fields>
29076            </register>
29077            <register>
29078                <name>PROC1_INTS2</name>
29079                <addressOffset>0x000002c8</addressOffset>
29080                <description>Interrupt status after masking &amp; forcing for proc1</description>
29081                <resetValue>0x00000000</resetValue>
29082                <fields>
29083                    <field>
29084                        <name>GPIO23_EDGE_HIGH</name>
29085                        <bitRange>[31:31]</bitRange>
29086                        <access>read-only</access>
29087                    </field>
29088                    <field>
29089                        <name>GPIO23_EDGE_LOW</name>
29090                        <bitRange>[30:30]</bitRange>
29091                        <access>read-only</access>
29092                    </field>
29093                    <field>
29094                        <name>GPIO23_LEVEL_HIGH</name>
29095                        <bitRange>[29:29]</bitRange>
29096                        <access>read-only</access>
29097                    </field>
29098                    <field>
29099                        <name>GPIO23_LEVEL_LOW</name>
29100                        <bitRange>[28:28]</bitRange>
29101                        <access>read-only</access>
29102                    </field>
29103                    <field>
29104                        <name>GPIO22_EDGE_HIGH</name>
29105                        <bitRange>[27:27]</bitRange>
29106                        <access>read-only</access>
29107                    </field>
29108                    <field>
29109                        <name>GPIO22_EDGE_LOW</name>
29110                        <bitRange>[26:26]</bitRange>
29111                        <access>read-only</access>
29112                    </field>
29113                    <field>
29114                        <name>GPIO22_LEVEL_HIGH</name>
29115                        <bitRange>[25:25]</bitRange>
29116                        <access>read-only</access>
29117                    </field>
29118                    <field>
29119                        <name>GPIO22_LEVEL_LOW</name>
29120                        <bitRange>[24:24]</bitRange>
29121                        <access>read-only</access>
29122                    </field>
29123                    <field>
29124                        <name>GPIO21_EDGE_HIGH</name>
29125                        <bitRange>[23:23]</bitRange>
29126                        <access>read-only</access>
29127                    </field>
29128                    <field>
29129                        <name>GPIO21_EDGE_LOW</name>
29130                        <bitRange>[22:22]</bitRange>
29131                        <access>read-only</access>
29132                    </field>
29133                    <field>
29134                        <name>GPIO21_LEVEL_HIGH</name>
29135                        <bitRange>[21:21]</bitRange>
29136                        <access>read-only</access>
29137                    </field>
29138                    <field>
29139                        <name>GPIO21_LEVEL_LOW</name>
29140                        <bitRange>[20:20]</bitRange>
29141                        <access>read-only</access>
29142                    </field>
29143                    <field>
29144                        <name>GPIO20_EDGE_HIGH</name>
29145                        <bitRange>[19:19]</bitRange>
29146                        <access>read-only</access>
29147                    </field>
29148                    <field>
29149                        <name>GPIO20_EDGE_LOW</name>
29150                        <bitRange>[18:18]</bitRange>
29151                        <access>read-only</access>
29152                    </field>
29153                    <field>
29154                        <name>GPIO20_LEVEL_HIGH</name>
29155                        <bitRange>[17:17]</bitRange>
29156                        <access>read-only</access>
29157                    </field>
29158                    <field>
29159                        <name>GPIO20_LEVEL_LOW</name>
29160                        <bitRange>[16:16]</bitRange>
29161                        <access>read-only</access>
29162                    </field>
29163                    <field>
29164                        <name>GPIO19_EDGE_HIGH</name>
29165                        <bitRange>[15:15]</bitRange>
29166                        <access>read-only</access>
29167                    </field>
29168                    <field>
29169                        <name>GPIO19_EDGE_LOW</name>
29170                        <bitRange>[14:14]</bitRange>
29171                        <access>read-only</access>
29172                    </field>
29173                    <field>
29174                        <name>GPIO19_LEVEL_HIGH</name>
29175                        <bitRange>[13:13]</bitRange>
29176                        <access>read-only</access>
29177                    </field>
29178                    <field>
29179                        <name>GPIO19_LEVEL_LOW</name>
29180                        <bitRange>[12:12]</bitRange>
29181                        <access>read-only</access>
29182                    </field>
29183                    <field>
29184                        <name>GPIO18_EDGE_HIGH</name>
29185                        <bitRange>[11:11]</bitRange>
29186                        <access>read-only</access>
29187                    </field>
29188                    <field>
29189                        <name>GPIO18_EDGE_LOW</name>
29190                        <bitRange>[10:10]</bitRange>
29191                        <access>read-only</access>
29192                    </field>
29193                    <field>
29194                        <name>GPIO18_LEVEL_HIGH</name>
29195                        <bitRange>[9:9]</bitRange>
29196                        <access>read-only</access>
29197                    </field>
29198                    <field>
29199                        <name>GPIO18_LEVEL_LOW</name>
29200                        <bitRange>[8:8]</bitRange>
29201                        <access>read-only</access>
29202                    </field>
29203                    <field>
29204                        <name>GPIO17_EDGE_HIGH</name>
29205                        <bitRange>[7:7]</bitRange>
29206                        <access>read-only</access>
29207                    </field>
29208                    <field>
29209                        <name>GPIO17_EDGE_LOW</name>
29210                        <bitRange>[6:6]</bitRange>
29211                        <access>read-only</access>
29212                    </field>
29213                    <field>
29214                        <name>GPIO17_LEVEL_HIGH</name>
29215                        <bitRange>[5:5]</bitRange>
29216                        <access>read-only</access>
29217                    </field>
29218                    <field>
29219                        <name>GPIO17_LEVEL_LOW</name>
29220                        <bitRange>[4:4]</bitRange>
29221                        <access>read-only</access>
29222                    </field>
29223                    <field>
29224                        <name>GPIO16_EDGE_HIGH</name>
29225                        <bitRange>[3:3]</bitRange>
29226                        <access>read-only</access>
29227                    </field>
29228                    <field>
29229                        <name>GPIO16_EDGE_LOW</name>
29230                        <bitRange>[2:2]</bitRange>
29231                        <access>read-only</access>
29232                    </field>
29233                    <field>
29234                        <name>GPIO16_LEVEL_HIGH</name>
29235                        <bitRange>[1:1]</bitRange>
29236                        <access>read-only</access>
29237                    </field>
29238                    <field>
29239                        <name>GPIO16_LEVEL_LOW</name>
29240                        <bitRange>[0:0]</bitRange>
29241                        <access>read-only</access>
29242                    </field>
29243                </fields>
29244            </register>
29245            <register>
29246                <name>PROC1_INTS3</name>
29247                <addressOffset>0x000002cc</addressOffset>
29248                <description>Interrupt status after masking &amp; forcing for proc1</description>
29249                <resetValue>0x00000000</resetValue>
29250                <fields>
29251                    <field>
29252                        <name>GPIO31_EDGE_HIGH</name>
29253                        <bitRange>[31:31]</bitRange>
29254                        <access>read-only</access>
29255                    </field>
29256                    <field>
29257                        <name>GPIO31_EDGE_LOW</name>
29258                        <bitRange>[30:30]</bitRange>
29259                        <access>read-only</access>
29260                    </field>
29261                    <field>
29262                        <name>GPIO31_LEVEL_HIGH</name>
29263                        <bitRange>[29:29]</bitRange>
29264                        <access>read-only</access>
29265                    </field>
29266                    <field>
29267                        <name>GPIO31_LEVEL_LOW</name>
29268                        <bitRange>[28:28]</bitRange>
29269                        <access>read-only</access>
29270                    </field>
29271                    <field>
29272                        <name>GPIO30_EDGE_HIGH</name>
29273                        <bitRange>[27:27]</bitRange>
29274                        <access>read-only</access>
29275                    </field>
29276                    <field>
29277                        <name>GPIO30_EDGE_LOW</name>
29278                        <bitRange>[26:26]</bitRange>
29279                        <access>read-only</access>
29280                    </field>
29281                    <field>
29282                        <name>GPIO30_LEVEL_HIGH</name>
29283                        <bitRange>[25:25]</bitRange>
29284                        <access>read-only</access>
29285                    </field>
29286                    <field>
29287                        <name>GPIO30_LEVEL_LOW</name>
29288                        <bitRange>[24:24]</bitRange>
29289                        <access>read-only</access>
29290                    </field>
29291                    <field>
29292                        <name>GPIO29_EDGE_HIGH</name>
29293                        <bitRange>[23:23]</bitRange>
29294                        <access>read-only</access>
29295                    </field>
29296                    <field>
29297                        <name>GPIO29_EDGE_LOW</name>
29298                        <bitRange>[22:22]</bitRange>
29299                        <access>read-only</access>
29300                    </field>
29301                    <field>
29302                        <name>GPIO29_LEVEL_HIGH</name>
29303                        <bitRange>[21:21]</bitRange>
29304                        <access>read-only</access>
29305                    </field>
29306                    <field>
29307                        <name>GPIO29_LEVEL_LOW</name>
29308                        <bitRange>[20:20]</bitRange>
29309                        <access>read-only</access>
29310                    </field>
29311                    <field>
29312                        <name>GPIO28_EDGE_HIGH</name>
29313                        <bitRange>[19:19]</bitRange>
29314                        <access>read-only</access>
29315                    </field>
29316                    <field>
29317                        <name>GPIO28_EDGE_LOW</name>
29318                        <bitRange>[18:18]</bitRange>
29319                        <access>read-only</access>
29320                    </field>
29321                    <field>
29322                        <name>GPIO28_LEVEL_HIGH</name>
29323                        <bitRange>[17:17]</bitRange>
29324                        <access>read-only</access>
29325                    </field>
29326                    <field>
29327                        <name>GPIO28_LEVEL_LOW</name>
29328                        <bitRange>[16:16]</bitRange>
29329                        <access>read-only</access>
29330                    </field>
29331                    <field>
29332                        <name>GPIO27_EDGE_HIGH</name>
29333                        <bitRange>[15:15]</bitRange>
29334                        <access>read-only</access>
29335                    </field>
29336                    <field>
29337                        <name>GPIO27_EDGE_LOW</name>
29338                        <bitRange>[14:14]</bitRange>
29339                        <access>read-only</access>
29340                    </field>
29341                    <field>
29342                        <name>GPIO27_LEVEL_HIGH</name>
29343                        <bitRange>[13:13]</bitRange>
29344                        <access>read-only</access>
29345                    </field>
29346                    <field>
29347                        <name>GPIO27_LEVEL_LOW</name>
29348                        <bitRange>[12:12]</bitRange>
29349                        <access>read-only</access>
29350                    </field>
29351                    <field>
29352                        <name>GPIO26_EDGE_HIGH</name>
29353                        <bitRange>[11:11]</bitRange>
29354                        <access>read-only</access>
29355                    </field>
29356                    <field>
29357                        <name>GPIO26_EDGE_LOW</name>
29358                        <bitRange>[10:10]</bitRange>
29359                        <access>read-only</access>
29360                    </field>
29361                    <field>
29362                        <name>GPIO26_LEVEL_HIGH</name>
29363                        <bitRange>[9:9]</bitRange>
29364                        <access>read-only</access>
29365                    </field>
29366                    <field>
29367                        <name>GPIO26_LEVEL_LOW</name>
29368                        <bitRange>[8:8]</bitRange>
29369                        <access>read-only</access>
29370                    </field>
29371                    <field>
29372                        <name>GPIO25_EDGE_HIGH</name>
29373                        <bitRange>[7:7]</bitRange>
29374                        <access>read-only</access>
29375                    </field>
29376                    <field>
29377                        <name>GPIO25_EDGE_LOW</name>
29378                        <bitRange>[6:6]</bitRange>
29379                        <access>read-only</access>
29380                    </field>
29381                    <field>
29382                        <name>GPIO25_LEVEL_HIGH</name>
29383                        <bitRange>[5:5]</bitRange>
29384                        <access>read-only</access>
29385                    </field>
29386                    <field>
29387                        <name>GPIO25_LEVEL_LOW</name>
29388                        <bitRange>[4:4]</bitRange>
29389                        <access>read-only</access>
29390                    </field>
29391                    <field>
29392                        <name>GPIO24_EDGE_HIGH</name>
29393                        <bitRange>[3:3]</bitRange>
29394                        <access>read-only</access>
29395                    </field>
29396                    <field>
29397                        <name>GPIO24_EDGE_LOW</name>
29398                        <bitRange>[2:2]</bitRange>
29399                        <access>read-only</access>
29400                    </field>
29401                    <field>
29402                        <name>GPIO24_LEVEL_HIGH</name>
29403                        <bitRange>[1:1]</bitRange>
29404                        <access>read-only</access>
29405                    </field>
29406                    <field>
29407                        <name>GPIO24_LEVEL_LOW</name>
29408                        <bitRange>[0:0]</bitRange>
29409                        <access>read-only</access>
29410                    </field>
29411                </fields>
29412            </register>
29413            <register>
29414                <name>PROC1_INTS4</name>
29415                <addressOffset>0x000002d0</addressOffset>
29416                <description>Interrupt status after masking &amp; forcing for proc1</description>
29417                <resetValue>0x00000000</resetValue>
29418                <fields>
29419                    <field>
29420                        <name>GPIO39_EDGE_HIGH</name>
29421                        <bitRange>[31:31]</bitRange>
29422                        <access>read-only</access>
29423                    </field>
29424                    <field>
29425                        <name>GPIO39_EDGE_LOW</name>
29426                        <bitRange>[30:30]</bitRange>
29427                        <access>read-only</access>
29428                    </field>
29429                    <field>
29430                        <name>GPIO39_LEVEL_HIGH</name>
29431                        <bitRange>[29:29]</bitRange>
29432                        <access>read-only</access>
29433                    </field>
29434                    <field>
29435                        <name>GPIO39_LEVEL_LOW</name>
29436                        <bitRange>[28:28]</bitRange>
29437                        <access>read-only</access>
29438                    </field>
29439                    <field>
29440                        <name>GPIO38_EDGE_HIGH</name>
29441                        <bitRange>[27:27]</bitRange>
29442                        <access>read-only</access>
29443                    </field>
29444                    <field>
29445                        <name>GPIO38_EDGE_LOW</name>
29446                        <bitRange>[26:26]</bitRange>
29447                        <access>read-only</access>
29448                    </field>
29449                    <field>
29450                        <name>GPIO38_LEVEL_HIGH</name>
29451                        <bitRange>[25:25]</bitRange>
29452                        <access>read-only</access>
29453                    </field>
29454                    <field>
29455                        <name>GPIO38_LEVEL_LOW</name>
29456                        <bitRange>[24:24]</bitRange>
29457                        <access>read-only</access>
29458                    </field>
29459                    <field>
29460                        <name>GPIO37_EDGE_HIGH</name>
29461                        <bitRange>[23:23]</bitRange>
29462                        <access>read-only</access>
29463                    </field>
29464                    <field>
29465                        <name>GPIO37_EDGE_LOW</name>
29466                        <bitRange>[22:22]</bitRange>
29467                        <access>read-only</access>
29468                    </field>
29469                    <field>
29470                        <name>GPIO37_LEVEL_HIGH</name>
29471                        <bitRange>[21:21]</bitRange>
29472                        <access>read-only</access>
29473                    </field>
29474                    <field>
29475                        <name>GPIO37_LEVEL_LOW</name>
29476                        <bitRange>[20:20]</bitRange>
29477                        <access>read-only</access>
29478                    </field>
29479                    <field>
29480                        <name>GPIO36_EDGE_HIGH</name>
29481                        <bitRange>[19:19]</bitRange>
29482                        <access>read-only</access>
29483                    </field>
29484                    <field>
29485                        <name>GPIO36_EDGE_LOW</name>
29486                        <bitRange>[18:18]</bitRange>
29487                        <access>read-only</access>
29488                    </field>
29489                    <field>
29490                        <name>GPIO36_LEVEL_HIGH</name>
29491                        <bitRange>[17:17]</bitRange>
29492                        <access>read-only</access>
29493                    </field>
29494                    <field>
29495                        <name>GPIO36_LEVEL_LOW</name>
29496                        <bitRange>[16:16]</bitRange>
29497                        <access>read-only</access>
29498                    </field>
29499                    <field>
29500                        <name>GPIO35_EDGE_HIGH</name>
29501                        <bitRange>[15:15]</bitRange>
29502                        <access>read-only</access>
29503                    </field>
29504                    <field>
29505                        <name>GPIO35_EDGE_LOW</name>
29506                        <bitRange>[14:14]</bitRange>
29507                        <access>read-only</access>
29508                    </field>
29509                    <field>
29510                        <name>GPIO35_LEVEL_HIGH</name>
29511                        <bitRange>[13:13]</bitRange>
29512                        <access>read-only</access>
29513                    </field>
29514                    <field>
29515                        <name>GPIO35_LEVEL_LOW</name>
29516                        <bitRange>[12:12]</bitRange>
29517                        <access>read-only</access>
29518                    </field>
29519                    <field>
29520                        <name>GPIO34_EDGE_HIGH</name>
29521                        <bitRange>[11:11]</bitRange>
29522                        <access>read-only</access>
29523                    </field>
29524                    <field>
29525                        <name>GPIO34_EDGE_LOW</name>
29526                        <bitRange>[10:10]</bitRange>
29527                        <access>read-only</access>
29528                    </field>
29529                    <field>
29530                        <name>GPIO34_LEVEL_HIGH</name>
29531                        <bitRange>[9:9]</bitRange>
29532                        <access>read-only</access>
29533                    </field>
29534                    <field>
29535                        <name>GPIO34_LEVEL_LOW</name>
29536                        <bitRange>[8:8]</bitRange>
29537                        <access>read-only</access>
29538                    </field>
29539                    <field>
29540                        <name>GPIO33_EDGE_HIGH</name>
29541                        <bitRange>[7:7]</bitRange>
29542                        <access>read-only</access>
29543                    </field>
29544                    <field>
29545                        <name>GPIO33_EDGE_LOW</name>
29546                        <bitRange>[6:6]</bitRange>
29547                        <access>read-only</access>
29548                    </field>
29549                    <field>
29550                        <name>GPIO33_LEVEL_HIGH</name>
29551                        <bitRange>[5:5]</bitRange>
29552                        <access>read-only</access>
29553                    </field>
29554                    <field>
29555                        <name>GPIO33_LEVEL_LOW</name>
29556                        <bitRange>[4:4]</bitRange>
29557                        <access>read-only</access>
29558                    </field>
29559                    <field>
29560                        <name>GPIO32_EDGE_HIGH</name>
29561                        <bitRange>[3:3]</bitRange>
29562                        <access>read-only</access>
29563                    </field>
29564                    <field>
29565                        <name>GPIO32_EDGE_LOW</name>
29566                        <bitRange>[2:2]</bitRange>
29567                        <access>read-only</access>
29568                    </field>
29569                    <field>
29570                        <name>GPIO32_LEVEL_HIGH</name>
29571                        <bitRange>[1:1]</bitRange>
29572                        <access>read-only</access>
29573                    </field>
29574                    <field>
29575                        <name>GPIO32_LEVEL_LOW</name>
29576                        <bitRange>[0:0]</bitRange>
29577                        <access>read-only</access>
29578                    </field>
29579                </fields>
29580            </register>
29581            <register>
29582                <name>PROC1_INTS5</name>
29583                <addressOffset>0x000002d4</addressOffset>
29584                <description>Interrupt status after masking &amp; forcing for proc1</description>
29585                <resetValue>0x00000000</resetValue>
29586                <fields>
29587                    <field>
29588                        <name>GPIO47_EDGE_HIGH</name>
29589                        <bitRange>[31:31]</bitRange>
29590                        <access>read-only</access>
29591                    </field>
29592                    <field>
29593                        <name>GPIO47_EDGE_LOW</name>
29594                        <bitRange>[30:30]</bitRange>
29595                        <access>read-only</access>
29596                    </field>
29597                    <field>
29598                        <name>GPIO47_LEVEL_HIGH</name>
29599                        <bitRange>[29:29]</bitRange>
29600                        <access>read-only</access>
29601                    </field>
29602                    <field>
29603                        <name>GPIO47_LEVEL_LOW</name>
29604                        <bitRange>[28:28]</bitRange>
29605                        <access>read-only</access>
29606                    </field>
29607                    <field>
29608                        <name>GPIO46_EDGE_HIGH</name>
29609                        <bitRange>[27:27]</bitRange>
29610                        <access>read-only</access>
29611                    </field>
29612                    <field>
29613                        <name>GPIO46_EDGE_LOW</name>
29614                        <bitRange>[26:26]</bitRange>
29615                        <access>read-only</access>
29616                    </field>
29617                    <field>
29618                        <name>GPIO46_LEVEL_HIGH</name>
29619                        <bitRange>[25:25]</bitRange>
29620                        <access>read-only</access>
29621                    </field>
29622                    <field>
29623                        <name>GPIO46_LEVEL_LOW</name>
29624                        <bitRange>[24:24]</bitRange>
29625                        <access>read-only</access>
29626                    </field>
29627                    <field>
29628                        <name>GPIO45_EDGE_HIGH</name>
29629                        <bitRange>[23:23]</bitRange>
29630                        <access>read-only</access>
29631                    </field>
29632                    <field>
29633                        <name>GPIO45_EDGE_LOW</name>
29634                        <bitRange>[22:22]</bitRange>
29635                        <access>read-only</access>
29636                    </field>
29637                    <field>
29638                        <name>GPIO45_LEVEL_HIGH</name>
29639                        <bitRange>[21:21]</bitRange>
29640                        <access>read-only</access>
29641                    </field>
29642                    <field>
29643                        <name>GPIO45_LEVEL_LOW</name>
29644                        <bitRange>[20:20]</bitRange>
29645                        <access>read-only</access>
29646                    </field>
29647                    <field>
29648                        <name>GPIO44_EDGE_HIGH</name>
29649                        <bitRange>[19:19]</bitRange>
29650                        <access>read-only</access>
29651                    </field>
29652                    <field>
29653                        <name>GPIO44_EDGE_LOW</name>
29654                        <bitRange>[18:18]</bitRange>
29655                        <access>read-only</access>
29656                    </field>
29657                    <field>
29658                        <name>GPIO44_LEVEL_HIGH</name>
29659                        <bitRange>[17:17]</bitRange>
29660                        <access>read-only</access>
29661                    </field>
29662                    <field>
29663                        <name>GPIO44_LEVEL_LOW</name>
29664                        <bitRange>[16:16]</bitRange>
29665                        <access>read-only</access>
29666                    </field>
29667                    <field>
29668                        <name>GPIO43_EDGE_HIGH</name>
29669                        <bitRange>[15:15]</bitRange>
29670                        <access>read-only</access>
29671                    </field>
29672                    <field>
29673                        <name>GPIO43_EDGE_LOW</name>
29674                        <bitRange>[14:14]</bitRange>
29675                        <access>read-only</access>
29676                    </field>
29677                    <field>
29678                        <name>GPIO43_LEVEL_HIGH</name>
29679                        <bitRange>[13:13]</bitRange>
29680                        <access>read-only</access>
29681                    </field>
29682                    <field>
29683                        <name>GPIO43_LEVEL_LOW</name>
29684                        <bitRange>[12:12]</bitRange>
29685                        <access>read-only</access>
29686                    </field>
29687                    <field>
29688                        <name>GPIO42_EDGE_HIGH</name>
29689                        <bitRange>[11:11]</bitRange>
29690                        <access>read-only</access>
29691                    </field>
29692                    <field>
29693                        <name>GPIO42_EDGE_LOW</name>
29694                        <bitRange>[10:10]</bitRange>
29695                        <access>read-only</access>
29696                    </field>
29697                    <field>
29698                        <name>GPIO42_LEVEL_HIGH</name>
29699                        <bitRange>[9:9]</bitRange>
29700                        <access>read-only</access>
29701                    </field>
29702                    <field>
29703                        <name>GPIO42_LEVEL_LOW</name>
29704                        <bitRange>[8:8]</bitRange>
29705                        <access>read-only</access>
29706                    </field>
29707                    <field>
29708                        <name>GPIO41_EDGE_HIGH</name>
29709                        <bitRange>[7:7]</bitRange>
29710                        <access>read-only</access>
29711                    </field>
29712                    <field>
29713                        <name>GPIO41_EDGE_LOW</name>
29714                        <bitRange>[6:6]</bitRange>
29715                        <access>read-only</access>
29716                    </field>
29717                    <field>
29718                        <name>GPIO41_LEVEL_HIGH</name>
29719                        <bitRange>[5:5]</bitRange>
29720                        <access>read-only</access>
29721                    </field>
29722                    <field>
29723                        <name>GPIO41_LEVEL_LOW</name>
29724                        <bitRange>[4:4]</bitRange>
29725                        <access>read-only</access>
29726                    </field>
29727                    <field>
29728                        <name>GPIO40_EDGE_HIGH</name>
29729                        <bitRange>[3:3]</bitRange>
29730                        <access>read-only</access>
29731                    </field>
29732                    <field>
29733                        <name>GPIO40_EDGE_LOW</name>
29734                        <bitRange>[2:2]</bitRange>
29735                        <access>read-only</access>
29736                    </field>
29737                    <field>
29738                        <name>GPIO40_LEVEL_HIGH</name>
29739                        <bitRange>[1:1]</bitRange>
29740                        <access>read-only</access>
29741                    </field>
29742                    <field>
29743                        <name>GPIO40_LEVEL_LOW</name>
29744                        <bitRange>[0:0]</bitRange>
29745                        <access>read-only</access>
29746                    </field>
29747                </fields>
29748            </register>
29749            <register>
29750                <name>DORMANT_WAKE_INTE0</name>
29751                <addressOffset>0x000002d8</addressOffset>
29752                <description>Interrupt Enable for dormant_wake</description>
29753                <resetValue>0x00000000</resetValue>
29754                <fields>
29755                    <field>
29756                        <name>GPIO7_EDGE_HIGH</name>
29757                        <bitRange>[31:31]</bitRange>
29758                        <access>read-write</access>
29759                    </field>
29760                    <field>
29761                        <name>GPIO7_EDGE_LOW</name>
29762                        <bitRange>[30:30]</bitRange>
29763                        <access>read-write</access>
29764                    </field>
29765                    <field>
29766                        <name>GPIO7_LEVEL_HIGH</name>
29767                        <bitRange>[29:29]</bitRange>
29768                        <access>read-write</access>
29769                    </field>
29770                    <field>
29771                        <name>GPIO7_LEVEL_LOW</name>
29772                        <bitRange>[28:28]</bitRange>
29773                        <access>read-write</access>
29774                    </field>
29775                    <field>
29776                        <name>GPIO6_EDGE_HIGH</name>
29777                        <bitRange>[27:27]</bitRange>
29778                        <access>read-write</access>
29779                    </field>
29780                    <field>
29781                        <name>GPIO6_EDGE_LOW</name>
29782                        <bitRange>[26:26]</bitRange>
29783                        <access>read-write</access>
29784                    </field>
29785                    <field>
29786                        <name>GPIO6_LEVEL_HIGH</name>
29787                        <bitRange>[25:25]</bitRange>
29788                        <access>read-write</access>
29789                    </field>
29790                    <field>
29791                        <name>GPIO6_LEVEL_LOW</name>
29792                        <bitRange>[24:24]</bitRange>
29793                        <access>read-write</access>
29794                    </field>
29795                    <field>
29796                        <name>GPIO5_EDGE_HIGH</name>
29797                        <bitRange>[23:23]</bitRange>
29798                        <access>read-write</access>
29799                    </field>
29800                    <field>
29801                        <name>GPIO5_EDGE_LOW</name>
29802                        <bitRange>[22:22]</bitRange>
29803                        <access>read-write</access>
29804                    </field>
29805                    <field>
29806                        <name>GPIO5_LEVEL_HIGH</name>
29807                        <bitRange>[21:21]</bitRange>
29808                        <access>read-write</access>
29809                    </field>
29810                    <field>
29811                        <name>GPIO5_LEVEL_LOW</name>
29812                        <bitRange>[20:20]</bitRange>
29813                        <access>read-write</access>
29814                    </field>
29815                    <field>
29816                        <name>GPIO4_EDGE_HIGH</name>
29817                        <bitRange>[19:19]</bitRange>
29818                        <access>read-write</access>
29819                    </field>
29820                    <field>
29821                        <name>GPIO4_EDGE_LOW</name>
29822                        <bitRange>[18:18]</bitRange>
29823                        <access>read-write</access>
29824                    </field>
29825                    <field>
29826                        <name>GPIO4_LEVEL_HIGH</name>
29827                        <bitRange>[17:17]</bitRange>
29828                        <access>read-write</access>
29829                    </field>
29830                    <field>
29831                        <name>GPIO4_LEVEL_LOW</name>
29832                        <bitRange>[16:16]</bitRange>
29833                        <access>read-write</access>
29834                    </field>
29835                    <field>
29836                        <name>GPIO3_EDGE_HIGH</name>
29837                        <bitRange>[15:15]</bitRange>
29838                        <access>read-write</access>
29839                    </field>
29840                    <field>
29841                        <name>GPIO3_EDGE_LOW</name>
29842                        <bitRange>[14:14]</bitRange>
29843                        <access>read-write</access>
29844                    </field>
29845                    <field>
29846                        <name>GPIO3_LEVEL_HIGH</name>
29847                        <bitRange>[13:13]</bitRange>
29848                        <access>read-write</access>
29849                    </field>
29850                    <field>
29851                        <name>GPIO3_LEVEL_LOW</name>
29852                        <bitRange>[12:12]</bitRange>
29853                        <access>read-write</access>
29854                    </field>
29855                    <field>
29856                        <name>GPIO2_EDGE_HIGH</name>
29857                        <bitRange>[11:11]</bitRange>
29858                        <access>read-write</access>
29859                    </field>
29860                    <field>
29861                        <name>GPIO2_EDGE_LOW</name>
29862                        <bitRange>[10:10]</bitRange>
29863                        <access>read-write</access>
29864                    </field>
29865                    <field>
29866                        <name>GPIO2_LEVEL_HIGH</name>
29867                        <bitRange>[9:9]</bitRange>
29868                        <access>read-write</access>
29869                    </field>
29870                    <field>
29871                        <name>GPIO2_LEVEL_LOW</name>
29872                        <bitRange>[8:8]</bitRange>
29873                        <access>read-write</access>
29874                    </field>
29875                    <field>
29876                        <name>GPIO1_EDGE_HIGH</name>
29877                        <bitRange>[7:7]</bitRange>
29878                        <access>read-write</access>
29879                    </field>
29880                    <field>
29881                        <name>GPIO1_EDGE_LOW</name>
29882                        <bitRange>[6:6]</bitRange>
29883                        <access>read-write</access>
29884                    </field>
29885                    <field>
29886                        <name>GPIO1_LEVEL_HIGH</name>
29887                        <bitRange>[5:5]</bitRange>
29888                        <access>read-write</access>
29889                    </field>
29890                    <field>
29891                        <name>GPIO1_LEVEL_LOW</name>
29892                        <bitRange>[4:4]</bitRange>
29893                        <access>read-write</access>
29894                    </field>
29895                    <field>
29896                        <name>GPIO0_EDGE_HIGH</name>
29897                        <bitRange>[3:3]</bitRange>
29898                        <access>read-write</access>
29899                    </field>
29900                    <field>
29901                        <name>GPIO0_EDGE_LOW</name>
29902                        <bitRange>[2:2]</bitRange>
29903                        <access>read-write</access>
29904                    </field>
29905                    <field>
29906                        <name>GPIO0_LEVEL_HIGH</name>
29907                        <bitRange>[1:1]</bitRange>
29908                        <access>read-write</access>
29909                    </field>
29910                    <field>
29911                        <name>GPIO0_LEVEL_LOW</name>
29912                        <bitRange>[0:0]</bitRange>
29913                        <access>read-write</access>
29914                    </field>
29915                </fields>
29916            </register>
29917            <register>
29918                <name>DORMANT_WAKE_INTE1</name>
29919                <addressOffset>0x000002dc</addressOffset>
29920                <description>Interrupt Enable for dormant_wake</description>
29921                <resetValue>0x00000000</resetValue>
29922                <fields>
29923                    <field>
29924                        <name>GPIO15_EDGE_HIGH</name>
29925                        <bitRange>[31:31]</bitRange>
29926                        <access>read-write</access>
29927                    </field>
29928                    <field>
29929                        <name>GPIO15_EDGE_LOW</name>
29930                        <bitRange>[30:30]</bitRange>
29931                        <access>read-write</access>
29932                    </field>
29933                    <field>
29934                        <name>GPIO15_LEVEL_HIGH</name>
29935                        <bitRange>[29:29]</bitRange>
29936                        <access>read-write</access>
29937                    </field>
29938                    <field>
29939                        <name>GPIO15_LEVEL_LOW</name>
29940                        <bitRange>[28:28]</bitRange>
29941                        <access>read-write</access>
29942                    </field>
29943                    <field>
29944                        <name>GPIO14_EDGE_HIGH</name>
29945                        <bitRange>[27:27]</bitRange>
29946                        <access>read-write</access>
29947                    </field>
29948                    <field>
29949                        <name>GPIO14_EDGE_LOW</name>
29950                        <bitRange>[26:26]</bitRange>
29951                        <access>read-write</access>
29952                    </field>
29953                    <field>
29954                        <name>GPIO14_LEVEL_HIGH</name>
29955                        <bitRange>[25:25]</bitRange>
29956                        <access>read-write</access>
29957                    </field>
29958                    <field>
29959                        <name>GPIO14_LEVEL_LOW</name>
29960                        <bitRange>[24:24]</bitRange>
29961                        <access>read-write</access>
29962                    </field>
29963                    <field>
29964                        <name>GPIO13_EDGE_HIGH</name>
29965                        <bitRange>[23:23]</bitRange>
29966                        <access>read-write</access>
29967                    </field>
29968                    <field>
29969                        <name>GPIO13_EDGE_LOW</name>
29970                        <bitRange>[22:22]</bitRange>
29971                        <access>read-write</access>
29972                    </field>
29973                    <field>
29974                        <name>GPIO13_LEVEL_HIGH</name>
29975                        <bitRange>[21:21]</bitRange>
29976                        <access>read-write</access>
29977                    </field>
29978                    <field>
29979                        <name>GPIO13_LEVEL_LOW</name>
29980                        <bitRange>[20:20]</bitRange>
29981                        <access>read-write</access>
29982                    </field>
29983                    <field>
29984                        <name>GPIO12_EDGE_HIGH</name>
29985                        <bitRange>[19:19]</bitRange>
29986                        <access>read-write</access>
29987                    </field>
29988                    <field>
29989                        <name>GPIO12_EDGE_LOW</name>
29990                        <bitRange>[18:18]</bitRange>
29991                        <access>read-write</access>
29992                    </field>
29993                    <field>
29994                        <name>GPIO12_LEVEL_HIGH</name>
29995                        <bitRange>[17:17]</bitRange>
29996                        <access>read-write</access>
29997                    </field>
29998                    <field>
29999                        <name>GPIO12_LEVEL_LOW</name>
30000                        <bitRange>[16:16]</bitRange>
30001                        <access>read-write</access>
30002                    </field>
30003                    <field>
30004                        <name>GPIO11_EDGE_HIGH</name>
30005                        <bitRange>[15:15]</bitRange>
30006                        <access>read-write</access>
30007                    </field>
30008                    <field>
30009                        <name>GPIO11_EDGE_LOW</name>
30010                        <bitRange>[14:14]</bitRange>
30011                        <access>read-write</access>
30012                    </field>
30013                    <field>
30014                        <name>GPIO11_LEVEL_HIGH</name>
30015                        <bitRange>[13:13]</bitRange>
30016                        <access>read-write</access>
30017                    </field>
30018                    <field>
30019                        <name>GPIO11_LEVEL_LOW</name>
30020                        <bitRange>[12:12]</bitRange>
30021                        <access>read-write</access>
30022                    </field>
30023                    <field>
30024                        <name>GPIO10_EDGE_HIGH</name>
30025                        <bitRange>[11:11]</bitRange>
30026                        <access>read-write</access>
30027                    </field>
30028                    <field>
30029                        <name>GPIO10_EDGE_LOW</name>
30030                        <bitRange>[10:10]</bitRange>
30031                        <access>read-write</access>
30032                    </field>
30033                    <field>
30034                        <name>GPIO10_LEVEL_HIGH</name>
30035                        <bitRange>[9:9]</bitRange>
30036                        <access>read-write</access>
30037                    </field>
30038                    <field>
30039                        <name>GPIO10_LEVEL_LOW</name>
30040                        <bitRange>[8:8]</bitRange>
30041                        <access>read-write</access>
30042                    </field>
30043                    <field>
30044                        <name>GPIO9_EDGE_HIGH</name>
30045                        <bitRange>[7:7]</bitRange>
30046                        <access>read-write</access>
30047                    </field>
30048                    <field>
30049                        <name>GPIO9_EDGE_LOW</name>
30050                        <bitRange>[6:6]</bitRange>
30051                        <access>read-write</access>
30052                    </field>
30053                    <field>
30054                        <name>GPIO9_LEVEL_HIGH</name>
30055                        <bitRange>[5:5]</bitRange>
30056                        <access>read-write</access>
30057                    </field>
30058                    <field>
30059                        <name>GPIO9_LEVEL_LOW</name>
30060                        <bitRange>[4:4]</bitRange>
30061                        <access>read-write</access>
30062                    </field>
30063                    <field>
30064                        <name>GPIO8_EDGE_HIGH</name>
30065                        <bitRange>[3:3]</bitRange>
30066                        <access>read-write</access>
30067                    </field>
30068                    <field>
30069                        <name>GPIO8_EDGE_LOW</name>
30070                        <bitRange>[2:2]</bitRange>
30071                        <access>read-write</access>
30072                    </field>
30073                    <field>
30074                        <name>GPIO8_LEVEL_HIGH</name>
30075                        <bitRange>[1:1]</bitRange>
30076                        <access>read-write</access>
30077                    </field>
30078                    <field>
30079                        <name>GPIO8_LEVEL_LOW</name>
30080                        <bitRange>[0:0]</bitRange>
30081                        <access>read-write</access>
30082                    </field>
30083                </fields>
30084            </register>
30085            <register>
30086                <name>DORMANT_WAKE_INTE2</name>
30087                <addressOffset>0x000002e0</addressOffset>
30088                <description>Interrupt Enable for dormant_wake</description>
30089                <resetValue>0x00000000</resetValue>
30090                <fields>
30091                    <field>
30092                        <name>GPIO23_EDGE_HIGH</name>
30093                        <bitRange>[31:31]</bitRange>
30094                        <access>read-write</access>
30095                    </field>
30096                    <field>
30097                        <name>GPIO23_EDGE_LOW</name>
30098                        <bitRange>[30:30]</bitRange>
30099                        <access>read-write</access>
30100                    </field>
30101                    <field>
30102                        <name>GPIO23_LEVEL_HIGH</name>
30103                        <bitRange>[29:29]</bitRange>
30104                        <access>read-write</access>
30105                    </field>
30106                    <field>
30107                        <name>GPIO23_LEVEL_LOW</name>
30108                        <bitRange>[28:28]</bitRange>
30109                        <access>read-write</access>
30110                    </field>
30111                    <field>
30112                        <name>GPIO22_EDGE_HIGH</name>
30113                        <bitRange>[27:27]</bitRange>
30114                        <access>read-write</access>
30115                    </field>
30116                    <field>
30117                        <name>GPIO22_EDGE_LOW</name>
30118                        <bitRange>[26:26]</bitRange>
30119                        <access>read-write</access>
30120                    </field>
30121                    <field>
30122                        <name>GPIO22_LEVEL_HIGH</name>
30123                        <bitRange>[25:25]</bitRange>
30124                        <access>read-write</access>
30125                    </field>
30126                    <field>
30127                        <name>GPIO22_LEVEL_LOW</name>
30128                        <bitRange>[24:24]</bitRange>
30129                        <access>read-write</access>
30130                    </field>
30131                    <field>
30132                        <name>GPIO21_EDGE_HIGH</name>
30133                        <bitRange>[23:23]</bitRange>
30134                        <access>read-write</access>
30135                    </field>
30136                    <field>
30137                        <name>GPIO21_EDGE_LOW</name>
30138                        <bitRange>[22:22]</bitRange>
30139                        <access>read-write</access>
30140                    </field>
30141                    <field>
30142                        <name>GPIO21_LEVEL_HIGH</name>
30143                        <bitRange>[21:21]</bitRange>
30144                        <access>read-write</access>
30145                    </field>
30146                    <field>
30147                        <name>GPIO21_LEVEL_LOW</name>
30148                        <bitRange>[20:20]</bitRange>
30149                        <access>read-write</access>
30150                    </field>
30151                    <field>
30152                        <name>GPIO20_EDGE_HIGH</name>
30153                        <bitRange>[19:19]</bitRange>
30154                        <access>read-write</access>
30155                    </field>
30156                    <field>
30157                        <name>GPIO20_EDGE_LOW</name>
30158                        <bitRange>[18:18]</bitRange>
30159                        <access>read-write</access>
30160                    </field>
30161                    <field>
30162                        <name>GPIO20_LEVEL_HIGH</name>
30163                        <bitRange>[17:17]</bitRange>
30164                        <access>read-write</access>
30165                    </field>
30166                    <field>
30167                        <name>GPIO20_LEVEL_LOW</name>
30168                        <bitRange>[16:16]</bitRange>
30169                        <access>read-write</access>
30170                    </field>
30171                    <field>
30172                        <name>GPIO19_EDGE_HIGH</name>
30173                        <bitRange>[15:15]</bitRange>
30174                        <access>read-write</access>
30175                    </field>
30176                    <field>
30177                        <name>GPIO19_EDGE_LOW</name>
30178                        <bitRange>[14:14]</bitRange>
30179                        <access>read-write</access>
30180                    </field>
30181                    <field>
30182                        <name>GPIO19_LEVEL_HIGH</name>
30183                        <bitRange>[13:13]</bitRange>
30184                        <access>read-write</access>
30185                    </field>
30186                    <field>
30187                        <name>GPIO19_LEVEL_LOW</name>
30188                        <bitRange>[12:12]</bitRange>
30189                        <access>read-write</access>
30190                    </field>
30191                    <field>
30192                        <name>GPIO18_EDGE_HIGH</name>
30193                        <bitRange>[11:11]</bitRange>
30194                        <access>read-write</access>
30195                    </field>
30196                    <field>
30197                        <name>GPIO18_EDGE_LOW</name>
30198                        <bitRange>[10:10]</bitRange>
30199                        <access>read-write</access>
30200                    </field>
30201                    <field>
30202                        <name>GPIO18_LEVEL_HIGH</name>
30203                        <bitRange>[9:9]</bitRange>
30204                        <access>read-write</access>
30205                    </field>
30206                    <field>
30207                        <name>GPIO18_LEVEL_LOW</name>
30208                        <bitRange>[8:8]</bitRange>
30209                        <access>read-write</access>
30210                    </field>
30211                    <field>
30212                        <name>GPIO17_EDGE_HIGH</name>
30213                        <bitRange>[7:7]</bitRange>
30214                        <access>read-write</access>
30215                    </field>
30216                    <field>
30217                        <name>GPIO17_EDGE_LOW</name>
30218                        <bitRange>[6:6]</bitRange>
30219                        <access>read-write</access>
30220                    </field>
30221                    <field>
30222                        <name>GPIO17_LEVEL_HIGH</name>
30223                        <bitRange>[5:5]</bitRange>
30224                        <access>read-write</access>
30225                    </field>
30226                    <field>
30227                        <name>GPIO17_LEVEL_LOW</name>
30228                        <bitRange>[4:4]</bitRange>
30229                        <access>read-write</access>
30230                    </field>
30231                    <field>
30232                        <name>GPIO16_EDGE_HIGH</name>
30233                        <bitRange>[3:3]</bitRange>
30234                        <access>read-write</access>
30235                    </field>
30236                    <field>
30237                        <name>GPIO16_EDGE_LOW</name>
30238                        <bitRange>[2:2]</bitRange>
30239                        <access>read-write</access>
30240                    </field>
30241                    <field>
30242                        <name>GPIO16_LEVEL_HIGH</name>
30243                        <bitRange>[1:1]</bitRange>
30244                        <access>read-write</access>
30245                    </field>
30246                    <field>
30247                        <name>GPIO16_LEVEL_LOW</name>
30248                        <bitRange>[0:0]</bitRange>
30249                        <access>read-write</access>
30250                    </field>
30251                </fields>
30252            </register>
30253            <register>
30254                <name>DORMANT_WAKE_INTE3</name>
30255                <addressOffset>0x000002e4</addressOffset>
30256                <description>Interrupt Enable for dormant_wake</description>
30257                <resetValue>0x00000000</resetValue>
30258                <fields>
30259                    <field>
30260                        <name>GPIO31_EDGE_HIGH</name>
30261                        <bitRange>[31:31]</bitRange>
30262                        <access>read-write</access>
30263                    </field>
30264                    <field>
30265                        <name>GPIO31_EDGE_LOW</name>
30266                        <bitRange>[30:30]</bitRange>
30267                        <access>read-write</access>
30268                    </field>
30269                    <field>
30270                        <name>GPIO31_LEVEL_HIGH</name>
30271                        <bitRange>[29:29]</bitRange>
30272                        <access>read-write</access>
30273                    </field>
30274                    <field>
30275                        <name>GPIO31_LEVEL_LOW</name>
30276                        <bitRange>[28:28]</bitRange>
30277                        <access>read-write</access>
30278                    </field>
30279                    <field>
30280                        <name>GPIO30_EDGE_HIGH</name>
30281                        <bitRange>[27:27]</bitRange>
30282                        <access>read-write</access>
30283                    </field>
30284                    <field>
30285                        <name>GPIO30_EDGE_LOW</name>
30286                        <bitRange>[26:26]</bitRange>
30287                        <access>read-write</access>
30288                    </field>
30289                    <field>
30290                        <name>GPIO30_LEVEL_HIGH</name>
30291                        <bitRange>[25:25]</bitRange>
30292                        <access>read-write</access>
30293                    </field>
30294                    <field>
30295                        <name>GPIO30_LEVEL_LOW</name>
30296                        <bitRange>[24:24]</bitRange>
30297                        <access>read-write</access>
30298                    </field>
30299                    <field>
30300                        <name>GPIO29_EDGE_HIGH</name>
30301                        <bitRange>[23:23]</bitRange>
30302                        <access>read-write</access>
30303                    </field>
30304                    <field>
30305                        <name>GPIO29_EDGE_LOW</name>
30306                        <bitRange>[22:22]</bitRange>
30307                        <access>read-write</access>
30308                    </field>
30309                    <field>
30310                        <name>GPIO29_LEVEL_HIGH</name>
30311                        <bitRange>[21:21]</bitRange>
30312                        <access>read-write</access>
30313                    </field>
30314                    <field>
30315                        <name>GPIO29_LEVEL_LOW</name>
30316                        <bitRange>[20:20]</bitRange>
30317                        <access>read-write</access>
30318                    </field>
30319                    <field>
30320                        <name>GPIO28_EDGE_HIGH</name>
30321                        <bitRange>[19:19]</bitRange>
30322                        <access>read-write</access>
30323                    </field>
30324                    <field>
30325                        <name>GPIO28_EDGE_LOW</name>
30326                        <bitRange>[18:18]</bitRange>
30327                        <access>read-write</access>
30328                    </field>
30329                    <field>
30330                        <name>GPIO28_LEVEL_HIGH</name>
30331                        <bitRange>[17:17]</bitRange>
30332                        <access>read-write</access>
30333                    </field>
30334                    <field>
30335                        <name>GPIO28_LEVEL_LOW</name>
30336                        <bitRange>[16:16]</bitRange>
30337                        <access>read-write</access>
30338                    </field>
30339                    <field>
30340                        <name>GPIO27_EDGE_HIGH</name>
30341                        <bitRange>[15:15]</bitRange>
30342                        <access>read-write</access>
30343                    </field>
30344                    <field>
30345                        <name>GPIO27_EDGE_LOW</name>
30346                        <bitRange>[14:14]</bitRange>
30347                        <access>read-write</access>
30348                    </field>
30349                    <field>
30350                        <name>GPIO27_LEVEL_HIGH</name>
30351                        <bitRange>[13:13]</bitRange>
30352                        <access>read-write</access>
30353                    </field>
30354                    <field>
30355                        <name>GPIO27_LEVEL_LOW</name>
30356                        <bitRange>[12:12]</bitRange>
30357                        <access>read-write</access>
30358                    </field>
30359                    <field>
30360                        <name>GPIO26_EDGE_HIGH</name>
30361                        <bitRange>[11:11]</bitRange>
30362                        <access>read-write</access>
30363                    </field>
30364                    <field>
30365                        <name>GPIO26_EDGE_LOW</name>
30366                        <bitRange>[10:10]</bitRange>
30367                        <access>read-write</access>
30368                    </field>
30369                    <field>
30370                        <name>GPIO26_LEVEL_HIGH</name>
30371                        <bitRange>[9:9]</bitRange>
30372                        <access>read-write</access>
30373                    </field>
30374                    <field>
30375                        <name>GPIO26_LEVEL_LOW</name>
30376                        <bitRange>[8:8]</bitRange>
30377                        <access>read-write</access>
30378                    </field>
30379                    <field>
30380                        <name>GPIO25_EDGE_HIGH</name>
30381                        <bitRange>[7:7]</bitRange>
30382                        <access>read-write</access>
30383                    </field>
30384                    <field>
30385                        <name>GPIO25_EDGE_LOW</name>
30386                        <bitRange>[6:6]</bitRange>
30387                        <access>read-write</access>
30388                    </field>
30389                    <field>
30390                        <name>GPIO25_LEVEL_HIGH</name>
30391                        <bitRange>[5:5]</bitRange>
30392                        <access>read-write</access>
30393                    </field>
30394                    <field>
30395                        <name>GPIO25_LEVEL_LOW</name>
30396                        <bitRange>[4:4]</bitRange>
30397                        <access>read-write</access>
30398                    </field>
30399                    <field>
30400                        <name>GPIO24_EDGE_HIGH</name>
30401                        <bitRange>[3:3]</bitRange>
30402                        <access>read-write</access>
30403                    </field>
30404                    <field>
30405                        <name>GPIO24_EDGE_LOW</name>
30406                        <bitRange>[2:2]</bitRange>
30407                        <access>read-write</access>
30408                    </field>
30409                    <field>
30410                        <name>GPIO24_LEVEL_HIGH</name>
30411                        <bitRange>[1:1]</bitRange>
30412                        <access>read-write</access>
30413                    </field>
30414                    <field>
30415                        <name>GPIO24_LEVEL_LOW</name>
30416                        <bitRange>[0:0]</bitRange>
30417                        <access>read-write</access>
30418                    </field>
30419                </fields>
30420            </register>
30421            <register>
30422                <name>DORMANT_WAKE_INTE4</name>
30423                <addressOffset>0x000002e8</addressOffset>
30424                <description>Interrupt Enable for dormant_wake</description>
30425                <resetValue>0x00000000</resetValue>
30426                <fields>
30427                    <field>
30428                        <name>GPIO39_EDGE_HIGH</name>
30429                        <bitRange>[31:31]</bitRange>
30430                        <access>read-write</access>
30431                    </field>
30432                    <field>
30433                        <name>GPIO39_EDGE_LOW</name>
30434                        <bitRange>[30:30]</bitRange>
30435                        <access>read-write</access>
30436                    </field>
30437                    <field>
30438                        <name>GPIO39_LEVEL_HIGH</name>
30439                        <bitRange>[29:29]</bitRange>
30440                        <access>read-write</access>
30441                    </field>
30442                    <field>
30443                        <name>GPIO39_LEVEL_LOW</name>
30444                        <bitRange>[28:28]</bitRange>
30445                        <access>read-write</access>
30446                    </field>
30447                    <field>
30448                        <name>GPIO38_EDGE_HIGH</name>
30449                        <bitRange>[27:27]</bitRange>
30450                        <access>read-write</access>
30451                    </field>
30452                    <field>
30453                        <name>GPIO38_EDGE_LOW</name>
30454                        <bitRange>[26:26]</bitRange>
30455                        <access>read-write</access>
30456                    </field>
30457                    <field>
30458                        <name>GPIO38_LEVEL_HIGH</name>
30459                        <bitRange>[25:25]</bitRange>
30460                        <access>read-write</access>
30461                    </field>
30462                    <field>
30463                        <name>GPIO38_LEVEL_LOW</name>
30464                        <bitRange>[24:24]</bitRange>
30465                        <access>read-write</access>
30466                    </field>
30467                    <field>
30468                        <name>GPIO37_EDGE_HIGH</name>
30469                        <bitRange>[23:23]</bitRange>
30470                        <access>read-write</access>
30471                    </field>
30472                    <field>
30473                        <name>GPIO37_EDGE_LOW</name>
30474                        <bitRange>[22:22]</bitRange>
30475                        <access>read-write</access>
30476                    </field>
30477                    <field>
30478                        <name>GPIO37_LEVEL_HIGH</name>
30479                        <bitRange>[21:21]</bitRange>
30480                        <access>read-write</access>
30481                    </field>
30482                    <field>
30483                        <name>GPIO37_LEVEL_LOW</name>
30484                        <bitRange>[20:20]</bitRange>
30485                        <access>read-write</access>
30486                    </field>
30487                    <field>
30488                        <name>GPIO36_EDGE_HIGH</name>
30489                        <bitRange>[19:19]</bitRange>
30490                        <access>read-write</access>
30491                    </field>
30492                    <field>
30493                        <name>GPIO36_EDGE_LOW</name>
30494                        <bitRange>[18:18]</bitRange>
30495                        <access>read-write</access>
30496                    </field>
30497                    <field>
30498                        <name>GPIO36_LEVEL_HIGH</name>
30499                        <bitRange>[17:17]</bitRange>
30500                        <access>read-write</access>
30501                    </field>
30502                    <field>
30503                        <name>GPIO36_LEVEL_LOW</name>
30504                        <bitRange>[16:16]</bitRange>
30505                        <access>read-write</access>
30506                    </field>
30507                    <field>
30508                        <name>GPIO35_EDGE_HIGH</name>
30509                        <bitRange>[15:15]</bitRange>
30510                        <access>read-write</access>
30511                    </field>
30512                    <field>
30513                        <name>GPIO35_EDGE_LOW</name>
30514                        <bitRange>[14:14]</bitRange>
30515                        <access>read-write</access>
30516                    </field>
30517                    <field>
30518                        <name>GPIO35_LEVEL_HIGH</name>
30519                        <bitRange>[13:13]</bitRange>
30520                        <access>read-write</access>
30521                    </field>
30522                    <field>
30523                        <name>GPIO35_LEVEL_LOW</name>
30524                        <bitRange>[12:12]</bitRange>
30525                        <access>read-write</access>
30526                    </field>
30527                    <field>
30528                        <name>GPIO34_EDGE_HIGH</name>
30529                        <bitRange>[11:11]</bitRange>
30530                        <access>read-write</access>
30531                    </field>
30532                    <field>
30533                        <name>GPIO34_EDGE_LOW</name>
30534                        <bitRange>[10:10]</bitRange>
30535                        <access>read-write</access>
30536                    </field>
30537                    <field>
30538                        <name>GPIO34_LEVEL_HIGH</name>
30539                        <bitRange>[9:9]</bitRange>
30540                        <access>read-write</access>
30541                    </field>
30542                    <field>
30543                        <name>GPIO34_LEVEL_LOW</name>
30544                        <bitRange>[8:8]</bitRange>
30545                        <access>read-write</access>
30546                    </field>
30547                    <field>
30548                        <name>GPIO33_EDGE_HIGH</name>
30549                        <bitRange>[7:7]</bitRange>
30550                        <access>read-write</access>
30551                    </field>
30552                    <field>
30553                        <name>GPIO33_EDGE_LOW</name>
30554                        <bitRange>[6:6]</bitRange>
30555                        <access>read-write</access>
30556                    </field>
30557                    <field>
30558                        <name>GPIO33_LEVEL_HIGH</name>
30559                        <bitRange>[5:5]</bitRange>
30560                        <access>read-write</access>
30561                    </field>
30562                    <field>
30563                        <name>GPIO33_LEVEL_LOW</name>
30564                        <bitRange>[4:4]</bitRange>
30565                        <access>read-write</access>
30566                    </field>
30567                    <field>
30568                        <name>GPIO32_EDGE_HIGH</name>
30569                        <bitRange>[3:3]</bitRange>
30570                        <access>read-write</access>
30571                    </field>
30572                    <field>
30573                        <name>GPIO32_EDGE_LOW</name>
30574                        <bitRange>[2:2]</bitRange>
30575                        <access>read-write</access>
30576                    </field>
30577                    <field>
30578                        <name>GPIO32_LEVEL_HIGH</name>
30579                        <bitRange>[1:1]</bitRange>
30580                        <access>read-write</access>
30581                    </field>
30582                    <field>
30583                        <name>GPIO32_LEVEL_LOW</name>
30584                        <bitRange>[0:0]</bitRange>
30585                        <access>read-write</access>
30586                    </field>
30587                </fields>
30588            </register>
30589            <register>
30590                <name>DORMANT_WAKE_INTE5</name>
30591                <addressOffset>0x000002ec</addressOffset>
30592                <description>Interrupt Enable for dormant_wake</description>
30593                <resetValue>0x00000000</resetValue>
30594                <fields>
30595                    <field>
30596                        <name>GPIO47_EDGE_HIGH</name>
30597                        <bitRange>[31:31]</bitRange>
30598                        <access>read-write</access>
30599                    </field>
30600                    <field>
30601                        <name>GPIO47_EDGE_LOW</name>
30602                        <bitRange>[30:30]</bitRange>
30603                        <access>read-write</access>
30604                    </field>
30605                    <field>
30606                        <name>GPIO47_LEVEL_HIGH</name>
30607                        <bitRange>[29:29]</bitRange>
30608                        <access>read-write</access>
30609                    </field>
30610                    <field>
30611                        <name>GPIO47_LEVEL_LOW</name>
30612                        <bitRange>[28:28]</bitRange>
30613                        <access>read-write</access>
30614                    </field>
30615                    <field>
30616                        <name>GPIO46_EDGE_HIGH</name>
30617                        <bitRange>[27:27]</bitRange>
30618                        <access>read-write</access>
30619                    </field>
30620                    <field>
30621                        <name>GPIO46_EDGE_LOW</name>
30622                        <bitRange>[26:26]</bitRange>
30623                        <access>read-write</access>
30624                    </field>
30625                    <field>
30626                        <name>GPIO46_LEVEL_HIGH</name>
30627                        <bitRange>[25:25]</bitRange>
30628                        <access>read-write</access>
30629                    </field>
30630                    <field>
30631                        <name>GPIO46_LEVEL_LOW</name>
30632                        <bitRange>[24:24]</bitRange>
30633                        <access>read-write</access>
30634                    </field>
30635                    <field>
30636                        <name>GPIO45_EDGE_HIGH</name>
30637                        <bitRange>[23:23]</bitRange>
30638                        <access>read-write</access>
30639                    </field>
30640                    <field>
30641                        <name>GPIO45_EDGE_LOW</name>
30642                        <bitRange>[22:22]</bitRange>
30643                        <access>read-write</access>
30644                    </field>
30645                    <field>
30646                        <name>GPIO45_LEVEL_HIGH</name>
30647                        <bitRange>[21:21]</bitRange>
30648                        <access>read-write</access>
30649                    </field>
30650                    <field>
30651                        <name>GPIO45_LEVEL_LOW</name>
30652                        <bitRange>[20:20]</bitRange>
30653                        <access>read-write</access>
30654                    </field>
30655                    <field>
30656                        <name>GPIO44_EDGE_HIGH</name>
30657                        <bitRange>[19:19]</bitRange>
30658                        <access>read-write</access>
30659                    </field>
30660                    <field>
30661                        <name>GPIO44_EDGE_LOW</name>
30662                        <bitRange>[18:18]</bitRange>
30663                        <access>read-write</access>
30664                    </field>
30665                    <field>
30666                        <name>GPIO44_LEVEL_HIGH</name>
30667                        <bitRange>[17:17]</bitRange>
30668                        <access>read-write</access>
30669                    </field>
30670                    <field>
30671                        <name>GPIO44_LEVEL_LOW</name>
30672                        <bitRange>[16:16]</bitRange>
30673                        <access>read-write</access>
30674                    </field>
30675                    <field>
30676                        <name>GPIO43_EDGE_HIGH</name>
30677                        <bitRange>[15:15]</bitRange>
30678                        <access>read-write</access>
30679                    </field>
30680                    <field>
30681                        <name>GPIO43_EDGE_LOW</name>
30682                        <bitRange>[14:14]</bitRange>
30683                        <access>read-write</access>
30684                    </field>
30685                    <field>
30686                        <name>GPIO43_LEVEL_HIGH</name>
30687                        <bitRange>[13:13]</bitRange>
30688                        <access>read-write</access>
30689                    </field>
30690                    <field>
30691                        <name>GPIO43_LEVEL_LOW</name>
30692                        <bitRange>[12:12]</bitRange>
30693                        <access>read-write</access>
30694                    </field>
30695                    <field>
30696                        <name>GPIO42_EDGE_HIGH</name>
30697                        <bitRange>[11:11]</bitRange>
30698                        <access>read-write</access>
30699                    </field>
30700                    <field>
30701                        <name>GPIO42_EDGE_LOW</name>
30702                        <bitRange>[10:10]</bitRange>
30703                        <access>read-write</access>
30704                    </field>
30705                    <field>
30706                        <name>GPIO42_LEVEL_HIGH</name>
30707                        <bitRange>[9:9]</bitRange>
30708                        <access>read-write</access>
30709                    </field>
30710                    <field>
30711                        <name>GPIO42_LEVEL_LOW</name>
30712                        <bitRange>[8:8]</bitRange>
30713                        <access>read-write</access>
30714                    </field>
30715                    <field>
30716                        <name>GPIO41_EDGE_HIGH</name>
30717                        <bitRange>[7:7]</bitRange>
30718                        <access>read-write</access>
30719                    </field>
30720                    <field>
30721                        <name>GPIO41_EDGE_LOW</name>
30722                        <bitRange>[6:6]</bitRange>
30723                        <access>read-write</access>
30724                    </field>
30725                    <field>
30726                        <name>GPIO41_LEVEL_HIGH</name>
30727                        <bitRange>[5:5]</bitRange>
30728                        <access>read-write</access>
30729                    </field>
30730                    <field>
30731                        <name>GPIO41_LEVEL_LOW</name>
30732                        <bitRange>[4:4]</bitRange>
30733                        <access>read-write</access>
30734                    </field>
30735                    <field>
30736                        <name>GPIO40_EDGE_HIGH</name>
30737                        <bitRange>[3:3]</bitRange>
30738                        <access>read-write</access>
30739                    </field>
30740                    <field>
30741                        <name>GPIO40_EDGE_LOW</name>
30742                        <bitRange>[2:2]</bitRange>
30743                        <access>read-write</access>
30744                    </field>
30745                    <field>
30746                        <name>GPIO40_LEVEL_HIGH</name>
30747                        <bitRange>[1:1]</bitRange>
30748                        <access>read-write</access>
30749                    </field>
30750                    <field>
30751                        <name>GPIO40_LEVEL_LOW</name>
30752                        <bitRange>[0:0]</bitRange>
30753                        <access>read-write</access>
30754                    </field>
30755                </fields>
30756            </register>
30757            <register>
30758                <name>DORMANT_WAKE_INTF0</name>
30759                <addressOffset>0x000002f0</addressOffset>
30760                <description>Interrupt Force for dormant_wake</description>
30761                <resetValue>0x00000000</resetValue>
30762                <fields>
30763                    <field>
30764                        <name>GPIO7_EDGE_HIGH</name>
30765                        <bitRange>[31:31]</bitRange>
30766                        <access>read-write</access>
30767                    </field>
30768                    <field>
30769                        <name>GPIO7_EDGE_LOW</name>
30770                        <bitRange>[30:30]</bitRange>
30771                        <access>read-write</access>
30772                    </field>
30773                    <field>
30774                        <name>GPIO7_LEVEL_HIGH</name>
30775                        <bitRange>[29:29]</bitRange>
30776                        <access>read-write</access>
30777                    </field>
30778                    <field>
30779                        <name>GPIO7_LEVEL_LOW</name>
30780                        <bitRange>[28:28]</bitRange>
30781                        <access>read-write</access>
30782                    </field>
30783                    <field>
30784                        <name>GPIO6_EDGE_HIGH</name>
30785                        <bitRange>[27:27]</bitRange>
30786                        <access>read-write</access>
30787                    </field>
30788                    <field>
30789                        <name>GPIO6_EDGE_LOW</name>
30790                        <bitRange>[26:26]</bitRange>
30791                        <access>read-write</access>
30792                    </field>
30793                    <field>
30794                        <name>GPIO6_LEVEL_HIGH</name>
30795                        <bitRange>[25:25]</bitRange>
30796                        <access>read-write</access>
30797                    </field>
30798                    <field>
30799                        <name>GPIO6_LEVEL_LOW</name>
30800                        <bitRange>[24:24]</bitRange>
30801                        <access>read-write</access>
30802                    </field>
30803                    <field>
30804                        <name>GPIO5_EDGE_HIGH</name>
30805                        <bitRange>[23:23]</bitRange>
30806                        <access>read-write</access>
30807                    </field>
30808                    <field>
30809                        <name>GPIO5_EDGE_LOW</name>
30810                        <bitRange>[22:22]</bitRange>
30811                        <access>read-write</access>
30812                    </field>
30813                    <field>
30814                        <name>GPIO5_LEVEL_HIGH</name>
30815                        <bitRange>[21:21]</bitRange>
30816                        <access>read-write</access>
30817                    </field>
30818                    <field>
30819                        <name>GPIO5_LEVEL_LOW</name>
30820                        <bitRange>[20:20]</bitRange>
30821                        <access>read-write</access>
30822                    </field>
30823                    <field>
30824                        <name>GPIO4_EDGE_HIGH</name>
30825                        <bitRange>[19:19]</bitRange>
30826                        <access>read-write</access>
30827                    </field>
30828                    <field>
30829                        <name>GPIO4_EDGE_LOW</name>
30830                        <bitRange>[18:18]</bitRange>
30831                        <access>read-write</access>
30832                    </field>
30833                    <field>
30834                        <name>GPIO4_LEVEL_HIGH</name>
30835                        <bitRange>[17:17]</bitRange>
30836                        <access>read-write</access>
30837                    </field>
30838                    <field>
30839                        <name>GPIO4_LEVEL_LOW</name>
30840                        <bitRange>[16:16]</bitRange>
30841                        <access>read-write</access>
30842                    </field>
30843                    <field>
30844                        <name>GPIO3_EDGE_HIGH</name>
30845                        <bitRange>[15:15]</bitRange>
30846                        <access>read-write</access>
30847                    </field>
30848                    <field>
30849                        <name>GPIO3_EDGE_LOW</name>
30850                        <bitRange>[14:14]</bitRange>
30851                        <access>read-write</access>
30852                    </field>
30853                    <field>
30854                        <name>GPIO3_LEVEL_HIGH</name>
30855                        <bitRange>[13:13]</bitRange>
30856                        <access>read-write</access>
30857                    </field>
30858                    <field>
30859                        <name>GPIO3_LEVEL_LOW</name>
30860                        <bitRange>[12:12]</bitRange>
30861                        <access>read-write</access>
30862                    </field>
30863                    <field>
30864                        <name>GPIO2_EDGE_HIGH</name>
30865                        <bitRange>[11:11]</bitRange>
30866                        <access>read-write</access>
30867                    </field>
30868                    <field>
30869                        <name>GPIO2_EDGE_LOW</name>
30870                        <bitRange>[10:10]</bitRange>
30871                        <access>read-write</access>
30872                    </field>
30873                    <field>
30874                        <name>GPIO2_LEVEL_HIGH</name>
30875                        <bitRange>[9:9]</bitRange>
30876                        <access>read-write</access>
30877                    </field>
30878                    <field>
30879                        <name>GPIO2_LEVEL_LOW</name>
30880                        <bitRange>[8:8]</bitRange>
30881                        <access>read-write</access>
30882                    </field>
30883                    <field>
30884                        <name>GPIO1_EDGE_HIGH</name>
30885                        <bitRange>[7:7]</bitRange>
30886                        <access>read-write</access>
30887                    </field>
30888                    <field>
30889                        <name>GPIO1_EDGE_LOW</name>
30890                        <bitRange>[6:6]</bitRange>
30891                        <access>read-write</access>
30892                    </field>
30893                    <field>
30894                        <name>GPIO1_LEVEL_HIGH</name>
30895                        <bitRange>[5:5]</bitRange>
30896                        <access>read-write</access>
30897                    </field>
30898                    <field>
30899                        <name>GPIO1_LEVEL_LOW</name>
30900                        <bitRange>[4:4]</bitRange>
30901                        <access>read-write</access>
30902                    </field>
30903                    <field>
30904                        <name>GPIO0_EDGE_HIGH</name>
30905                        <bitRange>[3:3]</bitRange>
30906                        <access>read-write</access>
30907                    </field>
30908                    <field>
30909                        <name>GPIO0_EDGE_LOW</name>
30910                        <bitRange>[2:2]</bitRange>
30911                        <access>read-write</access>
30912                    </field>
30913                    <field>
30914                        <name>GPIO0_LEVEL_HIGH</name>
30915                        <bitRange>[1:1]</bitRange>
30916                        <access>read-write</access>
30917                    </field>
30918                    <field>
30919                        <name>GPIO0_LEVEL_LOW</name>
30920                        <bitRange>[0:0]</bitRange>
30921                        <access>read-write</access>
30922                    </field>
30923                </fields>
30924            </register>
30925            <register>
30926                <name>DORMANT_WAKE_INTF1</name>
30927                <addressOffset>0x000002f4</addressOffset>
30928                <description>Interrupt Force for dormant_wake</description>
30929                <resetValue>0x00000000</resetValue>
30930                <fields>
30931                    <field>
30932                        <name>GPIO15_EDGE_HIGH</name>
30933                        <bitRange>[31:31]</bitRange>
30934                        <access>read-write</access>
30935                    </field>
30936                    <field>
30937                        <name>GPIO15_EDGE_LOW</name>
30938                        <bitRange>[30:30]</bitRange>
30939                        <access>read-write</access>
30940                    </field>
30941                    <field>
30942                        <name>GPIO15_LEVEL_HIGH</name>
30943                        <bitRange>[29:29]</bitRange>
30944                        <access>read-write</access>
30945                    </field>
30946                    <field>
30947                        <name>GPIO15_LEVEL_LOW</name>
30948                        <bitRange>[28:28]</bitRange>
30949                        <access>read-write</access>
30950                    </field>
30951                    <field>
30952                        <name>GPIO14_EDGE_HIGH</name>
30953                        <bitRange>[27:27]</bitRange>
30954                        <access>read-write</access>
30955                    </field>
30956                    <field>
30957                        <name>GPIO14_EDGE_LOW</name>
30958                        <bitRange>[26:26]</bitRange>
30959                        <access>read-write</access>
30960                    </field>
30961                    <field>
30962                        <name>GPIO14_LEVEL_HIGH</name>
30963                        <bitRange>[25:25]</bitRange>
30964                        <access>read-write</access>
30965                    </field>
30966                    <field>
30967                        <name>GPIO14_LEVEL_LOW</name>
30968                        <bitRange>[24:24]</bitRange>
30969                        <access>read-write</access>
30970                    </field>
30971                    <field>
30972                        <name>GPIO13_EDGE_HIGH</name>
30973                        <bitRange>[23:23]</bitRange>
30974                        <access>read-write</access>
30975                    </field>
30976                    <field>
30977                        <name>GPIO13_EDGE_LOW</name>
30978                        <bitRange>[22:22]</bitRange>
30979                        <access>read-write</access>
30980                    </field>
30981                    <field>
30982                        <name>GPIO13_LEVEL_HIGH</name>
30983                        <bitRange>[21:21]</bitRange>
30984                        <access>read-write</access>
30985                    </field>
30986                    <field>
30987                        <name>GPIO13_LEVEL_LOW</name>
30988                        <bitRange>[20:20]</bitRange>
30989                        <access>read-write</access>
30990                    </field>
30991                    <field>
30992                        <name>GPIO12_EDGE_HIGH</name>
30993                        <bitRange>[19:19]</bitRange>
30994                        <access>read-write</access>
30995                    </field>
30996                    <field>
30997                        <name>GPIO12_EDGE_LOW</name>
30998                        <bitRange>[18:18]</bitRange>
30999                        <access>read-write</access>
31000                    </field>
31001                    <field>
31002                        <name>GPIO12_LEVEL_HIGH</name>
31003                        <bitRange>[17:17]</bitRange>
31004                        <access>read-write</access>
31005                    </field>
31006                    <field>
31007                        <name>GPIO12_LEVEL_LOW</name>
31008                        <bitRange>[16:16]</bitRange>
31009                        <access>read-write</access>
31010                    </field>
31011                    <field>
31012                        <name>GPIO11_EDGE_HIGH</name>
31013                        <bitRange>[15:15]</bitRange>
31014                        <access>read-write</access>
31015                    </field>
31016                    <field>
31017                        <name>GPIO11_EDGE_LOW</name>
31018                        <bitRange>[14:14]</bitRange>
31019                        <access>read-write</access>
31020                    </field>
31021                    <field>
31022                        <name>GPIO11_LEVEL_HIGH</name>
31023                        <bitRange>[13:13]</bitRange>
31024                        <access>read-write</access>
31025                    </field>
31026                    <field>
31027                        <name>GPIO11_LEVEL_LOW</name>
31028                        <bitRange>[12:12]</bitRange>
31029                        <access>read-write</access>
31030                    </field>
31031                    <field>
31032                        <name>GPIO10_EDGE_HIGH</name>
31033                        <bitRange>[11:11]</bitRange>
31034                        <access>read-write</access>
31035                    </field>
31036                    <field>
31037                        <name>GPIO10_EDGE_LOW</name>
31038                        <bitRange>[10:10]</bitRange>
31039                        <access>read-write</access>
31040                    </field>
31041                    <field>
31042                        <name>GPIO10_LEVEL_HIGH</name>
31043                        <bitRange>[9:9]</bitRange>
31044                        <access>read-write</access>
31045                    </field>
31046                    <field>
31047                        <name>GPIO10_LEVEL_LOW</name>
31048                        <bitRange>[8:8]</bitRange>
31049                        <access>read-write</access>
31050                    </field>
31051                    <field>
31052                        <name>GPIO9_EDGE_HIGH</name>
31053                        <bitRange>[7:7]</bitRange>
31054                        <access>read-write</access>
31055                    </field>
31056                    <field>
31057                        <name>GPIO9_EDGE_LOW</name>
31058                        <bitRange>[6:6]</bitRange>
31059                        <access>read-write</access>
31060                    </field>
31061                    <field>
31062                        <name>GPIO9_LEVEL_HIGH</name>
31063                        <bitRange>[5:5]</bitRange>
31064                        <access>read-write</access>
31065                    </field>
31066                    <field>
31067                        <name>GPIO9_LEVEL_LOW</name>
31068                        <bitRange>[4:4]</bitRange>
31069                        <access>read-write</access>
31070                    </field>
31071                    <field>
31072                        <name>GPIO8_EDGE_HIGH</name>
31073                        <bitRange>[3:3]</bitRange>
31074                        <access>read-write</access>
31075                    </field>
31076                    <field>
31077                        <name>GPIO8_EDGE_LOW</name>
31078                        <bitRange>[2:2]</bitRange>
31079                        <access>read-write</access>
31080                    </field>
31081                    <field>
31082                        <name>GPIO8_LEVEL_HIGH</name>
31083                        <bitRange>[1:1]</bitRange>
31084                        <access>read-write</access>
31085                    </field>
31086                    <field>
31087                        <name>GPIO8_LEVEL_LOW</name>
31088                        <bitRange>[0:0]</bitRange>
31089                        <access>read-write</access>
31090                    </field>
31091                </fields>
31092            </register>
31093            <register>
31094                <name>DORMANT_WAKE_INTF2</name>
31095                <addressOffset>0x000002f8</addressOffset>
31096                <description>Interrupt Force for dormant_wake</description>
31097                <resetValue>0x00000000</resetValue>
31098                <fields>
31099                    <field>
31100                        <name>GPIO23_EDGE_HIGH</name>
31101                        <bitRange>[31:31]</bitRange>
31102                        <access>read-write</access>
31103                    </field>
31104                    <field>
31105                        <name>GPIO23_EDGE_LOW</name>
31106                        <bitRange>[30:30]</bitRange>
31107                        <access>read-write</access>
31108                    </field>
31109                    <field>
31110                        <name>GPIO23_LEVEL_HIGH</name>
31111                        <bitRange>[29:29]</bitRange>
31112                        <access>read-write</access>
31113                    </field>
31114                    <field>
31115                        <name>GPIO23_LEVEL_LOW</name>
31116                        <bitRange>[28:28]</bitRange>
31117                        <access>read-write</access>
31118                    </field>
31119                    <field>
31120                        <name>GPIO22_EDGE_HIGH</name>
31121                        <bitRange>[27:27]</bitRange>
31122                        <access>read-write</access>
31123                    </field>
31124                    <field>
31125                        <name>GPIO22_EDGE_LOW</name>
31126                        <bitRange>[26:26]</bitRange>
31127                        <access>read-write</access>
31128                    </field>
31129                    <field>
31130                        <name>GPIO22_LEVEL_HIGH</name>
31131                        <bitRange>[25:25]</bitRange>
31132                        <access>read-write</access>
31133                    </field>
31134                    <field>
31135                        <name>GPIO22_LEVEL_LOW</name>
31136                        <bitRange>[24:24]</bitRange>
31137                        <access>read-write</access>
31138                    </field>
31139                    <field>
31140                        <name>GPIO21_EDGE_HIGH</name>
31141                        <bitRange>[23:23]</bitRange>
31142                        <access>read-write</access>
31143                    </field>
31144                    <field>
31145                        <name>GPIO21_EDGE_LOW</name>
31146                        <bitRange>[22:22]</bitRange>
31147                        <access>read-write</access>
31148                    </field>
31149                    <field>
31150                        <name>GPIO21_LEVEL_HIGH</name>
31151                        <bitRange>[21:21]</bitRange>
31152                        <access>read-write</access>
31153                    </field>
31154                    <field>
31155                        <name>GPIO21_LEVEL_LOW</name>
31156                        <bitRange>[20:20]</bitRange>
31157                        <access>read-write</access>
31158                    </field>
31159                    <field>
31160                        <name>GPIO20_EDGE_HIGH</name>
31161                        <bitRange>[19:19]</bitRange>
31162                        <access>read-write</access>
31163                    </field>
31164                    <field>
31165                        <name>GPIO20_EDGE_LOW</name>
31166                        <bitRange>[18:18]</bitRange>
31167                        <access>read-write</access>
31168                    </field>
31169                    <field>
31170                        <name>GPIO20_LEVEL_HIGH</name>
31171                        <bitRange>[17:17]</bitRange>
31172                        <access>read-write</access>
31173                    </field>
31174                    <field>
31175                        <name>GPIO20_LEVEL_LOW</name>
31176                        <bitRange>[16:16]</bitRange>
31177                        <access>read-write</access>
31178                    </field>
31179                    <field>
31180                        <name>GPIO19_EDGE_HIGH</name>
31181                        <bitRange>[15:15]</bitRange>
31182                        <access>read-write</access>
31183                    </field>
31184                    <field>
31185                        <name>GPIO19_EDGE_LOW</name>
31186                        <bitRange>[14:14]</bitRange>
31187                        <access>read-write</access>
31188                    </field>
31189                    <field>
31190                        <name>GPIO19_LEVEL_HIGH</name>
31191                        <bitRange>[13:13]</bitRange>
31192                        <access>read-write</access>
31193                    </field>
31194                    <field>
31195                        <name>GPIO19_LEVEL_LOW</name>
31196                        <bitRange>[12:12]</bitRange>
31197                        <access>read-write</access>
31198                    </field>
31199                    <field>
31200                        <name>GPIO18_EDGE_HIGH</name>
31201                        <bitRange>[11:11]</bitRange>
31202                        <access>read-write</access>
31203                    </field>
31204                    <field>
31205                        <name>GPIO18_EDGE_LOW</name>
31206                        <bitRange>[10:10]</bitRange>
31207                        <access>read-write</access>
31208                    </field>
31209                    <field>
31210                        <name>GPIO18_LEVEL_HIGH</name>
31211                        <bitRange>[9:9]</bitRange>
31212                        <access>read-write</access>
31213                    </field>
31214                    <field>
31215                        <name>GPIO18_LEVEL_LOW</name>
31216                        <bitRange>[8:8]</bitRange>
31217                        <access>read-write</access>
31218                    </field>
31219                    <field>
31220                        <name>GPIO17_EDGE_HIGH</name>
31221                        <bitRange>[7:7]</bitRange>
31222                        <access>read-write</access>
31223                    </field>
31224                    <field>
31225                        <name>GPIO17_EDGE_LOW</name>
31226                        <bitRange>[6:6]</bitRange>
31227                        <access>read-write</access>
31228                    </field>
31229                    <field>
31230                        <name>GPIO17_LEVEL_HIGH</name>
31231                        <bitRange>[5:5]</bitRange>
31232                        <access>read-write</access>
31233                    </field>
31234                    <field>
31235                        <name>GPIO17_LEVEL_LOW</name>
31236                        <bitRange>[4:4]</bitRange>
31237                        <access>read-write</access>
31238                    </field>
31239                    <field>
31240                        <name>GPIO16_EDGE_HIGH</name>
31241                        <bitRange>[3:3]</bitRange>
31242                        <access>read-write</access>
31243                    </field>
31244                    <field>
31245                        <name>GPIO16_EDGE_LOW</name>
31246                        <bitRange>[2:2]</bitRange>
31247                        <access>read-write</access>
31248                    </field>
31249                    <field>
31250                        <name>GPIO16_LEVEL_HIGH</name>
31251                        <bitRange>[1:1]</bitRange>
31252                        <access>read-write</access>
31253                    </field>
31254                    <field>
31255                        <name>GPIO16_LEVEL_LOW</name>
31256                        <bitRange>[0:0]</bitRange>
31257                        <access>read-write</access>
31258                    </field>
31259                </fields>
31260            </register>
31261            <register>
31262                <name>DORMANT_WAKE_INTF3</name>
31263                <addressOffset>0x000002fc</addressOffset>
31264                <description>Interrupt Force for dormant_wake</description>
31265                <resetValue>0x00000000</resetValue>
31266                <fields>
31267                    <field>
31268                        <name>GPIO31_EDGE_HIGH</name>
31269                        <bitRange>[31:31]</bitRange>
31270                        <access>read-write</access>
31271                    </field>
31272                    <field>
31273                        <name>GPIO31_EDGE_LOW</name>
31274                        <bitRange>[30:30]</bitRange>
31275                        <access>read-write</access>
31276                    </field>
31277                    <field>
31278                        <name>GPIO31_LEVEL_HIGH</name>
31279                        <bitRange>[29:29]</bitRange>
31280                        <access>read-write</access>
31281                    </field>
31282                    <field>
31283                        <name>GPIO31_LEVEL_LOW</name>
31284                        <bitRange>[28:28]</bitRange>
31285                        <access>read-write</access>
31286                    </field>
31287                    <field>
31288                        <name>GPIO30_EDGE_HIGH</name>
31289                        <bitRange>[27:27]</bitRange>
31290                        <access>read-write</access>
31291                    </field>
31292                    <field>
31293                        <name>GPIO30_EDGE_LOW</name>
31294                        <bitRange>[26:26]</bitRange>
31295                        <access>read-write</access>
31296                    </field>
31297                    <field>
31298                        <name>GPIO30_LEVEL_HIGH</name>
31299                        <bitRange>[25:25]</bitRange>
31300                        <access>read-write</access>
31301                    </field>
31302                    <field>
31303                        <name>GPIO30_LEVEL_LOW</name>
31304                        <bitRange>[24:24]</bitRange>
31305                        <access>read-write</access>
31306                    </field>
31307                    <field>
31308                        <name>GPIO29_EDGE_HIGH</name>
31309                        <bitRange>[23:23]</bitRange>
31310                        <access>read-write</access>
31311                    </field>
31312                    <field>
31313                        <name>GPIO29_EDGE_LOW</name>
31314                        <bitRange>[22:22]</bitRange>
31315                        <access>read-write</access>
31316                    </field>
31317                    <field>
31318                        <name>GPIO29_LEVEL_HIGH</name>
31319                        <bitRange>[21:21]</bitRange>
31320                        <access>read-write</access>
31321                    </field>
31322                    <field>
31323                        <name>GPIO29_LEVEL_LOW</name>
31324                        <bitRange>[20:20]</bitRange>
31325                        <access>read-write</access>
31326                    </field>
31327                    <field>
31328                        <name>GPIO28_EDGE_HIGH</name>
31329                        <bitRange>[19:19]</bitRange>
31330                        <access>read-write</access>
31331                    </field>
31332                    <field>
31333                        <name>GPIO28_EDGE_LOW</name>
31334                        <bitRange>[18:18]</bitRange>
31335                        <access>read-write</access>
31336                    </field>
31337                    <field>
31338                        <name>GPIO28_LEVEL_HIGH</name>
31339                        <bitRange>[17:17]</bitRange>
31340                        <access>read-write</access>
31341                    </field>
31342                    <field>
31343                        <name>GPIO28_LEVEL_LOW</name>
31344                        <bitRange>[16:16]</bitRange>
31345                        <access>read-write</access>
31346                    </field>
31347                    <field>
31348                        <name>GPIO27_EDGE_HIGH</name>
31349                        <bitRange>[15:15]</bitRange>
31350                        <access>read-write</access>
31351                    </field>
31352                    <field>
31353                        <name>GPIO27_EDGE_LOW</name>
31354                        <bitRange>[14:14]</bitRange>
31355                        <access>read-write</access>
31356                    </field>
31357                    <field>
31358                        <name>GPIO27_LEVEL_HIGH</name>
31359                        <bitRange>[13:13]</bitRange>
31360                        <access>read-write</access>
31361                    </field>
31362                    <field>
31363                        <name>GPIO27_LEVEL_LOW</name>
31364                        <bitRange>[12:12]</bitRange>
31365                        <access>read-write</access>
31366                    </field>
31367                    <field>
31368                        <name>GPIO26_EDGE_HIGH</name>
31369                        <bitRange>[11:11]</bitRange>
31370                        <access>read-write</access>
31371                    </field>
31372                    <field>
31373                        <name>GPIO26_EDGE_LOW</name>
31374                        <bitRange>[10:10]</bitRange>
31375                        <access>read-write</access>
31376                    </field>
31377                    <field>
31378                        <name>GPIO26_LEVEL_HIGH</name>
31379                        <bitRange>[9:9]</bitRange>
31380                        <access>read-write</access>
31381                    </field>
31382                    <field>
31383                        <name>GPIO26_LEVEL_LOW</name>
31384                        <bitRange>[8:8]</bitRange>
31385                        <access>read-write</access>
31386                    </field>
31387                    <field>
31388                        <name>GPIO25_EDGE_HIGH</name>
31389                        <bitRange>[7:7]</bitRange>
31390                        <access>read-write</access>
31391                    </field>
31392                    <field>
31393                        <name>GPIO25_EDGE_LOW</name>
31394                        <bitRange>[6:6]</bitRange>
31395                        <access>read-write</access>
31396                    </field>
31397                    <field>
31398                        <name>GPIO25_LEVEL_HIGH</name>
31399                        <bitRange>[5:5]</bitRange>
31400                        <access>read-write</access>
31401                    </field>
31402                    <field>
31403                        <name>GPIO25_LEVEL_LOW</name>
31404                        <bitRange>[4:4]</bitRange>
31405                        <access>read-write</access>
31406                    </field>
31407                    <field>
31408                        <name>GPIO24_EDGE_HIGH</name>
31409                        <bitRange>[3:3]</bitRange>
31410                        <access>read-write</access>
31411                    </field>
31412                    <field>
31413                        <name>GPIO24_EDGE_LOW</name>
31414                        <bitRange>[2:2]</bitRange>
31415                        <access>read-write</access>
31416                    </field>
31417                    <field>
31418                        <name>GPIO24_LEVEL_HIGH</name>
31419                        <bitRange>[1:1]</bitRange>
31420                        <access>read-write</access>
31421                    </field>
31422                    <field>
31423                        <name>GPIO24_LEVEL_LOW</name>
31424                        <bitRange>[0:0]</bitRange>
31425                        <access>read-write</access>
31426                    </field>
31427                </fields>
31428            </register>
31429            <register>
31430                <name>DORMANT_WAKE_INTF4</name>
31431                <addressOffset>0x00000300</addressOffset>
31432                <description>Interrupt Force for dormant_wake</description>
31433                <resetValue>0x00000000</resetValue>
31434                <fields>
31435                    <field>
31436                        <name>GPIO39_EDGE_HIGH</name>
31437                        <bitRange>[31:31]</bitRange>
31438                        <access>read-write</access>
31439                    </field>
31440                    <field>
31441                        <name>GPIO39_EDGE_LOW</name>
31442                        <bitRange>[30:30]</bitRange>
31443                        <access>read-write</access>
31444                    </field>
31445                    <field>
31446                        <name>GPIO39_LEVEL_HIGH</name>
31447                        <bitRange>[29:29]</bitRange>
31448                        <access>read-write</access>
31449                    </field>
31450                    <field>
31451                        <name>GPIO39_LEVEL_LOW</name>
31452                        <bitRange>[28:28]</bitRange>
31453                        <access>read-write</access>
31454                    </field>
31455                    <field>
31456                        <name>GPIO38_EDGE_HIGH</name>
31457                        <bitRange>[27:27]</bitRange>
31458                        <access>read-write</access>
31459                    </field>
31460                    <field>
31461                        <name>GPIO38_EDGE_LOW</name>
31462                        <bitRange>[26:26]</bitRange>
31463                        <access>read-write</access>
31464                    </field>
31465                    <field>
31466                        <name>GPIO38_LEVEL_HIGH</name>
31467                        <bitRange>[25:25]</bitRange>
31468                        <access>read-write</access>
31469                    </field>
31470                    <field>
31471                        <name>GPIO38_LEVEL_LOW</name>
31472                        <bitRange>[24:24]</bitRange>
31473                        <access>read-write</access>
31474                    </field>
31475                    <field>
31476                        <name>GPIO37_EDGE_HIGH</name>
31477                        <bitRange>[23:23]</bitRange>
31478                        <access>read-write</access>
31479                    </field>
31480                    <field>
31481                        <name>GPIO37_EDGE_LOW</name>
31482                        <bitRange>[22:22]</bitRange>
31483                        <access>read-write</access>
31484                    </field>
31485                    <field>
31486                        <name>GPIO37_LEVEL_HIGH</name>
31487                        <bitRange>[21:21]</bitRange>
31488                        <access>read-write</access>
31489                    </field>
31490                    <field>
31491                        <name>GPIO37_LEVEL_LOW</name>
31492                        <bitRange>[20:20]</bitRange>
31493                        <access>read-write</access>
31494                    </field>
31495                    <field>
31496                        <name>GPIO36_EDGE_HIGH</name>
31497                        <bitRange>[19:19]</bitRange>
31498                        <access>read-write</access>
31499                    </field>
31500                    <field>
31501                        <name>GPIO36_EDGE_LOW</name>
31502                        <bitRange>[18:18]</bitRange>
31503                        <access>read-write</access>
31504                    </field>
31505                    <field>
31506                        <name>GPIO36_LEVEL_HIGH</name>
31507                        <bitRange>[17:17]</bitRange>
31508                        <access>read-write</access>
31509                    </field>
31510                    <field>
31511                        <name>GPIO36_LEVEL_LOW</name>
31512                        <bitRange>[16:16]</bitRange>
31513                        <access>read-write</access>
31514                    </field>
31515                    <field>
31516                        <name>GPIO35_EDGE_HIGH</name>
31517                        <bitRange>[15:15]</bitRange>
31518                        <access>read-write</access>
31519                    </field>
31520                    <field>
31521                        <name>GPIO35_EDGE_LOW</name>
31522                        <bitRange>[14:14]</bitRange>
31523                        <access>read-write</access>
31524                    </field>
31525                    <field>
31526                        <name>GPIO35_LEVEL_HIGH</name>
31527                        <bitRange>[13:13]</bitRange>
31528                        <access>read-write</access>
31529                    </field>
31530                    <field>
31531                        <name>GPIO35_LEVEL_LOW</name>
31532                        <bitRange>[12:12]</bitRange>
31533                        <access>read-write</access>
31534                    </field>
31535                    <field>
31536                        <name>GPIO34_EDGE_HIGH</name>
31537                        <bitRange>[11:11]</bitRange>
31538                        <access>read-write</access>
31539                    </field>
31540                    <field>
31541                        <name>GPIO34_EDGE_LOW</name>
31542                        <bitRange>[10:10]</bitRange>
31543                        <access>read-write</access>
31544                    </field>
31545                    <field>
31546                        <name>GPIO34_LEVEL_HIGH</name>
31547                        <bitRange>[9:9]</bitRange>
31548                        <access>read-write</access>
31549                    </field>
31550                    <field>
31551                        <name>GPIO34_LEVEL_LOW</name>
31552                        <bitRange>[8:8]</bitRange>
31553                        <access>read-write</access>
31554                    </field>
31555                    <field>
31556                        <name>GPIO33_EDGE_HIGH</name>
31557                        <bitRange>[7:7]</bitRange>
31558                        <access>read-write</access>
31559                    </field>
31560                    <field>
31561                        <name>GPIO33_EDGE_LOW</name>
31562                        <bitRange>[6:6]</bitRange>
31563                        <access>read-write</access>
31564                    </field>
31565                    <field>
31566                        <name>GPIO33_LEVEL_HIGH</name>
31567                        <bitRange>[5:5]</bitRange>
31568                        <access>read-write</access>
31569                    </field>
31570                    <field>
31571                        <name>GPIO33_LEVEL_LOW</name>
31572                        <bitRange>[4:4]</bitRange>
31573                        <access>read-write</access>
31574                    </field>
31575                    <field>
31576                        <name>GPIO32_EDGE_HIGH</name>
31577                        <bitRange>[3:3]</bitRange>
31578                        <access>read-write</access>
31579                    </field>
31580                    <field>
31581                        <name>GPIO32_EDGE_LOW</name>
31582                        <bitRange>[2:2]</bitRange>
31583                        <access>read-write</access>
31584                    </field>
31585                    <field>
31586                        <name>GPIO32_LEVEL_HIGH</name>
31587                        <bitRange>[1:1]</bitRange>
31588                        <access>read-write</access>
31589                    </field>
31590                    <field>
31591                        <name>GPIO32_LEVEL_LOW</name>
31592                        <bitRange>[0:0]</bitRange>
31593                        <access>read-write</access>
31594                    </field>
31595                </fields>
31596            </register>
31597            <register>
31598                <name>DORMANT_WAKE_INTF5</name>
31599                <addressOffset>0x00000304</addressOffset>
31600                <description>Interrupt Force for dormant_wake</description>
31601                <resetValue>0x00000000</resetValue>
31602                <fields>
31603                    <field>
31604                        <name>GPIO47_EDGE_HIGH</name>
31605                        <bitRange>[31:31]</bitRange>
31606                        <access>read-write</access>
31607                    </field>
31608                    <field>
31609                        <name>GPIO47_EDGE_LOW</name>
31610                        <bitRange>[30:30]</bitRange>
31611                        <access>read-write</access>
31612                    </field>
31613                    <field>
31614                        <name>GPIO47_LEVEL_HIGH</name>
31615                        <bitRange>[29:29]</bitRange>
31616                        <access>read-write</access>
31617                    </field>
31618                    <field>
31619                        <name>GPIO47_LEVEL_LOW</name>
31620                        <bitRange>[28:28]</bitRange>
31621                        <access>read-write</access>
31622                    </field>
31623                    <field>
31624                        <name>GPIO46_EDGE_HIGH</name>
31625                        <bitRange>[27:27]</bitRange>
31626                        <access>read-write</access>
31627                    </field>
31628                    <field>
31629                        <name>GPIO46_EDGE_LOW</name>
31630                        <bitRange>[26:26]</bitRange>
31631                        <access>read-write</access>
31632                    </field>
31633                    <field>
31634                        <name>GPIO46_LEVEL_HIGH</name>
31635                        <bitRange>[25:25]</bitRange>
31636                        <access>read-write</access>
31637                    </field>
31638                    <field>
31639                        <name>GPIO46_LEVEL_LOW</name>
31640                        <bitRange>[24:24]</bitRange>
31641                        <access>read-write</access>
31642                    </field>
31643                    <field>
31644                        <name>GPIO45_EDGE_HIGH</name>
31645                        <bitRange>[23:23]</bitRange>
31646                        <access>read-write</access>
31647                    </field>
31648                    <field>
31649                        <name>GPIO45_EDGE_LOW</name>
31650                        <bitRange>[22:22]</bitRange>
31651                        <access>read-write</access>
31652                    </field>
31653                    <field>
31654                        <name>GPIO45_LEVEL_HIGH</name>
31655                        <bitRange>[21:21]</bitRange>
31656                        <access>read-write</access>
31657                    </field>
31658                    <field>
31659                        <name>GPIO45_LEVEL_LOW</name>
31660                        <bitRange>[20:20]</bitRange>
31661                        <access>read-write</access>
31662                    </field>
31663                    <field>
31664                        <name>GPIO44_EDGE_HIGH</name>
31665                        <bitRange>[19:19]</bitRange>
31666                        <access>read-write</access>
31667                    </field>
31668                    <field>
31669                        <name>GPIO44_EDGE_LOW</name>
31670                        <bitRange>[18:18]</bitRange>
31671                        <access>read-write</access>
31672                    </field>
31673                    <field>
31674                        <name>GPIO44_LEVEL_HIGH</name>
31675                        <bitRange>[17:17]</bitRange>
31676                        <access>read-write</access>
31677                    </field>
31678                    <field>
31679                        <name>GPIO44_LEVEL_LOW</name>
31680                        <bitRange>[16:16]</bitRange>
31681                        <access>read-write</access>
31682                    </field>
31683                    <field>
31684                        <name>GPIO43_EDGE_HIGH</name>
31685                        <bitRange>[15:15]</bitRange>
31686                        <access>read-write</access>
31687                    </field>
31688                    <field>
31689                        <name>GPIO43_EDGE_LOW</name>
31690                        <bitRange>[14:14]</bitRange>
31691                        <access>read-write</access>
31692                    </field>
31693                    <field>
31694                        <name>GPIO43_LEVEL_HIGH</name>
31695                        <bitRange>[13:13]</bitRange>
31696                        <access>read-write</access>
31697                    </field>
31698                    <field>
31699                        <name>GPIO43_LEVEL_LOW</name>
31700                        <bitRange>[12:12]</bitRange>
31701                        <access>read-write</access>
31702                    </field>
31703                    <field>
31704                        <name>GPIO42_EDGE_HIGH</name>
31705                        <bitRange>[11:11]</bitRange>
31706                        <access>read-write</access>
31707                    </field>
31708                    <field>
31709                        <name>GPIO42_EDGE_LOW</name>
31710                        <bitRange>[10:10]</bitRange>
31711                        <access>read-write</access>
31712                    </field>
31713                    <field>
31714                        <name>GPIO42_LEVEL_HIGH</name>
31715                        <bitRange>[9:9]</bitRange>
31716                        <access>read-write</access>
31717                    </field>
31718                    <field>
31719                        <name>GPIO42_LEVEL_LOW</name>
31720                        <bitRange>[8:8]</bitRange>
31721                        <access>read-write</access>
31722                    </field>
31723                    <field>
31724                        <name>GPIO41_EDGE_HIGH</name>
31725                        <bitRange>[7:7]</bitRange>
31726                        <access>read-write</access>
31727                    </field>
31728                    <field>
31729                        <name>GPIO41_EDGE_LOW</name>
31730                        <bitRange>[6:6]</bitRange>
31731                        <access>read-write</access>
31732                    </field>
31733                    <field>
31734                        <name>GPIO41_LEVEL_HIGH</name>
31735                        <bitRange>[5:5]</bitRange>
31736                        <access>read-write</access>
31737                    </field>
31738                    <field>
31739                        <name>GPIO41_LEVEL_LOW</name>
31740                        <bitRange>[4:4]</bitRange>
31741                        <access>read-write</access>
31742                    </field>
31743                    <field>
31744                        <name>GPIO40_EDGE_HIGH</name>
31745                        <bitRange>[3:3]</bitRange>
31746                        <access>read-write</access>
31747                    </field>
31748                    <field>
31749                        <name>GPIO40_EDGE_LOW</name>
31750                        <bitRange>[2:2]</bitRange>
31751                        <access>read-write</access>
31752                    </field>
31753                    <field>
31754                        <name>GPIO40_LEVEL_HIGH</name>
31755                        <bitRange>[1:1]</bitRange>
31756                        <access>read-write</access>
31757                    </field>
31758                    <field>
31759                        <name>GPIO40_LEVEL_LOW</name>
31760                        <bitRange>[0:0]</bitRange>
31761                        <access>read-write</access>
31762                    </field>
31763                </fields>
31764            </register>
31765            <register>
31766                <name>DORMANT_WAKE_INTS0</name>
31767                <addressOffset>0x00000308</addressOffset>
31768                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
31769                <resetValue>0x00000000</resetValue>
31770                <fields>
31771                    <field>
31772                        <name>GPIO7_EDGE_HIGH</name>
31773                        <bitRange>[31:31]</bitRange>
31774                        <access>read-only</access>
31775                    </field>
31776                    <field>
31777                        <name>GPIO7_EDGE_LOW</name>
31778                        <bitRange>[30:30]</bitRange>
31779                        <access>read-only</access>
31780                    </field>
31781                    <field>
31782                        <name>GPIO7_LEVEL_HIGH</name>
31783                        <bitRange>[29:29]</bitRange>
31784                        <access>read-only</access>
31785                    </field>
31786                    <field>
31787                        <name>GPIO7_LEVEL_LOW</name>
31788                        <bitRange>[28:28]</bitRange>
31789                        <access>read-only</access>
31790                    </field>
31791                    <field>
31792                        <name>GPIO6_EDGE_HIGH</name>
31793                        <bitRange>[27:27]</bitRange>
31794                        <access>read-only</access>
31795                    </field>
31796                    <field>
31797                        <name>GPIO6_EDGE_LOW</name>
31798                        <bitRange>[26:26]</bitRange>
31799                        <access>read-only</access>
31800                    </field>
31801                    <field>
31802                        <name>GPIO6_LEVEL_HIGH</name>
31803                        <bitRange>[25:25]</bitRange>
31804                        <access>read-only</access>
31805                    </field>
31806                    <field>
31807                        <name>GPIO6_LEVEL_LOW</name>
31808                        <bitRange>[24:24]</bitRange>
31809                        <access>read-only</access>
31810                    </field>
31811                    <field>
31812                        <name>GPIO5_EDGE_HIGH</name>
31813                        <bitRange>[23:23]</bitRange>
31814                        <access>read-only</access>
31815                    </field>
31816                    <field>
31817                        <name>GPIO5_EDGE_LOW</name>
31818                        <bitRange>[22:22]</bitRange>
31819                        <access>read-only</access>
31820                    </field>
31821                    <field>
31822                        <name>GPIO5_LEVEL_HIGH</name>
31823                        <bitRange>[21:21]</bitRange>
31824                        <access>read-only</access>
31825                    </field>
31826                    <field>
31827                        <name>GPIO5_LEVEL_LOW</name>
31828                        <bitRange>[20:20]</bitRange>
31829                        <access>read-only</access>
31830                    </field>
31831                    <field>
31832                        <name>GPIO4_EDGE_HIGH</name>
31833                        <bitRange>[19:19]</bitRange>
31834                        <access>read-only</access>
31835                    </field>
31836                    <field>
31837                        <name>GPIO4_EDGE_LOW</name>
31838                        <bitRange>[18:18]</bitRange>
31839                        <access>read-only</access>
31840                    </field>
31841                    <field>
31842                        <name>GPIO4_LEVEL_HIGH</name>
31843                        <bitRange>[17:17]</bitRange>
31844                        <access>read-only</access>
31845                    </field>
31846                    <field>
31847                        <name>GPIO4_LEVEL_LOW</name>
31848                        <bitRange>[16:16]</bitRange>
31849                        <access>read-only</access>
31850                    </field>
31851                    <field>
31852                        <name>GPIO3_EDGE_HIGH</name>
31853                        <bitRange>[15:15]</bitRange>
31854                        <access>read-only</access>
31855                    </field>
31856                    <field>
31857                        <name>GPIO3_EDGE_LOW</name>
31858                        <bitRange>[14:14]</bitRange>
31859                        <access>read-only</access>
31860                    </field>
31861                    <field>
31862                        <name>GPIO3_LEVEL_HIGH</name>
31863                        <bitRange>[13:13]</bitRange>
31864                        <access>read-only</access>
31865                    </field>
31866                    <field>
31867                        <name>GPIO3_LEVEL_LOW</name>
31868                        <bitRange>[12:12]</bitRange>
31869                        <access>read-only</access>
31870                    </field>
31871                    <field>
31872                        <name>GPIO2_EDGE_HIGH</name>
31873                        <bitRange>[11:11]</bitRange>
31874                        <access>read-only</access>
31875                    </field>
31876                    <field>
31877                        <name>GPIO2_EDGE_LOW</name>
31878                        <bitRange>[10:10]</bitRange>
31879                        <access>read-only</access>
31880                    </field>
31881                    <field>
31882                        <name>GPIO2_LEVEL_HIGH</name>
31883                        <bitRange>[9:9]</bitRange>
31884                        <access>read-only</access>
31885                    </field>
31886                    <field>
31887                        <name>GPIO2_LEVEL_LOW</name>
31888                        <bitRange>[8:8]</bitRange>
31889                        <access>read-only</access>
31890                    </field>
31891                    <field>
31892                        <name>GPIO1_EDGE_HIGH</name>
31893                        <bitRange>[7:7]</bitRange>
31894                        <access>read-only</access>
31895                    </field>
31896                    <field>
31897                        <name>GPIO1_EDGE_LOW</name>
31898                        <bitRange>[6:6]</bitRange>
31899                        <access>read-only</access>
31900                    </field>
31901                    <field>
31902                        <name>GPIO1_LEVEL_HIGH</name>
31903                        <bitRange>[5:5]</bitRange>
31904                        <access>read-only</access>
31905                    </field>
31906                    <field>
31907                        <name>GPIO1_LEVEL_LOW</name>
31908                        <bitRange>[4:4]</bitRange>
31909                        <access>read-only</access>
31910                    </field>
31911                    <field>
31912                        <name>GPIO0_EDGE_HIGH</name>
31913                        <bitRange>[3:3]</bitRange>
31914                        <access>read-only</access>
31915                    </field>
31916                    <field>
31917                        <name>GPIO0_EDGE_LOW</name>
31918                        <bitRange>[2:2]</bitRange>
31919                        <access>read-only</access>
31920                    </field>
31921                    <field>
31922                        <name>GPIO0_LEVEL_HIGH</name>
31923                        <bitRange>[1:1]</bitRange>
31924                        <access>read-only</access>
31925                    </field>
31926                    <field>
31927                        <name>GPIO0_LEVEL_LOW</name>
31928                        <bitRange>[0:0]</bitRange>
31929                        <access>read-only</access>
31930                    </field>
31931                </fields>
31932            </register>
31933            <register>
31934                <name>DORMANT_WAKE_INTS1</name>
31935                <addressOffset>0x0000030c</addressOffset>
31936                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
31937                <resetValue>0x00000000</resetValue>
31938                <fields>
31939                    <field>
31940                        <name>GPIO15_EDGE_HIGH</name>
31941                        <bitRange>[31:31]</bitRange>
31942                        <access>read-only</access>
31943                    </field>
31944                    <field>
31945                        <name>GPIO15_EDGE_LOW</name>
31946                        <bitRange>[30:30]</bitRange>
31947                        <access>read-only</access>
31948                    </field>
31949                    <field>
31950                        <name>GPIO15_LEVEL_HIGH</name>
31951                        <bitRange>[29:29]</bitRange>
31952                        <access>read-only</access>
31953                    </field>
31954                    <field>
31955                        <name>GPIO15_LEVEL_LOW</name>
31956                        <bitRange>[28:28]</bitRange>
31957                        <access>read-only</access>
31958                    </field>
31959                    <field>
31960                        <name>GPIO14_EDGE_HIGH</name>
31961                        <bitRange>[27:27]</bitRange>
31962                        <access>read-only</access>
31963                    </field>
31964                    <field>
31965                        <name>GPIO14_EDGE_LOW</name>
31966                        <bitRange>[26:26]</bitRange>
31967                        <access>read-only</access>
31968                    </field>
31969                    <field>
31970                        <name>GPIO14_LEVEL_HIGH</name>
31971                        <bitRange>[25:25]</bitRange>
31972                        <access>read-only</access>
31973                    </field>
31974                    <field>
31975                        <name>GPIO14_LEVEL_LOW</name>
31976                        <bitRange>[24:24]</bitRange>
31977                        <access>read-only</access>
31978                    </field>
31979                    <field>
31980                        <name>GPIO13_EDGE_HIGH</name>
31981                        <bitRange>[23:23]</bitRange>
31982                        <access>read-only</access>
31983                    </field>
31984                    <field>
31985                        <name>GPIO13_EDGE_LOW</name>
31986                        <bitRange>[22:22]</bitRange>
31987                        <access>read-only</access>
31988                    </field>
31989                    <field>
31990                        <name>GPIO13_LEVEL_HIGH</name>
31991                        <bitRange>[21:21]</bitRange>
31992                        <access>read-only</access>
31993                    </field>
31994                    <field>
31995                        <name>GPIO13_LEVEL_LOW</name>
31996                        <bitRange>[20:20]</bitRange>
31997                        <access>read-only</access>
31998                    </field>
31999                    <field>
32000                        <name>GPIO12_EDGE_HIGH</name>
32001                        <bitRange>[19:19]</bitRange>
32002                        <access>read-only</access>
32003                    </field>
32004                    <field>
32005                        <name>GPIO12_EDGE_LOW</name>
32006                        <bitRange>[18:18]</bitRange>
32007                        <access>read-only</access>
32008                    </field>
32009                    <field>
32010                        <name>GPIO12_LEVEL_HIGH</name>
32011                        <bitRange>[17:17]</bitRange>
32012                        <access>read-only</access>
32013                    </field>
32014                    <field>
32015                        <name>GPIO12_LEVEL_LOW</name>
32016                        <bitRange>[16:16]</bitRange>
32017                        <access>read-only</access>
32018                    </field>
32019                    <field>
32020                        <name>GPIO11_EDGE_HIGH</name>
32021                        <bitRange>[15:15]</bitRange>
32022                        <access>read-only</access>
32023                    </field>
32024                    <field>
32025                        <name>GPIO11_EDGE_LOW</name>
32026                        <bitRange>[14:14]</bitRange>
32027                        <access>read-only</access>
32028                    </field>
32029                    <field>
32030                        <name>GPIO11_LEVEL_HIGH</name>
32031                        <bitRange>[13:13]</bitRange>
32032                        <access>read-only</access>
32033                    </field>
32034                    <field>
32035                        <name>GPIO11_LEVEL_LOW</name>
32036                        <bitRange>[12:12]</bitRange>
32037                        <access>read-only</access>
32038                    </field>
32039                    <field>
32040                        <name>GPIO10_EDGE_HIGH</name>
32041                        <bitRange>[11:11]</bitRange>
32042                        <access>read-only</access>
32043                    </field>
32044                    <field>
32045                        <name>GPIO10_EDGE_LOW</name>
32046                        <bitRange>[10:10]</bitRange>
32047                        <access>read-only</access>
32048                    </field>
32049                    <field>
32050                        <name>GPIO10_LEVEL_HIGH</name>
32051                        <bitRange>[9:9]</bitRange>
32052                        <access>read-only</access>
32053                    </field>
32054                    <field>
32055                        <name>GPIO10_LEVEL_LOW</name>
32056                        <bitRange>[8:8]</bitRange>
32057                        <access>read-only</access>
32058                    </field>
32059                    <field>
32060                        <name>GPIO9_EDGE_HIGH</name>
32061                        <bitRange>[7:7]</bitRange>
32062                        <access>read-only</access>
32063                    </field>
32064                    <field>
32065                        <name>GPIO9_EDGE_LOW</name>
32066                        <bitRange>[6:6]</bitRange>
32067                        <access>read-only</access>
32068                    </field>
32069                    <field>
32070                        <name>GPIO9_LEVEL_HIGH</name>
32071                        <bitRange>[5:5]</bitRange>
32072                        <access>read-only</access>
32073                    </field>
32074                    <field>
32075                        <name>GPIO9_LEVEL_LOW</name>
32076                        <bitRange>[4:4]</bitRange>
32077                        <access>read-only</access>
32078                    </field>
32079                    <field>
32080                        <name>GPIO8_EDGE_HIGH</name>
32081                        <bitRange>[3:3]</bitRange>
32082                        <access>read-only</access>
32083                    </field>
32084                    <field>
32085                        <name>GPIO8_EDGE_LOW</name>
32086                        <bitRange>[2:2]</bitRange>
32087                        <access>read-only</access>
32088                    </field>
32089                    <field>
32090                        <name>GPIO8_LEVEL_HIGH</name>
32091                        <bitRange>[1:1]</bitRange>
32092                        <access>read-only</access>
32093                    </field>
32094                    <field>
32095                        <name>GPIO8_LEVEL_LOW</name>
32096                        <bitRange>[0:0]</bitRange>
32097                        <access>read-only</access>
32098                    </field>
32099                </fields>
32100            </register>
32101            <register>
32102                <name>DORMANT_WAKE_INTS2</name>
32103                <addressOffset>0x00000310</addressOffset>
32104                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
32105                <resetValue>0x00000000</resetValue>
32106                <fields>
32107                    <field>
32108                        <name>GPIO23_EDGE_HIGH</name>
32109                        <bitRange>[31:31]</bitRange>
32110                        <access>read-only</access>
32111                    </field>
32112                    <field>
32113                        <name>GPIO23_EDGE_LOW</name>
32114                        <bitRange>[30:30]</bitRange>
32115                        <access>read-only</access>
32116                    </field>
32117                    <field>
32118                        <name>GPIO23_LEVEL_HIGH</name>
32119                        <bitRange>[29:29]</bitRange>
32120                        <access>read-only</access>
32121                    </field>
32122                    <field>
32123                        <name>GPIO23_LEVEL_LOW</name>
32124                        <bitRange>[28:28]</bitRange>
32125                        <access>read-only</access>
32126                    </field>
32127                    <field>
32128                        <name>GPIO22_EDGE_HIGH</name>
32129                        <bitRange>[27:27]</bitRange>
32130                        <access>read-only</access>
32131                    </field>
32132                    <field>
32133                        <name>GPIO22_EDGE_LOW</name>
32134                        <bitRange>[26:26]</bitRange>
32135                        <access>read-only</access>
32136                    </field>
32137                    <field>
32138                        <name>GPIO22_LEVEL_HIGH</name>
32139                        <bitRange>[25:25]</bitRange>
32140                        <access>read-only</access>
32141                    </field>
32142                    <field>
32143                        <name>GPIO22_LEVEL_LOW</name>
32144                        <bitRange>[24:24]</bitRange>
32145                        <access>read-only</access>
32146                    </field>
32147                    <field>
32148                        <name>GPIO21_EDGE_HIGH</name>
32149                        <bitRange>[23:23]</bitRange>
32150                        <access>read-only</access>
32151                    </field>
32152                    <field>
32153                        <name>GPIO21_EDGE_LOW</name>
32154                        <bitRange>[22:22]</bitRange>
32155                        <access>read-only</access>
32156                    </field>
32157                    <field>
32158                        <name>GPIO21_LEVEL_HIGH</name>
32159                        <bitRange>[21:21]</bitRange>
32160                        <access>read-only</access>
32161                    </field>
32162                    <field>
32163                        <name>GPIO21_LEVEL_LOW</name>
32164                        <bitRange>[20:20]</bitRange>
32165                        <access>read-only</access>
32166                    </field>
32167                    <field>
32168                        <name>GPIO20_EDGE_HIGH</name>
32169                        <bitRange>[19:19]</bitRange>
32170                        <access>read-only</access>
32171                    </field>
32172                    <field>
32173                        <name>GPIO20_EDGE_LOW</name>
32174                        <bitRange>[18:18]</bitRange>
32175                        <access>read-only</access>
32176                    </field>
32177                    <field>
32178                        <name>GPIO20_LEVEL_HIGH</name>
32179                        <bitRange>[17:17]</bitRange>
32180                        <access>read-only</access>
32181                    </field>
32182                    <field>
32183                        <name>GPIO20_LEVEL_LOW</name>
32184                        <bitRange>[16:16]</bitRange>
32185                        <access>read-only</access>
32186                    </field>
32187                    <field>
32188                        <name>GPIO19_EDGE_HIGH</name>
32189                        <bitRange>[15:15]</bitRange>
32190                        <access>read-only</access>
32191                    </field>
32192                    <field>
32193                        <name>GPIO19_EDGE_LOW</name>
32194                        <bitRange>[14:14]</bitRange>
32195                        <access>read-only</access>
32196                    </field>
32197                    <field>
32198                        <name>GPIO19_LEVEL_HIGH</name>
32199                        <bitRange>[13:13]</bitRange>
32200                        <access>read-only</access>
32201                    </field>
32202                    <field>
32203                        <name>GPIO19_LEVEL_LOW</name>
32204                        <bitRange>[12:12]</bitRange>
32205                        <access>read-only</access>
32206                    </field>
32207                    <field>
32208                        <name>GPIO18_EDGE_HIGH</name>
32209                        <bitRange>[11:11]</bitRange>
32210                        <access>read-only</access>
32211                    </field>
32212                    <field>
32213                        <name>GPIO18_EDGE_LOW</name>
32214                        <bitRange>[10:10]</bitRange>
32215                        <access>read-only</access>
32216                    </field>
32217                    <field>
32218                        <name>GPIO18_LEVEL_HIGH</name>
32219                        <bitRange>[9:9]</bitRange>
32220                        <access>read-only</access>
32221                    </field>
32222                    <field>
32223                        <name>GPIO18_LEVEL_LOW</name>
32224                        <bitRange>[8:8]</bitRange>
32225                        <access>read-only</access>
32226                    </field>
32227                    <field>
32228                        <name>GPIO17_EDGE_HIGH</name>
32229                        <bitRange>[7:7]</bitRange>
32230                        <access>read-only</access>
32231                    </field>
32232                    <field>
32233                        <name>GPIO17_EDGE_LOW</name>
32234                        <bitRange>[6:6]</bitRange>
32235                        <access>read-only</access>
32236                    </field>
32237                    <field>
32238                        <name>GPIO17_LEVEL_HIGH</name>
32239                        <bitRange>[5:5]</bitRange>
32240                        <access>read-only</access>
32241                    </field>
32242                    <field>
32243                        <name>GPIO17_LEVEL_LOW</name>
32244                        <bitRange>[4:4]</bitRange>
32245                        <access>read-only</access>
32246                    </field>
32247                    <field>
32248                        <name>GPIO16_EDGE_HIGH</name>
32249                        <bitRange>[3:3]</bitRange>
32250                        <access>read-only</access>
32251                    </field>
32252                    <field>
32253                        <name>GPIO16_EDGE_LOW</name>
32254                        <bitRange>[2:2]</bitRange>
32255                        <access>read-only</access>
32256                    </field>
32257                    <field>
32258                        <name>GPIO16_LEVEL_HIGH</name>
32259                        <bitRange>[1:1]</bitRange>
32260                        <access>read-only</access>
32261                    </field>
32262                    <field>
32263                        <name>GPIO16_LEVEL_LOW</name>
32264                        <bitRange>[0:0]</bitRange>
32265                        <access>read-only</access>
32266                    </field>
32267                </fields>
32268            </register>
32269            <register>
32270                <name>DORMANT_WAKE_INTS3</name>
32271                <addressOffset>0x00000314</addressOffset>
32272                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
32273                <resetValue>0x00000000</resetValue>
32274                <fields>
32275                    <field>
32276                        <name>GPIO31_EDGE_HIGH</name>
32277                        <bitRange>[31:31]</bitRange>
32278                        <access>read-only</access>
32279                    </field>
32280                    <field>
32281                        <name>GPIO31_EDGE_LOW</name>
32282                        <bitRange>[30:30]</bitRange>
32283                        <access>read-only</access>
32284                    </field>
32285                    <field>
32286                        <name>GPIO31_LEVEL_HIGH</name>
32287                        <bitRange>[29:29]</bitRange>
32288                        <access>read-only</access>
32289                    </field>
32290                    <field>
32291                        <name>GPIO31_LEVEL_LOW</name>
32292                        <bitRange>[28:28]</bitRange>
32293                        <access>read-only</access>
32294                    </field>
32295                    <field>
32296                        <name>GPIO30_EDGE_HIGH</name>
32297                        <bitRange>[27:27]</bitRange>
32298                        <access>read-only</access>
32299                    </field>
32300                    <field>
32301                        <name>GPIO30_EDGE_LOW</name>
32302                        <bitRange>[26:26]</bitRange>
32303                        <access>read-only</access>
32304                    </field>
32305                    <field>
32306                        <name>GPIO30_LEVEL_HIGH</name>
32307                        <bitRange>[25:25]</bitRange>
32308                        <access>read-only</access>
32309                    </field>
32310                    <field>
32311                        <name>GPIO30_LEVEL_LOW</name>
32312                        <bitRange>[24:24]</bitRange>
32313                        <access>read-only</access>
32314                    </field>
32315                    <field>
32316                        <name>GPIO29_EDGE_HIGH</name>
32317                        <bitRange>[23:23]</bitRange>
32318                        <access>read-only</access>
32319                    </field>
32320                    <field>
32321                        <name>GPIO29_EDGE_LOW</name>
32322                        <bitRange>[22:22]</bitRange>
32323                        <access>read-only</access>
32324                    </field>
32325                    <field>
32326                        <name>GPIO29_LEVEL_HIGH</name>
32327                        <bitRange>[21:21]</bitRange>
32328                        <access>read-only</access>
32329                    </field>
32330                    <field>
32331                        <name>GPIO29_LEVEL_LOW</name>
32332                        <bitRange>[20:20]</bitRange>
32333                        <access>read-only</access>
32334                    </field>
32335                    <field>
32336                        <name>GPIO28_EDGE_HIGH</name>
32337                        <bitRange>[19:19]</bitRange>
32338                        <access>read-only</access>
32339                    </field>
32340                    <field>
32341                        <name>GPIO28_EDGE_LOW</name>
32342                        <bitRange>[18:18]</bitRange>
32343                        <access>read-only</access>
32344                    </field>
32345                    <field>
32346                        <name>GPIO28_LEVEL_HIGH</name>
32347                        <bitRange>[17:17]</bitRange>
32348                        <access>read-only</access>
32349                    </field>
32350                    <field>
32351                        <name>GPIO28_LEVEL_LOW</name>
32352                        <bitRange>[16:16]</bitRange>
32353                        <access>read-only</access>
32354                    </field>
32355                    <field>
32356                        <name>GPIO27_EDGE_HIGH</name>
32357                        <bitRange>[15:15]</bitRange>
32358                        <access>read-only</access>
32359                    </field>
32360                    <field>
32361                        <name>GPIO27_EDGE_LOW</name>
32362                        <bitRange>[14:14]</bitRange>
32363                        <access>read-only</access>
32364                    </field>
32365                    <field>
32366                        <name>GPIO27_LEVEL_HIGH</name>
32367                        <bitRange>[13:13]</bitRange>
32368                        <access>read-only</access>
32369                    </field>
32370                    <field>
32371                        <name>GPIO27_LEVEL_LOW</name>
32372                        <bitRange>[12:12]</bitRange>
32373                        <access>read-only</access>
32374                    </field>
32375                    <field>
32376                        <name>GPIO26_EDGE_HIGH</name>
32377                        <bitRange>[11:11]</bitRange>
32378                        <access>read-only</access>
32379                    </field>
32380                    <field>
32381                        <name>GPIO26_EDGE_LOW</name>
32382                        <bitRange>[10:10]</bitRange>
32383                        <access>read-only</access>
32384                    </field>
32385                    <field>
32386                        <name>GPIO26_LEVEL_HIGH</name>
32387                        <bitRange>[9:9]</bitRange>
32388                        <access>read-only</access>
32389                    </field>
32390                    <field>
32391                        <name>GPIO26_LEVEL_LOW</name>
32392                        <bitRange>[8:8]</bitRange>
32393                        <access>read-only</access>
32394                    </field>
32395                    <field>
32396                        <name>GPIO25_EDGE_HIGH</name>
32397                        <bitRange>[7:7]</bitRange>
32398                        <access>read-only</access>
32399                    </field>
32400                    <field>
32401                        <name>GPIO25_EDGE_LOW</name>
32402                        <bitRange>[6:6]</bitRange>
32403                        <access>read-only</access>
32404                    </field>
32405                    <field>
32406                        <name>GPIO25_LEVEL_HIGH</name>
32407                        <bitRange>[5:5]</bitRange>
32408                        <access>read-only</access>
32409                    </field>
32410                    <field>
32411                        <name>GPIO25_LEVEL_LOW</name>
32412                        <bitRange>[4:4]</bitRange>
32413                        <access>read-only</access>
32414                    </field>
32415                    <field>
32416                        <name>GPIO24_EDGE_HIGH</name>
32417                        <bitRange>[3:3]</bitRange>
32418                        <access>read-only</access>
32419                    </field>
32420                    <field>
32421                        <name>GPIO24_EDGE_LOW</name>
32422                        <bitRange>[2:2]</bitRange>
32423                        <access>read-only</access>
32424                    </field>
32425                    <field>
32426                        <name>GPIO24_LEVEL_HIGH</name>
32427                        <bitRange>[1:1]</bitRange>
32428                        <access>read-only</access>
32429                    </field>
32430                    <field>
32431                        <name>GPIO24_LEVEL_LOW</name>
32432                        <bitRange>[0:0]</bitRange>
32433                        <access>read-only</access>
32434                    </field>
32435                </fields>
32436            </register>
32437            <register>
32438                <name>DORMANT_WAKE_INTS4</name>
32439                <addressOffset>0x00000318</addressOffset>
32440                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
32441                <resetValue>0x00000000</resetValue>
32442                <fields>
32443                    <field>
32444                        <name>GPIO39_EDGE_HIGH</name>
32445                        <bitRange>[31:31]</bitRange>
32446                        <access>read-only</access>
32447                    </field>
32448                    <field>
32449                        <name>GPIO39_EDGE_LOW</name>
32450                        <bitRange>[30:30]</bitRange>
32451                        <access>read-only</access>
32452                    </field>
32453                    <field>
32454                        <name>GPIO39_LEVEL_HIGH</name>
32455                        <bitRange>[29:29]</bitRange>
32456                        <access>read-only</access>
32457                    </field>
32458                    <field>
32459                        <name>GPIO39_LEVEL_LOW</name>
32460                        <bitRange>[28:28]</bitRange>
32461                        <access>read-only</access>
32462                    </field>
32463                    <field>
32464                        <name>GPIO38_EDGE_HIGH</name>
32465                        <bitRange>[27:27]</bitRange>
32466                        <access>read-only</access>
32467                    </field>
32468                    <field>
32469                        <name>GPIO38_EDGE_LOW</name>
32470                        <bitRange>[26:26]</bitRange>
32471                        <access>read-only</access>
32472                    </field>
32473                    <field>
32474                        <name>GPIO38_LEVEL_HIGH</name>
32475                        <bitRange>[25:25]</bitRange>
32476                        <access>read-only</access>
32477                    </field>
32478                    <field>
32479                        <name>GPIO38_LEVEL_LOW</name>
32480                        <bitRange>[24:24]</bitRange>
32481                        <access>read-only</access>
32482                    </field>
32483                    <field>
32484                        <name>GPIO37_EDGE_HIGH</name>
32485                        <bitRange>[23:23]</bitRange>
32486                        <access>read-only</access>
32487                    </field>
32488                    <field>
32489                        <name>GPIO37_EDGE_LOW</name>
32490                        <bitRange>[22:22]</bitRange>
32491                        <access>read-only</access>
32492                    </field>
32493                    <field>
32494                        <name>GPIO37_LEVEL_HIGH</name>
32495                        <bitRange>[21:21]</bitRange>
32496                        <access>read-only</access>
32497                    </field>
32498                    <field>
32499                        <name>GPIO37_LEVEL_LOW</name>
32500                        <bitRange>[20:20]</bitRange>
32501                        <access>read-only</access>
32502                    </field>
32503                    <field>
32504                        <name>GPIO36_EDGE_HIGH</name>
32505                        <bitRange>[19:19]</bitRange>
32506                        <access>read-only</access>
32507                    </field>
32508                    <field>
32509                        <name>GPIO36_EDGE_LOW</name>
32510                        <bitRange>[18:18]</bitRange>
32511                        <access>read-only</access>
32512                    </field>
32513                    <field>
32514                        <name>GPIO36_LEVEL_HIGH</name>
32515                        <bitRange>[17:17]</bitRange>
32516                        <access>read-only</access>
32517                    </field>
32518                    <field>
32519                        <name>GPIO36_LEVEL_LOW</name>
32520                        <bitRange>[16:16]</bitRange>
32521                        <access>read-only</access>
32522                    </field>
32523                    <field>
32524                        <name>GPIO35_EDGE_HIGH</name>
32525                        <bitRange>[15:15]</bitRange>
32526                        <access>read-only</access>
32527                    </field>
32528                    <field>
32529                        <name>GPIO35_EDGE_LOW</name>
32530                        <bitRange>[14:14]</bitRange>
32531                        <access>read-only</access>
32532                    </field>
32533                    <field>
32534                        <name>GPIO35_LEVEL_HIGH</name>
32535                        <bitRange>[13:13]</bitRange>
32536                        <access>read-only</access>
32537                    </field>
32538                    <field>
32539                        <name>GPIO35_LEVEL_LOW</name>
32540                        <bitRange>[12:12]</bitRange>
32541                        <access>read-only</access>
32542                    </field>
32543                    <field>
32544                        <name>GPIO34_EDGE_HIGH</name>
32545                        <bitRange>[11:11]</bitRange>
32546                        <access>read-only</access>
32547                    </field>
32548                    <field>
32549                        <name>GPIO34_EDGE_LOW</name>
32550                        <bitRange>[10:10]</bitRange>
32551                        <access>read-only</access>
32552                    </field>
32553                    <field>
32554                        <name>GPIO34_LEVEL_HIGH</name>
32555                        <bitRange>[9:9]</bitRange>
32556                        <access>read-only</access>
32557                    </field>
32558                    <field>
32559                        <name>GPIO34_LEVEL_LOW</name>
32560                        <bitRange>[8:8]</bitRange>
32561                        <access>read-only</access>
32562                    </field>
32563                    <field>
32564                        <name>GPIO33_EDGE_HIGH</name>
32565                        <bitRange>[7:7]</bitRange>
32566                        <access>read-only</access>
32567                    </field>
32568                    <field>
32569                        <name>GPIO33_EDGE_LOW</name>
32570                        <bitRange>[6:6]</bitRange>
32571                        <access>read-only</access>
32572                    </field>
32573                    <field>
32574                        <name>GPIO33_LEVEL_HIGH</name>
32575                        <bitRange>[5:5]</bitRange>
32576                        <access>read-only</access>
32577                    </field>
32578                    <field>
32579                        <name>GPIO33_LEVEL_LOW</name>
32580                        <bitRange>[4:4]</bitRange>
32581                        <access>read-only</access>
32582                    </field>
32583                    <field>
32584                        <name>GPIO32_EDGE_HIGH</name>
32585                        <bitRange>[3:3]</bitRange>
32586                        <access>read-only</access>
32587                    </field>
32588                    <field>
32589                        <name>GPIO32_EDGE_LOW</name>
32590                        <bitRange>[2:2]</bitRange>
32591                        <access>read-only</access>
32592                    </field>
32593                    <field>
32594                        <name>GPIO32_LEVEL_HIGH</name>
32595                        <bitRange>[1:1]</bitRange>
32596                        <access>read-only</access>
32597                    </field>
32598                    <field>
32599                        <name>GPIO32_LEVEL_LOW</name>
32600                        <bitRange>[0:0]</bitRange>
32601                        <access>read-only</access>
32602                    </field>
32603                </fields>
32604            </register>
32605            <register>
32606                <name>DORMANT_WAKE_INTS5</name>
32607                <addressOffset>0x0000031c</addressOffset>
32608                <description>Interrupt status after masking &amp; forcing for dormant_wake</description>
32609                <resetValue>0x00000000</resetValue>
32610                <fields>
32611                    <field>
32612                        <name>GPIO47_EDGE_HIGH</name>
32613                        <bitRange>[31:31]</bitRange>
32614                        <access>read-only</access>
32615                    </field>
32616                    <field>
32617                        <name>GPIO47_EDGE_LOW</name>
32618                        <bitRange>[30:30]</bitRange>
32619                        <access>read-only</access>
32620                    </field>
32621                    <field>
32622                        <name>GPIO47_LEVEL_HIGH</name>
32623                        <bitRange>[29:29]</bitRange>
32624                        <access>read-only</access>
32625                    </field>
32626                    <field>
32627                        <name>GPIO47_LEVEL_LOW</name>
32628                        <bitRange>[28:28]</bitRange>
32629                        <access>read-only</access>
32630                    </field>
32631                    <field>
32632                        <name>GPIO46_EDGE_HIGH</name>
32633                        <bitRange>[27:27]</bitRange>
32634                        <access>read-only</access>
32635                    </field>
32636                    <field>
32637                        <name>GPIO46_EDGE_LOW</name>
32638                        <bitRange>[26:26]</bitRange>
32639                        <access>read-only</access>
32640                    </field>
32641                    <field>
32642                        <name>GPIO46_LEVEL_HIGH</name>
32643                        <bitRange>[25:25]</bitRange>
32644                        <access>read-only</access>
32645                    </field>
32646                    <field>
32647                        <name>GPIO46_LEVEL_LOW</name>
32648                        <bitRange>[24:24]</bitRange>
32649                        <access>read-only</access>
32650                    </field>
32651                    <field>
32652                        <name>GPIO45_EDGE_HIGH</name>
32653                        <bitRange>[23:23]</bitRange>
32654                        <access>read-only</access>
32655                    </field>
32656                    <field>
32657                        <name>GPIO45_EDGE_LOW</name>
32658                        <bitRange>[22:22]</bitRange>
32659                        <access>read-only</access>
32660                    </field>
32661                    <field>
32662                        <name>GPIO45_LEVEL_HIGH</name>
32663                        <bitRange>[21:21]</bitRange>
32664                        <access>read-only</access>
32665                    </field>
32666                    <field>
32667                        <name>GPIO45_LEVEL_LOW</name>
32668                        <bitRange>[20:20]</bitRange>
32669                        <access>read-only</access>
32670                    </field>
32671                    <field>
32672                        <name>GPIO44_EDGE_HIGH</name>
32673                        <bitRange>[19:19]</bitRange>
32674                        <access>read-only</access>
32675                    </field>
32676                    <field>
32677                        <name>GPIO44_EDGE_LOW</name>
32678                        <bitRange>[18:18]</bitRange>
32679                        <access>read-only</access>
32680                    </field>
32681                    <field>
32682                        <name>GPIO44_LEVEL_HIGH</name>
32683                        <bitRange>[17:17]</bitRange>
32684                        <access>read-only</access>
32685                    </field>
32686                    <field>
32687                        <name>GPIO44_LEVEL_LOW</name>
32688                        <bitRange>[16:16]</bitRange>
32689                        <access>read-only</access>
32690                    </field>
32691                    <field>
32692                        <name>GPIO43_EDGE_HIGH</name>
32693                        <bitRange>[15:15]</bitRange>
32694                        <access>read-only</access>
32695                    </field>
32696                    <field>
32697                        <name>GPIO43_EDGE_LOW</name>
32698                        <bitRange>[14:14]</bitRange>
32699                        <access>read-only</access>
32700                    </field>
32701                    <field>
32702                        <name>GPIO43_LEVEL_HIGH</name>
32703                        <bitRange>[13:13]</bitRange>
32704                        <access>read-only</access>
32705                    </field>
32706                    <field>
32707                        <name>GPIO43_LEVEL_LOW</name>
32708                        <bitRange>[12:12]</bitRange>
32709                        <access>read-only</access>
32710                    </field>
32711                    <field>
32712                        <name>GPIO42_EDGE_HIGH</name>
32713                        <bitRange>[11:11]</bitRange>
32714                        <access>read-only</access>
32715                    </field>
32716                    <field>
32717                        <name>GPIO42_EDGE_LOW</name>
32718                        <bitRange>[10:10]</bitRange>
32719                        <access>read-only</access>
32720                    </field>
32721                    <field>
32722                        <name>GPIO42_LEVEL_HIGH</name>
32723                        <bitRange>[9:9]</bitRange>
32724                        <access>read-only</access>
32725                    </field>
32726                    <field>
32727                        <name>GPIO42_LEVEL_LOW</name>
32728                        <bitRange>[8:8]</bitRange>
32729                        <access>read-only</access>
32730                    </field>
32731                    <field>
32732                        <name>GPIO41_EDGE_HIGH</name>
32733                        <bitRange>[7:7]</bitRange>
32734                        <access>read-only</access>
32735                    </field>
32736                    <field>
32737                        <name>GPIO41_EDGE_LOW</name>
32738                        <bitRange>[6:6]</bitRange>
32739                        <access>read-only</access>
32740                    </field>
32741                    <field>
32742                        <name>GPIO41_LEVEL_HIGH</name>
32743                        <bitRange>[5:5]</bitRange>
32744                        <access>read-only</access>
32745                    </field>
32746                    <field>
32747                        <name>GPIO41_LEVEL_LOW</name>
32748                        <bitRange>[4:4]</bitRange>
32749                        <access>read-only</access>
32750                    </field>
32751                    <field>
32752                        <name>GPIO40_EDGE_HIGH</name>
32753                        <bitRange>[3:3]</bitRange>
32754                        <access>read-only</access>
32755                    </field>
32756                    <field>
32757                        <name>GPIO40_EDGE_LOW</name>
32758                        <bitRange>[2:2]</bitRange>
32759                        <access>read-only</access>
32760                    </field>
32761                    <field>
32762                        <name>GPIO40_LEVEL_HIGH</name>
32763                        <bitRange>[1:1]</bitRange>
32764                        <access>read-only</access>
32765                    </field>
32766                    <field>
32767                        <name>GPIO40_LEVEL_LOW</name>
32768                        <bitRange>[0:0]</bitRange>
32769                        <access>read-only</access>
32770                    </field>
32771                </fields>
32772            </register>
32773        </registers>
32774    </peripheral>
32775    <peripheral>
32776        <name>SYSINFO</name>
32777        <baseAddress>0x40000000</baseAddress>
32778        <addressBlock>
32779            <offset>0</offset>
32780            <size>24</size>
32781            <usage>registers</usage>
32782        </addressBlock>
32783        <registers>
32784            <register>
32785                <name>CHIP_ID</name>
32786                <addressOffset>0x00000000</addressOffset>
32787                <description>JEDEC JEP-106 compliant chip identifier.</description>
32788                <resetValue>0x00000001</resetValue>
32789                <fields>
32790                    <field>
32791                        <name>REVISION</name>
32792                        <bitRange>[31:28]</bitRange>
32793                        <access>read-only</access>
32794                    </field>
32795                    <field>
32796                        <name>PART</name>
32797                        <bitRange>[27:12]</bitRange>
32798                        <access>read-only</access>
32799                    </field>
32800                    <field>
32801                        <name>MANUFACTURER</name>
32802                        <bitRange>[11:1]</bitRange>
32803                        <access>read-only</access>
32804                    </field>
32805                    <field>
32806                        <name>STOP_BIT</name>
32807                        <bitRange>[0:0]</bitRange>
32808                        <access>read-only</access>
32809                    </field>
32810                </fields>
32811            </register>
32812            <register>
32813                <name>PACKAGE_SEL</name>
32814                <addressOffset>0x00000004</addressOffset>
32815                <resetValue>0x00000000</resetValue>
32816                <fields>
32817                    <field>
32818                        <name>PACKAGE_SEL</name>
32819                        <bitRange>[0:0]</bitRange>
32820                        <access>read-only</access>
32821                    </field>
32822                </fields>
32823            </register>
32824            <register>
32825                <name>PLATFORM</name>
32826                <addressOffset>0x00000008</addressOffset>
32827                <description>Platform register. Allows software to know what environment it is running in during pre-production development. Post-production, the PLATFORM is always ASIC, non-SIM.</description>
32828                <resetValue>0x00000000</resetValue>
32829                <fields>
32830                    <field>
32831                        <name>GATESIM</name>
32832                        <bitRange>[4:4]</bitRange>
32833                        <access>read-only</access>
32834                    </field>
32835                    <field>
32836                        <name>BATCHSIM</name>
32837                        <bitRange>[3:3]</bitRange>
32838                        <access>read-only</access>
32839                    </field>
32840                    <field>
32841                        <name>HDLSIM</name>
32842                        <bitRange>[2:2]</bitRange>
32843                        <access>read-only</access>
32844                    </field>
32845                    <field>
32846                        <name>ASIC</name>
32847                        <bitRange>[1:1]</bitRange>
32848                        <access>read-only</access>
32849                    </field>
32850                    <field>
32851                        <name>FPGA</name>
32852                        <bitRange>[0:0]</bitRange>
32853                        <access>read-only</access>
32854                    </field>
32855                </fields>
32856            </register>
32857            <register>
32858                <name>GITREF_RP2350</name>
32859                <addressOffset>0x00000014</addressOffset>
32860                <description>Git hash of the chip source. Used to identify chip version.</description>
32861                <resetMask>0x00000000</resetMask>
32862                <fields>
32863                    <field>
32864                        <name>GITREF_RP2350</name>
32865                        <bitRange>[31:0]</bitRange>
32866                        <access>read-only</access>
32867                    </field>
32868                </fields>
32869            </register>
32870        </registers>
32871    </peripheral>
32872    <peripheral>
32873        <name>SHA256</name>
32874        <description>SHA-256 hash function implementation</description>
32875        <baseAddress>0x400f8000</baseAddress>
32876        <addressBlock>
32877            <offset>0</offset>
32878            <size>40</size>
32879            <usage>registers</usage>
32880        </addressBlock>
32881        <registers>
32882            <register>
32883                <name>CSR</name>
32884                <addressOffset>0x00000000</addressOffset>
32885                <description>Control and status register</description>
32886                <resetValue>0x00001206</resetValue>
32887                <fields>
32888                    <field>
32889                        <name>BSWAP</name>
32890                        <description>Enable byte swapping of 32-bit values at the point they are committed to the SHA message scheduler.
32891
32892                            This block&#39;s bus interface assembles byte/halfword data into message words in little-endian order, so that DMAing the same buffer with different transfer sizes always gives the same result on a little-endian system like RP2350.
32893
32894                            However, when marshalling bytes into blocks, SHA expects that the first byte is the *most significant* in each message word. To resolve this, once the bus interface has accumulated 32 bits of data (either a word write, two halfword writes in little-endian order, or four byte writes in little-endian order) the final value can be byte-swapped before passing to the actual SHA core.
32895
32896                            This feature is enabled by default because using the SHA core to checksum byte buffers is expected to be more common than having preformatted SHA message words lying around.</description>
32897                        <bitRange>[12:12]</bitRange>
32898                        <access>read-write</access>
32899                    </field>
32900                    <field>
32901                        <name>DMA_SIZE</name>
32902                        <description>Configure DREQ logic for the correct DMA data size. Must be configured before the DMA channel is triggered.
32903
32904                            The SHA-256 core&#39;s DREQ logic requests one entire block of data at once, since there is no FIFO, and data goes straight into the core&#39;s message schedule and digest hardware. Therefore, when transferring data with DMA, CSR_DMA_SIZE must be configured in advance so that the correct number of transfers can be requested per block.</description>
32905                        <bitRange>[9:8]</bitRange>
32906                        <access>read-write</access>
32907                        <enumeratedValues>
32908                            <enumeratedValue>
32909                                <name>8bit</name>
32910                                <value>0</value>
32911                            </enumeratedValue>
32912                            <enumeratedValue>
32913                                <name>16bit</name>
32914                                <value>1</value>
32915                            </enumeratedValue>
32916                            <enumeratedValue>
32917                                <name>32bit</name>
32918                                <value>2</value>
32919                            </enumeratedValue>
32920                        </enumeratedValues>
32921                    </field>
32922                    <field>
32923                        <name>ERR_WDATA_NOT_RDY</name>
32924                        <description>Set when a write occurs whilst the SHA-256 core is not ready for data (WDATA_RDY is low). Write one to clear.</description>
32925                        <bitRange>[4:4]</bitRange>
32926                        <access>read-write</access>
32927                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
32928                    </field>
32929                    <field>
32930                        <name>SUM_VLD</name>
32931                        <description>If 1, the SHA-256 checksum presented in registers SUM0 through SUM7 is currently valid.
32932
32933                            Goes low when WDATA is first written, then returns high once 16 words have been written and the digest of the current 512-bit block has subsequently completed.</description>
32934                        <bitRange>[2:2]</bitRange>
32935                        <access>read-only</access>
32936                    </field>
32937                    <field>
32938                        <name>WDATA_RDY</name>
32939                        <description>If 1, the SHA-256 core is ready to accept more data through the WDATA register.
32940
32941                            After writing 16 words, this flag will go low for 57 cycles whilst the core completes its digest.</description>
32942                        <bitRange>[1:1]</bitRange>
32943                        <access>read-only</access>
32944                    </field>
32945                    <field>
32946                        <name>START</name>
32947                        <description>Write 1 to prepare the SHA-256 core for a new checksum.
32948
32949                            The SUMx registers are initialised to the proper values (fractional bits of square roots of first 8 primes) and internal counters are cleared. This immediately forces WDATA_RDY and SUM_VLD high.
32950
32951                            START must be written before initiating a DMA transfer to the SHA-256 core, because the core will always request 16 transfers at a time (1 512-bit block). Additionally, the DMA channel should be configured for a multiple of 16 32-bit transfers.</description>
32952                        <bitRange>[0:0]</bitRange>
32953                        <access>write-only</access>
32954                    </field>
32955                </fields>
32956            </register>
32957            <register>
32958                <name>WDATA</name>
32959                <addressOffset>0x00000004</addressOffset>
32960                <description>Write data register</description>
32961                <resetValue>0x00000000</resetValue>
32962                <fields>
32963                    <field>
32964                        <name>WDATA</name>
32965                        <description>After pulsing START and writing 16 words of data to this register, WDATA_RDY will go low and the SHA-256 core will complete the digest of the current 512-bit block.
32966
32967                            Software is responsible for ensuring the data is correctly padded and terminated to a whole number of 512-bit blocks.
32968
32969                            After this, WDATA_RDY will return high, and more data can be written (if any).
32970
32971                            This register supports word, halfword and byte writes, so that DMA from non-word-aligned buffers can be supported. The total amount of data per block remains the same (16 words, 32 halfwords or 64 bytes) and byte/halfword transfers must not be mixed within a block.</description>
32972                        <bitRange>[31:0]</bitRange>
32973                        <access>write-only</access>
32974                    </field>
32975                </fields>
32976            </register>
32977            <register>
32978                <name>SUM0</name>
32979                <addressOffset>0x00000008</addressOffset>
32980                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
32981                <resetValue>0x00000000</resetValue>
32982                <fields>
32983                    <field>
32984                        <name>SUM0</name>
32985                        <bitRange>[31:0]</bitRange>
32986                        <access>read-only</access>
32987                    </field>
32988                </fields>
32989            </register>
32990            <register>
32991                <name>SUM1</name>
32992                <addressOffset>0x0000000c</addressOffset>
32993                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
32994                <resetValue>0x00000000</resetValue>
32995                <fields>
32996                    <field>
32997                        <name>SUM1</name>
32998                        <bitRange>[31:0]</bitRange>
32999                        <access>read-only</access>
33000                    </field>
33001                </fields>
33002            </register>
33003            <register>
33004                <name>SUM2</name>
33005                <addressOffset>0x00000010</addressOffset>
33006                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33007                <resetValue>0x00000000</resetValue>
33008                <fields>
33009                    <field>
33010                        <name>SUM2</name>
33011                        <bitRange>[31:0]</bitRange>
33012                        <access>read-only</access>
33013                    </field>
33014                </fields>
33015            </register>
33016            <register>
33017                <name>SUM3</name>
33018                <addressOffset>0x00000014</addressOffset>
33019                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33020                <resetValue>0x00000000</resetValue>
33021                <fields>
33022                    <field>
33023                        <name>SUM3</name>
33024                        <bitRange>[31:0]</bitRange>
33025                        <access>read-only</access>
33026                    </field>
33027                </fields>
33028            </register>
33029            <register>
33030                <name>SUM4</name>
33031                <addressOffset>0x00000018</addressOffset>
33032                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33033                <resetValue>0x00000000</resetValue>
33034                <fields>
33035                    <field>
33036                        <name>SUM4</name>
33037                        <bitRange>[31:0]</bitRange>
33038                        <access>read-only</access>
33039                    </field>
33040                </fields>
33041            </register>
33042            <register>
33043                <name>SUM5</name>
33044                <addressOffset>0x0000001c</addressOffset>
33045                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33046                <resetValue>0x00000000</resetValue>
33047                <fields>
33048                    <field>
33049                        <name>SUM5</name>
33050                        <bitRange>[31:0]</bitRange>
33051                        <access>read-only</access>
33052                    </field>
33053                </fields>
33054            </register>
33055            <register>
33056                <name>SUM6</name>
33057                <addressOffset>0x00000020</addressOffset>
33058                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33059                <resetValue>0x00000000</resetValue>
33060                <fields>
33061                    <field>
33062                        <name>SUM6</name>
33063                        <bitRange>[31:0]</bitRange>
33064                        <access>read-only</access>
33065                    </field>
33066                </fields>
33067            </register>
33068            <register>
33069                <name>SUM7</name>
33070                <addressOffset>0x00000024</addressOffset>
33071                <description>256-bit checksum result. Contents are undefined when CSR_SUM_VLD is 0.</description>
33072                <resetValue>0x00000000</resetValue>
33073                <fields>
33074                    <field>
33075                        <name>SUM7</name>
33076                        <bitRange>[31:0]</bitRange>
33077                        <access>read-only</access>
33078                    </field>
33079                </fields>
33080            </register>
33081        </registers>
33082    </peripheral>
33083    <peripheral>
33084        <name>HSTX_FIFO</name>
33085        <description>FIFO status and write access for HSTX</description>
33086        <baseAddress>0x50600000</baseAddress>
33087        <addressBlock>
33088            <offset>0</offset>
33089            <size>8</size>
33090            <usage>registers</usage>
33091        </addressBlock>
33092        <registers>
33093            <register>
33094                <name>STAT</name>
33095                <addressOffset>0x00000000</addressOffset>
33096                <description>FIFO status</description>
33097                <resetValue>0x00000000</resetValue>
33098                <fields>
33099                    <field>
33100                        <name>WOF</name>
33101                        <description>FIFO was written when full. Write 1 to clear.</description>
33102                        <bitRange>[10:10]</bitRange>
33103                        <access>read-write</access>
33104                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
33105                    </field>
33106                    <field>
33107                        <name>EMPTY</name>
33108                        <bitRange>[9:9]</bitRange>
33109                        <access>read-only</access>
33110                    </field>
33111                    <field>
33112                        <name>FULL</name>
33113                        <bitRange>[8:8]</bitRange>
33114                        <access>read-only</access>
33115                    </field>
33116                    <field>
33117                        <name>LEVEL</name>
33118                        <bitRange>[7:0]</bitRange>
33119                        <access>read-only</access>
33120                    </field>
33121                </fields>
33122            </register>
33123            <register>
33124                <name>FIFO</name>
33125                <addressOffset>0x00000004</addressOffset>
33126                <description>Write access to FIFO</description>
33127                <resetValue>0x00000000</resetValue>
33128                <fields>
33129                    <field>
33130                        <name>FIFO</name>
33131                        <bitRange>[31:0]</bitRange>
33132                        <access>write-only</access>
33133                    </field>
33134                </fields>
33135            </register>
33136        </registers>
33137    </peripheral>
33138    <peripheral>
33139        <name>HSTX_CTRL</name>
33140        <description>Control interface to HSTX. For FIFO write access and status, see the HSTX_FIFO register block.</description>
33141        <baseAddress>0x400c0000</baseAddress>
33142        <addressBlock>
33143            <offset>0</offset>
33144            <size>44</size>
33145            <usage>registers</usage>
33146        </addressBlock>
33147        <registers>
33148            <register>
33149                <name>CSR</name>
33150                <addressOffset>0x00000000</addressOffset>
33151                <resetValue>0x10050600</resetValue>
33152                <fields>
33153                    <field>
33154                        <name>CLKDIV</name>
33155                        <description>Clock period of the generated clock, measured in HSTX clock cycles. Can be odd or even. The generated clock advances only on cycles where the shift register shifts.
33156
33157                            For example, a clkdiv of 5 would generate a complete output clock period for every 5 HSTX clocks (or every 10 half-clocks).
33158
33159                            A CLKDIV value of 0 is mapped to a period of 16 HSTX clock cycles.</description>
33160                        <bitRange>[31:28]</bitRange>
33161                        <access>read-write</access>
33162                    </field>
33163                    <field>
33164                        <name>CLKPHASE</name>
33165                        <description>Set the initial phase of the generated clock.
33166
33167                            A CLKPHASE of 0 means the clock is initially low, and the first rising edge occurs after one half period of the generated clock (i.e. CLKDIV/2 cycles of clk_hstx). Incrementing CLKPHASE by 1 will advance the initial clock phase by one half clk_hstx period. For example, if CLKDIV=2 and CLKPHASE=1:
33168
33169                            * The clock will be initially low
33170
33171                            * The first rising edge will be 0.5 clk_hstx cycles after asserting first data
33172
33173                            * The first falling edge will be 1.5 clk_hstx cycles after asserting first data
33174
33175                            This configuration would be suitable for serialising at a bit rate of clk_hstx with a centre-aligned DDR clock.
33176
33177                            When the HSTX is halted by clearing CSR_EN, the clock generator will return to its initial phase as configured by the CLKPHASE field.
33178
33179                            Note CLKPHASE must be strictly less than double the value of CLKDIV (one full period), else its operation is undefined.</description>
33180                        <bitRange>[27:24]</bitRange>
33181                        <access>read-write</access>
33182                    </field>
33183                    <field>
33184                        <name>N_SHIFTS</name>
33185                        <description>Number of times to shift the shift register before refilling it from the FIFO. (A count of how many times it has been shifted, *not* the total shift distance.)
33186
33187                            A register value of 0 means shift 32 times.</description>
33188                        <bitRange>[20:16]</bitRange>
33189                        <access>read-write</access>
33190                    </field>
33191                    <field>
33192                        <name>SHIFT</name>
33193                        <description>How many bits to right-rotate the shift register by each cycle.
33194
33195                            The use of a rotate rather than a shift allows left shifts to be emulated, by subtracting the left-shift amount from 32. It also allows data to be repeated, when the product of SHIFT and N_SHIFTS is greater than 32.</description>
33196                        <bitRange>[12:8]</bitRange>
33197                        <access>read-write</access>
33198                    </field>
33199                    <field>
33200                        <name>COUPLED_SEL</name>
33201                        <description>Select which PIO to use for coupled mode operation.</description>
33202                        <bitRange>[6:5]</bitRange>
33203                        <access>read-write</access>
33204                    </field>
33205                    <field>
33206                        <name>COUPLED_MODE</name>
33207                        <description>Enable the PIO-to-HSTX 1:1 connection. The HSTX must be clocked *directly* from the system clock (not just from some other clock source of the same frequency) for this synchronous interface to function correctly.
33208
33209                            When COUPLED_MODE is set, BITx_SEL_P and SEL_N indices 24 through 31 will select bits from the 8-bit PIO-to-HSTX path, rather than shifter bits. Indices of 0 through 23 will still index the shift register as normal.
33210
33211                            The PIO outputs connected to the PIO-to-HSTX bus are those same outputs that would appear on the HSTX-capable pins if those pins&#39; FUNCSELs were set to PIO instead of HSTX.
33212
33213                            For example, if HSTX is on GPIOs 12 through 19, then PIO outputs 12 through 19 are connected to the HSTX when coupled mode is engaged.</description>
33214                        <bitRange>[4:4]</bitRange>
33215                        <access>read-write</access>
33216                    </field>
33217                    <field>
33218                        <name>EXPAND_EN</name>
33219                        <description>Enable the command expander. When 0, raw FIFO data is passed directly to the output shift register. When 1, the command expander can perform simple operations such as run length decoding on data between the FIFO and the shift register.
33220
33221                            Do not change CXPD_EN whilst EN is set. It&#39;s safe to set CXPD_EN simultaneously with setting EN.</description>
33222                        <bitRange>[1:1]</bitRange>
33223                        <access>read-write</access>
33224                    </field>
33225                    <field>
33226                        <name>EN</name>
33227                        <description>When EN is 1, the HSTX will shift out data as it appears in the FIFO. As long as there is data, the HSTX shift register will shift once per clock cycle, and the frequency of popping from the FIFO is determined by the ratio of SHIFT and SHIFT_THRESH.
33228
33229                            When EN is 0, the FIFO is not popped. The shift counter and clock generator are also reset to their initial state for as long as EN is low. Note the initial phase of the clock generator can be configured by the CLKPHASE field.
33230
33231                            Once the HSTX is enabled again, and data is pushed to the FIFO, the generated clock&#39;s first rising edge will be one half-period after the first data is launched.</description>
33232                        <bitRange>[0:0]</bitRange>
33233                        <access>read-write</access>
33234                    </field>
33235                </fields>
33236            </register>
33237            <register>
33238                <name>BIT0</name>
33239                <addressOffset>0x00000004</addressOffset>
33240                <description>Data control register for output bit 0</description>
33241                <resetValue>0x00000000</resetValue>
33242                <fields>
33243                    <field>
33244                        <name>CLK</name>
33245                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33246                        <bitRange>[17:17]</bitRange>
33247                        <access>read-write</access>
33248                    </field>
33249                    <field>
33250                        <name>INV</name>
33251                        <description>Invert this data output (logical NOT)</description>
33252                        <bitRange>[16:16]</bitRange>
33253                        <access>read-write</access>
33254                    </field>
33255                    <field>
33256                        <name>SEL_N</name>
33257                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33258                        <bitRange>[12:8]</bitRange>
33259                        <access>read-write</access>
33260                    </field>
33261                    <field>
33262                        <name>SEL_P</name>
33263                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33264                        <bitRange>[4:0]</bitRange>
33265                        <access>read-write</access>
33266                    </field>
33267                </fields>
33268            </register>
33269            <register>
33270                <name>BIT1</name>
33271                <addressOffset>0x00000008</addressOffset>
33272                <description>Data control register for output bit 1</description>
33273                <resetValue>0x00000000</resetValue>
33274                <fields>
33275                    <field>
33276                        <name>CLK</name>
33277                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33278                        <bitRange>[17:17]</bitRange>
33279                        <access>read-write</access>
33280                    </field>
33281                    <field>
33282                        <name>INV</name>
33283                        <description>Invert this data output (logical NOT)</description>
33284                        <bitRange>[16:16]</bitRange>
33285                        <access>read-write</access>
33286                    </field>
33287                    <field>
33288                        <name>SEL_N</name>
33289                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33290                        <bitRange>[12:8]</bitRange>
33291                        <access>read-write</access>
33292                    </field>
33293                    <field>
33294                        <name>SEL_P</name>
33295                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33296                        <bitRange>[4:0]</bitRange>
33297                        <access>read-write</access>
33298                    </field>
33299                </fields>
33300            </register>
33301            <register>
33302                <name>BIT2</name>
33303                <addressOffset>0x0000000c</addressOffset>
33304                <description>Data control register for output bit 2</description>
33305                <resetValue>0x00000000</resetValue>
33306                <fields>
33307                    <field>
33308                        <name>CLK</name>
33309                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33310                        <bitRange>[17:17]</bitRange>
33311                        <access>read-write</access>
33312                    </field>
33313                    <field>
33314                        <name>INV</name>
33315                        <description>Invert this data output (logical NOT)</description>
33316                        <bitRange>[16:16]</bitRange>
33317                        <access>read-write</access>
33318                    </field>
33319                    <field>
33320                        <name>SEL_N</name>
33321                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33322                        <bitRange>[12:8]</bitRange>
33323                        <access>read-write</access>
33324                    </field>
33325                    <field>
33326                        <name>SEL_P</name>
33327                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33328                        <bitRange>[4:0]</bitRange>
33329                        <access>read-write</access>
33330                    </field>
33331                </fields>
33332            </register>
33333            <register>
33334                <name>BIT3</name>
33335                <addressOffset>0x00000010</addressOffset>
33336                <description>Data control register for output bit 3</description>
33337                <resetValue>0x00000000</resetValue>
33338                <fields>
33339                    <field>
33340                        <name>CLK</name>
33341                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33342                        <bitRange>[17:17]</bitRange>
33343                        <access>read-write</access>
33344                    </field>
33345                    <field>
33346                        <name>INV</name>
33347                        <description>Invert this data output (logical NOT)</description>
33348                        <bitRange>[16:16]</bitRange>
33349                        <access>read-write</access>
33350                    </field>
33351                    <field>
33352                        <name>SEL_N</name>
33353                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33354                        <bitRange>[12:8]</bitRange>
33355                        <access>read-write</access>
33356                    </field>
33357                    <field>
33358                        <name>SEL_P</name>
33359                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33360                        <bitRange>[4:0]</bitRange>
33361                        <access>read-write</access>
33362                    </field>
33363                </fields>
33364            </register>
33365            <register>
33366                <name>BIT4</name>
33367                <addressOffset>0x00000014</addressOffset>
33368                <description>Data control register for output bit 4</description>
33369                <resetValue>0x00000000</resetValue>
33370                <fields>
33371                    <field>
33372                        <name>CLK</name>
33373                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33374                        <bitRange>[17:17]</bitRange>
33375                        <access>read-write</access>
33376                    </field>
33377                    <field>
33378                        <name>INV</name>
33379                        <description>Invert this data output (logical NOT)</description>
33380                        <bitRange>[16:16]</bitRange>
33381                        <access>read-write</access>
33382                    </field>
33383                    <field>
33384                        <name>SEL_N</name>
33385                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33386                        <bitRange>[12:8]</bitRange>
33387                        <access>read-write</access>
33388                    </field>
33389                    <field>
33390                        <name>SEL_P</name>
33391                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33392                        <bitRange>[4:0]</bitRange>
33393                        <access>read-write</access>
33394                    </field>
33395                </fields>
33396            </register>
33397            <register>
33398                <name>BIT5</name>
33399                <addressOffset>0x00000018</addressOffset>
33400                <description>Data control register for output bit 5</description>
33401                <resetValue>0x00000000</resetValue>
33402                <fields>
33403                    <field>
33404                        <name>CLK</name>
33405                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33406                        <bitRange>[17:17]</bitRange>
33407                        <access>read-write</access>
33408                    </field>
33409                    <field>
33410                        <name>INV</name>
33411                        <description>Invert this data output (logical NOT)</description>
33412                        <bitRange>[16:16]</bitRange>
33413                        <access>read-write</access>
33414                    </field>
33415                    <field>
33416                        <name>SEL_N</name>
33417                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33418                        <bitRange>[12:8]</bitRange>
33419                        <access>read-write</access>
33420                    </field>
33421                    <field>
33422                        <name>SEL_P</name>
33423                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33424                        <bitRange>[4:0]</bitRange>
33425                        <access>read-write</access>
33426                    </field>
33427                </fields>
33428            </register>
33429            <register>
33430                <name>BIT6</name>
33431                <addressOffset>0x0000001c</addressOffset>
33432                <description>Data control register for output bit 6</description>
33433                <resetValue>0x00000000</resetValue>
33434                <fields>
33435                    <field>
33436                        <name>CLK</name>
33437                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33438                        <bitRange>[17:17]</bitRange>
33439                        <access>read-write</access>
33440                    </field>
33441                    <field>
33442                        <name>INV</name>
33443                        <description>Invert this data output (logical NOT)</description>
33444                        <bitRange>[16:16]</bitRange>
33445                        <access>read-write</access>
33446                    </field>
33447                    <field>
33448                        <name>SEL_N</name>
33449                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33450                        <bitRange>[12:8]</bitRange>
33451                        <access>read-write</access>
33452                    </field>
33453                    <field>
33454                        <name>SEL_P</name>
33455                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33456                        <bitRange>[4:0]</bitRange>
33457                        <access>read-write</access>
33458                    </field>
33459                </fields>
33460            </register>
33461            <register>
33462                <name>BIT7</name>
33463                <addressOffset>0x00000020</addressOffset>
33464                <description>Data control register for output bit 7</description>
33465                <resetValue>0x00000000</resetValue>
33466                <fields>
33467                    <field>
33468                        <name>CLK</name>
33469                        <description>Connect this output to the generated clock, rather than the data shift register. SEL_P and SEL_N are ignored if this bit is set, but INV can still be set to generate an antiphase clock.</description>
33470                        <bitRange>[17:17]</bitRange>
33471                        <access>read-write</access>
33472                    </field>
33473                    <field>
33474                        <name>INV</name>
33475                        <description>Invert this data output (logical NOT)</description>
33476                        <bitRange>[16:16]</bitRange>
33477                        <access>read-write</access>
33478                    </field>
33479                    <field>
33480                        <name>SEL_N</name>
33481                        <description>Shift register data bit select for the second half of the HSTX clock cycle</description>
33482                        <bitRange>[12:8]</bitRange>
33483                        <access>read-write</access>
33484                    </field>
33485                    <field>
33486                        <name>SEL_P</name>
33487                        <description>Shift register data bit select for the first half of the HSTX clock cycle</description>
33488                        <bitRange>[4:0]</bitRange>
33489                        <access>read-write</access>
33490                    </field>
33491                </fields>
33492            </register>
33493            <register>
33494                <name>EXPAND_SHIFT</name>
33495                <addressOffset>0x00000024</addressOffset>
33496                <description>Configure the optional shifter inside the command expander</description>
33497                <resetValue>0x01000100</resetValue>
33498                <fields>
33499                    <field>
33500                        <name>ENC_N_SHIFTS</name>
33501                        <description>Number of times to consume from the shift register before refilling it from the FIFO, when the current command is an encoded data command (e.g. TMDS). A register value of 0 means shift 32 times.</description>
33502                        <bitRange>[28:24]</bitRange>
33503                        <access>read-write</access>
33504                    </field>
33505                    <field>
33506                        <name>ENC_SHIFT</name>
33507                        <description>How many bits to right-rotate the shift register by each time data is pushed to the output shifter, when the current command is an encoded data command (e.g. TMDS).</description>
33508                        <bitRange>[20:16]</bitRange>
33509                        <access>read-write</access>
33510                    </field>
33511                    <field>
33512                        <name>RAW_N_SHIFTS</name>
33513                        <description>Number of times to consume from the shift register before refilling it from the FIFO, when the current command is a raw data command. A register value of 0 means shift 32 times.</description>
33514                        <bitRange>[12:8]</bitRange>
33515                        <access>read-write</access>
33516                    </field>
33517                    <field>
33518                        <name>RAW_SHIFT</name>
33519                        <description>How many bits to right-rotate the shift register by each time data is pushed to the output shifter, when the current command is a raw data command.</description>
33520                        <bitRange>[4:0]</bitRange>
33521                        <access>read-write</access>
33522                    </field>
33523                </fields>
33524            </register>
33525            <register>
33526                <name>EXPAND_TMDS</name>
33527                <addressOffset>0x00000028</addressOffset>
33528                <description>Configure the optional TMDS encoder inside the command expander</description>
33529                <resetValue>0x00000000</resetValue>
33530                <fields>
33531                    <field>
33532                        <name>L2_NBITS</name>
33533                        <description>Number of valid data bits for the lane 2 TMDS encoder, starting from bit 7 of the rotated data. Field values of 0 -&gt; 7 encode counts of 1 -&gt; 8 bits.</description>
33534                        <bitRange>[23:21]</bitRange>
33535                        <access>read-write</access>
33536                    </field>
33537                    <field>
33538                        <name>L2_ROT</name>
33539                        <description>Right-rotate applied to the current shifter data before the lane 2 TMDS encoder.</description>
33540                        <bitRange>[20:16]</bitRange>
33541                        <access>read-write</access>
33542                    </field>
33543                    <field>
33544                        <name>L1_NBITS</name>
33545                        <description>Number of valid data bits for the lane 1 TMDS encoder, starting from bit 7 of the rotated data. Field values of 0 -&gt; 7 encode counts of 1 -&gt; 8 bits.</description>
33546                        <bitRange>[15:13]</bitRange>
33547                        <access>read-write</access>
33548                    </field>
33549                    <field>
33550                        <name>L1_ROT</name>
33551                        <description>Right-rotate applied to the current shifter data before the lane 1 TMDS encoder.</description>
33552                        <bitRange>[12:8]</bitRange>
33553                        <access>read-write</access>
33554                    </field>
33555                    <field>
33556                        <name>L0_NBITS</name>
33557                        <description>Number of valid data bits for the lane 0 TMDS encoder, starting from bit 7 of the rotated data. Field values of 0 -&gt; 7 encode counts of 1 -&gt; 8 bits.</description>
33558                        <bitRange>[7:5]</bitRange>
33559                        <access>read-write</access>
33560                    </field>
33561                    <field>
33562                        <name>L0_ROT</name>
33563                        <description>Right-rotate applied to the current shifter data before the lane 0 TMDS encoder.</description>
33564                        <bitRange>[4:0]</bitRange>
33565                        <access>read-write</access>
33566                    </field>
33567                </fields>
33568            </register>
33569        </registers>
33570    </peripheral>
33571    <peripheral>
33572        <name>EPPB</name>
33573        <description>Cortex-M33 EPPB vendor register block for RP2350</description>
33574        <baseAddress>0xe0080000</baseAddress>
33575        <addressBlock>
33576            <offset>0</offset>
33577            <size>12</size>
33578            <usage>registers</usage>
33579        </addressBlock>
33580        <registers>
33581            <register>
33582                <name>NMI_MASK0</name>
33583                <addressOffset>0x00000000</addressOffset>
33584                <description>NMI mask for IRQs 0 through 31. This register is core-local, and is reset by a processor warm reset.</description>
33585                <resetValue>0x00000000</resetValue>
33586                <fields>
33587                    <field>
33588                        <name>NMI_MASK0</name>
33589                        <bitRange>[31:0]</bitRange>
33590                        <access>read-write</access>
33591                    </field>
33592                </fields>
33593            </register>
33594            <register>
33595                <name>NMI_MASK1</name>
33596                <addressOffset>0x00000004</addressOffset>
33597                <description>NMI mask for IRQs 0 though 51. This register is core-local, and is reset by a processor warm reset.</description>
33598                <resetValue>0x00000000</resetValue>
33599                <fields>
33600                    <field>
33601                        <name>NMI_MASK1</name>
33602                        <bitRange>[19:0]</bitRange>
33603                        <access>read-write</access>
33604                    </field>
33605                </fields>
33606            </register>
33607            <register>
33608                <name>SLEEPCTRL</name>
33609                <addressOffset>0x00000008</addressOffset>
33610                <description>Nonstandard sleep control register</description>
33611                <resetValue>0x00000002</resetValue>
33612                <fields>
33613                    <field>
33614                        <name>WICENACK</name>
33615                        <description>Status signal from the processor&#39;s interrupt controller. Changes to WICENREQ are eventually reflected in WICENACK.</description>
33616                        <bitRange>[2:2]</bitRange>
33617                        <access>read-only</access>
33618                    </field>
33619                    <field>
33620                        <name>WICENREQ</name>
33621                        <description>Request that the next processor deep sleep is a WIC sleep. After setting this bit, before sleeping, poll WICENACK to ensure the processor interrupt controller has acknowledged the change.</description>
33622                        <bitRange>[1:1]</bitRange>
33623                        <access>read-write</access>
33624                    </field>
33625                    <field>
33626                        <name>LIGHT_SLEEP</name>
33627                        <description>By default, any processor sleep will deassert the system-level clock request. Reenabling the clocks incurs 5 cycles of additional latency on wakeup.
33628
33629                            Setting LIGHT_SLEEP to 1 keeps the clock request asserted during a normal sleep (Arm SCR.SLEEPDEEP = 0), for faster wakeup. Processor deep sleep (Arm SCR.SLEEPDEEP = 1) is not affected, and will always deassert the system-level clock request.</description>
33630                        <bitRange>[0:0]</bitRange>
33631                        <access>read-write</access>
33632                    </field>
33633                </fields>
33634            </register>
33635        </registers>
33636    </peripheral>
33637    <peripheral>
33638        <name>PPB</name>
33639        <description>TEAL registers accessible through the debug interface</description>
33640        <baseAddress>0xe0000000</baseAddress>
33641        <addressBlock>
33642            <offset>0</offset>
33643            <size>274432</size>
33644            <usage>registers</usage>
33645        </addressBlock>
33646        <registers>
33647            <register>
33648                <name>ITM_STIM0</name>
33649                <addressOffset>0x00000000</addressOffset>
33650                <description>Provides the interface for generating Instrumentation packets</description>
33651                <resetValue>0x00000000</resetValue>
33652                <fields>
33653                    <field>
33654                        <name>STIMULUS</name>
33655                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33656                        <bitRange>[31:0]</bitRange>
33657                        <access>read-write</access>
33658                    </field>
33659                </fields>
33660            </register>
33661            <register>
33662                <name>ITM_STIM1</name>
33663                <addressOffset>0x00000004</addressOffset>
33664                <description>Provides the interface for generating Instrumentation packets</description>
33665                <resetValue>0x00000000</resetValue>
33666                <fields>
33667                    <field>
33668                        <name>STIMULUS</name>
33669                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33670                        <bitRange>[31:0]</bitRange>
33671                        <access>read-write</access>
33672                    </field>
33673                </fields>
33674            </register>
33675            <register>
33676                <name>ITM_STIM2</name>
33677                <addressOffset>0x00000008</addressOffset>
33678                <description>Provides the interface for generating Instrumentation packets</description>
33679                <resetValue>0x00000000</resetValue>
33680                <fields>
33681                    <field>
33682                        <name>STIMULUS</name>
33683                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33684                        <bitRange>[31:0]</bitRange>
33685                        <access>read-write</access>
33686                    </field>
33687                </fields>
33688            </register>
33689            <register>
33690                <name>ITM_STIM3</name>
33691                <addressOffset>0x0000000c</addressOffset>
33692                <description>Provides the interface for generating Instrumentation packets</description>
33693                <resetValue>0x00000000</resetValue>
33694                <fields>
33695                    <field>
33696                        <name>STIMULUS</name>
33697                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33698                        <bitRange>[31:0]</bitRange>
33699                        <access>read-write</access>
33700                    </field>
33701                </fields>
33702            </register>
33703            <register>
33704                <name>ITM_STIM4</name>
33705                <addressOffset>0x00000010</addressOffset>
33706                <description>Provides the interface for generating Instrumentation packets</description>
33707                <resetValue>0x00000000</resetValue>
33708                <fields>
33709                    <field>
33710                        <name>STIMULUS</name>
33711                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33712                        <bitRange>[31:0]</bitRange>
33713                        <access>read-write</access>
33714                    </field>
33715                </fields>
33716            </register>
33717            <register>
33718                <name>ITM_STIM5</name>
33719                <addressOffset>0x00000014</addressOffset>
33720                <description>Provides the interface for generating Instrumentation packets</description>
33721                <resetValue>0x00000000</resetValue>
33722                <fields>
33723                    <field>
33724                        <name>STIMULUS</name>
33725                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33726                        <bitRange>[31:0]</bitRange>
33727                        <access>read-write</access>
33728                    </field>
33729                </fields>
33730            </register>
33731            <register>
33732                <name>ITM_STIM6</name>
33733                <addressOffset>0x00000018</addressOffset>
33734                <description>Provides the interface for generating Instrumentation packets</description>
33735                <resetValue>0x00000000</resetValue>
33736                <fields>
33737                    <field>
33738                        <name>STIMULUS</name>
33739                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33740                        <bitRange>[31:0]</bitRange>
33741                        <access>read-write</access>
33742                    </field>
33743                </fields>
33744            </register>
33745            <register>
33746                <name>ITM_STIM7</name>
33747                <addressOffset>0x0000001c</addressOffset>
33748                <description>Provides the interface for generating Instrumentation packets</description>
33749                <resetValue>0x00000000</resetValue>
33750                <fields>
33751                    <field>
33752                        <name>STIMULUS</name>
33753                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33754                        <bitRange>[31:0]</bitRange>
33755                        <access>read-write</access>
33756                    </field>
33757                </fields>
33758            </register>
33759            <register>
33760                <name>ITM_STIM8</name>
33761                <addressOffset>0x00000020</addressOffset>
33762                <description>Provides the interface for generating Instrumentation packets</description>
33763                <resetValue>0x00000000</resetValue>
33764                <fields>
33765                    <field>
33766                        <name>STIMULUS</name>
33767                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33768                        <bitRange>[31:0]</bitRange>
33769                        <access>read-write</access>
33770                    </field>
33771                </fields>
33772            </register>
33773            <register>
33774                <name>ITM_STIM9</name>
33775                <addressOffset>0x00000024</addressOffset>
33776                <description>Provides the interface for generating Instrumentation packets</description>
33777                <resetValue>0x00000000</resetValue>
33778                <fields>
33779                    <field>
33780                        <name>STIMULUS</name>
33781                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33782                        <bitRange>[31:0]</bitRange>
33783                        <access>read-write</access>
33784                    </field>
33785                </fields>
33786            </register>
33787            <register>
33788                <name>ITM_STIM10</name>
33789                <addressOffset>0x00000028</addressOffset>
33790                <description>Provides the interface for generating Instrumentation packets</description>
33791                <resetValue>0x00000000</resetValue>
33792                <fields>
33793                    <field>
33794                        <name>STIMULUS</name>
33795                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33796                        <bitRange>[31:0]</bitRange>
33797                        <access>read-write</access>
33798                    </field>
33799                </fields>
33800            </register>
33801            <register>
33802                <name>ITM_STIM11</name>
33803                <addressOffset>0x0000002c</addressOffset>
33804                <description>Provides the interface for generating Instrumentation packets</description>
33805                <resetValue>0x00000000</resetValue>
33806                <fields>
33807                    <field>
33808                        <name>STIMULUS</name>
33809                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33810                        <bitRange>[31:0]</bitRange>
33811                        <access>read-write</access>
33812                    </field>
33813                </fields>
33814            </register>
33815            <register>
33816                <name>ITM_STIM12</name>
33817                <addressOffset>0x00000030</addressOffset>
33818                <description>Provides the interface for generating Instrumentation packets</description>
33819                <resetValue>0x00000000</resetValue>
33820                <fields>
33821                    <field>
33822                        <name>STIMULUS</name>
33823                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33824                        <bitRange>[31:0]</bitRange>
33825                        <access>read-write</access>
33826                    </field>
33827                </fields>
33828            </register>
33829            <register>
33830                <name>ITM_STIM13</name>
33831                <addressOffset>0x00000034</addressOffset>
33832                <description>Provides the interface for generating Instrumentation packets</description>
33833                <resetValue>0x00000000</resetValue>
33834                <fields>
33835                    <field>
33836                        <name>STIMULUS</name>
33837                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33838                        <bitRange>[31:0]</bitRange>
33839                        <access>read-write</access>
33840                    </field>
33841                </fields>
33842            </register>
33843            <register>
33844                <name>ITM_STIM14</name>
33845                <addressOffset>0x00000038</addressOffset>
33846                <description>Provides the interface for generating Instrumentation packets</description>
33847                <resetValue>0x00000000</resetValue>
33848                <fields>
33849                    <field>
33850                        <name>STIMULUS</name>
33851                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33852                        <bitRange>[31:0]</bitRange>
33853                        <access>read-write</access>
33854                    </field>
33855                </fields>
33856            </register>
33857            <register>
33858                <name>ITM_STIM15</name>
33859                <addressOffset>0x0000003c</addressOffset>
33860                <description>Provides the interface for generating Instrumentation packets</description>
33861                <resetValue>0x00000000</resetValue>
33862                <fields>
33863                    <field>
33864                        <name>STIMULUS</name>
33865                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33866                        <bitRange>[31:0]</bitRange>
33867                        <access>read-write</access>
33868                    </field>
33869                </fields>
33870            </register>
33871            <register>
33872                <name>ITM_STIM16</name>
33873                <addressOffset>0x00000040</addressOffset>
33874                <description>Provides the interface for generating Instrumentation packets</description>
33875                <resetValue>0x00000000</resetValue>
33876                <fields>
33877                    <field>
33878                        <name>STIMULUS</name>
33879                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33880                        <bitRange>[31:0]</bitRange>
33881                        <access>read-write</access>
33882                    </field>
33883                </fields>
33884            </register>
33885            <register>
33886                <name>ITM_STIM17</name>
33887                <addressOffset>0x00000044</addressOffset>
33888                <description>Provides the interface for generating Instrumentation packets</description>
33889                <resetValue>0x00000000</resetValue>
33890                <fields>
33891                    <field>
33892                        <name>STIMULUS</name>
33893                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33894                        <bitRange>[31:0]</bitRange>
33895                        <access>read-write</access>
33896                    </field>
33897                </fields>
33898            </register>
33899            <register>
33900                <name>ITM_STIM18</name>
33901                <addressOffset>0x00000048</addressOffset>
33902                <description>Provides the interface for generating Instrumentation packets</description>
33903                <resetValue>0x00000000</resetValue>
33904                <fields>
33905                    <field>
33906                        <name>STIMULUS</name>
33907                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33908                        <bitRange>[31:0]</bitRange>
33909                        <access>read-write</access>
33910                    </field>
33911                </fields>
33912            </register>
33913            <register>
33914                <name>ITM_STIM19</name>
33915                <addressOffset>0x0000004c</addressOffset>
33916                <description>Provides the interface for generating Instrumentation packets</description>
33917                <resetValue>0x00000000</resetValue>
33918                <fields>
33919                    <field>
33920                        <name>STIMULUS</name>
33921                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33922                        <bitRange>[31:0]</bitRange>
33923                        <access>read-write</access>
33924                    </field>
33925                </fields>
33926            </register>
33927            <register>
33928                <name>ITM_STIM20</name>
33929                <addressOffset>0x00000050</addressOffset>
33930                <description>Provides the interface for generating Instrumentation packets</description>
33931                <resetValue>0x00000000</resetValue>
33932                <fields>
33933                    <field>
33934                        <name>STIMULUS</name>
33935                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33936                        <bitRange>[31:0]</bitRange>
33937                        <access>read-write</access>
33938                    </field>
33939                </fields>
33940            </register>
33941            <register>
33942                <name>ITM_STIM21</name>
33943                <addressOffset>0x00000054</addressOffset>
33944                <description>Provides the interface for generating Instrumentation packets</description>
33945                <resetValue>0x00000000</resetValue>
33946                <fields>
33947                    <field>
33948                        <name>STIMULUS</name>
33949                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33950                        <bitRange>[31:0]</bitRange>
33951                        <access>read-write</access>
33952                    </field>
33953                </fields>
33954            </register>
33955            <register>
33956                <name>ITM_STIM22</name>
33957                <addressOffset>0x00000058</addressOffset>
33958                <description>Provides the interface for generating Instrumentation packets</description>
33959                <resetValue>0x00000000</resetValue>
33960                <fields>
33961                    <field>
33962                        <name>STIMULUS</name>
33963                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33964                        <bitRange>[31:0]</bitRange>
33965                        <access>read-write</access>
33966                    </field>
33967                </fields>
33968            </register>
33969            <register>
33970                <name>ITM_STIM23</name>
33971                <addressOffset>0x0000005c</addressOffset>
33972                <description>Provides the interface for generating Instrumentation packets</description>
33973                <resetValue>0x00000000</resetValue>
33974                <fields>
33975                    <field>
33976                        <name>STIMULUS</name>
33977                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33978                        <bitRange>[31:0]</bitRange>
33979                        <access>read-write</access>
33980                    </field>
33981                </fields>
33982            </register>
33983            <register>
33984                <name>ITM_STIM24</name>
33985                <addressOffset>0x00000060</addressOffset>
33986                <description>Provides the interface for generating Instrumentation packets</description>
33987                <resetValue>0x00000000</resetValue>
33988                <fields>
33989                    <field>
33990                        <name>STIMULUS</name>
33991                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
33992                        <bitRange>[31:0]</bitRange>
33993                        <access>read-write</access>
33994                    </field>
33995                </fields>
33996            </register>
33997            <register>
33998                <name>ITM_STIM25</name>
33999                <addressOffset>0x00000064</addressOffset>
34000                <description>Provides the interface for generating Instrumentation packets</description>
34001                <resetValue>0x00000000</resetValue>
34002                <fields>
34003                    <field>
34004                        <name>STIMULUS</name>
34005                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34006                        <bitRange>[31:0]</bitRange>
34007                        <access>read-write</access>
34008                    </field>
34009                </fields>
34010            </register>
34011            <register>
34012                <name>ITM_STIM26</name>
34013                <addressOffset>0x00000068</addressOffset>
34014                <description>Provides the interface for generating Instrumentation packets</description>
34015                <resetValue>0x00000000</resetValue>
34016                <fields>
34017                    <field>
34018                        <name>STIMULUS</name>
34019                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34020                        <bitRange>[31:0]</bitRange>
34021                        <access>read-write</access>
34022                    </field>
34023                </fields>
34024            </register>
34025            <register>
34026                <name>ITM_STIM27</name>
34027                <addressOffset>0x0000006c</addressOffset>
34028                <description>Provides the interface for generating Instrumentation packets</description>
34029                <resetValue>0x00000000</resetValue>
34030                <fields>
34031                    <field>
34032                        <name>STIMULUS</name>
34033                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34034                        <bitRange>[31:0]</bitRange>
34035                        <access>read-write</access>
34036                    </field>
34037                </fields>
34038            </register>
34039            <register>
34040                <name>ITM_STIM28</name>
34041                <addressOffset>0x00000070</addressOffset>
34042                <description>Provides the interface for generating Instrumentation packets</description>
34043                <resetValue>0x00000000</resetValue>
34044                <fields>
34045                    <field>
34046                        <name>STIMULUS</name>
34047                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34048                        <bitRange>[31:0]</bitRange>
34049                        <access>read-write</access>
34050                    </field>
34051                </fields>
34052            </register>
34053            <register>
34054                <name>ITM_STIM29</name>
34055                <addressOffset>0x00000074</addressOffset>
34056                <description>Provides the interface for generating Instrumentation packets</description>
34057                <resetValue>0x00000000</resetValue>
34058                <fields>
34059                    <field>
34060                        <name>STIMULUS</name>
34061                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34062                        <bitRange>[31:0]</bitRange>
34063                        <access>read-write</access>
34064                    </field>
34065                </fields>
34066            </register>
34067            <register>
34068                <name>ITM_STIM30</name>
34069                <addressOffset>0x00000078</addressOffset>
34070                <description>Provides the interface for generating Instrumentation packets</description>
34071                <resetValue>0x00000000</resetValue>
34072                <fields>
34073                    <field>
34074                        <name>STIMULUS</name>
34075                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34076                        <bitRange>[31:0]</bitRange>
34077                        <access>read-write</access>
34078                    </field>
34079                </fields>
34080            </register>
34081            <register>
34082                <name>ITM_STIM31</name>
34083                <addressOffset>0x0000007c</addressOffset>
34084                <description>Provides the interface for generating Instrumentation packets</description>
34085                <resetValue>0x00000000</resetValue>
34086                <fields>
34087                    <field>
34088                        <name>STIMULUS</name>
34089                        <description>Data to write to the Stimulus Port FIFO, for forwarding as an Instrumentation packet. The size of write access determines the type of Instrumentation packet generated.</description>
34090                        <bitRange>[31:0]</bitRange>
34091                        <access>read-write</access>
34092                    </field>
34093                </fields>
34094            </register>
34095            <register>
34096                <name>ITM_TER0</name>
34097                <addressOffset>0x00000e00</addressOffset>
34098                <description>Provide an individual enable bit for each ITM_STIM register</description>
34099                <resetValue>0x00000000</resetValue>
34100                <fields>
34101                    <field>
34102                        <name>STIMENA</name>
34103                        <description>For STIMENA[m] in ITM_TER*n, controls whether ITM_STIM(32*n + m) is enabled</description>
34104                        <bitRange>[31:0]</bitRange>
34105                        <access>read-write</access>
34106                    </field>
34107                </fields>
34108            </register>
34109            <register>
34110                <name>ITM_TPR</name>
34111                <addressOffset>0x00000e40</addressOffset>
34112                <description>Controls which stimulus ports can be accessed by unprivileged code</description>
34113                <resetValue>0x00000000</resetValue>
34114                <fields>
34115                    <field>
34116                        <name>PRIVMASK</name>
34117                        <description>Bit mask to enable tracing on ITM stimulus ports</description>
34118                        <bitRange>[3:0]</bitRange>
34119                        <access>read-write</access>
34120                    </field>
34121                </fields>
34122            </register>
34123            <register>
34124                <name>ITM_TCR</name>
34125                <addressOffset>0x00000e80</addressOffset>
34126                <description>Configures and controls transfers through the ITM interface</description>
34127                <resetValue>0x00000000</resetValue>
34128                <fields>
34129                    <field>
34130                        <name>BUSY</name>
34131                        <description>Indicates whether the ITM is currently processing events</description>
34132                        <bitRange>[23:23]</bitRange>
34133                        <access>read-only</access>
34134                    </field>
34135                    <field>
34136                        <name>TRACEBUSID</name>
34137                        <description>Identifier for multi-source trace stream formatting. If multi-source trace is in use, the debugger must write a unique non-zero trace ID value to this field</description>
34138                        <bitRange>[22:16]</bitRange>
34139                        <access>read-write</access>
34140                    </field>
34141                    <field>
34142                        <name>GTSFREQ</name>
34143                        <description>Defines how often the ITM generates a global timestamp, based on the global timestamp clock frequency, or disables generation of global timestamps</description>
34144                        <bitRange>[11:10]</bitRange>
34145                        <access>read-write</access>
34146                    </field>
34147                    <field>
34148                        <name>TSPRESCALE</name>
34149                        <description>Local timestamp prescaler, used with the trace packet reference clock</description>
34150                        <bitRange>[9:8]</bitRange>
34151                        <access>read-write</access>
34152                    </field>
34153                    <field>
34154                        <name>STALLENA</name>
34155                        <description>Stall the PE to guarantee delivery of Data Trace packets.</description>
34156                        <bitRange>[5:5]</bitRange>
34157                        <access>read-write</access>
34158                    </field>
34159                    <field>
34160                        <name>SWOENA</name>
34161                        <description>Enables asynchronous clocking of the timestamp counter</description>
34162                        <bitRange>[4:4]</bitRange>
34163                        <access>read-write</access>
34164                    </field>
34165                    <field>
34166                        <name>TXENA</name>
34167                        <description>Enables forwarding of hardware event packet from the DWT unit to the ITM for output to the TPIU</description>
34168                        <bitRange>[3:3]</bitRange>
34169                        <access>read-write</access>
34170                    </field>
34171                    <field>
34172                        <name>SYNCENA</name>
34173                        <description>Enables Synchronization packet transmission for a synchronous TPIU</description>
34174                        <bitRange>[2:2]</bitRange>
34175                        <access>read-write</access>
34176                    </field>
34177                    <field>
34178                        <name>TSENA</name>
34179                        <description>Enables Local timestamp generation</description>
34180                        <bitRange>[1:1]</bitRange>
34181                        <access>read-write</access>
34182                    </field>
34183                    <field>
34184                        <name>ITMENA</name>
34185                        <description>Enables the ITM</description>
34186                        <bitRange>[0:0]</bitRange>
34187                        <access>read-write</access>
34188                    </field>
34189                </fields>
34190            </register>
34191            <register>
34192                <name>INT_ATREADY</name>
34193                <addressOffset>0x00000ef0</addressOffset>
34194                <description>Integration Mode: Read ATB Ready</description>
34195                <resetValue>0x00000000</resetValue>
34196                <fields>
34197                    <field>
34198                        <name>AFVALID</name>
34199                        <description>A read of this bit returns the value of AFVALID</description>
34200                        <bitRange>[1:1]</bitRange>
34201                        <access>read-only</access>
34202                    </field>
34203                    <field>
34204                        <name>ATREADY</name>
34205                        <description>A read of this bit returns the value of ATREADY</description>
34206                        <bitRange>[0:0]</bitRange>
34207                        <access>read-only</access>
34208                    </field>
34209                </fields>
34210            </register>
34211            <register>
34212                <name>INT_ATVALID</name>
34213                <addressOffset>0x00000ef8</addressOffset>
34214                <description>Integration Mode: Write ATB Valid</description>
34215                <resetValue>0x00000000</resetValue>
34216                <fields>
34217                    <field>
34218                        <name>AFREADY</name>
34219                        <description>A write to this bit gives the value of AFREADY</description>
34220                        <bitRange>[1:1]</bitRange>
34221                        <access>read-write</access>
34222                    </field>
34223                    <field>
34224                        <name>ATREADY</name>
34225                        <description>A write to this bit gives the value of ATVALID</description>
34226                        <bitRange>[0:0]</bitRange>
34227                        <access>read-write</access>
34228                    </field>
34229                </fields>
34230            </register>
34231            <register>
34232                <name>ITM_ITCTRL</name>
34233                <addressOffset>0x00000f00</addressOffset>
34234                <description>Integration Mode Control Register</description>
34235                <resetValue>0x00000000</resetValue>
34236                <fields>
34237                    <field>
34238                        <name>IME</name>
34239                        <description>Integration mode enable bit - The possible values are:  0 - The trace unit is not in integration mode. 1 - The trace unit is in integration mode. This mode enables: A debug agent to perform topology detection. SoC test software to perform integration testing.</description>
34240                        <bitRange>[0:0]</bitRange>
34241                        <access>read-write</access>
34242                    </field>
34243                </fields>
34244            </register>
34245            <register>
34246                <name>ITM_DEVARCH</name>
34247                <addressOffset>0x00000fbc</addressOffset>
34248                <description>Provides CoreSight discovery information for the ITM</description>
34249                <resetValue>0x47701a01</resetValue>
34250                <fields>
34251                    <field>
34252                        <name>ARCHITECT</name>
34253                        <description>Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.</description>
34254                        <bitRange>[31:21]</bitRange>
34255                        <access>read-only</access>
34256                    </field>
34257                    <field>
34258                        <name>PRESENT</name>
34259                        <description>Defines that the DEVARCH register is present</description>
34260                        <bitRange>[20:20]</bitRange>
34261                        <access>read-only</access>
34262                    </field>
34263                    <field>
34264                        <name>REVISION</name>
34265                        <description>Defines the architecture revision of the component</description>
34266                        <bitRange>[19:16]</bitRange>
34267                        <access>read-only</access>
34268                    </field>
34269                    <field>
34270                        <name>ARCHVER</name>
34271                        <description>Defines the architecture version of the component</description>
34272                        <bitRange>[15:12]</bitRange>
34273                        <access>read-only</access>
34274                    </field>
34275                    <field>
34276                        <name>ARCHPART</name>
34277                        <description>Defines the architecture of the component</description>
34278                        <bitRange>[11:0]</bitRange>
34279                        <access>read-only</access>
34280                    </field>
34281                </fields>
34282            </register>
34283            <register>
34284                <name>ITM_DEVTYPE</name>
34285                <addressOffset>0x00000fcc</addressOffset>
34286                <description>Provides CoreSight discovery information for the ITM</description>
34287                <resetValue>0x00000043</resetValue>
34288                <fields>
34289                    <field>
34290                        <name>SUB</name>
34291                        <description>Component sub-type</description>
34292                        <bitRange>[7:4]</bitRange>
34293                        <access>read-only</access>
34294                    </field>
34295                    <field>
34296                        <name>MAJOR</name>
34297                        <description>Component major type</description>
34298                        <bitRange>[3:0]</bitRange>
34299                        <access>read-only</access>
34300                    </field>
34301                </fields>
34302            </register>
34303            <register>
34304                <name>ITM_PIDR4</name>
34305                <addressOffset>0x00000fd0</addressOffset>
34306                <description>Provides CoreSight discovery information for the ITM</description>
34307                <resetValue>0x00000004</resetValue>
34308                <fields>
34309                    <field>
34310                        <name>SIZE</name>
34311                        <description>See CoreSight Architecture Specification</description>
34312                        <bitRange>[7:4]</bitRange>
34313                        <access>read-only</access>
34314                    </field>
34315                    <field>
34316                        <name>DES_2</name>
34317                        <description>See CoreSight Architecture Specification</description>
34318                        <bitRange>[3:0]</bitRange>
34319                        <access>read-only</access>
34320                    </field>
34321                </fields>
34322            </register>
34323            <register>
34324                <name>ITM_PIDR5</name>
34325                <addressOffset>0x00000fd4</addressOffset>
34326                <description>Provides CoreSight discovery information for the ITM</description>
34327                <resetValue>0x00000000</resetValue>
34328                <fields>
34329                    <field>
34330                        <name>ITM_PIDR5</name>
34331                        <bitRange>[31:0]</bitRange>
34332                        <access>read-write</access>
34333                    </field>
34334                </fields>
34335            </register>
34336            <register>
34337                <name>ITM_PIDR6</name>
34338                <addressOffset>0x00000fd8</addressOffset>
34339                <description>Provides CoreSight discovery information for the ITM</description>
34340                <resetValue>0x00000000</resetValue>
34341                <fields>
34342                    <field>
34343                        <name>ITM_PIDR6</name>
34344                        <bitRange>[31:0]</bitRange>
34345                        <access>read-write</access>
34346                    </field>
34347                </fields>
34348            </register>
34349            <register>
34350                <name>ITM_PIDR7</name>
34351                <addressOffset>0x00000fdc</addressOffset>
34352                <description>Provides CoreSight discovery information for the ITM</description>
34353                <resetValue>0x00000000</resetValue>
34354                <fields>
34355                    <field>
34356                        <name>ITM_PIDR7</name>
34357                        <bitRange>[31:0]</bitRange>
34358                        <access>read-write</access>
34359                    </field>
34360                </fields>
34361            </register>
34362            <register>
34363                <name>ITM_PIDR0</name>
34364                <addressOffset>0x00000fe0</addressOffset>
34365                <description>Provides CoreSight discovery information for the ITM</description>
34366                <resetValue>0x00000021</resetValue>
34367                <fields>
34368                    <field>
34369                        <name>PART_0</name>
34370                        <description>See CoreSight Architecture Specification</description>
34371                        <bitRange>[7:0]</bitRange>
34372                        <access>read-only</access>
34373                    </field>
34374                </fields>
34375            </register>
34376            <register>
34377                <name>ITM_PIDR1</name>
34378                <addressOffset>0x00000fe4</addressOffset>
34379                <description>Provides CoreSight discovery information for the ITM</description>
34380                <resetValue>0x000000bd</resetValue>
34381                <fields>
34382                    <field>
34383                        <name>DES_0</name>
34384                        <description>See CoreSight Architecture Specification</description>
34385                        <bitRange>[7:4]</bitRange>
34386                        <access>read-only</access>
34387                    </field>
34388                    <field>
34389                        <name>PART_1</name>
34390                        <description>See CoreSight Architecture Specification</description>
34391                        <bitRange>[3:0]</bitRange>
34392                        <access>read-only</access>
34393                    </field>
34394                </fields>
34395            </register>
34396            <register>
34397                <name>ITM_PIDR2</name>
34398                <addressOffset>0x00000fe8</addressOffset>
34399                <description>Provides CoreSight discovery information for the ITM</description>
34400                <resetValue>0x0000000b</resetValue>
34401                <fields>
34402                    <field>
34403                        <name>REVISION</name>
34404                        <description>See CoreSight Architecture Specification</description>
34405                        <bitRange>[7:4]</bitRange>
34406                        <access>read-only</access>
34407                    </field>
34408                    <field>
34409                        <name>JEDEC</name>
34410                        <description>See CoreSight Architecture Specification</description>
34411                        <bitRange>[3:3]</bitRange>
34412                        <access>read-only</access>
34413                    </field>
34414                    <field>
34415                        <name>DES_1</name>
34416                        <description>See CoreSight Architecture Specification</description>
34417                        <bitRange>[2:0]</bitRange>
34418                        <access>read-only</access>
34419                    </field>
34420                </fields>
34421            </register>
34422            <register>
34423                <name>ITM_PIDR3</name>
34424                <addressOffset>0x00000fec</addressOffset>
34425                <description>Provides CoreSight discovery information for the ITM</description>
34426                <resetValue>0x00000000</resetValue>
34427                <fields>
34428                    <field>
34429                        <name>REVAND</name>
34430                        <description>See CoreSight Architecture Specification</description>
34431                        <bitRange>[7:4]</bitRange>
34432                        <access>read-only</access>
34433                    </field>
34434                    <field>
34435                        <name>CMOD</name>
34436                        <description>See CoreSight Architecture Specification</description>
34437                        <bitRange>[3:0]</bitRange>
34438                        <access>read-only</access>
34439                    </field>
34440                </fields>
34441            </register>
34442            <register>
34443                <name>ITM_CIDR0</name>
34444                <addressOffset>0x00000ff0</addressOffset>
34445                <description>Provides CoreSight discovery information for the ITM</description>
34446                <resetValue>0x0000000d</resetValue>
34447                <fields>
34448                    <field>
34449                        <name>PRMBL_0</name>
34450                        <description>See CoreSight Architecture Specification</description>
34451                        <bitRange>[7:0]</bitRange>
34452                        <access>read-only</access>
34453                    </field>
34454                </fields>
34455            </register>
34456            <register>
34457                <name>ITM_CIDR1</name>
34458                <addressOffset>0x00000ff4</addressOffset>
34459                <description>Provides CoreSight discovery information for the ITM</description>
34460                <resetValue>0x00000090</resetValue>
34461                <fields>
34462                    <field>
34463                        <name>CLASS</name>
34464                        <description>See CoreSight Architecture Specification</description>
34465                        <bitRange>[7:4]</bitRange>
34466                        <access>read-only</access>
34467                    </field>
34468                    <field>
34469                        <name>PRMBL_1</name>
34470                        <description>See CoreSight Architecture Specification</description>
34471                        <bitRange>[3:0]</bitRange>
34472                        <access>read-only</access>
34473                    </field>
34474                </fields>
34475            </register>
34476            <register>
34477                <name>ITM_CIDR2</name>
34478                <addressOffset>0x00000ff8</addressOffset>
34479                <description>Provides CoreSight discovery information for the ITM</description>
34480                <resetValue>0x00000005</resetValue>
34481                <fields>
34482                    <field>
34483                        <name>PRMBL_2</name>
34484                        <description>See CoreSight Architecture Specification</description>
34485                        <bitRange>[7:0]</bitRange>
34486                        <access>read-only</access>
34487                    </field>
34488                </fields>
34489            </register>
34490            <register>
34491                <name>ITM_CIDR3</name>
34492                <addressOffset>0x00000ffc</addressOffset>
34493                <description>Provides CoreSight discovery information for the ITM</description>
34494                <resetValue>0x000000b1</resetValue>
34495                <fields>
34496                    <field>
34497                        <name>PRMBL_3</name>
34498                        <description>See CoreSight Architecture Specification</description>
34499                        <bitRange>[7:0]</bitRange>
34500                        <access>read-only</access>
34501                    </field>
34502                </fields>
34503            </register>
34504            <register>
34505                <name>DWT_CTRL</name>
34506                <addressOffset>0x00001000</addressOffset>
34507                <description>Provides configuration and status information for the DWT unit, and used to control features of the unit</description>
34508                <resetValue>0x73741824</resetValue>
34509                <fields>
34510                    <field>
34511                        <name>NUMCOMP</name>
34512                        <description>Number of DWT comparators implemented</description>
34513                        <bitRange>[31:28]</bitRange>
34514                        <access>read-only</access>
34515                    </field>
34516                    <field>
34517                        <name>NOTRCPKT</name>
34518                        <description>Indicates whether the implementation does not support trace</description>
34519                        <bitRange>[27:27]</bitRange>
34520                        <access>read-only</access>
34521                    </field>
34522                    <field>
34523                        <name>NOEXTTRIG</name>
34524                        <description>Reserved, RAZ</description>
34525                        <bitRange>[26:26]</bitRange>
34526                        <access>read-only</access>
34527                    </field>
34528                    <field>
34529                        <name>NOCYCCNT</name>
34530                        <description>Indicates whether the implementation does not include a cycle counter</description>
34531                        <bitRange>[25:25]</bitRange>
34532                        <access>read-only</access>
34533                    </field>
34534                    <field>
34535                        <name>NOPRFCNT</name>
34536                        <description>Indicates whether the implementation does not include the profiling counters</description>
34537                        <bitRange>[24:24]</bitRange>
34538                        <access>read-only</access>
34539                    </field>
34540                    <field>
34541                        <name>CYCDISS</name>
34542                        <description>Controls whether the cycle counter is disabled in Secure state</description>
34543                        <bitRange>[23:23]</bitRange>
34544                        <access>read-write</access>
34545                    </field>
34546                    <field>
34547                        <name>CYCEVTENA</name>
34548                        <description>Enables Event Counter packet generation on POSTCNT underflow</description>
34549                        <bitRange>[22:22]</bitRange>
34550                        <access>read-write</access>
34551                    </field>
34552                    <field>
34553                        <name>FOLDEVTENA</name>
34554                        <description>Enables DWT_FOLDCNT counter</description>
34555                        <bitRange>[21:21]</bitRange>
34556                        <access>read-write</access>
34557                    </field>
34558                    <field>
34559                        <name>LSUEVTENA</name>
34560                        <description>Enables DWT_LSUCNT counter</description>
34561                        <bitRange>[20:20]</bitRange>
34562                        <access>read-write</access>
34563                    </field>
34564                    <field>
34565                        <name>SLEEPEVTENA</name>
34566                        <description>Enable DWT_SLEEPCNT counter</description>
34567                        <bitRange>[19:19]</bitRange>
34568                        <access>read-write</access>
34569                    </field>
34570                    <field>
34571                        <name>EXCEVTENA</name>
34572                        <description>Enables DWT_EXCCNT counter</description>
34573                        <bitRange>[18:18]</bitRange>
34574                        <access>read-write</access>
34575                    </field>
34576                    <field>
34577                        <name>CPIEVTENA</name>
34578                        <description>Enables DWT_CPICNT counter</description>
34579                        <bitRange>[17:17]</bitRange>
34580                        <access>read-write</access>
34581                    </field>
34582                    <field>
34583                        <name>EXTTRCENA</name>
34584                        <description>Enables generation of Exception Trace packets</description>
34585                        <bitRange>[16:16]</bitRange>
34586                        <access>read-write</access>
34587                    </field>
34588                    <field>
34589                        <name>PCSAMPLENA</name>
34590                        <description>Enables use of POSTCNT counter as a timer for Periodic PC Sample packet generation</description>
34591                        <bitRange>[12:12]</bitRange>
34592                        <access>read-write</access>
34593                    </field>
34594                    <field>
34595                        <name>SYNCTAP</name>
34596                        <description>Selects the position of the synchronization packet counter tap on the CYCCNT counter. This determines the Synchronization packet rate</description>
34597                        <bitRange>[11:10]</bitRange>
34598                        <access>read-write</access>
34599                    </field>
34600                    <field>
34601                        <name>CYCTAP</name>
34602                        <description>Selects the position of the POSTCNT tap on the CYCCNT counter</description>
34603                        <bitRange>[9:9]</bitRange>
34604                        <access>read-write</access>
34605                    </field>
34606                    <field>
34607                        <name>POSTINIT</name>
34608                        <description>Initial value for the POSTCNT counter</description>
34609                        <bitRange>[8:5]</bitRange>
34610                        <access>read-write</access>
34611                    </field>
34612                    <field>
34613                        <name>POSTPRESET</name>
34614                        <description>Reload value for the POSTCNT counter</description>
34615                        <bitRange>[4:1]</bitRange>
34616                        <access>read-write</access>
34617                    </field>
34618                    <field>
34619                        <name>CYCCNTENA</name>
34620                        <description>Enables CYCCNT</description>
34621                        <bitRange>[0:0]</bitRange>
34622                        <access>read-write</access>
34623                    </field>
34624                </fields>
34625            </register>
34626            <register>
34627                <name>DWT_CYCCNT</name>
34628                <addressOffset>0x00001004</addressOffset>
34629                <description>Shows or sets the value of the processor cycle counter, CYCCNT</description>
34630                <resetValue>0x00000000</resetValue>
34631                <fields>
34632                    <field>
34633                        <name>CYCCNT</name>
34634                        <description>Increments one on each processor clock cycle when DWT_CTRL.CYCCNTENA == 1 and DEMCR.TRCENA == 1. On overflow, CYCCNT wraps to zero</description>
34635                        <bitRange>[31:0]</bitRange>
34636                        <access>read-write</access>
34637                    </field>
34638                </fields>
34639            </register>
34640            <register>
34641                <name>DWT_EXCCNT</name>
34642                <addressOffset>0x0000100c</addressOffset>
34643                <description>Counts the total cycles spent in exception processing</description>
34644                <resetValue>0x00000000</resetValue>
34645                <fields>
34646                    <field>
34647                        <name>EXCCNT</name>
34648                        <description>Counts one on each cycle when all of the following are true: - DWT_CTRL.EXCEVTENA == 1 and DEMCR.TRCENA == 1. - No instruction is executed, see DWT_CPICNT. - An exception-entry or exception-exit related operation is in progress. - Either SecureNoninvasiveDebugAllowed() == TRUE, or NS-Req for the operation is set to Non-secure and NoninvasiveDebugAllowed() == TRUE.</description>
34649                        <bitRange>[7:0]</bitRange>
34650                        <access>read-write</access>
34651                    </field>
34652                </fields>
34653            </register>
34654            <register>
34655                <name>DWT_LSUCNT</name>
34656                <addressOffset>0x00001014</addressOffset>
34657                <description>Increments on the additional cycles required to execute all load or store instructions</description>
34658                <resetValue>0x00000000</resetValue>
34659                <fields>
34660                    <field>
34661                        <name>LSUCNT</name>
34662                        <description>Counts one on each cycle when all of the following are true: - DWT_CTRL.LSUEVTENA == 1 and DEMCR.TRCENA == 1. - No instruction is executed, see DWT_CPICNT. - No exception-entry or exception-exit operation is in progress, see DWT_EXCCNT. - A load-store operation is in progress. - Either SecureNoninvasiveDebugAllowed() == TRUE, or NS-Req for the operation is set to Non-secure and NoninvasiveDebugAllowed() == TRUE.</description>
34663                        <bitRange>[7:0]</bitRange>
34664                        <access>read-write</access>
34665                    </field>
34666                </fields>
34667            </register>
34668            <register>
34669                <name>DWT_FOLDCNT</name>
34670                <addressOffset>0x00001018</addressOffset>
34671                <description>Increments on the additional cycles required to execute all load or store instructions</description>
34672                <resetValue>0x00000000</resetValue>
34673                <fields>
34674                    <field>
34675                        <name>FOLDCNT</name>
34676                        <description>Counts on each cycle when all of the following are true: - DWT_CTRL.FOLDEVTENA == 1 and DEMCR.TRCENA == 1. - At least two instructions are executed, see DWT_CPICNT. - Either SecureNoninvasiveDebugAllowed() == TRUE, or the PE is in Non-secure state and NoninvasiveDebugAllowed() == TRUE. The counter is incremented by the number of instructions executed, minus one</description>
34677                        <bitRange>[7:0]</bitRange>
34678                        <access>read-write</access>
34679                    </field>
34680                </fields>
34681            </register>
34682            <register>
34683                <name>DWT_COMP0</name>
34684                <addressOffset>0x00001020</addressOffset>
34685                <description>Provides a reference value for use by watchpoint comparator 0</description>
34686                <resetValue>0x00000000</resetValue>
34687                <fields>
34688                    <field>
34689                        <name>DWT_COMP0</name>
34690                        <bitRange>[31:0]</bitRange>
34691                        <access>read-write</access>
34692                    </field>
34693                </fields>
34694            </register>
34695            <register>
34696                <name>DWT_FUNCTION0</name>
34697                <addressOffset>0x00001028</addressOffset>
34698                <description>Controls the operation of watchpoint comparator 0</description>
34699                <resetValue>0x58000000</resetValue>
34700                <fields>
34701                    <field>
34702                        <name>ID</name>
34703                        <description>Identifies the capabilities for MATCH for comparator *n</description>
34704                        <bitRange>[31:27]</bitRange>
34705                        <access>read-only</access>
34706                    </field>
34707                    <field>
34708                        <name>MATCHED</name>
34709                        <description>Set to 1 when the comparator matches</description>
34710                        <bitRange>[24:24]</bitRange>
34711                        <access>read-only</access>
34712                    </field>
34713                    <field>
34714                        <name>DATAVSIZE</name>
34715                        <description>Defines the size of the object being watched for by Data Value and Data Address comparators</description>
34716                        <bitRange>[11:10]</bitRange>
34717                        <access>read-write</access>
34718                    </field>
34719                    <field>
34720                        <name>ACTION</name>
34721                        <description>Defines the action on a match. This field is ignored and the comparator generates no actions if it is disabled by MATCH</description>
34722                        <bitRange>[5:4]</bitRange>
34723                        <access>read-write</access>
34724                    </field>
34725                    <field>
34726                        <name>MATCH</name>
34727                        <description>Controls the type of match generated by this comparator</description>
34728                        <bitRange>[3:0]</bitRange>
34729                        <access>read-write</access>
34730                    </field>
34731                </fields>
34732            </register>
34733            <register>
34734                <name>DWT_COMP1</name>
34735                <addressOffset>0x00001030</addressOffset>
34736                <description>Provides a reference value for use by watchpoint comparator 1</description>
34737                <resetValue>0x00000000</resetValue>
34738                <fields>
34739                    <field>
34740                        <name>DWT_COMP1</name>
34741                        <bitRange>[31:0]</bitRange>
34742                        <access>read-write</access>
34743                    </field>
34744                </fields>
34745            </register>
34746            <register>
34747                <name>DWT_FUNCTION1</name>
34748                <addressOffset>0x00001038</addressOffset>
34749                <description>Controls the operation of watchpoint comparator 1</description>
34750                <resetValue>0x89000828</resetValue>
34751                <fields>
34752                    <field>
34753                        <name>ID</name>
34754                        <description>Identifies the capabilities for MATCH for comparator *n</description>
34755                        <bitRange>[31:27]</bitRange>
34756                        <access>read-only</access>
34757                    </field>
34758                    <field>
34759                        <name>MATCHED</name>
34760                        <description>Set to 1 when the comparator matches</description>
34761                        <bitRange>[24:24]</bitRange>
34762                        <access>read-only</access>
34763                    </field>
34764                    <field>
34765                        <name>DATAVSIZE</name>
34766                        <description>Defines the size of the object being watched for by Data Value and Data Address comparators</description>
34767                        <bitRange>[11:10]</bitRange>
34768                        <access>read-write</access>
34769                    </field>
34770                    <field>
34771                        <name>ACTION</name>
34772                        <description>Defines the action on a match. This field is ignored and the comparator generates no actions if it is disabled by MATCH</description>
34773                        <bitRange>[5:4]</bitRange>
34774                        <access>read-write</access>
34775                    </field>
34776                    <field>
34777                        <name>MATCH</name>
34778                        <description>Controls the type of match generated by this comparator</description>
34779                        <bitRange>[3:0]</bitRange>
34780                        <access>read-write</access>
34781                    </field>
34782                </fields>
34783            </register>
34784            <register>
34785                <name>DWT_COMP2</name>
34786                <addressOffset>0x00001040</addressOffset>
34787                <description>Provides a reference value for use by watchpoint comparator 2</description>
34788                <resetValue>0x00000000</resetValue>
34789                <fields>
34790                    <field>
34791                        <name>DWT_COMP2</name>
34792                        <bitRange>[31:0]</bitRange>
34793                        <access>read-write</access>
34794                    </field>
34795                </fields>
34796            </register>
34797            <register>
34798                <name>DWT_FUNCTION2</name>
34799                <addressOffset>0x00001048</addressOffset>
34800                <description>Controls the operation of watchpoint comparator 2</description>
34801                <resetValue>0x50000000</resetValue>
34802                <fields>
34803                    <field>
34804                        <name>ID</name>
34805                        <description>Identifies the capabilities for MATCH for comparator *n</description>
34806                        <bitRange>[31:27]</bitRange>
34807                        <access>read-only</access>
34808                    </field>
34809                    <field>
34810                        <name>MATCHED</name>
34811                        <description>Set to 1 when the comparator matches</description>
34812                        <bitRange>[24:24]</bitRange>
34813                        <access>read-only</access>
34814                    </field>
34815                    <field>
34816                        <name>DATAVSIZE</name>
34817                        <description>Defines the size of the object being watched for by Data Value and Data Address comparators</description>
34818                        <bitRange>[11:10]</bitRange>
34819                        <access>read-write</access>
34820                    </field>
34821                    <field>
34822                        <name>ACTION</name>
34823                        <description>Defines the action on a match. This field is ignored and the comparator generates no actions if it is disabled by MATCH</description>
34824                        <bitRange>[5:4]</bitRange>
34825                        <access>read-write</access>
34826                    </field>
34827                    <field>
34828                        <name>MATCH</name>
34829                        <description>Controls the type of match generated by this comparator</description>
34830                        <bitRange>[3:0]</bitRange>
34831                        <access>read-write</access>
34832                    </field>
34833                </fields>
34834            </register>
34835            <register>
34836                <name>DWT_COMP3</name>
34837                <addressOffset>0x00001050</addressOffset>
34838                <description>Provides a reference value for use by watchpoint comparator 3</description>
34839                <resetValue>0x00000000</resetValue>
34840                <fields>
34841                    <field>
34842                        <name>DWT_COMP3</name>
34843                        <bitRange>[31:0]</bitRange>
34844                        <access>read-write</access>
34845                    </field>
34846                </fields>
34847            </register>
34848            <register>
34849                <name>DWT_FUNCTION3</name>
34850                <addressOffset>0x00001058</addressOffset>
34851                <description>Controls the operation of watchpoint comparator 3</description>
34852                <resetValue>0x20000800</resetValue>
34853                <fields>
34854                    <field>
34855                        <name>ID</name>
34856                        <description>Identifies the capabilities for MATCH for comparator *n</description>
34857                        <bitRange>[31:27]</bitRange>
34858                        <access>read-only</access>
34859                    </field>
34860                    <field>
34861                        <name>MATCHED</name>
34862                        <description>Set to 1 when the comparator matches</description>
34863                        <bitRange>[24:24]</bitRange>
34864                        <access>read-only</access>
34865                    </field>
34866                    <field>
34867                        <name>DATAVSIZE</name>
34868                        <description>Defines the size of the object being watched for by Data Value and Data Address comparators</description>
34869                        <bitRange>[11:10]</bitRange>
34870                        <access>read-write</access>
34871                    </field>
34872                    <field>
34873                        <name>ACTION</name>
34874                        <description>Defines the action on a match. This field is ignored and the comparator generates no actions if it is disabled by MATCH</description>
34875                        <bitRange>[5:4]</bitRange>
34876                        <access>read-write</access>
34877                    </field>
34878                    <field>
34879                        <name>MATCH</name>
34880                        <description>Controls the type of match generated by this comparator</description>
34881                        <bitRange>[3:0]</bitRange>
34882                        <access>read-write</access>
34883                    </field>
34884                </fields>
34885            </register>
34886            <register>
34887                <name>DWT_DEVARCH</name>
34888                <addressOffset>0x00001fbc</addressOffset>
34889                <description>Provides CoreSight discovery information for the DWT</description>
34890                <resetValue>0x47701a02</resetValue>
34891                <fields>
34892                    <field>
34893                        <name>ARCHITECT</name>
34894                        <description>Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.</description>
34895                        <bitRange>[31:21]</bitRange>
34896                        <access>read-only</access>
34897                    </field>
34898                    <field>
34899                        <name>PRESENT</name>
34900                        <description>Defines that the DEVARCH register is present</description>
34901                        <bitRange>[20:20]</bitRange>
34902                        <access>read-only</access>
34903                    </field>
34904                    <field>
34905                        <name>REVISION</name>
34906                        <description>Defines the architecture revision of the component</description>
34907                        <bitRange>[19:16]</bitRange>
34908                        <access>read-only</access>
34909                    </field>
34910                    <field>
34911                        <name>ARCHVER</name>
34912                        <description>Defines the architecture version of the component</description>
34913                        <bitRange>[15:12]</bitRange>
34914                        <access>read-only</access>
34915                    </field>
34916                    <field>
34917                        <name>ARCHPART</name>
34918                        <description>Defines the architecture of the component</description>
34919                        <bitRange>[11:0]</bitRange>
34920                        <access>read-only</access>
34921                    </field>
34922                </fields>
34923            </register>
34924            <register>
34925                <name>DWT_DEVTYPE</name>
34926                <addressOffset>0x00001fcc</addressOffset>
34927                <description>Provides CoreSight discovery information for the DWT</description>
34928                <resetValue>0x00000000</resetValue>
34929                <fields>
34930                    <field>
34931                        <name>SUB</name>
34932                        <description>Component sub-type</description>
34933                        <bitRange>[7:4]</bitRange>
34934                        <access>read-only</access>
34935                    </field>
34936                    <field>
34937                        <name>MAJOR</name>
34938                        <description>Component major type</description>
34939                        <bitRange>[3:0]</bitRange>
34940                        <access>read-only</access>
34941                    </field>
34942                </fields>
34943            </register>
34944            <register>
34945                <name>DWT_PIDR4</name>
34946                <addressOffset>0x00001fd0</addressOffset>
34947                <description>Provides CoreSight discovery information for the DWT</description>
34948                <resetValue>0x00000004</resetValue>
34949                <fields>
34950                    <field>
34951                        <name>SIZE</name>
34952                        <description>See CoreSight Architecture Specification</description>
34953                        <bitRange>[7:4]</bitRange>
34954                        <access>read-only</access>
34955                    </field>
34956                    <field>
34957                        <name>DES_2</name>
34958                        <description>See CoreSight Architecture Specification</description>
34959                        <bitRange>[3:0]</bitRange>
34960                        <access>read-only</access>
34961                    </field>
34962                </fields>
34963            </register>
34964            <register>
34965                <name>DWT_PIDR5</name>
34966                <addressOffset>0x00001fd4</addressOffset>
34967                <description>Provides CoreSight discovery information for the DWT</description>
34968                <resetValue>0x00000000</resetValue>
34969                <fields>
34970                    <field>
34971                        <name>DWT_PIDR5</name>
34972                        <bitRange>[31:0]</bitRange>
34973                        <access>read-write</access>
34974                    </field>
34975                </fields>
34976            </register>
34977            <register>
34978                <name>DWT_PIDR6</name>
34979                <addressOffset>0x00001fd8</addressOffset>
34980                <description>Provides CoreSight discovery information for the DWT</description>
34981                <resetValue>0x00000000</resetValue>
34982                <fields>
34983                    <field>
34984                        <name>DWT_PIDR6</name>
34985                        <bitRange>[31:0]</bitRange>
34986                        <access>read-write</access>
34987                    </field>
34988                </fields>
34989            </register>
34990            <register>
34991                <name>DWT_PIDR7</name>
34992                <addressOffset>0x00001fdc</addressOffset>
34993                <description>Provides CoreSight discovery information for the DWT</description>
34994                <resetValue>0x00000000</resetValue>
34995                <fields>
34996                    <field>
34997                        <name>DWT_PIDR7</name>
34998                        <bitRange>[31:0]</bitRange>
34999                        <access>read-write</access>
35000                    </field>
35001                </fields>
35002            </register>
35003            <register>
35004                <name>DWT_PIDR0</name>
35005                <addressOffset>0x00001fe0</addressOffset>
35006                <description>Provides CoreSight discovery information for the DWT</description>
35007                <resetValue>0x00000021</resetValue>
35008                <fields>
35009                    <field>
35010                        <name>PART_0</name>
35011                        <description>See CoreSight Architecture Specification</description>
35012                        <bitRange>[7:0]</bitRange>
35013                        <access>read-only</access>
35014                    </field>
35015                </fields>
35016            </register>
35017            <register>
35018                <name>DWT_PIDR1</name>
35019                <addressOffset>0x00001fe4</addressOffset>
35020                <description>Provides CoreSight discovery information for the DWT</description>
35021                <resetValue>0x000000bd</resetValue>
35022                <fields>
35023                    <field>
35024                        <name>DES_0</name>
35025                        <description>See CoreSight Architecture Specification</description>
35026                        <bitRange>[7:4]</bitRange>
35027                        <access>read-only</access>
35028                    </field>
35029                    <field>
35030                        <name>PART_1</name>
35031                        <description>See CoreSight Architecture Specification</description>
35032                        <bitRange>[3:0]</bitRange>
35033                        <access>read-only</access>
35034                    </field>
35035                </fields>
35036            </register>
35037            <register>
35038                <name>DWT_PIDR2</name>
35039                <addressOffset>0x00001fe8</addressOffset>
35040                <description>Provides CoreSight discovery information for the DWT</description>
35041                <resetValue>0x0000000b</resetValue>
35042                <fields>
35043                    <field>
35044                        <name>REVISION</name>
35045                        <description>See CoreSight Architecture Specification</description>
35046                        <bitRange>[7:4]</bitRange>
35047                        <access>read-only</access>
35048                    </field>
35049                    <field>
35050                        <name>JEDEC</name>
35051                        <description>See CoreSight Architecture Specification</description>
35052                        <bitRange>[3:3]</bitRange>
35053                        <access>read-only</access>
35054                    </field>
35055                    <field>
35056                        <name>DES_1</name>
35057                        <description>See CoreSight Architecture Specification</description>
35058                        <bitRange>[2:0]</bitRange>
35059                        <access>read-only</access>
35060                    </field>
35061                </fields>
35062            </register>
35063            <register>
35064                <name>DWT_PIDR3</name>
35065                <addressOffset>0x00001fec</addressOffset>
35066                <description>Provides CoreSight discovery information for the DWT</description>
35067                <resetValue>0x00000000</resetValue>
35068                <fields>
35069                    <field>
35070                        <name>REVAND</name>
35071                        <description>See CoreSight Architecture Specification</description>
35072                        <bitRange>[7:4]</bitRange>
35073                        <access>read-only</access>
35074                    </field>
35075                    <field>
35076                        <name>CMOD</name>
35077                        <description>See CoreSight Architecture Specification</description>
35078                        <bitRange>[3:0]</bitRange>
35079                        <access>read-only</access>
35080                    </field>
35081                </fields>
35082            </register>
35083            <register>
35084                <name>DWT_CIDR0</name>
35085                <addressOffset>0x00001ff0</addressOffset>
35086                <description>Provides CoreSight discovery information for the DWT</description>
35087                <resetValue>0x0000000d</resetValue>
35088                <fields>
35089                    <field>
35090                        <name>PRMBL_0</name>
35091                        <description>See CoreSight Architecture Specification</description>
35092                        <bitRange>[7:0]</bitRange>
35093                        <access>read-only</access>
35094                    </field>
35095                </fields>
35096            </register>
35097            <register>
35098                <name>DWT_CIDR1</name>
35099                <addressOffset>0x00001ff4</addressOffset>
35100                <description>Provides CoreSight discovery information for the DWT</description>
35101                <resetValue>0x00000090</resetValue>
35102                <fields>
35103                    <field>
35104                        <name>CLASS</name>
35105                        <description>See CoreSight Architecture Specification</description>
35106                        <bitRange>[7:4]</bitRange>
35107                        <access>read-only</access>
35108                    </field>
35109                    <field>
35110                        <name>PRMBL_1</name>
35111                        <description>See CoreSight Architecture Specification</description>
35112                        <bitRange>[3:0]</bitRange>
35113                        <access>read-only</access>
35114                    </field>
35115                </fields>
35116            </register>
35117            <register>
35118                <name>DWT_CIDR2</name>
35119                <addressOffset>0x00001ff8</addressOffset>
35120                <description>Provides CoreSight discovery information for the DWT</description>
35121                <resetValue>0x00000005</resetValue>
35122                <fields>
35123                    <field>
35124                        <name>PRMBL_2</name>
35125                        <description>See CoreSight Architecture Specification</description>
35126                        <bitRange>[7:0]</bitRange>
35127                        <access>read-only</access>
35128                    </field>
35129                </fields>
35130            </register>
35131            <register>
35132                <name>DWT_CIDR3</name>
35133                <addressOffset>0x00001ffc</addressOffset>
35134                <description>Provides CoreSight discovery information for the DWT</description>
35135                <resetValue>0x000000b1</resetValue>
35136                <fields>
35137                    <field>
35138                        <name>PRMBL_3</name>
35139                        <description>See CoreSight Architecture Specification</description>
35140                        <bitRange>[7:0]</bitRange>
35141                        <access>read-only</access>
35142                    </field>
35143                </fields>
35144            </register>
35145            <register>
35146                <name>FP_CTRL</name>
35147                <addressOffset>0x00002000</addressOffset>
35148                <description>Provides FPB implementation information, and the global enable for the FPB unit</description>
35149                <resetValue>0x60005580</resetValue>
35150                <fields>
35151                    <field>
35152                        <name>REV</name>
35153                        <description>Flash Patch and Breakpoint Unit architecture revision</description>
35154                        <bitRange>[31:28]</bitRange>
35155                        <access>read-only</access>
35156                    </field>
35157                    <field>
35158                        <name>NUM_CODE_14_12_</name>
35159                        <description>Indicates the number of implemented instruction address comparators. Zero indicates no Instruction Address comparators are implemented. The Instruction Address comparators are numbered from 0 to NUM_CODE - 1</description>
35160                        <bitRange>[14:12]</bitRange>
35161                        <access>read-only</access>
35162                    </field>
35163                    <field>
35164                        <name>NUM_LIT</name>
35165                        <description>Indicates the number of implemented literal address comparators. The Literal Address comparators are numbered from NUM_CODE to NUM_CODE + NUM_LIT - 1</description>
35166                        <bitRange>[11:8]</bitRange>
35167                        <access>read-only</access>
35168                    </field>
35169                    <field>
35170                        <name>NUM_CODE_7_4_</name>
35171                        <description>Indicates the number of implemented instruction address comparators. Zero indicates no Instruction Address comparators are implemented. The Instruction Address comparators are numbered from 0 to NUM_CODE - 1</description>
35172                        <bitRange>[7:4]</bitRange>
35173                        <access>read-only</access>
35174                    </field>
35175                    <field>
35176                        <name>KEY</name>
35177                        <description>Writes to the FP_CTRL are ignored unless KEY is concurrently written to one</description>
35178                        <bitRange>[1:1]</bitRange>
35179                        <access>read-write</access>
35180                    </field>
35181                    <field>
35182                        <name>ENABLE</name>
35183                        <description>Enables the FPB</description>
35184                        <bitRange>[0:0]</bitRange>
35185                        <access>read-write</access>
35186                    </field>
35187                </fields>
35188            </register>
35189            <register>
35190                <name>FP_REMAP</name>
35191                <addressOffset>0x00002004</addressOffset>
35192                <description>Indicates whether the implementation supports Flash Patch remap and, if it does, holds the target address for remap</description>
35193                <resetValue>0x00000000</resetValue>
35194                <fields>
35195                    <field>
35196                        <name>RMPSPT</name>
35197                        <description>Indicates whether the FPB unit supports the Flash Patch remap function</description>
35198                        <bitRange>[29:29]</bitRange>
35199                        <access>read-only</access>
35200                    </field>
35201                    <field>
35202                        <name>REMAP</name>
35203                        <description>Holds the bits[28:5] of the Flash Patch remap address</description>
35204                        <bitRange>[28:5]</bitRange>
35205                        <access>read-only</access>
35206                    </field>
35207                </fields>
35208            </register>
35209            <register>
35210                <name>FP_COMP0</name>
35211                <addressOffset>0x00002008</addressOffset>
35212                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35213                <resetValue>0x00000000</resetValue>
35214                <fields>
35215                    <field>
35216                        <name>BE</name>
35217                        <description>Selects between flashpatch and breakpoint functionality</description>
35218                        <bitRange>[0:0]</bitRange>
35219                        <access>read-write</access>
35220                    </field>
35221                </fields>
35222            </register>
35223            <register>
35224                <name>FP_COMP1</name>
35225                <addressOffset>0x0000200c</addressOffset>
35226                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35227                <resetValue>0x00000000</resetValue>
35228                <fields>
35229                    <field>
35230                        <name>BE</name>
35231                        <description>Selects between flashpatch and breakpoint functionality</description>
35232                        <bitRange>[0:0]</bitRange>
35233                        <access>read-write</access>
35234                    </field>
35235                </fields>
35236            </register>
35237            <register>
35238                <name>FP_COMP2</name>
35239                <addressOffset>0x00002010</addressOffset>
35240                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35241                <resetValue>0x00000000</resetValue>
35242                <fields>
35243                    <field>
35244                        <name>BE</name>
35245                        <description>Selects between flashpatch and breakpoint functionality</description>
35246                        <bitRange>[0:0]</bitRange>
35247                        <access>read-write</access>
35248                    </field>
35249                </fields>
35250            </register>
35251            <register>
35252                <name>FP_COMP3</name>
35253                <addressOffset>0x00002014</addressOffset>
35254                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35255                <resetValue>0x00000000</resetValue>
35256                <fields>
35257                    <field>
35258                        <name>BE</name>
35259                        <description>Selects between flashpatch and breakpoint functionality</description>
35260                        <bitRange>[0:0]</bitRange>
35261                        <access>read-write</access>
35262                    </field>
35263                </fields>
35264            </register>
35265            <register>
35266                <name>FP_COMP4</name>
35267                <addressOffset>0x00002018</addressOffset>
35268                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35269                <resetValue>0x00000000</resetValue>
35270                <fields>
35271                    <field>
35272                        <name>BE</name>
35273                        <description>Selects between flashpatch and breakpoint functionality</description>
35274                        <bitRange>[0:0]</bitRange>
35275                        <access>read-write</access>
35276                    </field>
35277                </fields>
35278            </register>
35279            <register>
35280                <name>FP_COMP5</name>
35281                <addressOffset>0x0000201c</addressOffset>
35282                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35283                <resetValue>0x00000000</resetValue>
35284                <fields>
35285                    <field>
35286                        <name>BE</name>
35287                        <description>Selects between flashpatch and breakpoint functionality</description>
35288                        <bitRange>[0:0]</bitRange>
35289                        <access>read-write</access>
35290                    </field>
35291                </fields>
35292            </register>
35293            <register>
35294                <name>FP_COMP6</name>
35295                <addressOffset>0x00002020</addressOffset>
35296                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35297                <resetValue>0x00000000</resetValue>
35298                <fields>
35299                    <field>
35300                        <name>BE</name>
35301                        <description>Selects between flashpatch and breakpoint functionality</description>
35302                        <bitRange>[0:0]</bitRange>
35303                        <access>read-write</access>
35304                    </field>
35305                </fields>
35306            </register>
35307            <register>
35308                <name>FP_COMP7</name>
35309                <addressOffset>0x00002024</addressOffset>
35310                <description>Holds an address for comparison. The effect of the match depends on the configuration of the FPB and whether the comparator is an instruction address comparator or a literal address comparator</description>
35311                <resetValue>0x00000000</resetValue>
35312                <fields>
35313                    <field>
35314                        <name>BE</name>
35315                        <description>Selects between flashpatch and breakpoint functionality</description>
35316                        <bitRange>[0:0]</bitRange>
35317                        <access>read-write</access>
35318                    </field>
35319                </fields>
35320            </register>
35321            <register>
35322                <name>FP_DEVARCH</name>
35323                <addressOffset>0x00002fbc</addressOffset>
35324                <description>Provides CoreSight discovery information for the FPB</description>
35325                <resetValue>0x47701a03</resetValue>
35326                <fields>
35327                    <field>
35328                        <name>ARCHITECT</name>
35329                        <description>Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.</description>
35330                        <bitRange>[31:21]</bitRange>
35331                        <access>read-only</access>
35332                    </field>
35333                    <field>
35334                        <name>PRESENT</name>
35335                        <description>Defines that the DEVARCH register is present</description>
35336                        <bitRange>[20:20]</bitRange>
35337                        <access>read-only</access>
35338                    </field>
35339                    <field>
35340                        <name>REVISION</name>
35341                        <description>Defines the architecture revision of the component</description>
35342                        <bitRange>[19:16]</bitRange>
35343                        <access>read-only</access>
35344                    </field>
35345                    <field>
35346                        <name>ARCHVER</name>
35347                        <description>Defines the architecture version of the component</description>
35348                        <bitRange>[15:12]</bitRange>
35349                        <access>read-only</access>
35350                    </field>
35351                    <field>
35352                        <name>ARCHPART</name>
35353                        <description>Defines the architecture of the component</description>
35354                        <bitRange>[11:0]</bitRange>
35355                        <access>read-only</access>
35356                    </field>
35357                </fields>
35358            </register>
35359            <register>
35360                <name>FP_DEVTYPE</name>
35361                <addressOffset>0x00002fcc</addressOffset>
35362                <description>Provides CoreSight discovery information for the FPB</description>
35363                <resetValue>0x00000000</resetValue>
35364                <fields>
35365                    <field>
35366                        <name>SUB</name>
35367                        <description>Component sub-type</description>
35368                        <bitRange>[7:4]</bitRange>
35369                        <access>read-only</access>
35370                    </field>
35371                    <field>
35372                        <name>MAJOR</name>
35373                        <description>Component major type</description>
35374                        <bitRange>[3:0]</bitRange>
35375                        <access>read-only</access>
35376                    </field>
35377                </fields>
35378            </register>
35379            <register>
35380                <name>FP_PIDR4</name>
35381                <addressOffset>0x00002fd0</addressOffset>
35382                <description>Provides CoreSight discovery information for the FP</description>
35383                <resetValue>0x00000004</resetValue>
35384                <fields>
35385                    <field>
35386                        <name>SIZE</name>
35387                        <description>See CoreSight Architecture Specification</description>
35388                        <bitRange>[7:4]</bitRange>
35389                        <access>read-only</access>
35390                    </field>
35391                    <field>
35392                        <name>DES_2</name>
35393                        <description>See CoreSight Architecture Specification</description>
35394                        <bitRange>[3:0]</bitRange>
35395                        <access>read-only</access>
35396                    </field>
35397                </fields>
35398            </register>
35399            <register>
35400                <name>FP_PIDR5</name>
35401                <addressOffset>0x00002fd4</addressOffset>
35402                <description>Provides CoreSight discovery information for the FP</description>
35403                <resetValue>0x00000000</resetValue>
35404                <fields>
35405                    <field>
35406                        <name>FP_PIDR5</name>
35407                        <bitRange>[31:0]</bitRange>
35408                        <access>read-write</access>
35409                    </field>
35410                </fields>
35411            </register>
35412            <register>
35413                <name>FP_PIDR6</name>
35414                <addressOffset>0x00002fd8</addressOffset>
35415                <description>Provides CoreSight discovery information for the FP</description>
35416                <resetValue>0x00000000</resetValue>
35417                <fields>
35418                    <field>
35419                        <name>FP_PIDR6</name>
35420                        <bitRange>[31:0]</bitRange>
35421                        <access>read-write</access>
35422                    </field>
35423                </fields>
35424            </register>
35425            <register>
35426                <name>FP_PIDR7</name>
35427                <addressOffset>0x00002fdc</addressOffset>
35428                <description>Provides CoreSight discovery information for the FP</description>
35429                <resetValue>0x00000000</resetValue>
35430                <fields>
35431                    <field>
35432                        <name>FP_PIDR7</name>
35433                        <bitRange>[31:0]</bitRange>
35434                        <access>read-write</access>
35435                    </field>
35436                </fields>
35437            </register>
35438            <register>
35439                <name>FP_PIDR0</name>
35440                <addressOffset>0x00002fe0</addressOffset>
35441                <description>Provides CoreSight discovery information for the FP</description>
35442                <resetValue>0x00000021</resetValue>
35443                <fields>
35444                    <field>
35445                        <name>PART_0</name>
35446                        <description>See CoreSight Architecture Specification</description>
35447                        <bitRange>[7:0]</bitRange>
35448                        <access>read-only</access>
35449                    </field>
35450                </fields>
35451            </register>
35452            <register>
35453                <name>FP_PIDR1</name>
35454                <addressOffset>0x00002fe4</addressOffset>
35455                <description>Provides CoreSight discovery information for the FP</description>
35456                <resetValue>0x000000bd</resetValue>
35457                <fields>
35458                    <field>
35459                        <name>DES_0</name>
35460                        <description>See CoreSight Architecture Specification</description>
35461                        <bitRange>[7:4]</bitRange>
35462                        <access>read-only</access>
35463                    </field>
35464                    <field>
35465                        <name>PART_1</name>
35466                        <description>See CoreSight Architecture Specification</description>
35467                        <bitRange>[3:0]</bitRange>
35468                        <access>read-only</access>
35469                    </field>
35470                </fields>
35471            </register>
35472            <register>
35473                <name>FP_PIDR2</name>
35474                <addressOffset>0x00002fe8</addressOffset>
35475                <description>Provides CoreSight discovery information for the FP</description>
35476                <resetValue>0x0000000b</resetValue>
35477                <fields>
35478                    <field>
35479                        <name>REVISION</name>
35480                        <description>See CoreSight Architecture Specification</description>
35481                        <bitRange>[7:4]</bitRange>
35482                        <access>read-only</access>
35483                    </field>
35484                    <field>
35485                        <name>JEDEC</name>
35486                        <description>See CoreSight Architecture Specification</description>
35487                        <bitRange>[3:3]</bitRange>
35488                        <access>read-only</access>
35489                    </field>
35490                    <field>
35491                        <name>DES_1</name>
35492                        <description>See CoreSight Architecture Specification</description>
35493                        <bitRange>[2:0]</bitRange>
35494                        <access>read-only</access>
35495                    </field>
35496                </fields>
35497            </register>
35498            <register>
35499                <name>FP_PIDR3</name>
35500                <addressOffset>0x00002fec</addressOffset>
35501                <description>Provides CoreSight discovery information for the FP</description>
35502                <resetValue>0x00000000</resetValue>
35503                <fields>
35504                    <field>
35505                        <name>REVAND</name>
35506                        <description>See CoreSight Architecture Specification</description>
35507                        <bitRange>[7:4]</bitRange>
35508                        <access>read-only</access>
35509                    </field>
35510                    <field>
35511                        <name>CMOD</name>
35512                        <description>See CoreSight Architecture Specification</description>
35513                        <bitRange>[3:0]</bitRange>
35514                        <access>read-only</access>
35515                    </field>
35516                </fields>
35517            </register>
35518            <register>
35519                <name>FP_CIDR0</name>
35520                <addressOffset>0x00002ff0</addressOffset>
35521                <description>Provides CoreSight discovery information for the FP</description>
35522                <resetValue>0x0000000d</resetValue>
35523                <fields>
35524                    <field>
35525                        <name>PRMBL_0</name>
35526                        <description>See CoreSight Architecture Specification</description>
35527                        <bitRange>[7:0]</bitRange>
35528                        <access>read-only</access>
35529                    </field>
35530                </fields>
35531            </register>
35532            <register>
35533                <name>FP_CIDR1</name>
35534                <addressOffset>0x00002ff4</addressOffset>
35535                <description>Provides CoreSight discovery information for the FP</description>
35536                <resetValue>0x00000090</resetValue>
35537                <fields>
35538                    <field>
35539                        <name>CLASS</name>
35540                        <description>See CoreSight Architecture Specification</description>
35541                        <bitRange>[7:4]</bitRange>
35542                        <access>read-only</access>
35543                    </field>
35544                    <field>
35545                        <name>PRMBL_1</name>
35546                        <description>See CoreSight Architecture Specification</description>
35547                        <bitRange>[3:0]</bitRange>
35548                        <access>read-only</access>
35549                    </field>
35550                </fields>
35551            </register>
35552            <register>
35553                <name>FP_CIDR2</name>
35554                <addressOffset>0x00002ff8</addressOffset>
35555                <description>Provides CoreSight discovery information for the FP</description>
35556                <resetValue>0x00000005</resetValue>
35557                <fields>
35558                    <field>
35559                        <name>PRMBL_2</name>
35560                        <description>See CoreSight Architecture Specification</description>
35561                        <bitRange>[7:0]</bitRange>
35562                        <access>read-only</access>
35563                    </field>
35564                </fields>
35565            </register>
35566            <register>
35567                <name>FP_CIDR3</name>
35568                <addressOffset>0x00002ffc</addressOffset>
35569                <description>Provides CoreSight discovery information for the FP</description>
35570                <resetValue>0x000000b1</resetValue>
35571                <fields>
35572                    <field>
35573                        <name>PRMBL_3</name>
35574                        <description>See CoreSight Architecture Specification</description>
35575                        <bitRange>[7:0]</bitRange>
35576                        <access>read-only</access>
35577                    </field>
35578                </fields>
35579            </register>
35580            <register>
35581                <name>ICTR</name>
35582                <addressOffset>0x0000e004</addressOffset>
35583                <description>Provides information about the interrupt controller</description>
35584                <resetValue>0x00000001</resetValue>
35585                <fields>
35586                    <field>
35587                        <name>INTLINESNUM</name>
35588                        <description>Indicates the number of the highest implemented register in each of the NVIC control register sets, or in the case of NVIC_IPR*n, 4×INTLINESNUM</description>
35589                        <bitRange>[3:0]</bitRange>
35590                        <access>read-only</access>
35591                    </field>
35592                </fields>
35593            </register>
35594            <register>
35595                <name>ACTLR</name>
35596                <addressOffset>0x0000e008</addressOffset>
35597                <description>Provides IMPLEMENTATION DEFINED configuration and control options</description>
35598                <resetValue>0x00000000</resetValue>
35599                <fields>
35600                    <field>
35601                        <name>EXTEXCLALL</name>
35602                        <description>External Exclusives Allowed with no MPU</description>
35603                        <bitRange>[29:29]</bitRange>
35604                        <access>read-write</access>
35605                    </field>
35606                    <field>
35607                        <name>DISITMATBFLUSH</name>
35608                        <description>Disable ATB Flush</description>
35609                        <bitRange>[12:12]</bitRange>
35610                        <access>read-write</access>
35611                    </field>
35612                    <field>
35613                        <name>FPEXCODIS</name>
35614                        <description>Disable FPU exception outputs</description>
35615                        <bitRange>[10:10]</bitRange>
35616                        <access>read-write</access>
35617                    </field>
35618                    <field>
35619                        <name>DISOOFP</name>
35620                        <description>Disable out-of-order FP instruction completion</description>
35621                        <bitRange>[9:9]</bitRange>
35622                        <access>read-write</access>
35623                    </field>
35624                    <field>
35625                        <name>DISFOLD</name>
35626                        <description>Disable dual-issue.</description>
35627                        <bitRange>[2:2]</bitRange>
35628                        <access>read-write</access>
35629                    </field>
35630                    <field>
35631                        <name>DISMCYCINT</name>
35632                        <description>Disable dual-issue.</description>
35633                        <bitRange>[0:0]</bitRange>
35634                        <access>read-write</access>
35635                    </field>
35636                </fields>
35637            </register>
35638            <register>
35639                <name>SYST_CSR</name>
35640                <addressOffset>0x0000e010</addressOffset>
35641                <description>Use the SysTick Control and Status Register to enable the SysTick features.</description>
35642                <resetValue>0x00000000</resetValue>
35643                <fields>
35644                    <field>
35645                        <name>COUNTFLAG</name>
35646                        <description>Returns 1 if timer counted to 0 since last time this was read. Clears on read by application or debugger.</description>
35647                        <bitRange>[16:16]</bitRange>
35648                        <access>read-only</access>
35649                    </field>
35650                    <field>
35651                        <name>CLKSOURCE</name>
35652                        <description>SysTick clock source. Always reads as one if SYST_CALIB reports NOREF.
35653                            Selects the SysTick timer clock source:
35654                            0 = External reference clock.
35655                            1 = Processor clock.</description>
35656                        <bitRange>[2:2]</bitRange>
35657                        <access>read-write</access>
35658                    </field>
35659                    <field>
35660                        <name>TICKINT</name>
35661                        <description>Enables SysTick exception request:
35662                            0 = Counting down to zero does not assert the SysTick exception request.
35663                            1 = Counting down to zero to asserts the SysTick exception request.</description>
35664                        <bitRange>[1:1]</bitRange>
35665                        <access>read-write</access>
35666                    </field>
35667                    <field>
35668                        <name>ENABLE</name>
35669                        <description>Enable SysTick counter:
35670                            0 = Counter disabled.
35671                            1 = Counter enabled.</description>
35672                        <bitRange>[0:0]</bitRange>
35673                        <access>read-write</access>
35674                    </field>
35675                </fields>
35676            </register>
35677            <register>
35678                <name>SYST_RVR</name>
35679                <addressOffset>0x0000e014</addressOffset>
35680                <description>Use the SysTick Reload Value Register to specify the start value to load into the current value register when the counter reaches 0. It can be any value between 0 and 0x00FFFFFF. A start value of 0 is possible, but has no effect because the SysTick interrupt and COUNTFLAG are activated when counting from 1 to 0. The reset value of this register is UNKNOWN.
35681                    To generate a multi-shot timer with a period of N processor clock cycles, use a RELOAD value of N-1. For example, if the SysTick interrupt is required every 100 clock pulses, set RELOAD to 99.</description>
35682                <resetValue>0x00000000</resetValue>
35683                <fields>
35684                    <field>
35685                        <name>RELOAD</name>
35686                        <description>Value to load into the SysTick Current Value Register when the counter reaches 0.</description>
35687                        <bitRange>[23:0]</bitRange>
35688                        <access>read-write</access>
35689                    </field>
35690                </fields>
35691            </register>
35692            <register>
35693                <name>SYST_CVR</name>
35694                <addressOffset>0x0000e018</addressOffset>
35695                <description>Use the SysTick Current Value Register to find the current value in the register. The reset value of this register is UNKNOWN.</description>
35696                <resetValue>0x00000000</resetValue>
35697                <fields>
35698                    <field>
35699                        <name>CURRENT</name>
35700                        <description>Reads return the current value of the SysTick counter. This register is write-clear. Writing to it with any value clears the register to 0. Clearing this register also clears the COUNTFLAG bit of the SysTick Control and Status Register.</description>
35701                        <bitRange>[23:0]</bitRange>
35702                        <access>read-write</access>
35703                    </field>
35704                </fields>
35705            </register>
35706            <register>
35707                <name>SYST_CALIB</name>
35708                <addressOffset>0x0000e01c</addressOffset>
35709                <description>Use the SysTick Calibration Value Register to enable software to scale to any required speed using divide and multiply.</description>
35710                <resetValue>0x00000000</resetValue>
35711                <fields>
35712                    <field>
35713                        <name>NOREF</name>
35714                        <description>If reads as 1, the Reference clock is not provided - the CLKSOURCE bit of the SysTick Control and Status register will be forced to 1 and cannot be cleared to 0.</description>
35715                        <bitRange>[31:31]</bitRange>
35716                        <access>read-only</access>
35717                    </field>
35718                    <field>
35719                        <name>SKEW</name>
35720                        <description>If reads as 1, the calibration value for 10ms is inexact (due to clock frequency).</description>
35721                        <bitRange>[30:30]</bitRange>
35722                        <access>read-only</access>
35723                    </field>
35724                    <field>
35725                        <name>TENMS</name>
35726                        <description>An optional Reload value to be used for 10ms (100Hz) timing, subject to system clock skew errors. If the value reads as 0, the calibration value is not known.</description>
35727                        <bitRange>[23:0]</bitRange>
35728                        <access>read-only</access>
35729                    </field>
35730                </fields>
35731            </register>
35732            <register>
35733                <name>NVIC_ISER0</name>
35734                <addressOffset>0x0000e100</addressOffset>
35735                <description>Enables or reads the enabled state of each group of 32 interrupts</description>
35736                <resetValue>0x00000000</resetValue>
35737                <fields>
35738                    <field>
35739                        <name>SETENA</name>
35740                        <description>For SETENA[m] in NVIC_ISER*n, indicates whether interrupt 32*n + m is enabled</description>
35741                        <bitRange>[31:0]</bitRange>
35742                        <access>read-write</access>
35743                    </field>
35744                </fields>
35745            </register>
35746            <register>
35747                <name>NVIC_ISER1</name>
35748                <addressOffset>0x0000e104</addressOffset>
35749                <description>Enables or reads the enabled state of each group of 32 interrupts</description>
35750                <resetValue>0x00000000</resetValue>
35751                <fields>
35752                    <field>
35753                        <name>SETENA</name>
35754                        <description>For SETENA[m] in NVIC_ISER*n, indicates whether interrupt 32*n + m is enabled</description>
35755                        <bitRange>[31:0]</bitRange>
35756                        <access>read-write</access>
35757                    </field>
35758                </fields>
35759            </register>
35760            <register>
35761                <name>NVIC_ICER0</name>
35762                <addressOffset>0x0000e180</addressOffset>
35763                <description>Clears or reads the enabled state of each group of 32 interrupts</description>
35764                <resetValue>0x00000000</resetValue>
35765                <fields>
35766                    <field>
35767                        <name>CLRENA</name>
35768                        <description>For CLRENA[m] in NVIC_ICER*n, indicates whether interrupt 32*n + m is enabled</description>
35769                        <bitRange>[31:0]</bitRange>
35770                        <access>read-write</access>
35771                    </field>
35772                </fields>
35773            </register>
35774            <register>
35775                <name>NVIC_ICER1</name>
35776                <addressOffset>0x0000e184</addressOffset>
35777                <description>Clears or reads the enabled state of each group of 32 interrupts</description>
35778                <resetValue>0x00000000</resetValue>
35779                <fields>
35780                    <field>
35781                        <name>CLRENA</name>
35782                        <description>For CLRENA[m] in NVIC_ICER*n, indicates whether interrupt 32*n + m is enabled</description>
35783                        <bitRange>[31:0]</bitRange>
35784                        <access>read-write</access>
35785                    </field>
35786                </fields>
35787            </register>
35788            <register>
35789                <name>NVIC_ISPR0</name>
35790                <addressOffset>0x0000e200</addressOffset>
35791                <description>Enables or reads the pending state of each group of 32 interrupts</description>
35792                <resetValue>0x00000000</resetValue>
35793                <fields>
35794                    <field>
35795                        <name>SETPEND</name>
35796                        <description>For SETPEND[m] in NVIC_ISPR*n, indicates whether interrupt 32*n + m is pending</description>
35797                        <bitRange>[31:0]</bitRange>
35798                        <access>read-write</access>
35799                    </field>
35800                </fields>
35801            </register>
35802            <register>
35803                <name>NVIC_ISPR1</name>
35804                <addressOffset>0x0000e204</addressOffset>
35805                <description>Enables or reads the pending state of each group of 32 interrupts</description>
35806                <resetValue>0x00000000</resetValue>
35807                <fields>
35808                    <field>
35809                        <name>SETPEND</name>
35810                        <description>For SETPEND[m] in NVIC_ISPR*n, indicates whether interrupt 32*n + m is pending</description>
35811                        <bitRange>[31:0]</bitRange>
35812                        <access>read-write</access>
35813                    </field>
35814                </fields>
35815            </register>
35816            <register>
35817                <name>NVIC_ICPR0</name>
35818                <addressOffset>0x0000e280</addressOffset>
35819                <description>Clears or reads the pending state of each group of 32 interrupts</description>
35820                <resetValue>0x00000000</resetValue>
35821                <fields>
35822                    <field>
35823                        <name>CLRPEND</name>
35824                        <description>For CLRPEND[m] in NVIC_ICPR*n, indicates whether interrupt 32*n + m is pending</description>
35825                        <bitRange>[31:0]</bitRange>
35826                        <access>read-write</access>
35827                    </field>
35828                </fields>
35829            </register>
35830            <register>
35831                <name>NVIC_ICPR1</name>
35832                <addressOffset>0x0000e284</addressOffset>
35833                <description>Clears or reads the pending state of each group of 32 interrupts</description>
35834                <resetValue>0x00000000</resetValue>
35835                <fields>
35836                    <field>
35837                        <name>CLRPEND</name>
35838                        <description>For CLRPEND[m] in NVIC_ICPR*n, indicates whether interrupt 32*n + m is pending</description>
35839                        <bitRange>[31:0]</bitRange>
35840                        <access>read-write</access>
35841                    </field>
35842                </fields>
35843            </register>
35844            <register>
35845                <name>NVIC_IABR0</name>
35846                <addressOffset>0x0000e300</addressOffset>
35847                <description>For each group of 32 interrupts, shows the active state of each interrupt</description>
35848                <resetValue>0x00000000</resetValue>
35849                <fields>
35850                    <field>
35851                        <name>ACTIVE</name>
35852                        <description>For ACTIVE[m] in NVIC_IABR*n, indicates the active state for interrupt 32*n+m</description>
35853                        <bitRange>[31:0]</bitRange>
35854                        <access>read-write</access>
35855                    </field>
35856                </fields>
35857            </register>
35858            <register>
35859                <name>NVIC_IABR1</name>
35860                <addressOffset>0x0000e304</addressOffset>
35861                <description>For each group of 32 interrupts, shows the active state of each interrupt</description>
35862                <resetValue>0x00000000</resetValue>
35863                <fields>
35864                    <field>
35865                        <name>ACTIVE</name>
35866                        <description>For ACTIVE[m] in NVIC_IABR*n, indicates the active state for interrupt 32*n+m</description>
35867                        <bitRange>[31:0]</bitRange>
35868                        <access>read-write</access>
35869                    </field>
35870                </fields>
35871            </register>
35872            <register>
35873                <name>NVIC_ITNS0</name>
35874                <addressOffset>0x0000e380</addressOffset>
35875                <description>For each group of 32 interrupts, determines whether each interrupt targets Non-secure or Secure state</description>
35876                <resetValue>0x00000000</resetValue>
35877                <fields>
35878                    <field>
35879                        <name>ITNS</name>
35880                        <description>For ITNS[m] in NVIC_ITNS*n, `IAAMO the target Security state for interrupt 32*n+m</description>
35881                        <bitRange>[31:0]</bitRange>
35882                        <access>read-write</access>
35883                    </field>
35884                </fields>
35885            </register>
35886            <register>
35887                <name>NVIC_ITNS1</name>
35888                <addressOffset>0x0000e384</addressOffset>
35889                <description>For each group of 32 interrupts, determines whether each interrupt targets Non-secure or Secure state</description>
35890                <resetValue>0x00000000</resetValue>
35891                <fields>
35892                    <field>
35893                        <name>ITNS</name>
35894                        <description>For ITNS[m] in NVIC_ITNS*n, `IAAMO the target Security state for interrupt 32*n+m</description>
35895                        <bitRange>[31:0]</bitRange>
35896                        <access>read-write</access>
35897                    </field>
35898                </fields>
35899            </register>
35900            <register>
35901                <name>NVIC_IPR0</name>
35902                <addressOffset>0x0000e400</addressOffset>
35903                <description>Sets or reads interrupt priorities</description>
35904                <resetValue>0x00000000</resetValue>
35905                <fields>
35906                    <field>
35907                        <name>PRI_N3</name>
35908                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
35909                        <bitRange>[31:28]</bitRange>
35910                        <access>read-write</access>
35911                    </field>
35912                    <field>
35913                        <name>PRI_N2</name>
35914                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
35915                        <bitRange>[23:20]</bitRange>
35916                        <access>read-write</access>
35917                    </field>
35918                    <field>
35919                        <name>PRI_N1</name>
35920                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
35921                        <bitRange>[15:12]</bitRange>
35922                        <access>read-write</access>
35923                    </field>
35924                    <field>
35925                        <name>PRI_N0</name>
35926                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
35927                        <bitRange>[7:4]</bitRange>
35928                        <access>read-write</access>
35929                    </field>
35930                </fields>
35931            </register>
35932            <register>
35933                <name>NVIC_IPR1</name>
35934                <addressOffset>0x0000e404</addressOffset>
35935                <description>Sets or reads interrupt priorities</description>
35936                <resetValue>0x00000000</resetValue>
35937                <fields>
35938                    <field>
35939                        <name>PRI_N3</name>
35940                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
35941                        <bitRange>[31:28]</bitRange>
35942                        <access>read-write</access>
35943                    </field>
35944                    <field>
35945                        <name>PRI_N2</name>
35946                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
35947                        <bitRange>[23:20]</bitRange>
35948                        <access>read-write</access>
35949                    </field>
35950                    <field>
35951                        <name>PRI_N1</name>
35952                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
35953                        <bitRange>[15:12]</bitRange>
35954                        <access>read-write</access>
35955                    </field>
35956                    <field>
35957                        <name>PRI_N0</name>
35958                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
35959                        <bitRange>[7:4]</bitRange>
35960                        <access>read-write</access>
35961                    </field>
35962                </fields>
35963            </register>
35964            <register>
35965                <name>NVIC_IPR2</name>
35966                <addressOffset>0x0000e408</addressOffset>
35967                <description>Sets or reads interrupt priorities</description>
35968                <resetValue>0x00000000</resetValue>
35969                <fields>
35970                    <field>
35971                        <name>PRI_N3</name>
35972                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
35973                        <bitRange>[31:28]</bitRange>
35974                        <access>read-write</access>
35975                    </field>
35976                    <field>
35977                        <name>PRI_N2</name>
35978                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
35979                        <bitRange>[23:20]</bitRange>
35980                        <access>read-write</access>
35981                    </field>
35982                    <field>
35983                        <name>PRI_N1</name>
35984                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
35985                        <bitRange>[15:12]</bitRange>
35986                        <access>read-write</access>
35987                    </field>
35988                    <field>
35989                        <name>PRI_N0</name>
35990                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
35991                        <bitRange>[7:4]</bitRange>
35992                        <access>read-write</access>
35993                    </field>
35994                </fields>
35995            </register>
35996            <register>
35997                <name>NVIC_IPR3</name>
35998                <addressOffset>0x0000e40c</addressOffset>
35999                <description>Sets or reads interrupt priorities</description>
36000                <resetValue>0x00000000</resetValue>
36001                <fields>
36002                    <field>
36003                        <name>PRI_N3</name>
36004                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36005                        <bitRange>[31:28]</bitRange>
36006                        <access>read-write</access>
36007                    </field>
36008                    <field>
36009                        <name>PRI_N2</name>
36010                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36011                        <bitRange>[23:20]</bitRange>
36012                        <access>read-write</access>
36013                    </field>
36014                    <field>
36015                        <name>PRI_N1</name>
36016                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36017                        <bitRange>[15:12]</bitRange>
36018                        <access>read-write</access>
36019                    </field>
36020                    <field>
36021                        <name>PRI_N0</name>
36022                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36023                        <bitRange>[7:4]</bitRange>
36024                        <access>read-write</access>
36025                    </field>
36026                </fields>
36027            </register>
36028            <register>
36029                <name>NVIC_IPR4</name>
36030                <addressOffset>0x0000e410</addressOffset>
36031                <description>Sets or reads interrupt priorities</description>
36032                <resetValue>0x00000000</resetValue>
36033                <fields>
36034                    <field>
36035                        <name>PRI_N3</name>
36036                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36037                        <bitRange>[31:28]</bitRange>
36038                        <access>read-write</access>
36039                    </field>
36040                    <field>
36041                        <name>PRI_N2</name>
36042                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36043                        <bitRange>[23:20]</bitRange>
36044                        <access>read-write</access>
36045                    </field>
36046                    <field>
36047                        <name>PRI_N1</name>
36048                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36049                        <bitRange>[15:12]</bitRange>
36050                        <access>read-write</access>
36051                    </field>
36052                    <field>
36053                        <name>PRI_N0</name>
36054                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36055                        <bitRange>[7:4]</bitRange>
36056                        <access>read-write</access>
36057                    </field>
36058                </fields>
36059            </register>
36060            <register>
36061                <name>NVIC_IPR5</name>
36062                <addressOffset>0x0000e414</addressOffset>
36063                <description>Sets or reads interrupt priorities</description>
36064                <resetValue>0x00000000</resetValue>
36065                <fields>
36066                    <field>
36067                        <name>PRI_N3</name>
36068                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36069                        <bitRange>[31:28]</bitRange>
36070                        <access>read-write</access>
36071                    </field>
36072                    <field>
36073                        <name>PRI_N2</name>
36074                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36075                        <bitRange>[23:20]</bitRange>
36076                        <access>read-write</access>
36077                    </field>
36078                    <field>
36079                        <name>PRI_N1</name>
36080                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36081                        <bitRange>[15:12]</bitRange>
36082                        <access>read-write</access>
36083                    </field>
36084                    <field>
36085                        <name>PRI_N0</name>
36086                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36087                        <bitRange>[7:4]</bitRange>
36088                        <access>read-write</access>
36089                    </field>
36090                </fields>
36091            </register>
36092            <register>
36093                <name>NVIC_IPR6</name>
36094                <addressOffset>0x0000e418</addressOffset>
36095                <description>Sets or reads interrupt priorities</description>
36096                <resetValue>0x00000000</resetValue>
36097                <fields>
36098                    <field>
36099                        <name>PRI_N3</name>
36100                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36101                        <bitRange>[31:28]</bitRange>
36102                        <access>read-write</access>
36103                    </field>
36104                    <field>
36105                        <name>PRI_N2</name>
36106                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36107                        <bitRange>[23:20]</bitRange>
36108                        <access>read-write</access>
36109                    </field>
36110                    <field>
36111                        <name>PRI_N1</name>
36112                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36113                        <bitRange>[15:12]</bitRange>
36114                        <access>read-write</access>
36115                    </field>
36116                    <field>
36117                        <name>PRI_N0</name>
36118                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36119                        <bitRange>[7:4]</bitRange>
36120                        <access>read-write</access>
36121                    </field>
36122                </fields>
36123            </register>
36124            <register>
36125                <name>NVIC_IPR7</name>
36126                <addressOffset>0x0000e41c</addressOffset>
36127                <description>Sets or reads interrupt priorities</description>
36128                <resetValue>0x00000000</resetValue>
36129                <fields>
36130                    <field>
36131                        <name>PRI_N3</name>
36132                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36133                        <bitRange>[31:28]</bitRange>
36134                        <access>read-write</access>
36135                    </field>
36136                    <field>
36137                        <name>PRI_N2</name>
36138                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36139                        <bitRange>[23:20]</bitRange>
36140                        <access>read-write</access>
36141                    </field>
36142                    <field>
36143                        <name>PRI_N1</name>
36144                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36145                        <bitRange>[15:12]</bitRange>
36146                        <access>read-write</access>
36147                    </field>
36148                    <field>
36149                        <name>PRI_N0</name>
36150                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36151                        <bitRange>[7:4]</bitRange>
36152                        <access>read-write</access>
36153                    </field>
36154                </fields>
36155            </register>
36156            <register>
36157                <name>NVIC_IPR8</name>
36158                <addressOffset>0x0000e420</addressOffset>
36159                <description>Sets or reads interrupt priorities</description>
36160                <resetValue>0x00000000</resetValue>
36161                <fields>
36162                    <field>
36163                        <name>PRI_N3</name>
36164                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36165                        <bitRange>[31:28]</bitRange>
36166                        <access>read-write</access>
36167                    </field>
36168                    <field>
36169                        <name>PRI_N2</name>
36170                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36171                        <bitRange>[23:20]</bitRange>
36172                        <access>read-write</access>
36173                    </field>
36174                    <field>
36175                        <name>PRI_N1</name>
36176                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36177                        <bitRange>[15:12]</bitRange>
36178                        <access>read-write</access>
36179                    </field>
36180                    <field>
36181                        <name>PRI_N0</name>
36182                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36183                        <bitRange>[7:4]</bitRange>
36184                        <access>read-write</access>
36185                    </field>
36186                </fields>
36187            </register>
36188            <register>
36189                <name>NVIC_IPR9</name>
36190                <addressOffset>0x0000e424</addressOffset>
36191                <description>Sets or reads interrupt priorities</description>
36192                <resetValue>0x00000000</resetValue>
36193                <fields>
36194                    <field>
36195                        <name>PRI_N3</name>
36196                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36197                        <bitRange>[31:28]</bitRange>
36198                        <access>read-write</access>
36199                    </field>
36200                    <field>
36201                        <name>PRI_N2</name>
36202                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36203                        <bitRange>[23:20]</bitRange>
36204                        <access>read-write</access>
36205                    </field>
36206                    <field>
36207                        <name>PRI_N1</name>
36208                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36209                        <bitRange>[15:12]</bitRange>
36210                        <access>read-write</access>
36211                    </field>
36212                    <field>
36213                        <name>PRI_N0</name>
36214                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36215                        <bitRange>[7:4]</bitRange>
36216                        <access>read-write</access>
36217                    </field>
36218                </fields>
36219            </register>
36220            <register>
36221                <name>NVIC_IPR10</name>
36222                <addressOffset>0x0000e428</addressOffset>
36223                <description>Sets or reads interrupt priorities</description>
36224                <resetValue>0x00000000</resetValue>
36225                <fields>
36226                    <field>
36227                        <name>PRI_N3</name>
36228                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36229                        <bitRange>[31:28]</bitRange>
36230                        <access>read-write</access>
36231                    </field>
36232                    <field>
36233                        <name>PRI_N2</name>
36234                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36235                        <bitRange>[23:20]</bitRange>
36236                        <access>read-write</access>
36237                    </field>
36238                    <field>
36239                        <name>PRI_N1</name>
36240                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36241                        <bitRange>[15:12]</bitRange>
36242                        <access>read-write</access>
36243                    </field>
36244                    <field>
36245                        <name>PRI_N0</name>
36246                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36247                        <bitRange>[7:4]</bitRange>
36248                        <access>read-write</access>
36249                    </field>
36250                </fields>
36251            </register>
36252            <register>
36253                <name>NVIC_IPR11</name>
36254                <addressOffset>0x0000e42c</addressOffset>
36255                <description>Sets or reads interrupt priorities</description>
36256                <resetValue>0x00000000</resetValue>
36257                <fields>
36258                    <field>
36259                        <name>PRI_N3</name>
36260                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36261                        <bitRange>[31:28]</bitRange>
36262                        <access>read-write</access>
36263                    </field>
36264                    <field>
36265                        <name>PRI_N2</name>
36266                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36267                        <bitRange>[23:20]</bitRange>
36268                        <access>read-write</access>
36269                    </field>
36270                    <field>
36271                        <name>PRI_N1</name>
36272                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36273                        <bitRange>[15:12]</bitRange>
36274                        <access>read-write</access>
36275                    </field>
36276                    <field>
36277                        <name>PRI_N0</name>
36278                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36279                        <bitRange>[7:4]</bitRange>
36280                        <access>read-write</access>
36281                    </field>
36282                </fields>
36283            </register>
36284            <register>
36285                <name>NVIC_IPR12</name>
36286                <addressOffset>0x0000e430</addressOffset>
36287                <description>Sets or reads interrupt priorities</description>
36288                <resetValue>0x00000000</resetValue>
36289                <fields>
36290                    <field>
36291                        <name>PRI_N3</name>
36292                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36293                        <bitRange>[31:28]</bitRange>
36294                        <access>read-write</access>
36295                    </field>
36296                    <field>
36297                        <name>PRI_N2</name>
36298                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36299                        <bitRange>[23:20]</bitRange>
36300                        <access>read-write</access>
36301                    </field>
36302                    <field>
36303                        <name>PRI_N1</name>
36304                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36305                        <bitRange>[15:12]</bitRange>
36306                        <access>read-write</access>
36307                    </field>
36308                    <field>
36309                        <name>PRI_N0</name>
36310                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36311                        <bitRange>[7:4]</bitRange>
36312                        <access>read-write</access>
36313                    </field>
36314                </fields>
36315            </register>
36316            <register>
36317                <name>NVIC_IPR13</name>
36318                <addressOffset>0x0000e434</addressOffset>
36319                <description>Sets or reads interrupt priorities</description>
36320                <resetValue>0x00000000</resetValue>
36321                <fields>
36322                    <field>
36323                        <name>PRI_N3</name>
36324                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36325                        <bitRange>[31:28]</bitRange>
36326                        <access>read-write</access>
36327                    </field>
36328                    <field>
36329                        <name>PRI_N2</name>
36330                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36331                        <bitRange>[23:20]</bitRange>
36332                        <access>read-write</access>
36333                    </field>
36334                    <field>
36335                        <name>PRI_N1</name>
36336                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36337                        <bitRange>[15:12]</bitRange>
36338                        <access>read-write</access>
36339                    </field>
36340                    <field>
36341                        <name>PRI_N0</name>
36342                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36343                        <bitRange>[7:4]</bitRange>
36344                        <access>read-write</access>
36345                    </field>
36346                </fields>
36347            </register>
36348            <register>
36349                <name>NVIC_IPR14</name>
36350                <addressOffset>0x0000e438</addressOffset>
36351                <description>Sets or reads interrupt priorities</description>
36352                <resetValue>0x00000000</resetValue>
36353                <fields>
36354                    <field>
36355                        <name>PRI_N3</name>
36356                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36357                        <bitRange>[31:28]</bitRange>
36358                        <access>read-write</access>
36359                    </field>
36360                    <field>
36361                        <name>PRI_N2</name>
36362                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36363                        <bitRange>[23:20]</bitRange>
36364                        <access>read-write</access>
36365                    </field>
36366                    <field>
36367                        <name>PRI_N1</name>
36368                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36369                        <bitRange>[15:12]</bitRange>
36370                        <access>read-write</access>
36371                    </field>
36372                    <field>
36373                        <name>PRI_N0</name>
36374                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36375                        <bitRange>[7:4]</bitRange>
36376                        <access>read-write</access>
36377                    </field>
36378                </fields>
36379            </register>
36380            <register>
36381                <name>NVIC_IPR15</name>
36382                <addressOffset>0x0000e43c</addressOffset>
36383                <description>Sets or reads interrupt priorities</description>
36384                <resetValue>0x00000000</resetValue>
36385                <fields>
36386                    <field>
36387                        <name>PRI_N3</name>
36388                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+3, or RES0 if the PE does not implement this interrupt</description>
36389                        <bitRange>[31:28]</bitRange>
36390                        <access>read-write</access>
36391                    </field>
36392                    <field>
36393                        <name>PRI_N2</name>
36394                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+2, or RES0 if the PE does not implement this interrupt</description>
36395                        <bitRange>[23:20]</bitRange>
36396                        <access>read-write</access>
36397                    </field>
36398                    <field>
36399                        <name>PRI_N1</name>
36400                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+1, or RES0 if the PE does not implement this interrupt</description>
36401                        <bitRange>[15:12]</bitRange>
36402                        <access>read-write</access>
36403                    </field>
36404                    <field>
36405                        <name>PRI_N0</name>
36406                        <description>For register NVIC_IPRn, the priority of interrupt number 4*n+0, or RES0 if the PE does not implement this interrupt</description>
36407                        <bitRange>[7:4]</bitRange>
36408                        <access>read-write</access>
36409                    </field>
36410                </fields>
36411            </register>
36412            <register>
36413                <name>CPUID</name>
36414                <addressOffset>0x0000ed00</addressOffset>
36415                <description>Provides identification information for the PE, including an implementer code for the device and a device ID number</description>
36416                <resetValue>0x411fd210</resetValue>
36417                <fields>
36418                    <field>
36419                        <name>IMPLEMENTER</name>
36420                        <description>This field must hold an implementer code that has been assigned by ARM</description>
36421                        <bitRange>[31:24]</bitRange>
36422                        <access>read-only</access>
36423                    </field>
36424                    <field>
36425                        <name>VARIANT</name>
36426                        <description>IMPLEMENTATION DEFINED variant number. Typically, this field is used to distinguish between different product variants, or major revisions of a product</description>
36427                        <bitRange>[23:20]</bitRange>
36428                        <access>read-only</access>
36429                    </field>
36430                    <field>
36431                        <name>ARCHITECTURE</name>
36432                        <description>Defines the Architecture implemented by the PE</description>
36433                        <bitRange>[19:16]</bitRange>
36434                        <access>read-only</access>
36435                    </field>
36436                    <field>
36437                        <name>PARTNO</name>
36438                        <description>IMPLEMENTATION DEFINED primary part number for the device</description>
36439                        <bitRange>[15:4]</bitRange>
36440                        <access>read-only</access>
36441                    </field>
36442                    <field>
36443                        <name>REVISION</name>
36444                        <description>IMPLEMENTATION DEFINED revision number for the device</description>
36445                        <bitRange>[3:0]</bitRange>
36446                        <access>read-only</access>
36447                    </field>
36448                </fields>
36449            </register>
36450            <register>
36451                <name>ICSR</name>
36452                <addressOffset>0x0000ed04</addressOffset>
36453                <description>Controls and provides status information for NMI, PendSV, SysTick and interrupts</description>
36454                <resetValue>0x00000000</resetValue>
36455                <fields>
36456                    <field>
36457                        <name>PENDNMISET</name>
36458                        <description>Indicates whether the NMI exception is pending</description>
36459                        <bitRange>[31:31]</bitRange>
36460                        <access>read-only</access>
36461                    </field>
36462                    <field>
36463                        <name>PENDNMICLR</name>
36464                        <description>Allows the NMI exception pend state to be cleared</description>
36465                        <bitRange>[30:30]</bitRange>
36466                        <access>read-write</access>
36467                    </field>
36468                    <field>
36469                        <name>PENDSVSET</name>
36470                        <description>Indicates whether the PendSV `FTSSS exception is pending</description>
36471                        <bitRange>[28:28]</bitRange>
36472                        <access>read-only</access>
36473                    </field>
36474                    <field>
36475                        <name>PENDSVCLR</name>
36476                        <description>Allows the PendSV exception pend state to be cleared `FTSSS</description>
36477                        <bitRange>[27:27]</bitRange>
36478                        <access>read-write</access>
36479                    </field>
36480                    <field>
36481                        <name>PENDSTSET</name>
36482                        <description>Indicates whether the SysTick `FTSSS exception is pending</description>
36483                        <bitRange>[26:26]</bitRange>
36484                        <access>read-only</access>
36485                    </field>
36486                    <field>
36487                        <name>PENDSTCLR</name>
36488                        <description>Allows the SysTick exception pend state to be cleared `FTSSS</description>
36489                        <bitRange>[25:25]</bitRange>
36490                        <access>read-write</access>
36491                    </field>
36492                    <field>
36493                        <name>STTNS</name>
36494                        <description>Controls whether in a single SysTick implementation, the SysTick is Secure or Non-secure</description>
36495                        <bitRange>[24:24]</bitRange>
36496                        <access>read-write</access>
36497                    </field>
36498                    <field>
36499                        <name>ISRPREEMPT</name>
36500                        <description>Indicates whether a pending exception will be serviced on exit from debug halt state</description>
36501                        <bitRange>[23:23]</bitRange>
36502                        <access>read-only</access>
36503                    </field>
36504                    <field>
36505                        <name>ISRPENDING</name>
36506                        <description>Indicates whether an external interrupt, generated by the NVIC, is pending</description>
36507                        <bitRange>[22:22]</bitRange>
36508                        <access>read-only</access>
36509                    </field>
36510                    <field>
36511                        <name>VECTPENDING</name>
36512                        <description>The exception number of the highest priority pending and enabled interrupt</description>
36513                        <bitRange>[20:12]</bitRange>
36514                        <access>read-only</access>
36515                    </field>
36516                    <field>
36517                        <name>RETTOBASE</name>
36518                        <description>In Handler mode, indicates whether there is more than one active exception</description>
36519                        <bitRange>[11:11]</bitRange>
36520                        <access>read-only</access>
36521                    </field>
36522                    <field>
36523                        <name>VECTACTIVE</name>
36524                        <description>The exception number of the current executing exception</description>
36525                        <bitRange>[8:0]</bitRange>
36526                        <access>read-only</access>
36527                    </field>
36528                </fields>
36529            </register>
36530            <register>
36531                <name>VTOR</name>
36532                <addressOffset>0x0000ed08</addressOffset>
36533                <description>The VTOR indicates the offset of the vector table base address from memory address 0x00000000.</description>
36534                <resetValue>0x00000000</resetValue>
36535                <fields>
36536                    <field>
36537                        <name>TBLOFF</name>
36538                        <description>Vector table base offset field. It contains bits[31:7] of the offset of the table base from the bottom of the memory map.</description>
36539                        <bitRange>[31:7]</bitRange>
36540                        <access>read-write</access>
36541                    </field>
36542                </fields>
36543            </register>
36544            <register>
36545                <name>AIRCR</name>
36546                <addressOffset>0x0000ed0c</addressOffset>
36547                <description>Use the Application Interrupt and Reset Control Register to: determine data endianness, clear all active state information from debug halt mode, request a system reset.</description>
36548                <resetValue>0x00000000</resetValue>
36549                <fields>
36550                    <field>
36551                        <name>VECTKEY</name>
36552                        <description>Register key:
36553                            Reads as Unknown
36554                            On writes, write 0x05FA to VECTKEY, otherwise the write is ignored.</description>
36555                        <bitRange>[31:16]</bitRange>
36556                        <access>read-write</access>
36557                    </field>
36558                    <field>
36559                        <name>ENDIANESS</name>
36560                        <description>Data endianness implemented:
36561                            0 = Little-endian.</description>
36562                        <bitRange>[15:15]</bitRange>
36563                        <access>read-only</access>
36564                    </field>
36565                    <field>
36566                        <name>PRIS</name>
36567                        <description>Prioritize Secure exceptions. The value of this bit defines whether Secure exception priority boosting is enabled.
36568                            0	Priority ranges of Secure and Non-secure exceptions are identical.
36569                            1	Non-secure exceptions are de-prioritized.</description>
36570                        <bitRange>[14:14]</bitRange>
36571                        <access>read-write</access>
36572                    </field>
36573                    <field>
36574                        <name>BFHFNMINS</name>
36575                        <description>BusFault, HardFault, and NMI Non-secure enable.
36576                            0	BusFault, HardFault, and NMI are Secure.
36577                            1	BusFault and NMI are Non-secure and exceptions can target Non-secure HardFault.</description>
36578                        <bitRange>[13:13]</bitRange>
36579                        <access>read-write</access>
36580                    </field>
36581                    <field>
36582                        <name>PRIGROUP</name>
36583                        <description>Interrupt priority grouping field. This field determines the split of group priority from subpriority.
36584                            See https://developer.arm.com/documentation/100235/0004/the-cortex-m33-peripherals/system-control-block/application-interrupt-and-reset-control-register?lang=en</description>
36585                        <bitRange>[10:8]</bitRange>
36586                        <access>read-write</access>
36587                    </field>
36588                    <field>
36589                        <name>SYSRESETREQS</name>
36590                        <description>System reset request, Secure state only.
36591                            0	SYSRESETREQ functionality is available to both Security states.
36592                            1 SYSRESETREQ functionality is only available to Secure state.</description>
36593                        <bitRange>[3:3]</bitRange>
36594                        <access>read-write</access>
36595                    </field>
36596                    <field>
36597                        <name>SYSRESETREQ</name>
36598                        <description>Writing 1 to this bit causes the SYSRESETREQ signal to the outer system to be asserted to request a reset. The intention is to force a large system reset of all major components except for debug. The C_HALT bit in the DHCSR is cleared as a result of the system reset requested. The debugger does not lose contact with the device.</description>
36599                        <bitRange>[2:2]</bitRange>
36600                        <access>read-write</access>
36601                    </field>
36602                    <field>
36603                        <name>VECTCLRACTIVE</name>
36604                        <description>Clears all active state information for fixed and configurable exceptions. This bit: is self-clearing, can only be set by the DAP when the core is halted.  When set: clears all active exception status of the processor, forces a return to Thread mode, forces an IPSR of 0. A debugger must re-initialize the stack.</description>
36605                        <bitRange>[1:1]</bitRange>
36606                        <access>read-write</access>
36607                    </field>
36608                </fields>
36609            </register>
36610            <register>
36611                <name>SCR</name>
36612                <addressOffset>0x0000ed10</addressOffset>
36613                <description>System Control Register. Use the System Control Register for power-management functions: signal to the system when the processor can enter a low power state, control how the processor enters and exits low power states.</description>
36614                <resetValue>0x00000000</resetValue>
36615                <fields>
36616                    <field>
36617                        <name>SEVONPEND</name>
36618                        <description>Send Event on Pending bit:
36619                            0 = Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded.
36620                            1 = Enabled events and all interrupts, including disabled interrupts, can wakeup the processor.
36621                            When an event or interrupt becomes pending, the event signal wakes up the processor from WFE. If the
36622                            processor is not waiting for an event, the event is registered and affects the next WFE.
36623                            The processor also wakes up on execution of an SEV instruction or an external event.</description>
36624                        <bitRange>[4:4]</bitRange>
36625                        <access>read-write</access>
36626                    </field>
36627                    <field>
36628                        <name>SLEEPDEEPS</name>
36629                        <description>0 SLEEPDEEP is available to both security states
36630                            1 SLEEPDEEP is only available to Secure state</description>
36631                        <bitRange>[3:3]</bitRange>
36632                        <access>read-write</access>
36633                    </field>
36634                    <field>
36635                        <name>SLEEPDEEP</name>
36636                        <description>Controls whether the processor uses sleep or deep sleep as its low power mode:
36637                            0 = Sleep.
36638                            1 = Deep sleep.</description>
36639                        <bitRange>[2:2]</bitRange>
36640                        <access>read-write</access>
36641                    </field>
36642                    <field>
36643                        <name>SLEEPONEXIT</name>
36644                        <description>Indicates sleep-on-exit when returning from Handler mode to Thread mode:
36645                            0 = Do not sleep when returning to Thread mode.
36646                            1 = Enter sleep, or deep sleep, on return from an ISR to Thread mode.
36647                            Setting this bit to 1 enables an interrupt driven application to avoid returning to an empty main application.</description>
36648                        <bitRange>[1:1]</bitRange>
36649                        <access>read-write</access>
36650                    </field>
36651                </fields>
36652            </register>
36653            <register>
36654                <name>CCR</name>
36655                <addressOffset>0x0000ed14</addressOffset>
36656                <description>Sets or returns configuration and control data</description>
36657                <resetValue>0x00000201</resetValue>
36658                <fields>
36659                    <field>
36660                        <name>BP</name>
36661                        <description>Enables program flow prediction `FTSSS</description>
36662                        <bitRange>[18:18]</bitRange>
36663                        <access>read-only</access>
36664                    </field>
36665                    <field>
36666                        <name>IC</name>
36667                        <description>This is a global enable bit for instruction caches in the selected Security state</description>
36668                        <bitRange>[17:17]</bitRange>
36669                        <access>read-only</access>
36670                    </field>
36671                    <field>
36672                        <name>DC</name>
36673                        <description>Enables data caching of all data accesses to Normal memory `FTSSS</description>
36674                        <bitRange>[16:16]</bitRange>
36675                        <access>read-only</access>
36676                    </field>
36677                    <field>
36678                        <name>STKOFHFNMIGN</name>
36679                        <description>Controls the effect of a stack limit violation while executing at a requested priority less than 0</description>
36680                        <bitRange>[10:10]</bitRange>
36681                        <access>read-write</access>
36682                    </field>
36683                    <field>
36684                        <name>RES1</name>
36685                        <description>Reserved, RES1</description>
36686                        <bitRange>[9:9]</bitRange>
36687                        <access>read-only</access>
36688                    </field>
36689                    <field>
36690                        <name>BFHFNMIGN</name>
36691                        <description>Determines the effect of precise BusFaults on handlers running at a requested priority less than 0</description>
36692                        <bitRange>[8:8]</bitRange>
36693                        <access>read-write</access>
36694                    </field>
36695                    <field>
36696                        <name>DIV_0_TRP</name>
36697                        <description>Controls the generation of a DIVBYZERO UsageFault when attempting to perform integer division by zero</description>
36698                        <bitRange>[4:4]</bitRange>
36699                        <access>read-write</access>
36700                    </field>
36701                    <field>
36702                        <name>UNALIGN_TRP</name>
36703                        <description>Controls the trapping of unaligned word or halfword accesses</description>
36704                        <bitRange>[3:3]</bitRange>
36705                        <access>read-write</access>
36706                    </field>
36707                    <field>
36708                        <name>USERSETMPEND</name>
36709                        <description>Determines whether unprivileged accesses are permitted to pend interrupts via the STIR</description>
36710                        <bitRange>[1:1]</bitRange>
36711                        <access>read-write</access>
36712                    </field>
36713                    <field>
36714                        <name>RES1_1</name>
36715                        <description>Reserved, RES1</description>
36716                        <bitRange>[0:0]</bitRange>
36717                        <access>read-only</access>
36718                    </field>
36719                </fields>
36720            </register>
36721            <register>
36722                <name>SHPR1</name>
36723                <addressOffset>0x0000ed18</addressOffset>
36724                <description>Sets or returns priority for system handlers 4 - 7</description>
36725                <resetValue>0x00000000</resetValue>
36726                <fields>
36727                    <field>
36728                        <name>PRI_7_3</name>
36729                        <description>Priority of system handler 7, SecureFault</description>
36730                        <bitRange>[31:29]</bitRange>
36731                        <access>read-write</access>
36732                    </field>
36733                    <field>
36734                        <name>PRI_6_3</name>
36735                        <description>Priority of system handler 6, SecureFault</description>
36736                        <bitRange>[23:21]</bitRange>
36737                        <access>read-write</access>
36738                    </field>
36739                    <field>
36740                        <name>PRI_5_3</name>
36741                        <description>Priority of system handler 5, SecureFault</description>
36742                        <bitRange>[15:13]</bitRange>
36743                        <access>read-write</access>
36744                    </field>
36745                    <field>
36746                        <name>PRI_4_3</name>
36747                        <description>Priority of system handler 4, SecureFault</description>
36748                        <bitRange>[7:5]</bitRange>
36749                        <access>read-write</access>
36750                    </field>
36751                </fields>
36752            </register>
36753            <register>
36754                <name>SHPR2</name>
36755                <addressOffset>0x0000ed1c</addressOffset>
36756                <description>Sets or returns priority for system handlers 8 - 11</description>
36757                <resetValue>0x00000000</resetValue>
36758                <fields>
36759                    <field>
36760                        <name>PRI_11_3</name>
36761                        <description>Priority of system handler 11, SecureFault</description>
36762                        <bitRange>[31:29]</bitRange>
36763                        <access>read-write</access>
36764                    </field>
36765                    <field>
36766                        <name>PRI_10</name>
36767                        <description>Reserved, RES0</description>
36768                        <bitRange>[23:16]</bitRange>
36769                        <access>read-only</access>
36770                    </field>
36771                    <field>
36772                        <name>PRI_9</name>
36773                        <description>Reserved, RES0</description>
36774                        <bitRange>[15:8]</bitRange>
36775                        <access>read-only</access>
36776                    </field>
36777                    <field>
36778                        <name>PRI_8</name>
36779                        <description>Reserved, RES0</description>
36780                        <bitRange>[7:0]</bitRange>
36781                        <access>read-only</access>
36782                    </field>
36783                </fields>
36784            </register>
36785            <register>
36786                <name>SHPR3</name>
36787                <addressOffset>0x0000ed20</addressOffset>
36788                <description>Sets or returns priority for system handlers 12 - 15</description>
36789                <resetValue>0x00000000</resetValue>
36790                <fields>
36791                    <field>
36792                        <name>PRI_15_3</name>
36793                        <description>Priority of system handler 15, SecureFault</description>
36794                        <bitRange>[31:29]</bitRange>
36795                        <access>read-write</access>
36796                    </field>
36797                    <field>
36798                        <name>PRI_14_3</name>
36799                        <description>Priority of system handler 14, SecureFault</description>
36800                        <bitRange>[23:21]</bitRange>
36801                        <access>read-write</access>
36802                    </field>
36803                    <field>
36804                        <name>PRI_13</name>
36805                        <description>Reserved, RES0</description>
36806                        <bitRange>[15:8]</bitRange>
36807                        <access>read-only</access>
36808                    </field>
36809                    <field>
36810                        <name>PRI_12_3</name>
36811                        <description>Priority of system handler 12, SecureFault</description>
36812                        <bitRange>[7:5]</bitRange>
36813                        <access>read-write</access>
36814                    </field>
36815                </fields>
36816            </register>
36817            <register>
36818                <name>SHCSR</name>
36819                <addressOffset>0x0000ed24</addressOffset>
36820                <description>Provides access to the active and pending status of system exceptions</description>
36821                <resetValue>0x00000000</resetValue>
36822                <fields>
36823                    <field>
36824                        <name>HARDFAULTPENDED</name>
36825                        <description>`IAAMO the pending state of the HardFault exception `CTTSSS</description>
36826                        <bitRange>[21:21]</bitRange>
36827                        <access>read-write</access>
36828                    </field>
36829                    <field>
36830                        <name>SECUREFAULTPENDED</name>
36831                        <description>`IAAMO the pending state of the SecureFault exception</description>
36832                        <bitRange>[20:20]</bitRange>
36833                        <access>read-write</access>
36834                    </field>
36835                    <field>
36836                        <name>SECUREFAULTENA</name>
36837                        <description>`DW the SecureFault exception is enabled</description>
36838                        <bitRange>[19:19]</bitRange>
36839                        <access>read-write</access>
36840                    </field>
36841                    <field>
36842                        <name>USGFAULTENA</name>
36843                        <description>`DW the UsageFault exception is enabled `FTSSS</description>
36844                        <bitRange>[18:18]</bitRange>
36845                        <access>read-write</access>
36846                    </field>
36847                    <field>
36848                        <name>BUSFAULTENA</name>
36849                        <description>`DW the BusFault exception is enabled</description>
36850                        <bitRange>[17:17]</bitRange>
36851                        <access>read-write</access>
36852                    </field>
36853                    <field>
36854                        <name>MEMFAULTENA</name>
36855                        <description>`DW the MemManage exception is enabled `FTSSS</description>
36856                        <bitRange>[16:16]</bitRange>
36857                        <access>read-write</access>
36858                    </field>
36859                    <field>
36860                        <name>SVCALLPENDED</name>
36861                        <description>`IAAMO the pending state of the SVCall exception `FTSSS</description>
36862                        <bitRange>[15:15]</bitRange>
36863                        <access>read-write</access>
36864                    </field>
36865                    <field>
36866                        <name>BUSFAULTPENDED</name>
36867                        <description>`IAAMO the pending state of the BusFault exception</description>
36868                        <bitRange>[14:14]</bitRange>
36869                        <access>read-write</access>
36870                    </field>
36871                    <field>
36872                        <name>MEMFAULTPENDED</name>
36873                        <description>`IAAMO the pending state of the MemManage exception `FTSSS</description>
36874                        <bitRange>[13:13]</bitRange>
36875                        <access>read-write</access>
36876                    </field>
36877                    <field>
36878                        <name>USGFAULTPENDED</name>
36879                        <description>The UsageFault exception is banked between Security states, `IAAMO the pending state of the UsageFault exception `FTSSS</description>
36880                        <bitRange>[12:12]</bitRange>
36881                        <access>read-write</access>
36882                    </field>
36883                    <field>
36884                        <name>SYSTICKACT</name>
36885                        <description>`IAAMO the active state of the SysTick exception `FTSSS</description>
36886                        <bitRange>[11:11]</bitRange>
36887                        <access>read-write</access>
36888                    </field>
36889                    <field>
36890                        <name>PENDSVACT</name>
36891                        <description>`IAAMO the active state of the PendSV exception `FTSSS</description>
36892                        <bitRange>[10:10]</bitRange>
36893                        <access>read-write</access>
36894                    </field>
36895                    <field>
36896                        <name>MONITORACT</name>
36897                        <description>`IAAMO the active state of the DebugMonitor exception</description>
36898                        <bitRange>[8:8]</bitRange>
36899                        <access>read-write</access>
36900                    </field>
36901                    <field>
36902                        <name>SVCALLACT</name>
36903                        <description>`IAAMO the active state of the SVCall exception `FTSSS</description>
36904                        <bitRange>[7:7]</bitRange>
36905                        <access>read-write</access>
36906                    </field>
36907                    <field>
36908                        <name>NMIACT</name>
36909                        <description>`IAAMO the active state of the NMI exception</description>
36910                        <bitRange>[5:5]</bitRange>
36911                        <access>read-write</access>
36912                    </field>
36913                    <field>
36914                        <name>SECUREFAULTACT</name>
36915                        <description>`IAAMO the active state of the SecureFault exception</description>
36916                        <bitRange>[4:4]</bitRange>
36917                        <access>read-write</access>
36918                    </field>
36919                    <field>
36920                        <name>USGFAULTACT</name>
36921                        <description>`IAAMO the active state of the UsageFault exception `FTSSS</description>
36922                        <bitRange>[3:3]</bitRange>
36923                        <access>read-write</access>
36924                    </field>
36925                    <field>
36926                        <name>HARDFAULTACT</name>
36927                        <description>Indicates and allows limited modification of the active state of the HardFault exception `FTSSS</description>
36928                        <bitRange>[2:2]</bitRange>
36929                        <access>read-write</access>
36930                    </field>
36931                    <field>
36932                        <name>BUSFAULTACT</name>
36933                        <description>`IAAMO the active state of the BusFault exception</description>
36934                        <bitRange>[1:1]</bitRange>
36935                        <access>read-write</access>
36936                    </field>
36937                    <field>
36938                        <name>MEMFAULTACT</name>
36939                        <description>`IAAMO the active state of the MemManage exception `FTSSS</description>
36940                        <bitRange>[0:0]</bitRange>
36941                        <access>read-write</access>
36942                    </field>
36943                </fields>
36944            </register>
36945            <register>
36946                <name>CFSR</name>
36947                <addressOffset>0x0000ed28</addressOffset>
36948                <description>Contains the three Configurable Fault Status Registers.
36949
36950                    31:16 UFSR: Provides information on UsageFault exceptions
36951
36952                    15:8 BFSR: Provides information on BusFault exceptions
36953
36954                    7:0 MMFSR: Provides information on MemManage exceptions</description>
36955                <resetValue>0x00000000</resetValue>
36956                <fields>
36957                    <field>
36958                        <name>UFSR_DIVBYZERO</name>
36959                        <description>Sticky flag indicating whether an integer division by zero error has occurred</description>
36960                        <bitRange>[25:25]</bitRange>
36961                        <access>read-write</access>
36962                    </field>
36963                    <field>
36964                        <name>UFSR_UNALIGNED</name>
36965                        <description>Sticky flag indicating whether an unaligned access error has occurred</description>
36966                        <bitRange>[24:24]</bitRange>
36967                        <access>read-write</access>
36968                    </field>
36969                    <field>
36970                        <name>UFSR_STKOF</name>
36971                        <description>Sticky flag indicating whether a stack overflow error has occurred</description>
36972                        <bitRange>[20:20]</bitRange>
36973                        <access>read-write</access>
36974                    </field>
36975                    <field>
36976                        <name>UFSR_NOCP</name>
36977                        <description>Sticky flag indicating whether a coprocessor disabled or not present error has occurred</description>
36978                        <bitRange>[19:19]</bitRange>
36979                        <access>read-write</access>
36980                    </field>
36981                    <field>
36982                        <name>UFSR_INVPC</name>
36983                        <description>Sticky flag indicating whether an integrity check error has occurred</description>
36984                        <bitRange>[18:18]</bitRange>
36985                        <access>read-write</access>
36986                    </field>
36987                    <field>
36988                        <name>UFSR_INVSTATE</name>
36989                        <description>Sticky flag indicating whether an EPSR.T or EPSR.IT validity error has occurred</description>
36990                        <bitRange>[17:17]</bitRange>
36991                        <access>read-write</access>
36992                    </field>
36993                    <field>
36994                        <name>UFSR_UNDEFINSTR</name>
36995                        <description>Sticky flag indicating whether an undefined instruction error has occurred</description>
36996                        <bitRange>[16:16]</bitRange>
36997                        <access>read-write</access>
36998                    </field>
36999                    <field>
37000                        <name>BFSR_BFARVALID</name>
37001                        <description>Indicates validity of the contents of the BFAR register</description>
37002                        <bitRange>[15:15]</bitRange>
37003                        <access>read-write</access>
37004                    </field>
37005                    <field>
37006                        <name>BFSR_LSPERR</name>
37007                        <description>Records whether a BusFault occurred during FP lazy state preservation</description>
37008                        <bitRange>[13:13]</bitRange>
37009                        <access>read-write</access>
37010                    </field>
37011                    <field>
37012                        <name>BFSR_STKERR</name>
37013                        <description>Records whether a derived BusFault occurred during exception entry stacking</description>
37014                        <bitRange>[12:12]</bitRange>
37015                        <access>read-write</access>
37016                    </field>
37017                    <field>
37018                        <name>BFSR_UNSTKERR</name>
37019                        <description>Records whether a derived BusFault occurred during exception return unstacking</description>
37020                        <bitRange>[11:11]</bitRange>
37021                        <access>read-write</access>
37022                    </field>
37023                    <field>
37024                        <name>BFSR_IMPRECISERR</name>
37025                        <description>Records whether an imprecise data access error has occurred</description>
37026                        <bitRange>[10:10]</bitRange>
37027                        <access>read-write</access>
37028                    </field>
37029                    <field>
37030                        <name>BFSR_PRECISERR</name>
37031                        <description>Records whether a precise data access error has occurred</description>
37032                        <bitRange>[9:9]</bitRange>
37033                        <access>read-write</access>
37034                    </field>
37035                    <field>
37036                        <name>BFSR_IBUSERR</name>
37037                        <description>Records whether a BusFault on an instruction prefetch has occurred</description>
37038                        <bitRange>[8:8]</bitRange>
37039                        <access>read-write</access>
37040                    </field>
37041                    <field>
37042                        <name>MMFSR</name>
37043                        <description>Provides information on MemManage exceptions</description>
37044                        <bitRange>[7:0]</bitRange>
37045                        <access>read-write</access>
37046                    </field>
37047                </fields>
37048            </register>
37049            <register>
37050                <name>HFSR</name>
37051                <addressOffset>0x0000ed2c</addressOffset>
37052                <description>Shows the cause of any HardFaults</description>
37053                <resetValue>0x00000000</resetValue>
37054                <fields>
37055                    <field>
37056                        <name>DEBUGEVT</name>
37057                        <description>Indicates when a Debug event has occurred</description>
37058                        <bitRange>[31:31]</bitRange>
37059                        <access>read-write</access>
37060                    </field>
37061                    <field>
37062                        <name>FORCED</name>
37063                        <description>Indicates that a fault with configurable priority has been escalated to a HardFault exception, because it could not be made active, because of priority, or because it was disabled</description>
37064                        <bitRange>[30:30]</bitRange>
37065                        <access>read-write</access>
37066                    </field>
37067                    <field>
37068                        <name>VECTTBL</name>
37069                        <description>Indicates when a fault has occurred because of a vector table read error on exception processing</description>
37070                        <bitRange>[1:1]</bitRange>
37071                        <access>read-write</access>
37072                    </field>
37073                </fields>
37074            </register>
37075            <register>
37076                <name>DFSR</name>
37077                <addressOffset>0x0000ed30</addressOffset>
37078                <description>Shows which debug event occurred</description>
37079                <resetValue>0x00000000</resetValue>
37080                <fields>
37081                    <field>
37082                        <name>EXTERNAL</name>
37083                        <description>Sticky flag indicating whether an External debug request debug event has occurred</description>
37084                        <bitRange>[4:4]</bitRange>
37085                        <access>read-write</access>
37086                    </field>
37087                    <field>
37088                        <name>VCATCH</name>
37089                        <description>Sticky flag indicating whether a Vector catch debug event has occurred</description>
37090                        <bitRange>[3:3]</bitRange>
37091                        <access>read-write</access>
37092                    </field>
37093                    <field>
37094                        <name>DWTTRAP</name>
37095                        <description>Sticky flag indicating whether a Watchpoint debug event has occurred</description>
37096                        <bitRange>[2:2]</bitRange>
37097                        <access>read-write</access>
37098                    </field>
37099                    <field>
37100                        <name>BKPT</name>
37101                        <description>Sticky flag indicating whether a Breakpoint debug event has occurred</description>
37102                        <bitRange>[1:1]</bitRange>
37103                        <access>read-write</access>
37104                    </field>
37105                    <field>
37106                        <name>HALTED</name>
37107                        <description>Sticky flag indicating that a Halt request debug event or Step debug event has occurred</description>
37108                        <bitRange>[0:0]</bitRange>
37109                        <access>read-write</access>
37110                    </field>
37111                </fields>
37112            </register>
37113            <register>
37114                <name>MMFAR</name>
37115                <addressOffset>0x0000ed34</addressOffset>
37116                <description>Shows the address of the memory location that caused an MPU fault</description>
37117                <resetValue>0x00000000</resetValue>
37118                <fields>
37119                    <field>
37120                        <name>ADDRESS</name>
37121                        <description>This register is updated with the address of a location that produced a MemManage fault. The MMFSR shows the cause of the fault, and whether this field is valid. This field is valid only when MMFSR.MMARVALID is set, otherwise it is UNKNOWN</description>
37122                        <bitRange>[31:0]</bitRange>
37123                        <access>read-write</access>
37124                    </field>
37125                </fields>
37126            </register>
37127            <register>
37128                <name>BFAR</name>
37129                <addressOffset>0x0000ed38</addressOffset>
37130                <description>Shows the address associated with a precise data access BusFault</description>
37131                <resetValue>0x00000000</resetValue>
37132                <fields>
37133                    <field>
37134                        <name>ADDRESS</name>
37135                        <description>This register is updated with the address of a location that produced a BusFault. The BFSR shows the reason for the fault. This field is valid only when BFSR.BFARVALID is set, otherwise it is UNKNOWN</description>
37136                        <bitRange>[31:0]</bitRange>
37137                        <access>read-write</access>
37138                    </field>
37139                </fields>
37140            </register>
37141            <register>
37142                <name>ID_PFR0</name>
37143                <addressOffset>0x0000ed40</addressOffset>
37144                <description>Gives top-level information about the instruction set supported by the PE</description>
37145                <resetValue>0x00000030</resetValue>
37146                <fields>
37147                    <field>
37148                        <name>STATE1</name>
37149                        <description>T32 instruction set support</description>
37150                        <bitRange>[7:4]</bitRange>
37151                        <access>read-only</access>
37152                    </field>
37153                    <field>
37154                        <name>STATE0</name>
37155                        <description>A32 instruction set support</description>
37156                        <bitRange>[3:0]</bitRange>
37157                        <access>read-only</access>
37158                    </field>
37159                </fields>
37160            </register>
37161            <register>
37162                <name>ID_PFR1</name>
37163                <addressOffset>0x0000ed44</addressOffset>
37164                <description>Gives information about the programmers&#39; model and Extensions support</description>
37165                <resetValue>0x00000520</resetValue>
37166                <fields>
37167                    <field>
37168                        <name>MPROGMOD</name>
37169                        <description>Identifies support for the M-Profile programmers&#39; model support</description>
37170                        <bitRange>[11:8]</bitRange>
37171                        <access>read-only</access>
37172                    </field>
37173                    <field>
37174                        <name>SECURITY</name>
37175                        <description>Identifies whether the Security Extension is implemented</description>
37176                        <bitRange>[7:4]</bitRange>
37177                        <access>read-only</access>
37178                    </field>
37179                </fields>
37180            </register>
37181            <register>
37182                <name>ID_DFR0</name>
37183                <addressOffset>0x0000ed48</addressOffset>
37184                <description>Provides top level information about the debug system</description>
37185                <resetValue>0x00200000</resetValue>
37186                <fields>
37187                    <field>
37188                        <name>MPROFDBG</name>
37189                        <description>Indicates the supported M-profile debug architecture</description>
37190                        <bitRange>[23:20]</bitRange>
37191                        <access>read-only</access>
37192                    </field>
37193                </fields>
37194            </register>
37195            <register>
37196                <name>ID_AFR0</name>
37197                <addressOffset>0x0000ed4c</addressOffset>
37198                <description>Provides information about the IMPLEMENTATION DEFINED features of the PE</description>
37199                <resetValue>0x00000000</resetValue>
37200                <fields>
37201                    <field>
37202                        <name>IMPDEF3</name>
37203                        <description>IMPLEMENTATION DEFINED meaning</description>
37204                        <bitRange>[15:12]</bitRange>
37205                        <access>read-only</access>
37206                    </field>
37207                    <field>
37208                        <name>IMPDEF2</name>
37209                        <description>IMPLEMENTATION DEFINED meaning</description>
37210                        <bitRange>[11:8]</bitRange>
37211                        <access>read-only</access>
37212                    </field>
37213                    <field>
37214                        <name>IMPDEF1</name>
37215                        <description>IMPLEMENTATION DEFINED meaning</description>
37216                        <bitRange>[7:4]</bitRange>
37217                        <access>read-only</access>
37218                    </field>
37219                    <field>
37220                        <name>IMPDEF0</name>
37221                        <description>IMPLEMENTATION DEFINED meaning</description>
37222                        <bitRange>[3:0]</bitRange>
37223                        <access>read-only</access>
37224                    </field>
37225                </fields>
37226            </register>
37227            <register>
37228                <name>ID_MMFR0</name>
37229                <addressOffset>0x0000ed50</addressOffset>
37230                <description>Provides information about the implemented memory model and memory management support</description>
37231                <resetValue>0x00101f40</resetValue>
37232                <fields>
37233                    <field>
37234                        <name>AUXREG</name>
37235                        <description>Indicates support for Auxiliary Control Registers</description>
37236                        <bitRange>[23:20]</bitRange>
37237                        <access>read-only</access>
37238                    </field>
37239                    <field>
37240                        <name>TCM</name>
37241                        <description>Indicates support for tightly coupled memories (TCMs)</description>
37242                        <bitRange>[19:16]</bitRange>
37243                        <access>read-only</access>
37244                    </field>
37245                    <field>
37246                        <name>SHARELVL</name>
37247                        <description>Indicates the number of shareability levels implemented</description>
37248                        <bitRange>[15:12]</bitRange>
37249                        <access>read-only</access>
37250                    </field>
37251                    <field>
37252                        <name>OUTERSHR</name>
37253                        <description>Indicates the outermost shareability domain implemented</description>
37254                        <bitRange>[11:8]</bitRange>
37255                        <access>read-only</access>
37256                    </field>
37257                    <field>
37258                        <name>PMSA</name>
37259                        <description>Indicates support for the protected memory system architecture (PMSA)</description>
37260                        <bitRange>[7:4]</bitRange>
37261                        <access>read-only</access>
37262                    </field>
37263                </fields>
37264            </register>
37265            <register>
37266                <name>ID_MMFR1</name>
37267                <addressOffset>0x0000ed54</addressOffset>
37268                <description>Provides information about the implemented memory model and memory management support</description>
37269                <resetValue>0x00000000</resetValue>
37270                <fields>
37271                    <field>
37272                        <name>ID_MMFR1</name>
37273                        <bitRange>[31:0]</bitRange>
37274                        <access>read-write</access>
37275                    </field>
37276                </fields>
37277            </register>
37278            <register>
37279                <name>ID_MMFR2</name>
37280                <addressOffset>0x0000ed58</addressOffset>
37281                <description>Provides information about the implemented memory model and memory management support</description>
37282                <resetValue>0x01000000</resetValue>
37283                <fields>
37284                    <field>
37285                        <name>WFISTALL</name>
37286                        <description>Indicates the support for Wait For Interrupt (WFI) stalling</description>
37287                        <bitRange>[27:24]</bitRange>
37288                        <access>read-only</access>
37289                    </field>
37290                </fields>
37291            </register>
37292            <register>
37293                <name>ID_MMFR3</name>
37294                <addressOffset>0x0000ed5c</addressOffset>
37295                <description>Provides information about the implemented memory model and memory management support</description>
37296                <resetValue>0x00000000</resetValue>
37297                <fields>
37298                    <field>
37299                        <name>BPMAINT</name>
37300                        <description>Indicates the supported branch predictor maintenance</description>
37301                        <bitRange>[11:8]</bitRange>
37302                        <access>read-only</access>
37303                    </field>
37304                    <field>
37305                        <name>CMAINTSW</name>
37306                        <description>Indicates the supported cache maintenance operations by set/way</description>
37307                        <bitRange>[7:4]</bitRange>
37308                        <access>read-only</access>
37309                    </field>
37310                    <field>
37311                        <name>CMAINTVA</name>
37312                        <description>Indicates the supported cache maintenance operations by address</description>
37313                        <bitRange>[3:0]</bitRange>
37314                        <access>read-only</access>
37315                    </field>
37316                </fields>
37317            </register>
37318            <register>
37319                <name>ID_ISAR0</name>
37320                <addressOffset>0x0000ed60</addressOffset>
37321                <description>Provides information about the instruction set implemented by the PE</description>
37322                <resetValue>0x08092300</resetValue>
37323                <fields>
37324                    <field>
37325                        <name>DIVIDE</name>
37326                        <description>Indicates the supported Divide instructions</description>
37327                        <bitRange>[27:24]</bitRange>
37328                        <access>read-only</access>
37329                    </field>
37330                    <field>
37331                        <name>DEBUG</name>
37332                        <description>Indicates the implemented Debug instructions</description>
37333                        <bitRange>[23:20]</bitRange>
37334                        <access>read-only</access>
37335                    </field>
37336                    <field>
37337                        <name>COPROC</name>
37338                        <description>Indicates the supported Coprocessor instructions</description>
37339                        <bitRange>[19:16]</bitRange>
37340                        <access>read-only</access>
37341                    </field>
37342                    <field>
37343                        <name>CMPBRANCH</name>
37344                        <description>Indicates the supported combined Compare and Branch instructions</description>
37345                        <bitRange>[15:12]</bitRange>
37346                        <access>read-only</access>
37347                    </field>
37348                    <field>
37349                        <name>BITFIELD</name>
37350                        <description>Indicates the supported bit field instructions</description>
37351                        <bitRange>[11:8]</bitRange>
37352                        <access>read-only</access>
37353                    </field>
37354                    <field>
37355                        <name>BITCOUNT</name>
37356                        <description>Indicates the supported bit count instructions</description>
37357                        <bitRange>[7:4]</bitRange>
37358                        <access>read-only</access>
37359                    </field>
37360                </fields>
37361            </register>
37362            <register>
37363                <name>ID_ISAR1</name>
37364                <addressOffset>0x0000ed64</addressOffset>
37365                <description>Provides information about the instruction set implemented by the PE</description>
37366                <resetValue>0x05725000</resetValue>
37367                <fields>
37368                    <field>
37369                        <name>INTERWORK</name>
37370                        <description>Indicates the implemented Interworking instructions</description>
37371                        <bitRange>[27:24]</bitRange>
37372                        <access>read-only</access>
37373                    </field>
37374                    <field>
37375                        <name>IMMEDIATE</name>
37376                        <description>Indicates the implemented for data-processing instructions with long immediates</description>
37377                        <bitRange>[23:20]</bitRange>
37378                        <access>read-only</access>
37379                    </field>
37380                    <field>
37381                        <name>IFTHEN</name>
37382                        <description>Indicates the implemented If-Then instructions</description>
37383                        <bitRange>[19:16]</bitRange>
37384                        <access>read-only</access>
37385                    </field>
37386                    <field>
37387                        <name>EXTEND</name>
37388                        <description>Indicates the implemented Extend instructions</description>
37389                        <bitRange>[15:12]</bitRange>
37390                        <access>read-only</access>
37391                    </field>
37392                </fields>
37393            </register>
37394            <register>
37395                <name>ID_ISAR2</name>
37396                <addressOffset>0x0000ed68</addressOffset>
37397                <description>Provides information about the instruction set implemented by the PE</description>
37398                <resetValue>0x30173426</resetValue>
37399                <fields>
37400                    <field>
37401                        <name>REVERSAL</name>
37402                        <description>Indicates the implemented Reversal instructions</description>
37403                        <bitRange>[31:28]</bitRange>
37404                        <access>read-only</access>
37405                    </field>
37406                    <field>
37407                        <name>MULTU</name>
37408                        <description>Indicates the implemented advanced unsigned Multiply instructions</description>
37409                        <bitRange>[23:20]</bitRange>
37410                        <access>read-only</access>
37411                    </field>
37412                    <field>
37413                        <name>MULTS</name>
37414                        <description>Indicates the implemented advanced signed Multiply instructions</description>
37415                        <bitRange>[19:16]</bitRange>
37416                        <access>read-only</access>
37417                    </field>
37418                    <field>
37419                        <name>MULT</name>
37420                        <description>Indicates the implemented additional Multiply instructions</description>
37421                        <bitRange>[15:12]</bitRange>
37422                        <access>read-only</access>
37423                    </field>
37424                    <field>
37425                        <name>MULTIACCESSINT</name>
37426                        <description>Indicates the support for interruptible multi-access instructions</description>
37427                        <bitRange>[11:8]</bitRange>
37428                        <access>read-only</access>
37429                    </field>
37430                    <field>
37431                        <name>MEMHINT</name>
37432                        <description>Indicates the implemented Memory Hint instructions</description>
37433                        <bitRange>[7:4]</bitRange>
37434                        <access>read-only</access>
37435                    </field>
37436                    <field>
37437                        <name>LOADSTORE</name>
37438                        <description>Indicates the implemented additional load/store instructions</description>
37439                        <bitRange>[3:0]</bitRange>
37440                        <access>read-only</access>
37441                    </field>
37442                </fields>
37443            </register>
37444            <register>
37445                <name>ID_ISAR3</name>
37446                <addressOffset>0x0000ed6c</addressOffset>
37447                <description>Provides information about the instruction set implemented by the PE</description>
37448                <resetValue>0x07895729</resetValue>
37449                <fields>
37450                    <field>
37451                        <name>TRUENOP</name>
37452                        <description>Indicates the implemented true NOP instructions</description>
37453                        <bitRange>[27:24]</bitRange>
37454                        <access>read-only</access>
37455                    </field>
37456                    <field>
37457                        <name>T32COPY</name>
37458                        <description>Indicates the support for T32 non flag-setting MOV instructions</description>
37459                        <bitRange>[23:20]</bitRange>
37460                        <access>read-only</access>
37461                    </field>
37462                    <field>
37463                        <name>TABBRANCH</name>
37464                        <description>Indicates the implemented Table Branch instructions</description>
37465                        <bitRange>[19:16]</bitRange>
37466                        <access>read-only</access>
37467                    </field>
37468                    <field>
37469                        <name>SYNCHPRIM</name>
37470                        <description>Used in conjunction with ID_ISAR4.SynchPrim_frac to indicate the implemented Synchronization Primitive instructions</description>
37471                        <bitRange>[15:12]</bitRange>
37472                        <access>read-only</access>
37473                    </field>
37474                    <field>
37475                        <name>SVC</name>
37476                        <description>Indicates the implemented SVC instructions</description>
37477                        <bitRange>[11:8]</bitRange>
37478                        <access>read-only</access>
37479                    </field>
37480                    <field>
37481                        <name>SIMD</name>
37482                        <description>Indicates the implemented SIMD instructions</description>
37483                        <bitRange>[7:4]</bitRange>
37484                        <access>read-only</access>
37485                    </field>
37486                    <field>
37487                        <name>SATURATE</name>
37488                        <description>Indicates the implemented saturating instructions</description>
37489                        <bitRange>[3:0]</bitRange>
37490                        <access>read-only</access>
37491                    </field>
37492                </fields>
37493            </register>
37494            <register>
37495                <name>ID_ISAR4</name>
37496                <addressOffset>0x0000ed70</addressOffset>
37497                <description>Provides information about the instruction set implemented by the PE</description>
37498                <resetValue>0x01310132</resetValue>
37499                <fields>
37500                    <field>
37501                        <name>PSR_M</name>
37502                        <description>Indicates the implemented M profile instructions to modify the PSRs</description>
37503                        <bitRange>[27:24]</bitRange>
37504                        <access>read-only</access>
37505                    </field>
37506                    <field>
37507                        <name>SYNCPRIM_FRAC</name>
37508                        <description>Used in conjunction with ID_ISAR3.SynchPrim to indicate the implemented Synchronization Primitive instructions</description>
37509                        <bitRange>[23:20]</bitRange>
37510                        <access>read-only</access>
37511                    </field>
37512                    <field>
37513                        <name>BARRIER</name>
37514                        <description>Indicates the implemented Barrier instructions</description>
37515                        <bitRange>[19:16]</bitRange>
37516                        <access>read-only</access>
37517                    </field>
37518                    <field>
37519                        <name>WRITEBACK</name>
37520                        <description>Indicates the support for writeback addressing modes</description>
37521                        <bitRange>[11:8]</bitRange>
37522                        <access>read-only</access>
37523                    </field>
37524                    <field>
37525                        <name>WITHSHIFTS</name>
37526                        <description>Indicates the support for writeback addressing modes</description>
37527                        <bitRange>[7:4]</bitRange>
37528                        <access>read-only</access>
37529                    </field>
37530                    <field>
37531                        <name>UNPRIV</name>
37532                        <description>Indicates the implemented unprivileged instructions</description>
37533                        <bitRange>[3:0]</bitRange>
37534                        <access>read-only</access>
37535                    </field>
37536                </fields>
37537            </register>
37538            <register>
37539                <name>ID_ISAR5</name>
37540                <addressOffset>0x0000ed74</addressOffset>
37541                <description>Provides information about the instruction set implemented by the PE</description>
37542                <resetValue>0x00000000</resetValue>
37543                <fields>
37544                    <field>
37545                        <name>ID_ISAR5</name>
37546                        <bitRange>[31:0]</bitRange>
37547                        <access>read-write</access>
37548                    </field>
37549                </fields>
37550            </register>
37551            <register>
37552                <name>CTR</name>
37553                <addressOffset>0x0000ed7c</addressOffset>
37554                <description>Provides information about the architecture of the caches. CTR is RES0 if CLIDR is zero.</description>
37555                <resetValue>0x8000c000</resetValue>
37556                <fields>
37557                    <field>
37558                        <name>RES1</name>
37559                        <description>Reserved, RES1</description>
37560                        <bitRange>[31:31]</bitRange>
37561                        <access>read-only</access>
37562                    </field>
37563                    <field>
37564                        <name>CWG</name>
37565                        <description>Log2 of the number of words of the maximum size of memory that can be overwritten as a result of the eviction of a cache entry that has had a memory location in it modified</description>
37566                        <bitRange>[27:24]</bitRange>
37567                        <access>read-only</access>
37568                    </field>
37569                    <field>
37570                        <name>ERG</name>
37571                        <description>Log2 of the number of words of the maximum size of the reservation granule that has been implemented for the Load-Exclusive and Store-Exclusive instructions</description>
37572                        <bitRange>[23:20]</bitRange>
37573                        <access>read-only</access>
37574                    </field>
37575                    <field>
37576                        <name>DMINLINE</name>
37577                        <description>Log2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the PE</description>
37578                        <bitRange>[19:16]</bitRange>
37579                        <access>read-only</access>
37580                    </field>
37581                    <field>
37582                        <name>RES1_1</name>
37583                        <description>Reserved, RES1</description>
37584                        <bitRange>[15:14]</bitRange>
37585                        <access>read-only</access>
37586                    </field>
37587                    <field>
37588                        <name>IMINLINE</name>
37589                        <description>Log2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the PE</description>
37590                        <bitRange>[3:0]</bitRange>
37591                        <access>read-only</access>
37592                    </field>
37593                </fields>
37594            </register>
37595            <register>
37596                <name>CPACR</name>
37597                <addressOffset>0x0000ed88</addressOffset>
37598                <description>Specifies the access privileges for coprocessors and the FP Extension</description>
37599                <resetValue>0x00000000</resetValue>
37600                <fields>
37601                    <field>
37602                        <name>CP11</name>
37603                        <description>The value in this field is ignored. If the implementation does not include the FP Extension, this field is RAZ/WI. If the value of this bit is not programmed to the same value as the CP10 field, then the value is UNKNOWN</description>
37604                        <bitRange>[23:22]</bitRange>
37605                        <access>read-write</access>
37606                    </field>
37607                    <field>
37608                        <name>CP10</name>
37609                        <description>Defines the access rights for the floating-point functionality</description>
37610                        <bitRange>[21:20]</bitRange>
37611                        <access>read-write</access>
37612                    </field>
37613                    <field>
37614                        <name>CP7</name>
37615                        <description>Controls access privileges for coprocessor 7</description>
37616                        <bitRange>[15:14]</bitRange>
37617                        <access>read-write</access>
37618                    </field>
37619                    <field>
37620                        <name>CP6</name>
37621                        <description>Controls access privileges for coprocessor 6</description>
37622                        <bitRange>[13:12]</bitRange>
37623                        <access>read-write</access>
37624                    </field>
37625                    <field>
37626                        <name>CP5</name>
37627                        <description>Controls access privileges for coprocessor 5</description>
37628                        <bitRange>[11:10]</bitRange>
37629                        <access>read-write</access>
37630                    </field>
37631                    <field>
37632                        <name>CP4</name>
37633                        <description>Controls access privileges for coprocessor 4</description>
37634                        <bitRange>[9:8]</bitRange>
37635                        <access>read-write</access>
37636                    </field>
37637                    <field>
37638                        <name>CP3</name>
37639                        <description>Controls access privileges for coprocessor 3</description>
37640                        <bitRange>[7:6]</bitRange>
37641                        <access>read-write</access>
37642                    </field>
37643                    <field>
37644                        <name>CP2</name>
37645                        <description>Controls access privileges for coprocessor 2</description>
37646                        <bitRange>[5:4]</bitRange>
37647                        <access>read-write</access>
37648                    </field>
37649                    <field>
37650                        <name>CP1</name>
37651                        <description>Controls access privileges for coprocessor 1</description>
37652                        <bitRange>[3:2]</bitRange>
37653                        <access>read-write</access>
37654                    </field>
37655                    <field>
37656                        <name>CP0</name>
37657                        <description>Controls access privileges for coprocessor 0</description>
37658                        <bitRange>[1:0]</bitRange>
37659                        <access>read-write</access>
37660                    </field>
37661                </fields>
37662            </register>
37663            <register>
37664                <name>NSACR</name>
37665                <addressOffset>0x0000ed8c</addressOffset>
37666                <description>Defines the Non-secure access permissions for both the FP Extension and coprocessors CP0 to CP7</description>
37667                <resetValue>0x00000000</resetValue>
37668                <fields>
37669                    <field>
37670                        <name>CP11</name>
37671                        <description>Enables Non-secure access to the Floating-point Extension</description>
37672                        <bitRange>[11:11]</bitRange>
37673                        <access>read-write</access>
37674                    </field>
37675                    <field>
37676                        <name>CP10</name>
37677                        <description>Enables Non-secure access to the Floating-point Extension</description>
37678                        <bitRange>[10:10]</bitRange>
37679                        <access>read-write</access>
37680                    </field>
37681                    <field>
37682                        <name>CP7</name>
37683                        <description>Enables Non-secure access to coprocessor CP7</description>
37684                        <bitRange>[7:7]</bitRange>
37685                        <access>read-write</access>
37686                    </field>
37687                    <field>
37688                        <name>CP6</name>
37689                        <description>Enables Non-secure access to coprocessor CP6</description>
37690                        <bitRange>[6:6]</bitRange>
37691                        <access>read-write</access>
37692                    </field>
37693                    <field>
37694                        <name>CP5</name>
37695                        <description>Enables Non-secure access to coprocessor CP5</description>
37696                        <bitRange>[5:5]</bitRange>
37697                        <access>read-write</access>
37698                    </field>
37699                    <field>
37700                        <name>CP4</name>
37701                        <description>Enables Non-secure access to coprocessor CP4</description>
37702                        <bitRange>[4:4]</bitRange>
37703                        <access>read-write</access>
37704                    </field>
37705                    <field>
37706                        <name>CP3</name>
37707                        <description>Enables Non-secure access to coprocessor CP3</description>
37708                        <bitRange>[3:3]</bitRange>
37709                        <access>read-write</access>
37710                    </field>
37711                    <field>
37712                        <name>CP2</name>
37713                        <description>Enables Non-secure access to coprocessor CP2</description>
37714                        <bitRange>[2:2]</bitRange>
37715                        <access>read-write</access>
37716                    </field>
37717                    <field>
37718                        <name>CP1</name>
37719                        <description>Enables Non-secure access to coprocessor CP1</description>
37720                        <bitRange>[1:1]</bitRange>
37721                        <access>read-write</access>
37722                    </field>
37723                    <field>
37724                        <name>CP0</name>
37725                        <description>Enables Non-secure access to coprocessor CP0</description>
37726                        <bitRange>[0:0]</bitRange>
37727                        <access>read-write</access>
37728                    </field>
37729                </fields>
37730            </register>
37731            <register>
37732                <name>MPU_TYPE</name>
37733                <addressOffset>0x0000ed90</addressOffset>
37734                <description>The MPU Type Register indicates how many regions the MPU `FTSSS supports</description>
37735                <resetValue>0x00000800</resetValue>
37736                <fields>
37737                    <field>
37738                        <name>DREGION</name>
37739                        <description>Number of regions supported by the MPU</description>
37740                        <bitRange>[15:8]</bitRange>
37741                        <access>read-only</access>
37742                    </field>
37743                    <field>
37744                        <name>SEPARATE</name>
37745                        <description>Indicates support for separate instructions and data address regions</description>
37746                        <bitRange>[0:0]</bitRange>
37747                        <access>read-only</access>
37748                    </field>
37749                </fields>
37750            </register>
37751            <register>
37752                <name>MPU_CTRL</name>
37753                <addressOffset>0x0000ed94</addressOffset>
37754                <description>Enables the MPU and, when the MPU is enabled, controls whether the default memory map is enabled as a background region for privileged accesses, and whether the MPU is enabled for HardFaults, NMIs, and exception handlers when FAULTMASK is set to 1</description>
37755                <resetValue>0x00000000</resetValue>
37756                <fields>
37757                    <field>
37758                        <name>PRIVDEFENA</name>
37759                        <description>Controls whether the default memory map is enabled for privileged software</description>
37760                        <bitRange>[2:2]</bitRange>
37761                        <access>read-write</access>
37762                    </field>
37763                    <field>
37764                        <name>HFNMIENA</name>
37765                        <description>Controls whether handlers executing with priority less than 0 access memory with the MPU enabled or disabled. This applies to HardFaults, NMIs, and exception handlers when FAULTMASK is set to 1</description>
37766                        <bitRange>[1:1]</bitRange>
37767                        <access>read-write</access>
37768                    </field>
37769                    <field>
37770                        <name>ENABLE</name>
37771                        <description>Enables the MPU</description>
37772                        <bitRange>[0:0]</bitRange>
37773                        <access>read-write</access>
37774                    </field>
37775                </fields>
37776            </register>
37777            <register>
37778                <name>MPU_RNR</name>
37779                <addressOffset>0x0000ed98</addressOffset>
37780                <description>Selects the region currently accessed by MPU_RBAR and MPU_RLAR</description>
37781                <resetValue>0x00000000</resetValue>
37782                <fields>
37783                    <field>
37784                        <name>REGION</name>
37785                        <description>Indicates the memory region accessed by MPU_RBAR and MPU_RLAR</description>
37786                        <bitRange>[2:0]</bitRange>
37787                        <access>read-write</access>
37788                    </field>
37789                </fields>
37790            </register>
37791            <register>
37792                <name>MPU_RBAR</name>
37793                <addressOffset>0x0000ed9c</addressOffset>
37794                <description>Provides indirect read and write access to the base address of the currently selected MPU region `FTSSS</description>
37795                <resetValue>0x00000000</resetValue>
37796                <fields>
37797                    <field>
37798                        <name>BASE</name>
37799                        <description>Contains bits [31:5] of the lower inclusive limit of the selected MPU memory region. This value is zero extended to provide the base address to be checked against</description>
37800                        <bitRange>[31:5]</bitRange>
37801                        <access>read-write</access>
37802                    </field>
37803                    <field>
37804                        <name>SH</name>
37805                        <description>Defines the Shareability domain of this region for Normal memory</description>
37806                        <bitRange>[4:3]</bitRange>
37807                        <access>read-write</access>
37808                    </field>
37809                    <field>
37810                        <name>AP</name>
37811                        <description>Defines the access permissions for this region</description>
37812                        <bitRange>[2:1]</bitRange>
37813                        <access>read-write</access>
37814                    </field>
37815                    <field>
37816                        <name>XN</name>
37817                        <description>Defines whether code can be executed from this region</description>
37818                        <bitRange>[0:0]</bitRange>
37819                        <access>read-write</access>
37820                    </field>
37821                </fields>
37822            </register>
37823            <register>
37824                <name>MPU_RLAR</name>
37825                <addressOffset>0x0000eda0</addressOffset>
37826                <description>Provides indirect read and write access to the limit address of the currently selected MPU region `FTSSS</description>
37827                <resetValue>0x00000000</resetValue>
37828                <fields>
37829                    <field>
37830                        <name>LIMIT</name>
37831                        <description>Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region. This value is postfixed with 0x1F to provide the limit address to be checked against</description>
37832                        <bitRange>[31:5]</bitRange>
37833                        <access>read-write</access>
37834                    </field>
37835                    <field>
37836                        <name>ATTRINDX</name>
37837                        <description>Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields</description>
37838                        <bitRange>[3:1]</bitRange>
37839                        <access>read-write</access>
37840                    </field>
37841                    <field>
37842                        <name>EN</name>
37843                        <description>Region enable</description>
37844                        <bitRange>[0:0]</bitRange>
37845                        <access>read-write</access>
37846                    </field>
37847                </fields>
37848            </register>
37849            <register>
37850                <name>MPU_RBAR_A1</name>
37851                <addressOffset>0x0000eda4</addressOffset>
37852                <description>Provides indirect read and write access to the base address of the MPU region selected by MPU_RNR[7:2]:(1[1:0]) `FTSSS</description>
37853                <resetValue>0x00000000</resetValue>
37854                <fields>
37855                    <field>
37856                        <name>BASE</name>
37857                        <description>Contains bits [31:5] of the lower inclusive limit of the selected MPU memory region. This value is zero extended to provide the base address to be checked against</description>
37858                        <bitRange>[31:5]</bitRange>
37859                        <access>read-write</access>
37860                    </field>
37861                    <field>
37862                        <name>SH</name>
37863                        <description>Defines the Shareability domain of this region for Normal memory</description>
37864                        <bitRange>[4:3]</bitRange>
37865                        <access>read-write</access>
37866                    </field>
37867                    <field>
37868                        <name>AP</name>
37869                        <description>Defines the access permissions for this region</description>
37870                        <bitRange>[2:1]</bitRange>
37871                        <access>read-write</access>
37872                    </field>
37873                    <field>
37874                        <name>XN</name>
37875                        <description>Defines whether code can be executed from this region</description>
37876                        <bitRange>[0:0]</bitRange>
37877                        <access>read-write</access>
37878                    </field>
37879                </fields>
37880            </register>
37881            <register>
37882                <name>MPU_RLAR_A1</name>
37883                <addressOffset>0x0000eda8</addressOffset>
37884                <description>Provides indirect read and write access to the limit address of the currently selected MPU region selected by MPU_RNR[7:2]:(1[1:0]) `FTSSS</description>
37885                <resetValue>0x00000000</resetValue>
37886                <fields>
37887                    <field>
37888                        <name>LIMIT</name>
37889                        <description>Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region. This value is postfixed with 0x1F to provide the limit address to be checked against</description>
37890                        <bitRange>[31:5]</bitRange>
37891                        <access>read-write</access>
37892                    </field>
37893                    <field>
37894                        <name>ATTRINDX</name>
37895                        <description>Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields</description>
37896                        <bitRange>[3:1]</bitRange>
37897                        <access>read-write</access>
37898                    </field>
37899                    <field>
37900                        <name>EN</name>
37901                        <description>Region enable</description>
37902                        <bitRange>[0:0]</bitRange>
37903                        <access>read-write</access>
37904                    </field>
37905                </fields>
37906            </register>
37907            <register>
37908                <name>MPU_RBAR_A2</name>
37909                <addressOffset>0x0000edac</addressOffset>
37910                <description>Provides indirect read and write access to the base address of the MPU region selected by MPU_RNR[7:2]:(2[1:0]) `FTSSS</description>
37911                <resetValue>0x00000000</resetValue>
37912                <fields>
37913                    <field>
37914                        <name>BASE</name>
37915                        <description>Contains bits [31:5] of the lower inclusive limit of the selected MPU memory region. This value is zero extended to provide the base address to be checked against</description>
37916                        <bitRange>[31:5]</bitRange>
37917                        <access>read-write</access>
37918                    </field>
37919                    <field>
37920                        <name>SH</name>
37921                        <description>Defines the Shareability domain of this region for Normal memory</description>
37922                        <bitRange>[4:3]</bitRange>
37923                        <access>read-write</access>
37924                    </field>
37925                    <field>
37926                        <name>AP</name>
37927                        <description>Defines the access permissions for this region</description>
37928                        <bitRange>[2:1]</bitRange>
37929                        <access>read-write</access>
37930                    </field>
37931                    <field>
37932                        <name>XN</name>
37933                        <description>Defines whether code can be executed from this region</description>
37934                        <bitRange>[0:0]</bitRange>
37935                        <access>read-write</access>
37936                    </field>
37937                </fields>
37938            </register>
37939            <register>
37940                <name>MPU_RLAR_A2</name>
37941                <addressOffset>0x0000edb0</addressOffset>
37942                <description>Provides indirect read and write access to the limit address of the currently selected MPU region selected by MPU_RNR[7:2]:(2[1:0]) `FTSSS</description>
37943                <resetValue>0x00000000</resetValue>
37944                <fields>
37945                    <field>
37946                        <name>LIMIT</name>
37947                        <description>Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region. This value is postfixed with 0x1F to provide the limit address to be checked against</description>
37948                        <bitRange>[31:5]</bitRange>
37949                        <access>read-write</access>
37950                    </field>
37951                    <field>
37952                        <name>ATTRINDX</name>
37953                        <description>Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields</description>
37954                        <bitRange>[3:1]</bitRange>
37955                        <access>read-write</access>
37956                    </field>
37957                    <field>
37958                        <name>EN</name>
37959                        <description>Region enable</description>
37960                        <bitRange>[0:0]</bitRange>
37961                        <access>read-write</access>
37962                    </field>
37963                </fields>
37964            </register>
37965            <register>
37966                <name>MPU_RBAR_A3</name>
37967                <addressOffset>0x0000edb4</addressOffset>
37968                <description>Provides indirect read and write access to the base address of the MPU region selected by MPU_RNR[7:2]:(3[1:0]) `FTSSS</description>
37969                <resetValue>0x00000000</resetValue>
37970                <fields>
37971                    <field>
37972                        <name>BASE</name>
37973                        <description>Contains bits [31:5] of the lower inclusive limit of the selected MPU memory region. This value is zero extended to provide the base address to be checked against</description>
37974                        <bitRange>[31:5]</bitRange>
37975                        <access>read-write</access>
37976                    </field>
37977                    <field>
37978                        <name>SH</name>
37979                        <description>Defines the Shareability domain of this region for Normal memory</description>
37980                        <bitRange>[4:3]</bitRange>
37981                        <access>read-write</access>
37982                    </field>
37983                    <field>
37984                        <name>AP</name>
37985                        <description>Defines the access permissions for this region</description>
37986                        <bitRange>[2:1]</bitRange>
37987                        <access>read-write</access>
37988                    </field>
37989                    <field>
37990                        <name>XN</name>
37991                        <description>Defines whether code can be executed from this region</description>
37992                        <bitRange>[0:0]</bitRange>
37993                        <access>read-write</access>
37994                    </field>
37995                </fields>
37996            </register>
37997            <register>
37998                <name>MPU_RLAR_A3</name>
37999                <addressOffset>0x0000edb8</addressOffset>
38000                <description>Provides indirect read and write access to the limit address of the currently selected MPU region selected by MPU_RNR[7:2]:(3[1:0]) `FTSSS</description>
38001                <resetValue>0x00000000</resetValue>
38002                <fields>
38003                    <field>
38004                        <name>LIMIT</name>
38005                        <description>Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region. This value is postfixed with 0x1F to provide the limit address to be checked against</description>
38006                        <bitRange>[31:5]</bitRange>
38007                        <access>read-write</access>
38008                    </field>
38009                    <field>
38010                        <name>ATTRINDX</name>
38011                        <description>Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields</description>
38012                        <bitRange>[3:1]</bitRange>
38013                        <access>read-write</access>
38014                    </field>
38015                    <field>
38016                        <name>EN</name>
38017                        <description>Region enable</description>
38018                        <bitRange>[0:0]</bitRange>
38019                        <access>read-write</access>
38020                    </field>
38021                </fields>
38022            </register>
38023            <register>
38024                <name>MPU_MAIR0</name>
38025                <addressOffset>0x0000edc0</addressOffset>
38026                <description>Along with MPU_MAIR1, provides the memory attribute encodings corresponding to the AttrIndex values</description>
38027                <resetValue>0x00000000</resetValue>
38028                <fields>
38029                    <field>
38030                        <name>ATTR3</name>
38031                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 3</description>
38032                        <bitRange>[31:24]</bitRange>
38033                        <access>read-write</access>
38034                    </field>
38035                    <field>
38036                        <name>ATTR2</name>
38037                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 2</description>
38038                        <bitRange>[23:16]</bitRange>
38039                        <access>read-write</access>
38040                    </field>
38041                    <field>
38042                        <name>ATTR1</name>
38043                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 1</description>
38044                        <bitRange>[15:8]</bitRange>
38045                        <access>read-write</access>
38046                    </field>
38047                    <field>
38048                        <name>ATTR0</name>
38049                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 0</description>
38050                        <bitRange>[7:0]</bitRange>
38051                        <access>read-write</access>
38052                    </field>
38053                </fields>
38054            </register>
38055            <register>
38056                <name>MPU_MAIR1</name>
38057                <addressOffset>0x0000edc4</addressOffset>
38058                <description>Along with MPU_MAIR0, provides the memory attribute encodings corresponding to the AttrIndex values</description>
38059                <resetValue>0x00000000</resetValue>
38060                <fields>
38061                    <field>
38062                        <name>ATTR7</name>
38063                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 7</description>
38064                        <bitRange>[31:24]</bitRange>
38065                        <access>read-write</access>
38066                    </field>
38067                    <field>
38068                        <name>ATTR6</name>
38069                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 6</description>
38070                        <bitRange>[23:16]</bitRange>
38071                        <access>read-write</access>
38072                    </field>
38073                    <field>
38074                        <name>ATTR5</name>
38075                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 5</description>
38076                        <bitRange>[15:8]</bitRange>
38077                        <access>read-write</access>
38078                    </field>
38079                    <field>
38080                        <name>ATTR4</name>
38081                        <description>Memory attribute encoding for MPU regions with an AttrIndex of 4</description>
38082                        <bitRange>[7:0]</bitRange>
38083                        <access>read-write</access>
38084                    </field>
38085                </fields>
38086            </register>
38087            <register>
38088                <name>SAU_CTRL</name>
38089                <addressOffset>0x0000edd0</addressOffset>
38090                <description>Allows enabling of the Security Attribution Unit</description>
38091                <resetValue>0x00000000</resetValue>
38092                <fields>
38093                    <field>
38094                        <name>ALLNS</name>
38095                        <description>When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure</description>
38096                        <bitRange>[1:1]</bitRange>
38097                        <access>read-write</access>
38098                    </field>
38099                    <field>
38100                        <name>ENABLE</name>
38101                        <description>Enables the SAU</description>
38102                        <bitRange>[0:0]</bitRange>
38103                        <access>read-write</access>
38104                    </field>
38105                </fields>
38106            </register>
38107            <register>
38108                <name>SAU_TYPE</name>
38109                <addressOffset>0x0000edd4</addressOffset>
38110                <description>Indicates the number of regions implemented by the Security Attribution Unit</description>
38111                <resetValue>0x00000008</resetValue>
38112                <fields>
38113                    <field>
38114                        <name>SREGION</name>
38115                        <description>The number of implemented SAU regions</description>
38116                        <bitRange>[7:0]</bitRange>
38117                        <access>read-only</access>
38118                    </field>
38119                </fields>
38120            </register>
38121            <register>
38122                <name>SAU_RNR</name>
38123                <addressOffset>0x0000edd8</addressOffset>
38124                <description>Selects the region currently accessed by SAU_RBAR and SAU_RLAR</description>
38125                <resetValue>0x00000000</resetValue>
38126                <fields>
38127                    <field>
38128                        <name>REGION</name>
38129                        <description>Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR</description>
38130                        <bitRange>[7:0]</bitRange>
38131                        <access>read-write</access>
38132                    </field>
38133                </fields>
38134            </register>
38135            <register>
38136                <name>SAU_RBAR</name>
38137                <addressOffset>0x0000eddc</addressOffset>
38138                <description>Provides indirect read and write access to the base address of the currently selected SAU region</description>
38139                <resetValue>0x00000000</resetValue>
38140                <fields>
38141                    <field>
38142                        <name>BADDR</name>
38143                        <description>Holds bits [31:5] of the base address for the selected SAU region</description>
38144                        <bitRange>[31:5]</bitRange>
38145                        <access>read-write</access>
38146                    </field>
38147                </fields>
38148            </register>
38149            <register>
38150                <name>SAU_RLAR</name>
38151                <addressOffset>0x0000ede0</addressOffset>
38152                <description>Provides indirect read and write access to the limit address of the currently selected SAU region</description>
38153                <resetValue>0x00000000</resetValue>
38154                <fields>
38155                    <field>
38156                        <name>LADDR</name>
38157                        <description>Holds bits [31:5] of the limit address for the selected SAU region</description>
38158                        <bitRange>[31:5]</bitRange>
38159                        <access>read-write</access>
38160                    </field>
38161                    <field>
38162                        <name>NSC</name>
38163                        <description>Controls whether Non-secure state is permitted to execute an SG instruction from this region</description>
38164                        <bitRange>[1:1]</bitRange>
38165                        <access>read-write</access>
38166                    </field>
38167                    <field>
38168                        <name>ENABLE</name>
38169                        <description>SAU region enable</description>
38170                        <bitRange>[0:0]</bitRange>
38171                        <access>read-write</access>
38172                    </field>
38173                </fields>
38174            </register>
38175            <register>
38176                <name>SFSR</name>
38177                <addressOffset>0x0000ede4</addressOffset>
38178                <description>Provides information about any security related faults</description>
38179                <resetValue>0x00000000</resetValue>
38180                <fields>
38181                    <field>
38182                        <name>LSERR</name>
38183                        <description>Sticky flag indicating that an error occurred during lazy state activation or deactivation</description>
38184                        <bitRange>[7:7]</bitRange>
38185                        <access>read-write</access>
38186                    </field>
38187                    <field>
38188                        <name>SFARVALID</name>
38189                        <description>This bit is set when the SFAR register contains a valid value. As with similar fields, such as BFSR.BFARVALID and MMFSR.MMARVALID, this bit can be cleared by other exceptions, such as BusFault</description>
38190                        <bitRange>[6:6]</bitRange>
38191                        <access>read-write</access>
38192                    </field>
38193                    <field>
38194                        <name>LSPERR</name>
38195                        <description>Stick flag indicating that an SAU or IDAU violation occurred during the lazy preservation of floating-point state</description>
38196                        <bitRange>[5:5]</bitRange>
38197                        <access>read-write</access>
38198                    </field>
38199                    <field>
38200                        <name>INVTRAN</name>
38201                        <description>Sticky flag indicating that an exception was raised due to a branch that was not flagged as being domain crossing causing a transition from Secure to Non-secure memory</description>
38202                        <bitRange>[4:4]</bitRange>
38203                        <access>read-write</access>
38204                    </field>
38205                    <field>
38206                        <name>AUVIOL</name>
38207                        <description>Sticky flag indicating that an attempt was made to access parts of the address space that are marked as Secure with NS-Req for the transaction set to Non-secure. This bit is not set if the violation occurred during lazy state preservation. See LSPERR</description>
38208                        <bitRange>[3:3]</bitRange>
38209                        <access>read-write</access>
38210                    </field>
38211                    <field>
38212                        <name>INVER</name>
38213                        <description>This can be caused by EXC_RETURN.DCRS being set to 0 when returning from an exception in the Non-secure state, or by EXC_RETURN.ES being set to 1 when returning from an exception in the Non-secure state</description>
38214                        <bitRange>[2:2]</bitRange>
38215                        <access>read-write</access>
38216                    </field>
38217                    <field>
38218                        <name>INVIS</name>
38219                        <description>This bit is set if the integrity signature in an exception stack frame is found to be invalid during the unstacking operation</description>
38220                        <bitRange>[1:1]</bitRange>
38221                        <access>read-write</access>
38222                    </field>
38223                    <field>
38224                        <name>INVEP</name>
38225                        <description>This bit is set if a function call from the Non-secure state or exception targets a non-SG instruction in the Secure state. This bit is also set if the target address is a SG instruction, but there is no matching SAU/IDAU region with the NSC flag set</description>
38226                        <bitRange>[0:0]</bitRange>
38227                        <access>read-write</access>
38228                    </field>
38229                </fields>
38230            </register>
38231            <register>
38232                <name>SFAR</name>
38233                <addressOffset>0x0000ede8</addressOffset>
38234                <description>Shows the address of the memory location that caused a Security violation</description>
38235                <resetValue>0x00000000</resetValue>
38236                <fields>
38237                    <field>
38238                        <name>ADDRESS</name>
38239                        <description>The address of an access that caused a attribution unit violation. This field is only valid when SFSR.SFARVALID is set. This allows the actual flip flops associated with this register to be shared with other fault address registers. If an implementation chooses to share the storage in this way, care must be taken to not leak Secure address information to the Non-secure state. One way of achieving this is to share the SFAR register with the MMFAR_S register, which is not accessible to the Non-secure state</description>
38240                        <bitRange>[31:0]</bitRange>
38241                        <access>read-write</access>
38242                    </field>
38243                </fields>
38244            </register>
38245            <register>
38246                <name>DHCSR</name>
38247                <addressOffset>0x0000edf0</addressOffset>
38248                <description>Controls halting debug</description>
38249                <resetValue>0x00000000</resetValue>
38250                <fields>
38251                    <field>
38252                        <name>S_RESTART_ST</name>
38253                        <description>Indicates the PE has processed a request to clear DHCSR.C_HALT to 0. That is, either a write to DHCSR that clears DHCSR.C_HALT from 1 to 0, or an External Restart Request</description>
38254                        <bitRange>[26:26]</bitRange>
38255                        <access>read-only</access>
38256                    </field>
38257                    <field>
38258                        <name>S_RESET_ST</name>
38259                        <description>Indicates whether the PE has been reset since the last read of the DHCSR</description>
38260                        <bitRange>[25:25]</bitRange>
38261                        <access>read-only</access>
38262                    </field>
38263                    <field>
38264                        <name>S_RETIRE_ST</name>
38265                        <description>Set to 1 every time the PE retires one of more instructions</description>
38266                        <bitRange>[24:24]</bitRange>
38267                        <access>read-only</access>
38268                    </field>
38269                    <field>
38270                        <name>S_SDE</name>
38271                        <description>Indicates whether Secure invasive debug is allowed</description>
38272                        <bitRange>[20:20]</bitRange>
38273                        <access>read-only</access>
38274                    </field>
38275                    <field>
38276                        <name>S_LOCKUP</name>
38277                        <description>Indicates whether the PE is in Lockup state</description>
38278                        <bitRange>[19:19]</bitRange>
38279                        <access>read-only</access>
38280                    </field>
38281                    <field>
38282                        <name>S_SLEEP</name>
38283                        <description>Indicates whether the PE is sleeping</description>
38284                        <bitRange>[18:18]</bitRange>
38285                        <access>read-only</access>
38286                    </field>
38287                    <field>
38288                        <name>S_HALT</name>
38289                        <description>Indicates whether the PE is in Debug state</description>
38290                        <bitRange>[17:17]</bitRange>
38291                        <access>read-only</access>
38292                    </field>
38293                    <field>
38294                        <name>S_REGRDY</name>
38295                        <description>Handshake flag to transfers through the DCRDR</description>
38296                        <bitRange>[16:16]</bitRange>
38297                        <access>read-only</access>
38298                    </field>
38299                    <field>
38300                        <name>C_SNAPSTALL</name>
38301                        <description>Allow imprecise entry to Debug state</description>
38302                        <bitRange>[5:5]</bitRange>
38303                        <access>read-write</access>
38304                    </field>
38305                    <field>
38306                        <name>C_MASKINTS</name>
38307                        <description>When debug is enabled, the debugger can write to this bit to mask PendSV, SysTick and external configurable interrupts</description>
38308                        <bitRange>[3:3]</bitRange>
38309                        <access>read-write</access>
38310                    </field>
38311                    <field>
38312                        <name>C_STEP</name>
38313                        <description>Enable single instruction step</description>
38314                        <bitRange>[2:2]</bitRange>
38315                        <access>read-write</access>
38316                    </field>
38317                    <field>
38318                        <name>C_HALT</name>
38319                        <description>PE enter Debug state halt request</description>
38320                        <bitRange>[1:1]</bitRange>
38321                        <access>read-write</access>
38322                    </field>
38323                    <field>
38324                        <name>C_DEBUGEN</name>
38325                        <description>Enable Halting debug</description>
38326                        <bitRange>[0:0]</bitRange>
38327                        <access>read-write</access>
38328                    </field>
38329                </fields>
38330            </register>
38331            <register>
38332                <name>DCRSR</name>
38333                <addressOffset>0x0000edf4</addressOffset>
38334                <description>With the DCRDR, provides debug access to the general-purpose registers, special-purpose registers, and the FP extension registers. A write to the DCRSR specifies the register to transfer, whether the transfer is a read or write, and starts the transfer</description>
38335                <resetValue>0x00000000</resetValue>
38336                <fields>
38337                    <field>
38338                        <name>REGWNR</name>
38339                        <description>Specifies the access type for the transfer</description>
38340                        <bitRange>[16:16]</bitRange>
38341                        <access>read-write</access>
38342                    </field>
38343                    <field>
38344                        <name>REGSEL</name>
38345                        <description>Specifies the general-purpose register, special-purpose register, or FP register to transfer</description>
38346                        <bitRange>[6:0]</bitRange>
38347                        <access>read-write</access>
38348                    </field>
38349                </fields>
38350            </register>
38351            <register>
38352                <name>DCRDR</name>
38353                <addressOffset>0x0000edf8</addressOffset>
38354                <description>With the DCRSR, provides debug access to the general-purpose registers, special-purpose registers, and the FP Extension registers. If the Main Extension is implemented, it can also be used for message passing between an external debugger and a debug agent running on the PE</description>
38355                <resetValue>0x00000000</resetValue>
38356                <fields>
38357                    <field>
38358                        <name>DBGTMP</name>
38359                        <description>Provides debug access for reading and writing the general-purpose registers, special-purpose registers, and Floating-point Extension registers</description>
38360                        <bitRange>[31:0]</bitRange>
38361                        <access>read-write</access>
38362                    </field>
38363                </fields>
38364            </register>
38365            <register>
38366                <name>DEMCR</name>
38367                <addressOffset>0x0000edfc</addressOffset>
38368                <description>Manages vector catch behavior and DebugMonitor handling when debugging</description>
38369                <resetValue>0x00000000</resetValue>
38370                <fields>
38371                    <field>
38372                        <name>TRCENA</name>
38373                        <description>Global enable for all DWT and ITM features</description>
38374                        <bitRange>[24:24]</bitRange>
38375                        <access>read-write</access>
38376                    </field>
38377                    <field>
38378                        <name>SDME</name>
38379                        <description>Indicates whether the DebugMonitor targets the Secure or the Non-secure state and whether debug events are allowed in Secure state</description>
38380                        <bitRange>[20:20]</bitRange>
38381                        <access>read-only</access>
38382                    </field>
38383                    <field>
38384                        <name>MON_REQ</name>
38385                        <description>DebugMonitor semaphore bit</description>
38386                        <bitRange>[19:19]</bitRange>
38387                        <access>read-write</access>
38388                    </field>
38389                    <field>
38390                        <name>MON_STEP</name>
38391                        <description>Enable DebugMonitor stepping</description>
38392                        <bitRange>[18:18]</bitRange>
38393                        <access>read-write</access>
38394                    </field>
38395                    <field>
38396                        <name>MON_PEND</name>
38397                        <description>Sets or clears the pending state of the DebugMonitor exception</description>
38398                        <bitRange>[17:17]</bitRange>
38399                        <access>read-write</access>
38400                    </field>
38401                    <field>
38402                        <name>MON_EN</name>
38403                        <description>Enable the DebugMonitor exception</description>
38404                        <bitRange>[16:16]</bitRange>
38405                        <access>read-write</access>
38406                    </field>
38407                    <field>
38408                        <name>VC_SFERR</name>
38409                        <description>SecureFault exception halting debug vector catch enable</description>
38410                        <bitRange>[11:11]</bitRange>
38411                        <access>read-write</access>
38412                    </field>
38413                    <field>
38414                        <name>VC_HARDERR</name>
38415                        <description>HardFault exception halting debug vector catch enable</description>
38416                        <bitRange>[10:10]</bitRange>
38417                        <access>read-write</access>
38418                    </field>
38419                    <field>
38420                        <name>VC_INTERR</name>
38421                        <description>Enable halting debug vector catch for faults during exception entry and return</description>
38422                        <bitRange>[9:9]</bitRange>
38423                        <access>read-write</access>
38424                    </field>
38425                    <field>
38426                        <name>VC_BUSERR</name>
38427                        <description>BusFault exception halting debug vector catch enable</description>
38428                        <bitRange>[8:8]</bitRange>
38429                        <access>read-write</access>
38430                    </field>
38431                    <field>
38432                        <name>VC_STATERR</name>
38433                        <description>Enable halting debug trap on a UsageFault exception caused by a state information error, for example an Undefined Instruction exception</description>
38434                        <bitRange>[7:7]</bitRange>
38435                        <access>read-write</access>
38436                    </field>
38437                    <field>
38438                        <name>VC_CHKERR</name>
38439                        <description>Enable halting debug trap on a UsageFault exception caused by a checking error, for example an alignment check error</description>
38440                        <bitRange>[6:6]</bitRange>
38441                        <access>read-write</access>
38442                    </field>
38443                    <field>
38444                        <name>VC_NOCPERR</name>
38445                        <description>Enable halting debug trap on a UsageFault caused by an access to a coprocessor</description>
38446                        <bitRange>[5:5]</bitRange>
38447                        <access>read-write</access>
38448                    </field>
38449                    <field>
38450                        <name>VC_MMERR</name>
38451                        <description>Enable halting debug trap on a MemManage exception</description>
38452                        <bitRange>[4:4]</bitRange>
38453                        <access>read-write</access>
38454                    </field>
38455                    <field>
38456                        <name>VC_CORERESET</name>
38457                        <description>Enable Reset Vector Catch. This causes a warm reset to halt a running system</description>
38458                        <bitRange>[0:0]</bitRange>
38459                        <access>read-write</access>
38460                    </field>
38461                </fields>
38462            </register>
38463            <register>
38464                <name>DSCSR</name>
38465                <addressOffset>0x0000ee08</addressOffset>
38466                <description>Provides control and status information for Secure debug</description>
38467                <resetValue>0x00000000</resetValue>
38468                <fields>
38469                    <field>
38470                        <name>CDSKEY</name>
38471                        <description>Writes to the CDS bit are ignored unless CDSKEY is concurrently written to zero</description>
38472                        <bitRange>[17:17]</bitRange>
38473                        <access>read-write</access>
38474                    </field>
38475                    <field>
38476                        <name>CDS</name>
38477                        <description>This field indicates the current Security state of the processor</description>
38478                        <bitRange>[16:16]</bitRange>
38479                        <access>read-write</access>
38480                    </field>
38481                    <field>
38482                        <name>SBRSEL</name>
38483                        <description>If SBRSELEN is 1 this bit selects whether the Non-secure or the Secure version of the memory-mapped Banked registers are accessible to the debugger</description>
38484                        <bitRange>[1:1]</bitRange>
38485                        <access>read-write</access>
38486                    </field>
38487                    <field>
38488                        <name>SBRSELEN</name>
38489                        <description>Controls whether the SBRSEL field or the current Security state of the processor selects which version of the memory-mapped Banked registers are accessed to the debugger</description>
38490                        <bitRange>[0:0]</bitRange>
38491                        <access>read-write</access>
38492                    </field>
38493                </fields>
38494            </register>
38495            <register>
38496                <name>STIR</name>
38497                <addressOffset>0x0000ef00</addressOffset>
38498                <description>Provides a mechanism for software to generate an interrupt</description>
38499                <resetValue>0x00000000</resetValue>
38500                <fields>
38501                    <field>
38502                        <name>INTID</name>
38503                        <description>Indicates the interrupt to be pended. The value written is (ExceptionNumber - 16)</description>
38504                        <bitRange>[8:0]</bitRange>
38505                        <access>read-write</access>
38506                    </field>
38507                </fields>
38508            </register>
38509            <register>
38510                <name>FPCCR</name>
38511                <addressOffset>0x0000ef34</addressOffset>
38512                <description>Holds control data for the Floating-point extension</description>
38513                <resetValue>0x20000472</resetValue>
38514                <fields>
38515                    <field>
38516                        <name>ASPEN</name>
38517                        <description>When this bit is set to 1, execution of a floating-point instruction sets the CONTROL.FPCA bit to 1</description>
38518                        <bitRange>[31:31]</bitRange>
38519                        <access>read-write</access>
38520                    </field>
38521                    <field>
38522                        <name>LSPEN</name>
38523                        <description>Enables lazy context save of floating-point state</description>
38524                        <bitRange>[30:30]</bitRange>
38525                        <access>read-write</access>
38526                    </field>
38527                    <field>
38528                        <name>LSPENS</name>
38529                        <description>This bit controls whether the LSPEN bit is writeable from the Non-secure state</description>
38530                        <bitRange>[29:29]</bitRange>
38531                        <access>read-write</access>
38532                    </field>
38533                    <field>
38534                        <name>CLRONRET</name>
38535                        <description>Clear floating-point caller saved registers on exception return</description>
38536                        <bitRange>[28:28]</bitRange>
38537                        <access>read-write</access>
38538                    </field>
38539                    <field>
38540                        <name>CLRONRETS</name>
38541                        <description>This bit controls whether the CLRONRET bit is writeable from the Non-secure state</description>
38542                        <bitRange>[27:27]</bitRange>
38543                        <access>read-write</access>
38544                    </field>
38545                    <field>
38546                        <name>TS</name>
38547                        <description>Treat floating-point registers as Secure enable</description>
38548                        <bitRange>[26:26]</bitRange>
38549                        <access>read-write</access>
38550                    </field>
38551                    <field>
38552                        <name>UFRDY</name>
38553                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the UsageFault exception to pending</description>
38554                        <bitRange>[10:10]</bitRange>
38555                        <access>read-write</access>
38556                    </field>
38557                    <field>
38558                        <name>SPLIMVIOL</name>
38559                        <description>This bit is banked between the Security states and indicates whether the floating-point context violates the stack pointer limit that was active when lazy state preservation was activated. SPLIMVIOL modifies the lazy floating-point state preservation behavior</description>
38560                        <bitRange>[9:9]</bitRange>
38561                        <access>read-write</access>
38562                    </field>
38563                    <field>
38564                        <name>MONRDY</name>
38565                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the DebugMonitor exception to pending</description>
38566                        <bitRange>[8:8]</bitRange>
38567                        <access>read-write</access>
38568                    </field>
38569                    <field>
38570                        <name>SFRDY</name>
38571                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the SecureFault exception to pending. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state</description>
38572                        <bitRange>[7:7]</bitRange>
38573                        <access>read-write</access>
38574                    </field>
38575                    <field>
38576                        <name>BFRDY</name>
38577                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the BusFault exception to pending</description>
38578                        <bitRange>[6:6]</bitRange>
38579                        <access>read-write</access>
38580                    </field>
38581                    <field>
38582                        <name>MMRDY</name>
38583                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the MemManage exception to pending</description>
38584                        <bitRange>[5:5]</bitRange>
38585                        <access>read-write</access>
38586                    </field>
38587                    <field>
38588                        <name>HFRDY</name>
38589                        <description>Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the HardFault exception to pending</description>
38590                        <bitRange>[4:4]</bitRange>
38591                        <access>read-write</access>
38592                    </field>
38593                    <field>
38594                        <name>THREAD</name>
38595                        <description>Indicates the PE mode when it allocated the floating-point stack frame</description>
38596                        <bitRange>[3:3]</bitRange>
38597                        <access>read-write</access>
38598                    </field>
38599                    <field>
38600                        <name>S</name>
38601                        <description>Security status of the floating-point context. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state. This bit is updated whenever lazy state preservation is activated, or when a floating-point instruction is executed</description>
38602                        <bitRange>[2:2]</bitRange>
38603                        <access>read-write</access>
38604                    </field>
38605                    <field>
38606                        <name>USER</name>
38607                        <description>Indicates the privilege level of the software executing when the PE allocated the floating-point stack frame</description>
38608                        <bitRange>[1:1]</bitRange>
38609                        <access>read-write</access>
38610                    </field>
38611                    <field>
38612                        <name>LSPACT</name>
38613                        <description>Indicates whether lazy preservation of the floating-point state is active</description>
38614                        <bitRange>[0:0]</bitRange>
38615                        <access>read-write</access>
38616                    </field>
38617                </fields>
38618            </register>
38619            <register>
38620                <name>FPCAR</name>
38621                <addressOffset>0x0000ef38</addressOffset>
38622                <description>Holds the location of the unpopulated floating-point register space allocated on an exception stack frame</description>
38623                <resetValue>0x00000000</resetValue>
38624                <fields>
38625                    <field>
38626                        <name>ADDRESS</name>
38627                        <description>The location of the unpopulated floating-point register space allocated on an exception stack frame</description>
38628                        <bitRange>[31:3]</bitRange>
38629                        <access>read-write</access>
38630                    </field>
38631                </fields>
38632            </register>
38633            <register>
38634                <name>FPDSCR</name>
38635                <addressOffset>0x0000ef3c</addressOffset>
38636                <description>Holds the default values for the floating-point status control data that the PE assigns to the FPSCR when it creates a new floating-point context</description>
38637                <resetValue>0x00000000</resetValue>
38638                <fields>
38639                    <field>
38640                        <name>AHP</name>
38641                        <description>Default value for FPSCR.AHP</description>
38642                        <bitRange>[26:26]</bitRange>
38643                        <access>read-write</access>
38644                    </field>
38645                    <field>
38646                        <name>DN</name>
38647                        <description>Default value for FPSCR.DN</description>
38648                        <bitRange>[25:25]</bitRange>
38649                        <access>read-write</access>
38650                    </field>
38651                    <field>
38652                        <name>FZ</name>
38653                        <description>Default value for FPSCR.FZ</description>
38654                        <bitRange>[24:24]</bitRange>
38655                        <access>read-write</access>
38656                    </field>
38657                    <field>
38658                        <name>RMODE</name>
38659                        <description>Default value for FPSCR.RMode</description>
38660                        <bitRange>[23:22]</bitRange>
38661                        <access>read-write</access>
38662                    </field>
38663                </fields>
38664            </register>
38665            <register>
38666                <name>MVFR0</name>
38667                <addressOffset>0x0000ef40</addressOffset>
38668                <description>Describes the features provided by the Floating-point Extension</description>
38669                <resetValue>0x60540601</resetValue>
38670                <fields>
38671                    <field>
38672                        <name>FPROUND</name>
38673                        <description>Indicates the rounding modes supported by the FP Extension</description>
38674                        <bitRange>[31:28]</bitRange>
38675                        <access>read-only</access>
38676                    </field>
38677                    <field>
38678                        <name>FPSQRT</name>
38679                        <description>Indicates the support for FP square root operations</description>
38680                        <bitRange>[23:20]</bitRange>
38681                        <access>read-only</access>
38682                    </field>
38683                    <field>
38684                        <name>FPDIVIDE</name>
38685                        <description>Indicates the support for FP divide operations</description>
38686                        <bitRange>[19:16]</bitRange>
38687                        <access>read-only</access>
38688                    </field>
38689                    <field>
38690                        <name>FPDP</name>
38691                        <description>Indicates support for FP double-precision operations</description>
38692                        <bitRange>[11:8]</bitRange>
38693                        <access>read-only</access>
38694                    </field>
38695                    <field>
38696                        <name>FPSP</name>
38697                        <description>Indicates support for FP single-precision operations</description>
38698                        <bitRange>[7:4]</bitRange>
38699                        <access>read-only</access>
38700                    </field>
38701                    <field>
38702                        <name>SIMDREG</name>
38703                        <description>Indicates size of FP register file</description>
38704                        <bitRange>[3:0]</bitRange>
38705                        <access>read-only</access>
38706                    </field>
38707                </fields>
38708            </register>
38709            <register>
38710                <name>MVFR1</name>
38711                <addressOffset>0x0000ef44</addressOffset>
38712                <description>Describes the features provided by the Floating-point Extension</description>
38713                <resetValue>0x85000089</resetValue>
38714                <fields>
38715                    <field>
38716                        <name>FMAC</name>
38717                        <description>Indicates whether the FP Extension implements the fused multiply accumulate instructions</description>
38718                        <bitRange>[31:28]</bitRange>
38719                        <access>read-only</access>
38720                    </field>
38721                    <field>
38722                        <name>FPHP</name>
38723                        <description>Indicates whether the FP Extension implements half-precision FP conversion instructions</description>
38724                        <bitRange>[27:24]</bitRange>
38725                        <access>read-only</access>
38726                    </field>
38727                    <field>
38728                        <name>FPDNAN</name>
38729                        <description>Indicates whether the FP hardware implementation supports NaN propagation</description>
38730                        <bitRange>[7:4]</bitRange>
38731                        <access>read-only</access>
38732                    </field>
38733                    <field>
38734                        <name>FPFTZ</name>
38735                        <description>Indicates whether subnormals are always flushed-to-zero</description>
38736                        <bitRange>[3:0]</bitRange>
38737                        <access>read-only</access>
38738                    </field>
38739                </fields>
38740            </register>
38741            <register>
38742                <name>MVFR2</name>
38743                <addressOffset>0x0000ef48</addressOffset>
38744                <description>Describes the features provided by the Floating-point Extension</description>
38745                <resetValue>0x00000060</resetValue>
38746                <fields>
38747                    <field>
38748                        <name>FPMISC</name>
38749                        <description>Indicates support for miscellaneous FP features</description>
38750                        <bitRange>[7:4]</bitRange>
38751                        <access>read-only</access>
38752                    </field>
38753                </fields>
38754            </register>
38755            <register>
38756                <name>DDEVARCH</name>
38757                <addressOffset>0x0000efbc</addressOffset>
38758                <description>Provides CoreSight discovery information for the SCS</description>
38759                <resetValue>0x47702a04</resetValue>
38760                <fields>
38761                    <field>
38762                        <name>ARCHITECT</name>
38763                        <description>Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.</description>
38764                        <bitRange>[31:21]</bitRange>
38765                        <access>read-only</access>
38766                    </field>
38767                    <field>
38768                        <name>PRESENT</name>
38769                        <description>Defines that the DEVARCH register is present</description>
38770                        <bitRange>[20:20]</bitRange>
38771                        <access>read-only</access>
38772                    </field>
38773                    <field>
38774                        <name>REVISION</name>
38775                        <description>Defines the architecture revision of the component</description>
38776                        <bitRange>[19:16]</bitRange>
38777                        <access>read-only</access>
38778                    </field>
38779                    <field>
38780                        <name>ARCHVER</name>
38781                        <description>Defines the architecture version of the component</description>
38782                        <bitRange>[15:12]</bitRange>
38783                        <access>read-only</access>
38784                    </field>
38785                    <field>
38786                        <name>ARCHPART</name>
38787                        <description>Defines the architecture of the component</description>
38788                        <bitRange>[11:0]</bitRange>
38789                        <access>read-only</access>
38790                    </field>
38791                </fields>
38792            </register>
38793            <register>
38794                <name>DDEVTYPE</name>
38795                <addressOffset>0x0000efcc</addressOffset>
38796                <description>Provides CoreSight discovery information for the SCS</description>
38797                <resetValue>0x00000000</resetValue>
38798                <fields>
38799                    <field>
38800                        <name>SUB</name>
38801                        <description>Component sub-type</description>
38802                        <bitRange>[7:4]</bitRange>
38803                        <access>read-only</access>
38804                    </field>
38805                    <field>
38806                        <name>MAJOR</name>
38807                        <description>CoreSight major type</description>
38808                        <bitRange>[3:0]</bitRange>
38809                        <access>read-only</access>
38810                    </field>
38811                </fields>
38812            </register>
38813            <register>
38814                <name>DPIDR4</name>
38815                <addressOffset>0x0000efd0</addressOffset>
38816                <description>Provides CoreSight discovery information for the SCS</description>
38817                <resetValue>0x00000004</resetValue>
38818                <fields>
38819                    <field>
38820                        <name>SIZE</name>
38821                        <description>See CoreSight Architecture Specification</description>
38822                        <bitRange>[7:4]</bitRange>
38823                        <access>read-only</access>
38824                    </field>
38825                    <field>
38826                        <name>DES_2</name>
38827                        <description>See CoreSight Architecture Specification</description>
38828                        <bitRange>[3:0]</bitRange>
38829                        <access>read-only</access>
38830                    </field>
38831                </fields>
38832            </register>
38833            <register>
38834                <name>DPIDR5</name>
38835                <addressOffset>0x0000efd4</addressOffset>
38836                <description>Provides CoreSight discovery information for the SCS</description>
38837                <resetValue>0x00000000</resetValue>
38838                <fields>
38839                    <field>
38840                        <name>DPIDR5</name>
38841                        <bitRange>[31:0]</bitRange>
38842                        <access>read-write</access>
38843                    </field>
38844                </fields>
38845            </register>
38846            <register>
38847                <name>DPIDR6</name>
38848                <addressOffset>0x0000efd8</addressOffset>
38849                <description>Provides CoreSight discovery information for the SCS</description>
38850                <resetValue>0x00000000</resetValue>
38851                <fields>
38852                    <field>
38853                        <name>DPIDR6</name>
38854                        <bitRange>[31:0]</bitRange>
38855                        <access>read-write</access>
38856                    </field>
38857                </fields>
38858            </register>
38859            <register>
38860                <name>DPIDR7</name>
38861                <addressOffset>0x0000efdc</addressOffset>
38862                <description>Provides CoreSight discovery information for the SCS</description>
38863                <resetValue>0x00000000</resetValue>
38864                <fields>
38865                    <field>
38866                        <name>DPIDR7</name>
38867                        <bitRange>[31:0]</bitRange>
38868                        <access>read-write</access>
38869                    </field>
38870                </fields>
38871            </register>
38872            <register>
38873                <name>DPIDR0</name>
38874                <addressOffset>0x0000efe0</addressOffset>
38875                <description>Provides CoreSight discovery information for the SCS</description>
38876                <resetValue>0x00000021</resetValue>
38877                <fields>
38878                    <field>
38879                        <name>PART_0</name>
38880                        <description>See CoreSight Architecture Specification</description>
38881                        <bitRange>[7:0]</bitRange>
38882                        <access>read-only</access>
38883                    </field>
38884                </fields>
38885            </register>
38886            <register>
38887                <name>DPIDR1</name>
38888                <addressOffset>0x0000efe4</addressOffset>
38889                <description>Provides CoreSight discovery information for the SCS</description>
38890                <resetValue>0x000000bd</resetValue>
38891                <fields>
38892                    <field>
38893                        <name>DES_0</name>
38894                        <description>See CoreSight Architecture Specification</description>
38895                        <bitRange>[7:4]</bitRange>
38896                        <access>read-only</access>
38897                    </field>
38898                    <field>
38899                        <name>PART_1</name>
38900                        <description>See CoreSight Architecture Specification</description>
38901                        <bitRange>[3:0]</bitRange>
38902                        <access>read-only</access>
38903                    </field>
38904                </fields>
38905            </register>
38906            <register>
38907                <name>DPIDR2</name>
38908                <addressOffset>0x0000efe8</addressOffset>
38909                <description>Provides CoreSight discovery information for the SCS</description>
38910                <resetValue>0x0000000b</resetValue>
38911                <fields>
38912                    <field>
38913                        <name>REVISION</name>
38914                        <description>See CoreSight Architecture Specification</description>
38915                        <bitRange>[7:4]</bitRange>
38916                        <access>read-only</access>
38917                    </field>
38918                    <field>
38919                        <name>JEDEC</name>
38920                        <description>See CoreSight Architecture Specification</description>
38921                        <bitRange>[3:3]</bitRange>
38922                        <access>read-only</access>
38923                    </field>
38924                    <field>
38925                        <name>DES_1</name>
38926                        <description>See CoreSight Architecture Specification</description>
38927                        <bitRange>[2:0]</bitRange>
38928                        <access>read-only</access>
38929                    </field>
38930                </fields>
38931            </register>
38932            <register>
38933                <name>DPIDR3</name>
38934                <addressOffset>0x0000efec</addressOffset>
38935                <description>Provides CoreSight discovery information for the SCS</description>
38936                <resetValue>0x00000000</resetValue>
38937                <fields>
38938                    <field>
38939                        <name>REVAND</name>
38940                        <description>See CoreSight Architecture Specification</description>
38941                        <bitRange>[7:4]</bitRange>
38942                        <access>read-only</access>
38943                    </field>
38944                    <field>
38945                        <name>CMOD</name>
38946                        <description>See CoreSight Architecture Specification</description>
38947                        <bitRange>[3:0]</bitRange>
38948                        <access>read-only</access>
38949                    </field>
38950                </fields>
38951            </register>
38952            <register>
38953                <name>DCIDR0</name>
38954                <addressOffset>0x0000eff0</addressOffset>
38955                <description>Provides CoreSight discovery information for the SCS</description>
38956                <resetValue>0x0000000d</resetValue>
38957                <fields>
38958                    <field>
38959                        <name>PRMBL_0</name>
38960                        <description>See CoreSight Architecture Specification</description>
38961                        <bitRange>[7:0]</bitRange>
38962                        <access>read-only</access>
38963                    </field>
38964                </fields>
38965            </register>
38966            <register>
38967                <name>DCIDR1</name>
38968                <addressOffset>0x0000eff4</addressOffset>
38969                <description>Provides CoreSight discovery information for the SCS</description>
38970                <resetValue>0x00000090</resetValue>
38971                <fields>
38972                    <field>
38973                        <name>CLASS</name>
38974                        <description>See CoreSight Architecture Specification</description>
38975                        <bitRange>[7:4]</bitRange>
38976                        <access>read-only</access>
38977                    </field>
38978                    <field>
38979                        <name>PRMBL_1</name>
38980                        <description>See CoreSight Architecture Specification</description>
38981                        <bitRange>[3:0]</bitRange>
38982                        <access>read-only</access>
38983                    </field>
38984                </fields>
38985            </register>
38986            <register>
38987                <name>DCIDR2</name>
38988                <addressOffset>0x0000eff8</addressOffset>
38989                <description>Provides CoreSight discovery information for the SCS</description>
38990                <resetValue>0x00000005</resetValue>
38991                <fields>
38992                    <field>
38993                        <name>PRMBL_2</name>
38994                        <description>See CoreSight Architecture Specification</description>
38995                        <bitRange>[7:0]</bitRange>
38996                        <access>read-only</access>
38997                    </field>
38998                </fields>
38999            </register>
39000            <register>
39001                <name>DCIDR3</name>
39002                <addressOffset>0x0000effc</addressOffset>
39003                <description>Provides CoreSight discovery information for the SCS</description>
39004                <resetValue>0x000000b1</resetValue>
39005                <fields>
39006                    <field>
39007                        <name>PRMBL_3</name>
39008                        <description>See CoreSight Architecture Specification</description>
39009                        <bitRange>[7:0]</bitRange>
39010                        <access>read-only</access>
39011                    </field>
39012                </fields>
39013            </register>
39014            <register>
39015                <name>TRCPRGCTLR</name>
39016                <addressOffset>0x00041004</addressOffset>
39017                <description>Programming Control Register</description>
39018                <resetValue>0x00000000</resetValue>
39019                <fields>
39020                    <field>
39021                        <name>EN</name>
39022                        <description>Trace Unit Enable</description>
39023                        <bitRange>[0:0]</bitRange>
39024                        <access>read-write</access>
39025                    </field>
39026                </fields>
39027            </register>
39028            <register>
39029                <name>TRCSTATR</name>
39030                <addressOffset>0x0004100c</addressOffset>
39031                <description>The TRCSTATR indicates the ETM-Teal status</description>
39032                <resetValue>0x00000000</resetValue>
39033                <fields>
39034                    <field>
39035                        <name>PMSTABLE</name>
39036                        <description>Indicates whether the ETM-Teal registers are stable and can be read</description>
39037                        <bitRange>[1:1]</bitRange>
39038                        <access>read-only</access>
39039                    </field>
39040                    <field>
39041                        <name>IDLE</name>
39042                        <description>Indicates that the trace unit is inactive</description>
39043                        <bitRange>[0:0]</bitRange>
39044                        <access>read-only</access>
39045                    </field>
39046                </fields>
39047            </register>
39048            <register>
39049                <name>TRCCONFIGR</name>
39050                <addressOffset>0x00041010</addressOffset>
39051                <description>The TRCCONFIGR sets the basic tracing options for the trace unit</description>
39052                <resetValue>0x00000000</resetValue>
39053                <fields>
39054                    <field>
39055                        <name>RS</name>
39056                        <description>Return stack enable</description>
39057                        <bitRange>[12:12]</bitRange>
39058                        <access>read-write</access>
39059                    </field>
39060                    <field>
39061                        <name>TS</name>
39062                        <description>Global timestamp tracing</description>
39063                        <bitRange>[11:11]</bitRange>
39064                        <access>read-write</access>
39065                    </field>
39066                    <field>
39067                        <name>COND</name>
39068                        <description>Conditional instruction tracing</description>
39069                        <bitRange>[10:5]</bitRange>
39070                        <access>read-write</access>
39071                    </field>
39072                    <field>
39073                        <name>CCI</name>
39074                        <description>Cycle counting in instruction trace</description>
39075                        <bitRange>[4:4]</bitRange>
39076                        <access>read-write</access>
39077                    </field>
39078                    <field>
39079                        <name>BB</name>
39080                        <description>Branch broadcast mode</description>
39081                        <bitRange>[3:3]</bitRange>
39082                        <access>read-write</access>
39083                    </field>
39084                </fields>
39085            </register>
39086            <register>
39087                <name>TRCEVENTCTL0R</name>
39088                <addressOffset>0x00041020</addressOffset>
39089                <description>The TRCEVENTCTL0R controls the tracing of events in the trace stream. The events also drive the ETM-Teal external outputs.</description>
39090                <resetValue>0x00000000</resetValue>
39091                <fields>
39092                    <field>
39093                        <name>TYPE1</name>
39094                        <description>Selects the resource type for event 1</description>
39095                        <bitRange>[15:15]</bitRange>
39096                        <access>read-write</access>
39097                    </field>
39098                    <field>
39099                        <name>SEL1</name>
39100                        <description>Selects the resource number, based on the value of TYPE1: When TYPE1 is 0, selects a single selected resource from 0-15 defined by SEL1[2:0].  When TYPE1 is 1, selects a Boolean combined resource pair from 0-7 defined by SEL1[2:0]</description>
39101                        <bitRange>[10:8]</bitRange>
39102                        <access>read-write</access>
39103                    </field>
39104                    <field>
39105                        <name>TYPE0</name>
39106                        <description>Selects the resource type for event 0</description>
39107                        <bitRange>[7:7]</bitRange>
39108                        <access>read-write</access>
39109                    </field>
39110                    <field>
39111                        <name>SEL0</name>
39112                        <description>Selects the resource number, based on the value of TYPE0: When TYPE1 is 0, selects a single selected resource from 0-15 defined by SEL0[2:0].  When TYPE1 is 1, selects a Boolean combined resource pair from 0-7 defined by SEL0[2:0]</description>
39113                        <bitRange>[2:0]</bitRange>
39114                        <access>read-write</access>
39115                    </field>
39116                </fields>
39117            </register>
39118            <register>
39119                <name>TRCEVENTCTL1R</name>
39120                <addressOffset>0x00041024</addressOffset>
39121                <description>The TRCEVENTCTL1R controls how the events selected by TRCEVENTCTL0R behave</description>
39122                <resetValue>0x00000000</resetValue>
39123                <fields>
39124                    <field>
39125                        <name>LPOVERRIDE</name>
39126                        <description>Low power state behavior override</description>
39127                        <bitRange>[12:12]</bitRange>
39128                        <access>read-write</access>
39129                    </field>
39130                    <field>
39131                        <name>ATB</name>
39132                        <description>ATB enabled</description>
39133                        <bitRange>[11:11]</bitRange>
39134                        <access>read-write</access>
39135                    </field>
39136                    <field>
39137                        <name>INSTEN1</name>
39138                        <description>One bit per event, to enable generation of an event element in the instruction trace stream when the selected event occurs</description>
39139                        <bitRange>[1:1]</bitRange>
39140                        <access>read-write</access>
39141                    </field>
39142                    <field>
39143                        <name>INSTEN0</name>
39144                        <description>One bit per event, to enable generation of an event element in the instruction trace stream when the selected event occurs</description>
39145                        <bitRange>[0:0]</bitRange>
39146                        <access>read-write</access>
39147                    </field>
39148                </fields>
39149            </register>
39150            <register>
39151                <name>TRCSTALLCTLR</name>
39152                <addressOffset>0x0004102c</addressOffset>
39153                <description>The TRCSTALLCTLR enables ETM-Teal to stall the processor if the ETM-Teal FIFO goes over the programmed level to minimize risk of overflow</description>
39154                <resetValue>0x00000000</resetValue>
39155                <fields>
39156                    <field>
39157                        <name>INSTPRIORITY</name>
39158                        <description>Reserved, RES0</description>
39159                        <bitRange>[10:10]</bitRange>
39160                        <access>read-only</access>
39161                    </field>
39162                    <field>
39163                        <name>ISTALL</name>
39164                        <description>Stall processor based on instruction trace buffer space</description>
39165                        <bitRange>[8:8]</bitRange>
39166                        <access>read-write</access>
39167                    </field>
39168                    <field>
39169                        <name>LEVEL</name>
39170                        <description>Threshold at which stalling becomes active. This provides four levels. This level can be varied to optimize the level of invasion caused by stalling, balanced against the risk of a FIFO overflow</description>
39171                        <bitRange>[3:2]</bitRange>
39172                        <access>read-write</access>
39173                    </field>
39174                </fields>
39175            </register>
39176            <register>
39177                <name>TRCTSCTLR</name>
39178                <addressOffset>0x00041030</addressOffset>
39179                <description>The TRCTSCTLR controls the insertion of global timestamps into the trace stream. A timestamp is always inserted into the instruction trace stream</description>
39180                <resetValue>0x00000000</resetValue>
39181                <fields>
39182                    <field>
39183                        <name>TYPE0</name>
39184                        <description>Selects the resource type for event 0</description>
39185                        <bitRange>[7:7]</bitRange>
39186                        <access>read-write</access>
39187                    </field>
39188                    <field>
39189                        <name>SEL0</name>
39190                        <description>Selects the resource number, based on the value of TYPE0: When TYPE1 is 0, selects a single selected resource from 0-15 defined by SEL0[2:0].  When TYPE1 is 1, selects a Boolean combined resource pair from 0-7 defined by SEL0[2:0]</description>
39191                        <bitRange>[1:0]</bitRange>
39192                        <access>read-write</access>
39193                    </field>
39194                </fields>
39195            </register>
39196            <register>
39197                <name>TRCSYNCPR</name>
39198                <addressOffset>0x00041034</addressOffset>
39199                <description>The TRCSYNCPR specifies the period of trace synchronization of the trace streams. TRCSYNCPR defines a number of bytes of trace between requests for trace synchronization. This value is always a power of two</description>
39200                <resetValue>0x0000000a</resetValue>
39201                <fields>
39202                    <field>
39203                        <name>PERIOD</name>
39204                        <description>Defines the number of bytes of trace between trace synchronization requests as a total of the number of bytes generated by the instruction stream. The number of bytes is 2N where N is the value of this field: - A value of zero disables these periodic trace synchronization requests, but does not disable other trace synchronization requests.  - The minimum value that can be programmed, other than zero, is 8, providing a minimum trace synchronization period of 256 bytes.  - The maximum value is 20, providing a maximum trace synchronization period of 2^20 bytes</description>
39205                        <bitRange>[4:0]</bitRange>
39206                        <access>read-only</access>
39207                    </field>
39208                </fields>
39209            </register>
39210            <register>
39211                <name>TRCCCCTLR</name>
39212                <addressOffset>0x00041038</addressOffset>
39213                <description>The TRCCCCTLR sets the threshold value for instruction trace cycle counting. The threshold represents the minimum interval between cycle count trace packets</description>
39214                <resetValue>0x00000000</resetValue>
39215                <fields>
39216                    <field>
39217                        <name>THRESHOLD</name>
39218                        <description>Instruction trace cycle count threshold</description>
39219                        <bitRange>[11:0]</bitRange>
39220                        <access>read-write</access>
39221                    </field>
39222                </fields>
39223            </register>
39224            <register>
39225                <name>TRCVICTLR</name>
39226                <addressOffset>0x00041080</addressOffset>
39227                <description>The TRCVICTLR controls instruction trace filtering</description>
39228                <resetValue>0x00000000</resetValue>
39229                <fields>
39230                    <field>
39231                        <name>EXLEVEL_S3</name>
39232                        <description>In Secure state, each bit controls whether instruction tracing is enabled for the corresponding exception level</description>
39233                        <bitRange>[19:19]</bitRange>
39234                        <access>read-write</access>
39235                    </field>
39236                    <field>
39237                        <name>EXLEVEL_S0</name>
39238                        <description>In Secure state, each bit controls whether instruction tracing is enabled for the corresponding exception level</description>
39239                        <bitRange>[16:16]</bitRange>
39240                        <access>read-write</access>
39241                    </field>
39242                    <field>
39243                        <name>TRCERR</name>
39244                        <description>Selects whether a system error exception must always be traced</description>
39245                        <bitRange>[11:11]</bitRange>
39246                        <access>read-write</access>
39247                    </field>
39248                    <field>
39249                        <name>TRCRESET</name>
39250                        <description>Selects whether a reset exception must always be traced</description>
39251                        <bitRange>[10:10]</bitRange>
39252                        <access>read-write</access>
39253                    </field>
39254                    <field>
39255                        <name>SSSTATUS</name>
39256                        <description>Indicates the current status of the start/stop logic</description>
39257                        <bitRange>[9:9]</bitRange>
39258                        <access>read-write</access>
39259                    </field>
39260                    <field>
39261                        <name>TYPE0</name>
39262                        <description>Selects the resource type for event 0</description>
39263                        <bitRange>[7:7]</bitRange>
39264                        <access>read-write</access>
39265                    </field>
39266                    <field>
39267                        <name>SEL0</name>
39268                        <description>Selects the resource number, based on the value of TYPE0: When TYPE1 is 0, selects a single selected resource from 0-15 defined by SEL0[2:0].  When TYPE1 is 1, selects a Boolean combined resource pair from 0-7 defined by SEL0[2:0]</description>
39269                        <bitRange>[1:0]</bitRange>
39270                        <access>read-write</access>
39271                    </field>
39272                </fields>
39273            </register>
39274            <register>
39275                <name>TRCCNTRLDVR0</name>
39276                <addressOffset>0x00041140</addressOffset>
39277                <description>The TRCCNTRLDVR defines the reload value for the reduced function counter</description>
39278                <resetValue>0x00000000</resetValue>
39279                <fields>
39280                    <field>
39281                        <name>VALUE</name>
39282                        <description>Defines the reload value for the counter. This value is loaded into the counter each time the reload event occurs</description>
39283                        <bitRange>[15:0]</bitRange>
39284                        <access>read-write</access>
39285                    </field>
39286                </fields>
39287            </register>
39288            <register>
39289                <name>TRCIDR8</name>
39290                <addressOffset>0x00041180</addressOffset>
39291                <description>TRCIDR8</description>
39292                <resetValue>0x00000000</resetValue>
39293                <fields>
39294                    <field>
39295                        <name>MAXSPEC</name>
39296                        <description>reads as `ImpDef</description>
39297                        <bitRange>[31:0]</bitRange>
39298                        <access>read-only</access>
39299                    </field>
39300                </fields>
39301            </register>
39302            <register>
39303                <name>TRCIDR9</name>
39304                <addressOffset>0x00041184</addressOffset>
39305                <description>TRCIDR9</description>
39306                <resetValue>0x00000000</resetValue>
39307                <fields>
39308                    <field>
39309                        <name>NUMP0KEY</name>
39310                        <description>reads as `ImpDef</description>
39311                        <bitRange>[31:0]</bitRange>
39312                        <access>read-only</access>
39313                    </field>
39314                </fields>
39315            </register>
39316            <register>
39317                <name>TRCIDR10</name>
39318                <addressOffset>0x00041188</addressOffset>
39319                <description>TRCIDR10</description>
39320                <resetValue>0x00000000</resetValue>
39321                <fields>
39322                    <field>
39323                        <name>NUMP1KEY</name>
39324                        <description>reads as `ImpDef</description>
39325                        <bitRange>[31:0]</bitRange>
39326                        <access>read-only</access>
39327                    </field>
39328                </fields>
39329            </register>
39330            <register>
39331                <name>TRCIDR11</name>
39332                <addressOffset>0x0004118c</addressOffset>
39333                <description>TRCIDR11</description>
39334                <resetValue>0x00000000</resetValue>
39335                <fields>
39336                    <field>
39337                        <name>NUMP1SPC</name>
39338                        <description>reads as `ImpDef</description>
39339                        <bitRange>[31:0]</bitRange>
39340                        <access>read-only</access>
39341                    </field>
39342                </fields>
39343            </register>
39344            <register>
39345                <name>TRCIDR12</name>
39346                <addressOffset>0x00041190</addressOffset>
39347                <description>TRCIDR12</description>
39348                <resetValue>0x00000001</resetValue>
39349                <fields>
39350                    <field>
39351                        <name>NUMCONDKEY</name>
39352                        <description>reads as `ImpDef</description>
39353                        <bitRange>[31:0]</bitRange>
39354                        <access>read-only</access>
39355                    </field>
39356                </fields>
39357            </register>
39358            <register>
39359                <name>TRCIDR13</name>
39360                <addressOffset>0x00041194</addressOffset>
39361                <description>TRCIDR13</description>
39362                <resetValue>0x00000000</resetValue>
39363                <fields>
39364                    <field>
39365                        <name>NUMCONDSPC</name>
39366                        <description>reads as `ImpDef</description>
39367                        <bitRange>[31:0]</bitRange>
39368                        <access>read-only</access>
39369                    </field>
39370                </fields>
39371            </register>
39372            <register>
39373                <name>TRCIMSPEC</name>
39374                <addressOffset>0x000411c0</addressOffset>
39375                <description>The TRCIMSPEC shows the presence of any IMPLEMENTATION SPECIFIC features, and enables any features that are provided</description>
39376                <resetValue>0x00000000</resetValue>
39377                <fields>
39378                    <field>
39379                        <name>SUPPORT</name>
39380                        <description>Reserved, RES0</description>
39381                        <bitRange>[3:0]</bitRange>
39382                        <access>read-only</access>
39383                    </field>
39384                </fields>
39385            </register>
39386            <register>
39387                <name>TRCIDR0</name>
39388                <addressOffset>0x000411e0</addressOffset>
39389                <description>TRCIDR0</description>
39390                <resetValue>0x280006e1</resetValue>
39391                <fields>
39392                    <field>
39393                        <name>COMMOPT</name>
39394                        <description>reads as `ImpDef</description>
39395                        <bitRange>[29:29]</bitRange>
39396                        <access>read-only</access>
39397                    </field>
39398                    <field>
39399                        <name>TSSIZE</name>
39400                        <description>reads as `ImpDef</description>
39401                        <bitRange>[28:24]</bitRange>
39402                        <access>read-only</access>
39403                    </field>
39404                    <field>
39405                        <name>TRCEXDATA</name>
39406                        <description>reads as `ImpDef</description>
39407                        <bitRange>[17:17]</bitRange>
39408                        <access>read-only</access>
39409                    </field>
39410                    <field>
39411                        <name>QSUPP</name>
39412                        <description>reads as `ImpDef</description>
39413                        <bitRange>[16:15]</bitRange>
39414                        <access>read-only</access>
39415                    </field>
39416                    <field>
39417                        <name>QFILT</name>
39418                        <description>reads as `ImpDef</description>
39419                        <bitRange>[14:14]</bitRange>
39420                        <access>read-only</access>
39421                    </field>
39422                    <field>
39423                        <name>CONDTYPE</name>
39424                        <description>reads as `ImpDef</description>
39425                        <bitRange>[13:12]</bitRange>
39426                        <access>read-only</access>
39427                    </field>
39428                    <field>
39429                        <name>NUMEVENT</name>
39430                        <description>reads as `ImpDef</description>
39431                        <bitRange>[11:10]</bitRange>
39432                        <access>read-only</access>
39433                    </field>
39434                    <field>
39435                        <name>RETSTACK</name>
39436                        <description>reads as `ImpDef</description>
39437                        <bitRange>[9:9]</bitRange>
39438                        <access>read-only</access>
39439                    </field>
39440                    <field>
39441                        <name>TRCCCI</name>
39442                        <description>reads as `ImpDef</description>
39443                        <bitRange>[7:7]</bitRange>
39444                        <access>read-only</access>
39445                    </field>
39446                    <field>
39447                        <name>TRCCOND</name>
39448                        <description>reads as `ImpDef</description>
39449                        <bitRange>[6:6]</bitRange>
39450                        <access>read-only</access>
39451                    </field>
39452                    <field>
39453                        <name>TRCBB</name>
39454                        <description>reads as `ImpDef</description>
39455                        <bitRange>[5:5]</bitRange>
39456                        <access>read-only</access>
39457                    </field>
39458                    <field>
39459                        <name>TRCDATA</name>
39460                        <description>reads as `ImpDef</description>
39461                        <bitRange>[4:3]</bitRange>
39462                        <access>read-only</access>
39463                    </field>
39464                    <field>
39465                        <name>INSTP0</name>
39466                        <description>reads as `ImpDef</description>
39467                        <bitRange>[2:1]</bitRange>
39468                        <access>read-only</access>
39469                    </field>
39470                    <field>
39471                        <name>RES1</name>
39472                        <description>Reserved, RES1</description>
39473                        <bitRange>[0:0]</bitRange>
39474                        <access>read-only</access>
39475                    </field>
39476                </fields>
39477            </register>
39478            <register>
39479                <name>TRCIDR1</name>
39480                <addressOffset>0x000411e4</addressOffset>
39481                <description>TRCIDR1</description>
39482                <resetValue>0x4100f421</resetValue>
39483                <fields>
39484                    <field>
39485                        <name>DESIGNER</name>
39486                        <description>reads as `ImpDef</description>
39487                        <bitRange>[31:24]</bitRange>
39488                        <access>read-only</access>
39489                    </field>
39490                    <field>
39491                        <name>RES1</name>
39492                        <description>Reserved, RES1</description>
39493                        <bitRange>[15:12]</bitRange>
39494                        <access>read-only</access>
39495                    </field>
39496                    <field>
39497                        <name>TRCARCHMAJ</name>
39498                        <description>reads as 0b0100</description>
39499                        <bitRange>[11:8]</bitRange>
39500                        <access>read-only</access>
39501                    </field>
39502                    <field>
39503                        <name>TRCARCHMIN</name>
39504                        <description>reads as 0b0000</description>
39505                        <bitRange>[7:4]</bitRange>
39506                        <access>read-only</access>
39507                    </field>
39508                    <field>
39509                        <name>REVISION</name>
39510                        <description>reads as `ImpDef</description>
39511                        <bitRange>[3:0]</bitRange>
39512                        <access>read-only</access>
39513                    </field>
39514                </fields>
39515            </register>
39516            <register>
39517                <name>TRCIDR2</name>
39518                <addressOffset>0x000411e8</addressOffset>
39519                <description>TRCIDR2</description>
39520                <resetValue>0x00000004</resetValue>
39521                <fields>
39522                    <field>
39523                        <name>CCSIZE</name>
39524                        <description>reads as `ImpDef</description>
39525                        <bitRange>[28:25]</bitRange>
39526                        <access>read-only</access>
39527                    </field>
39528                    <field>
39529                        <name>DVSIZE</name>
39530                        <description>reads as `ImpDef</description>
39531                        <bitRange>[24:20]</bitRange>
39532                        <access>read-only</access>
39533                    </field>
39534                    <field>
39535                        <name>DASIZE</name>
39536                        <description>reads as `ImpDef</description>
39537                        <bitRange>[19:15]</bitRange>
39538                        <access>read-only</access>
39539                    </field>
39540                    <field>
39541                        <name>VMIDSIZE</name>
39542                        <description>reads as `ImpDef</description>
39543                        <bitRange>[14:10]</bitRange>
39544                        <access>read-only</access>
39545                    </field>
39546                    <field>
39547                        <name>CIDSIZE</name>
39548                        <description>reads as `ImpDef</description>
39549                        <bitRange>[9:5]</bitRange>
39550                        <access>read-only</access>
39551                    </field>
39552                    <field>
39553                        <name>IASIZE</name>
39554                        <description>reads as `ImpDef</description>
39555                        <bitRange>[4:0]</bitRange>
39556                        <access>read-only</access>
39557                    </field>
39558                </fields>
39559            </register>
39560            <register>
39561                <name>TRCIDR3</name>
39562                <addressOffset>0x000411ec</addressOffset>
39563                <description>TRCIDR3</description>
39564                <resetValue>0x0f090004</resetValue>
39565                <fields>
39566                    <field>
39567                        <name>NOOVERFLOW</name>
39568                        <description>reads as `ImpDef</description>
39569                        <bitRange>[31:31]</bitRange>
39570                        <access>read-only</access>
39571                    </field>
39572                    <field>
39573                        <name>NUMPROC</name>
39574                        <description>reads as `ImpDef</description>
39575                        <bitRange>[30:28]</bitRange>
39576                        <access>read-only</access>
39577                    </field>
39578                    <field>
39579                        <name>SYSSTALL</name>
39580                        <description>reads as `ImpDef</description>
39581                        <bitRange>[27:27]</bitRange>
39582                        <access>read-only</access>
39583                    </field>
39584                    <field>
39585                        <name>STALLCTL</name>
39586                        <description>reads as `ImpDef</description>
39587                        <bitRange>[26:26]</bitRange>
39588                        <access>read-only</access>
39589                    </field>
39590                    <field>
39591                        <name>SYNCPR</name>
39592                        <description>reads as `ImpDef</description>
39593                        <bitRange>[25:25]</bitRange>
39594                        <access>read-only</access>
39595                    </field>
39596                    <field>
39597                        <name>TRCERR</name>
39598                        <description>reads as `ImpDef</description>
39599                        <bitRange>[24:24]</bitRange>
39600                        <access>read-only</access>
39601                    </field>
39602                    <field>
39603                        <name>EXLEVEL_NS</name>
39604                        <description>reads as `ImpDef</description>
39605                        <bitRange>[23:20]</bitRange>
39606                        <access>read-only</access>
39607                    </field>
39608                    <field>
39609                        <name>EXLEVEL_S</name>
39610                        <description>reads as `ImpDef</description>
39611                        <bitRange>[19:16]</bitRange>
39612                        <access>read-only</access>
39613                    </field>
39614                    <field>
39615                        <name>CCITMIN</name>
39616                        <description>reads as `ImpDef</description>
39617                        <bitRange>[11:0]</bitRange>
39618                        <access>read-only</access>
39619                    </field>
39620                </fields>
39621            </register>
39622            <register>
39623                <name>TRCIDR4</name>
39624                <addressOffset>0x000411f0</addressOffset>
39625                <description>TRCIDR4</description>
39626                <resetValue>0x00114000</resetValue>
39627                <fields>
39628                    <field>
39629                        <name>NUMVMIDC</name>
39630                        <description>reads as `ImpDef</description>
39631                        <bitRange>[31:28]</bitRange>
39632                        <access>read-only</access>
39633                    </field>
39634                    <field>
39635                        <name>NUMCIDC</name>
39636                        <description>reads as `ImpDef</description>
39637                        <bitRange>[27:24]</bitRange>
39638                        <access>read-only</access>
39639                    </field>
39640                    <field>
39641                        <name>NUMSSCC</name>
39642                        <description>reads as `ImpDef</description>
39643                        <bitRange>[23:20]</bitRange>
39644                        <access>read-only</access>
39645                    </field>
39646                    <field>
39647                        <name>NUMRSPAIR</name>
39648                        <description>reads as `ImpDef</description>
39649                        <bitRange>[19:16]</bitRange>
39650                        <access>read-only</access>
39651                    </field>
39652                    <field>
39653                        <name>NUMPC</name>
39654                        <description>reads as `ImpDef</description>
39655                        <bitRange>[15:12]</bitRange>
39656                        <access>read-only</access>
39657                    </field>
39658                    <field>
39659                        <name>SUPPDAC</name>
39660                        <description>reads as `ImpDef</description>
39661                        <bitRange>[8:8]</bitRange>
39662                        <access>read-only</access>
39663                    </field>
39664                    <field>
39665                        <name>NUMDVC</name>
39666                        <description>reads as `ImpDef</description>
39667                        <bitRange>[7:4]</bitRange>
39668                        <access>read-only</access>
39669                    </field>
39670                    <field>
39671                        <name>NUMACPAIRS</name>
39672                        <description>reads as `ImpDef</description>
39673                        <bitRange>[3:0]</bitRange>
39674                        <access>read-only</access>
39675                    </field>
39676                </fields>
39677            </register>
39678            <register>
39679                <name>TRCIDR5</name>
39680                <addressOffset>0x000411f4</addressOffset>
39681                <description>TRCIDR5</description>
39682                <resetValue>0x90c70004</resetValue>
39683                <fields>
39684                    <field>
39685                        <name>REDFUNCNTR</name>
39686                        <description>reads as `ImpDef</description>
39687                        <bitRange>[31:31]</bitRange>
39688                        <access>read-only</access>
39689                    </field>
39690                    <field>
39691                        <name>NUMCNTR</name>
39692                        <description>reads as `ImpDef</description>
39693                        <bitRange>[30:28]</bitRange>
39694                        <access>read-only</access>
39695                    </field>
39696                    <field>
39697                        <name>NUMSEQSTATE</name>
39698                        <description>reads as `ImpDef</description>
39699                        <bitRange>[27:25]</bitRange>
39700                        <access>read-only</access>
39701                    </field>
39702                    <field>
39703                        <name>LPOVERRIDE</name>
39704                        <description>reads as `ImpDef</description>
39705                        <bitRange>[23:23]</bitRange>
39706                        <access>read-only</access>
39707                    </field>
39708                    <field>
39709                        <name>ATBTRIG</name>
39710                        <description>reads as `ImpDef</description>
39711                        <bitRange>[22:22]</bitRange>
39712                        <access>read-only</access>
39713                    </field>
39714                    <field>
39715                        <name>TRACEIDSIZE</name>
39716                        <description>reads as 0x07</description>
39717                        <bitRange>[21:16]</bitRange>
39718                        <access>read-only</access>
39719                    </field>
39720                    <field>
39721                        <name>NUMEXTINSEL</name>
39722                        <description>reads as `ImpDef</description>
39723                        <bitRange>[11:9]</bitRange>
39724                        <access>read-only</access>
39725                    </field>
39726                    <field>
39727                        <name>NUMEXTIN</name>
39728                        <description>reads as `ImpDef</description>
39729                        <bitRange>[8:0]</bitRange>
39730                        <access>read-only</access>
39731                    </field>
39732                </fields>
39733            </register>
39734            <register>
39735                <name>TRCIDR6</name>
39736                <addressOffset>0x000411f8</addressOffset>
39737                <description>TRCIDR6</description>
39738                <resetValue>0x00000000</resetValue>
39739                <fields>
39740                    <field>
39741                        <name>TRCIDR6</name>
39742                        <bitRange>[31:0]</bitRange>
39743                        <access>read-write</access>
39744                    </field>
39745                </fields>
39746            </register>
39747            <register>
39748                <name>TRCIDR7</name>
39749                <addressOffset>0x000411fc</addressOffset>
39750                <description>TRCIDR7</description>
39751                <resetValue>0x00000000</resetValue>
39752                <fields>
39753                    <field>
39754                        <name>TRCIDR7</name>
39755                        <bitRange>[31:0]</bitRange>
39756                        <access>read-write</access>
39757                    </field>
39758                </fields>
39759            </register>
39760            <register>
39761                <name>TRCRSCTLR2</name>
39762                <addressOffset>0x00041208</addressOffset>
39763                <description>The TRCRSCTLR controls the trace resources</description>
39764                <resetValue>0x00000000</resetValue>
39765                <fields>
39766                    <field>
39767                        <name>PAIRINV</name>
39768                        <description>Inverts the result of a combined pair of resources.  This bit is only implemented on the lower register for a pair of resource selectors</description>
39769                        <bitRange>[21:21]</bitRange>
39770                        <access>read-write</access>
39771                    </field>
39772                    <field>
39773                        <name>INV</name>
39774                        <description>Inverts the selected resources</description>
39775                        <bitRange>[20:20]</bitRange>
39776                        <access>read-write</access>
39777                    </field>
39778                    <field>
39779                        <name>GROUP</name>
39780                        <description>Selects a group of resource</description>
39781                        <bitRange>[18:16]</bitRange>
39782                        <access>read-write</access>
39783                    </field>
39784                    <field>
39785                        <name>SELECT</name>
39786                        <description>Selects one or more resources from the wanted group. One bit is provided per resource from the group</description>
39787                        <bitRange>[7:0]</bitRange>
39788                        <access>read-write</access>
39789                    </field>
39790                </fields>
39791            </register>
39792            <register>
39793                <name>TRCRSCTLR3</name>
39794                <addressOffset>0x0004120c</addressOffset>
39795                <description>The TRCRSCTLR controls the trace resources</description>
39796                <resetValue>0x00000000</resetValue>
39797                <fields>
39798                    <field>
39799                        <name>PAIRINV</name>
39800                        <description>Inverts the result of a combined pair of resources.  This bit is only implemented on the lower register for a pair of resource selectors</description>
39801                        <bitRange>[21:21]</bitRange>
39802                        <access>read-write</access>
39803                    </field>
39804                    <field>
39805                        <name>INV</name>
39806                        <description>Inverts the selected resources</description>
39807                        <bitRange>[20:20]</bitRange>
39808                        <access>read-write</access>
39809                    </field>
39810                    <field>
39811                        <name>GROUP</name>
39812                        <description>Selects a group of resource</description>
39813                        <bitRange>[18:16]</bitRange>
39814                        <access>read-write</access>
39815                    </field>
39816                    <field>
39817                        <name>SELECT</name>
39818                        <description>Selects one or more resources from the wanted group. One bit is provided per resource from the group</description>
39819                        <bitRange>[7:0]</bitRange>
39820                        <access>read-write</access>
39821                    </field>
39822                </fields>
39823            </register>
39824            <register>
39825                <name>TRCSSCSR</name>
39826                <addressOffset>0x000412a0</addressOffset>
39827                <description>Controls the corresponding single-shot comparator resource</description>
39828                <resetValue>0x00000000</resetValue>
39829                <fields>
39830                    <field>
39831                        <name>STATUS</name>
39832                        <description>Single-shot status bit. Indicates if any of the comparators, that TRCSSCCRn.SAC or TRCSSCCRn.ARC selects, have matched</description>
39833                        <bitRange>[31:31]</bitRange>
39834                        <access>read-write</access>
39835                    </field>
39836                    <field>
39837                        <name>PC</name>
39838                        <description>Reserved, RES1</description>
39839                        <bitRange>[3:3]</bitRange>
39840                        <access>read-only</access>
39841                    </field>
39842                    <field>
39843                        <name>DV</name>
39844                        <description>Reserved, RES0</description>
39845                        <bitRange>[2:2]</bitRange>
39846                        <access>read-only</access>
39847                    </field>
39848                    <field>
39849                        <name>DA</name>
39850                        <description>Reserved, RES0</description>
39851                        <bitRange>[1:1]</bitRange>
39852                        <access>read-only</access>
39853                    </field>
39854                    <field>
39855                        <name>INST</name>
39856                        <description>Reserved, RES0</description>
39857                        <bitRange>[0:0]</bitRange>
39858                        <access>read-only</access>
39859                    </field>
39860                </fields>
39861            </register>
39862            <register>
39863                <name>TRCSSPCICR</name>
39864                <addressOffset>0x000412c0</addressOffset>
39865                <description>Selects the PE comparator inputs for Single-shot control</description>
39866                <resetValue>0x00000000</resetValue>
39867                <fields>
39868                    <field>
39869                        <name>PC</name>
39870                        <description>Selects one or more PE comparator inputs for Single-shot control.  TRCIDR4.NUMPC defines the size of the PC field.  1 bit is provided for each implemented PE comparator input.  For example, if bit[1] == 1 this selects PE comparator input 1 for Single-shot control</description>
39871                        <bitRange>[3:0]</bitRange>
39872                        <access>read-write</access>
39873                    </field>
39874                </fields>
39875            </register>
39876            <register>
39877                <name>TRCPDCR</name>
39878                <addressOffset>0x00041310</addressOffset>
39879                <description>Requests the system to provide power to the trace unit</description>
39880                <resetValue>0x00000000</resetValue>
39881                <fields>
39882                    <field>
39883                        <name>PU</name>
39884                        <description>Powerup request bit:</description>
39885                        <bitRange>[3:3]</bitRange>
39886                        <access>read-write</access>
39887                    </field>
39888                </fields>
39889            </register>
39890            <register>
39891                <name>TRCPDSR</name>
39892                <addressOffset>0x00041314</addressOffset>
39893                <description>Returns the following information about the trace unit: - OS Lock status.  - Core power domain status.  - Power interruption status</description>
39894                <resetValue>0x00000003</resetValue>
39895                <fields>
39896                    <field>
39897                        <name>OSLK</name>
39898                        <description>OS Lock status bit:</description>
39899                        <bitRange>[5:5]</bitRange>
39900                        <access>read-only</access>
39901                    </field>
39902                    <field>
39903                        <name>STICKYPD</name>
39904                        <description>Sticky powerdown status bit. Indicates whether the trace register state is valid:</description>
39905                        <bitRange>[1:1]</bitRange>
39906                        <access>read-only</access>
39907                    </field>
39908                    <field>
39909                        <name>POWER</name>
39910                        <description>Power status bit:</description>
39911                        <bitRange>[0:0]</bitRange>
39912                        <access>read-only</access>
39913                    </field>
39914                </fields>
39915            </register>
39916            <register>
39917                <name>TRCITATBIDR</name>
39918                <addressOffset>0x00041ee4</addressOffset>
39919                <description>Trace Integration ATB Identification Register</description>
39920                <resetValue>0x00000000</resetValue>
39921                <fields>
39922                    <field>
39923                        <name>ID</name>
39924                        <description>Trace ID</description>
39925                        <bitRange>[6:0]</bitRange>
39926                        <access>read-write</access>
39927                    </field>
39928                </fields>
39929            </register>
39930            <register>
39931                <name>TRCITIATBINR</name>
39932                <addressOffset>0x00041ef4</addressOffset>
39933                <description>Trace Integration Instruction ATB In Register</description>
39934                <resetValue>0x00000000</resetValue>
39935                <fields>
39936                    <field>
39937                        <name>AFVALIDM</name>
39938                        <description>Integration Mode instruction AFVALIDM in</description>
39939                        <bitRange>[1:1]</bitRange>
39940                        <access>read-write</access>
39941                    </field>
39942                    <field>
39943                        <name>ATREADYM</name>
39944                        <description>Integration Mode instruction ATREADYM in</description>
39945                        <bitRange>[0:0]</bitRange>
39946                        <access>read-write</access>
39947                    </field>
39948                </fields>
39949            </register>
39950            <register>
39951                <name>TRCITIATBOUTR</name>
39952                <addressOffset>0x00041efc</addressOffset>
39953                <description>Trace Integration Instruction ATB Out Register</description>
39954                <resetValue>0x00000000</resetValue>
39955                <fields>
39956                    <field>
39957                        <name>AFREADY</name>
39958                        <description>Integration Mode instruction AFREADY out</description>
39959                        <bitRange>[1:1]</bitRange>
39960                        <access>read-write</access>
39961                    </field>
39962                    <field>
39963                        <name>ATVALID</name>
39964                        <description>Integration Mode instruction ATVALID out</description>
39965                        <bitRange>[0:0]</bitRange>
39966                        <access>read-write</access>
39967                    </field>
39968                </fields>
39969            </register>
39970            <register>
39971                <name>TRCCLAIMSET</name>
39972                <addressOffset>0x00041fa0</addressOffset>
39973                <description>Claim Tag Set Register</description>
39974                <resetValue>0x0000000f</resetValue>
39975                <fields>
39976                    <field>
39977                        <name>SET3</name>
39978                        <description>When a write to one of these bits occurs, with the value:</description>
39979                        <bitRange>[3:3]</bitRange>
39980                        <access>read-write</access>
39981                    </field>
39982                    <field>
39983                        <name>SET2</name>
39984                        <description>When a write to one of these bits occurs, with the value:</description>
39985                        <bitRange>[2:2]</bitRange>
39986                        <access>read-write</access>
39987                    </field>
39988                    <field>
39989                        <name>SET1</name>
39990                        <description>When a write to one of these bits occurs, with the value:</description>
39991                        <bitRange>[1:1]</bitRange>
39992                        <access>read-write</access>
39993                    </field>
39994                    <field>
39995                        <name>SET0</name>
39996                        <description>When a write to one of these bits occurs, with the value:</description>
39997                        <bitRange>[0:0]</bitRange>
39998                        <access>read-write</access>
39999                    </field>
40000                </fields>
40001            </register>
40002            <register>
40003                <name>TRCCLAIMCLR</name>
40004                <addressOffset>0x00041fa4</addressOffset>
40005                <description>Claim Tag Clear Register</description>
40006                <resetValue>0x00000000</resetValue>
40007                <fields>
40008                    <field>
40009                        <name>CLR3</name>
40010                        <description>When a write to one of these bits occurs, with the value:</description>
40011                        <bitRange>[3:3]</bitRange>
40012                        <access>read-write</access>
40013                    </field>
40014                    <field>
40015                        <name>CLR2</name>
40016                        <description>When a write to one of these bits occurs, with the value:</description>
40017                        <bitRange>[2:2]</bitRange>
40018                        <access>read-write</access>
40019                    </field>
40020                    <field>
40021                        <name>CLR1</name>
40022                        <description>When a write to one of these bits occurs, with the value:</description>
40023                        <bitRange>[1:1]</bitRange>
40024                        <access>read-write</access>
40025                    </field>
40026                    <field>
40027                        <name>CLR0</name>
40028                        <description>When a write to one of these bits occurs, with the value:</description>
40029                        <bitRange>[0:0]</bitRange>
40030                        <access>read-write</access>
40031                    </field>
40032                </fields>
40033            </register>
40034            <register>
40035                <name>TRCAUTHSTATUS</name>
40036                <addressOffset>0x00041fb8</addressOffset>
40037                <description>Returns the level of tracing that the trace unit can support</description>
40038                <resetValue>0x00000000</resetValue>
40039                <fields>
40040                    <field>
40041                        <name>SNID</name>
40042                        <description>Indicates whether the system enables the trace unit to support Secure non-invasive debug:</description>
40043                        <bitRange>[7:6]</bitRange>
40044                        <access>read-only</access>
40045                    </field>
40046                    <field>
40047                        <name>SID</name>
40048                        <description>Indicates whether the trace unit supports Secure invasive debug:</description>
40049                        <bitRange>[5:4]</bitRange>
40050                        <access>read-only</access>
40051                    </field>
40052                    <field>
40053                        <name>NSNID</name>
40054                        <description>Indicates whether the system enables the trace unit to support Non-secure non-invasive debug:</description>
40055                        <bitRange>[3:2]</bitRange>
40056                        <access>read-only</access>
40057                    </field>
40058                    <field>
40059                        <name>NSID</name>
40060                        <description>Indicates whether the trace unit supports Non-secure invasive debug:</description>
40061                        <bitRange>[1:0]</bitRange>
40062                        <access>read-only</access>
40063                    </field>
40064                </fields>
40065            </register>
40066            <register>
40067                <name>TRCDEVARCH</name>
40068                <addressOffset>0x00041fbc</addressOffset>
40069                <description>TRCDEVARCH</description>
40070                <resetValue>0x47724a13</resetValue>
40071                <fields>
40072                    <field>
40073                        <name>ARCHITECT</name>
40074                        <description>reads as 0b01000111011</description>
40075                        <bitRange>[31:21]</bitRange>
40076                        <access>read-only</access>
40077                    </field>
40078                    <field>
40079                        <name>PRESENT</name>
40080                        <description>reads as 0b1</description>
40081                        <bitRange>[20:20]</bitRange>
40082                        <access>read-only</access>
40083                    </field>
40084                    <field>
40085                        <name>REVISION</name>
40086                        <description>reads as 0b0000</description>
40087                        <bitRange>[19:16]</bitRange>
40088                        <access>read-only</access>
40089                    </field>
40090                    <field>
40091                        <name>ARCHID</name>
40092                        <description>reads as 0b0100101000010011</description>
40093                        <bitRange>[15:0]</bitRange>
40094                        <access>read-only</access>
40095                    </field>
40096                </fields>
40097            </register>
40098            <register>
40099                <name>TRCDEVID</name>
40100                <addressOffset>0x00041fc8</addressOffset>
40101                <description>TRCDEVID</description>
40102                <resetValue>0x00000000</resetValue>
40103                <fields>
40104                    <field>
40105                        <name>TRCDEVID</name>
40106                        <bitRange>[31:0]</bitRange>
40107                        <access>read-write</access>
40108                    </field>
40109                </fields>
40110            </register>
40111            <register>
40112                <name>TRCDEVTYPE</name>
40113                <addressOffset>0x00041fcc</addressOffset>
40114                <description>TRCDEVTYPE</description>
40115                <resetValue>0x00000013</resetValue>
40116                <fields>
40117                    <field>
40118                        <name>SUB</name>
40119                        <description>reads as 0b0001</description>
40120                        <bitRange>[7:4]</bitRange>
40121                        <access>read-only</access>
40122                    </field>
40123                    <field>
40124                        <name>MAJOR</name>
40125                        <description>reads as 0b0011</description>
40126                        <bitRange>[3:0]</bitRange>
40127                        <access>read-only</access>
40128                    </field>
40129                </fields>
40130            </register>
40131            <register>
40132                <name>TRCPIDR4</name>
40133                <addressOffset>0x00041fd0</addressOffset>
40134                <description>TRCPIDR4</description>
40135                <resetValue>0x00000004</resetValue>
40136                <fields>
40137                    <field>
40138                        <name>SIZE</name>
40139                        <description>reads as `ImpDef</description>
40140                        <bitRange>[7:4]</bitRange>
40141                        <access>read-only</access>
40142                    </field>
40143                    <field>
40144                        <name>DES_2</name>
40145                        <description>reads as `ImpDef</description>
40146                        <bitRange>[3:0]</bitRange>
40147                        <access>read-only</access>
40148                    </field>
40149                </fields>
40150            </register>
40151            <register>
40152                <name>TRCPIDR5</name>
40153                <addressOffset>0x00041fd4</addressOffset>
40154                <description>TRCPIDR5</description>
40155                <resetValue>0x00000000</resetValue>
40156                <fields>
40157                    <field>
40158                        <name>TRCPIDR5</name>
40159                        <bitRange>[31:0]</bitRange>
40160                        <access>read-write</access>
40161                    </field>
40162                </fields>
40163            </register>
40164            <register>
40165                <name>TRCPIDR6</name>
40166                <addressOffset>0x00041fd8</addressOffset>
40167                <description>TRCPIDR6</description>
40168                <resetValue>0x00000000</resetValue>
40169                <fields>
40170                    <field>
40171                        <name>TRCPIDR6</name>
40172                        <bitRange>[31:0]</bitRange>
40173                        <access>read-write</access>
40174                    </field>
40175                </fields>
40176            </register>
40177            <register>
40178                <name>TRCPIDR7</name>
40179                <addressOffset>0x00041fdc</addressOffset>
40180                <description>TRCPIDR7</description>
40181                <resetValue>0x00000000</resetValue>
40182                <fields>
40183                    <field>
40184                        <name>TRCPIDR7</name>
40185                        <bitRange>[31:0]</bitRange>
40186                        <access>read-write</access>
40187                    </field>
40188                </fields>
40189            </register>
40190            <register>
40191                <name>TRCPIDR0</name>
40192                <addressOffset>0x00041fe0</addressOffset>
40193                <description>TRCPIDR0</description>
40194                <resetValue>0x00000021</resetValue>
40195                <fields>
40196                    <field>
40197                        <name>PART_0</name>
40198                        <description>reads as `ImpDef</description>
40199                        <bitRange>[7:0]</bitRange>
40200                        <access>read-only</access>
40201                    </field>
40202                </fields>
40203            </register>
40204            <register>
40205                <name>TRCPIDR1</name>
40206                <addressOffset>0x00041fe4</addressOffset>
40207                <description>TRCPIDR1</description>
40208                <resetValue>0x000000bd</resetValue>
40209                <fields>
40210                    <field>
40211                        <name>DES_0</name>
40212                        <description>reads as `ImpDef</description>
40213                        <bitRange>[7:4]</bitRange>
40214                        <access>read-only</access>
40215                    </field>
40216                    <field>
40217                        <name>PART_0</name>
40218                        <description>reads as `ImpDef</description>
40219                        <bitRange>[3:0]</bitRange>
40220                        <access>read-only</access>
40221                    </field>
40222                </fields>
40223            </register>
40224            <register>
40225                <name>TRCPIDR2</name>
40226                <addressOffset>0x00041fe8</addressOffset>
40227                <description>TRCPIDR2</description>
40228                <resetValue>0x0000002b</resetValue>
40229                <fields>
40230                    <field>
40231                        <name>REVISION</name>
40232                        <description>reads as `ImpDef</description>
40233                        <bitRange>[7:4]</bitRange>
40234                        <access>read-only</access>
40235                    </field>
40236                    <field>
40237                        <name>JEDEC</name>
40238                        <description>reads as 0b1</description>
40239                        <bitRange>[3:3]</bitRange>
40240                        <access>read-only</access>
40241                    </field>
40242                    <field>
40243                        <name>DES_0</name>
40244                        <description>reads as `ImpDef</description>
40245                        <bitRange>[2:0]</bitRange>
40246                        <access>read-only</access>
40247                    </field>
40248                </fields>
40249            </register>
40250            <register>
40251                <name>TRCPIDR3</name>
40252                <addressOffset>0x00041fec</addressOffset>
40253                <description>TRCPIDR3</description>
40254                <resetValue>0x00000000</resetValue>
40255                <fields>
40256                    <field>
40257                        <name>REVAND</name>
40258                        <description>reads as `ImpDef</description>
40259                        <bitRange>[7:4]</bitRange>
40260                        <access>read-only</access>
40261                    </field>
40262                    <field>
40263                        <name>CMOD</name>
40264                        <description>reads as `ImpDef</description>
40265                        <bitRange>[3:0]</bitRange>
40266                        <access>read-only</access>
40267                    </field>
40268                </fields>
40269            </register>
40270            <register>
40271                <name>TRCCIDR0</name>
40272                <addressOffset>0x00041ff0</addressOffset>
40273                <description>TRCCIDR0</description>
40274                <resetValue>0x0000000d</resetValue>
40275                <fields>
40276                    <field>
40277                        <name>PRMBL_0</name>
40278                        <description>reads as 0b00001101</description>
40279                        <bitRange>[7:0]</bitRange>
40280                        <access>read-only</access>
40281                    </field>
40282                </fields>
40283            </register>
40284            <register>
40285                <name>TRCCIDR1</name>
40286                <addressOffset>0x00041ff4</addressOffset>
40287                <description>TRCCIDR1</description>
40288                <resetValue>0x00000090</resetValue>
40289                <fields>
40290                    <field>
40291                        <name>CLASS</name>
40292                        <description>reads as 0b1001</description>
40293                        <bitRange>[7:4]</bitRange>
40294                        <access>read-only</access>
40295                    </field>
40296                    <field>
40297                        <name>PRMBL_1</name>
40298                        <description>reads as 0b0000</description>
40299                        <bitRange>[3:0]</bitRange>
40300                        <access>read-only</access>
40301                    </field>
40302                </fields>
40303            </register>
40304            <register>
40305                <name>TRCCIDR2</name>
40306                <addressOffset>0x00041ff8</addressOffset>
40307                <description>TRCCIDR2</description>
40308                <resetValue>0x00000005</resetValue>
40309                <fields>
40310                    <field>
40311                        <name>PRMBL_2</name>
40312                        <description>reads as 0b00000101</description>
40313                        <bitRange>[7:0]</bitRange>
40314                        <access>read-only</access>
40315                    </field>
40316                </fields>
40317            </register>
40318            <register>
40319                <name>TRCCIDR3</name>
40320                <addressOffset>0x00041ffc</addressOffset>
40321                <description>TRCCIDR3</description>
40322                <resetValue>0x000000b1</resetValue>
40323                <fields>
40324                    <field>
40325                        <name>PRMBL_3</name>
40326                        <description>reads as 0b10110001</description>
40327                        <bitRange>[7:0]</bitRange>
40328                        <access>read-only</access>
40329                    </field>
40330                </fields>
40331            </register>
40332            <register>
40333                <name>CTICONTROL</name>
40334                <addressOffset>0x00042000</addressOffset>
40335                <description>CTI Control Register</description>
40336                <resetValue>0x00000000</resetValue>
40337                <fields>
40338                    <field>
40339                        <name>GLBEN</name>
40340                        <description>Enables or disables the CTI</description>
40341                        <bitRange>[0:0]</bitRange>
40342                        <access>read-write</access>
40343                    </field>
40344                </fields>
40345            </register>
40346            <register>
40347                <name>CTIINTACK</name>
40348                <addressOffset>0x00042010</addressOffset>
40349                <description>CTI Interrupt Acknowledge Register</description>
40350                <resetValue>0x00000000</resetValue>
40351                <fields>
40352                    <field>
40353                        <name>INTACK</name>
40354                        <description>Acknowledges the corresponding ctitrigout output. There is one bit of the register for each ctitrigout output. When a 1 is written to a bit in this register, the corresponding ctitrigout is acknowledged, causing it to be cleared.</description>
40355                        <bitRange>[7:0]</bitRange>
40356                        <access>read-write</access>
40357                    </field>
40358                </fields>
40359            </register>
40360            <register>
40361                <name>CTIAPPSET</name>
40362                <addressOffset>0x00042014</addressOffset>
40363                <description>CTI Application Trigger Set Register</description>
40364                <resetValue>0x00000000</resetValue>
40365                <fields>
40366                    <field>
40367                        <name>APPSET</name>
40368                        <description>Setting a bit HIGH generates a channel event for the selected channel. There is one bit of the register for each channel</description>
40369                        <bitRange>[3:0]</bitRange>
40370                        <access>read-write</access>
40371                    </field>
40372                </fields>
40373            </register>
40374            <register>
40375                <name>CTIAPPCLEAR</name>
40376                <addressOffset>0x00042018</addressOffset>
40377                <description>CTI Application Trigger Clear Register</description>
40378                <resetValue>0x00000000</resetValue>
40379                <fields>
40380                    <field>
40381                        <name>APPCLEAR</name>
40382                        <description>Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel.</description>
40383                        <bitRange>[3:0]</bitRange>
40384                        <access>read-write</access>
40385                    </field>
40386                </fields>
40387            </register>
40388            <register>
40389                <name>CTIAPPPULSE</name>
40390                <addressOffset>0x0004201c</addressOffset>
40391                <description>CTI Application Pulse Register</description>
40392                <resetValue>0x00000000</resetValue>
40393                <fields>
40394                    <field>
40395                        <name>APPULSE</name>
40396                        <description>Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel.</description>
40397                        <bitRange>[3:0]</bitRange>
40398                        <access>read-write</access>
40399                    </field>
40400                </fields>
40401            </register>
40402            <register>
40403                <name>CTIINEN0</name>
40404                <addressOffset>0x00042020</addressOffset>
40405                <description>CTI Trigger to Channel Enable Registers</description>
40406                <resetValue>0x00000000</resetValue>
40407                <fields>
40408                    <field>
40409                        <name>TRIGINEN</name>
40410                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40411                        <bitRange>[3:0]</bitRange>
40412                        <access>read-write</access>
40413                    </field>
40414                </fields>
40415            </register>
40416            <register>
40417                <name>CTIINEN1</name>
40418                <addressOffset>0x00042024</addressOffset>
40419                <description>CTI Trigger to Channel Enable Registers</description>
40420                <resetValue>0x00000000</resetValue>
40421                <fields>
40422                    <field>
40423                        <name>TRIGINEN</name>
40424                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40425                        <bitRange>[3:0]</bitRange>
40426                        <access>read-write</access>
40427                    </field>
40428                </fields>
40429            </register>
40430            <register>
40431                <name>CTIINEN2</name>
40432                <addressOffset>0x00042028</addressOffset>
40433                <description>CTI Trigger to Channel Enable Registers</description>
40434                <resetValue>0x00000000</resetValue>
40435                <fields>
40436                    <field>
40437                        <name>TRIGINEN</name>
40438                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40439                        <bitRange>[3:0]</bitRange>
40440                        <access>read-write</access>
40441                    </field>
40442                </fields>
40443            </register>
40444            <register>
40445                <name>CTIINEN3</name>
40446                <addressOffset>0x0004202c</addressOffset>
40447                <description>CTI Trigger to Channel Enable Registers</description>
40448                <resetValue>0x00000000</resetValue>
40449                <fields>
40450                    <field>
40451                        <name>TRIGINEN</name>
40452                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40453                        <bitRange>[3:0]</bitRange>
40454                        <access>read-write</access>
40455                    </field>
40456                </fields>
40457            </register>
40458            <register>
40459                <name>CTIINEN4</name>
40460                <addressOffset>0x00042030</addressOffset>
40461                <description>CTI Trigger to Channel Enable Registers</description>
40462                <resetValue>0x00000000</resetValue>
40463                <fields>
40464                    <field>
40465                        <name>TRIGINEN</name>
40466                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40467                        <bitRange>[3:0]</bitRange>
40468                        <access>read-write</access>
40469                    </field>
40470                </fields>
40471            </register>
40472            <register>
40473                <name>CTIINEN5</name>
40474                <addressOffset>0x00042034</addressOffset>
40475                <description>CTI Trigger to Channel Enable Registers</description>
40476                <resetValue>0x00000000</resetValue>
40477                <fields>
40478                    <field>
40479                        <name>TRIGINEN</name>
40480                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40481                        <bitRange>[3:0]</bitRange>
40482                        <access>read-write</access>
40483                    </field>
40484                </fields>
40485            </register>
40486            <register>
40487                <name>CTIINEN6</name>
40488                <addressOffset>0x00042038</addressOffset>
40489                <description>CTI Trigger to Channel Enable Registers</description>
40490                <resetValue>0x00000000</resetValue>
40491                <fields>
40492                    <field>
40493                        <name>TRIGINEN</name>
40494                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40495                        <bitRange>[3:0]</bitRange>
40496                        <access>read-write</access>
40497                    </field>
40498                </fields>
40499            </register>
40500            <register>
40501                <name>CTIINEN7</name>
40502                <addressOffset>0x0004203c</addressOffset>
40503                <description>CTI Trigger to Channel Enable Registers</description>
40504                <resetValue>0x00000000</resetValue>
40505                <fields>
40506                    <field>
40507                        <name>TRIGINEN</name>
40508                        <description>Enables a cross trigger event to the corresponding channel when a ctitrigin input is activated. There is one bit of the field for each of the four channels</description>
40509                        <bitRange>[3:0]</bitRange>
40510                        <access>read-write</access>
40511                    </field>
40512                </fields>
40513            </register>
40514            <register>
40515                <name>CTIOUTEN0</name>
40516                <addressOffset>0x000420a0</addressOffset>
40517                <description>CTI Trigger to Channel Enable Registers</description>
40518                <resetValue>0x00000000</resetValue>
40519                <fields>
40520                    <field>
40521                        <name>TRIGOUTEN</name>
40522                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40523                        <bitRange>[3:0]</bitRange>
40524                        <access>read-write</access>
40525                    </field>
40526                </fields>
40527            </register>
40528            <register>
40529                <name>CTIOUTEN1</name>
40530                <addressOffset>0x000420a4</addressOffset>
40531                <description>CTI Trigger to Channel Enable Registers</description>
40532                <resetValue>0x00000000</resetValue>
40533                <fields>
40534                    <field>
40535                        <name>TRIGOUTEN</name>
40536                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40537                        <bitRange>[3:0]</bitRange>
40538                        <access>read-write</access>
40539                    </field>
40540                </fields>
40541            </register>
40542            <register>
40543                <name>CTIOUTEN2</name>
40544                <addressOffset>0x000420a8</addressOffset>
40545                <description>CTI Trigger to Channel Enable Registers</description>
40546                <resetValue>0x00000000</resetValue>
40547                <fields>
40548                    <field>
40549                        <name>TRIGOUTEN</name>
40550                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40551                        <bitRange>[3:0]</bitRange>
40552                        <access>read-write</access>
40553                    </field>
40554                </fields>
40555            </register>
40556            <register>
40557                <name>CTIOUTEN3</name>
40558                <addressOffset>0x000420ac</addressOffset>
40559                <description>CTI Trigger to Channel Enable Registers</description>
40560                <resetValue>0x00000000</resetValue>
40561                <fields>
40562                    <field>
40563                        <name>TRIGOUTEN</name>
40564                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40565                        <bitRange>[3:0]</bitRange>
40566                        <access>read-write</access>
40567                    </field>
40568                </fields>
40569            </register>
40570            <register>
40571                <name>CTIOUTEN4</name>
40572                <addressOffset>0x000420b0</addressOffset>
40573                <description>CTI Trigger to Channel Enable Registers</description>
40574                <resetValue>0x00000000</resetValue>
40575                <fields>
40576                    <field>
40577                        <name>TRIGOUTEN</name>
40578                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40579                        <bitRange>[3:0]</bitRange>
40580                        <access>read-write</access>
40581                    </field>
40582                </fields>
40583            </register>
40584            <register>
40585                <name>CTIOUTEN5</name>
40586                <addressOffset>0x000420b4</addressOffset>
40587                <description>CTI Trigger to Channel Enable Registers</description>
40588                <resetValue>0x00000000</resetValue>
40589                <fields>
40590                    <field>
40591                        <name>TRIGOUTEN</name>
40592                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40593                        <bitRange>[3:0]</bitRange>
40594                        <access>read-write</access>
40595                    </field>
40596                </fields>
40597            </register>
40598            <register>
40599                <name>CTIOUTEN6</name>
40600                <addressOffset>0x000420b8</addressOffset>
40601                <description>CTI Trigger to Channel Enable Registers</description>
40602                <resetValue>0x00000000</resetValue>
40603                <fields>
40604                    <field>
40605                        <name>TRIGOUTEN</name>
40606                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40607                        <bitRange>[3:0]</bitRange>
40608                        <access>read-write</access>
40609                    </field>
40610                </fields>
40611            </register>
40612            <register>
40613                <name>CTIOUTEN7</name>
40614                <addressOffset>0x000420bc</addressOffset>
40615                <description>CTI Trigger to Channel Enable Registers</description>
40616                <resetValue>0x00000000</resetValue>
40617                <fields>
40618                    <field>
40619                        <name>TRIGOUTEN</name>
40620                        <description>Enables a cross trigger event to ctitrigout when the corresponding channel is activated. There is one bit of the field for each of the four channels.</description>
40621                        <bitRange>[3:0]</bitRange>
40622                        <access>read-write</access>
40623                    </field>
40624                </fields>
40625            </register>
40626            <register>
40627                <name>CTITRIGINSTATUS</name>
40628                <addressOffset>0x00042130</addressOffset>
40629                <description>CTI Trigger to Channel Enable Registers</description>
40630                <resetValue>0x00000000</resetValue>
40631                <fields>
40632                    <field>
40633                        <name>TRIGINSTATUS</name>
40634                        <description>Shows the status of the ctitrigin inputs. There is one bit of the field for each trigger input.Because the register provides a view of the raw ctitrigin inputs, the reset value is UNKNOWN.</description>
40635                        <bitRange>[7:0]</bitRange>
40636                        <access>read-only</access>
40637                    </field>
40638                </fields>
40639            </register>
40640            <register>
40641                <name>CTITRIGOUTSTATUS</name>
40642                <addressOffset>0x00042134</addressOffset>
40643                <description>CTI Trigger In Status Register</description>
40644                <resetValue>0x00000000</resetValue>
40645                <fields>
40646                    <field>
40647                        <name>TRIGOUTSTATUS</name>
40648                        <description>Shows the status of the ctitrigout outputs. There is one bit of the field for each trigger output.</description>
40649                        <bitRange>[7:0]</bitRange>
40650                        <access>read-only</access>
40651                    </field>
40652                </fields>
40653            </register>
40654            <register>
40655                <name>CTICHINSTATUS</name>
40656                <addressOffset>0x00042138</addressOffset>
40657                <description>CTI Channel In Status Register</description>
40658                <resetValue>0x00000000</resetValue>
40659                <fields>
40660                    <field>
40661                        <name>CTICHOUTSTATUS</name>
40662                        <description>Shows the status of the ctichout outputs. There is one bit of the field for each channel output</description>
40663                        <bitRange>[3:0]</bitRange>
40664                        <access>read-only</access>
40665                    </field>
40666                </fields>
40667            </register>
40668            <register>
40669                <name>CTIGATE</name>
40670                <addressOffset>0x00042140</addressOffset>
40671                <description>Enable CTI Channel Gate register</description>
40672                <resetValue>0x0000000f</resetValue>
40673                <fields>
40674                    <field>
40675                        <name>CTIGATEEN3</name>
40676                        <description>Enable ctichout3. Set to 0 to disable channel propagation.</description>
40677                        <bitRange>[3:3]</bitRange>
40678                        <access>read-write</access>
40679                    </field>
40680                    <field>
40681                        <name>CTIGATEEN2</name>
40682                        <description>Enable ctichout2. Set to 0 to disable channel propagation.</description>
40683                        <bitRange>[2:2]</bitRange>
40684                        <access>read-write</access>
40685                    </field>
40686                    <field>
40687                        <name>CTIGATEEN1</name>
40688                        <description>Enable ctichout1. Set to 0 to disable channel propagation.</description>
40689                        <bitRange>[1:1]</bitRange>
40690                        <access>read-write</access>
40691                    </field>
40692                    <field>
40693                        <name>CTIGATEEN0</name>
40694                        <description>Enable ctichout0. Set to 0 to disable channel propagation.</description>
40695                        <bitRange>[0:0]</bitRange>
40696                        <access>read-write</access>
40697                    </field>
40698                </fields>
40699            </register>
40700            <register>
40701                <name>ASICCTL</name>
40702                <addressOffset>0x00042144</addressOffset>
40703                <description>External Multiplexer Control register</description>
40704                <resetValue>0x00000000</resetValue>
40705                <fields>
40706                    <field>
40707                        <name>ASICCTL</name>
40708                        <bitRange>[31:0]</bitRange>
40709                        <access>read-write</access>
40710                    </field>
40711                </fields>
40712            </register>
40713            <register>
40714                <name>ITCHOUT</name>
40715                <addressOffset>0x00042ee4</addressOffset>
40716                <description>Integration Test Channel Output register</description>
40717                <resetValue>0x00000000</resetValue>
40718                <fields>
40719                    <field>
40720                        <name>CTCHOUT</name>
40721                        <description>Sets the value of the ctichout outputs</description>
40722                        <bitRange>[3:0]</bitRange>
40723                        <access>read-write</access>
40724                    </field>
40725                </fields>
40726            </register>
40727            <register>
40728                <name>ITTRIGOUT</name>
40729                <addressOffset>0x00042ee8</addressOffset>
40730                <description>Integration Test Trigger Output register</description>
40731                <resetValue>0x00000000</resetValue>
40732                <fields>
40733                    <field>
40734                        <name>CTTRIGOUT</name>
40735                        <description>Sets the value of the ctitrigout outputs</description>
40736                        <bitRange>[7:0]</bitRange>
40737                        <access>read-write</access>
40738                    </field>
40739                </fields>
40740            </register>
40741            <register>
40742                <name>ITCHIN</name>
40743                <addressOffset>0x00042ef4</addressOffset>
40744                <description>Integration Test Channel Input register</description>
40745                <resetValue>0x00000000</resetValue>
40746                <fields>
40747                    <field>
40748                        <name>CTCHIN</name>
40749                        <description>Reads the value of the ctichin inputs.</description>
40750                        <bitRange>[3:0]</bitRange>
40751                        <access>read-only</access>
40752                    </field>
40753                </fields>
40754            </register>
40755            <register>
40756                <name>ITCTRL</name>
40757                <addressOffset>0x00042f00</addressOffset>
40758                <description>Integration Mode Control register</description>
40759                <resetValue>0x00000000</resetValue>
40760                <fields>
40761                    <field>
40762                        <name>IME</name>
40763                        <description>Integration Mode Enable</description>
40764                        <bitRange>[0:0]</bitRange>
40765                        <access>read-write</access>
40766                    </field>
40767                </fields>
40768            </register>
40769            <register>
40770                <name>DEVARCH</name>
40771                <addressOffset>0x00042fbc</addressOffset>
40772                <description>Device Architecture register</description>
40773                <resetValue>0x47701a14</resetValue>
40774                <fields>
40775                    <field>
40776                        <name>ARCHITECT</name>
40777                        <description>Indicates the component architect</description>
40778                        <bitRange>[31:21]</bitRange>
40779                        <access>read-only</access>
40780                    </field>
40781                    <field>
40782                        <name>PRESENT</name>
40783                        <description>Indicates whether the DEVARCH register is present</description>
40784                        <bitRange>[20:20]</bitRange>
40785                        <access>read-only</access>
40786                    </field>
40787                    <field>
40788                        <name>REVISION</name>
40789                        <description>Indicates the architecture revision</description>
40790                        <bitRange>[19:16]</bitRange>
40791                        <access>read-only</access>
40792                    </field>
40793                    <field>
40794                        <name>ARCHID</name>
40795                        <description>Indicates the component</description>
40796                        <bitRange>[15:0]</bitRange>
40797                        <access>read-only</access>
40798                    </field>
40799                </fields>
40800            </register>
40801            <register>
40802                <name>DEVID</name>
40803                <addressOffset>0x00042fc8</addressOffset>
40804                <description>Device Configuration register</description>
40805                <resetValue>0x00040800</resetValue>
40806                <fields>
40807                    <field>
40808                        <name>NUMCH</name>
40809                        <description>Number of ECT channels available</description>
40810                        <bitRange>[19:16]</bitRange>
40811                        <access>read-only</access>
40812                    </field>
40813                    <field>
40814                        <name>NUMTRIG</name>
40815                        <description>Number of ECT triggers available.</description>
40816                        <bitRange>[15:8]</bitRange>
40817                        <access>read-only</access>
40818                    </field>
40819                    <field>
40820                        <name>EXTMUXNUM</name>
40821                        <description>Indicates the number of multiplexers available on Trigger Inputs and Trigger Outputs that are using asicctl. The default value of 0b00000 indicates that no multiplexing is present. This value of this bit depends on the Verilog define EXTMUXNUM that you must change accordingly.</description>
40822                        <bitRange>[4:0]</bitRange>
40823                        <access>read-only</access>
40824                    </field>
40825                </fields>
40826            </register>
40827            <register>
40828                <name>DEVTYPE</name>
40829                <addressOffset>0x00042fcc</addressOffset>
40830                <description>Device Type Identifier register</description>
40831                <resetValue>0x00000014</resetValue>
40832                <fields>
40833                    <field>
40834                        <name>SUB</name>
40835                        <description>Sub-classification of the type of the debug component as specified in the ARM Architecture Specification within the major classification as specified in the MAJOR field.</description>
40836                        <bitRange>[7:4]</bitRange>
40837                        <access>read-only</access>
40838                    </field>
40839                    <field>
40840                        <name>MAJOR</name>
40841                        <description>Major classification of the type of the debug component as specified in the ARM Architecture Specification for this debug and trace component.</description>
40842                        <bitRange>[3:0]</bitRange>
40843                        <access>read-only</access>
40844                    </field>
40845                </fields>
40846            </register>
40847            <register>
40848                <name>PIDR4</name>
40849                <addressOffset>0x00042fd0</addressOffset>
40850                <description>CoreSight Peripheral ID4</description>
40851                <resetValue>0x00000004</resetValue>
40852                <fields>
40853                    <field>
40854                        <name>SIZE</name>
40855                        <description>Always 0b0000. Indicates that the device only occupies 4KB of memory</description>
40856                        <bitRange>[7:4]</bitRange>
40857                        <access>read-only</access>
40858                    </field>
40859                    <field>
40860                        <name>DES_2</name>
40861                        <description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the component.</description>
40862                        <bitRange>[3:0]</bitRange>
40863                        <access>read-only</access>
40864                    </field>
40865                </fields>
40866            </register>
40867            <register>
40868                <name>PIDR5</name>
40869                <addressOffset>0x00042fd4</addressOffset>
40870                <description>CoreSight Peripheral ID5</description>
40871                <resetValue>0x00000000</resetValue>
40872                <fields>
40873                    <field>
40874                        <name>PIDR5</name>
40875                        <bitRange>[31:0]</bitRange>
40876                        <access>read-write</access>
40877                    </field>
40878                </fields>
40879            </register>
40880            <register>
40881                <name>PIDR6</name>
40882                <addressOffset>0x00042fd8</addressOffset>
40883                <description>CoreSight Peripheral ID6</description>
40884                <resetValue>0x00000000</resetValue>
40885                <fields>
40886                    <field>
40887                        <name>PIDR6</name>
40888                        <bitRange>[31:0]</bitRange>
40889                        <access>read-write</access>
40890                    </field>
40891                </fields>
40892            </register>
40893            <register>
40894                <name>PIDR7</name>
40895                <addressOffset>0x00042fdc</addressOffset>
40896                <description>CoreSight Peripheral ID7</description>
40897                <resetValue>0x00000000</resetValue>
40898                <fields>
40899                    <field>
40900                        <name>PIDR7</name>
40901                        <bitRange>[31:0]</bitRange>
40902                        <access>read-write</access>
40903                    </field>
40904                </fields>
40905            </register>
40906            <register>
40907                <name>PIDR0</name>
40908                <addressOffset>0x00042fe0</addressOffset>
40909                <description>CoreSight Peripheral ID0</description>
40910                <resetValue>0x00000021</resetValue>
40911                <fields>
40912                    <field>
40913                        <name>PART_0</name>
40914                        <description>Bits[7:0] of the 12-bit part number of the component. The designer of the component assigns this part number.</description>
40915                        <bitRange>[7:0]</bitRange>
40916                        <access>read-only</access>
40917                    </field>
40918                </fields>
40919            </register>
40920            <register>
40921                <name>PIDR1</name>
40922                <addressOffset>0x00042fe4</addressOffset>
40923                <description>CoreSight Peripheral ID1</description>
40924                <resetValue>0x000000bd</resetValue>
40925                <fields>
40926                    <field>
40927                        <name>DES_0</name>
40928                        <description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the component.</description>
40929                        <bitRange>[7:4]</bitRange>
40930                        <access>read-only</access>
40931                    </field>
40932                    <field>
40933                        <name>PART_1</name>
40934                        <description>Bits[11:8] of the 12-bit part number of the component. The designer of the component assigns this part number.</description>
40935                        <bitRange>[3:0]</bitRange>
40936                        <access>read-only</access>
40937                    </field>
40938                </fields>
40939            </register>
40940            <register>
40941                <name>PIDR2</name>
40942                <addressOffset>0x00042fe8</addressOffset>
40943                <description>CoreSight Peripheral ID2</description>
40944                <resetValue>0x0000000b</resetValue>
40945                <fields>
40946                    <field>
40947                        <name>REVISION</name>
40948                        <description>This device is at r1p0</description>
40949                        <bitRange>[7:4]</bitRange>
40950                        <access>read-only</access>
40951                    </field>
40952                    <field>
40953                        <name>JEDEC</name>
40954                        <description>Always 1. Indicates that the JEDEC-assigned designer ID is used.</description>
40955                        <bitRange>[3:3]</bitRange>
40956                        <access>read-only</access>
40957                    </field>
40958                    <field>
40959                        <name>DES_1</name>
40960                        <description>Together, PIDR1.DES_0, PIDR2.DES_1, and PIDR4.DES_2 identify the designer of the component.</description>
40961                        <bitRange>[2:0]</bitRange>
40962                        <access>read-only</access>
40963                    </field>
40964                </fields>
40965            </register>
40966            <register>
40967                <name>PIDR3</name>
40968                <addressOffset>0x00042fec</addressOffset>
40969                <description>CoreSight Peripheral ID3</description>
40970                <resetValue>0x00000000</resetValue>
40971                <fields>
40972                    <field>
40973                        <name>REVAND</name>
40974                        <description>Indicates minor errata fixes specific to the revision of the component being used, for example metal fixes after implementation. In most cases, this field is 0b0000. ARM recommends that the component designers ensure that a metal fix can change this field if required, for example, by driving it from registers that reset to 0b0000.</description>
40975                        <bitRange>[7:4]</bitRange>
40976                        <access>read-only</access>
40977                    </field>
40978                    <field>
40979                        <name>CMOD</name>
40980                        <description>Customer Modified. Indicates whether the customer has modified the behavior of the component. In most cases, this field is 0b0000. Customers change this value when they make authorized modifications to this component.</description>
40981                        <bitRange>[3:0]</bitRange>
40982                        <access>read-only</access>
40983                    </field>
40984                </fields>
40985            </register>
40986            <register>
40987                <name>CIDR0</name>
40988                <addressOffset>0x00042ff0</addressOffset>
40989                <description>CoreSight Component ID0</description>
40990                <resetValue>0x0000000d</resetValue>
40991                <fields>
40992                    <field>
40993                        <name>PRMBL_0</name>
40994                        <description>Preamble[0]. Contains bits[7:0] of the component identification code</description>
40995                        <bitRange>[7:0]</bitRange>
40996                        <access>read-only</access>
40997                    </field>
40998                </fields>
40999            </register>
41000            <register>
41001                <name>CIDR1</name>
41002                <addressOffset>0x00042ff4</addressOffset>
41003                <description>CoreSight Component ID1</description>
41004                <resetValue>0x00000090</resetValue>
41005                <fields>
41006                    <field>
41007                        <name>CLASS</name>
41008                        <description>Class of the component, for example, whether the component is a ROM table or a generic CoreSight component. Contains bits[15:12] of the component identification code.</description>
41009                        <bitRange>[7:4]</bitRange>
41010                        <access>read-only</access>
41011                    </field>
41012                    <field>
41013                        <name>PRMBL_1</name>
41014                        <description>Preamble[1]. Contains bits[11:8] of the component identification code.</description>
41015                        <bitRange>[3:0]</bitRange>
41016                        <access>read-only</access>
41017                    </field>
41018                </fields>
41019            </register>
41020            <register>
41021                <name>CIDR2</name>
41022                <addressOffset>0x00042ff8</addressOffset>
41023                <description>CoreSight Component ID2</description>
41024                <resetValue>0x00000005</resetValue>
41025                <fields>
41026                    <field>
41027                        <name>PRMBL_2</name>
41028                        <description>Preamble[2]. Contains bits[23:16] of the component identification code.</description>
41029                        <bitRange>[7:0]</bitRange>
41030                        <access>read-only</access>
41031                    </field>
41032                </fields>
41033            </register>
41034            <register>
41035                <name>CIDR3</name>
41036                <addressOffset>0x00042ffc</addressOffset>
41037                <description>CoreSight Component ID3</description>
41038                <resetValue>0x000000b1</resetValue>
41039                <fields>
41040                    <field>
41041                        <name>PRMBL_3</name>
41042                        <description>Preamble[3]. Contains bits[31:24] of the component identification code.</description>
41043                        <bitRange>[7:0]</bitRange>
41044                        <access>read-only</access>
41045                    </field>
41046                </fields>
41047            </register>
41048        </registers>
41049    </peripheral>
41050    <peripheral derivedFrom="PPB">
41051        <name>PPB_NS</name>
41052        <baseAddress>0xe0020000</baseAddress>
41053    </peripheral>
41054    <peripheral>
41055        <name>QMI</name>
41056        <description>QSPI Memory Interface.
41057
41058            Provides a memory-mapped interface to up to two SPI/DSPI/QSPI flash or PSRAM devices. Also provides a serial interface for programming and configuration of the external device.</description>
41059        <baseAddress>0x400d0000</baseAddress>
41060        <addressBlock>
41061            <offset>0</offset>
41062            <size>84</size>
41063            <usage>registers</usage>
41064        </addressBlock>
41065        <registers>
41066            <register>
41067                <name>DIRECT_CSR</name>
41068                <addressOffset>0x00000000</addressOffset>
41069                <description>Control and status for direct serial mode
41070
41071                    Direct serial mode allows the processor to send and receive raw serial frames, for programming, configuration and control of the external memory devices. Only SPI mode 0 (CPOL=0 CPHA=0) is supported.</description>
41072                <resetValue>0x01800000</resetValue>
41073                <fields>
41074                    <field>
41075                        <name>RXDELAY</name>
41076                        <description>Delay the read data sample timing, in units of one half of a system clock cycle. (Not necessarily half of an SCK cycle.)</description>
41077                        <bitRange>[31:30]</bitRange>
41078                        <access>read-write</access>
41079                    </field>
41080                    <field>
41081                        <name>CLKDIV</name>
41082                        <description>Clock divisor for direct serial mode. Divisors of 1..255 are encoded directly, and the maximum divisor of 256 is encoded by a value of CLKDIV=0.
41083
41084                            The clock divisor can be changed on-the-fly by software, without halting or otherwise coordinating with the serial interface. The serial interface will sample the latest clock divisor each time it begins the transmission of a new byte.</description>
41085                        <bitRange>[29:22]</bitRange>
41086                        <access>read-write</access>
41087                    </field>
41088                    <field>
41089                        <name>RXLEVEL</name>
41090                        <description>Current level of DIRECT_RX FIFO</description>
41091                        <bitRange>[20:18]</bitRange>
41092                        <access>read-only</access>
41093                    </field>
41094                    <field>
41095                        <name>RXFULL</name>
41096                        <description>When 1, the DIRECT_RX FIFO is currently full. The serial interface will be stalled until data is popped; the interface will not begin a new serial frame when the DIRECT_TX FIFO is empty or the DIRECT_RX FIFO is full.</description>
41097                        <bitRange>[17:17]</bitRange>
41098                        <access>read-only</access>
41099                    </field>
41100                    <field>
41101                        <name>RXEMPTY</name>
41102                        <description>When 1, the DIRECT_RX FIFO is currently empty. If the processor attempts to read more data, the FIFO state is not affected, but the value returned to the processor is undefined.</description>
41103                        <bitRange>[16:16]</bitRange>
41104                        <access>read-only</access>
41105                    </field>
41106                    <field>
41107                        <name>TXLEVEL</name>
41108                        <description>Current level of DIRECT_TX FIFO</description>
41109                        <bitRange>[14:12]</bitRange>
41110                        <access>read-only</access>
41111                    </field>
41112                    <field>
41113                        <name>TXEMPTY</name>
41114                        <description>When 1, the DIRECT_TX FIFO is currently empty. Unless the processor pushes more data, transmission will stop and BUSY will go low once the current 8-bit serial frame completes.</description>
41115                        <bitRange>[11:11]</bitRange>
41116                        <access>read-only</access>
41117                    </field>
41118                    <field>
41119                        <name>TXFULL</name>
41120                        <description>When 1, the DIRECT_TX FIFO is currently full. If the processor tries to write more data, that data will be ignored.</description>
41121                        <bitRange>[10:10]</bitRange>
41122                        <access>read-only</access>
41123                    </field>
41124                    <field>
41125                        <name>AUTO_CS1N</name>
41126                        <description>When 1, automatically assert the CS1n chip select line whenever the BUSY flag is set.</description>
41127                        <bitRange>[7:7]</bitRange>
41128                        <access>read-write</access>
41129                    </field>
41130                    <field>
41131                        <name>AUTO_CS0N</name>
41132                        <description>When 1, automatically assert the CS0n chip select line whenever the BUSY flag is set.</description>
41133                        <bitRange>[6:6]</bitRange>
41134                        <access>read-write</access>
41135                    </field>
41136                    <field>
41137                        <name>ASSERT_CS1N</name>
41138                        <description>When 1, assert (i.e. drive low) the CS1n chip select line.
41139
41140                            Note that this applies even when DIRECT_CSR_EN is 0.</description>
41141                        <bitRange>[3:3]</bitRange>
41142                        <access>read-write</access>
41143                    </field>
41144                    <field>
41145                        <name>ASSERT_CS0N</name>
41146                        <description>When 1, assert (i.e. drive low) the CS0n chip select line.
41147
41148                            Note that this applies even when DIRECT_CSR_EN is 0.</description>
41149                        <bitRange>[2:2]</bitRange>
41150                        <access>read-write</access>
41151                    </field>
41152                    <field>
41153                        <name>BUSY</name>
41154                        <description>Direct mode busy flag. If 1, data is currently being shifted in/out (or would be if the interface were not stalled on the RX FIFO), and the chip select must not yet be deasserted.
41155
41156                            The busy flag will also be set to 1 if a memory-mapped transfer is still in progress when direct mode is enabled. Direct mode blocks new memory-mapped transfers, but can&#39;t halt a transfer that is already in progress. If there is a chance that memory-mapped transfers may be in progress, the busy flag should be polled for 0 before asserting the chip select.
41157
41158                            (In practice you will usually discover this timing condition through other means, because any subsequent memory-mapped transfers when direct mode is enabled will return bus errors, which are difficult to ignore.)</description>
41159                        <bitRange>[1:1]</bitRange>
41160                        <access>read-only</access>
41161                    </field>
41162                    <field>
41163                        <name>EN</name>
41164                        <description>Enable direct mode.
41165
41166                            In direct mode, software controls the chip select lines, and can perform direct SPI transfers by pushing data to the DIRECT_TX FIFO, and popping the same amount of data from the DIRECT_RX FIFO.
41167
41168                            Memory-mapped accesses will generate bus errors when direct serial mode is enabled.</description>
41169                        <bitRange>[0:0]</bitRange>
41170                        <access>read-write</access>
41171                    </field>
41172                </fields>
41173            </register>
41174            <register>
41175                <name>DIRECT_TX</name>
41176                <addressOffset>0x00000004</addressOffset>
41177                <description>Transmit FIFO for direct mode</description>
41178                <resetValue>0x00000000</resetValue>
41179                <fields>
41180                    <field>
41181                        <name>NOPUSH</name>
41182                        <description>Inhibit the RX FIFO push that would correspond to this TX FIFO entry.
41183
41184                            Useful to avoid garbage appearing in the RX FIFO when pushing the command at the beginning of a SPI transfer.</description>
41185                        <bitRange>[20:20]</bitRange>
41186                        <access>write-only</access>
41187                    </field>
41188                    <field>
41189                        <name>OE</name>
41190                        <description>Output enable (active-high). For single width (SPI), this field is ignored, and SD0 is always set to output, with SD1 always set to input.
41191
41192                            For dual and quad width (DSPI/QSPI), this sets whether the relevant SDx pads are set to output whilst transferring this FIFO record. In this case the command/address should have OE set, and the data transfer should have OE set or clear depending on the direction of the transfer.</description>
41193                        <bitRange>[19:19]</bitRange>
41194                        <access>write-only</access>
41195                    </field>
41196                    <field>
41197                        <name>DWIDTH</name>
41198                        <description>Data width. If 0, hardware will transmit the 8 LSBs of the DIRECT_TX DATA field, and return an 8-bit value in the 8 LSBs of DIRECT_RX. If 1, the full 16-bit width is used. 8-bit and 16-bit transfers can be mixed freely.</description>
41199                        <bitRange>[18:18]</bitRange>
41200                        <access>write-only</access>
41201                    </field>
41202                    <field>
41203                        <name>IWIDTH</name>
41204                        <description>Configure whether this FIFO record is transferred with single/dual/quad interface width (0/1/2). Different widths can be mixed freely.</description>
41205                        <bitRange>[17:16]</bitRange>
41206                        <access>write-only</access>
41207                        <enumeratedValues>
41208                            <enumeratedValue>
41209                                <name>S</name>
41210                                <value>0</value>
41211                                <description>Single width</description>
41212                            </enumeratedValue>
41213                            <enumeratedValue>
41214                                <name>D</name>
41215                                <value>1</value>
41216                                <description>Dual width</description>
41217                            </enumeratedValue>
41218                            <enumeratedValue>
41219                                <name>Q</name>
41220                                <value>2</value>
41221                                <description>Quad width</description>
41222                            </enumeratedValue>
41223                        </enumeratedValues>
41224                    </field>
41225                    <field>
41226                        <name>DATA</name>
41227                        <description>Data pushed here will be clocked out falling edges of SCK (or before the very first rising edge of SCK, if this is the first pulse). For each byte clocked out, the interface will simultaneously sample one byte, on rising edges of SCK, and push this to the DIRECT_RX FIFO.
41228
41229                            For 16-bit data, the least-significant byte is transmitted first.</description>
41230                        <bitRange>[15:0]</bitRange>
41231                        <access>write-only</access>
41232                    </field>
41233                </fields>
41234            </register>
41235            <register>
41236                <name>DIRECT_RX</name>
41237                <addressOffset>0x00000008</addressOffset>
41238                <description>Receive FIFO for direct mode</description>
41239                <resetValue>0x00000000</resetValue>
41240                <fields>
41241                    <field>
41242                        <name>DIRECT_RX</name>
41243                        <description>With each byte clocked out on the serial interface, one byte will simultaneously be clocked in, and will appear in this FIFO. The serial interface will stall when this FIFO is full, to avoid dropping data.
41244
41245                            When 16-bit data is pushed into the TX FIFO, the corresponding RX FIFO push will also contain 16 bits of data. The least-significant byte is the first one received.</description>
41246                        <bitRange>[15:0]</bitRange>
41247                        <access>read-only</access>
41248                        <readAction>modify</readAction>
41249                    </field>
41250                </fields>
41251            </register>
41252            <register>
41253                <name>M0_TIMING</name>
41254                <addressOffset>0x0000000c</addressOffset>
41255                <description>Timing configuration register for memory address window 0.</description>
41256                <resetValue>0x40000004</resetValue>
41257                <fields>
41258                    <field>
41259                        <name>COOLDOWN</name>
41260                        <description>Chip select cooldown period. When a memory transfer finishes, the chip select remains asserted for 64 x COOLDOWN system clock cycles, plus half an SCK clock period (rounded up for odd SCK divisors). After this cooldown expires, the chip select is always deasserted to save power.
41261
41262                            If the next memory access arrives within the cooldown period, the QMI may be able to append more SCK cycles to the currently ongoing SPI transfer, rather than starting a new transfer. This reduces access latency and increases bus throughput.
41263
41264                            Specifically, the next access must be in the same direction (read/write), access the same memory window (chip select 0/1), and follow sequentially the address of the last transfer. If any of these are false, the new access will first deassert the chip select, then begin a new transfer.
41265
41266                            If COOLDOWN is 0, the address alignment configured by PAGEBREAK has been reached, or the total chip select assertion limit MAX_SELECT has been reached, the cooldown period is skipped, and the chip select will always be deasserted one half SCK period after the transfer finishes.</description>
41267                        <bitRange>[31:30]</bitRange>
41268                        <access>read-write</access>
41269                    </field>
41270                    <field>
41271                        <name>PAGEBREAK</name>
41272                        <description>When page break is enabled, chip select will automatically deassert when crossing certain power-of-2-aligned address boundaries. The next access will always begin a new read/write SPI burst, even if the address of the next access follows in sequence with the last access before the page boundary.
41273
41274                            Some flash and PSRAM devices forbid crossing page boundaries with a single read/write transfer, or restrict the operating frequency for transfers that do cross page a boundary. This option allows the QMI to safely support those devices.
41275
41276                            This field has no effect when COOLDOWN is disabled.</description>
41277                        <bitRange>[29:28]</bitRange>
41278                        <access>read-write</access>
41279                        <enumeratedValues>
41280                            <enumeratedValue>
41281                                <name>NONE</name>
41282                                <value>0</value>
41283                                <description>No page boundary is enforced</description>
41284                            </enumeratedValue>
41285                            <enumeratedValue>
41286                                <name>256</name>
41287                                <value>1</value>
41288                                <description>Break bursts crossing a 256-byte page boundary</description>
41289                            </enumeratedValue>
41290                            <enumeratedValue>
41291                                <name>1024</name>
41292                                <value>2</value>
41293                                <description>Break bursts crossing a 1024-byte quad-page boundary</description>
41294                            </enumeratedValue>
41295                            <enumeratedValue>
41296                                <name>4096</name>
41297                                <value>3</value>
41298                                <description>Break bursts crossing a 4096-byte sector boundary</description>
41299                            </enumeratedValue>
41300                        </enumeratedValues>
41301                    </field>
41302                    <field>
41303                        <name>SELECT_SETUP</name>
41304                        <description>Add up to one additional system clock cycle of setup between chip select assertion and the first rising edge of SCK.
41305
41306                            The default setup time is one half SCK period, which is usually sufficient except for very high SCK frequencies with some flash devices.</description>
41307                        <bitRange>[25:25]</bitRange>
41308                        <access>read-write</access>
41309                    </field>
41310                    <field>
41311                        <name>SELECT_HOLD</name>
41312                        <description>Add up to three additional system clock cycles of active hold between the last falling edge of SCK and the deassertion of this window&#39;s chip select.
41313
41314                            The default hold time is one system clock cycle. Note that flash datasheets usually give chip select active hold time from the last *rising* edge of SCK, and so even zero hold from the last falling edge would be safe.
41315
41316                            Note that this is a minimum hold time guaranteed by the QMI: the actual chip select active hold may be slightly longer for read transfers with low clock divisors and/or high sample delays. Specifically, if the point two cycles after the last RX data sample is later than the last SCK falling edge, then the hold time is measured from *this* point.
41317
41318                            Note also that, in case the final SCK pulse is masked to save energy (true for non-DTR reads when COOLDOWN is disabled or PAGE_BREAK is reached), all of QMI&#39;s timing logic behaves as though the clock pulse were still present. The SELECT_HOLD time is applied from the point where the last SCK falling edge would be if the clock pulse were not masked.</description>
41319                        <bitRange>[24:23]</bitRange>
41320                        <access>read-write</access>
41321                    </field>
41322                    <field>
41323                        <name>MAX_SELECT</name>
41324                        <description>Enforce a maximum assertion duration for this window&#39;s chip select, in units of 64 system clock cycles. If 0, the QMI is permitted to keep the chip select asserted indefinitely when servicing sequential memory accesses (see COOLDOWN).
41325
41326                            This feature is required to meet timing constraints of PSRAM devices, which specify a maximum chip select assertion so they can perform DRAM refresh cycles. See also MIN_DESELECT, which can enforce a minimum deselect time.
41327
41328                            If a memory access is in progress at the time MAX_SELECT is reached, the QMI will wait for the access to complete before deasserting the chip select. This additional time must be accounted for to calculate a safe MAX_SELECT value. In the worst case, this may be a fully-formed serial transfer, including command prefix and address, with a data payload as large as one cache line.</description>
41329                        <bitRange>[22:17]</bitRange>
41330                        <access>read-write</access>
41331                    </field>
41332                    <field>
41333                        <name>MIN_DESELECT</name>
41334                        <description>After this window&#39;s chip select is deasserted, it remains deasserted for half an SCK cycle (rounded up to an integer number of system clock cycles), plus MIN_DESELECT additional system clock cycles, before the QMI reasserts either chip select pin.
41335
41336                            Nonzero values may be required for PSRAM devices which enforce a longer minimum CS deselect time, so that they can perform internal DRAM refresh cycles whilst deselected.</description>
41337                        <bitRange>[16:12]</bitRange>
41338                        <access>read-write</access>
41339                    </field>
41340                    <field>
41341                        <name>RXDELAY</name>
41342                        <description>Delay the read data sample timing, in units of one half of a system clock cycle. (Not necessarily half of an SCK cycle.) An RXDELAY of 0 means the sample is captured at the SDI input registers simultaneously with the rising edge of SCK launched from the SCK output register.
41343
41344                            At higher SCK frequencies, RXDELAY may need to be increased to account for the round trip delay of the pads, and the clock-to-Q delay of the QSPI memory device.</description>
41345                        <bitRange>[10:8]</bitRange>
41346                        <access>read-write</access>
41347                    </field>
41348                    <field>
41349                        <name>CLKDIV</name>
41350                        <description>Clock divisor. Odd and even divisors are supported. Defines the SCK clock period in units of 1 system clock cycle. Divisors 1..255 are encoded directly, and a divisor of 256 is encoded with a value of CLKDIV=0.
41351
41352                            The clock divisor can be changed on-the-fly, even when the QMI is currently accessing memory in this address window. All other parameters must only be changed when the QMI is idle.
41353
41354                            If software is increasing CLKDIV in anticipation of an increase in the system clock frequency, a dummy access to either memory window (and appropriate processor barriers/fences) must be inserted after the Mx_TIMING write to ensure the SCK divisor change is in effect _before_ the system clock is changed.</description>
41355                        <bitRange>[7:0]</bitRange>
41356                        <access>read-write</access>
41357                    </field>
41358                </fields>
41359            </register>
41360            <register>
41361                <name>M0_RFMT</name>
41362                <addressOffset>0x00000010</addressOffset>
41363                <description>Read transfer format configuration for memory address window 0.
41364
41365                    Configure the bus width of each transfer phase individually, and configure the length or presence of the command prefix, command suffix and dummy/turnaround transfer phases. Only 24-bit addresses are supported.
41366
41367                    The reset value of the M0_RFMT register is configured to support a basic 03h serial read transfer with no additional configuration.</description>
41368                <resetValue>0x00001000</resetValue>
41369                <fields>
41370                    <field>
41371                        <name>DTR</name>
41372                        <description>Enable double transfer rate (DTR) for read commands: address, suffix and read data phases are active on both edges of SCK. SDO data is launched centre-aligned on each SCK edge, and SDI data is captured on the SCK edge that follows its launch.
41373
41374                            DTR is implemented by halving the clock rate; SCK has a period of 2 x CLK_DIV throughout the transfer. The prefix and dummy phases are still single transfer rate.
41375
41376                            If the suffix is quad-width, it must be 0 or 8 bits in length, to ensure an even number of SCK edges.</description>
41377                        <bitRange>[28:28]</bitRange>
41378                        <access>read-write</access>
41379                    </field>
41380                    <field>
41381                        <name>DUMMY_LEN</name>
41382                        <description>Length of dummy phase between command suffix and data phase, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)</description>
41383                        <bitRange>[18:16]</bitRange>
41384                        <access>read-write</access>
41385                        <enumeratedValues>
41386                            <enumeratedValue>
41387                                <name>NONE</name>
41388                                <value>0</value>
41389                                <description>No dummy phase</description>
41390                            </enumeratedValue>
41391                            <enumeratedValue>
41392                                <name>4</name>
41393                                <value>1</value>
41394                                <description>4 dummy bits</description>
41395                            </enumeratedValue>
41396                            <enumeratedValue>
41397                                <name>8</name>
41398                                <value>2</value>
41399                                <description>8 dummy bits</description>
41400                            </enumeratedValue>
41401                            <enumeratedValue>
41402                                <name>12</name>
41403                                <value>3</value>
41404                                <description>12 dummy bits</description>
41405                            </enumeratedValue>
41406                            <enumeratedValue>
41407                                <name>16</name>
41408                                <value>4</value>
41409                                <description>16 dummy bits</description>
41410                            </enumeratedValue>
41411                            <enumeratedValue>
41412                                <name>20</name>
41413                                <value>5</value>
41414                                <description>20 dummy bits</description>
41415                            </enumeratedValue>
41416                            <enumeratedValue>
41417                                <name>24</name>
41418                                <value>6</value>
41419                                <description>24 dummy bits</description>
41420                            </enumeratedValue>
41421                            <enumeratedValue>
41422                                <name>28</name>
41423                                <value>7</value>
41424                                <description>28 dummy bits</description>
41425                            </enumeratedValue>
41426                        </enumeratedValues>
41427                    </field>
41428                    <field>
41429                        <name>SUFFIX_LEN</name>
41430                        <description>Length of post-address command suffix, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)
41431
41432                            Only values of 0 and 8 bits are supported.</description>
41433                        <bitRange>[15:14]</bitRange>
41434                        <access>read-write</access>
41435                        <enumeratedValues>
41436                            <enumeratedValue>
41437                                <name>NONE</name>
41438                                <value>0</value>
41439                                <description>No suffix</description>
41440                            </enumeratedValue>
41441                            <enumeratedValue>
41442                                <name>8</name>
41443                                <value>2</value>
41444                                <description>8-bit suffix</description>
41445                            </enumeratedValue>
41446                        </enumeratedValues>
41447                    </field>
41448                    <field>
41449                        <name>PREFIX_LEN</name>
41450                        <description>Length of command prefix, in units of 8 bits. (i.e. 2 cycles for quad width, 4 for dual, 8 for single)</description>
41451                        <bitRange>[12:12]</bitRange>
41452                        <access>read-write</access>
41453                        <enumeratedValues>
41454                            <enumeratedValue>
41455                                <name>NONE</name>
41456                                <value>0</value>
41457                                <description>No prefix</description>
41458                            </enumeratedValue>
41459                            <enumeratedValue>
41460                                <name>8</name>
41461                                <value>1</value>
41462                                <description>8-bit prefix</description>
41463                            </enumeratedValue>
41464                        </enumeratedValues>
41465                    </field>
41466                    <field>
41467                        <name>DATA_WIDTH</name>
41468                        <description>The width used for the data transfer</description>
41469                        <bitRange>[9:8]</bitRange>
41470                        <access>read-write</access>
41471                        <enumeratedValues>
41472                            <enumeratedValue>
41473                                <name>S</name>
41474                                <value>0</value>
41475                                <description>Single width</description>
41476                            </enumeratedValue>
41477                            <enumeratedValue>
41478                                <name>D</name>
41479                                <value>1</value>
41480                                <description>Dual width</description>
41481                            </enumeratedValue>
41482                            <enumeratedValue>
41483                                <name>Q</name>
41484                                <value>2</value>
41485                                <description>Quad width</description>
41486                            </enumeratedValue>
41487                        </enumeratedValues>
41488                    </field>
41489                    <field>
41490                        <name>DUMMY_WIDTH</name>
41491                        <description>The width used for the dummy phase, if any.
41492
41493                            If width is single, SD0/MOSI is held asserted low during the dummy phase, and SD1...SD3 are tristated. If width is dual/quad, all IOs are tristated during the dummy phase.</description>
41494                        <bitRange>[7:6]</bitRange>
41495                        <access>read-write</access>
41496                        <enumeratedValues>
41497                            <enumeratedValue>
41498                                <name>S</name>
41499                                <value>0</value>
41500                                <description>Single width</description>
41501                            </enumeratedValue>
41502                            <enumeratedValue>
41503                                <name>D</name>
41504                                <value>1</value>
41505                                <description>Dual width</description>
41506                            </enumeratedValue>
41507                            <enumeratedValue>
41508                                <name>Q</name>
41509                                <value>2</value>
41510                                <description>Quad width</description>
41511                            </enumeratedValue>
41512                        </enumeratedValues>
41513                    </field>
41514                    <field>
41515                        <name>SUFFIX_WIDTH</name>
41516                        <description>The width used for the post-address command suffix, if any</description>
41517                        <bitRange>[5:4]</bitRange>
41518                        <access>read-write</access>
41519                        <enumeratedValues>
41520                            <enumeratedValue>
41521                                <name>S</name>
41522                                <value>0</value>
41523                                <description>Single width</description>
41524                            </enumeratedValue>
41525                            <enumeratedValue>
41526                                <name>D</name>
41527                                <value>1</value>
41528                                <description>Dual width</description>
41529                            </enumeratedValue>
41530                            <enumeratedValue>
41531                                <name>Q</name>
41532                                <value>2</value>
41533                                <description>Quad width</description>
41534                            </enumeratedValue>
41535                        </enumeratedValues>
41536                    </field>
41537                    <field>
41538                        <name>ADDR_WIDTH</name>
41539                        <description>The transfer width used for the address. The address phase always transfers 24 bits in total.</description>
41540                        <bitRange>[3:2]</bitRange>
41541                        <access>read-write</access>
41542                        <enumeratedValues>
41543                            <enumeratedValue>
41544                                <name>S</name>
41545                                <value>0</value>
41546                                <description>Single width</description>
41547                            </enumeratedValue>
41548                            <enumeratedValue>
41549                                <name>D</name>
41550                                <value>1</value>
41551                                <description>Dual width</description>
41552                            </enumeratedValue>
41553                            <enumeratedValue>
41554                                <name>Q</name>
41555                                <value>2</value>
41556                                <description>Quad width</description>
41557                            </enumeratedValue>
41558                        </enumeratedValues>
41559                    </field>
41560                    <field>
41561                        <name>PREFIX_WIDTH</name>
41562                        <description>The transfer width used for the command prefix, if any</description>
41563                        <bitRange>[1:0]</bitRange>
41564                        <access>read-write</access>
41565                        <enumeratedValues>
41566                            <enumeratedValue>
41567                                <name>S</name>
41568                                <value>0</value>
41569                                <description>Single width</description>
41570                            </enumeratedValue>
41571                            <enumeratedValue>
41572                                <name>D</name>
41573                                <value>1</value>
41574                                <description>Dual width</description>
41575                            </enumeratedValue>
41576                            <enumeratedValue>
41577                                <name>Q</name>
41578                                <value>2</value>
41579                                <description>Quad width</description>
41580                            </enumeratedValue>
41581                        </enumeratedValues>
41582                    </field>
41583                </fields>
41584            </register>
41585            <register>
41586                <name>M0_RCMD</name>
41587                <addressOffset>0x00000014</addressOffset>
41588                <description>Command constants used for reads from memory address window 0.
41589
41590                    The reset value of the M0_RCMD register is configured to support a basic 03h serial read transfer with no additional configuration.</description>
41591                <resetValue>0x0000a003</resetValue>
41592                <fields>
41593                    <field>
41594                        <name>SUFFIX</name>
41595                        <description>The command suffix bits following the address, if Mx_RFMT_SUFFIX_LEN is nonzero.</description>
41596                        <bitRange>[15:8]</bitRange>
41597                        <access>read-write</access>
41598                    </field>
41599                    <field>
41600                        <name>PREFIX</name>
41601                        <description>The command prefix bits to prepend on each new transfer, if Mx_RFMT_PREFIX_LEN is nonzero.</description>
41602                        <bitRange>[7:0]</bitRange>
41603                        <access>read-write</access>
41604                    </field>
41605                </fields>
41606            </register>
41607            <register>
41608                <name>M0_WFMT</name>
41609                <addressOffset>0x00000018</addressOffset>
41610                <description>Write transfer format configuration for memory address window 0.
41611
41612                    Configure the bus width of each transfer phase individually, and configure the length or presence of the command prefix, command suffix and dummy/turnaround transfer phases. Only 24-bit addresses are supported.
41613
41614                    The reset value of the M0_WFMT register is configured to support a basic 02h serial write transfer. However, writes to this window must first be enabled via the XIP_CTRL_WRITABLE_M0 bit, as XIP memory is read-only by default.</description>
41615                <resetValue>0x00001000</resetValue>
41616                <fields>
41617                    <field>
41618                        <name>DTR</name>
41619                        <description>Enable double transfer rate (DTR) for write commands: address, suffix and write data phases are active on both edges of SCK. SDO data is launched centre-aligned on each SCK edge, and SDI data is captured on the SCK edge that follows its launch.
41620
41621                            DTR is implemented by halving the clock rate; SCK has a period of 2 x CLK_DIV throughout the transfer. The prefix and dummy phases are still single transfer rate.
41622
41623                            If the suffix is quad-width, it must be 0 or 8 bits in length, to ensure an even number of SCK edges.</description>
41624                        <bitRange>[28:28]</bitRange>
41625                        <access>read-write</access>
41626                    </field>
41627                    <field>
41628                        <name>DUMMY_LEN</name>
41629                        <description>Length of dummy phase between command suffix and data phase, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)</description>
41630                        <bitRange>[18:16]</bitRange>
41631                        <access>read-write</access>
41632                        <enumeratedValues>
41633                            <enumeratedValue>
41634                                <name>NONE</name>
41635                                <value>0</value>
41636                                <description>No dummy phase</description>
41637                            </enumeratedValue>
41638                            <enumeratedValue>
41639                                <name>4</name>
41640                                <value>1</value>
41641                                <description>4 dummy bits</description>
41642                            </enumeratedValue>
41643                            <enumeratedValue>
41644                                <name>8</name>
41645                                <value>2</value>
41646                                <description>8 dummy bits</description>
41647                            </enumeratedValue>
41648                            <enumeratedValue>
41649                                <name>12</name>
41650                                <value>3</value>
41651                                <description>12 dummy bits</description>
41652                            </enumeratedValue>
41653                            <enumeratedValue>
41654                                <name>16</name>
41655                                <value>4</value>
41656                                <description>16 dummy bits</description>
41657                            </enumeratedValue>
41658                            <enumeratedValue>
41659                                <name>20</name>
41660                                <value>5</value>
41661                                <description>20 dummy bits</description>
41662                            </enumeratedValue>
41663                            <enumeratedValue>
41664                                <name>24</name>
41665                                <value>6</value>
41666                                <description>24 dummy bits</description>
41667                            </enumeratedValue>
41668                            <enumeratedValue>
41669                                <name>28</name>
41670                                <value>7</value>
41671                                <description>28 dummy bits</description>
41672                            </enumeratedValue>
41673                        </enumeratedValues>
41674                    </field>
41675                    <field>
41676                        <name>SUFFIX_LEN</name>
41677                        <description>Length of post-address command suffix, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)
41678
41679                            Only values of 0 and 8 bits are supported.</description>
41680                        <bitRange>[15:14]</bitRange>
41681                        <access>read-write</access>
41682                        <enumeratedValues>
41683                            <enumeratedValue>
41684                                <name>NONE</name>
41685                                <value>0</value>
41686                                <description>No suffix</description>
41687                            </enumeratedValue>
41688                            <enumeratedValue>
41689                                <name>8</name>
41690                                <value>2</value>
41691                                <description>8-bit suffix</description>
41692                            </enumeratedValue>
41693                        </enumeratedValues>
41694                    </field>
41695                    <field>
41696                        <name>PREFIX_LEN</name>
41697                        <description>Length of command prefix, in units of 8 bits. (i.e. 2 cycles for quad width, 4 for dual, 8 for single)</description>
41698                        <bitRange>[12:12]</bitRange>
41699                        <access>read-write</access>
41700                        <enumeratedValues>
41701                            <enumeratedValue>
41702                                <name>NONE</name>
41703                                <value>0</value>
41704                                <description>No prefix</description>
41705                            </enumeratedValue>
41706                            <enumeratedValue>
41707                                <name>8</name>
41708                                <value>1</value>
41709                                <description>8-bit prefix</description>
41710                            </enumeratedValue>
41711                        </enumeratedValues>
41712                    </field>
41713                    <field>
41714                        <name>DATA_WIDTH</name>
41715                        <description>The width used for the data transfer</description>
41716                        <bitRange>[9:8]</bitRange>
41717                        <access>read-write</access>
41718                        <enumeratedValues>
41719                            <enumeratedValue>
41720                                <name>S</name>
41721                                <value>0</value>
41722                                <description>Single width</description>
41723                            </enumeratedValue>
41724                            <enumeratedValue>
41725                                <name>D</name>
41726                                <value>1</value>
41727                                <description>Dual width</description>
41728                            </enumeratedValue>
41729                            <enumeratedValue>
41730                                <name>Q</name>
41731                                <value>2</value>
41732                                <description>Quad width</description>
41733                            </enumeratedValue>
41734                        </enumeratedValues>
41735                    </field>
41736                    <field>
41737                        <name>DUMMY_WIDTH</name>
41738                        <description>The width used for the dummy phase, if any.
41739
41740                            If width is single, SD0/MOSI is held asserted low during the dummy phase, and SD1...SD3 are tristated. If width is dual/quad, all IOs are tristated during the dummy phase.</description>
41741                        <bitRange>[7:6]</bitRange>
41742                        <access>read-write</access>
41743                        <enumeratedValues>
41744                            <enumeratedValue>
41745                                <name>S</name>
41746                                <value>0</value>
41747                                <description>Single width</description>
41748                            </enumeratedValue>
41749                            <enumeratedValue>
41750                                <name>D</name>
41751                                <value>1</value>
41752                                <description>Dual width</description>
41753                            </enumeratedValue>
41754                            <enumeratedValue>
41755                                <name>Q</name>
41756                                <value>2</value>
41757                                <description>Quad width</description>
41758                            </enumeratedValue>
41759                        </enumeratedValues>
41760                    </field>
41761                    <field>
41762                        <name>SUFFIX_WIDTH</name>
41763                        <description>The width used for the post-address command suffix, if any</description>
41764                        <bitRange>[5:4]</bitRange>
41765                        <access>read-write</access>
41766                        <enumeratedValues>
41767                            <enumeratedValue>
41768                                <name>S</name>
41769                                <value>0</value>
41770                                <description>Single width</description>
41771                            </enumeratedValue>
41772                            <enumeratedValue>
41773                                <name>D</name>
41774                                <value>1</value>
41775                                <description>Dual width</description>
41776                            </enumeratedValue>
41777                            <enumeratedValue>
41778                                <name>Q</name>
41779                                <value>2</value>
41780                                <description>Quad width</description>
41781                            </enumeratedValue>
41782                        </enumeratedValues>
41783                    </field>
41784                    <field>
41785                        <name>ADDR_WIDTH</name>
41786                        <description>The transfer width used for the address. The address phase always transfers 24 bits in total.</description>
41787                        <bitRange>[3:2]</bitRange>
41788                        <access>read-write</access>
41789                        <enumeratedValues>
41790                            <enumeratedValue>
41791                                <name>S</name>
41792                                <value>0</value>
41793                                <description>Single width</description>
41794                            </enumeratedValue>
41795                            <enumeratedValue>
41796                                <name>D</name>
41797                                <value>1</value>
41798                                <description>Dual width</description>
41799                            </enumeratedValue>
41800                            <enumeratedValue>
41801                                <name>Q</name>
41802                                <value>2</value>
41803                                <description>Quad width</description>
41804                            </enumeratedValue>
41805                        </enumeratedValues>
41806                    </field>
41807                    <field>
41808                        <name>PREFIX_WIDTH</name>
41809                        <description>The transfer width used for the command prefix, if any</description>
41810                        <bitRange>[1:0]</bitRange>
41811                        <access>read-write</access>
41812                        <enumeratedValues>
41813                            <enumeratedValue>
41814                                <name>S</name>
41815                                <value>0</value>
41816                                <description>Single width</description>
41817                            </enumeratedValue>
41818                            <enumeratedValue>
41819                                <name>D</name>
41820                                <value>1</value>
41821                                <description>Dual width</description>
41822                            </enumeratedValue>
41823                            <enumeratedValue>
41824                                <name>Q</name>
41825                                <value>2</value>
41826                                <description>Quad width</description>
41827                            </enumeratedValue>
41828                        </enumeratedValues>
41829                    </field>
41830                </fields>
41831            </register>
41832            <register>
41833                <name>M0_WCMD</name>
41834                <addressOffset>0x0000001c</addressOffset>
41835                <description>Command constants used for writes to memory address window 0.
41836
41837                    The reset value of the M0_WCMD register is configured to support a basic 02h serial write transfer with no additional configuration.</description>
41838                <resetValue>0x0000a002</resetValue>
41839                <fields>
41840                    <field>
41841                        <name>SUFFIX</name>
41842                        <description>The command suffix bits following the address, if Mx_WFMT_SUFFIX_LEN is nonzero.</description>
41843                        <bitRange>[15:8]</bitRange>
41844                        <access>read-write</access>
41845                    </field>
41846                    <field>
41847                        <name>PREFIX</name>
41848                        <description>The command prefix bits to prepend on each new transfer, if Mx_WFMT_PREFIX_LEN is nonzero.</description>
41849                        <bitRange>[7:0]</bitRange>
41850                        <access>read-write</access>
41851                    </field>
41852                </fields>
41853            </register>
41854            <register>
41855                <name>M1_TIMING</name>
41856                <addressOffset>0x00000020</addressOffset>
41857                <description>Timing configuration register for memory address window 1.</description>
41858                <resetValue>0x40000004</resetValue>
41859                <fields>
41860                    <field>
41861                        <name>COOLDOWN</name>
41862                        <description>Chip select cooldown period. When a memory transfer finishes, the chip select remains asserted for 64 x COOLDOWN system clock cycles, plus half an SCK clock period (rounded up for odd SCK divisors). After this cooldown expires, the chip select is always deasserted to save power.
41863
41864                            If the next memory access arrives within the cooldown period, the QMI may be able to append more SCK cycles to the currently ongoing SPI transfer, rather than starting a new transfer. This reduces access latency and increases bus throughput.
41865
41866                            Specifically, the next access must be in the same direction (read/write), access the same memory window (chip select 0/1), and follow sequentially the address of the last transfer. If any of these are false, the new access will first deassert the chip select, then begin a new transfer.
41867
41868                            If COOLDOWN is 0, the address alignment configured by PAGEBREAK has been reached, or the total chip select assertion limit MAX_SELECT has been reached, the cooldown period is skipped, and the chip select will always be deasserted one half SCK period after the transfer finishes.</description>
41869                        <bitRange>[31:30]</bitRange>
41870                        <access>read-write</access>
41871                    </field>
41872                    <field>
41873                        <name>PAGEBREAK</name>
41874                        <description>When page break is enabled, chip select will automatically deassert when crossing certain power-of-2-aligned address boundaries. The next access will always begin a new read/write SPI burst, even if the address of the next access follows in sequence with the last access before the page boundary.
41875
41876                            Some flash and PSRAM devices forbid crossing page boundaries with a single read/write transfer, or restrict the operating frequency for transfers that do cross page a boundary. This option allows the QMI to safely support those devices.
41877
41878                            This field has no effect when COOLDOWN is disabled.</description>
41879                        <bitRange>[29:28]</bitRange>
41880                        <access>read-write</access>
41881                        <enumeratedValues>
41882                            <enumeratedValue>
41883                                <name>NONE</name>
41884                                <value>0</value>
41885                                <description>No page boundary is enforced</description>
41886                            </enumeratedValue>
41887                            <enumeratedValue>
41888                                <name>256</name>
41889                                <value>1</value>
41890                                <description>Break bursts crossing a 256-byte page boundary</description>
41891                            </enumeratedValue>
41892                            <enumeratedValue>
41893                                <name>1024</name>
41894                                <value>2</value>
41895                                <description>Break bursts crossing a 1024-byte quad-page boundary</description>
41896                            </enumeratedValue>
41897                            <enumeratedValue>
41898                                <name>4096</name>
41899                                <value>3</value>
41900                                <description>Break bursts crossing a 4096-byte sector boundary</description>
41901                            </enumeratedValue>
41902                        </enumeratedValues>
41903                    </field>
41904                    <field>
41905                        <name>SELECT_SETUP</name>
41906                        <description>Add up to one additional system clock cycle of setup between chip select assertion and the first rising edge of SCK.
41907
41908                            The default setup time is one half SCK period, which is usually sufficient except for very high SCK frequencies with some flash devices.</description>
41909                        <bitRange>[25:25]</bitRange>
41910                        <access>read-write</access>
41911                    </field>
41912                    <field>
41913                        <name>SELECT_HOLD</name>
41914                        <description>Add up to three additional system clock cycles of active hold between the last falling edge of SCK and the deassertion of this window&#39;s chip select.
41915
41916                            The default hold time is one system clock cycle. Note that flash datasheets usually give chip select active hold time from the last *rising* edge of SCK, and so even zero hold from the last falling edge would be safe.
41917
41918                            Note that this is a minimum hold time guaranteed by the QMI: the actual chip select active hold may be slightly longer for read transfers with low clock divisors and/or high sample delays. Specifically, if the point two cycles after the last RX data sample is later than the last SCK falling edge, then the hold time is measured from *this* point.
41919
41920                            Note also that, in case the final SCK pulse is masked to save energy (true for non-DTR reads when COOLDOWN is disabled or PAGE_BREAK is reached), all of QMI&#39;s timing logic behaves as though the clock pulse were still present. The SELECT_HOLD time is applied from the point where the last SCK falling edge would be if the clock pulse were not masked.</description>
41921                        <bitRange>[24:23]</bitRange>
41922                        <access>read-write</access>
41923                    </field>
41924                    <field>
41925                        <name>MAX_SELECT</name>
41926                        <description>Enforce a maximum assertion duration for this window&#39;s chip select, in units of 64 system clock cycles. If 0, the QMI is permitted to keep the chip select asserted indefinitely when servicing sequential memory accesses (see COOLDOWN).
41927
41928                            This feature is required to meet timing constraints of PSRAM devices, which specify a maximum chip select assertion so they can perform DRAM refresh cycles. See also MIN_DESELECT, which can enforce a minimum deselect time.
41929
41930                            If a memory access is in progress at the time MAX_SELECT is reached, the QMI will wait for the access to complete before deasserting the chip select. This additional time must be accounted for to calculate a safe MAX_SELECT value. In the worst case, this may be a fully-formed serial transfer, including command prefix and address, with a data payload as large as one cache line.</description>
41931                        <bitRange>[22:17]</bitRange>
41932                        <access>read-write</access>
41933                    </field>
41934                    <field>
41935                        <name>MIN_DESELECT</name>
41936                        <description>After this window&#39;s chip select is deasserted, it remains deasserted for half an SCK cycle (rounded up to an integer number of system clock cycles), plus MIN_DESELECT additional system clock cycles, before the QMI reasserts either chip select pin.
41937
41938                            Nonzero values may be required for PSRAM devices which enforce a longer minimum CS deselect time, so that they can perform internal DRAM refresh cycles whilst deselected.</description>
41939                        <bitRange>[16:12]</bitRange>
41940                        <access>read-write</access>
41941                    </field>
41942                    <field>
41943                        <name>RXDELAY</name>
41944                        <description>Delay the read data sample timing, in units of one half of a system clock cycle. (Not necessarily half of an SCK cycle.) An RXDELAY of 0 means the sample is captured at the SDI input registers simultaneously with the rising edge of SCK launched from the SCK output register.
41945
41946                            At higher SCK frequencies, RXDELAY may need to be increased to account for the round trip delay of the pads, and the clock-to-Q delay of the QSPI memory device.</description>
41947                        <bitRange>[10:8]</bitRange>
41948                        <access>read-write</access>
41949                    </field>
41950                    <field>
41951                        <name>CLKDIV</name>
41952                        <description>Clock divisor. Odd and even divisors are supported. Defines the SCK clock period in units of 1 system clock cycle. Divisors 1..255 are encoded directly, and a divisor of 256 is encoded with a value of CLKDIV=0.
41953
41954                            The clock divisor can be changed on-the-fly, even when the QMI is currently accessing memory in this address window. All other parameters must only be changed when the QMI is idle.
41955
41956                            If software is increasing CLKDIV in anticipation of an increase in the system clock frequency, a dummy access to either memory window (and appropriate processor barriers/fences) must be inserted after the Mx_TIMING write to ensure the SCK divisor change is in effect _before_ the system clock is changed.</description>
41957                        <bitRange>[7:0]</bitRange>
41958                        <access>read-write</access>
41959                    </field>
41960                </fields>
41961            </register>
41962            <register>
41963                <name>M1_RFMT</name>
41964                <addressOffset>0x00000024</addressOffset>
41965                <description>Read transfer format configuration for memory address window 1.
41966
41967                    Configure the bus width of each transfer phase individually, and configure the length or presence of the command prefix, command suffix and dummy/turnaround transfer phases. Only 24-bit addresses are supported.
41968
41969                    The reset value of the M1_RFMT register is configured to support a basic 03h serial read transfer with no additional configuration.</description>
41970                <resetValue>0x00001000</resetValue>
41971                <fields>
41972                    <field>
41973                        <name>DTR</name>
41974                        <description>Enable double transfer rate (DTR) for read commands: address, suffix and read data phases are active on both edges of SCK. SDO data is launched centre-aligned on each SCK edge, and SDI data is captured on the SCK edge that follows its launch.
41975
41976                            DTR is implemented by halving the clock rate; SCK has a period of 2 x CLK_DIV throughout the transfer. The prefix and dummy phases are still single transfer rate.
41977
41978                            If the suffix is quad-width, it must be 0 or 8 bits in length, to ensure an even number of SCK edges.</description>
41979                        <bitRange>[28:28]</bitRange>
41980                        <access>read-write</access>
41981                    </field>
41982                    <field>
41983                        <name>DUMMY_LEN</name>
41984                        <description>Length of dummy phase between command suffix and data phase, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)</description>
41985                        <bitRange>[18:16]</bitRange>
41986                        <access>read-write</access>
41987                        <enumeratedValues>
41988                            <enumeratedValue>
41989                                <name>NONE</name>
41990                                <value>0</value>
41991                                <description>No dummy phase</description>
41992                            </enumeratedValue>
41993                            <enumeratedValue>
41994                                <name>4</name>
41995                                <value>1</value>
41996                                <description>4 dummy bits</description>
41997                            </enumeratedValue>
41998                            <enumeratedValue>
41999                                <name>8</name>
42000                                <value>2</value>
42001                                <description>8 dummy bits</description>
42002                            </enumeratedValue>
42003                            <enumeratedValue>
42004                                <name>12</name>
42005                                <value>3</value>
42006                                <description>12 dummy bits</description>
42007                            </enumeratedValue>
42008                            <enumeratedValue>
42009                                <name>16</name>
42010                                <value>4</value>
42011                                <description>16 dummy bits</description>
42012                            </enumeratedValue>
42013                            <enumeratedValue>
42014                                <name>20</name>
42015                                <value>5</value>
42016                                <description>20 dummy bits</description>
42017                            </enumeratedValue>
42018                            <enumeratedValue>
42019                                <name>24</name>
42020                                <value>6</value>
42021                                <description>24 dummy bits</description>
42022                            </enumeratedValue>
42023                            <enumeratedValue>
42024                                <name>28</name>
42025                                <value>7</value>
42026                                <description>28 dummy bits</description>
42027                            </enumeratedValue>
42028                        </enumeratedValues>
42029                    </field>
42030                    <field>
42031                        <name>SUFFIX_LEN</name>
42032                        <description>Length of post-address command suffix, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)
42033
42034                            Only values of 0 and 8 bits are supported.</description>
42035                        <bitRange>[15:14]</bitRange>
42036                        <access>read-write</access>
42037                        <enumeratedValues>
42038                            <enumeratedValue>
42039                                <name>NONE</name>
42040                                <value>0</value>
42041                                <description>No suffix</description>
42042                            </enumeratedValue>
42043                            <enumeratedValue>
42044                                <name>8</name>
42045                                <value>2</value>
42046                                <description>8-bit suffix</description>
42047                            </enumeratedValue>
42048                        </enumeratedValues>
42049                    </field>
42050                    <field>
42051                        <name>PREFIX_LEN</name>
42052                        <description>Length of command prefix, in units of 8 bits. (i.e. 2 cycles for quad width, 4 for dual, 8 for single)</description>
42053                        <bitRange>[12:12]</bitRange>
42054                        <access>read-write</access>
42055                        <enumeratedValues>
42056                            <enumeratedValue>
42057                                <name>NONE</name>
42058                                <value>0</value>
42059                                <description>No prefix</description>
42060                            </enumeratedValue>
42061                            <enumeratedValue>
42062                                <name>8</name>
42063                                <value>1</value>
42064                                <description>8-bit prefix</description>
42065                            </enumeratedValue>
42066                        </enumeratedValues>
42067                    </field>
42068                    <field>
42069                        <name>DATA_WIDTH</name>
42070                        <description>The width used for the data transfer</description>
42071                        <bitRange>[9:8]</bitRange>
42072                        <access>read-write</access>
42073                        <enumeratedValues>
42074                            <enumeratedValue>
42075                                <name>S</name>
42076                                <value>0</value>
42077                                <description>Single width</description>
42078                            </enumeratedValue>
42079                            <enumeratedValue>
42080                                <name>D</name>
42081                                <value>1</value>
42082                                <description>Dual width</description>
42083                            </enumeratedValue>
42084                            <enumeratedValue>
42085                                <name>Q</name>
42086                                <value>2</value>
42087                                <description>Quad width</description>
42088                            </enumeratedValue>
42089                        </enumeratedValues>
42090                    </field>
42091                    <field>
42092                        <name>DUMMY_WIDTH</name>
42093                        <description>The width used for the dummy phase, if any.
42094
42095                            If width is single, SD0/MOSI is held asserted low during the dummy phase, and SD1...SD3 are tristated. If width is dual/quad, all IOs are tristated during the dummy phase.</description>
42096                        <bitRange>[7:6]</bitRange>
42097                        <access>read-write</access>
42098                        <enumeratedValues>
42099                            <enumeratedValue>
42100                                <name>S</name>
42101                                <value>0</value>
42102                                <description>Single width</description>
42103                            </enumeratedValue>
42104                            <enumeratedValue>
42105                                <name>D</name>
42106                                <value>1</value>
42107                                <description>Dual width</description>
42108                            </enumeratedValue>
42109                            <enumeratedValue>
42110                                <name>Q</name>
42111                                <value>2</value>
42112                                <description>Quad width</description>
42113                            </enumeratedValue>
42114                        </enumeratedValues>
42115                    </field>
42116                    <field>
42117                        <name>SUFFIX_WIDTH</name>
42118                        <description>The width used for the post-address command suffix, if any</description>
42119                        <bitRange>[5:4]</bitRange>
42120                        <access>read-write</access>
42121                        <enumeratedValues>
42122                            <enumeratedValue>
42123                                <name>S</name>
42124                                <value>0</value>
42125                                <description>Single width</description>
42126                            </enumeratedValue>
42127                            <enumeratedValue>
42128                                <name>D</name>
42129                                <value>1</value>
42130                                <description>Dual width</description>
42131                            </enumeratedValue>
42132                            <enumeratedValue>
42133                                <name>Q</name>
42134                                <value>2</value>
42135                                <description>Quad width</description>
42136                            </enumeratedValue>
42137                        </enumeratedValues>
42138                    </field>
42139                    <field>
42140                        <name>ADDR_WIDTH</name>
42141                        <description>The transfer width used for the address. The address phase always transfers 24 bits in total.</description>
42142                        <bitRange>[3:2]</bitRange>
42143                        <access>read-write</access>
42144                        <enumeratedValues>
42145                            <enumeratedValue>
42146                                <name>S</name>
42147                                <value>0</value>
42148                                <description>Single width</description>
42149                            </enumeratedValue>
42150                            <enumeratedValue>
42151                                <name>D</name>
42152                                <value>1</value>
42153                                <description>Dual width</description>
42154                            </enumeratedValue>
42155                            <enumeratedValue>
42156                                <name>Q</name>
42157                                <value>2</value>
42158                                <description>Quad width</description>
42159                            </enumeratedValue>
42160                        </enumeratedValues>
42161                    </field>
42162                    <field>
42163                        <name>PREFIX_WIDTH</name>
42164                        <description>The transfer width used for the command prefix, if any</description>
42165                        <bitRange>[1:0]</bitRange>
42166                        <access>read-write</access>
42167                        <enumeratedValues>
42168                            <enumeratedValue>
42169                                <name>S</name>
42170                                <value>0</value>
42171                                <description>Single width</description>
42172                            </enumeratedValue>
42173                            <enumeratedValue>
42174                                <name>D</name>
42175                                <value>1</value>
42176                                <description>Dual width</description>
42177                            </enumeratedValue>
42178                            <enumeratedValue>
42179                                <name>Q</name>
42180                                <value>2</value>
42181                                <description>Quad width</description>
42182                            </enumeratedValue>
42183                        </enumeratedValues>
42184                    </field>
42185                </fields>
42186            </register>
42187            <register>
42188                <name>M1_RCMD</name>
42189                <addressOffset>0x00000028</addressOffset>
42190                <description>Command constants used for reads from memory address window 1.
42191
42192                    The reset value of the M1_RCMD register is configured to support a basic 03h serial read transfer with no additional configuration.</description>
42193                <resetValue>0x0000a003</resetValue>
42194                <fields>
42195                    <field>
42196                        <name>SUFFIX</name>
42197                        <description>The command suffix bits following the address, if Mx_RFMT_SUFFIX_LEN is nonzero.</description>
42198                        <bitRange>[15:8]</bitRange>
42199                        <access>read-write</access>
42200                    </field>
42201                    <field>
42202                        <name>PREFIX</name>
42203                        <description>The command prefix bits to prepend on each new transfer, if Mx_RFMT_PREFIX_LEN is nonzero.</description>
42204                        <bitRange>[7:0]</bitRange>
42205                        <access>read-write</access>
42206                    </field>
42207                </fields>
42208            </register>
42209            <register>
42210                <name>M1_WFMT</name>
42211                <addressOffset>0x0000002c</addressOffset>
42212                <description>Write transfer format configuration for memory address window 1.
42213
42214                    Configure the bus width of each transfer phase individually, and configure the length or presence of the command prefix, command suffix and dummy/turnaround transfer phases. Only 24-bit addresses are supported.
42215
42216                    The reset value of the M1_WFMT register is configured to support a basic 02h serial write transfer. However, writes to this window must first be enabled via the XIP_CTRL_WRITABLE_M1 bit, as XIP memory is read-only by default.</description>
42217                <resetValue>0x00001000</resetValue>
42218                <fields>
42219                    <field>
42220                        <name>DTR</name>
42221                        <description>Enable double transfer rate (DTR) for write commands: address, suffix and write data phases are active on both edges of SCK. SDO data is launched centre-aligned on each SCK edge, and SDI data is captured on the SCK edge that follows its launch.
42222
42223                            DTR is implemented by halving the clock rate; SCK has a period of 2 x CLK_DIV throughout the transfer. The prefix and dummy phases are still single transfer rate.
42224
42225                            If the suffix is quad-width, it must be 0 or 8 bits in length, to ensure an even number of SCK edges.</description>
42226                        <bitRange>[28:28]</bitRange>
42227                        <access>read-write</access>
42228                    </field>
42229                    <field>
42230                        <name>DUMMY_LEN</name>
42231                        <description>Length of dummy phase between command suffix and data phase, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)</description>
42232                        <bitRange>[18:16]</bitRange>
42233                        <access>read-write</access>
42234                        <enumeratedValues>
42235                            <enumeratedValue>
42236                                <name>NONE</name>
42237                                <value>0</value>
42238                                <description>No dummy phase</description>
42239                            </enumeratedValue>
42240                            <enumeratedValue>
42241                                <name>4</name>
42242                                <value>1</value>
42243                                <description>4 dummy bits</description>
42244                            </enumeratedValue>
42245                            <enumeratedValue>
42246                                <name>8</name>
42247                                <value>2</value>
42248                                <description>8 dummy bits</description>
42249                            </enumeratedValue>
42250                            <enumeratedValue>
42251                                <name>12</name>
42252                                <value>3</value>
42253                                <description>12 dummy bits</description>
42254                            </enumeratedValue>
42255                            <enumeratedValue>
42256                                <name>16</name>
42257                                <value>4</value>
42258                                <description>16 dummy bits</description>
42259                            </enumeratedValue>
42260                            <enumeratedValue>
42261                                <name>20</name>
42262                                <value>5</value>
42263                                <description>20 dummy bits</description>
42264                            </enumeratedValue>
42265                            <enumeratedValue>
42266                                <name>24</name>
42267                                <value>6</value>
42268                                <description>24 dummy bits</description>
42269                            </enumeratedValue>
42270                            <enumeratedValue>
42271                                <name>28</name>
42272                                <value>7</value>
42273                                <description>28 dummy bits</description>
42274                            </enumeratedValue>
42275                        </enumeratedValues>
42276                    </field>
42277                    <field>
42278                        <name>SUFFIX_LEN</name>
42279                        <description>Length of post-address command suffix, in units of 4 bits. (i.e. 1 cycle for quad width, 2 for dual, 4 for single)
42280
42281                            Only values of 0 and 8 bits are supported.</description>
42282                        <bitRange>[15:14]</bitRange>
42283                        <access>read-write</access>
42284                        <enumeratedValues>
42285                            <enumeratedValue>
42286                                <name>NONE</name>
42287                                <value>0</value>
42288                                <description>No suffix</description>
42289                            </enumeratedValue>
42290                            <enumeratedValue>
42291                                <name>8</name>
42292                                <value>2</value>
42293                                <description>8-bit suffix</description>
42294                            </enumeratedValue>
42295                        </enumeratedValues>
42296                    </field>
42297                    <field>
42298                        <name>PREFIX_LEN</name>
42299                        <description>Length of command prefix, in units of 8 bits. (i.e. 2 cycles for quad width, 4 for dual, 8 for single)</description>
42300                        <bitRange>[12:12]</bitRange>
42301                        <access>read-write</access>
42302                        <enumeratedValues>
42303                            <enumeratedValue>
42304                                <name>NONE</name>
42305                                <value>0</value>
42306                                <description>No prefix</description>
42307                            </enumeratedValue>
42308                            <enumeratedValue>
42309                                <name>8</name>
42310                                <value>1</value>
42311                                <description>8-bit prefix</description>
42312                            </enumeratedValue>
42313                        </enumeratedValues>
42314                    </field>
42315                    <field>
42316                        <name>DATA_WIDTH</name>
42317                        <description>The width used for the data transfer</description>
42318                        <bitRange>[9:8]</bitRange>
42319                        <access>read-write</access>
42320                        <enumeratedValues>
42321                            <enumeratedValue>
42322                                <name>S</name>
42323                                <value>0</value>
42324                                <description>Single width</description>
42325                            </enumeratedValue>
42326                            <enumeratedValue>
42327                                <name>D</name>
42328                                <value>1</value>
42329                                <description>Dual width</description>
42330                            </enumeratedValue>
42331                            <enumeratedValue>
42332                                <name>Q</name>
42333                                <value>2</value>
42334                                <description>Quad width</description>
42335                            </enumeratedValue>
42336                        </enumeratedValues>
42337                    </field>
42338                    <field>
42339                        <name>DUMMY_WIDTH</name>
42340                        <description>The width used for the dummy phase, if any.
42341
42342                            If width is single, SD0/MOSI is held asserted low during the dummy phase, and SD1...SD3 are tristated. If width is dual/quad, all IOs are tristated during the dummy phase.</description>
42343                        <bitRange>[7:6]</bitRange>
42344                        <access>read-write</access>
42345                        <enumeratedValues>
42346                            <enumeratedValue>
42347                                <name>S</name>
42348                                <value>0</value>
42349                                <description>Single width</description>
42350                            </enumeratedValue>
42351                            <enumeratedValue>
42352                                <name>D</name>
42353                                <value>1</value>
42354                                <description>Dual width</description>
42355                            </enumeratedValue>
42356                            <enumeratedValue>
42357                                <name>Q</name>
42358                                <value>2</value>
42359                                <description>Quad width</description>
42360                            </enumeratedValue>
42361                        </enumeratedValues>
42362                    </field>
42363                    <field>
42364                        <name>SUFFIX_WIDTH</name>
42365                        <description>The width used for the post-address command suffix, if any</description>
42366                        <bitRange>[5:4]</bitRange>
42367                        <access>read-write</access>
42368                        <enumeratedValues>
42369                            <enumeratedValue>
42370                                <name>S</name>
42371                                <value>0</value>
42372                                <description>Single width</description>
42373                            </enumeratedValue>
42374                            <enumeratedValue>
42375                                <name>D</name>
42376                                <value>1</value>
42377                                <description>Dual width</description>
42378                            </enumeratedValue>
42379                            <enumeratedValue>
42380                                <name>Q</name>
42381                                <value>2</value>
42382                                <description>Quad width</description>
42383                            </enumeratedValue>
42384                        </enumeratedValues>
42385                    </field>
42386                    <field>
42387                        <name>ADDR_WIDTH</name>
42388                        <description>The transfer width used for the address. The address phase always transfers 24 bits in total.</description>
42389                        <bitRange>[3:2]</bitRange>
42390                        <access>read-write</access>
42391                        <enumeratedValues>
42392                            <enumeratedValue>
42393                                <name>S</name>
42394                                <value>0</value>
42395                                <description>Single width</description>
42396                            </enumeratedValue>
42397                            <enumeratedValue>
42398                                <name>D</name>
42399                                <value>1</value>
42400                                <description>Dual width</description>
42401                            </enumeratedValue>
42402                            <enumeratedValue>
42403                                <name>Q</name>
42404                                <value>2</value>
42405                                <description>Quad width</description>
42406                            </enumeratedValue>
42407                        </enumeratedValues>
42408                    </field>
42409                    <field>
42410                        <name>PREFIX_WIDTH</name>
42411                        <description>The transfer width used for the command prefix, if any</description>
42412                        <bitRange>[1:0]</bitRange>
42413                        <access>read-write</access>
42414                        <enumeratedValues>
42415                            <enumeratedValue>
42416                                <name>S</name>
42417                                <value>0</value>
42418                                <description>Single width</description>
42419                            </enumeratedValue>
42420                            <enumeratedValue>
42421                                <name>D</name>
42422                                <value>1</value>
42423                                <description>Dual width</description>
42424                            </enumeratedValue>
42425                            <enumeratedValue>
42426                                <name>Q</name>
42427                                <value>2</value>
42428                                <description>Quad width</description>
42429                            </enumeratedValue>
42430                        </enumeratedValues>
42431                    </field>
42432                </fields>
42433            </register>
42434            <register>
42435                <name>M1_WCMD</name>
42436                <addressOffset>0x00000030</addressOffset>
42437                <description>Command constants used for writes to memory address window 1.
42438
42439                    The reset value of the M1_WCMD register is configured to support a basic 02h serial write transfer with no additional configuration.</description>
42440                <resetValue>0x0000a002</resetValue>
42441                <fields>
42442                    <field>
42443                        <name>SUFFIX</name>
42444                        <description>The command suffix bits following the address, if Mx_WFMT_SUFFIX_LEN is nonzero.</description>
42445                        <bitRange>[15:8]</bitRange>
42446                        <access>read-write</access>
42447                    </field>
42448                    <field>
42449                        <name>PREFIX</name>
42450                        <description>The command prefix bits to prepend on each new transfer, if Mx_WFMT_PREFIX_LEN is nonzero.</description>
42451                        <bitRange>[7:0]</bitRange>
42452                        <access>read-write</access>
42453                    </field>
42454                </fields>
42455            </register>
42456            <register>
42457                <name>ATRANS0</name>
42458                <addressOffset>0x00000034</addressOffset>
42459                <description>Configure address translation for XIP virtual addresses 0x000000 through 0x3fffff (a 4 MiB window starting at +0 MiB).
42460
42461                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42462
42463                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42464
42465                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42466                <resetValue>0x04000000</resetValue>
42467                <fields>
42468                    <field>
42469                        <name>SIZE</name>
42470                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42471
42472                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42473                        <bitRange>[26:16]</bitRange>
42474                        <access>read-write</access>
42475                    </field>
42476                    <field>
42477                        <name>BASE</name>
42478                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42479
42480                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42481                        <bitRange>[11:0]</bitRange>
42482                        <access>read-write</access>
42483                    </field>
42484                </fields>
42485            </register>
42486            <register>
42487                <name>ATRANS1</name>
42488                <addressOffset>0x00000038</addressOffset>
42489                <description>Configure address translation for XIP virtual addresses 0x400000 through 0x7fffff (a 4 MiB window starting at +4 MiB).
42490
42491                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42492
42493                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42494
42495                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42496                <resetValue>0x04000400</resetValue>
42497                <fields>
42498                    <field>
42499                        <name>SIZE</name>
42500                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42501
42502                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42503                        <bitRange>[26:16]</bitRange>
42504                        <access>read-write</access>
42505                    </field>
42506                    <field>
42507                        <name>BASE</name>
42508                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42509
42510                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42511                        <bitRange>[11:0]</bitRange>
42512                        <access>read-write</access>
42513                    </field>
42514                </fields>
42515            </register>
42516            <register>
42517                <name>ATRANS2</name>
42518                <addressOffset>0x0000003c</addressOffset>
42519                <description>Configure address translation for XIP virtual addresses 0x800000 through 0xbfffff (a 4 MiB window starting at +8 MiB).
42520
42521                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42522
42523                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42524
42525                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42526                <resetValue>0x04000800</resetValue>
42527                <fields>
42528                    <field>
42529                        <name>SIZE</name>
42530                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42531
42532                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42533                        <bitRange>[26:16]</bitRange>
42534                        <access>read-write</access>
42535                    </field>
42536                    <field>
42537                        <name>BASE</name>
42538                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42539
42540                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42541                        <bitRange>[11:0]</bitRange>
42542                        <access>read-write</access>
42543                    </field>
42544                </fields>
42545            </register>
42546            <register>
42547                <name>ATRANS3</name>
42548                <addressOffset>0x00000040</addressOffset>
42549                <description>Configure address translation for XIP virtual addresses 0xc00000 through 0xffffff (a 4 MiB window starting at +12 MiB).
42550
42551                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42552
42553                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42554
42555                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42556                <resetValue>0x04000c00</resetValue>
42557                <fields>
42558                    <field>
42559                        <name>SIZE</name>
42560                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42561
42562                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42563                        <bitRange>[26:16]</bitRange>
42564                        <access>read-write</access>
42565                    </field>
42566                    <field>
42567                        <name>BASE</name>
42568                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42569
42570                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42571                        <bitRange>[11:0]</bitRange>
42572                        <access>read-write</access>
42573                    </field>
42574                </fields>
42575            </register>
42576            <register>
42577                <name>ATRANS4</name>
42578                <addressOffset>0x00000044</addressOffset>
42579                <description>Configure address translation for XIP virtual addresses 0x1000000 through 0x13fffff (a 4 MiB window starting at +16 MiB).
42580
42581                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42582
42583                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42584
42585                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42586                <resetValue>0x04000000</resetValue>
42587                <fields>
42588                    <field>
42589                        <name>SIZE</name>
42590                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42591
42592                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42593                        <bitRange>[26:16]</bitRange>
42594                        <access>read-write</access>
42595                    </field>
42596                    <field>
42597                        <name>BASE</name>
42598                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42599
42600                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42601                        <bitRange>[11:0]</bitRange>
42602                        <access>read-write</access>
42603                    </field>
42604                </fields>
42605            </register>
42606            <register>
42607                <name>ATRANS5</name>
42608                <addressOffset>0x00000048</addressOffset>
42609                <description>Configure address translation for XIP virtual addresses 0x1400000 through 0x17fffff (a 4 MiB window starting at +20 MiB).
42610
42611                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42612
42613                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42614
42615                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42616                <resetValue>0x04000400</resetValue>
42617                <fields>
42618                    <field>
42619                        <name>SIZE</name>
42620                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42621
42622                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42623                        <bitRange>[26:16]</bitRange>
42624                        <access>read-write</access>
42625                    </field>
42626                    <field>
42627                        <name>BASE</name>
42628                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42629
42630                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42631                        <bitRange>[11:0]</bitRange>
42632                        <access>read-write</access>
42633                    </field>
42634                </fields>
42635            </register>
42636            <register>
42637                <name>ATRANS6</name>
42638                <addressOffset>0x0000004c</addressOffset>
42639                <description>Configure address translation for XIP virtual addresses 0x1800000 through 0x1bfffff (a 4 MiB window starting at +24 MiB).
42640
42641                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42642
42643                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42644
42645                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42646                <resetValue>0x04000800</resetValue>
42647                <fields>
42648                    <field>
42649                        <name>SIZE</name>
42650                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42651
42652                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42653                        <bitRange>[26:16]</bitRange>
42654                        <access>read-write</access>
42655                    </field>
42656                    <field>
42657                        <name>BASE</name>
42658                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42659
42660                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42661                        <bitRange>[11:0]</bitRange>
42662                        <access>read-write</access>
42663                    </field>
42664                </fields>
42665            </register>
42666            <register>
42667                <name>ATRANS7</name>
42668                <addressOffset>0x00000050</addressOffset>
42669                <description>Configure address translation for XIP virtual addresses 0x1c00000 through 0x1ffffff (a 4 MiB window starting at +28 MiB).
42670
42671                    Address translation allows a program image to be executed in place at multiple physical flash addresses (for example, a double-buffered flash image for over-the-air updates), without the overhead of position-independent code.
42672
42673                    At reset, the address translation registers are initialised to an identity mapping, so that they can be ignored if address translation is not required.
42674
42675                    Note that the XIP cache is fully virtually addressed, so a cache flush is required after changing the address translation.</description>
42676                <resetValue>0x04000c00</resetValue>
42677                <fields>
42678                    <field>
42679                        <name>SIZE</name>
42680                        <description>Translation aperture size for this virtual address range, in units of 4 kiB (one flash sector).
42681
42682                            Bits 21:12 of the virtual address are compared to SIZE. Offsets greater than SIZE return a bus error, and do not cause a QSPI access.</description>
42683                        <bitRange>[26:16]</bitRange>
42684                        <access>read-write</access>
42685                    </field>
42686                    <field>
42687                        <name>BASE</name>
42688                        <description>Physical address base for this virtual address range, in units of 4 kiB (one flash sector).
42689
42690                            Taking a 24-bit virtual address, firstly bits 23:22 (the two MSBs) are masked to zero, and then BASE is added to bits 23:12 (the upper 12 bits) to form the physical address. Translation wraps on a 16 MiB boundary.</description>
42691                        <bitRange>[11:0]</bitRange>
42692                        <access>read-write</access>
42693                    </field>
42694                </fields>
42695            </register>
42696        </registers>
42697    </peripheral>
42698    <peripheral>
42699        <name>XIP_CTRL</name>
42700        <description>QSPI flash execute-in-place block</description>
42701        <baseAddress>0x400c8000</baseAddress>
42702        <addressBlock>
42703            <offset>0</offset>
42704            <size>32</size>
42705            <usage>registers</usage>
42706        </addressBlock>
42707        <registers>
42708            <register>
42709                <name>CTRL</name>
42710                <addressOffset>0x00000000</addressOffset>
42711                <description>Cache control register. Read-only from a Non-secure context.</description>
42712                <resetValue>0x00000083</resetValue>
42713                <fields>
42714                    <field>
42715                        <name>WRITABLE_M1</name>
42716                        <description>If 1, enable writes to XIP memory window 1 (addresses 0x11000000 through 0x11ffffff, and their uncached mirrors). If 0, this region is read-only.
42717
42718                            XIP memory is *read-only by default*. This bit must be set to enable writes if a RAM device is attached on QSPI chip select 1.
42719
42720                            The default read-only behaviour avoids two issues with writing to a read-only QSPI device (e.g. flash). First, a write will initially appear to succeed due to caching, but the data will eventually be lost when the written line is evicted, causing unpredictable behaviour.
42721
42722                            Second, when a written line is evicted, it will cause a write command to be issued to the flash, which can break the flash out of its continuous read mode. After this point, flash reads will return garbage. This is a security concern, as it allows Non-secure software to break Secure flash reads if it has permission to write to any flash address.
42723
42724                            Note the read-only behaviour is implemented by downgrading writes to reads, so writes will still cause allocation of an address, but have no other effect.</description>
42725                        <bitRange>[11:11]</bitRange>
42726                        <access>read-write</access>
42727                    </field>
42728                    <field>
42729                        <name>WRITABLE_M0</name>
42730                        <description>If 1, enable writes to XIP memory window 0 (addresses 0x10000000 through 0x10ffffff, and their uncached mirrors). If 0, this region is read-only.
42731
42732                            XIP memory is *read-only by default*. This bit must be set to enable writes if a RAM device is attached on QSPI chip select 0.
42733
42734                            The default read-only behaviour avoids two issues with writing to a read-only QSPI device (e.g. flash). First, a write will initially appear to succeed due to caching, but the data will eventually be lost when the written line is evicted, causing unpredictable behaviour.
42735
42736                            Second, when a written line is evicted, it will cause a write command to be issued to the flash, which can break the flash out of its continuous read mode. After this point, flash reads will return garbage. This is a security concern, as it allows Non-secure software to break Secure flash reads if it has permission to write to any flash address.
42737
42738                            Note the read-only behaviour is implemented by downgrading writes to reads, so writes will still cause allocation of an address, but have no other effect.</description>
42739                        <bitRange>[10:10]</bitRange>
42740                        <access>read-write</access>
42741                    </field>
42742                    <field>
42743                        <name>SPLIT_WAYS</name>
42744                        <description>When 1, route all cached+Secure accesses to way 0 of the cache, and route all cached+Non-secure accesses to way 1 of the cache.
42745
42746                            This partitions the cache into two half-sized direct-mapped regions, such that Non-secure code can not observe cache line state changes caused by Secure execution.
42747
42748                            A full cache flush is required when changing the value of SPLIT_WAYS. The flush should be performed whilst SPLIT_WAYS is 0, so that both cache ways are accessible for invalidation.</description>
42749                        <bitRange>[9:9]</bitRange>
42750                        <access>read-write</access>
42751                    </field>
42752                    <field>
42753                        <name>MAINT_NONSEC</name>
42754                        <description>When 0, Non-secure accesses to the cache maintenance address window (addr[27] == 1, addr[26] == 0) will generate a bus error. When 1, Non-secure accesses can perform cache maintenance operations by writing to the cache maintenance address window.
42755
42756                            Cache maintenance operations may be used to corrupt Secure data by invalidating cache lines inappropriately, or map Secure content into a Non-secure region by pinning cache lines. Therefore this bit should generally be set to 0, unless Secure code is not using the cache.
42757
42758                            Care should also be taken to clear the cache data memory and tag memory before granting maintenance operations to Non-secure code.</description>
42759                        <bitRange>[8:8]</bitRange>
42760                        <access>read-write</access>
42761                    </field>
42762                    <field>
42763                        <name>NO_UNTRANSLATED_NONSEC</name>
42764                        <description>When 1, Non-secure accesses to the uncached, untranslated window (addr[27:26] == 3) will generate a bus error.</description>
42765                        <bitRange>[7:7]</bitRange>
42766                        <access>read-write</access>
42767                    </field>
42768                    <field>
42769                        <name>NO_UNTRANSLATED_SEC</name>
42770                        <description>When 1, Secure accesses to the uncached, untranslated window (addr[27:26] == 3) will generate a bus error.</description>
42771                        <bitRange>[6:6]</bitRange>
42772                        <access>read-write</access>
42773                    </field>
42774                    <field>
42775                        <name>NO_UNCACHED_NONSEC</name>
42776                        <description>When 1, Non-secure accesses to the uncached window (addr[27:26] == 1) will generate a bus error. This may reduce the number of SAU/MPU/PMP regions required to protect flash contents.
42777
42778                            Note this does not disable access to the uncached, untranslated window -- see NO_UNTRANSLATED_SEC.</description>
42779                        <bitRange>[5:5]</bitRange>
42780                        <access>read-write</access>
42781                    </field>
42782                    <field>
42783                        <name>NO_UNCACHED_SEC</name>
42784                        <description>When 1, Secure accesses to the uncached window (addr[27:26] == 1) will generate a bus error. This may reduce the number of SAU/MPU/PMP regions required to protect flash contents.
42785
42786                            Note this does not disable access to the uncached, untranslated window -- see NO_UNTRANSLATED_SEC.</description>
42787                        <bitRange>[4:4]</bitRange>
42788                        <access>read-write</access>
42789                    </field>
42790                    <field>
42791                        <name>POWER_DOWN</name>
42792                        <description>When 1, the cache memories are powered down. They retain state, but can not be accessed. This reduces static power dissipation. Writing 1 to this bit forces CTRL_EN_SECURE and CTRL_EN_NONSECURE to 0, i.e. the cache cannot be enabled when powered down.</description>
42793                        <bitRange>[3:3]</bitRange>
42794                        <access>read-write</access>
42795                    </field>
42796                    <field>
42797                        <name>EN_NONSECURE</name>
42798                        <description>When 1, enable the cache for Non-secure accesses. When enabled, Non-secure XIP accesses to the cached (addr[26] == 0) window will query the cache, and QSPI accesses are performed only if the requested data is not present. When disabled, Secure access ignore the cache contents, and always access the QSPI interface.
42799
42800                            Accesses to the uncached (addr[26] == 1) window will never query the cache, irrespective of this bit.</description>
42801                        <bitRange>[1:1]</bitRange>
42802                        <access>read-write</access>
42803                    </field>
42804                    <field>
42805                        <name>EN_SECURE</name>
42806                        <description>When 1, enable the cache for Secure accesses. When enabled, Secure XIP accesses to the cached (addr[26] == 0) window will query the cache, and QSPI accesses are performed only if the requested data is not present. When disabled, Secure access ignore the cache contents, and always access the QSPI interface.
42807
42808                            Accesses to the uncached (addr[26] == 1) window will never query the cache, irrespective of this bit.
42809
42810                            There is no cache-as-SRAM address window. Cache lines are allocated for SRAM-like use by individually pinning them, and keeping the cache enabled.</description>
42811                        <bitRange>[0:0]</bitRange>
42812                        <access>read-write</access>
42813                    </field>
42814                </fields>
42815            </register>
42816            <register>
42817                <name>STAT</name>
42818                <addressOffset>0x00000008</addressOffset>
42819                <resetValue>0x00000002</resetValue>
42820                <fields>
42821                    <field>
42822                        <name>FIFO_FULL</name>
42823                        <description>When 1, indicates the XIP streaming FIFO is completely full.
42824                            The streaming FIFO is 2 entries deep, so the full and empty
42825                            flag allow its level to be ascertained.</description>
42826                        <bitRange>[2:2]</bitRange>
42827                        <access>read-only</access>
42828                    </field>
42829                    <field>
42830                        <name>FIFO_EMPTY</name>
42831                        <description>When 1, indicates the XIP streaming FIFO is completely empty.</description>
42832                        <bitRange>[1:1]</bitRange>
42833                        <access>read-only</access>
42834                    </field>
42835                </fields>
42836            </register>
42837            <register>
42838                <name>CTR_HIT</name>
42839                <addressOffset>0x0000000c</addressOffset>
42840                <description>Cache Hit counter</description>
42841                <resetValue>0x00000000</resetValue>
42842                <fields>
42843                    <field>
42844                        <name>CTR_HIT</name>
42845                        <description>A 32 bit saturating counter that increments upon each cache hit,
42846                            i.e. when an XIP access is serviced directly from cached data.
42847                            Write any value to clear.</description>
42848                        <bitRange>[31:0]</bitRange>
42849                        <access>read-write</access>
42850                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
42851                    </field>
42852                </fields>
42853            </register>
42854            <register>
42855                <name>CTR_ACC</name>
42856                <addressOffset>0x00000010</addressOffset>
42857                <description>Cache Access counter</description>
42858                <resetValue>0x00000000</resetValue>
42859                <fields>
42860                    <field>
42861                        <name>CTR_ACC</name>
42862                        <description>A 32 bit saturating counter that increments upon each XIP access,
42863                            whether the cache is hit or not. This includes noncacheable accesses.
42864                            Write any value to clear.</description>
42865                        <bitRange>[31:0]</bitRange>
42866                        <access>read-write</access>
42867                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
42868                    </field>
42869                </fields>
42870            </register>
42871            <register>
42872                <name>STREAM_ADDR</name>
42873                <addressOffset>0x00000014</addressOffset>
42874                <description>FIFO stream address</description>
42875                <resetValue>0x00000000</resetValue>
42876                <fields>
42877                    <field>
42878                        <name>STREAM_ADDR</name>
42879                        <description>The address of the next word to be streamed from flash to the streaming FIFO.
42880                            Increments automatically after each flash access.
42881                            Write the initial access address here before starting a streaming read.</description>
42882                        <bitRange>[31:2]</bitRange>
42883                        <access>read-write</access>
42884                    </field>
42885                </fields>
42886            </register>
42887            <register>
42888                <name>STREAM_CTR</name>
42889                <addressOffset>0x00000018</addressOffset>
42890                <description>FIFO stream control</description>
42891                <resetValue>0x00000000</resetValue>
42892                <fields>
42893                    <field>
42894                        <name>STREAM_CTR</name>
42895                        <description>Write a nonzero value to start a streaming read. This will then
42896                            progress in the background, using flash idle cycles to transfer
42897                            a linear data block from flash to the streaming FIFO.
42898                            Decrements automatically (1 at a time) as the stream
42899                            progresses, and halts on reaching 0.
42900                            Write 0 to halt an in-progress stream, and discard any in-flight
42901                            read, so that a new stream can immediately be started (after
42902                            draining the FIFO and reinitialising STREAM_ADDR)</description>
42903                        <bitRange>[21:0]</bitRange>
42904                        <access>read-write</access>
42905                    </field>
42906                </fields>
42907            </register>
42908            <register>
42909                <name>STREAM_FIFO</name>
42910                <addressOffset>0x0000001c</addressOffset>
42911                <description>FIFO stream data</description>
42912                <resetValue>0x00000000</resetValue>
42913                <fields>
42914                    <field>
42915                        <name>STREAM_FIFO</name>
42916                        <description>Streamed data is buffered here, for retrieval by the system DMA.
42917                            This FIFO can also be accessed via the XIP_AUX slave, to avoid exposing
42918                            the DMA to bus stalls caused by other XIP traffic.</description>
42919                        <bitRange>[31:0]</bitRange>
42920                        <access>read-only</access>
42921                        <readAction>modify</readAction>
42922                    </field>
42923                </fields>
42924            </register>
42925        </registers>
42926    </peripheral>
42927    <peripheral>
42928        <name>XIP_AUX</name>
42929        <description>Auxiliary DMA access to XIP FIFOs, via fast AHB bus access</description>
42930        <baseAddress>0x50500000</baseAddress>
42931        <addressBlock>
42932            <offset>0</offset>
42933            <size>12</size>
42934            <usage>registers</usage>
42935        </addressBlock>
42936        <registers>
42937            <register>
42938                <name>STREAM</name>
42939                <addressOffset>0x00000000</addressOffset>
42940                <description>Read the XIP stream FIFO (fast bus access to XIP_CTRL_STREAM_FIFO)</description>
42941                <resetValue>0x00000000</resetValue>
42942                <fields>
42943                    <field>
42944                        <name>STREAM</name>
42945                        <bitRange>[31:0]</bitRange>
42946                        <access>read-only</access>
42947                        <readAction>modify</readAction>
42948                    </field>
42949                </fields>
42950            </register>
42951            <register>
42952                <name>QMI_DIRECT_TX</name>
42953                <addressOffset>0x00000004</addressOffset>
42954                <description>Write to the QMI direct-mode TX FIFO (fast bus access to QMI_DIRECT_TX)</description>
42955                <resetValue>0x00000000</resetValue>
42956                <fields>
42957                    <field>
42958                        <name>NOPUSH</name>
42959                        <description>Inhibit the RX FIFO push that would correspond to this TX FIFO entry.
42960
42961                            Useful to avoid garbage appearing in the RX FIFO when pushing the command at the beginning of a SPI transfer.</description>
42962                        <bitRange>[20:20]</bitRange>
42963                        <access>write-only</access>
42964                    </field>
42965                    <field>
42966                        <name>OE</name>
42967                        <description>Output enable (active-high). For single width (SPI), this field is ignored, and SD0 is always set to output, with SD1 always set to input.
42968
42969                            For dual and quad width (DSPI/QSPI), this sets whether the relevant SDx pads are set to output whilst transferring this FIFO record. In this case the command/address should have OE set, and the data transfer should have OE set or clear depending on the direction of the transfer.</description>
42970                        <bitRange>[19:19]</bitRange>
42971                        <access>write-only</access>
42972                    </field>
42973                    <field>
42974                        <name>DWIDTH</name>
42975                        <description>Data width. If 0, hardware will transmit the 8 LSBs of the DIRECT_TX DATA field, and return an 8-bit value in the 8 LSBs of DIRECT_RX. If 1, the full 16-bit width is used. 8-bit and 16-bit transfers can be mixed freely.</description>
42976                        <bitRange>[18:18]</bitRange>
42977                        <access>write-only</access>
42978                    </field>
42979                    <field>
42980                        <name>IWIDTH</name>
42981                        <description>Configure whether this FIFO record is transferred with single/dual/quad interface width (0/1/2). Different widths can be mixed freely.</description>
42982                        <bitRange>[17:16]</bitRange>
42983                        <access>write-only</access>
42984                        <enumeratedValues>
42985                            <enumeratedValue>
42986                                <name>S</name>
42987                                <value>0</value>
42988                                <description>Single width</description>
42989                            </enumeratedValue>
42990                            <enumeratedValue>
42991                                <name>D</name>
42992                                <value>1</value>
42993                                <description>Dual width</description>
42994                            </enumeratedValue>
42995                            <enumeratedValue>
42996                                <name>Q</name>
42997                                <value>2</value>
42998                                <description>Quad width</description>
42999                            </enumeratedValue>
43000                        </enumeratedValues>
43001                    </field>
43002                    <field>
43003                        <name>DATA</name>
43004                        <description>Data pushed here will be clocked out falling edges of SCK (or before the very first rising edge of SCK, if this is the first pulse). For each byte clocked out, the interface will simultaneously sample one byte, on rising edges of SCK, and push this to the DIRECT_RX FIFO.
43005
43006                            For 16-bit data, the least-significant byte is transmitted first.</description>
43007                        <bitRange>[15:0]</bitRange>
43008                        <access>write-only</access>
43009                    </field>
43010                </fields>
43011            </register>
43012            <register>
43013                <name>QMI_DIRECT_RX</name>
43014                <addressOffset>0x00000008</addressOffset>
43015                <description>Read from the QMI direct-mode RX FIFO (fast bus access to QMI_DIRECT_RX)</description>
43016                <resetValue>0x00000000</resetValue>
43017                <fields>
43018                    <field>
43019                        <name>QMI_DIRECT_RX</name>
43020                        <description>With each byte clocked out on the serial interface, one byte will simultaneously be clocked in, and will appear in this FIFO. The serial interface will stall when this FIFO is full, to avoid dropping data.
43021
43022                            When 16-bit data is pushed into the TX FIFO, the corresponding RX FIFO push will also contain 16 bits of data. The least-significant byte is the first one received.</description>
43023                        <bitRange>[15:0]</bitRange>
43024                        <access>read-only</access>
43025                        <readAction>modify</readAction>
43026                    </field>
43027                </fields>
43028            </register>
43029        </registers>
43030    </peripheral>
43031    <peripheral>
43032        <name>SYSCFG</name>
43033        <description>Register block for various chip control signals</description>
43034        <baseAddress>0x40008000</baseAddress>
43035        <addressBlock>
43036            <offset>0</offset>
43037            <size>24</size>
43038            <usage>registers</usage>
43039        </addressBlock>
43040        <registers>
43041            <register>
43042                <name>PROC_CONFIG</name>
43043                <addressOffset>0x00000000</addressOffset>
43044                <description>Configuration for processors</description>
43045                <resetValue>0x00000000</resetValue>
43046                <fields>
43047                    <field>
43048                        <name>PROC1_HALTED</name>
43049                        <description>Indication that proc1 has halted</description>
43050                        <bitRange>[1:1]</bitRange>
43051                        <access>read-only</access>
43052                    </field>
43053                    <field>
43054                        <name>PROC0_HALTED</name>
43055                        <description>Indication that proc0 has halted</description>
43056                        <bitRange>[0:0]</bitRange>
43057                        <access>read-only</access>
43058                    </field>
43059                </fields>
43060            </register>
43061            <register>
43062                <name>PROC_IN_SYNC_BYPASS</name>
43063                <addressOffset>0x00000004</addressOffset>
43064                <description>For each bit, if 1, bypass the input synchronizer between that GPIO
43065                    and the GPIO input register in the SIO. The input synchronizers should
43066                    generally be unbypassed, to avoid injecting metastabilities into processors.
43067                    If you&#39;re feeling brave, you can bypass to save two cycles of input
43068                    latency. This register applies to GPIO 0...31.</description>
43069                <resetValue>0x00000000</resetValue>
43070                <fields>
43071                    <field>
43072                        <name>GPIO</name>
43073                        <bitRange>[31:0]</bitRange>
43074                        <access>read-write</access>
43075                    </field>
43076                </fields>
43077            </register>
43078            <register>
43079                <name>PROC_IN_SYNC_BYPASS_HI</name>
43080                <addressOffset>0x00000008</addressOffset>
43081                <description>For each bit, if 1, bypass the input synchronizer between that GPIO
43082                    and the GPIO input register in the SIO. The input synchronizers should
43083                    generally be unbypassed, to avoid injecting metastabilities into processors.
43084                    If you&#39;re feeling brave, you can bypass to save two cycles of input
43085                    latency. This register applies to GPIO 32...47. USB GPIO 56..57 QSPI GPIO 58..63</description>
43086                <resetValue>0x00000000</resetValue>
43087                <fields>
43088                    <field>
43089                        <name>QSPI_SD</name>
43090                        <bitRange>[31:28]</bitRange>
43091                        <access>read-write</access>
43092                    </field>
43093                    <field>
43094                        <name>QSPI_CSN</name>
43095                        <bitRange>[27:27]</bitRange>
43096                        <access>read-write</access>
43097                    </field>
43098                    <field>
43099                        <name>QSPI_SCK</name>
43100                        <bitRange>[26:26]</bitRange>
43101                        <access>read-write</access>
43102                    </field>
43103                    <field>
43104                        <name>USB_DM</name>
43105                        <bitRange>[25:25]</bitRange>
43106                        <access>read-write</access>
43107                    </field>
43108                    <field>
43109                        <name>USB_DP</name>
43110                        <bitRange>[24:24]</bitRange>
43111                        <access>read-write</access>
43112                    </field>
43113                    <field>
43114                        <name>GPIO</name>
43115                        <bitRange>[15:0]</bitRange>
43116                        <access>read-write</access>
43117                    </field>
43118                </fields>
43119            </register>
43120            <register>
43121                <name>DBGFORCE</name>
43122                <addressOffset>0x0000000c</addressOffset>
43123                <description>Directly control the chip SWD debug port</description>
43124                <resetValue>0x00000006</resetValue>
43125                <fields>
43126                    <field>
43127                        <name>ATTACH</name>
43128                        <description>Attach chip debug port to syscfg controls, and disconnect it from external SWD pads.</description>
43129                        <bitRange>[3:3]</bitRange>
43130                        <access>read-write</access>
43131                    </field>
43132                    <field>
43133                        <name>SWCLK</name>
43134                        <description>Directly drive SWCLK, if ATTACH is set</description>
43135                        <bitRange>[2:2]</bitRange>
43136                        <access>read-write</access>
43137                    </field>
43138                    <field>
43139                        <name>SWDI</name>
43140                        <description>Directly drive SWDIO input, if ATTACH is set</description>
43141                        <bitRange>[1:1]</bitRange>
43142                        <access>read-write</access>
43143                    </field>
43144                    <field>
43145                        <name>SWDO</name>
43146                        <description>Observe the value of SWDIO output.</description>
43147                        <bitRange>[0:0]</bitRange>
43148                        <access>read-only</access>
43149                    </field>
43150                </fields>
43151            </register>
43152            <register>
43153                <name>MEMPOWERDOWN</name>
43154                <addressOffset>0x00000010</addressOffset>
43155                <description>Control PD pins to memories.
43156                    Set high to put memories to a low power state. In this state the memories will retain contents but not be accessible
43157                    Use with caution</description>
43158                <resetValue>0x00000000</resetValue>
43159                <fields>
43160                    <field>
43161                        <name>BOOTRAM</name>
43162                        <bitRange>[12:12]</bitRange>
43163                        <access>read-write</access>
43164                    </field>
43165                    <field>
43166                        <name>ROM</name>
43167                        <bitRange>[11:11]</bitRange>
43168                        <access>read-write</access>
43169                    </field>
43170                    <field>
43171                        <name>USB</name>
43172                        <bitRange>[10:10]</bitRange>
43173                        <access>read-write</access>
43174                    </field>
43175                    <field>
43176                        <name>SRAM9</name>
43177                        <bitRange>[9:9]</bitRange>
43178                        <access>read-write</access>
43179                    </field>
43180                    <field>
43181                        <name>SRAM8</name>
43182                        <bitRange>[8:8]</bitRange>
43183                        <access>read-write</access>
43184                    </field>
43185                    <field>
43186                        <name>SRAM7</name>
43187                        <bitRange>[7:7]</bitRange>
43188                        <access>read-write</access>
43189                    </field>
43190                    <field>
43191                        <name>SRAM6</name>
43192                        <bitRange>[6:6]</bitRange>
43193                        <access>read-write</access>
43194                    </field>
43195                    <field>
43196                        <name>SRAM5</name>
43197                        <bitRange>[5:5]</bitRange>
43198                        <access>read-write</access>
43199                    </field>
43200                    <field>
43201                        <name>SRAM4</name>
43202                        <bitRange>[4:4]</bitRange>
43203                        <access>read-write</access>
43204                    </field>
43205                    <field>
43206                        <name>SRAM3</name>
43207                        <bitRange>[3:3]</bitRange>
43208                        <access>read-write</access>
43209                    </field>
43210                    <field>
43211                        <name>SRAM2</name>
43212                        <bitRange>[2:2]</bitRange>
43213                        <access>read-write</access>
43214                    </field>
43215                    <field>
43216                        <name>SRAM1</name>
43217                        <bitRange>[1:1]</bitRange>
43218                        <access>read-write</access>
43219                    </field>
43220                    <field>
43221                        <name>SRAM0</name>
43222                        <bitRange>[0:0]</bitRange>
43223                        <access>read-write</access>
43224                    </field>
43225                </fields>
43226            </register>
43227            <register>
43228                <name>AUXCTRL</name>
43229                <addressOffset>0x00000014</addressOffset>
43230                <description>Auxiliary system control register</description>
43231                <resetValue>0x00000000</resetValue>
43232                <fields>
43233                    <field>
43234                        <name>AUXCTRL</name>
43235                        <description>* Bits 7:2: Reserved
43236
43237                            * Bit 1: When clear, the LPOSC output is XORed into the TRNG ROSC output as an additional, uncorrelated entropy source. When set, this behaviour is disabled.
43238
43239                            * Bit 0: Force POWMAN clock to switch to LPOSC, by asserting its WDRESET input. This must be set before initiating a watchdog reset of the RSM from a stage that includes CLOCKS, if POWMAN is running from clk_ref at the point that the watchdog reset takes place. Otherwise, the short pulse generated on clk_ref by the reset of the CLOCKS block may affect POWMAN register state.</description>
43240                        <bitRange>[7:0]</bitRange>
43241                        <access>read-write</access>
43242                    </field>
43243                </fields>
43244            </register>
43245        </registers>
43246    </peripheral>
43247    <peripheral>
43248        <name>XOSC</name>
43249        <description>Controls the crystal oscillator</description>
43250        <baseAddress>0x40048000</baseAddress>
43251        <addressBlock>
43252            <offset>0</offset>
43253            <size>20</size>
43254            <usage>registers</usage>
43255        </addressBlock>
43256        <registers>
43257            <register>
43258                <name>CTRL</name>
43259                <addressOffset>0x00000000</addressOffset>
43260                <description>Crystal Oscillator Control</description>
43261                <resetValue>0x00000000</resetValue>
43262                <fields>
43263                    <field>
43264                        <name>ENABLE</name>
43265                        <description>On power-up this field is initialised to DISABLE and the chip runs from the ROSC.
43266                            If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If  this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.
43267                            The 12-bit code is intended to give some protection against accidental writes. An invalid setting will retain the previous value. The actual value being used can be read from STATUS_ENABLED</description>
43268                        <bitRange>[23:12]</bitRange>
43269                        <access>read-write</access>
43270                        <enumeratedValues>
43271                            <enumeratedValue>
43272                                <name>DISABLE</name>
43273                                <value>3358</value>
43274                            </enumeratedValue>
43275                            <enumeratedValue>
43276                                <name>ENABLE</name>
43277                                <value>4011</value>
43278                            </enumeratedValue>
43279                        </enumeratedValues>
43280                    </field>
43281                    <field>
43282                        <name>FREQ_RANGE</name>
43283                        <description>The 12-bit code is intended to give some protection against accidental writes. An invalid setting will retain the previous value. The actual value being used can be read from STATUS_FREQ_RANGE</description>
43284                        <bitRange>[11:0]</bitRange>
43285                        <access>read-write</access>
43286                        <enumeratedValues>
43287                            <enumeratedValue>
43288                                <name>1_15MHZ</name>
43289                                <value>2720</value>
43290                            </enumeratedValue>
43291                            <enumeratedValue>
43292                                <name>10_30MHZ</name>
43293                                <value>2721</value>
43294                            </enumeratedValue>
43295                            <enumeratedValue>
43296                                <name>25_60MHZ</name>
43297                                <value>2722</value>
43298                            </enumeratedValue>
43299                            <enumeratedValue>
43300                                <name>40_100MHZ</name>
43301                                <value>2723</value>
43302                            </enumeratedValue>
43303                        </enumeratedValues>
43304                    </field>
43305                </fields>
43306            </register>
43307            <register>
43308                <name>STATUS</name>
43309                <addressOffset>0x00000004</addressOffset>
43310                <description>Crystal Oscillator Status</description>
43311                <resetValue>0x00000000</resetValue>
43312                <fields>
43313                    <field>
43314                        <name>STABLE</name>
43315                        <description>Oscillator is running and stable</description>
43316                        <bitRange>[31:31]</bitRange>
43317                        <access>read-only</access>
43318                    </field>
43319                    <field>
43320                        <name>BADWRITE</name>
43321                        <description>An invalid value has been written to CTRL_ENABLE or CTRL_FREQ_RANGE or DORMANT</description>
43322                        <bitRange>[24:24]</bitRange>
43323                        <access>read-write</access>
43324                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
43325                    </field>
43326                    <field>
43327                        <name>ENABLED</name>
43328                        <description>Oscillator is enabled but not necessarily running and stable, resets to 0</description>
43329                        <bitRange>[12:12]</bitRange>
43330                        <access>read-only</access>
43331                    </field>
43332                    <field>
43333                        <name>FREQ_RANGE</name>
43334                        <description>The current frequency range setting</description>
43335                        <bitRange>[1:0]</bitRange>
43336                        <access>read-only</access>
43337                        <enumeratedValues>
43338                            <enumeratedValue>
43339                                <name>1_15MHZ</name>
43340                                <value>0</value>
43341                            </enumeratedValue>
43342                            <enumeratedValue>
43343                                <name>10_30MHZ</name>
43344                                <value>1</value>
43345                            </enumeratedValue>
43346                            <enumeratedValue>
43347                                <name>25_60MHZ</name>
43348                                <value>2</value>
43349                            </enumeratedValue>
43350                            <enumeratedValue>
43351                                <name>40_100MHZ</name>
43352                                <value>3</value>
43353                            </enumeratedValue>
43354                        </enumeratedValues>
43355                    </field>
43356                </fields>
43357            </register>
43358            <register>
43359                <name>DORMANT</name>
43360                <addressOffset>0x00000008</addressOffset>
43361                <description>Crystal Oscillator pause control</description>
43362                <resetMask>0x00000000</resetMask>
43363                <fields>
43364                    <field>
43365                        <name>DORMANT</name>
43366                        <description>This is used to save power by pausing the XOSC
43367                            On power-up this field is initialised to WAKE
43368                            An invalid write will also select WAKE
43369                            Warning: stop the PLLs before selecting dormant mode
43370                            Warning: setup the irq before selecting dormant mode</description>
43371                        <bitRange>[31:0]</bitRange>
43372                        <access>read-write</access>
43373                        <enumeratedValues>
43374                            <enumeratedValue>
43375                                <name>dormant</name>
43376                                <value>1668246881</value>
43377                            </enumeratedValue>
43378                            <enumeratedValue>
43379                                <name>WAKE</name>
43380                                <value>2002873189</value>
43381                            </enumeratedValue>
43382                        </enumeratedValues>
43383                    </field>
43384                </fields>
43385            </register>
43386            <register>
43387                <name>STARTUP</name>
43388                <addressOffset>0x0000000c</addressOffset>
43389                <description>Controls the startup delay</description>
43390                <resetValue>0x00000000</resetValue>
43391                <fields>
43392                    <field>
43393                        <name>X4</name>
43394                        <description>Multiplies the startup_delay by 4, just in case. The reset value is controlled by a mask-programmable tiecell and is provided in case we are booting from XOSC and the default startup delay is insufficient. The reset value is 0x0.</description>
43395                        <bitRange>[20:20]</bitRange>
43396                        <access>read-write</access>
43397                    </field>
43398                    <field>
43399                        <name>DELAY</name>
43400                        <description>in multiples of 256*xtal_period. The reset value of 0xc4 corresponds to approx 50 000 cycles.</description>
43401                        <bitRange>[13:0]</bitRange>
43402                        <access>read-write</access>
43403                    </field>
43404                </fields>
43405            </register>
43406            <register>
43407                <name>COUNT</name>
43408                <addressOffset>0x00000010</addressOffset>
43409                <description>A down counter running at the xosc frequency which counts to zero and stops.
43410                    Can be used for short software pauses when setting up time sensitive hardware.
43411                    To start the counter, write a non-zero value. Reads will return 1 while the count is running and 0 when it has finished.
43412                    Minimum count value is 4. Count values &lt;4 will be treated as count value =4.
43413                    Note that synchronisation to the register clock domain costs 2 register clock cycles and the counter cannot compensate for that.</description>
43414                <resetValue>0x00000000</resetValue>
43415                <fields>
43416                    <field>
43417                        <name>COUNT</name>
43418                        <bitRange>[15:0]</bitRange>
43419                        <access>read-write</access>
43420                    </field>
43421                </fields>
43422            </register>
43423        </registers>
43424    </peripheral>
43425    <peripheral>
43426        <name>PLL_SYS</name>
43427        <baseAddress>0x40050000</baseAddress>
43428        <addressBlock>
43429            <offset>0</offset>
43430            <size>32</size>
43431            <usage>registers</usage>
43432        </addressBlock>
43433        <interrupt>
43434            <name>PLL_SYS_IRQ</name>
43435            <value>42</value>
43436        </interrupt>
43437        <registers>
43438            <register>
43439                <name>CS</name>
43440                <addressOffset>0x00000000</addressOffset>
43441                <description>Control and Status
43442                    GENERAL CONSTRAINTS:
43443                    Reference clock frequency min=5MHz, max=800MHz
43444                    Feedback divider min=16, max=320
43445                    VCO frequency min=750MHz, max=1600MHz</description>
43446                <resetValue>0x00000001</resetValue>
43447                <fields>
43448                    <field>
43449                        <name>LOCK</name>
43450                        <description>PLL is locked</description>
43451                        <bitRange>[31:31]</bitRange>
43452                        <access>read-only</access>
43453                    </field>
43454                    <field>
43455                        <name>LOCK_N</name>
43456                        <description>PLL is not locked
43457                            Ideally this is cleared when PLL lock is seen and this should never normally be set</description>
43458                        <bitRange>[30:30]</bitRange>
43459                        <access>read-write</access>
43460                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
43461                    </field>
43462                    <field>
43463                        <name>BYPASS</name>
43464                        <description>Passes the reference clock to the output instead of the divided VCO. The VCO continues to run so the user can switch between the reference clock and the divided VCO but the output will glitch when doing so.</description>
43465                        <bitRange>[8:8]</bitRange>
43466                        <access>read-write</access>
43467                    </field>
43468                    <field>
43469                        <name>REFDIV</name>
43470                        <description>Divides the PLL input reference clock.
43471                            Behaviour is undefined for div=0.
43472                            PLL output will be unpredictable during refdiv changes, wait for lock=1 before using it.</description>
43473                        <bitRange>[5:0]</bitRange>
43474                        <access>read-write</access>
43475                    </field>
43476                </fields>
43477            </register>
43478            <register>
43479                <name>PWR</name>
43480                <addressOffset>0x00000004</addressOffset>
43481                <description>Controls the PLL power modes.</description>
43482                <resetValue>0x0000002d</resetValue>
43483                <fields>
43484                    <field>
43485                        <name>VCOPD</name>
43486                        <description>PLL VCO powerdown
43487                            To save power set high when PLL output not required or bypass=1.</description>
43488                        <bitRange>[5:5]</bitRange>
43489                        <access>read-write</access>
43490                    </field>
43491                    <field>
43492                        <name>POSTDIVPD</name>
43493                        <description>PLL post divider powerdown
43494                            To save power set high when PLL output not required or bypass=1.</description>
43495                        <bitRange>[3:3]</bitRange>
43496                        <access>read-write</access>
43497                    </field>
43498                    <field>
43499                        <name>DSMPD</name>
43500                        <description>PLL DSM powerdown
43501                            Nothing is achieved by setting this low.</description>
43502                        <bitRange>[2:2]</bitRange>
43503                        <access>read-write</access>
43504                    </field>
43505                    <field>
43506                        <name>PD</name>
43507                        <description>PLL powerdown
43508                            To save power set high when PLL output not required.</description>
43509                        <bitRange>[0:0]</bitRange>
43510                        <access>read-write</access>
43511                    </field>
43512                </fields>
43513            </register>
43514            <register>
43515                <name>FBDIV_INT</name>
43516                <addressOffset>0x00000008</addressOffset>
43517                <description>Feedback divisor
43518                    (note: this PLL does not support fractional division)</description>
43519                <resetValue>0x00000000</resetValue>
43520                <fields>
43521                    <field>
43522                        <name>FBDIV_INT</name>
43523                        <description>see ctrl reg description for constraints</description>
43524                        <bitRange>[11:0]</bitRange>
43525                        <access>read-write</access>
43526                    </field>
43527                </fields>
43528            </register>
43529            <register>
43530                <name>PRIM</name>
43531                <addressOffset>0x0000000c</addressOffset>
43532                <description>Controls the PLL post dividers for the primary output
43533                    (note: this PLL does not have a secondary output)
43534                    the primary output is driven from VCO divided by postdiv1*postdiv2</description>
43535                <resetValue>0x00077000</resetValue>
43536                <fields>
43537                    <field>
43538                        <name>POSTDIV1</name>
43539                        <description>divide by 1-7</description>
43540                        <bitRange>[18:16]</bitRange>
43541                        <access>read-write</access>
43542                    </field>
43543                    <field>
43544                        <name>POSTDIV2</name>
43545                        <description>divide by 1-7</description>
43546                        <bitRange>[14:12]</bitRange>
43547                        <access>read-write</access>
43548                    </field>
43549                </fields>
43550            </register>
43551            <register>
43552                <name>INTR</name>
43553                <addressOffset>0x00000010</addressOffset>
43554                <description>Raw Interrupts</description>
43555                <resetValue>0x00000000</resetValue>
43556                <fields>
43557                    <field>
43558                        <name>LOCK_N_STICKY</name>
43559                        <bitRange>[0:0]</bitRange>
43560                        <access>read-write</access>
43561                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
43562                    </field>
43563                </fields>
43564            </register>
43565            <register>
43566                <name>INTE</name>
43567                <addressOffset>0x00000014</addressOffset>
43568                <description>Interrupt Enable</description>
43569                <resetValue>0x00000000</resetValue>
43570                <fields>
43571                    <field>
43572                        <name>LOCK_N_STICKY</name>
43573                        <bitRange>[0:0]</bitRange>
43574                        <access>read-write</access>
43575                    </field>
43576                </fields>
43577            </register>
43578            <register>
43579                <name>INTF</name>
43580                <addressOffset>0x00000018</addressOffset>
43581                <description>Interrupt Force</description>
43582                <resetValue>0x00000000</resetValue>
43583                <fields>
43584                    <field>
43585                        <name>LOCK_N_STICKY</name>
43586                        <bitRange>[0:0]</bitRange>
43587                        <access>read-write</access>
43588                    </field>
43589                </fields>
43590            </register>
43591            <register>
43592                <name>INTS</name>
43593                <addressOffset>0x0000001c</addressOffset>
43594                <description>Interrupt status after masking &amp; forcing</description>
43595                <resetValue>0x00000000</resetValue>
43596                <fields>
43597                    <field>
43598                        <name>LOCK_N_STICKY</name>
43599                        <bitRange>[0:0]</bitRange>
43600                        <access>read-only</access>
43601                    </field>
43602                </fields>
43603            </register>
43604        </registers>
43605    </peripheral>
43606    <peripheral derivedFrom="PLL_SYS">
43607        <name>PLL_USB</name>
43608        <baseAddress>0x40058000</baseAddress>
43609        <interrupt>
43610        <name>PLL_USB_IRQ</name>
43611        <value>43</value>
43612    </interrupt>
43613    </peripheral>
43614    <peripheral>
43615        <name>ACCESSCTRL</name>
43616        <description>Hardware access control registers</description>
43617        <baseAddress>0x40060000</baseAddress>
43618        <addressBlock>
43619            <offset>0</offset>
43620            <size>236</size>
43621            <usage>registers</usage>
43622        </addressBlock>
43623        <registers>
43624            <register>
43625                <name>LOCK</name>
43626                <addressOffset>0x00000000</addressOffset>
43627                <description>Once a LOCK bit is written to 1, ACCESSCTRL silently ignores writes from that master. LOCK is writable only by a Secure, Privileged processor or debugger.
43628
43629                    LOCK bits are only writable when their value is zero. Once set, they can never be cleared, except by a full reset of ACCESSCTRL
43630
43631                    Setting the LOCK bit does not affect whether an access raises a bus error. Unprivileged writes, or writes from the DMA, will continue to raise bus errors. All other accesses will continue not to.</description>
43632                <resetValue>0x00000004</resetValue>
43633                <fields>
43634                    <field>
43635                        <name>DEBUG</name>
43636                        <bitRange>[3:3]</bitRange>
43637                        <access>read-write</access>
43638                    </field>
43639                    <field>
43640                        <name>DMA</name>
43641                        <bitRange>[2:2]</bitRange>
43642                        <access>read-only</access>
43643                    </field>
43644                    <field>
43645                        <name>CORE1</name>
43646                        <bitRange>[1:1]</bitRange>
43647                        <access>read-write</access>
43648                    </field>
43649                    <field>
43650                        <name>CORE0</name>
43651                        <bitRange>[0:0]</bitRange>
43652                        <access>read-write</access>
43653                    </field>
43654                </fields>
43655            </register>
43656            <register>
43657                <name>FORCE_CORE_NS</name>
43658                <addressOffset>0x00000004</addressOffset>
43659                <description>Force core 1&#39;s bus accesses to always be Non-secure, no matter the core&#39;s internal state.
43660
43661                    Useful for schemes where one core is designated as the Non-secure core, since some peripherals may filter individual registers internally based on security state but not on master ID.</description>
43662                <resetValue>0x00000000</resetValue>
43663                <fields>
43664                    <field>
43665                        <name>CORE1</name>
43666                        <bitRange>[1:1]</bitRange>
43667                        <access>read-write</access>
43668                    </field>
43669                </fields>
43670            </register>
43671            <register>
43672                <name>CFGRESET</name>
43673                <addressOffset>0x00000008</addressOffset>
43674                <description>Write 1 to reset all ACCESSCTRL configuration, except for the LOCK and FORCE_CORE_NS registers.
43675
43676                    This bit is used in the RP2350 bootrom to quickly restore ACCESSCTRL to a known state during the boot path.
43677
43678                    Note that, like all registers in ACCESSCTRL, this register is not writable when the writer&#39;s corresponding LOCK bit is set, therefore a master which has been locked out of ACCESSCTRL can not use the CFGRESET register to disturb its contents.</description>
43679                <resetValue>0x00000000</resetValue>
43680                <fields>
43681                    <field>
43682                        <name>CFGRESET</name>
43683                        <bitRange>[0:0]</bitRange>
43684                        <access>write-only</access>
43685                    </field>
43686                </fields>
43687            </register>
43688            <register>
43689                <name>GPIO_NSMASK0</name>
43690                <addressOffset>0x0000000c</addressOffset>
43691                <description>Control whether GPIO0...31 are accessible to Non-secure code. Writable only by a Secure, Privileged processor or debugger.
43692
43693                    0 -&gt; Secure access only
43694
43695                    1 -&gt; Secure + Non-secure access</description>
43696                <resetValue>0x00000000</resetValue>
43697                <fields>
43698                    <field>
43699                        <name>GPIO_NSMASK0</name>
43700                        <bitRange>[31:0]</bitRange>
43701                        <access>read-write</access>
43702                    </field>
43703                </fields>
43704            </register>
43705            <register>
43706                <name>GPIO_NSMASK1</name>
43707                <addressOffset>0x00000010</addressOffset>
43708                <description>Control whether GPIO32..47 are accessible to Non-secure code, and whether QSPI and USB bitbang are accessible through the Non-secure SIO. Writable only by a Secure, Privileged processor or debugger.</description>
43709                <resetValue>0x00000000</resetValue>
43710                <fields>
43711                    <field>
43712                        <name>QSPI_SD</name>
43713                        <bitRange>[31:28]</bitRange>
43714                        <access>read-write</access>
43715                    </field>
43716                    <field>
43717                        <name>QSPI_CSN</name>
43718                        <bitRange>[27:27]</bitRange>
43719                        <access>read-write</access>
43720                    </field>
43721                    <field>
43722                        <name>QSPI_SCK</name>
43723                        <bitRange>[26:26]</bitRange>
43724                        <access>read-write</access>
43725                    </field>
43726                    <field>
43727                        <name>USB_DM</name>
43728                        <bitRange>[25:25]</bitRange>
43729                        <access>read-write</access>
43730                    </field>
43731                    <field>
43732                        <name>USB_DP</name>
43733                        <bitRange>[24:24]</bitRange>
43734                        <access>read-write</access>
43735                    </field>
43736                    <field>
43737                        <name>GPIO</name>
43738                        <bitRange>[15:0]</bitRange>
43739                        <access>read-write</access>
43740                    </field>
43741                </fields>
43742            </register>
43743            <register>
43744                <name>ROM</name>
43745                <addressOffset>0x00000014</addressOffset>
43746                <description>Control whether debugger, DMA, core 0 and core 1 can access ROM, and at what security/privilege levels they can do so.
43747
43748                    Defaults to fully open access.
43749
43750                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
43751                <resetValue>0x000000ff</resetValue>
43752                <fields>
43753                    <field>
43754                        <name>DBG</name>
43755                        <description>If 1, ROM can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43756                        <bitRange>[7:7]</bitRange>
43757                        <access>read-write</access>
43758                    </field>
43759                    <field>
43760                        <name>DMA</name>
43761                        <description>If 1, ROM can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43762                        <bitRange>[6:6]</bitRange>
43763                        <access>read-write</access>
43764                    </field>
43765                    <field>
43766                        <name>CORE1</name>
43767                        <description>If 1, ROM can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43768                        <bitRange>[5:5]</bitRange>
43769                        <access>read-write</access>
43770                    </field>
43771                    <field>
43772                        <name>CORE0</name>
43773                        <description>If 1, ROM can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43774                        <bitRange>[4:4]</bitRange>
43775                        <access>read-write</access>
43776                    </field>
43777                    <field>
43778                        <name>SP</name>
43779                        <description>If 1, ROM can be accessed from a Secure, Privileged context.</description>
43780                        <bitRange>[3:3]</bitRange>
43781                        <access>read-write</access>
43782                    </field>
43783                    <field>
43784                        <name>SU</name>
43785                        <description>If 1, and SP is also set, ROM can be accessed from a Secure, Unprivileged context.</description>
43786                        <bitRange>[2:2]</bitRange>
43787                        <access>read-write</access>
43788                    </field>
43789                    <field>
43790                        <name>NSP</name>
43791                        <description>If 1, ROM can be accessed from a Non-secure, Privileged context.</description>
43792                        <bitRange>[1:1]</bitRange>
43793                        <access>read-write</access>
43794                    </field>
43795                    <field>
43796                        <name>NSU</name>
43797                        <description>If 1, and NSP is also set, ROM can be accessed from a Non-secure, Unprivileged context.
43798
43799                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
43800                        <bitRange>[0:0]</bitRange>
43801                        <access>read-write</access>
43802                    </field>
43803                </fields>
43804            </register>
43805            <register>
43806                <name>XIP_MAIN</name>
43807                <addressOffset>0x00000018</addressOffset>
43808                <description>Control whether debugger, DMA, core 0 and core 1 can access XIP_MAIN, and at what security/privilege levels they can do so.
43809
43810                    Defaults to fully open access.
43811
43812                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
43813                <resetValue>0x000000ff</resetValue>
43814                <fields>
43815                    <field>
43816                        <name>DBG</name>
43817                        <description>If 1, XIP_MAIN can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43818                        <bitRange>[7:7]</bitRange>
43819                        <access>read-write</access>
43820                    </field>
43821                    <field>
43822                        <name>DMA</name>
43823                        <description>If 1, XIP_MAIN can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43824                        <bitRange>[6:6]</bitRange>
43825                        <access>read-write</access>
43826                    </field>
43827                    <field>
43828                        <name>CORE1</name>
43829                        <description>If 1, XIP_MAIN can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43830                        <bitRange>[5:5]</bitRange>
43831                        <access>read-write</access>
43832                    </field>
43833                    <field>
43834                        <name>CORE0</name>
43835                        <description>If 1, XIP_MAIN can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43836                        <bitRange>[4:4]</bitRange>
43837                        <access>read-write</access>
43838                    </field>
43839                    <field>
43840                        <name>SP</name>
43841                        <description>If 1, XIP_MAIN can be accessed from a Secure, Privileged context.</description>
43842                        <bitRange>[3:3]</bitRange>
43843                        <access>read-write</access>
43844                    </field>
43845                    <field>
43846                        <name>SU</name>
43847                        <description>If 1, and SP is also set, XIP_MAIN can be accessed from a Secure, Unprivileged context.</description>
43848                        <bitRange>[2:2]</bitRange>
43849                        <access>read-write</access>
43850                    </field>
43851                    <field>
43852                        <name>NSP</name>
43853                        <description>If 1, XIP_MAIN can be accessed from a Non-secure, Privileged context.</description>
43854                        <bitRange>[1:1]</bitRange>
43855                        <access>read-write</access>
43856                    </field>
43857                    <field>
43858                        <name>NSU</name>
43859                        <description>If 1, and NSP is also set, XIP_MAIN can be accessed from a Non-secure, Unprivileged context.
43860
43861                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
43862                        <bitRange>[0:0]</bitRange>
43863                        <access>read-write</access>
43864                    </field>
43865                </fields>
43866            </register>
43867            <register>
43868                <name>SRAM0</name>
43869                <addressOffset>0x0000001c</addressOffset>
43870                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM0, and at what security/privilege levels they can do so.
43871
43872                    Defaults to fully open access.
43873
43874                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
43875                <resetValue>0x000000ff</resetValue>
43876                <fields>
43877                    <field>
43878                        <name>DBG</name>
43879                        <description>If 1, SRAM0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43880                        <bitRange>[7:7]</bitRange>
43881                        <access>read-write</access>
43882                    </field>
43883                    <field>
43884                        <name>DMA</name>
43885                        <description>If 1, SRAM0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43886                        <bitRange>[6:6]</bitRange>
43887                        <access>read-write</access>
43888                    </field>
43889                    <field>
43890                        <name>CORE1</name>
43891                        <description>If 1, SRAM0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43892                        <bitRange>[5:5]</bitRange>
43893                        <access>read-write</access>
43894                    </field>
43895                    <field>
43896                        <name>CORE0</name>
43897                        <description>If 1, SRAM0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43898                        <bitRange>[4:4]</bitRange>
43899                        <access>read-write</access>
43900                    </field>
43901                    <field>
43902                        <name>SP</name>
43903                        <description>If 1, SRAM0 can be accessed from a Secure, Privileged context.</description>
43904                        <bitRange>[3:3]</bitRange>
43905                        <access>read-write</access>
43906                    </field>
43907                    <field>
43908                        <name>SU</name>
43909                        <description>If 1, and SP is also set, SRAM0 can be accessed from a Secure, Unprivileged context.</description>
43910                        <bitRange>[2:2]</bitRange>
43911                        <access>read-write</access>
43912                    </field>
43913                    <field>
43914                        <name>NSP</name>
43915                        <description>If 1, SRAM0 can be accessed from a Non-secure, Privileged context.</description>
43916                        <bitRange>[1:1]</bitRange>
43917                        <access>read-write</access>
43918                    </field>
43919                    <field>
43920                        <name>NSU</name>
43921                        <description>If 1, and NSP is also set, SRAM0 can be accessed from a Non-secure, Unprivileged context.
43922
43923                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
43924                        <bitRange>[0:0]</bitRange>
43925                        <access>read-write</access>
43926                    </field>
43927                </fields>
43928            </register>
43929            <register>
43930                <name>SRAM1</name>
43931                <addressOffset>0x00000020</addressOffset>
43932                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM1, and at what security/privilege levels they can do so.
43933
43934                    Defaults to fully open access.
43935
43936                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
43937                <resetValue>0x000000ff</resetValue>
43938                <fields>
43939                    <field>
43940                        <name>DBG</name>
43941                        <description>If 1, SRAM1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43942                        <bitRange>[7:7]</bitRange>
43943                        <access>read-write</access>
43944                    </field>
43945                    <field>
43946                        <name>DMA</name>
43947                        <description>If 1, SRAM1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43948                        <bitRange>[6:6]</bitRange>
43949                        <access>read-write</access>
43950                    </field>
43951                    <field>
43952                        <name>CORE1</name>
43953                        <description>If 1, SRAM1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43954                        <bitRange>[5:5]</bitRange>
43955                        <access>read-write</access>
43956                    </field>
43957                    <field>
43958                        <name>CORE0</name>
43959                        <description>If 1, SRAM1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
43960                        <bitRange>[4:4]</bitRange>
43961                        <access>read-write</access>
43962                    </field>
43963                    <field>
43964                        <name>SP</name>
43965                        <description>If 1, SRAM1 can be accessed from a Secure, Privileged context.</description>
43966                        <bitRange>[3:3]</bitRange>
43967                        <access>read-write</access>
43968                    </field>
43969                    <field>
43970                        <name>SU</name>
43971                        <description>If 1, and SP is also set, SRAM1 can be accessed from a Secure, Unprivileged context.</description>
43972                        <bitRange>[2:2]</bitRange>
43973                        <access>read-write</access>
43974                    </field>
43975                    <field>
43976                        <name>NSP</name>
43977                        <description>If 1, SRAM1 can be accessed from a Non-secure, Privileged context.</description>
43978                        <bitRange>[1:1]</bitRange>
43979                        <access>read-write</access>
43980                    </field>
43981                    <field>
43982                        <name>NSU</name>
43983                        <description>If 1, and NSP is also set, SRAM1 can be accessed from a Non-secure, Unprivileged context.
43984
43985                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
43986                        <bitRange>[0:0]</bitRange>
43987                        <access>read-write</access>
43988                    </field>
43989                </fields>
43990            </register>
43991            <register>
43992                <name>SRAM2</name>
43993                <addressOffset>0x00000024</addressOffset>
43994                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM2, and at what security/privilege levels they can do so.
43995
43996                    Defaults to fully open access.
43997
43998                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
43999                <resetValue>0x000000ff</resetValue>
44000                <fields>
44001                    <field>
44002                        <name>DBG</name>
44003                        <description>If 1, SRAM2 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44004                        <bitRange>[7:7]</bitRange>
44005                        <access>read-write</access>
44006                    </field>
44007                    <field>
44008                        <name>DMA</name>
44009                        <description>If 1, SRAM2 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44010                        <bitRange>[6:6]</bitRange>
44011                        <access>read-write</access>
44012                    </field>
44013                    <field>
44014                        <name>CORE1</name>
44015                        <description>If 1, SRAM2 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44016                        <bitRange>[5:5]</bitRange>
44017                        <access>read-write</access>
44018                    </field>
44019                    <field>
44020                        <name>CORE0</name>
44021                        <description>If 1, SRAM2 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44022                        <bitRange>[4:4]</bitRange>
44023                        <access>read-write</access>
44024                    </field>
44025                    <field>
44026                        <name>SP</name>
44027                        <description>If 1, SRAM2 can be accessed from a Secure, Privileged context.</description>
44028                        <bitRange>[3:3]</bitRange>
44029                        <access>read-write</access>
44030                    </field>
44031                    <field>
44032                        <name>SU</name>
44033                        <description>If 1, and SP is also set, SRAM2 can be accessed from a Secure, Unprivileged context.</description>
44034                        <bitRange>[2:2]</bitRange>
44035                        <access>read-write</access>
44036                    </field>
44037                    <field>
44038                        <name>NSP</name>
44039                        <description>If 1, SRAM2 can be accessed from a Non-secure, Privileged context.</description>
44040                        <bitRange>[1:1]</bitRange>
44041                        <access>read-write</access>
44042                    </field>
44043                    <field>
44044                        <name>NSU</name>
44045                        <description>If 1, and NSP is also set, SRAM2 can be accessed from a Non-secure, Unprivileged context.
44046
44047                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44048                        <bitRange>[0:0]</bitRange>
44049                        <access>read-write</access>
44050                    </field>
44051                </fields>
44052            </register>
44053            <register>
44054                <name>SRAM3</name>
44055                <addressOffset>0x00000028</addressOffset>
44056                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM3, and at what security/privilege levels they can do so.
44057
44058                    Defaults to fully open access.
44059
44060                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44061                <resetValue>0x000000ff</resetValue>
44062                <fields>
44063                    <field>
44064                        <name>DBG</name>
44065                        <description>If 1, SRAM3 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44066                        <bitRange>[7:7]</bitRange>
44067                        <access>read-write</access>
44068                    </field>
44069                    <field>
44070                        <name>DMA</name>
44071                        <description>If 1, SRAM3 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44072                        <bitRange>[6:6]</bitRange>
44073                        <access>read-write</access>
44074                    </field>
44075                    <field>
44076                        <name>CORE1</name>
44077                        <description>If 1, SRAM3 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44078                        <bitRange>[5:5]</bitRange>
44079                        <access>read-write</access>
44080                    </field>
44081                    <field>
44082                        <name>CORE0</name>
44083                        <description>If 1, SRAM3 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44084                        <bitRange>[4:4]</bitRange>
44085                        <access>read-write</access>
44086                    </field>
44087                    <field>
44088                        <name>SP</name>
44089                        <description>If 1, SRAM3 can be accessed from a Secure, Privileged context.</description>
44090                        <bitRange>[3:3]</bitRange>
44091                        <access>read-write</access>
44092                    </field>
44093                    <field>
44094                        <name>SU</name>
44095                        <description>If 1, and SP is also set, SRAM3 can be accessed from a Secure, Unprivileged context.</description>
44096                        <bitRange>[2:2]</bitRange>
44097                        <access>read-write</access>
44098                    </field>
44099                    <field>
44100                        <name>NSP</name>
44101                        <description>If 1, SRAM3 can be accessed from a Non-secure, Privileged context.</description>
44102                        <bitRange>[1:1]</bitRange>
44103                        <access>read-write</access>
44104                    </field>
44105                    <field>
44106                        <name>NSU</name>
44107                        <description>If 1, and NSP is also set, SRAM3 can be accessed from a Non-secure, Unprivileged context.
44108
44109                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44110                        <bitRange>[0:0]</bitRange>
44111                        <access>read-write</access>
44112                    </field>
44113                </fields>
44114            </register>
44115            <register>
44116                <name>SRAM4</name>
44117                <addressOffset>0x0000002c</addressOffset>
44118                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM4, and at what security/privilege levels they can do so.
44119
44120                    Defaults to fully open access.
44121
44122                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44123                <resetValue>0x000000ff</resetValue>
44124                <fields>
44125                    <field>
44126                        <name>DBG</name>
44127                        <description>If 1, SRAM4 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44128                        <bitRange>[7:7]</bitRange>
44129                        <access>read-write</access>
44130                    </field>
44131                    <field>
44132                        <name>DMA</name>
44133                        <description>If 1, SRAM4 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44134                        <bitRange>[6:6]</bitRange>
44135                        <access>read-write</access>
44136                    </field>
44137                    <field>
44138                        <name>CORE1</name>
44139                        <description>If 1, SRAM4 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44140                        <bitRange>[5:5]</bitRange>
44141                        <access>read-write</access>
44142                    </field>
44143                    <field>
44144                        <name>CORE0</name>
44145                        <description>If 1, SRAM4 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44146                        <bitRange>[4:4]</bitRange>
44147                        <access>read-write</access>
44148                    </field>
44149                    <field>
44150                        <name>SP</name>
44151                        <description>If 1, SRAM4 can be accessed from a Secure, Privileged context.</description>
44152                        <bitRange>[3:3]</bitRange>
44153                        <access>read-write</access>
44154                    </field>
44155                    <field>
44156                        <name>SU</name>
44157                        <description>If 1, and SP is also set, SRAM4 can be accessed from a Secure, Unprivileged context.</description>
44158                        <bitRange>[2:2]</bitRange>
44159                        <access>read-write</access>
44160                    </field>
44161                    <field>
44162                        <name>NSP</name>
44163                        <description>If 1, SRAM4 can be accessed from a Non-secure, Privileged context.</description>
44164                        <bitRange>[1:1]</bitRange>
44165                        <access>read-write</access>
44166                    </field>
44167                    <field>
44168                        <name>NSU</name>
44169                        <description>If 1, and NSP is also set, SRAM4 can be accessed from a Non-secure, Unprivileged context.
44170
44171                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44172                        <bitRange>[0:0]</bitRange>
44173                        <access>read-write</access>
44174                    </field>
44175                </fields>
44176            </register>
44177            <register>
44178                <name>SRAM5</name>
44179                <addressOffset>0x00000030</addressOffset>
44180                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM5, and at what security/privilege levels they can do so.
44181
44182                    Defaults to fully open access.
44183
44184                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44185                <resetValue>0x000000ff</resetValue>
44186                <fields>
44187                    <field>
44188                        <name>DBG</name>
44189                        <description>If 1, SRAM5 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44190                        <bitRange>[7:7]</bitRange>
44191                        <access>read-write</access>
44192                    </field>
44193                    <field>
44194                        <name>DMA</name>
44195                        <description>If 1, SRAM5 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44196                        <bitRange>[6:6]</bitRange>
44197                        <access>read-write</access>
44198                    </field>
44199                    <field>
44200                        <name>CORE1</name>
44201                        <description>If 1, SRAM5 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44202                        <bitRange>[5:5]</bitRange>
44203                        <access>read-write</access>
44204                    </field>
44205                    <field>
44206                        <name>CORE0</name>
44207                        <description>If 1, SRAM5 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44208                        <bitRange>[4:4]</bitRange>
44209                        <access>read-write</access>
44210                    </field>
44211                    <field>
44212                        <name>SP</name>
44213                        <description>If 1, SRAM5 can be accessed from a Secure, Privileged context.</description>
44214                        <bitRange>[3:3]</bitRange>
44215                        <access>read-write</access>
44216                    </field>
44217                    <field>
44218                        <name>SU</name>
44219                        <description>If 1, and SP is also set, SRAM5 can be accessed from a Secure, Unprivileged context.</description>
44220                        <bitRange>[2:2]</bitRange>
44221                        <access>read-write</access>
44222                    </field>
44223                    <field>
44224                        <name>NSP</name>
44225                        <description>If 1, SRAM5 can be accessed from a Non-secure, Privileged context.</description>
44226                        <bitRange>[1:1]</bitRange>
44227                        <access>read-write</access>
44228                    </field>
44229                    <field>
44230                        <name>NSU</name>
44231                        <description>If 1, and NSP is also set, SRAM5 can be accessed from a Non-secure, Unprivileged context.
44232
44233                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44234                        <bitRange>[0:0]</bitRange>
44235                        <access>read-write</access>
44236                    </field>
44237                </fields>
44238            </register>
44239            <register>
44240                <name>SRAM6</name>
44241                <addressOffset>0x00000034</addressOffset>
44242                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM6, and at what security/privilege levels they can do so.
44243
44244                    Defaults to fully open access.
44245
44246                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44247                <resetValue>0x000000ff</resetValue>
44248                <fields>
44249                    <field>
44250                        <name>DBG</name>
44251                        <description>If 1, SRAM6 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44252                        <bitRange>[7:7]</bitRange>
44253                        <access>read-write</access>
44254                    </field>
44255                    <field>
44256                        <name>DMA</name>
44257                        <description>If 1, SRAM6 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44258                        <bitRange>[6:6]</bitRange>
44259                        <access>read-write</access>
44260                    </field>
44261                    <field>
44262                        <name>CORE1</name>
44263                        <description>If 1, SRAM6 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44264                        <bitRange>[5:5]</bitRange>
44265                        <access>read-write</access>
44266                    </field>
44267                    <field>
44268                        <name>CORE0</name>
44269                        <description>If 1, SRAM6 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44270                        <bitRange>[4:4]</bitRange>
44271                        <access>read-write</access>
44272                    </field>
44273                    <field>
44274                        <name>SP</name>
44275                        <description>If 1, SRAM6 can be accessed from a Secure, Privileged context.</description>
44276                        <bitRange>[3:3]</bitRange>
44277                        <access>read-write</access>
44278                    </field>
44279                    <field>
44280                        <name>SU</name>
44281                        <description>If 1, and SP is also set, SRAM6 can be accessed from a Secure, Unprivileged context.</description>
44282                        <bitRange>[2:2]</bitRange>
44283                        <access>read-write</access>
44284                    </field>
44285                    <field>
44286                        <name>NSP</name>
44287                        <description>If 1, SRAM6 can be accessed from a Non-secure, Privileged context.</description>
44288                        <bitRange>[1:1]</bitRange>
44289                        <access>read-write</access>
44290                    </field>
44291                    <field>
44292                        <name>NSU</name>
44293                        <description>If 1, and NSP is also set, SRAM6 can be accessed from a Non-secure, Unprivileged context.
44294
44295                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44296                        <bitRange>[0:0]</bitRange>
44297                        <access>read-write</access>
44298                    </field>
44299                </fields>
44300            </register>
44301            <register>
44302                <name>SRAM7</name>
44303                <addressOffset>0x00000038</addressOffset>
44304                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM7, and at what security/privilege levels they can do so.
44305
44306                    Defaults to fully open access.
44307
44308                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44309                <resetValue>0x000000ff</resetValue>
44310                <fields>
44311                    <field>
44312                        <name>DBG</name>
44313                        <description>If 1, SRAM7 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44314                        <bitRange>[7:7]</bitRange>
44315                        <access>read-write</access>
44316                    </field>
44317                    <field>
44318                        <name>DMA</name>
44319                        <description>If 1, SRAM7 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44320                        <bitRange>[6:6]</bitRange>
44321                        <access>read-write</access>
44322                    </field>
44323                    <field>
44324                        <name>CORE1</name>
44325                        <description>If 1, SRAM7 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44326                        <bitRange>[5:5]</bitRange>
44327                        <access>read-write</access>
44328                    </field>
44329                    <field>
44330                        <name>CORE0</name>
44331                        <description>If 1, SRAM7 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44332                        <bitRange>[4:4]</bitRange>
44333                        <access>read-write</access>
44334                    </field>
44335                    <field>
44336                        <name>SP</name>
44337                        <description>If 1, SRAM7 can be accessed from a Secure, Privileged context.</description>
44338                        <bitRange>[3:3]</bitRange>
44339                        <access>read-write</access>
44340                    </field>
44341                    <field>
44342                        <name>SU</name>
44343                        <description>If 1, and SP is also set, SRAM7 can be accessed from a Secure, Unprivileged context.</description>
44344                        <bitRange>[2:2]</bitRange>
44345                        <access>read-write</access>
44346                    </field>
44347                    <field>
44348                        <name>NSP</name>
44349                        <description>If 1, SRAM7 can be accessed from a Non-secure, Privileged context.</description>
44350                        <bitRange>[1:1]</bitRange>
44351                        <access>read-write</access>
44352                    </field>
44353                    <field>
44354                        <name>NSU</name>
44355                        <description>If 1, and NSP is also set, SRAM7 can be accessed from a Non-secure, Unprivileged context.
44356
44357                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44358                        <bitRange>[0:0]</bitRange>
44359                        <access>read-write</access>
44360                    </field>
44361                </fields>
44362            </register>
44363            <register>
44364                <name>SRAM8</name>
44365                <addressOffset>0x0000003c</addressOffset>
44366                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM8, and at what security/privilege levels they can do so.
44367
44368                    Defaults to fully open access.
44369
44370                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44371                <resetValue>0x000000ff</resetValue>
44372                <fields>
44373                    <field>
44374                        <name>DBG</name>
44375                        <description>If 1, SRAM8 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44376                        <bitRange>[7:7]</bitRange>
44377                        <access>read-write</access>
44378                    </field>
44379                    <field>
44380                        <name>DMA</name>
44381                        <description>If 1, SRAM8 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44382                        <bitRange>[6:6]</bitRange>
44383                        <access>read-write</access>
44384                    </field>
44385                    <field>
44386                        <name>CORE1</name>
44387                        <description>If 1, SRAM8 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44388                        <bitRange>[5:5]</bitRange>
44389                        <access>read-write</access>
44390                    </field>
44391                    <field>
44392                        <name>CORE0</name>
44393                        <description>If 1, SRAM8 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44394                        <bitRange>[4:4]</bitRange>
44395                        <access>read-write</access>
44396                    </field>
44397                    <field>
44398                        <name>SP</name>
44399                        <description>If 1, SRAM8 can be accessed from a Secure, Privileged context.</description>
44400                        <bitRange>[3:3]</bitRange>
44401                        <access>read-write</access>
44402                    </field>
44403                    <field>
44404                        <name>SU</name>
44405                        <description>If 1, and SP is also set, SRAM8 can be accessed from a Secure, Unprivileged context.</description>
44406                        <bitRange>[2:2]</bitRange>
44407                        <access>read-write</access>
44408                    </field>
44409                    <field>
44410                        <name>NSP</name>
44411                        <description>If 1, SRAM8 can be accessed from a Non-secure, Privileged context.</description>
44412                        <bitRange>[1:1]</bitRange>
44413                        <access>read-write</access>
44414                    </field>
44415                    <field>
44416                        <name>NSU</name>
44417                        <description>If 1, and NSP is also set, SRAM8 can be accessed from a Non-secure, Unprivileged context.
44418
44419                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44420                        <bitRange>[0:0]</bitRange>
44421                        <access>read-write</access>
44422                    </field>
44423                </fields>
44424            </register>
44425            <register>
44426                <name>SRAM9</name>
44427                <addressOffset>0x00000040</addressOffset>
44428                <description>Control whether debugger, DMA, core 0 and core 1 can access SRAM9, and at what security/privilege levels they can do so.
44429
44430                    Defaults to fully open access.
44431
44432                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44433                <resetValue>0x000000ff</resetValue>
44434                <fields>
44435                    <field>
44436                        <name>DBG</name>
44437                        <description>If 1, SRAM9 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44438                        <bitRange>[7:7]</bitRange>
44439                        <access>read-write</access>
44440                    </field>
44441                    <field>
44442                        <name>DMA</name>
44443                        <description>If 1, SRAM9 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44444                        <bitRange>[6:6]</bitRange>
44445                        <access>read-write</access>
44446                    </field>
44447                    <field>
44448                        <name>CORE1</name>
44449                        <description>If 1, SRAM9 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44450                        <bitRange>[5:5]</bitRange>
44451                        <access>read-write</access>
44452                    </field>
44453                    <field>
44454                        <name>CORE0</name>
44455                        <description>If 1, SRAM9 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44456                        <bitRange>[4:4]</bitRange>
44457                        <access>read-write</access>
44458                    </field>
44459                    <field>
44460                        <name>SP</name>
44461                        <description>If 1, SRAM9 can be accessed from a Secure, Privileged context.</description>
44462                        <bitRange>[3:3]</bitRange>
44463                        <access>read-write</access>
44464                    </field>
44465                    <field>
44466                        <name>SU</name>
44467                        <description>If 1, and SP is also set, SRAM9 can be accessed from a Secure, Unprivileged context.</description>
44468                        <bitRange>[2:2]</bitRange>
44469                        <access>read-write</access>
44470                    </field>
44471                    <field>
44472                        <name>NSP</name>
44473                        <description>If 1, SRAM9 can be accessed from a Non-secure, Privileged context.</description>
44474                        <bitRange>[1:1]</bitRange>
44475                        <access>read-write</access>
44476                    </field>
44477                    <field>
44478                        <name>NSU</name>
44479                        <description>If 1, and NSP is also set, SRAM9 can be accessed from a Non-secure, Unprivileged context.
44480
44481                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44482                        <bitRange>[0:0]</bitRange>
44483                        <access>read-write</access>
44484                    </field>
44485                </fields>
44486            </register>
44487            <register>
44488                <name>DMA</name>
44489                <addressOffset>0x00000044</addressOffset>
44490                <description>Control whether debugger, DMA, core 0 and core 1 can access DMA, and at what security/privilege levels they can do so.
44491
44492                    Defaults to Secure access from any master.
44493
44494                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44495                <resetValue>0x000000fc</resetValue>
44496                <fields>
44497                    <field>
44498                        <name>DBG</name>
44499                        <description>If 1, DMA can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44500                        <bitRange>[7:7]</bitRange>
44501                        <access>read-write</access>
44502                    </field>
44503                    <field>
44504                        <name>DMA</name>
44505                        <description>If 1, DMA can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44506                        <bitRange>[6:6]</bitRange>
44507                        <access>read-write</access>
44508                    </field>
44509                    <field>
44510                        <name>CORE1</name>
44511                        <description>If 1, DMA can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44512                        <bitRange>[5:5]</bitRange>
44513                        <access>read-write</access>
44514                    </field>
44515                    <field>
44516                        <name>CORE0</name>
44517                        <description>If 1, DMA can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44518                        <bitRange>[4:4]</bitRange>
44519                        <access>read-write</access>
44520                    </field>
44521                    <field>
44522                        <name>SP</name>
44523                        <description>If 1, DMA can be accessed from a Secure, Privileged context.</description>
44524                        <bitRange>[3:3]</bitRange>
44525                        <access>read-write</access>
44526                    </field>
44527                    <field>
44528                        <name>SU</name>
44529                        <description>If 1, and SP is also set, DMA can be accessed from a Secure, Unprivileged context.</description>
44530                        <bitRange>[2:2]</bitRange>
44531                        <access>read-write</access>
44532                    </field>
44533                    <field>
44534                        <name>NSP</name>
44535                        <description>If 1, DMA can be accessed from a Non-secure, Privileged context.</description>
44536                        <bitRange>[1:1]</bitRange>
44537                        <access>read-write</access>
44538                    </field>
44539                    <field>
44540                        <name>NSU</name>
44541                        <description>If 1, and NSP is also set, DMA can be accessed from a Non-secure, Unprivileged context.
44542
44543                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44544                        <bitRange>[0:0]</bitRange>
44545                        <access>read-write</access>
44546                    </field>
44547                </fields>
44548            </register>
44549            <register>
44550                <name>USBCTRL</name>
44551                <addressOffset>0x00000048</addressOffset>
44552                <description>Control whether debugger, DMA, core 0 and core 1 can access USBCTRL, and at what security/privilege levels they can do so.
44553
44554                    Defaults to Secure access from any master.
44555
44556                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44557                <resetValue>0x000000fc</resetValue>
44558                <fields>
44559                    <field>
44560                        <name>DBG</name>
44561                        <description>If 1, USBCTRL can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44562                        <bitRange>[7:7]</bitRange>
44563                        <access>read-write</access>
44564                    </field>
44565                    <field>
44566                        <name>DMA</name>
44567                        <description>If 1, USBCTRL can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44568                        <bitRange>[6:6]</bitRange>
44569                        <access>read-write</access>
44570                    </field>
44571                    <field>
44572                        <name>CORE1</name>
44573                        <description>If 1, USBCTRL can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44574                        <bitRange>[5:5]</bitRange>
44575                        <access>read-write</access>
44576                    </field>
44577                    <field>
44578                        <name>CORE0</name>
44579                        <description>If 1, USBCTRL can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44580                        <bitRange>[4:4]</bitRange>
44581                        <access>read-write</access>
44582                    </field>
44583                    <field>
44584                        <name>SP</name>
44585                        <description>If 1, USBCTRL can be accessed from a Secure, Privileged context.</description>
44586                        <bitRange>[3:3]</bitRange>
44587                        <access>read-write</access>
44588                    </field>
44589                    <field>
44590                        <name>SU</name>
44591                        <description>If 1, and SP is also set, USBCTRL can be accessed from a Secure, Unprivileged context.</description>
44592                        <bitRange>[2:2]</bitRange>
44593                        <access>read-write</access>
44594                    </field>
44595                    <field>
44596                        <name>NSP</name>
44597                        <description>If 1, USBCTRL can be accessed from a Non-secure, Privileged context.</description>
44598                        <bitRange>[1:1]</bitRange>
44599                        <access>read-write</access>
44600                    </field>
44601                    <field>
44602                        <name>NSU</name>
44603                        <description>If 1, and NSP is also set, USBCTRL can be accessed from a Non-secure, Unprivileged context.
44604
44605                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44606                        <bitRange>[0:0]</bitRange>
44607                        <access>read-write</access>
44608                    </field>
44609                </fields>
44610            </register>
44611            <register>
44612                <name>PIO0</name>
44613                <addressOffset>0x0000004c</addressOffset>
44614                <description>Control whether debugger, DMA, core 0 and core 1 can access PIO0, and at what security/privilege levels they can do so.
44615
44616                    Defaults to Secure access from any master.
44617
44618                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44619                <resetValue>0x000000fc</resetValue>
44620                <fields>
44621                    <field>
44622                        <name>DBG</name>
44623                        <description>If 1, PIO0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44624                        <bitRange>[7:7]</bitRange>
44625                        <access>read-write</access>
44626                    </field>
44627                    <field>
44628                        <name>DMA</name>
44629                        <description>If 1, PIO0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44630                        <bitRange>[6:6]</bitRange>
44631                        <access>read-write</access>
44632                    </field>
44633                    <field>
44634                        <name>CORE1</name>
44635                        <description>If 1, PIO0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44636                        <bitRange>[5:5]</bitRange>
44637                        <access>read-write</access>
44638                    </field>
44639                    <field>
44640                        <name>CORE0</name>
44641                        <description>If 1, PIO0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44642                        <bitRange>[4:4]</bitRange>
44643                        <access>read-write</access>
44644                    </field>
44645                    <field>
44646                        <name>SP</name>
44647                        <description>If 1, PIO0 can be accessed from a Secure, Privileged context.</description>
44648                        <bitRange>[3:3]</bitRange>
44649                        <access>read-write</access>
44650                    </field>
44651                    <field>
44652                        <name>SU</name>
44653                        <description>If 1, and SP is also set, PIO0 can be accessed from a Secure, Unprivileged context.</description>
44654                        <bitRange>[2:2]</bitRange>
44655                        <access>read-write</access>
44656                    </field>
44657                    <field>
44658                        <name>NSP</name>
44659                        <description>If 1, PIO0 can be accessed from a Non-secure, Privileged context.</description>
44660                        <bitRange>[1:1]</bitRange>
44661                        <access>read-write</access>
44662                    </field>
44663                    <field>
44664                        <name>NSU</name>
44665                        <description>If 1, and NSP is also set, PIO0 can be accessed from a Non-secure, Unprivileged context.
44666
44667                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44668                        <bitRange>[0:0]</bitRange>
44669                        <access>read-write</access>
44670                    </field>
44671                </fields>
44672            </register>
44673            <register>
44674                <name>PIO1</name>
44675                <addressOffset>0x00000050</addressOffset>
44676                <description>Control whether debugger, DMA, core 0 and core 1 can access PIO1, and at what security/privilege levels they can do so.
44677
44678                    Defaults to Secure access from any master.
44679
44680                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44681                <resetValue>0x000000fc</resetValue>
44682                <fields>
44683                    <field>
44684                        <name>DBG</name>
44685                        <description>If 1, PIO1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44686                        <bitRange>[7:7]</bitRange>
44687                        <access>read-write</access>
44688                    </field>
44689                    <field>
44690                        <name>DMA</name>
44691                        <description>If 1, PIO1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44692                        <bitRange>[6:6]</bitRange>
44693                        <access>read-write</access>
44694                    </field>
44695                    <field>
44696                        <name>CORE1</name>
44697                        <description>If 1, PIO1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44698                        <bitRange>[5:5]</bitRange>
44699                        <access>read-write</access>
44700                    </field>
44701                    <field>
44702                        <name>CORE0</name>
44703                        <description>If 1, PIO1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44704                        <bitRange>[4:4]</bitRange>
44705                        <access>read-write</access>
44706                    </field>
44707                    <field>
44708                        <name>SP</name>
44709                        <description>If 1, PIO1 can be accessed from a Secure, Privileged context.</description>
44710                        <bitRange>[3:3]</bitRange>
44711                        <access>read-write</access>
44712                    </field>
44713                    <field>
44714                        <name>SU</name>
44715                        <description>If 1, and SP is also set, PIO1 can be accessed from a Secure, Unprivileged context.</description>
44716                        <bitRange>[2:2]</bitRange>
44717                        <access>read-write</access>
44718                    </field>
44719                    <field>
44720                        <name>NSP</name>
44721                        <description>If 1, PIO1 can be accessed from a Non-secure, Privileged context.</description>
44722                        <bitRange>[1:1]</bitRange>
44723                        <access>read-write</access>
44724                    </field>
44725                    <field>
44726                        <name>NSU</name>
44727                        <description>If 1, and NSP is also set, PIO1 can be accessed from a Non-secure, Unprivileged context.
44728
44729                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44730                        <bitRange>[0:0]</bitRange>
44731                        <access>read-write</access>
44732                    </field>
44733                </fields>
44734            </register>
44735            <register>
44736                <name>PIO2</name>
44737                <addressOffset>0x00000054</addressOffset>
44738                <description>Control whether debugger, DMA, core 0 and core 1 can access PIO2, and at what security/privilege levels they can do so.
44739
44740                    Defaults to Secure access from any master.
44741
44742                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44743                <resetValue>0x000000fc</resetValue>
44744                <fields>
44745                    <field>
44746                        <name>DBG</name>
44747                        <description>If 1, PIO2 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44748                        <bitRange>[7:7]</bitRange>
44749                        <access>read-write</access>
44750                    </field>
44751                    <field>
44752                        <name>DMA</name>
44753                        <description>If 1, PIO2 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44754                        <bitRange>[6:6]</bitRange>
44755                        <access>read-write</access>
44756                    </field>
44757                    <field>
44758                        <name>CORE1</name>
44759                        <description>If 1, PIO2 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44760                        <bitRange>[5:5]</bitRange>
44761                        <access>read-write</access>
44762                    </field>
44763                    <field>
44764                        <name>CORE0</name>
44765                        <description>If 1, PIO2 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44766                        <bitRange>[4:4]</bitRange>
44767                        <access>read-write</access>
44768                    </field>
44769                    <field>
44770                        <name>SP</name>
44771                        <description>If 1, PIO2 can be accessed from a Secure, Privileged context.</description>
44772                        <bitRange>[3:3]</bitRange>
44773                        <access>read-write</access>
44774                    </field>
44775                    <field>
44776                        <name>SU</name>
44777                        <description>If 1, and SP is also set, PIO2 can be accessed from a Secure, Unprivileged context.</description>
44778                        <bitRange>[2:2]</bitRange>
44779                        <access>read-write</access>
44780                    </field>
44781                    <field>
44782                        <name>NSP</name>
44783                        <description>If 1, PIO2 can be accessed from a Non-secure, Privileged context.</description>
44784                        <bitRange>[1:1]</bitRange>
44785                        <access>read-write</access>
44786                    </field>
44787                    <field>
44788                        <name>NSU</name>
44789                        <description>If 1, and NSP is also set, PIO2 can be accessed from a Non-secure, Unprivileged context.
44790
44791                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44792                        <bitRange>[0:0]</bitRange>
44793                        <access>read-write</access>
44794                    </field>
44795                </fields>
44796            </register>
44797            <register>
44798                <name>CORESIGHT_TRACE</name>
44799                <addressOffset>0x00000058</addressOffset>
44800                <description>Control whether debugger, DMA, core 0 and core 1 can access CORESIGHT_TRACE, and at what security/privilege levels they can do so.
44801
44802                    Defaults to Secure, Privileged processor or debug access only.
44803
44804                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44805                <resetValue>0x000000b8</resetValue>
44806                <fields>
44807                    <field>
44808                        <name>DBG</name>
44809                        <description>If 1, CORESIGHT_TRACE can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44810                        <bitRange>[7:7]</bitRange>
44811                        <access>read-write</access>
44812                    </field>
44813                    <field>
44814                        <name>DMA</name>
44815                        <description>If 1, CORESIGHT_TRACE can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44816                        <bitRange>[6:6]</bitRange>
44817                        <access>read-write</access>
44818                    </field>
44819                    <field>
44820                        <name>CORE1</name>
44821                        <description>If 1, CORESIGHT_TRACE can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44822                        <bitRange>[5:5]</bitRange>
44823                        <access>read-write</access>
44824                    </field>
44825                    <field>
44826                        <name>CORE0</name>
44827                        <description>If 1, CORESIGHT_TRACE can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44828                        <bitRange>[4:4]</bitRange>
44829                        <access>read-write</access>
44830                    </field>
44831                    <field>
44832                        <name>SP</name>
44833                        <description>If 1, CORESIGHT_TRACE can be accessed from a Secure, Privileged context.</description>
44834                        <bitRange>[3:3]</bitRange>
44835                        <access>read-write</access>
44836                    </field>
44837                    <field>
44838                        <name>SU</name>
44839                        <description>If 1, and SP is also set, CORESIGHT_TRACE can be accessed from a Secure, Unprivileged context.</description>
44840                        <bitRange>[2:2]</bitRange>
44841                        <access>read-write</access>
44842                    </field>
44843                    <field>
44844                        <name>NSP</name>
44845                        <description>If 1, CORESIGHT_TRACE can be accessed from a Non-secure, Privileged context.</description>
44846                        <bitRange>[1:1]</bitRange>
44847                        <access>read-write</access>
44848                    </field>
44849                    <field>
44850                        <name>NSU</name>
44851                        <description>If 1, and NSP is also set, CORESIGHT_TRACE can be accessed from a Non-secure, Unprivileged context.
44852
44853                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44854                        <bitRange>[0:0]</bitRange>
44855                        <access>read-write</access>
44856                    </field>
44857                </fields>
44858            </register>
44859            <register>
44860                <name>CORESIGHT_PERIPH</name>
44861                <addressOffset>0x0000005c</addressOffset>
44862                <description>Control whether debugger, DMA, core 0 and core 1 can access CORESIGHT_PERIPH, and at what security/privilege levels they can do so.
44863
44864                    Defaults to Secure, Privileged processor or debug access only.
44865
44866                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44867                <resetValue>0x000000b8</resetValue>
44868                <fields>
44869                    <field>
44870                        <name>DBG</name>
44871                        <description>If 1, CORESIGHT_PERIPH can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44872                        <bitRange>[7:7]</bitRange>
44873                        <access>read-write</access>
44874                    </field>
44875                    <field>
44876                        <name>DMA</name>
44877                        <description>If 1, CORESIGHT_PERIPH can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44878                        <bitRange>[6:6]</bitRange>
44879                        <access>read-write</access>
44880                    </field>
44881                    <field>
44882                        <name>CORE1</name>
44883                        <description>If 1, CORESIGHT_PERIPH can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44884                        <bitRange>[5:5]</bitRange>
44885                        <access>read-write</access>
44886                    </field>
44887                    <field>
44888                        <name>CORE0</name>
44889                        <description>If 1, CORESIGHT_PERIPH can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44890                        <bitRange>[4:4]</bitRange>
44891                        <access>read-write</access>
44892                    </field>
44893                    <field>
44894                        <name>SP</name>
44895                        <description>If 1, CORESIGHT_PERIPH can be accessed from a Secure, Privileged context.</description>
44896                        <bitRange>[3:3]</bitRange>
44897                        <access>read-write</access>
44898                    </field>
44899                    <field>
44900                        <name>SU</name>
44901                        <description>If 1, and SP is also set, CORESIGHT_PERIPH can be accessed from a Secure, Unprivileged context.</description>
44902                        <bitRange>[2:2]</bitRange>
44903                        <access>read-write</access>
44904                    </field>
44905                    <field>
44906                        <name>NSP</name>
44907                        <description>If 1, CORESIGHT_PERIPH can be accessed from a Non-secure, Privileged context.</description>
44908                        <bitRange>[1:1]</bitRange>
44909                        <access>read-write</access>
44910                    </field>
44911                    <field>
44912                        <name>NSU</name>
44913                        <description>If 1, and NSP is also set, CORESIGHT_PERIPH can be accessed from a Non-secure, Unprivileged context.
44914
44915                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44916                        <bitRange>[0:0]</bitRange>
44917                        <access>read-write</access>
44918                    </field>
44919                </fields>
44920            </register>
44921            <register>
44922                <name>SYSINFO</name>
44923                <addressOffset>0x00000060</addressOffset>
44924                <description>Control whether debugger, DMA, core 0 and core 1 can access SYSINFO, and at what security/privilege levels they can do so.
44925
44926                    Defaults to fully open access.
44927
44928                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44929                <resetValue>0x000000ff</resetValue>
44930                <fields>
44931                    <field>
44932                        <name>DBG</name>
44933                        <description>If 1, SYSINFO can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44934                        <bitRange>[7:7]</bitRange>
44935                        <access>read-write</access>
44936                    </field>
44937                    <field>
44938                        <name>DMA</name>
44939                        <description>If 1, SYSINFO can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44940                        <bitRange>[6:6]</bitRange>
44941                        <access>read-write</access>
44942                    </field>
44943                    <field>
44944                        <name>CORE1</name>
44945                        <description>If 1, SYSINFO can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44946                        <bitRange>[5:5]</bitRange>
44947                        <access>read-write</access>
44948                    </field>
44949                    <field>
44950                        <name>CORE0</name>
44951                        <description>If 1, SYSINFO can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44952                        <bitRange>[4:4]</bitRange>
44953                        <access>read-write</access>
44954                    </field>
44955                    <field>
44956                        <name>SP</name>
44957                        <description>If 1, SYSINFO can be accessed from a Secure, Privileged context.</description>
44958                        <bitRange>[3:3]</bitRange>
44959                        <access>read-write</access>
44960                    </field>
44961                    <field>
44962                        <name>SU</name>
44963                        <description>If 1, and SP is also set, SYSINFO can be accessed from a Secure, Unprivileged context.</description>
44964                        <bitRange>[2:2]</bitRange>
44965                        <access>read-write</access>
44966                    </field>
44967                    <field>
44968                        <name>NSP</name>
44969                        <description>If 1, SYSINFO can be accessed from a Non-secure, Privileged context.</description>
44970                        <bitRange>[1:1]</bitRange>
44971                        <access>read-write</access>
44972                    </field>
44973                    <field>
44974                        <name>NSU</name>
44975                        <description>If 1, and NSP is also set, SYSINFO can be accessed from a Non-secure, Unprivileged context.
44976
44977                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
44978                        <bitRange>[0:0]</bitRange>
44979                        <access>read-write</access>
44980                    </field>
44981                </fields>
44982            </register>
44983            <register>
44984                <name>RESETS</name>
44985                <addressOffset>0x00000064</addressOffset>
44986                <description>Control whether debugger, DMA, core 0 and core 1 can access RESETS, and at what security/privilege levels they can do so.
44987
44988                    Defaults to Secure access from any master.
44989
44990                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
44991                <resetValue>0x000000fc</resetValue>
44992                <fields>
44993                    <field>
44994                        <name>DBG</name>
44995                        <description>If 1, RESETS can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
44996                        <bitRange>[7:7]</bitRange>
44997                        <access>read-write</access>
44998                    </field>
44999                    <field>
45000                        <name>DMA</name>
45001                        <description>If 1, RESETS can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45002                        <bitRange>[6:6]</bitRange>
45003                        <access>read-write</access>
45004                    </field>
45005                    <field>
45006                        <name>CORE1</name>
45007                        <description>If 1, RESETS can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45008                        <bitRange>[5:5]</bitRange>
45009                        <access>read-write</access>
45010                    </field>
45011                    <field>
45012                        <name>CORE0</name>
45013                        <description>If 1, RESETS can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45014                        <bitRange>[4:4]</bitRange>
45015                        <access>read-write</access>
45016                    </field>
45017                    <field>
45018                        <name>SP</name>
45019                        <description>If 1, RESETS can be accessed from a Secure, Privileged context.</description>
45020                        <bitRange>[3:3]</bitRange>
45021                        <access>read-write</access>
45022                    </field>
45023                    <field>
45024                        <name>SU</name>
45025                        <description>If 1, and SP is also set, RESETS can be accessed from a Secure, Unprivileged context.</description>
45026                        <bitRange>[2:2]</bitRange>
45027                        <access>read-write</access>
45028                    </field>
45029                    <field>
45030                        <name>NSP</name>
45031                        <description>If 1, RESETS can be accessed from a Non-secure, Privileged context.</description>
45032                        <bitRange>[1:1]</bitRange>
45033                        <access>read-write</access>
45034                    </field>
45035                    <field>
45036                        <name>NSU</name>
45037                        <description>If 1, and NSP is also set, RESETS can be accessed from a Non-secure, Unprivileged context.
45038
45039                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45040                        <bitRange>[0:0]</bitRange>
45041                        <access>read-write</access>
45042                    </field>
45043                </fields>
45044            </register>
45045            <register>
45046                <name>IO_BANK0</name>
45047                <addressOffset>0x00000068</addressOffset>
45048                <description>Control whether debugger, DMA, core 0 and core 1 can access IO_BANK0, and at what security/privilege levels they can do so.
45049
45050                    Defaults to Secure access from any master.
45051
45052                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45053                <resetValue>0x000000fc</resetValue>
45054                <fields>
45055                    <field>
45056                        <name>DBG</name>
45057                        <description>If 1, IO_BANK0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45058                        <bitRange>[7:7]</bitRange>
45059                        <access>read-write</access>
45060                    </field>
45061                    <field>
45062                        <name>DMA</name>
45063                        <description>If 1, IO_BANK0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45064                        <bitRange>[6:6]</bitRange>
45065                        <access>read-write</access>
45066                    </field>
45067                    <field>
45068                        <name>CORE1</name>
45069                        <description>If 1, IO_BANK0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45070                        <bitRange>[5:5]</bitRange>
45071                        <access>read-write</access>
45072                    </field>
45073                    <field>
45074                        <name>CORE0</name>
45075                        <description>If 1, IO_BANK0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45076                        <bitRange>[4:4]</bitRange>
45077                        <access>read-write</access>
45078                    </field>
45079                    <field>
45080                        <name>SP</name>
45081                        <description>If 1, IO_BANK0 can be accessed from a Secure, Privileged context.</description>
45082                        <bitRange>[3:3]</bitRange>
45083                        <access>read-write</access>
45084                    </field>
45085                    <field>
45086                        <name>SU</name>
45087                        <description>If 1, and SP is also set, IO_BANK0 can be accessed from a Secure, Unprivileged context.</description>
45088                        <bitRange>[2:2]</bitRange>
45089                        <access>read-write</access>
45090                    </field>
45091                    <field>
45092                        <name>NSP</name>
45093                        <description>If 1, IO_BANK0 can be accessed from a Non-secure, Privileged context.</description>
45094                        <bitRange>[1:1]</bitRange>
45095                        <access>read-write</access>
45096                    </field>
45097                    <field>
45098                        <name>NSU</name>
45099                        <description>If 1, and NSP is also set, IO_BANK0 can be accessed from a Non-secure, Unprivileged context.
45100
45101                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45102                        <bitRange>[0:0]</bitRange>
45103                        <access>read-write</access>
45104                    </field>
45105                </fields>
45106            </register>
45107            <register>
45108                <name>IO_BANK1</name>
45109                <addressOffset>0x0000006c</addressOffset>
45110                <description>Control whether debugger, DMA, core 0 and core 1 can access IO_BANK1, and at what security/privilege levels they can do so.
45111
45112                    Defaults to Secure access from any master.
45113
45114                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45115                <resetValue>0x000000fc</resetValue>
45116                <fields>
45117                    <field>
45118                        <name>DBG</name>
45119                        <description>If 1, IO_BANK1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45120                        <bitRange>[7:7]</bitRange>
45121                        <access>read-write</access>
45122                    </field>
45123                    <field>
45124                        <name>DMA</name>
45125                        <description>If 1, IO_BANK1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45126                        <bitRange>[6:6]</bitRange>
45127                        <access>read-write</access>
45128                    </field>
45129                    <field>
45130                        <name>CORE1</name>
45131                        <description>If 1, IO_BANK1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45132                        <bitRange>[5:5]</bitRange>
45133                        <access>read-write</access>
45134                    </field>
45135                    <field>
45136                        <name>CORE0</name>
45137                        <description>If 1, IO_BANK1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45138                        <bitRange>[4:4]</bitRange>
45139                        <access>read-write</access>
45140                    </field>
45141                    <field>
45142                        <name>SP</name>
45143                        <description>If 1, IO_BANK1 can be accessed from a Secure, Privileged context.</description>
45144                        <bitRange>[3:3]</bitRange>
45145                        <access>read-write</access>
45146                    </field>
45147                    <field>
45148                        <name>SU</name>
45149                        <description>If 1, and SP is also set, IO_BANK1 can be accessed from a Secure, Unprivileged context.</description>
45150                        <bitRange>[2:2]</bitRange>
45151                        <access>read-write</access>
45152                    </field>
45153                    <field>
45154                        <name>NSP</name>
45155                        <description>If 1, IO_BANK1 can be accessed from a Non-secure, Privileged context.</description>
45156                        <bitRange>[1:1]</bitRange>
45157                        <access>read-write</access>
45158                    </field>
45159                    <field>
45160                        <name>NSU</name>
45161                        <description>If 1, and NSP is also set, IO_BANK1 can be accessed from a Non-secure, Unprivileged context.
45162
45163                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45164                        <bitRange>[0:0]</bitRange>
45165                        <access>read-write</access>
45166                    </field>
45167                </fields>
45168            </register>
45169            <register>
45170                <name>PADS_BANK0</name>
45171                <addressOffset>0x00000070</addressOffset>
45172                <description>Control whether debugger, DMA, core 0 and core 1 can access PADS_BANK0, and at what security/privilege levels they can do so.
45173
45174                    Defaults to Secure access from any master.
45175
45176                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45177                <resetValue>0x000000fc</resetValue>
45178                <fields>
45179                    <field>
45180                        <name>DBG</name>
45181                        <description>If 1, PADS_BANK0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45182                        <bitRange>[7:7]</bitRange>
45183                        <access>read-write</access>
45184                    </field>
45185                    <field>
45186                        <name>DMA</name>
45187                        <description>If 1, PADS_BANK0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45188                        <bitRange>[6:6]</bitRange>
45189                        <access>read-write</access>
45190                    </field>
45191                    <field>
45192                        <name>CORE1</name>
45193                        <description>If 1, PADS_BANK0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45194                        <bitRange>[5:5]</bitRange>
45195                        <access>read-write</access>
45196                    </field>
45197                    <field>
45198                        <name>CORE0</name>
45199                        <description>If 1, PADS_BANK0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45200                        <bitRange>[4:4]</bitRange>
45201                        <access>read-write</access>
45202                    </field>
45203                    <field>
45204                        <name>SP</name>
45205                        <description>If 1, PADS_BANK0 can be accessed from a Secure, Privileged context.</description>
45206                        <bitRange>[3:3]</bitRange>
45207                        <access>read-write</access>
45208                    </field>
45209                    <field>
45210                        <name>SU</name>
45211                        <description>If 1, and SP is also set, PADS_BANK0 can be accessed from a Secure, Unprivileged context.</description>
45212                        <bitRange>[2:2]</bitRange>
45213                        <access>read-write</access>
45214                    </field>
45215                    <field>
45216                        <name>NSP</name>
45217                        <description>If 1, PADS_BANK0 can be accessed from a Non-secure, Privileged context.</description>
45218                        <bitRange>[1:1]</bitRange>
45219                        <access>read-write</access>
45220                    </field>
45221                    <field>
45222                        <name>NSU</name>
45223                        <description>If 1, and NSP is also set, PADS_BANK0 can be accessed from a Non-secure, Unprivileged context.
45224
45225                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45226                        <bitRange>[0:0]</bitRange>
45227                        <access>read-write</access>
45228                    </field>
45229                </fields>
45230            </register>
45231            <register>
45232                <name>PADS_QSPI</name>
45233                <addressOffset>0x00000074</addressOffset>
45234                <description>Control whether debugger, DMA, core 0 and core 1 can access PADS_QSPI, and at what security/privilege levels they can do so.
45235
45236                    Defaults to Secure access from any master.
45237
45238                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45239                <resetValue>0x000000fc</resetValue>
45240                <fields>
45241                    <field>
45242                        <name>DBG</name>
45243                        <description>If 1, PADS_QSPI can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45244                        <bitRange>[7:7]</bitRange>
45245                        <access>read-write</access>
45246                    </field>
45247                    <field>
45248                        <name>DMA</name>
45249                        <description>If 1, PADS_QSPI can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45250                        <bitRange>[6:6]</bitRange>
45251                        <access>read-write</access>
45252                    </field>
45253                    <field>
45254                        <name>CORE1</name>
45255                        <description>If 1, PADS_QSPI can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45256                        <bitRange>[5:5]</bitRange>
45257                        <access>read-write</access>
45258                    </field>
45259                    <field>
45260                        <name>CORE0</name>
45261                        <description>If 1, PADS_QSPI can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45262                        <bitRange>[4:4]</bitRange>
45263                        <access>read-write</access>
45264                    </field>
45265                    <field>
45266                        <name>SP</name>
45267                        <description>If 1, PADS_QSPI can be accessed from a Secure, Privileged context.</description>
45268                        <bitRange>[3:3]</bitRange>
45269                        <access>read-write</access>
45270                    </field>
45271                    <field>
45272                        <name>SU</name>
45273                        <description>If 1, and SP is also set, PADS_QSPI can be accessed from a Secure, Unprivileged context.</description>
45274                        <bitRange>[2:2]</bitRange>
45275                        <access>read-write</access>
45276                    </field>
45277                    <field>
45278                        <name>NSP</name>
45279                        <description>If 1, PADS_QSPI can be accessed from a Non-secure, Privileged context.</description>
45280                        <bitRange>[1:1]</bitRange>
45281                        <access>read-write</access>
45282                    </field>
45283                    <field>
45284                        <name>NSU</name>
45285                        <description>If 1, and NSP is also set, PADS_QSPI can be accessed from a Non-secure, Unprivileged context.
45286
45287                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45288                        <bitRange>[0:0]</bitRange>
45289                        <access>read-write</access>
45290                    </field>
45291                </fields>
45292            </register>
45293            <register>
45294                <name>BUSCTRL</name>
45295                <addressOffset>0x00000078</addressOffset>
45296                <description>Control whether debugger, DMA, core 0 and core 1 can access BUSCTRL, and at what security/privilege levels they can do so.
45297
45298                    Defaults to Secure access from any master.
45299
45300                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45301                <resetValue>0x000000fc</resetValue>
45302                <fields>
45303                    <field>
45304                        <name>DBG</name>
45305                        <description>If 1, BUSCTRL can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45306                        <bitRange>[7:7]</bitRange>
45307                        <access>read-write</access>
45308                    </field>
45309                    <field>
45310                        <name>DMA</name>
45311                        <description>If 1, BUSCTRL can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45312                        <bitRange>[6:6]</bitRange>
45313                        <access>read-write</access>
45314                    </field>
45315                    <field>
45316                        <name>CORE1</name>
45317                        <description>If 1, BUSCTRL can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45318                        <bitRange>[5:5]</bitRange>
45319                        <access>read-write</access>
45320                    </field>
45321                    <field>
45322                        <name>CORE0</name>
45323                        <description>If 1, BUSCTRL can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45324                        <bitRange>[4:4]</bitRange>
45325                        <access>read-write</access>
45326                    </field>
45327                    <field>
45328                        <name>SP</name>
45329                        <description>If 1, BUSCTRL can be accessed from a Secure, Privileged context.</description>
45330                        <bitRange>[3:3]</bitRange>
45331                        <access>read-write</access>
45332                    </field>
45333                    <field>
45334                        <name>SU</name>
45335                        <description>If 1, and SP is also set, BUSCTRL can be accessed from a Secure, Unprivileged context.</description>
45336                        <bitRange>[2:2]</bitRange>
45337                        <access>read-write</access>
45338                    </field>
45339                    <field>
45340                        <name>NSP</name>
45341                        <description>If 1, BUSCTRL can be accessed from a Non-secure, Privileged context.</description>
45342                        <bitRange>[1:1]</bitRange>
45343                        <access>read-write</access>
45344                    </field>
45345                    <field>
45346                        <name>NSU</name>
45347                        <description>If 1, and NSP is also set, BUSCTRL can be accessed from a Non-secure, Unprivileged context.
45348
45349                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45350                        <bitRange>[0:0]</bitRange>
45351                        <access>read-write</access>
45352                    </field>
45353                </fields>
45354            </register>
45355            <register>
45356                <name>ADC0</name>
45357                <addressOffset>0x0000007c</addressOffset>
45358                <description>Control whether debugger, DMA, core 0 and core 1 can access ADC0, and at what security/privilege levels they can do so.
45359
45360                    Defaults to Secure access from any master.
45361
45362                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45363                <resetValue>0x000000fc</resetValue>
45364                <fields>
45365                    <field>
45366                        <name>DBG</name>
45367                        <description>If 1, ADC0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45368                        <bitRange>[7:7]</bitRange>
45369                        <access>read-write</access>
45370                    </field>
45371                    <field>
45372                        <name>DMA</name>
45373                        <description>If 1, ADC0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45374                        <bitRange>[6:6]</bitRange>
45375                        <access>read-write</access>
45376                    </field>
45377                    <field>
45378                        <name>CORE1</name>
45379                        <description>If 1, ADC0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45380                        <bitRange>[5:5]</bitRange>
45381                        <access>read-write</access>
45382                    </field>
45383                    <field>
45384                        <name>CORE0</name>
45385                        <description>If 1, ADC0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45386                        <bitRange>[4:4]</bitRange>
45387                        <access>read-write</access>
45388                    </field>
45389                    <field>
45390                        <name>SP</name>
45391                        <description>If 1, ADC0 can be accessed from a Secure, Privileged context.</description>
45392                        <bitRange>[3:3]</bitRange>
45393                        <access>read-write</access>
45394                    </field>
45395                    <field>
45396                        <name>SU</name>
45397                        <description>If 1, and SP is also set, ADC0 can be accessed from a Secure, Unprivileged context.</description>
45398                        <bitRange>[2:2]</bitRange>
45399                        <access>read-write</access>
45400                    </field>
45401                    <field>
45402                        <name>NSP</name>
45403                        <description>If 1, ADC0 can be accessed from a Non-secure, Privileged context.</description>
45404                        <bitRange>[1:1]</bitRange>
45405                        <access>read-write</access>
45406                    </field>
45407                    <field>
45408                        <name>NSU</name>
45409                        <description>If 1, and NSP is also set, ADC0 can be accessed from a Non-secure, Unprivileged context.
45410
45411                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45412                        <bitRange>[0:0]</bitRange>
45413                        <access>read-write</access>
45414                    </field>
45415                </fields>
45416            </register>
45417            <register>
45418                <name>HSTX</name>
45419                <addressOffset>0x00000080</addressOffset>
45420                <description>Control whether debugger, DMA, core 0 and core 1 can access HSTX, and at what security/privilege levels they can do so.
45421
45422                    Defaults to Secure access from any master.
45423
45424                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45425                <resetValue>0x000000fc</resetValue>
45426                <fields>
45427                    <field>
45428                        <name>DBG</name>
45429                        <description>If 1, HSTX can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45430                        <bitRange>[7:7]</bitRange>
45431                        <access>read-write</access>
45432                    </field>
45433                    <field>
45434                        <name>DMA</name>
45435                        <description>If 1, HSTX can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45436                        <bitRange>[6:6]</bitRange>
45437                        <access>read-write</access>
45438                    </field>
45439                    <field>
45440                        <name>CORE1</name>
45441                        <description>If 1, HSTX can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45442                        <bitRange>[5:5]</bitRange>
45443                        <access>read-write</access>
45444                    </field>
45445                    <field>
45446                        <name>CORE0</name>
45447                        <description>If 1, HSTX can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45448                        <bitRange>[4:4]</bitRange>
45449                        <access>read-write</access>
45450                    </field>
45451                    <field>
45452                        <name>SP</name>
45453                        <description>If 1, HSTX can be accessed from a Secure, Privileged context.</description>
45454                        <bitRange>[3:3]</bitRange>
45455                        <access>read-write</access>
45456                    </field>
45457                    <field>
45458                        <name>SU</name>
45459                        <description>If 1, and SP is also set, HSTX can be accessed from a Secure, Unprivileged context.</description>
45460                        <bitRange>[2:2]</bitRange>
45461                        <access>read-write</access>
45462                    </field>
45463                    <field>
45464                        <name>NSP</name>
45465                        <description>If 1, HSTX can be accessed from a Non-secure, Privileged context.</description>
45466                        <bitRange>[1:1]</bitRange>
45467                        <access>read-write</access>
45468                    </field>
45469                    <field>
45470                        <name>NSU</name>
45471                        <description>If 1, and NSP is also set, HSTX can be accessed from a Non-secure, Unprivileged context.
45472
45473                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45474                        <bitRange>[0:0]</bitRange>
45475                        <access>read-write</access>
45476                    </field>
45477                </fields>
45478            </register>
45479            <register>
45480                <name>I2C0</name>
45481                <addressOffset>0x00000084</addressOffset>
45482                <description>Control whether debugger, DMA, core 0 and core 1 can access I2C0, and at what security/privilege levels they can do so.
45483
45484                    Defaults to Secure access from any master.
45485
45486                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45487                <resetValue>0x000000fc</resetValue>
45488                <fields>
45489                    <field>
45490                        <name>DBG</name>
45491                        <description>If 1, I2C0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45492                        <bitRange>[7:7]</bitRange>
45493                        <access>read-write</access>
45494                    </field>
45495                    <field>
45496                        <name>DMA</name>
45497                        <description>If 1, I2C0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45498                        <bitRange>[6:6]</bitRange>
45499                        <access>read-write</access>
45500                    </field>
45501                    <field>
45502                        <name>CORE1</name>
45503                        <description>If 1, I2C0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45504                        <bitRange>[5:5]</bitRange>
45505                        <access>read-write</access>
45506                    </field>
45507                    <field>
45508                        <name>CORE0</name>
45509                        <description>If 1, I2C0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45510                        <bitRange>[4:4]</bitRange>
45511                        <access>read-write</access>
45512                    </field>
45513                    <field>
45514                        <name>SP</name>
45515                        <description>If 1, I2C0 can be accessed from a Secure, Privileged context.</description>
45516                        <bitRange>[3:3]</bitRange>
45517                        <access>read-write</access>
45518                    </field>
45519                    <field>
45520                        <name>SU</name>
45521                        <description>If 1, and SP is also set, I2C0 can be accessed from a Secure, Unprivileged context.</description>
45522                        <bitRange>[2:2]</bitRange>
45523                        <access>read-write</access>
45524                    </field>
45525                    <field>
45526                        <name>NSP</name>
45527                        <description>If 1, I2C0 can be accessed from a Non-secure, Privileged context.</description>
45528                        <bitRange>[1:1]</bitRange>
45529                        <access>read-write</access>
45530                    </field>
45531                    <field>
45532                        <name>NSU</name>
45533                        <description>If 1, and NSP is also set, I2C0 can be accessed from a Non-secure, Unprivileged context.
45534
45535                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45536                        <bitRange>[0:0]</bitRange>
45537                        <access>read-write</access>
45538                    </field>
45539                </fields>
45540            </register>
45541            <register>
45542                <name>I2C1</name>
45543                <addressOffset>0x00000088</addressOffset>
45544                <description>Control whether debugger, DMA, core 0 and core 1 can access I2C1, and at what security/privilege levels they can do so.
45545
45546                    Defaults to Secure access from any master.
45547
45548                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45549                <resetValue>0x000000fc</resetValue>
45550                <fields>
45551                    <field>
45552                        <name>DBG</name>
45553                        <description>If 1, I2C1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45554                        <bitRange>[7:7]</bitRange>
45555                        <access>read-write</access>
45556                    </field>
45557                    <field>
45558                        <name>DMA</name>
45559                        <description>If 1, I2C1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45560                        <bitRange>[6:6]</bitRange>
45561                        <access>read-write</access>
45562                    </field>
45563                    <field>
45564                        <name>CORE1</name>
45565                        <description>If 1, I2C1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45566                        <bitRange>[5:5]</bitRange>
45567                        <access>read-write</access>
45568                    </field>
45569                    <field>
45570                        <name>CORE0</name>
45571                        <description>If 1, I2C1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45572                        <bitRange>[4:4]</bitRange>
45573                        <access>read-write</access>
45574                    </field>
45575                    <field>
45576                        <name>SP</name>
45577                        <description>If 1, I2C1 can be accessed from a Secure, Privileged context.</description>
45578                        <bitRange>[3:3]</bitRange>
45579                        <access>read-write</access>
45580                    </field>
45581                    <field>
45582                        <name>SU</name>
45583                        <description>If 1, and SP is also set, I2C1 can be accessed from a Secure, Unprivileged context.</description>
45584                        <bitRange>[2:2]</bitRange>
45585                        <access>read-write</access>
45586                    </field>
45587                    <field>
45588                        <name>NSP</name>
45589                        <description>If 1, I2C1 can be accessed from a Non-secure, Privileged context.</description>
45590                        <bitRange>[1:1]</bitRange>
45591                        <access>read-write</access>
45592                    </field>
45593                    <field>
45594                        <name>NSU</name>
45595                        <description>If 1, and NSP is also set, I2C1 can be accessed from a Non-secure, Unprivileged context.
45596
45597                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45598                        <bitRange>[0:0]</bitRange>
45599                        <access>read-write</access>
45600                    </field>
45601                </fields>
45602            </register>
45603            <register>
45604                <name>PWM</name>
45605                <addressOffset>0x0000008c</addressOffset>
45606                <description>Control whether debugger, DMA, core 0 and core 1 can access PWM, and at what security/privilege levels they can do so.
45607
45608                    Defaults to Secure access from any master.
45609
45610                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45611                <resetValue>0x000000fc</resetValue>
45612                <fields>
45613                    <field>
45614                        <name>DBG</name>
45615                        <description>If 1, PWM can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45616                        <bitRange>[7:7]</bitRange>
45617                        <access>read-write</access>
45618                    </field>
45619                    <field>
45620                        <name>DMA</name>
45621                        <description>If 1, PWM can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45622                        <bitRange>[6:6]</bitRange>
45623                        <access>read-write</access>
45624                    </field>
45625                    <field>
45626                        <name>CORE1</name>
45627                        <description>If 1, PWM can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45628                        <bitRange>[5:5]</bitRange>
45629                        <access>read-write</access>
45630                    </field>
45631                    <field>
45632                        <name>CORE0</name>
45633                        <description>If 1, PWM can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45634                        <bitRange>[4:4]</bitRange>
45635                        <access>read-write</access>
45636                    </field>
45637                    <field>
45638                        <name>SP</name>
45639                        <description>If 1, PWM can be accessed from a Secure, Privileged context.</description>
45640                        <bitRange>[3:3]</bitRange>
45641                        <access>read-write</access>
45642                    </field>
45643                    <field>
45644                        <name>SU</name>
45645                        <description>If 1, and SP is also set, PWM can be accessed from a Secure, Unprivileged context.</description>
45646                        <bitRange>[2:2]</bitRange>
45647                        <access>read-write</access>
45648                    </field>
45649                    <field>
45650                        <name>NSP</name>
45651                        <description>If 1, PWM can be accessed from a Non-secure, Privileged context.</description>
45652                        <bitRange>[1:1]</bitRange>
45653                        <access>read-write</access>
45654                    </field>
45655                    <field>
45656                        <name>NSU</name>
45657                        <description>If 1, and NSP is also set, PWM can be accessed from a Non-secure, Unprivileged context.
45658
45659                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45660                        <bitRange>[0:0]</bitRange>
45661                        <access>read-write</access>
45662                    </field>
45663                </fields>
45664            </register>
45665            <register>
45666                <name>SPI0</name>
45667                <addressOffset>0x00000090</addressOffset>
45668                <description>Control whether debugger, DMA, core 0 and core 1 can access SPI0, and at what security/privilege levels they can do so.
45669
45670                    Defaults to Secure access from any master.
45671
45672                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45673                <resetValue>0x000000fc</resetValue>
45674                <fields>
45675                    <field>
45676                        <name>DBG</name>
45677                        <description>If 1, SPI0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45678                        <bitRange>[7:7]</bitRange>
45679                        <access>read-write</access>
45680                    </field>
45681                    <field>
45682                        <name>DMA</name>
45683                        <description>If 1, SPI0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45684                        <bitRange>[6:6]</bitRange>
45685                        <access>read-write</access>
45686                    </field>
45687                    <field>
45688                        <name>CORE1</name>
45689                        <description>If 1, SPI0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45690                        <bitRange>[5:5]</bitRange>
45691                        <access>read-write</access>
45692                    </field>
45693                    <field>
45694                        <name>CORE0</name>
45695                        <description>If 1, SPI0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45696                        <bitRange>[4:4]</bitRange>
45697                        <access>read-write</access>
45698                    </field>
45699                    <field>
45700                        <name>SP</name>
45701                        <description>If 1, SPI0 can be accessed from a Secure, Privileged context.</description>
45702                        <bitRange>[3:3]</bitRange>
45703                        <access>read-write</access>
45704                    </field>
45705                    <field>
45706                        <name>SU</name>
45707                        <description>If 1, and SP is also set, SPI0 can be accessed from a Secure, Unprivileged context.</description>
45708                        <bitRange>[2:2]</bitRange>
45709                        <access>read-write</access>
45710                    </field>
45711                    <field>
45712                        <name>NSP</name>
45713                        <description>If 1, SPI0 can be accessed from a Non-secure, Privileged context.</description>
45714                        <bitRange>[1:1]</bitRange>
45715                        <access>read-write</access>
45716                    </field>
45717                    <field>
45718                        <name>NSU</name>
45719                        <description>If 1, and NSP is also set, SPI0 can be accessed from a Non-secure, Unprivileged context.
45720
45721                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45722                        <bitRange>[0:0]</bitRange>
45723                        <access>read-write</access>
45724                    </field>
45725                </fields>
45726            </register>
45727            <register>
45728                <name>SPI1</name>
45729                <addressOffset>0x00000094</addressOffset>
45730                <description>Control whether debugger, DMA, core 0 and core 1 can access SPI1, and at what security/privilege levels they can do so.
45731
45732                    Defaults to Secure access from any master.
45733
45734                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45735                <resetValue>0x000000fc</resetValue>
45736                <fields>
45737                    <field>
45738                        <name>DBG</name>
45739                        <description>If 1, SPI1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45740                        <bitRange>[7:7]</bitRange>
45741                        <access>read-write</access>
45742                    </field>
45743                    <field>
45744                        <name>DMA</name>
45745                        <description>If 1, SPI1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45746                        <bitRange>[6:6]</bitRange>
45747                        <access>read-write</access>
45748                    </field>
45749                    <field>
45750                        <name>CORE1</name>
45751                        <description>If 1, SPI1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45752                        <bitRange>[5:5]</bitRange>
45753                        <access>read-write</access>
45754                    </field>
45755                    <field>
45756                        <name>CORE0</name>
45757                        <description>If 1, SPI1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45758                        <bitRange>[4:4]</bitRange>
45759                        <access>read-write</access>
45760                    </field>
45761                    <field>
45762                        <name>SP</name>
45763                        <description>If 1, SPI1 can be accessed from a Secure, Privileged context.</description>
45764                        <bitRange>[3:3]</bitRange>
45765                        <access>read-write</access>
45766                    </field>
45767                    <field>
45768                        <name>SU</name>
45769                        <description>If 1, and SP is also set, SPI1 can be accessed from a Secure, Unprivileged context.</description>
45770                        <bitRange>[2:2]</bitRange>
45771                        <access>read-write</access>
45772                    </field>
45773                    <field>
45774                        <name>NSP</name>
45775                        <description>If 1, SPI1 can be accessed from a Non-secure, Privileged context.</description>
45776                        <bitRange>[1:1]</bitRange>
45777                        <access>read-write</access>
45778                    </field>
45779                    <field>
45780                        <name>NSU</name>
45781                        <description>If 1, and NSP is also set, SPI1 can be accessed from a Non-secure, Unprivileged context.
45782
45783                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45784                        <bitRange>[0:0]</bitRange>
45785                        <access>read-write</access>
45786                    </field>
45787                </fields>
45788            </register>
45789            <register>
45790                <name>TIMER0</name>
45791                <addressOffset>0x00000098</addressOffset>
45792                <description>Control whether debugger, DMA, core 0 and core 1 can access TIMER0, and at what security/privilege levels they can do so.
45793
45794                    Defaults to Secure access from any master.
45795
45796                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45797                <resetValue>0x000000fc</resetValue>
45798                <fields>
45799                    <field>
45800                        <name>DBG</name>
45801                        <description>If 1, TIMER0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45802                        <bitRange>[7:7]</bitRange>
45803                        <access>read-write</access>
45804                    </field>
45805                    <field>
45806                        <name>DMA</name>
45807                        <description>If 1, TIMER0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45808                        <bitRange>[6:6]</bitRange>
45809                        <access>read-write</access>
45810                    </field>
45811                    <field>
45812                        <name>CORE1</name>
45813                        <description>If 1, TIMER0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45814                        <bitRange>[5:5]</bitRange>
45815                        <access>read-write</access>
45816                    </field>
45817                    <field>
45818                        <name>CORE0</name>
45819                        <description>If 1, TIMER0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45820                        <bitRange>[4:4]</bitRange>
45821                        <access>read-write</access>
45822                    </field>
45823                    <field>
45824                        <name>SP</name>
45825                        <description>If 1, TIMER0 can be accessed from a Secure, Privileged context.</description>
45826                        <bitRange>[3:3]</bitRange>
45827                        <access>read-write</access>
45828                    </field>
45829                    <field>
45830                        <name>SU</name>
45831                        <description>If 1, and SP is also set, TIMER0 can be accessed from a Secure, Unprivileged context.</description>
45832                        <bitRange>[2:2]</bitRange>
45833                        <access>read-write</access>
45834                    </field>
45835                    <field>
45836                        <name>NSP</name>
45837                        <description>If 1, TIMER0 can be accessed from a Non-secure, Privileged context.</description>
45838                        <bitRange>[1:1]</bitRange>
45839                        <access>read-write</access>
45840                    </field>
45841                    <field>
45842                        <name>NSU</name>
45843                        <description>If 1, and NSP is also set, TIMER0 can be accessed from a Non-secure, Unprivileged context.
45844
45845                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45846                        <bitRange>[0:0]</bitRange>
45847                        <access>read-write</access>
45848                    </field>
45849                </fields>
45850            </register>
45851            <register>
45852                <name>TIMER1</name>
45853                <addressOffset>0x0000009c</addressOffset>
45854                <description>Control whether debugger, DMA, core 0 and core 1 can access TIMER1, and at what security/privilege levels they can do so.
45855
45856                    Defaults to Secure access from any master.
45857
45858                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45859                <resetValue>0x000000fc</resetValue>
45860                <fields>
45861                    <field>
45862                        <name>DBG</name>
45863                        <description>If 1, TIMER1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45864                        <bitRange>[7:7]</bitRange>
45865                        <access>read-write</access>
45866                    </field>
45867                    <field>
45868                        <name>DMA</name>
45869                        <description>If 1, TIMER1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45870                        <bitRange>[6:6]</bitRange>
45871                        <access>read-write</access>
45872                    </field>
45873                    <field>
45874                        <name>CORE1</name>
45875                        <description>If 1, TIMER1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45876                        <bitRange>[5:5]</bitRange>
45877                        <access>read-write</access>
45878                    </field>
45879                    <field>
45880                        <name>CORE0</name>
45881                        <description>If 1, TIMER1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45882                        <bitRange>[4:4]</bitRange>
45883                        <access>read-write</access>
45884                    </field>
45885                    <field>
45886                        <name>SP</name>
45887                        <description>If 1, TIMER1 can be accessed from a Secure, Privileged context.</description>
45888                        <bitRange>[3:3]</bitRange>
45889                        <access>read-write</access>
45890                    </field>
45891                    <field>
45892                        <name>SU</name>
45893                        <description>If 1, and SP is also set, TIMER1 can be accessed from a Secure, Unprivileged context.</description>
45894                        <bitRange>[2:2]</bitRange>
45895                        <access>read-write</access>
45896                    </field>
45897                    <field>
45898                        <name>NSP</name>
45899                        <description>If 1, TIMER1 can be accessed from a Non-secure, Privileged context.</description>
45900                        <bitRange>[1:1]</bitRange>
45901                        <access>read-write</access>
45902                    </field>
45903                    <field>
45904                        <name>NSU</name>
45905                        <description>If 1, and NSP is also set, TIMER1 can be accessed from a Non-secure, Unprivileged context.
45906
45907                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45908                        <bitRange>[0:0]</bitRange>
45909                        <access>read-write</access>
45910                    </field>
45911                </fields>
45912            </register>
45913            <register>
45914                <name>UART0</name>
45915                <addressOffset>0x000000a0</addressOffset>
45916                <description>Control whether debugger, DMA, core 0 and core 1 can access UART0, and at what security/privilege levels they can do so.
45917
45918                    Defaults to Secure access from any master.
45919
45920                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45921                <resetValue>0x000000fc</resetValue>
45922                <fields>
45923                    <field>
45924                        <name>DBG</name>
45925                        <description>If 1, UART0 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45926                        <bitRange>[7:7]</bitRange>
45927                        <access>read-write</access>
45928                    </field>
45929                    <field>
45930                        <name>DMA</name>
45931                        <description>If 1, UART0 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45932                        <bitRange>[6:6]</bitRange>
45933                        <access>read-write</access>
45934                    </field>
45935                    <field>
45936                        <name>CORE1</name>
45937                        <description>If 1, UART0 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45938                        <bitRange>[5:5]</bitRange>
45939                        <access>read-write</access>
45940                    </field>
45941                    <field>
45942                        <name>CORE0</name>
45943                        <description>If 1, UART0 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45944                        <bitRange>[4:4]</bitRange>
45945                        <access>read-write</access>
45946                    </field>
45947                    <field>
45948                        <name>SP</name>
45949                        <description>If 1, UART0 can be accessed from a Secure, Privileged context.</description>
45950                        <bitRange>[3:3]</bitRange>
45951                        <access>read-write</access>
45952                    </field>
45953                    <field>
45954                        <name>SU</name>
45955                        <description>If 1, and SP is also set, UART0 can be accessed from a Secure, Unprivileged context.</description>
45956                        <bitRange>[2:2]</bitRange>
45957                        <access>read-write</access>
45958                    </field>
45959                    <field>
45960                        <name>NSP</name>
45961                        <description>If 1, UART0 can be accessed from a Non-secure, Privileged context.</description>
45962                        <bitRange>[1:1]</bitRange>
45963                        <access>read-write</access>
45964                    </field>
45965                    <field>
45966                        <name>NSU</name>
45967                        <description>If 1, and NSP is also set, UART0 can be accessed from a Non-secure, Unprivileged context.
45968
45969                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
45970                        <bitRange>[0:0]</bitRange>
45971                        <access>read-write</access>
45972                    </field>
45973                </fields>
45974            </register>
45975            <register>
45976                <name>UART1</name>
45977                <addressOffset>0x000000a4</addressOffset>
45978                <description>Control whether debugger, DMA, core 0 and core 1 can access UART1, and at what security/privilege levels they can do so.
45979
45980                    Defaults to Secure access from any master.
45981
45982                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
45983                <resetValue>0x000000fc</resetValue>
45984                <fields>
45985                    <field>
45986                        <name>DBG</name>
45987                        <description>If 1, UART1 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45988                        <bitRange>[7:7]</bitRange>
45989                        <access>read-write</access>
45990                    </field>
45991                    <field>
45992                        <name>DMA</name>
45993                        <description>If 1, UART1 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
45994                        <bitRange>[6:6]</bitRange>
45995                        <access>read-write</access>
45996                    </field>
45997                    <field>
45998                        <name>CORE1</name>
45999                        <description>If 1, UART1 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46000                        <bitRange>[5:5]</bitRange>
46001                        <access>read-write</access>
46002                    </field>
46003                    <field>
46004                        <name>CORE0</name>
46005                        <description>If 1, UART1 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46006                        <bitRange>[4:4]</bitRange>
46007                        <access>read-write</access>
46008                    </field>
46009                    <field>
46010                        <name>SP</name>
46011                        <description>If 1, UART1 can be accessed from a Secure, Privileged context.</description>
46012                        <bitRange>[3:3]</bitRange>
46013                        <access>read-write</access>
46014                    </field>
46015                    <field>
46016                        <name>SU</name>
46017                        <description>If 1, and SP is also set, UART1 can be accessed from a Secure, Unprivileged context.</description>
46018                        <bitRange>[2:2]</bitRange>
46019                        <access>read-write</access>
46020                    </field>
46021                    <field>
46022                        <name>NSP</name>
46023                        <description>If 1, UART1 can be accessed from a Non-secure, Privileged context.</description>
46024                        <bitRange>[1:1]</bitRange>
46025                        <access>read-write</access>
46026                    </field>
46027                    <field>
46028                        <name>NSU</name>
46029                        <description>If 1, and NSP is also set, UART1 can be accessed from a Non-secure, Unprivileged context.
46030
46031                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46032                        <bitRange>[0:0]</bitRange>
46033                        <access>read-write</access>
46034                    </field>
46035                </fields>
46036            </register>
46037            <register>
46038                <name>OTP</name>
46039                <addressOffset>0x000000a8</addressOffset>
46040                <description>Control whether debugger, DMA, core 0 and core 1 can access OTP, and at what security/privilege levels they can do so.
46041
46042                    Defaults to Secure access from any master.
46043
46044                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46045                <resetValue>0x000000fc</resetValue>
46046                <fields>
46047                    <field>
46048                        <name>DBG</name>
46049                        <description>If 1, OTP can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46050                        <bitRange>[7:7]</bitRange>
46051                        <access>read-write</access>
46052                    </field>
46053                    <field>
46054                        <name>DMA</name>
46055                        <description>If 1, OTP can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46056                        <bitRange>[6:6]</bitRange>
46057                        <access>read-write</access>
46058                    </field>
46059                    <field>
46060                        <name>CORE1</name>
46061                        <description>If 1, OTP can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46062                        <bitRange>[5:5]</bitRange>
46063                        <access>read-write</access>
46064                    </field>
46065                    <field>
46066                        <name>CORE0</name>
46067                        <description>If 1, OTP can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46068                        <bitRange>[4:4]</bitRange>
46069                        <access>read-write</access>
46070                    </field>
46071                    <field>
46072                        <name>SP</name>
46073                        <description>If 1, OTP can be accessed from a Secure, Privileged context.</description>
46074                        <bitRange>[3:3]</bitRange>
46075                        <access>read-write</access>
46076                    </field>
46077                    <field>
46078                        <name>SU</name>
46079                        <description>If 1, and SP is also set, OTP can be accessed from a Secure, Unprivileged context.</description>
46080                        <bitRange>[2:2]</bitRange>
46081                        <access>read-write</access>
46082                    </field>
46083                    <field>
46084                        <name>NSP</name>
46085                        <description>If 1, OTP can be accessed from a Non-secure, Privileged context.</description>
46086                        <bitRange>[1:1]</bitRange>
46087                        <access>read-write</access>
46088                    </field>
46089                    <field>
46090                        <name>NSU</name>
46091                        <description>If 1, and NSP is also set, OTP can be accessed from a Non-secure, Unprivileged context.
46092
46093                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46094                        <bitRange>[0:0]</bitRange>
46095                        <access>read-write</access>
46096                    </field>
46097                </fields>
46098            </register>
46099            <register>
46100                <name>TBMAN</name>
46101                <addressOffset>0x000000ac</addressOffset>
46102                <description>Control whether debugger, DMA, core 0 and core 1 can access TBMAN, and at what security/privilege levels they can do so.
46103
46104                    Defaults to Secure access from any master.
46105
46106                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46107                <resetValue>0x000000fc</resetValue>
46108                <fields>
46109                    <field>
46110                        <name>DBG</name>
46111                        <description>If 1, TBMAN can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46112                        <bitRange>[7:7]</bitRange>
46113                        <access>read-write</access>
46114                    </field>
46115                    <field>
46116                        <name>DMA</name>
46117                        <description>If 1, TBMAN can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46118                        <bitRange>[6:6]</bitRange>
46119                        <access>read-write</access>
46120                    </field>
46121                    <field>
46122                        <name>CORE1</name>
46123                        <description>If 1, TBMAN can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46124                        <bitRange>[5:5]</bitRange>
46125                        <access>read-write</access>
46126                    </field>
46127                    <field>
46128                        <name>CORE0</name>
46129                        <description>If 1, TBMAN can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46130                        <bitRange>[4:4]</bitRange>
46131                        <access>read-write</access>
46132                    </field>
46133                    <field>
46134                        <name>SP</name>
46135                        <description>If 1, TBMAN can be accessed from a Secure, Privileged context.</description>
46136                        <bitRange>[3:3]</bitRange>
46137                        <access>read-write</access>
46138                    </field>
46139                    <field>
46140                        <name>SU</name>
46141                        <description>If 1, and SP is also set, TBMAN can be accessed from a Secure, Unprivileged context.</description>
46142                        <bitRange>[2:2]</bitRange>
46143                        <access>read-write</access>
46144                    </field>
46145                    <field>
46146                        <name>NSP</name>
46147                        <description>If 1, TBMAN can be accessed from a Non-secure, Privileged context.</description>
46148                        <bitRange>[1:1]</bitRange>
46149                        <access>read-write</access>
46150                    </field>
46151                    <field>
46152                        <name>NSU</name>
46153                        <description>If 1, and NSP is also set, TBMAN can be accessed from a Non-secure, Unprivileged context.
46154
46155                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46156                        <bitRange>[0:0]</bitRange>
46157                        <access>read-write</access>
46158                    </field>
46159                </fields>
46160            </register>
46161            <register>
46162                <name>POWMAN</name>
46163                <addressOffset>0x000000b0</addressOffset>
46164                <description>Control whether debugger, DMA, core 0 and core 1 can access POWMAN, and at what security/privilege levels they can do so.
46165
46166                    Defaults to Secure, Privileged processor or debug access only.
46167
46168                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46169                <resetValue>0x000000b8</resetValue>
46170                <fields>
46171                    <field>
46172                        <name>DBG</name>
46173                        <description>If 1, POWMAN can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46174                        <bitRange>[7:7]</bitRange>
46175                        <access>read-write</access>
46176                    </field>
46177                    <field>
46178                        <name>DMA</name>
46179                        <description>If 1, POWMAN can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46180                        <bitRange>[6:6]</bitRange>
46181                        <access>read-write</access>
46182                    </field>
46183                    <field>
46184                        <name>CORE1</name>
46185                        <description>If 1, POWMAN can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46186                        <bitRange>[5:5]</bitRange>
46187                        <access>read-write</access>
46188                    </field>
46189                    <field>
46190                        <name>CORE0</name>
46191                        <description>If 1, POWMAN can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46192                        <bitRange>[4:4]</bitRange>
46193                        <access>read-write</access>
46194                    </field>
46195                    <field>
46196                        <name>SP</name>
46197                        <description>If 1, POWMAN can be accessed from a Secure, Privileged context.</description>
46198                        <bitRange>[3:3]</bitRange>
46199                        <access>read-write</access>
46200                    </field>
46201                    <field>
46202                        <name>SU</name>
46203                        <description>If 1, and SP is also set, POWMAN can be accessed from a Secure, Unprivileged context.</description>
46204                        <bitRange>[2:2]</bitRange>
46205                        <access>read-write</access>
46206                    </field>
46207                    <field>
46208                        <name>NSP</name>
46209                        <description>If 1, POWMAN can be accessed from a Non-secure, Privileged context.</description>
46210                        <bitRange>[1:1]</bitRange>
46211                        <access>read-write</access>
46212                    </field>
46213                    <field>
46214                        <name>NSU</name>
46215                        <description>If 1, and NSP is also set, POWMAN can be accessed from a Non-secure, Unprivileged context.
46216
46217                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46218                        <bitRange>[0:0]</bitRange>
46219                        <access>read-write</access>
46220                    </field>
46221                </fields>
46222            </register>
46223            <register>
46224                <name>TRNG</name>
46225                <addressOffset>0x000000b4</addressOffset>
46226                <description>Control whether debugger, DMA, core 0 and core 1 can access TRNG, and at what security/privilege levels they can do so.
46227
46228                    Defaults to Secure, Privileged processor or debug access only.
46229
46230                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46231                <resetValue>0x000000b8</resetValue>
46232                <fields>
46233                    <field>
46234                        <name>DBG</name>
46235                        <description>If 1, TRNG can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46236                        <bitRange>[7:7]</bitRange>
46237                        <access>read-write</access>
46238                    </field>
46239                    <field>
46240                        <name>DMA</name>
46241                        <description>If 1, TRNG can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46242                        <bitRange>[6:6]</bitRange>
46243                        <access>read-write</access>
46244                    </field>
46245                    <field>
46246                        <name>CORE1</name>
46247                        <description>If 1, TRNG can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46248                        <bitRange>[5:5]</bitRange>
46249                        <access>read-write</access>
46250                    </field>
46251                    <field>
46252                        <name>CORE0</name>
46253                        <description>If 1, TRNG can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46254                        <bitRange>[4:4]</bitRange>
46255                        <access>read-write</access>
46256                    </field>
46257                    <field>
46258                        <name>SP</name>
46259                        <description>If 1, TRNG can be accessed from a Secure, Privileged context.</description>
46260                        <bitRange>[3:3]</bitRange>
46261                        <access>read-write</access>
46262                    </field>
46263                    <field>
46264                        <name>SU</name>
46265                        <description>If 1, and SP is also set, TRNG can be accessed from a Secure, Unprivileged context.</description>
46266                        <bitRange>[2:2]</bitRange>
46267                        <access>read-write</access>
46268                    </field>
46269                    <field>
46270                        <name>NSP</name>
46271                        <description>If 1, TRNG can be accessed from a Non-secure, Privileged context.</description>
46272                        <bitRange>[1:1]</bitRange>
46273                        <access>read-write</access>
46274                    </field>
46275                    <field>
46276                        <name>NSU</name>
46277                        <description>If 1, and NSP is also set, TRNG can be accessed from a Non-secure, Unprivileged context.
46278
46279                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46280                        <bitRange>[0:0]</bitRange>
46281                        <access>read-write</access>
46282                    </field>
46283                </fields>
46284            </register>
46285            <register>
46286                <name>SHA256</name>
46287                <addressOffset>0x000000b8</addressOffset>
46288                <description>Control whether debugger, DMA, core 0 and core 1 can access SHA256, and at what security/privilege levels they can do so.
46289
46290                    Defaults to Secure, Privileged access only.
46291
46292                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46293                <resetValue>0x000000f8</resetValue>
46294                <fields>
46295                    <field>
46296                        <name>DBG</name>
46297                        <description>If 1, SHA256 can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46298                        <bitRange>[7:7]</bitRange>
46299                        <access>read-write</access>
46300                    </field>
46301                    <field>
46302                        <name>DMA</name>
46303                        <description>If 1, SHA256 can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46304                        <bitRange>[6:6]</bitRange>
46305                        <access>read-write</access>
46306                    </field>
46307                    <field>
46308                        <name>CORE1</name>
46309                        <description>If 1, SHA256 can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46310                        <bitRange>[5:5]</bitRange>
46311                        <access>read-write</access>
46312                    </field>
46313                    <field>
46314                        <name>CORE0</name>
46315                        <description>If 1, SHA256 can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46316                        <bitRange>[4:4]</bitRange>
46317                        <access>read-write</access>
46318                    </field>
46319                    <field>
46320                        <name>SP</name>
46321                        <description>If 1, SHA256 can be accessed from a Secure, Privileged context.</description>
46322                        <bitRange>[3:3]</bitRange>
46323                        <access>read-write</access>
46324                    </field>
46325                    <field>
46326                        <name>SU</name>
46327                        <description>If 1, and SP is also set, SHA256 can be accessed from a Secure, Unprivileged context.</description>
46328                        <bitRange>[2:2]</bitRange>
46329                        <access>read-write</access>
46330                    </field>
46331                    <field>
46332                        <name>NSP</name>
46333                        <description>If 1, SHA256 can be accessed from a Non-secure, Privileged context.</description>
46334                        <bitRange>[1:1]</bitRange>
46335                        <access>read-write</access>
46336                    </field>
46337                    <field>
46338                        <name>NSU</name>
46339                        <description>If 1, and NSP is also set, SHA256 can be accessed from a Non-secure, Unprivileged context.
46340
46341                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46342                        <bitRange>[0:0]</bitRange>
46343                        <access>read-write</access>
46344                    </field>
46345                </fields>
46346            </register>
46347            <register>
46348                <name>SYSCFG</name>
46349                <addressOffset>0x000000bc</addressOffset>
46350                <description>Control whether debugger, DMA, core 0 and core 1 can access SYSCFG, and at what security/privilege levels they can do so.
46351
46352                    Defaults to Secure, Privileged processor or debug access only.
46353
46354                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46355                <resetValue>0x000000b8</resetValue>
46356                <fields>
46357                    <field>
46358                        <name>DBG</name>
46359                        <description>If 1, SYSCFG can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46360                        <bitRange>[7:7]</bitRange>
46361                        <access>read-write</access>
46362                    </field>
46363                    <field>
46364                        <name>DMA</name>
46365                        <description>If 1, SYSCFG can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46366                        <bitRange>[6:6]</bitRange>
46367                        <access>read-write</access>
46368                    </field>
46369                    <field>
46370                        <name>CORE1</name>
46371                        <description>If 1, SYSCFG can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46372                        <bitRange>[5:5]</bitRange>
46373                        <access>read-write</access>
46374                    </field>
46375                    <field>
46376                        <name>CORE0</name>
46377                        <description>If 1, SYSCFG can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46378                        <bitRange>[4:4]</bitRange>
46379                        <access>read-write</access>
46380                    </field>
46381                    <field>
46382                        <name>SP</name>
46383                        <description>If 1, SYSCFG can be accessed from a Secure, Privileged context.</description>
46384                        <bitRange>[3:3]</bitRange>
46385                        <access>read-write</access>
46386                    </field>
46387                    <field>
46388                        <name>SU</name>
46389                        <description>If 1, and SP is also set, SYSCFG can be accessed from a Secure, Unprivileged context.</description>
46390                        <bitRange>[2:2]</bitRange>
46391                        <access>read-write</access>
46392                    </field>
46393                    <field>
46394                        <name>NSP</name>
46395                        <description>If 1, SYSCFG can be accessed from a Non-secure, Privileged context.</description>
46396                        <bitRange>[1:1]</bitRange>
46397                        <access>read-write</access>
46398                    </field>
46399                    <field>
46400                        <name>NSU</name>
46401                        <description>If 1, and NSP is also set, SYSCFG can be accessed from a Non-secure, Unprivileged context.
46402
46403                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46404                        <bitRange>[0:0]</bitRange>
46405                        <access>read-write</access>
46406                    </field>
46407                </fields>
46408            </register>
46409            <register>
46410                <name>CLOCKS</name>
46411                <addressOffset>0x000000c0</addressOffset>
46412                <description>Control whether debugger, DMA, core 0 and core 1 can access CLOCKS, and at what security/privilege levels they can do so.
46413
46414                    Defaults to Secure, Privileged processor or debug access only.
46415
46416                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46417                <resetValue>0x000000b8</resetValue>
46418                <fields>
46419                    <field>
46420                        <name>DBG</name>
46421                        <description>If 1, CLOCKS can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46422                        <bitRange>[7:7]</bitRange>
46423                        <access>read-write</access>
46424                    </field>
46425                    <field>
46426                        <name>DMA</name>
46427                        <description>If 1, CLOCKS can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46428                        <bitRange>[6:6]</bitRange>
46429                        <access>read-write</access>
46430                    </field>
46431                    <field>
46432                        <name>CORE1</name>
46433                        <description>If 1, CLOCKS can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46434                        <bitRange>[5:5]</bitRange>
46435                        <access>read-write</access>
46436                    </field>
46437                    <field>
46438                        <name>CORE0</name>
46439                        <description>If 1, CLOCKS can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46440                        <bitRange>[4:4]</bitRange>
46441                        <access>read-write</access>
46442                    </field>
46443                    <field>
46444                        <name>SP</name>
46445                        <description>If 1, CLOCKS can be accessed from a Secure, Privileged context.</description>
46446                        <bitRange>[3:3]</bitRange>
46447                        <access>read-write</access>
46448                    </field>
46449                    <field>
46450                        <name>SU</name>
46451                        <description>If 1, and SP is also set, CLOCKS can be accessed from a Secure, Unprivileged context.</description>
46452                        <bitRange>[2:2]</bitRange>
46453                        <access>read-write</access>
46454                    </field>
46455                    <field>
46456                        <name>NSP</name>
46457                        <description>If 1, CLOCKS can be accessed from a Non-secure, Privileged context.</description>
46458                        <bitRange>[1:1]</bitRange>
46459                        <access>read-write</access>
46460                    </field>
46461                    <field>
46462                        <name>NSU</name>
46463                        <description>If 1, and NSP is also set, CLOCKS can be accessed from a Non-secure, Unprivileged context.
46464
46465                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46466                        <bitRange>[0:0]</bitRange>
46467                        <access>read-write</access>
46468                    </field>
46469                </fields>
46470            </register>
46471            <register>
46472                <name>XOSC</name>
46473                <addressOffset>0x000000c4</addressOffset>
46474                <description>Control whether debugger, DMA, core 0 and core 1 can access XOSC, and at what security/privilege levels they can do so.
46475
46476                    Defaults to Secure, Privileged processor or debug access only.
46477
46478                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46479                <resetValue>0x000000b8</resetValue>
46480                <fields>
46481                    <field>
46482                        <name>DBG</name>
46483                        <description>If 1, XOSC can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46484                        <bitRange>[7:7]</bitRange>
46485                        <access>read-write</access>
46486                    </field>
46487                    <field>
46488                        <name>DMA</name>
46489                        <description>If 1, XOSC can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46490                        <bitRange>[6:6]</bitRange>
46491                        <access>read-write</access>
46492                    </field>
46493                    <field>
46494                        <name>CORE1</name>
46495                        <description>If 1, XOSC can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46496                        <bitRange>[5:5]</bitRange>
46497                        <access>read-write</access>
46498                    </field>
46499                    <field>
46500                        <name>CORE0</name>
46501                        <description>If 1, XOSC can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46502                        <bitRange>[4:4]</bitRange>
46503                        <access>read-write</access>
46504                    </field>
46505                    <field>
46506                        <name>SP</name>
46507                        <description>If 1, XOSC can be accessed from a Secure, Privileged context.</description>
46508                        <bitRange>[3:3]</bitRange>
46509                        <access>read-write</access>
46510                    </field>
46511                    <field>
46512                        <name>SU</name>
46513                        <description>If 1, and SP is also set, XOSC can be accessed from a Secure, Unprivileged context.</description>
46514                        <bitRange>[2:2]</bitRange>
46515                        <access>read-write</access>
46516                    </field>
46517                    <field>
46518                        <name>NSP</name>
46519                        <description>If 1, XOSC can be accessed from a Non-secure, Privileged context.</description>
46520                        <bitRange>[1:1]</bitRange>
46521                        <access>read-write</access>
46522                    </field>
46523                    <field>
46524                        <name>NSU</name>
46525                        <description>If 1, and NSP is also set, XOSC can be accessed from a Non-secure, Unprivileged context.
46526
46527                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46528                        <bitRange>[0:0]</bitRange>
46529                        <access>read-write</access>
46530                    </field>
46531                </fields>
46532            </register>
46533            <register>
46534                <name>ROSC</name>
46535                <addressOffset>0x000000c8</addressOffset>
46536                <description>Control whether debugger, DMA, core 0 and core 1 can access ROSC, and at what security/privilege levels they can do so.
46537
46538                    Defaults to Secure, Privileged processor or debug access only.
46539
46540                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46541                <resetValue>0x000000b8</resetValue>
46542                <fields>
46543                    <field>
46544                        <name>DBG</name>
46545                        <description>If 1, ROSC can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46546                        <bitRange>[7:7]</bitRange>
46547                        <access>read-write</access>
46548                    </field>
46549                    <field>
46550                        <name>DMA</name>
46551                        <description>If 1, ROSC can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46552                        <bitRange>[6:6]</bitRange>
46553                        <access>read-write</access>
46554                    </field>
46555                    <field>
46556                        <name>CORE1</name>
46557                        <description>If 1, ROSC can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46558                        <bitRange>[5:5]</bitRange>
46559                        <access>read-write</access>
46560                    </field>
46561                    <field>
46562                        <name>CORE0</name>
46563                        <description>If 1, ROSC can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46564                        <bitRange>[4:4]</bitRange>
46565                        <access>read-write</access>
46566                    </field>
46567                    <field>
46568                        <name>SP</name>
46569                        <description>If 1, ROSC can be accessed from a Secure, Privileged context.</description>
46570                        <bitRange>[3:3]</bitRange>
46571                        <access>read-write</access>
46572                    </field>
46573                    <field>
46574                        <name>SU</name>
46575                        <description>If 1, and SP is also set, ROSC can be accessed from a Secure, Unprivileged context.</description>
46576                        <bitRange>[2:2]</bitRange>
46577                        <access>read-write</access>
46578                    </field>
46579                    <field>
46580                        <name>NSP</name>
46581                        <description>If 1, ROSC can be accessed from a Non-secure, Privileged context.</description>
46582                        <bitRange>[1:1]</bitRange>
46583                        <access>read-write</access>
46584                    </field>
46585                    <field>
46586                        <name>NSU</name>
46587                        <description>If 1, and NSP is also set, ROSC can be accessed from a Non-secure, Unprivileged context.
46588
46589                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46590                        <bitRange>[0:0]</bitRange>
46591                        <access>read-write</access>
46592                    </field>
46593                </fields>
46594            </register>
46595            <register>
46596                <name>PLL_SYS</name>
46597                <addressOffset>0x000000cc</addressOffset>
46598                <description>Control whether debugger, DMA, core 0 and core 1 can access PLL_SYS, and at what security/privilege levels they can do so.
46599
46600                    Defaults to Secure, Privileged processor or debug access only.
46601
46602                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46603                <resetValue>0x000000b8</resetValue>
46604                <fields>
46605                    <field>
46606                        <name>DBG</name>
46607                        <description>If 1, PLL_SYS can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46608                        <bitRange>[7:7]</bitRange>
46609                        <access>read-write</access>
46610                    </field>
46611                    <field>
46612                        <name>DMA</name>
46613                        <description>If 1, PLL_SYS can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46614                        <bitRange>[6:6]</bitRange>
46615                        <access>read-write</access>
46616                    </field>
46617                    <field>
46618                        <name>CORE1</name>
46619                        <description>If 1, PLL_SYS can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46620                        <bitRange>[5:5]</bitRange>
46621                        <access>read-write</access>
46622                    </field>
46623                    <field>
46624                        <name>CORE0</name>
46625                        <description>If 1, PLL_SYS can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46626                        <bitRange>[4:4]</bitRange>
46627                        <access>read-write</access>
46628                    </field>
46629                    <field>
46630                        <name>SP</name>
46631                        <description>If 1, PLL_SYS can be accessed from a Secure, Privileged context.</description>
46632                        <bitRange>[3:3]</bitRange>
46633                        <access>read-write</access>
46634                    </field>
46635                    <field>
46636                        <name>SU</name>
46637                        <description>If 1, and SP is also set, PLL_SYS can be accessed from a Secure, Unprivileged context.</description>
46638                        <bitRange>[2:2]</bitRange>
46639                        <access>read-write</access>
46640                    </field>
46641                    <field>
46642                        <name>NSP</name>
46643                        <description>If 1, PLL_SYS can be accessed from a Non-secure, Privileged context.</description>
46644                        <bitRange>[1:1]</bitRange>
46645                        <access>read-write</access>
46646                    </field>
46647                    <field>
46648                        <name>NSU</name>
46649                        <description>If 1, and NSP is also set, PLL_SYS can be accessed from a Non-secure, Unprivileged context.
46650
46651                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46652                        <bitRange>[0:0]</bitRange>
46653                        <access>read-write</access>
46654                    </field>
46655                </fields>
46656            </register>
46657            <register>
46658                <name>PLL_USB</name>
46659                <addressOffset>0x000000d0</addressOffset>
46660                <description>Control whether debugger, DMA, core 0 and core 1 can access PLL_USB, and at what security/privilege levels they can do so.
46661
46662                    Defaults to Secure, Privileged processor or debug access only.
46663
46664                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46665                <resetValue>0x000000b8</resetValue>
46666                <fields>
46667                    <field>
46668                        <name>DBG</name>
46669                        <description>If 1, PLL_USB can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46670                        <bitRange>[7:7]</bitRange>
46671                        <access>read-write</access>
46672                    </field>
46673                    <field>
46674                        <name>DMA</name>
46675                        <description>If 1, PLL_USB can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46676                        <bitRange>[6:6]</bitRange>
46677                        <access>read-write</access>
46678                    </field>
46679                    <field>
46680                        <name>CORE1</name>
46681                        <description>If 1, PLL_USB can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46682                        <bitRange>[5:5]</bitRange>
46683                        <access>read-write</access>
46684                    </field>
46685                    <field>
46686                        <name>CORE0</name>
46687                        <description>If 1, PLL_USB can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46688                        <bitRange>[4:4]</bitRange>
46689                        <access>read-write</access>
46690                    </field>
46691                    <field>
46692                        <name>SP</name>
46693                        <description>If 1, PLL_USB can be accessed from a Secure, Privileged context.</description>
46694                        <bitRange>[3:3]</bitRange>
46695                        <access>read-write</access>
46696                    </field>
46697                    <field>
46698                        <name>SU</name>
46699                        <description>If 1, and SP is also set, PLL_USB can be accessed from a Secure, Unprivileged context.</description>
46700                        <bitRange>[2:2]</bitRange>
46701                        <access>read-write</access>
46702                    </field>
46703                    <field>
46704                        <name>NSP</name>
46705                        <description>If 1, PLL_USB can be accessed from a Non-secure, Privileged context.</description>
46706                        <bitRange>[1:1]</bitRange>
46707                        <access>read-write</access>
46708                    </field>
46709                    <field>
46710                        <name>NSU</name>
46711                        <description>If 1, and NSP is also set, PLL_USB can be accessed from a Non-secure, Unprivileged context.
46712
46713                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46714                        <bitRange>[0:0]</bitRange>
46715                        <access>read-write</access>
46716                    </field>
46717                </fields>
46718            </register>
46719            <register>
46720                <name>TICKS</name>
46721                <addressOffset>0x000000d4</addressOffset>
46722                <description>Control whether debugger, DMA, core 0 and core 1 can access TICKS, and at what security/privilege levels they can do so.
46723
46724                    Defaults to Secure, Privileged processor or debug access only.
46725
46726                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46727                <resetValue>0x000000b8</resetValue>
46728                <fields>
46729                    <field>
46730                        <name>DBG</name>
46731                        <description>If 1, TICKS can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46732                        <bitRange>[7:7]</bitRange>
46733                        <access>read-write</access>
46734                    </field>
46735                    <field>
46736                        <name>DMA</name>
46737                        <description>If 1, TICKS can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46738                        <bitRange>[6:6]</bitRange>
46739                        <access>read-write</access>
46740                    </field>
46741                    <field>
46742                        <name>CORE1</name>
46743                        <description>If 1, TICKS can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46744                        <bitRange>[5:5]</bitRange>
46745                        <access>read-write</access>
46746                    </field>
46747                    <field>
46748                        <name>CORE0</name>
46749                        <description>If 1, TICKS can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46750                        <bitRange>[4:4]</bitRange>
46751                        <access>read-write</access>
46752                    </field>
46753                    <field>
46754                        <name>SP</name>
46755                        <description>If 1, TICKS can be accessed from a Secure, Privileged context.</description>
46756                        <bitRange>[3:3]</bitRange>
46757                        <access>read-write</access>
46758                    </field>
46759                    <field>
46760                        <name>SU</name>
46761                        <description>If 1, and SP is also set, TICKS can be accessed from a Secure, Unprivileged context.</description>
46762                        <bitRange>[2:2]</bitRange>
46763                        <access>read-write</access>
46764                    </field>
46765                    <field>
46766                        <name>NSP</name>
46767                        <description>If 1, TICKS can be accessed from a Non-secure, Privileged context.</description>
46768                        <bitRange>[1:1]</bitRange>
46769                        <access>read-write</access>
46770                    </field>
46771                    <field>
46772                        <name>NSU</name>
46773                        <description>If 1, and NSP is also set, TICKS can be accessed from a Non-secure, Unprivileged context.
46774
46775                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46776                        <bitRange>[0:0]</bitRange>
46777                        <access>read-write</access>
46778                    </field>
46779                </fields>
46780            </register>
46781            <register>
46782                <name>WATCHDOG</name>
46783                <addressOffset>0x000000d8</addressOffset>
46784                <description>Control whether debugger, DMA, core 0 and core 1 can access WATCHDOG, and at what security/privilege levels they can do so.
46785
46786                    Defaults to Secure, Privileged processor or debug access only.
46787
46788                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46789                <resetValue>0x000000b8</resetValue>
46790                <fields>
46791                    <field>
46792                        <name>DBG</name>
46793                        <description>If 1, WATCHDOG can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46794                        <bitRange>[7:7]</bitRange>
46795                        <access>read-write</access>
46796                    </field>
46797                    <field>
46798                        <name>DMA</name>
46799                        <description>If 1, WATCHDOG can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46800                        <bitRange>[6:6]</bitRange>
46801                        <access>read-write</access>
46802                    </field>
46803                    <field>
46804                        <name>CORE1</name>
46805                        <description>If 1, WATCHDOG can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46806                        <bitRange>[5:5]</bitRange>
46807                        <access>read-write</access>
46808                    </field>
46809                    <field>
46810                        <name>CORE0</name>
46811                        <description>If 1, WATCHDOG can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46812                        <bitRange>[4:4]</bitRange>
46813                        <access>read-write</access>
46814                    </field>
46815                    <field>
46816                        <name>SP</name>
46817                        <description>If 1, WATCHDOG can be accessed from a Secure, Privileged context.</description>
46818                        <bitRange>[3:3]</bitRange>
46819                        <access>read-write</access>
46820                    </field>
46821                    <field>
46822                        <name>SU</name>
46823                        <description>If 1, and SP is also set, WATCHDOG can be accessed from a Secure, Unprivileged context.</description>
46824                        <bitRange>[2:2]</bitRange>
46825                        <access>read-write</access>
46826                    </field>
46827                    <field>
46828                        <name>NSP</name>
46829                        <description>If 1, WATCHDOG can be accessed from a Non-secure, Privileged context.</description>
46830                        <bitRange>[1:1]</bitRange>
46831                        <access>read-write</access>
46832                    </field>
46833                    <field>
46834                        <name>NSU</name>
46835                        <description>If 1, and NSP is also set, WATCHDOG can be accessed from a Non-secure, Unprivileged context.
46836
46837                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46838                        <bitRange>[0:0]</bitRange>
46839                        <access>read-write</access>
46840                    </field>
46841                </fields>
46842            </register>
46843            <register>
46844                <name>RSM</name>
46845                <addressOffset>0x000000dc</addressOffset>
46846                <description>Control whether debugger, DMA, core 0 and core 1 can access RSM, and at what security/privilege levels they can do so.
46847
46848                    Defaults to Secure, Privileged processor or debug access only.
46849
46850                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46851                <resetValue>0x000000b8</resetValue>
46852                <fields>
46853                    <field>
46854                        <name>DBG</name>
46855                        <description>If 1, RSM can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46856                        <bitRange>[7:7]</bitRange>
46857                        <access>read-write</access>
46858                    </field>
46859                    <field>
46860                        <name>DMA</name>
46861                        <description>If 1, RSM can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46862                        <bitRange>[6:6]</bitRange>
46863                        <access>read-write</access>
46864                    </field>
46865                    <field>
46866                        <name>CORE1</name>
46867                        <description>If 1, RSM can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46868                        <bitRange>[5:5]</bitRange>
46869                        <access>read-write</access>
46870                    </field>
46871                    <field>
46872                        <name>CORE0</name>
46873                        <description>If 1, RSM can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46874                        <bitRange>[4:4]</bitRange>
46875                        <access>read-write</access>
46876                    </field>
46877                    <field>
46878                        <name>SP</name>
46879                        <description>If 1, RSM can be accessed from a Secure, Privileged context.</description>
46880                        <bitRange>[3:3]</bitRange>
46881                        <access>read-write</access>
46882                    </field>
46883                    <field>
46884                        <name>SU</name>
46885                        <description>If 1, and SP is also set, RSM can be accessed from a Secure, Unprivileged context.</description>
46886                        <bitRange>[2:2]</bitRange>
46887                        <access>read-write</access>
46888                    </field>
46889                    <field>
46890                        <name>NSP</name>
46891                        <description>If 1, RSM can be accessed from a Non-secure, Privileged context.</description>
46892                        <bitRange>[1:1]</bitRange>
46893                        <access>read-write</access>
46894                    </field>
46895                    <field>
46896                        <name>NSU</name>
46897                        <description>If 1, and NSP is also set, RSM can be accessed from a Non-secure, Unprivileged context.
46898
46899                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46900                        <bitRange>[0:0]</bitRange>
46901                        <access>read-write</access>
46902                    </field>
46903                </fields>
46904            </register>
46905            <register>
46906                <name>XIP_CTRL</name>
46907                <addressOffset>0x000000e0</addressOffset>
46908                <description>Control whether debugger, DMA, core 0 and core 1 can access XIP_CTRL, and at what security/privilege levels they can do so.
46909
46910                    Defaults to Secure, Privileged processor or debug access only.
46911
46912                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46913                <resetValue>0x000000b8</resetValue>
46914                <fields>
46915                    <field>
46916                        <name>DBG</name>
46917                        <description>If 1, XIP_CTRL can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46918                        <bitRange>[7:7]</bitRange>
46919                        <access>read-write</access>
46920                    </field>
46921                    <field>
46922                        <name>DMA</name>
46923                        <description>If 1, XIP_CTRL can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46924                        <bitRange>[6:6]</bitRange>
46925                        <access>read-write</access>
46926                    </field>
46927                    <field>
46928                        <name>CORE1</name>
46929                        <description>If 1, XIP_CTRL can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46930                        <bitRange>[5:5]</bitRange>
46931                        <access>read-write</access>
46932                    </field>
46933                    <field>
46934                        <name>CORE0</name>
46935                        <description>If 1, XIP_CTRL can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46936                        <bitRange>[4:4]</bitRange>
46937                        <access>read-write</access>
46938                    </field>
46939                    <field>
46940                        <name>SP</name>
46941                        <description>If 1, XIP_CTRL can be accessed from a Secure, Privileged context.</description>
46942                        <bitRange>[3:3]</bitRange>
46943                        <access>read-write</access>
46944                    </field>
46945                    <field>
46946                        <name>SU</name>
46947                        <description>If 1, and SP is also set, XIP_CTRL can be accessed from a Secure, Unprivileged context.</description>
46948                        <bitRange>[2:2]</bitRange>
46949                        <access>read-write</access>
46950                    </field>
46951                    <field>
46952                        <name>NSP</name>
46953                        <description>If 1, XIP_CTRL can be accessed from a Non-secure, Privileged context.</description>
46954                        <bitRange>[1:1]</bitRange>
46955                        <access>read-write</access>
46956                    </field>
46957                    <field>
46958                        <name>NSU</name>
46959                        <description>If 1, and NSP is also set, XIP_CTRL can be accessed from a Non-secure, Unprivileged context.
46960
46961                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
46962                        <bitRange>[0:0]</bitRange>
46963                        <access>read-write</access>
46964                    </field>
46965                </fields>
46966            </register>
46967            <register>
46968                <name>XIP_QMI</name>
46969                <addressOffset>0x000000e4</addressOffset>
46970                <description>Control whether debugger, DMA, core 0 and core 1 can access XIP_QMI, and at what security/privilege levels they can do so.
46971
46972                    Defaults to Secure, Privileged processor or debug access only.
46973
46974                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
46975                <resetValue>0x000000b8</resetValue>
46976                <fields>
46977                    <field>
46978                        <name>DBG</name>
46979                        <description>If 1, XIP_QMI can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46980                        <bitRange>[7:7]</bitRange>
46981                        <access>read-write</access>
46982                    </field>
46983                    <field>
46984                        <name>DMA</name>
46985                        <description>If 1, XIP_QMI can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46986                        <bitRange>[6:6]</bitRange>
46987                        <access>read-write</access>
46988                    </field>
46989                    <field>
46990                        <name>CORE1</name>
46991                        <description>If 1, XIP_QMI can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46992                        <bitRange>[5:5]</bitRange>
46993                        <access>read-write</access>
46994                    </field>
46995                    <field>
46996                        <name>CORE0</name>
46997                        <description>If 1, XIP_QMI can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
46998                        <bitRange>[4:4]</bitRange>
46999                        <access>read-write</access>
47000                    </field>
47001                    <field>
47002                        <name>SP</name>
47003                        <description>If 1, XIP_QMI can be accessed from a Secure, Privileged context.</description>
47004                        <bitRange>[3:3]</bitRange>
47005                        <access>read-write</access>
47006                    </field>
47007                    <field>
47008                        <name>SU</name>
47009                        <description>If 1, and SP is also set, XIP_QMI can be accessed from a Secure, Unprivileged context.</description>
47010                        <bitRange>[2:2]</bitRange>
47011                        <access>read-write</access>
47012                    </field>
47013                    <field>
47014                        <name>NSP</name>
47015                        <description>If 1, XIP_QMI can be accessed from a Non-secure, Privileged context.</description>
47016                        <bitRange>[1:1]</bitRange>
47017                        <access>read-write</access>
47018                    </field>
47019                    <field>
47020                        <name>NSU</name>
47021                        <description>If 1, and NSP is also set, XIP_QMI can be accessed from a Non-secure, Unprivileged context.
47022
47023                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
47024                        <bitRange>[0:0]</bitRange>
47025                        <access>read-write</access>
47026                    </field>
47027                </fields>
47028            </register>
47029            <register>
47030                <name>XIP_AUX</name>
47031                <addressOffset>0x000000e8</addressOffset>
47032                <description>Control whether debugger, DMA, core 0 and core 1 can access XIP_AUX, and at what security/privilege levels they can do so.
47033
47034                    Defaults to Secure, Privileged access only.
47035
47036                    This register is writable only from a Secure, Privileged processor or debugger, with the exception of the NSU bit, which becomes Non-secure-Privileged-writable when the NSP bit is set.</description>
47037                <resetValue>0x000000f8</resetValue>
47038                <fields>
47039                    <field>
47040                        <name>DBG</name>
47041                        <description>If 1, XIP_AUX can be accessed by the debugger, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
47042                        <bitRange>[7:7]</bitRange>
47043                        <access>read-write</access>
47044                    </field>
47045                    <field>
47046                        <name>DMA</name>
47047                        <description>If 1, XIP_AUX can be accessed by the DMA, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
47048                        <bitRange>[6:6]</bitRange>
47049                        <access>read-write</access>
47050                    </field>
47051                    <field>
47052                        <name>CORE1</name>
47053                        <description>If 1, XIP_AUX can be accessed by core 1, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
47054                        <bitRange>[5:5]</bitRange>
47055                        <access>read-write</access>
47056                    </field>
47057                    <field>
47058                        <name>CORE0</name>
47059                        <description>If 1, XIP_AUX can be accessed by core 0, at security/privilege levels permitted by SP/NSP/SU/NSU in this register.</description>
47060                        <bitRange>[4:4]</bitRange>
47061                        <access>read-write</access>
47062                    </field>
47063                    <field>
47064                        <name>SP</name>
47065                        <description>If 1, XIP_AUX can be accessed from a Secure, Privileged context.</description>
47066                        <bitRange>[3:3]</bitRange>
47067                        <access>read-write</access>
47068                    </field>
47069                    <field>
47070                        <name>SU</name>
47071                        <description>If 1, and SP is also set, XIP_AUX can be accessed from a Secure, Unprivileged context.</description>
47072                        <bitRange>[2:2]</bitRange>
47073                        <access>read-write</access>
47074                    </field>
47075                    <field>
47076                        <name>NSP</name>
47077                        <description>If 1, XIP_AUX can be accessed from a Non-secure, Privileged context.</description>
47078                        <bitRange>[1:1]</bitRange>
47079                        <access>read-write</access>
47080                    </field>
47081                    <field>
47082                        <name>NSU</name>
47083                        <description>If 1, and NSP is also set, XIP_AUX can be accessed from a Non-secure, Unprivileged context.
47084
47085                            This bit is writable from a Non-secure, Privileged context, if and only if the NSP bit is set.</description>
47086                        <bitRange>[0:0]</bitRange>
47087                        <access>read-write</access>
47088                    </field>
47089                </fields>
47090            </register>
47091        </registers>
47092    </peripheral>
47093    <peripheral>
47094        <name>UART0</name>
47095        <baseAddress>0x40070000</baseAddress>
47096        <addressBlock>
47097            <offset>0</offset>
47098            <size>4096</size>
47099            <usage>registers</usage>
47100        </addressBlock>
47101        <interrupt>
47102            <name>UART0_IRQ</name>
47103            <value>33</value>
47104        </interrupt>
47105        <registers>
47106            <register>
47107                <name>UARTDR</name>
47108                <addressOffset>0x00000000</addressOffset>
47109                <description>Data Register, UARTDR</description>
47110                <resetValue>0x00000000</resetValue>
47111                <fields>
47112                    <field>
47113                        <name>OE</name>
47114                        <description>Overrun error. This bit is set to 1 if data is received and the receive FIFO is already full. This is cleared to 0 once there is an empty space in the FIFO and a new character can be written to it.</description>
47115                        <bitRange>[11:11]</bitRange>
47116                        <access>read-only</access>
47117                    </field>
47118                    <field>
47119                        <name>BE</name>
47120                        <description>Break error. This bit is set to 1 if a break condition was detected, indicating that the received data input was held LOW for longer than a full-word transmission time (defined as start, data, parity and stop bits). In FIFO mode, this error is associated with the character at the top of the FIFO. When a break occurs, only one 0 character is loaded into the FIFO. The next character is only enabled after the receive data input goes to a 1 (marking state), and the next valid start bit is received.</description>
47121                        <bitRange>[10:10]</bitRange>
47122                        <access>read-only</access>
47123                    </field>
47124                    <field>
47125                        <name>PE</name>
47126                        <description>Parity error. When set to 1, it indicates that the parity of the received data character does not match the parity that the EPS and SPS bits in the Line Control Register, UARTLCR_H. In FIFO mode, this error is associated with the character at the top of the FIFO.</description>
47127                        <bitRange>[9:9]</bitRange>
47128                        <access>read-only</access>
47129                    </field>
47130                    <field>
47131                        <name>FE</name>
47132                        <description>Framing error. When set to 1, it indicates that the received character did not have a valid stop bit (a valid stop bit is 1). In FIFO mode, this error is associated with the character at the top of the FIFO.</description>
47133                        <bitRange>[8:8]</bitRange>
47134                        <access>read-only</access>
47135                    </field>
47136                    <field>
47137                        <name>DATA</name>
47138                        <description>Receive (read) data character. Transmit (write) data character.</description>
47139                        <bitRange>[7:0]</bitRange>
47140                        <access>read-write</access>
47141                        <readAction>modify</readAction>
47142                    </field>
47143                </fields>
47144            </register>
47145            <register>
47146                <name>UARTRSR</name>
47147                <addressOffset>0x00000004</addressOffset>
47148                <description>Receive Status Register/Error Clear Register, UARTRSR/UARTECR</description>
47149                <resetValue>0x00000000</resetValue>
47150                <fields>
47151                    <field>
47152                        <name>OE</name>
47153                        <description>Overrun error. This bit is set to 1 if data is received and the FIFO is already full. This bit is cleared to 0 by a write to UARTECR. The FIFO contents remain valid because no more data is written when the FIFO is full, only the contents of the shift register are overwritten. The CPU must now read the data, to empty the FIFO.</description>
47154                        <bitRange>[3:3]</bitRange>
47155                        <access>read-write</access>
47156                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47157                    </field>
47158                    <field>
47159                        <name>BE</name>
47160                        <description>Break error. This bit is set to 1 if a break condition was detected, indicating that the received data input was held LOW for longer than a full-word transmission time (defined as start, data, parity, and stop bits). This bit is cleared to 0 after a write to UARTECR. In FIFO mode, this error is associated with the character at the top of the FIFO. When a break occurs, only one 0 character is loaded into the FIFO. The next character is only enabled after the receive data input goes to a 1 (marking state) and the next valid start bit is received.</description>
47161                        <bitRange>[2:2]</bitRange>
47162                        <access>read-write</access>
47163                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47164                    </field>
47165                    <field>
47166                        <name>PE</name>
47167                        <description>Parity error. When set to 1, it indicates that the parity of the received data character does not match the parity that the EPS and SPS bits in the Line Control Register, UARTLCR_H. This bit is cleared to 0 by a write to UARTECR. In FIFO mode, this error is associated with the character at the top of the FIFO.</description>
47168                        <bitRange>[1:1]</bitRange>
47169                        <access>read-write</access>
47170                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47171                    </field>
47172                    <field>
47173                        <name>FE</name>
47174                        <description>Framing error. When set to 1, it indicates that the received character did not have a valid stop bit (a valid stop bit is 1). This bit is cleared to 0 by a write to UARTECR. In FIFO mode, this error is associated with the character at the top of the FIFO.</description>
47175                        <bitRange>[0:0]</bitRange>
47176                        <access>read-write</access>
47177                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47178                    </field>
47179                </fields>
47180            </register>
47181            <register>
47182                <name>UARTFR</name>
47183                <addressOffset>0x00000018</addressOffset>
47184                <description>Flag Register, UARTFR</description>
47185                <resetValue>0x00000090</resetValue>
47186                <fields>
47187                    <field>
47188                        <name>RI</name>
47189                        <description>Ring indicator. This bit is the complement of the UART ring indicator, nUARTRI, modem status input. That is, the bit is 1 when nUARTRI is LOW.</description>
47190                        <bitRange>[8:8]</bitRange>
47191                        <access>read-only</access>
47192                    </field>
47193                    <field>
47194                        <name>TXFE</name>
47195                        <description>Transmit FIFO empty. The meaning of this bit depends on the state of the FEN bit in the Line Control Register, UARTLCR_H. If the FIFO is disabled, this bit is set when the transmit holding register is empty. If the FIFO is enabled, the TXFE bit is set when the transmit FIFO is empty. This bit does not indicate if there is data in the transmit shift register.</description>
47196                        <bitRange>[7:7]</bitRange>
47197                        <access>read-only</access>
47198                    </field>
47199                    <field>
47200                        <name>RXFF</name>
47201                        <description>Receive FIFO full. The meaning of this bit depends on the state of the FEN bit in the UARTLCR_H Register. If the FIFO is disabled, this bit is set when the receive holding register is full. If the FIFO is enabled, the RXFF bit is set when the receive FIFO is full.</description>
47202                        <bitRange>[6:6]</bitRange>
47203                        <access>read-only</access>
47204                    </field>
47205                    <field>
47206                        <name>TXFF</name>
47207                        <description>Transmit FIFO full. The meaning of this bit depends on the state of the FEN bit in the UARTLCR_H Register. If the FIFO is disabled, this bit is set when the transmit holding register is full. If the FIFO is enabled, the TXFF bit is set when the transmit FIFO is full.</description>
47208                        <bitRange>[5:5]</bitRange>
47209                        <access>read-only</access>
47210                    </field>
47211                    <field>
47212                        <name>RXFE</name>
47213                        <description>Receive FIFO empty. The meaning of this bit depends on the state of the FEN bit in the UARTLCR_H Register. If the FIFO is disabled, this bit is set when the receive holding register is empty. If the FIFO is enabled, the RXFE bit is set when the receive FIFO is empty.</description>
47214                        <bitRange>[4:4]</bitRange>
47215                        <access>read-only</access>
47216                    </field>
47217                    <field>
47218                        <name>BUSY</name>
47219                        <description>UART busy. If this bit is set to 1, the UART is busy transmitting data. This bit remains set until the complete byte, including all the stop bits, has been sent from the shift register. This bit is set as soon as the transmit FIFO becomes non-empty, regardless of whether the UART is enabled or not.</description>
47220                        <bitRange>[3:3]</bitRange>
47221                        <access>read-only</access>
47222                    </field>
47223                    <field>
47224                        <name>DCD</name>
47225                        <description>Data carrier detect. This bit is the complement of the UART data carrier detect, nUARTDCD, modem status input. That is, the bit is 1 when nUARTDCD is LOW.</description>
47226                        <bitRange>[2:2]</bitRange>
47227                        <access>read-only</access>
47228                    </field>
47229                    <field>
47230                        <name>DSR</name>
47231                        <description>Data set ready. This bit is the complement of the UART data set ready, nUARTDSR, modem status input. That is, the bit is 1 when nUARTDSR is LOW.</description>
47232                        <bitRange>[1:1]</bitRange>
47233                        <access>read-only</access>
47234                    </field>
47235                    <field>
47236                        <name>CTS</name>
47237                        <description>Clear to send. This bit is the complement of the UART clear to send, nUARTCTS, modem status input. That is, the bit is 1 when nUARTCTS is LOW.</description>
47238                        <bitRange>[0:0]</bitRange>
47239                        <access>read-only</access>
47240                    </field>
47241                </fields>
47242            </register>
47243            <register>
47244                <name>UARTILPR</name>
47245                <addressOffset>0x00000020</addressOffset>
47246                <description>IrDA Low-Power Counter Register, UARTILPR</description>
47247                <resetValue>0x00000000</resetValue>
47248                <fields>
47249                    <field>
47250                        <name>ILPDVSR</name>
47251                        <description>8-bit low-power divisor value. These bits are cleared to 0 at reset.</description>
47252                        <bitRange>[7:0]</bitRange>
47253                        <access>read-write</access>
47254                    </field>
47255                </fields>
47256            </register>
47257            <register>
47258                <name>UARTIBRD</name>
47259                <addressOffset>0x00000024</addressOffset>
47260                <description>Integer Baud Rate Register, UARTIBRD</description>
47261                <resetValue>0x00000000</resetValue>
47262                <fields>
47263                    <field>
47264                        <name>BAUD_DIVINT</name>
47265                        <description>The integer baud rate divisor. These bits are cleared to 0 on reset.</description>
47266                        <bitRange>[15:0]</bitRange>
47267                        <access>read-write</access>
47268                    </field>
47269                </fields>
47270            </register>
47271            <register>
47272                <name>UARTFBRD</name>
47273                <addressOffset>0x00000028</addressOffset>
47274                <description>Fractional Baud Rate Register, UARTFBRD</description>
47275                <resetValue>0x00000000</resetValue>
47276                <fields>
47277                    <field>
47278                        <name>BAUD_DIVFRAC</name>
47279                        <description>The fractional baud rate divisor. These bits are cleared to 0 on reset.</description>
47280                        <bitRange>[5:0]</bitRange>
47281                        <access>read-write</access>
47282                    </field>
47283                </fields>
47284            </register>
47285            <register>
47286                <name>UARTLCR_H</name>
47287                <addressOffset>0x0000002c</addressOffset>
47288                <description>Line Control Register, UARTLCR_H</description>
47289                <resetValue>0x00000000</resetValue>
47290                <fields>
47291                    <field>
47292                        <name>SPS</name>
47293                        <description>Stick parity select. 0 = stick parity is disabled 1 = either: * if the EPS bit is 0 then the parity bit is transmitted and checked as a 1 * if the EPS bit is 1 then the parity bit is transmitted and checked as a 0. This bit has no effect when the PEN bit disables parity checking and generation.</description>
47294                        <bitRange>[7:7]</bitRange>
47295                        <access>read-write</access>
47296                    </field>
47297                    <field>
47298                        <name>WLEN</name>
47299                        <description>Word length. These bits indicate the number of data bits transmitted or received in a frame as follows: b11 = 8 bits b10 = 7 bits b01 = 6 bits b00 = 5 bits.</description>
47300                        <bitRange>[6:5]</bitRange>
47301                        <access>read-write</access>
47302                    </field>
47303                    <field>
47304                        <name>FEN</name>
47305                        <description>Enable FIFOs: 0 = FIFOs are disabled (character mode) that is, the FIFOs become 1-byte-deep holding registers 1 = transmit and receive FIFO buffers are enabled (FIFO mode).</description>
47306                        <bitRange>[4:4]</bitRange>
47307                        <access>read-write</access>
47308                    </field>
47309                    <field>
47310                        <name>STP2</name>
47311                        <description>Two stop bits select. If this bit is set to 1, two stop bits are transmitted at the end of the frame. The receive logic does not check for two stop bits being received.</description>
47312                        <bitRange>[3:3]</bitRange>
47313                        <access>read-write</access>
47314                    </field>
47315                    <field>
47316                        <name>EPS</name>
47317                        <description>Even parity select. Controls the type of parity the UART uses during transmission and reception: 0 = odd parity. The UART generates or checks for an odd number of 1s in the data and parity bits. 1 = even parity. The UART generates or checks for an even number of 1s in the data and parity bits. This bit has no effect when the PEN bit disables parity checking and generation.</description>
47318                        <bitRange>[2:2]</bitRange>
47319                        <access>read-write</access>
47320                    </field>
47321                    <field>
47322                        <name>PEN</name>
47323                        <description>Parity enable: 0 = parity is disabled and no parity bit added to the data frame 1 = parity checking and generation is enabled.</description>
47324                        <bitRange>[1:1]</bitRange>
47325                        <access>read-write</access>
47326                    </field>
47327                    <field>
47328                        <name>BRK</name>
47329                        <description>Send break. If this bit is set to 1, a low-level is continually output on the UARTTXD output, after completing transmission of the current character. For the proper execution of the break command, the software must set this bit for at least two complete frames. For normal use, this bit must be cleared to 0.</description>
47330                        <bitRange>[0:0]</bitRange>
47331                        <access>read-write</access>
47332                    </field>
47333                </fields>
47334            </register>
47335            <register>
47336                <name>UARTCR</name>
47337                <addressOffset>0x00000030</addressOffset>
47338                <description>Control Register, UARTCR</description>
47339                <resetValue>0x00000300</resetValue>
47340                <fields>
47341                    <field>
47342                        <name>CTSEN</name>
47343                        <description>CTS hardware flow control enable. If this bit is set to 1, CTS hardware flow control is enabled. Data is only transmitted when the nUARTCTS signal is asserted.</description>
47344                        <bitRange>[15:15]</bitRange>
47345                        <access>read-write</access>
47346                    </field>
47347                    <field>
47348                        <name>RTSEN</name>
47349                        <description>RTS hardware flow control enable. If this bit is set to 1, RTS hardware flow control is enabled. Data is only requested when there is space in the receive FIFO for it to be received.</description>
47350                        <bitRange>[14:14]</bitRange>
47351                        <access>read-write</access>
47352                    </field>
47353                    <field>
47354                        <name>OUT2</name>
47355                        <description>This bit is the complement of the UART Out2 (nUARTOut2) modem status output. That is, when the bit is programmed to a 1, the output is 0. For DTE this can be used as Ring Indicator (RI).</description>
47356                        <bitRange>[13:13]</bitRange>
47357                        <access>read-write</access>
47358                    </field>
47359                    <field>
47360                        <name>OUT1</name>
47361                        <description>This bit is the complement of the UART Out1 (nUARTOut1) modem status output. That is, when the bit is programmed to a 1 the output is 0. For DTE this can be used as Data Carrier Detect (DCD).</description>
47362                        <bitRange>[12:12]</bitRange>
47363                        <access>read-write</access>
47364                    </field>
47365                    <field>
47366                        <name>RTS</name>
47367                        <description>Request to send. This bit is the complement of the UART request to send, nUARTRTS, modem status output. That is, when the bit is programmed to a 1 then nUARTRTS is LOW.</description>
47368                        <bitRange>[11:11]</bitRange>
47369                        <access>read-write</access>
47370                    </field>
47371                    <field>
47372                        <name>DTR</name>
47373                        <description>Data transmit ready. This bit is the complement of the UART data transmit ready, nUARTDTR, modem status output. That is, when the bit is programmed to a 1 then nUARTDTR is LOW.</description>
47374                        <bitRange>[10:10]</bitRange>
47375                        <access>read-write</access>
47376                    </field>
47377                    <field>
47378                        <name>RXE</name>
47379                        <description>Receive enable. If this bit is set to 1, the receive section of the UART is enabled. Data reception occurs for either UART signals or SIR signals depending on the setting of the SIREN bit. When the UART is disabled in the middle of reception, it completes the current character before stopping.</description>
47380                        <bitRange>[9:9]</bitRange>
47381                        <access>read-write</access>
47382                    </field>
47383                    <field>
47384                        <name>TXE</name>
47385                        <description>Transmit enable. If this bit is set to 1, the transmit section of the UART is enabled. Data transmission occurs for either UART signals, or SIR signals depending on the setting of the SIREN bit. When the UART is disabled in the middle of transmission, it completes the current character before stopping.</description>
47386                        <bitRange>[8:8]</bitRange>
47387                        <access>read-write</access>
47388                    </field>
47389                    <field>
47390                        <name>LBE</name>
47391                        <description>Loopback enable. If this bit is set to 1 and the SIREN bit is set to 1 and the SIRTEST bit in the Test Control Register, UARTTCR is set to 1, then the nSIROUT path is inverted, and fed through to the SIRIN path. The SIRTEST bit in the test register must be set to 1 to override the normal half-duplex SIR operation. This must be the requirement for accessing the test registers during normal operation, and SIRTEST must be cleared to 0 when loopback testing is finished. This feature reduces the amount of external coupling required during system test. If this bit is set to 1, and the SIRTEST bit is set to 0, the UARTTXD path is fed through to the UARTRXD path. In either SIR mode or UART mode, when this bit is set, the modem outputs are also fed through to the modem inputs. This bit is cleared to 0 on reset, to disable loopback.</description>
47392                        <bitRange>[7:7]</bitRange>
47393                        <access>read-write</access>
47394                    </field>
47395                    <field>
47396                        <name>SIRLP</name>
47397                        <description>SIR low-power IrDA mode. This bit selects the IrDA encoding mode. If this bit is cleared to 0, low-level bits are transmitted as an active high pulse with a width of 3 / 16th of the bit period. If this bit is set to 1, low-level bits are transmitted with a pulse width that is 3 times the period of the IrLPBaud16 input signal, regardless of the selected bit rate. Setting this bit uses less power, but might reduce transmission distances.</description>
47398                        <bitRange>[2:2]</bitRange>
47399                        <access>read-write</access>
47400                    </field>
47401                    <field>
47402                        <name>SIREN</name>
47403                        <description>SIR enable: 0 = IrDA SIR ENDEC is disabled. nSIROUT remains LOW (no light pulse generated), and signal transitions on SIRIN have no effect. 1 = IrDA SIR ENDEC is enabled. Data is transmitted and received on nSIROUT and SIRIN. UARTTXD remains HIGH, in the marking state. Signal transitions on UARTRXD or modem status inputs have no effect. This bit has no effect if the UARTEN bit disables the UART.</description>
47404                        <bitRange>[1:1]</bitRange>
47405                        <access>read-write</access>
47406                    </field>
47407                    <field>
47408                        <name>UARTEN</name>
47409                        <description>UART enable: 0 = UART is disabled. If the UART is disabled in the middle of transmission or reception, it completes the current character before stopping. 1 = the UART is enabled. Data transmission and reception occurs for either UART signals or SIR signals depending on the setting of the SIREN bit.</description>
47410                        <bitRange>[0:0]</bitRange>
47411                        <access>read-write</access>
47412                    </field>
47413                </fields>
47414            </register>
47415            <register>
47416                <name>UARTIFLS</name>
47417                <addressOffset>0x00000034</addressOffset>
47418                <description>Interrupt FIFO Level Select Register, UARTIFLS</description>
47419                <resetValue>0x00000012</resetValue>
47420                <fields>
47421                    <field>
47422                        <name>RXIFLSEL</name>
47423                        <description>Receive interrupt FIFO level select. The trigger points for the receive interrupt are as follows: b000 = Receive FIFO becomes &gt;= 1 / 8 full b001 = Receive FIFO becomes &gt;= 1 / 4 full b010 = Receive FIFO becomes &gt;= 1 / 2 full b011 = Receive FIFO becomes &gt;= 3 / 4 full b100 = Receive FIFO becomes &gt;= 7 / 8 full b101-b111 = reserved.</description>
47424                        <bitRange>[5:3]</bitRange>
47425                        <access>read-write</access>
47426                    </field>
47427                    <field>
47428                        <name>TXIFLSEL</name>
47429                        <description>Transmit interrupt FIFO level select. The trigger points for the transmit interrupt are as follows: b000 = Transmit FIFO becomes &lt;= 1 / 8 full b001 = Transmit FIFO becomes &lt;= 1 / 4 full b010 = Transmit FIFO becomes &lt;= 1 / 2 full b011 = Transmit FIFO becomes &lt;= 3 / 4 full b100 = Transmit FIFO becomes &lt;= 7 / 8 full b101-b111 = reserved.</description>
47430                        <bitRange>[2:0]</bitRange>
47431                        <access>read-write</access>
47432                    </field>
47433                </fields>
47434            </register>
47435            <register>
47436                <name>UARTIMSC</name>
47437                <addressOffset>0x00000038</addressOffset>
47438                <description>Interrupt Mask Set/Clear Register, UARTIMSC</description>
47439                <resetValue>0x00000000</resetValue>
47440                <fields>
47441                    <field>
47442                        <name>OEIM</name>
47443                        <description>Overrun error interrupt mask. A read returns the current mask for the UARTOEINTR interrupt. On a write of 1, the mask of the UARTOEINTR interrupt is set. A write of 0 clears the mask.</description>
47444                        <bitRange>[10:10]</bitRange>
47445                        <access>read-write</access>
47446                    </field>
47447                    <field>
47448                        <name>BEIM</name>
47449                        <description>Break error interrupt mask. A read returns the current mask for the UARTBEINTR interrupt. On a write of 1, the mask of the UARTBEINTR interrupt is set. A write of 0 clears the mask.</description>
47450                        <bitRange>[9:9]</bitRange>
47451                        <access>read-write</access>
47452                    </field>
47453                    <field>
47454                        <name>PEIM</name>
47455                        <description>Parity error interrupt mask. A read returns the current mask for the UARTPEINTR interrupt. On a write of 1, the mask of the UARTPEINTR interrupt is set. A write of 0 clears the mask.</description>
47456                        <bitRange>[8:8]</bitRange>
47457                        <access>read-write</access>
47458                    </field>
47459                    <field>
47460                        <name>FEIM</name>
47461                        <description>Framing error interrupt mask. A read returns the current mask for the UARTFEINTR interrupt. On a write of 1, the mask of the UARTFEINTR interrupt is set. A write of 0 clears the mask.</description>
47462                        <bitRange>[7:7]</bitRange>
47463                        <access>read-write</access>
47464                    </field>
47465                    <field>
47466                        <name>RTIM</name>
47467                        <description>Receive timeout interrupt mask. A read returns the current mask for the UARTRTINTR interrupt. On a write of 1, the mask of the UARTRTINTR interrupt is set. A write of 0 clears the mask.</description>
47468                        <bitRange>[6:6]</bitRange>
47469                        <access>read-write</access>
47470                    </field>
47471                    <field>
47472                        <name>TXIM</name>
47473                        <description>Transmit interrupt mask. A read returns the current mask for the UARTTXINTR interrupt. On a write of 1, the mask of the UARTTXINTR interrupt is set. A write of 0 clears the mask.</description>
47474                        <bitRange>[5:5]</bitRange>
47475                        <access>read-write</access>
47476                    </field>
47477                    <field>
47478                        <name>RXIM</name>
47479                        <description>Receive interrupt mask. A read returns the current mask for the UARTRXINTR interrupt. On a write of 1, the mask of the UARTRXINTR interrupt is set. A write of 0 clears the mask.</description>
47480                        <bitRange>[4:4]</bitRange>
47481                        <access>read-write</access>
47482                    </field>
47483                    <field>
47484                        <name>DSRMIM</name>
47485                        <description>nUARTDSR modem interrupt mask. A read returns the current mask for the UARTDSRINTR interrupt. On a write of 1, the mask of the UARTDSRINTR interrupt is set. A write of 0 clears the mask.</description>
47486                        <bitRange>[3:3]</bitRange>
47487                        <access>read-write</access>
47488                    </field>
47489                    <field>
47490                        <name>DCDMIM</name>
47491                        <description>nUARTDCD modem interrupt mask. A read returns the current mask for the UARTDCDINTR interrupt. On a write of 1, the mask of the UARTDCDINTR interrupt is set. A write of 0 clears the mask.</description>
47492                        <bitRange>[2:2]</bitRange>
47493                        <access>read-write</access>
47494                    </field>
47495                    <field>
47496                        <name>CTSMIM</name>
47497                        <description>nUARTCTS modem interrupt mask. A read returns the current mask for the UARTCTSINTR interrupt. On a write of 1, the mask of the UARTCTSINTR interrupt is set. A write of 0 clears the mask.</description>
47498                        <bitRange>[1:1]</bitRange>
47499                        <access>read-write</access>
47500                    </field>
47501                    <field>
47502                        <name>RIMIM</name>
47503                        <description>nUARTRI modem interrupt mask. A read returns the current mask for the UARTRIINTR interrupt. On a write of 1, the mask of the UARTRIINTR interrupt is set. A write of 0 clears the mask.</description>
47504                        <bitRange>[0:0]</bitRange>
47505                        <access>read-write</access>
47506                    </field>
47507                </fields>
47508            </register>
47509            <register>
47510                <name>UARTRIS</name>
47511                <addressOffset>0x0000003c</addressOffset>
47512                <description>Raw Interrupt Status Register, UARTRIS</description>
47513                <resetValue>0x00000000</resetValue>
47514                <fields>
47515                    <field>
47516                        <name>OERIS</name>
47517                        <description>Overrun error interrupt status. Returns the raw interrupt state of the UARTOEINTR interrupt.</description>
47518                        <bitRange>[10:10]</bitRange>
47519                        <access>read-only</access>
47520                    </field>
47521                    <field>
47522                        <name>BERIS</name>
47523                        <description>Break error interrupt status. Returns the raw interrupt state of the UARTBEINTR interrupt.</description>
47524                        <bitRange>[9:9]</bitRange>
47525                        <access>read-only</access>
47526                    </field>
47527                    <field>
47528                        <name>PERIS</name>
47529                        <description>Parity error interrupt status. Returns the raw interrupt state of the UARTPEINTR interrupt.</description>
47530                        <bitRange>[8:8]</bitRange>
47531                        <access>read-only</access>
47532                    </field>
47533                    <field>
47534                        <name>FERIS</name>
47535                        <description>Framing error interrupt status. Returns the raw interrupt state of the UARTFEINTR interrupt.</description>
47536                        <bitRange>[7:7]</bitRange>
47537                        <access>read-only</access>
47538                    </field>
47539                    <field>
47540                        <name>RTRIS</name>
47541                        <description>Receive timeout interrupt status. Returns the raw interrupt state of the UARTRTINTR interrupt. a</description>
47542                        <bitRange>[6:6]</bitRange>
47543                        <access>read-only</access>
47544                    </field>
47545                    <field>
47546                        <name>TXRIS</name>
47547                        <description>Transmit interrupt status. Returns the raw interrupt state of the UARTTXINTR interrupt.</description>
47548                        <bitRange>[5:5]</bitRange>
47549                        <access>read-only</access>
47550                    </field>
47551                    <field>
47552                        <name>RXRIS</name>
47553                        <description>Receive interrupt status. Returns the raw interrupt state of the UARTRXINTR interrupt.</description>
47554                        <bitRange>[4:4]</bitRange>
47555                        <access>read-only</access>
47556                    </field>
47557                    <field>
47558                        <name>DSRRMIS</name>
47559                        <description>nUARTDSR modem interrupt status. Returns the raw interrupt state of the UARTDSRINTR interrupt.</description>
47560                        <bitRange>[3:3]</bitRange>
47561                        <access>read-only</access>
47562                    </field>
47563                    <field>
47564                        <name>DCDRMIS</name>
47565                        <description>nUARTDCD modem interrupt status. Returns the raw interrupt state of the UARTDCDINTR interrupt.</description>
47566                        <bitRange>[2:2]</bitRange>
47567                        <access>read-only</access>
47568                    </field>
47569                    <field>
47570                        <name>CTSRMIS</name>
47571                        <description>nUARTCTS modem interrupt status. Returns the raw interrupt state of the UARTCTSINTR interrupt.</description>
47572                        <bitRange>[1:1]</bitRange>
47573                        <access>read-only</access>
47574                    </field>
47575                    <field>
47576                        <name>RIRMIS</name>
47577                        <description>nUARTRI modem interrupt status. Returns the raw interrupt state of the UARTRIINTR interrupt.</description>
47578                        <bitRange>[0:0]</bitRange>
47579                        <access>read-only</access>
47580                    </field>
47581                </fields>
47582            </register>
47583            <register>
47584                <name>UARTMIS</name>
47585                <addressOffset>0x00000040</addressOffset>
47586                <description>Masked Interrupt Status Register, UARTMIS</description>
47587                <resetValue>0x00000000</resetValue>
47588                <fields>
47589                    <field>
47590                        <name>OEMIS</name>
47591                        <description>Overrun error masked interrupt status. Returns the masked interrupt state of the UARTOEINTR interrupt.</description>
47592                        <bitRange>[10:10]</bitRange>
47593                        <access>read-only</access>
47594                    </field>
47595                    <field>
47596                        <name>BEMIS</name>
47597                        <description>Break error masked interrupt status. Returns the masked interrupt state of the UARTBEINTR interrupt.</description>
47598                        <bitRange>[9:9]</bitRange>
47599                        <access>read-only</access>
47600                    </field>
47601                    <field>
47602                        <name>PEMIS</name>
47603                        <description>Parity error masked interrupt status. Returns the masked interrupt state of the UARTPEINTR interrupt.</description>
47604                        <bitRange>[8:8]</bitRange>
47605                        <access>read-only</access>
47606                    </field>
47607                    <field>
47608                        <name>FEMIS</name>
47609                        <description>Framing error masked interrupt status. Returns the masked interrupt state of the UARTFEINTR interrupt.</description>
47610                        <bitRange>[7:7]</bitRange>
47611                        <access>read-only</access>
47612                    </field>
47613                    <field>
47614                        <name>RTMIS</name>
47615                        <description>Receive timeout masked interrupt status. Returns the masked interrupt state of the UARTRTINTR interrupt.</description>
47616                        <bitRange>[6:6]</bitRange>
47617                        <access>read-only</access>
47618                    </field>
47619                    <field>
47620                        <name>TXMIS</name>
47621                        <description>Transmit masked interrupt status. Returns the masked interrupt state of the UARTTXINTR interrupt.</description>
47622                        <bitRange>[5:5]</bitRange>
47623                        <access>read-only</access>
47624                    </field>
47625                    <field>
47626                        <name>RXMIS</name>
47627                        <description>Receive masked interrupt status. Returns the masked interrupt state of the UARTRXINTR interrupt.</description>
47628                        <bitRange>[4:4]</bitRange>
47629                        <access>read-only</access>
47630                    </field>
47631                    <field>
47632                        <name>DSRMMIS</name>
47633                        <description>nUARTDSR modem masked interrupt status. Returns the masked interrupt state of the UARTDSRINTR interrupt.</description>
47634                        <bitRange>[3:3]</bitRange>
47635                        <access>read-only</access>
47636                    </field>
47637                    <field>
47638                        <name>DCDMMIS</name>
47639                        <description>nUARTDCD modem masked interrupt status. Returns the masked interrupt state of the UARTDCDINTR interrupt.</description>
47640                        <bitRange>[2:2]</bitRange>
47641                        <access>read-only</access>
47642                    </field>
47643                    <field>
47644                        <name>CTSMMIS</name>
47645                        <description>nUARTCTS modem masked interrupt status. Returns the masked interrupt state of the UARTCTSINTR interrupt.</description>
47646                        <bitRange>[1:1]</bitRange>
47647                        <access>read-only</access>
47648                    </field>
47649                    <field>
47650                        <name>RIMMIS</name>
47651                        <description>nUARTRI modem masked interrupt status. Returns the masked interrupt state of the UARTRIINTR interrupt.</description>
47652                        <bitRange>[0:0]</bitRange>
47653                        <access>read-only</access>
47654                    </field>
47655                </fields>
47656            </register>
47657            <register>
47658                <name>UARTICR</name>
47659                <addressOffset>0x00000044</addressOffset>
47660                <description>Interrupt Clear Register, UARTICR</description>
47661                <resetValue>0x00000000</resetValue>
47662                <fields>
47663                    <field>
47664                        <name>OEIC</name>
47665                        <description>Overrun error interrupt clear. Clears the UARTOEINTR interrupt.</description>
47666                        <bitRange>[10:10]</bitRange>
47667                        <access>read-write</access>
47668                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47669                    </field>
47670                    <field>
47671                        <name>BEIC</name>
47672                        <description>Break error interrupt clear. Clears the UARTBEINTR interrupt.</description>
47673                        <bitRange>[9:9]</bitRange>
47674                        <access>read-write</access>
47675                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47676                    </field>
47677                    <field>
47678                        <name>PEIC</name>
47679                        <description>Parity error interrupt clear. Clears the UARTPEINTR interrupt.</description>
47680                        <bitRange>[8:8]</bitRange>
47681                        <access>read-write</access>
47682                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47683                    </field>
47684                    <field>
47685                        <name>FEIC</name>
47686                        <description>Framing error interrupt clear. Clears the UARTFEINTR interrupt.</description>
47687                        <bitRange>[7:7]</bitRange>
47688                        <access>read-write</access>
47689                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47690                    </field>
47691                    <field>
47692                        <name>RTIC</name>
47693                        <description>Receive timeout interrupt clear. Clears the UARTRTINTR interrupt.</description>
47694                        <bitRange>[6:6]</bitRange>
47695                        <access>read-write</access>
47696                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47697                    </field>
47698                    <field>
47699                        <name>TXIC</name>
47700                        <description>Transmit interrupt clear. Clears the UARTTXINTR interrupt.</description>
47701                        <bitRange>[5:5]</bitRange>
47702                        <access>read-write</access>
47703                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47704                    </field>
47705                    <field>
47706                        <name>RXIC</name>
47707                        <description>Receive interrupt clear. Clears the UARTRXINTR interrupt.</description>
47708                        <bitRange>[4:4]</bitRange>
47709                        <access>read-write</access>
47710                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47711                    </field>
47712                    <field>
47713                        <name>DSRMIC</name>
47714                        <description>nUARTDSR modem interrupt clear. Clears the UARTDSRINTR interrupt.</description>
47715                        <bitRange>[3:3]</bitRange>
47716                        <access>read-write</access>
47717                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47718                    </field>
47719                    <field>
47720                        <name>DCDMIC</name>
47721                        <description>nUARTDCD modem interrupt clear. Clears the UARTDCDINTR interrupt.</description>
47722                        <bitRange>[2:2]</bitRange>
47723                        <access>read-write</access>
47724                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47725                    </field>
47726                    <field>
47727                        <name>CTSMIC</name>
47728                        <description>nUARTCTS modem interrupt clear. Clears the UARTCTSINTR interrupt.</description>
47729                        <bitRange>[1:1]</bitRange>
47730                        <access>read-write</access>
47731                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47732                    </field>
47733                    <field>
47734                        <name>RIMIC</name>
47735                        <description>nUARTRI modem interrupt clear. Clears the UARTRIINTR interrupt.</description>
47736                        <bitRange>[0:0]</bitRange>
47737                        <access>read-write</access>
47738                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
47739                    </field>
47740                </fields>
47741            </register>
47742            <register>
47743                <name>UARTDMACR</name>
47744                <addressOffset>0x00000048</addressOffset>
47745                <description>DMA Control Register, UARTDMACR</description>
47746                <resetValue>0x00000000</resetValue>
47747                <fields>
47748                    <field>
47749                        <name>DMAONERR</name>
47750                        <description>DMA on error. If this bit is set to 1, the DMA receive request outputs, UARTRXDMASREQ or UARTRXDMABREQ, are disabled when the UART error interrupt is asserted.</description>
47751                        <bitRange>[2:2]</bitRange>
47752                        <access>read-write</access>
47753                    </field>
47754                    <field>
47755                        <name>TXDMAE</name>
47756                        <description>Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled.</description>
47757                        <bitRange>[1:1]</bitRange>
47758                        <access>read-write</access>
47759                    </field>
47760                    <field>
47761                        <name>RXDMAE</name>
47762                        <description>Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled.</description>
47763                        <bitRange>[0:0]</bitRange>
47764                        <access>read-write</access>
47765                    </field>
47766                </fields>
47767            </register>
47768            <register>
47769                <name>UARTPERIPHID0</name>
47770                <addressOffset>0x00000fe0</addressOffset>
47771                <description>UARTPeriphID0 Register</description>
47772                <resetValue>0x00000011</resetValue>
47773                <fields>
47774                    <field>
47775                        <name>PARTNUMBER0</name>
47776                        <description>These bits read back as 0x11</description>
47777                        <bitRange>[7:0]</bitRange>
47778                        <access>read-only</access>
47779                    </field>
47780                </fields>
47781            </register>
47782            <register>
47783                <name>UARTPERIPHID1</name>
47784                <addressOffset>0x00000fe4</addressOffset>
47785                <description>UARTPeriphID1 Register</description>
47786                <resetValue>0x00000010</resetValue>
47787                <fields>
47788                    <field>
47789                        <name>DESIGNER0</name>
47790                        <description>These bits read back as 0x1</description>
47791                        <bitRange>[7:4]</bitRange>
47792                        <access>read-only</access>
47793                    </field>
47794                    <field>
47795                        <name>PARTNUMBER1</name>
47796                        <description>These bits read back as 0x0</description>
47797                        <bitRange>[3:0]</bitRange>
47798                        <access>read-only</access>
47799                    </field>
47800                </fields>
47801            </register>
47802            <register>
47803                <name>UARTPERIPHID2</name>
47804                <addressOffset>0x00000fe8</addressOffset>
47805                <description>UARTPeriphID2 Register</description>
47806                <resetValue>0x00000034</resetValue>
47807                <fields>
47808                    <field>
47809                        <name>REVISION</name>
47810                        <description>This field depends on the revision of the UART: r1p0 0x0 r1p1 0x1 r1p3 0x2 r1p4 0x2 r1p5 0x3</description>
47811                        <bitRange>[7:4]</bitRange>
47812                        <access>read-only</access>
47813                    </field>
47814                    <field>
47815                        <name>DESIGNER1</name>
47816                        <description>These bits read back as 0x4</description>
47817                        <bitRange>[3:0]</bitRange>
47818                        <access>read-only</access>
47819                    </field>
47820                </fields>
47821            </register>
47822            <register>
47823                <name>UARTPERIPHID3</name>
47824                <addressOffset>0x00000fec</addressOffset>
47825                <description>UARTPeriphID3 Register</description>
47826                <resetValue>0x00000000</resetValue>
47827                <fields>
47828                    <field>
47829                        <name>CONFIGURATION</name>
47830                        <description>These bits read back as 0x00</description>
47831                        <bitRange>[7:0]</bitRange>
47832                        <access>read-only</access>
47833                    </field>
47834                </fields>
47835            </register>
47836            <register>
47837                <name>UARTPCELLID0</name>
47838                <addressOffset>0x00000ff0</addressOffset>
47839                <description>UARTPCellID0 Register</description>
47840                <resetValue>0x0000000d</resetValue>
47841                <fields>
47842                    <field>
47843                        <name>UARTPCELLID0</name>
47844                        <description>These bits read back as 0x0D</description>
47845                        <bitRange>[7:0]</bitRange>
47846                        <access>read-only</access>
47847                    </field>
47848                </fields>
47849            </register>
47850            <register>
47851                <name>UARTPCELLID1</name>
47852                <addressOffset>0x00000ff4</addressOffset>
47853                <description>UARTPCellID1 Register</description>
47854                <resetValue>0x000000f0</resetValue>
47855                <fields>
47856                    <field>
47857                        <name>UARTPCELLID1</name>
47858                        <description>These bits read back as 0xF0</description>
47859                        <bitRange>[7:0]</bitRange>
47860                        <access>read-only</access>
47861                    </field>
47862                </fields>
47863            </register>
47864            <register>
47865                <name>UARTPCELLID2</name>
47866                <addressOffset>0x00000ff8</addressOffset>
47867                <description>UARTPCellID2 Register</description>
47868                <resetValue>0x00000005</resetValue>
47869                <fields>
47870                    <field>
47871                        <name>UARTPCELLID2</name>
47872                        <description>These bits read back as 0x05</description>
47873                        <bitRange>[7:0]</bitRange>
47874                        <access>read-only</access>
47875                    </field>
47876                </fields>
47877            </register>
47878            <register>
47879                <name>UARTPCELLID3</name>
47880                <addressOffset>0x00000ffc</addressOffset>
47881                <description>UARTPCellID3 Register</description>
47882                <resetValue>0x000000b1</resetValue>
47883                <fields>
47884                    <field>
47885                        <name>UARTPCELLID3</name>
47886                        <description>These bits read back as 0xB1</description>
47887                        <bitRange>[7:0]</bitRange>
47888                        <access>read-only</access>
47889                    </field>
47890                </fields>
47891            </register>
47892        </registers>
47893    </peripheral>
47894    <peripheral derivedFrom="UART0">
47895        <name>UART1</name>
47896        <baseAddress>0x40078000</baseAddress>
47897        <interrupt>
47898        <name>UART1_IRQ</name>
47899        <value>34</value>
47900    </interrupt>
47901    </peripheral>
47902    <peripheral>
47903        <name>ROSC</name>
47904        <baseAddress>0x400e8000</baseAddress>
47905        <addressBlock>
47906            <offset>0</offset>
47907            <size>40</size>
47908            <usage>registers</usage>
47909        </addressBlock>
47910        <registers>
47911            <register>
47912                <name>CTRL</name>
47913                <addressOffset>0x00000000</addressOffset>
47914                <description>Ring Oscillator control</description>
47915                <resetValue>0x00000aa0</resetValue>
47916                <fields>
47917                    <field>
47918                        <name>ENABLE</name>
47919                        <description>On power-up this field is initialised to ENABLE
47920                            The system clock must be switched to another source before setting this field to DISABLE otherwise the chip will lock up
47921                            The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.</description>
47922                        <bitRange>[23:12]</bitRange>
47923                        <access>read-write</access>
47924                        <enumeratedValues>
47925                            <enumeratedValue>
47926                                <name>DISABLE</name>
47927                                <value>3358</value>
47928                            </enumeratedValue>
47929                            <enumeratedValue>
47930                                <name>ENABLE</name>
47931                                <value>4011</value>
47932                            </enumeratedValue>
47933                        </enumeratedValues>
47934                    </field>
47935                    <field>
47936                        <name>FREQ_RANGE</name>
47937                        <description>Controls the number of delay stages in the ROSC ring
47938                            LOW uses stages 0 to 7
47939                            MEDIUM uses stages 2 to 7
47940                            HIGH uses stages 4 to 7
47941                            TOOHIGH uses stages 6 to 7 and should not be used because its frequency exceeds design specifications
47942                            The clock output will not glitch when changing the range up one step at a time
47943                            The clock output will glitch when changing the range down
47944                            Note: the values here are gray coded which is why HIGH comes before TOOHIGH</description>
47945                        <bitRange>[11:0]</bitRange>
47946                        <access>read-write</access>
47947                        <enumeratedValues>
47948                            <enumeratedValue>
47949                                <name>LOW</name>
47950                                <value>4004</value>
47951                            </enumeratedValue>
47952                            <enumeratedValue>
47953                                <name>MEDIUM</name>
47954                                <value>4005</value>
47955                            </enumeratedValue>
47956                            <enumeratedValue>
47957                                <name>HIGH</name>
47958                                <value>4007</value>
47959                            </enumeratedValue>
47960                            <enumeratedValue>
47961                                <name>TOOHIGH</name>
47962                                <value>4006</value>
47963                            </enumeratedValue>
47964                        </enumeratedValues>
47965                    </field>
47966                </fields>
47967            </register>
47968            <register>
47969                <name>FREQA</name>
47970                <addressOffset>0x00000004</addressOffset>
47971                <description>The FREQA &amp; FREQB registers control the frequency by controlling the drive strength of each stage
47972                    The drive strength has 4 levels determined by the number of bits set
47973                    Increasing the number of bits set increases the drive strength and increases the oscillation frequency
47974                    0 bits set is the default drive strength
47975                    1 bit set doubles the drive strength
47976                    2 bits set triples drive strength
47977                    3 bits set quadruples drive strength
47978                    For frequency randomisation set both DS0_RANDOM=1 &amp; DS1_RANDOM=1</description>
47979                <resetValue>0x00000000</resetValue>
47980                <fields>
47981                    <field>
47982                        <name>PASSWD</name>
47983                        <description>Set to 0x9696 to apply the settings
47984                            Any other value in this field will set all drive strengths to 0</description>
47985                        <bitRange>[31:16]</bitRange>
47986                        <access>read-write</access>
47987                        <enumeratedValues>
47988                            <enumeratedValue>
47989                                <name>PASS</name>
47990                                <value>38550</value>
47991                            </enumeratedValue>
47992                        </enumeratedValues>
47993                    </field>
47994                    <field>
47995                        <name>DS3</name>
47996                        <description>Stage 3 drive strength</description>
47997                        <bitRange>[14:12]</bitRange>
47998                        <access>read-write</access>
47999                    </field>
48000                    <field>
48001                        <name>DS2</name>
48002                        <description>Stage 2 drive strength</description>
48003                        <bitRange>[10:8]</bitRange>
48004                        <access>read-write</access>
48005                    </field>
48006                    <field>
48007                        <name>DS1_RANDOM</name>
48008                        <description>Randomises the stage 1 drive strength</description>
48009                        <bitRange>[7:7]</bitRange>
48010                        <access>read-write</access>
48011                    </field>
48012                    <field>
48013                        <name>DS1</name>
48014                        <description>Stage 1 drive strength</description>
48015                        <bitRange>[6:4]</bitRange>
48016                        <access>read-write</access>
48017                    </field>
48018                    <field>
48019                        <name>DS0_RANDOM</name>
48020                        <description>Randomises the stage 0 drive strength</description>
48021                        <bitRange>[3:3]</bitRange>
48022                        <access>read-write</access>
48023                    </field>
48024                    <field>
48025                        <name>DS0</name>
48026                        <description>Stage 0 drive strength</description>
48027                        <bitRange>[2:0]</bitRange>
48028                        <access>read-write</access>
48029                    </field>
48030                </fields>
48031            </register>
48032            <register>
48033                <name>FREQB</name>
48034                <addressOffset>0x00000008</addressOffset>
48035                <description>For a detailed description see freqa register</description>
48036                <resetValue>0x00000000</resetValue>
48037                <fields>
48038                    <field>
48039                        <name>PASSWD</name>
48040                        <description>Set to 0x9696 to apply the settings
48041                            Any other value in this field will set all drive strengths to 0</description>
48042                        <bitRange>[31:16]</bitRange>
48043                        <access>read-write</access>
48044                        <enumeratedValues>
48045                            <enumeratedValue>
48046                                <name>PASS</name>
48047                                <value>38550</value>
48048                            </enumeratedValue>
48049                        </enumeratedValues>
48050                    </field>
48051                    <field>
48052                        <name>DS7</name>
48053                        <description>Stage 7 drive strength</description>
48054                        <bitRange>[14:12]</bitRange>
48055                        <access>read-write</access>
48056                    </field>
48057                    <field>
48058                        <name>DS6</name>
48059                        <description>Stage 6 drive strength</description>
48060                        <bitRange>[10:8]</bitRange>
48061                        <access>read-write</access>
48062                    </field>
48063                    <field>
48064                        <name>DS5</name>
48065                        <description>Stage 5 drive strength</description>
48066                        <bitRange>[6:4]</bitRange>
48067                        <access>read-write</access>
48068                    </field>
48069                    <field>
48070                        <name>DS4</name>
48071                        <description>Stage 4 drive strength</description>
48072                        <bitRange>[2:0]</bitRange>
48073                        <access>read-write</access>
48074                    </field>
48075                </fields>
48076            </register>
48077            <register>
48078                <name>RANDOM</name>
48079                <addressOffset>0x0000000c</addressOffset>
48080                <description>Loads a value to the LFSR randomiser</description>
48081                <resetValue>0x3f04b16d</resetValue>
48082                <fields>
48083                    <field>
48084                        <name>SEED</name>
48085                        <bitRange>[31:0]</bitRange>
48086                        <access>read-write</access>
48087                    </field>
48088                </fields>
48089            </register>
48090            <register>
48091                <name>DORMANT</name>
48092                <addressOffset>0x00000010</addressOffset>
48093                <description>Ring Oscillator pause control</description>
48094                <resetMask>0x00000000</resetMask>
48095                <fields>
48096                    <field>
48097                        <name>DORMANT</name>
48098                        <description>This is used to save power by pausing the ROSC
48099                            On power-up this field is initialised to WAKE
48100                            An invalid write will also select WAKE
48101                            Warning: setup the irq before selecting dormant mode</description>
48102                        <bitRange>[31:0]</bitRange>
48103                        <access>read-write</access>
48104                        <enumeratedValues>
48105                            <enumeratedValue>
48106                                <name>dormant</name>
48107                                <value>1668246881</value>
48108                            </enumeratedValue>
48109                            <enumeratedValue>
48110                                <name>WAKE</name>
48111                                <value>2002873189</value>
48112                            </enumeratedValue>
48113                        </enumeratedValues>
48114                    </field>
48115                </fields>
48116            </register>
48117            <register>
48118                <name>DIV</name>
48119                <addressOffset>0x00000014</addressOffset>
48120                <description>Controls the output divider</description>
48121                <resetMask>0x00000000</resetMask>
48122                <fields>
48123                    <field>
48124                        <name>DIV</name>
48125                        <description>set to 0xaa00 + div where
48126                            div = 0 divides by 128
48127                            div = 1-127 divides by div
48128                            any other value sets div=128
48129                            this register resets to div=32</description>
48130                        <bitRange>[15:0]</bitRange>
48131                        <access>read-write</access>
48132                        <enumeratedValues>
48133                            <enumeratedValue>
48134                                <name>PASS</name>
48135                                <value>43520</value>
48136                            </enumeratedValue>
48137                        </enumeratedValues>
48138                    </field>
48139                </fields>
48140            </register>
48141            <register>
48142                <name>PHASE</name>
48143                <addressOffset>0x00000018</addressOffset>
48144                <description>Controls the phase shifted output</description>
48145                <resetValue>0x00000008</resetValue>
48146                <fields>
48147                    <field>
48148                        <name>PASSWD</name>
48149                        <description>set to 0xaa
48150                            any other value enables the output with shift=0</description>
48151                        <bitRange>[11:4]</bitRange>
48152                        <access>read-write</access>
48153                    </field>
48154                    <field>
48155                        <name>ENABLE</name>
48156                        <description>enable the phase-shifted output
48157                            this can be changed on-the-fly</description>
48158                        <bitRange>[3:3]</bitRange>
48159                        <access>read-write</access>
48160                    </field>
48161                    <field>
48162                        <name>FLIP</name>
48163                        <description>invert the phase-shifted output
48164                            this is ignored when div=1</description>
48165                        <bitRange>[2:2]</bitRange>
48166                        <access>read-write</access>
48167                    </field>
48168                    <field>
48169                        <name>SHIFT</name>
48170                        <description>phase shift the phase-shifted output by SHIFT input clocks
48171                            this can be changed on-the-fly
48172                            must be set to 0 before setting div=1</description>
48173                        <bitRange>[1:0]</bitRange>
48174                        <access>read-write</access>
48175                    </field>
48176                </fields>
48177            </register>
48178            <register>
48179                <name>STATUS</name>
48180                <addressOffset>0x0000001c</addressOffset>
48181                <description>Ring Oscillator Status</description>
48182                <resetValue>0x00000000</resetValue>
48183                <fields>
48184                    <field>
48185                        <name>STABLE</name>
48186                        <description>Oscillator is running and stable</description>
48187                        <bitRange>[31:31]</bitRange>
48188                        <access>read-only</access>
48189                    </field>
48190                    <field>
48191                        <name>BADWRITE</name>
48192                        <description>An invalid value has been written to CTRL_ENABLE or CTRL_FREQ_RANGE or FREQA or FREQB or DIV or PHASE or DORMANT</description>
48193                        <bitRange>[24:24]</bitRange>
48194                        <access>read-write</access>
48195                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
48196                    </field>
48197                    <field>
48198                        <name>DIV_RUNNING</name>
48199                        <description>post-divider is running
48200                            this resets to 0 but transitions to 1 during chip startup</description>
48201                        <bitRange>[16:16]</bitRange>
48202                        <access>read-only</access>
48203                    </field>
48204                    <field>
48205                        <name>ENABLED</name>
48206                        <description>Oscillator is enabled but not necessarily running and stable
48207                            this resets to 0 but transitions to 1 during chip startup</description>
48208                        <bitRange>[12:12]</bitRange>
48209                        <access>read-only</access>
48210                    </field>
48211                </fields>
48212            </register>
48213            <register>
48214                <name>RANDOMBIT</name>
48215                <addressOffset>0x00000020</addressOffset>
48216                <description>This just reads the state of the oscillator output so randomness is compromised if the ring oscillator is stopped or run at a harmonic of the bus frequency</description>
48217                <resetValue>0x00000001</resetValue>
48218                <fields>
48219                    <field>
48220                        <name>RANDOMBIT</name>
48221                        <bitRange>[0:0]</bitRange>
48222                        <access>read-only</access>
48223                    </field>
48224                </fields>
48225            </register>
48226            <register>
48227                <name>COUNT</name>
48228                <addressOffset>0x00000024</addressOffset>
48229                <description>A down counter running at the ROSC frequency which counts to zero and stops.
48230                    To start the counter write a non-zero value.
48231                    Can be used for short software pauses when setting up time sensitive hardware.</description>
48232                <resetValue>0x00000000</resetValue>
48233                <fields>
48234                    <field>
48235                        <name>COUNT</name>
48236                        <bitRange>[15:0]</bitRange>
48237                        <access>read-write</access>
48238                    </field>
48239                </fields>
48240            </register>
48241        </registers>
48242    </peripheral>
48243    <peripheral>
48244        <name>POWMAN</name>
48245        <description>Controls vreg, bor, lposc, chip resets &amp; xosc startup, powman and provides scratch register for general use and for bootcode use</description>
48246        <baseAddress>0x40100000</baseAddress>
48247        <addressBlock>
48248            <offset>0</offset>
48249            <size>240</size>
48250            <usage>registers</usage>
48251        </addressBlock>
48252        <interrupt>
48253            <name>POWMAN_IRQ_POW</name>
48254            <value>44</value>
48255        </interrupt>
48256        <interrupt>
48257            <name>POWMAN_IRQ_TIMER</name>
48258            <value>45</value>
48259        </interrupt>
48260        <registers>
48261            <register>
48262                <name>BADPASSWD</name>
48263                <addressOffset>0x00000000</addressOffset>
48264                <description>Indicates a bad password has been used</description>
48265                <resetValue>0x00000000</resetValue>
48266                <fields>
48267                    <field>
48268                        <name>BADPASSWD</name>
48269                        <bitRange>[0:0]</bitRange>
48270                        <access>read-write</access>
48271                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
48272                    </field>
48273                </fields>
48274            </register>
48275            <register>
48276                <name>VREG_CTRL</name>
48277                <addressOffset>0x00000004</addressOffset>
48278                <description>Voltage Regulator Control</description>
48279                <resetValue>0x00008050</resetValue>
48280                <fields>
48281                    <field>
48282                        <name>RST_N</name>
48283                        <description>returns the regulator to its startup settings
48284                            0 - reset
48285                            1 - not reset (default)</description>
48286                        <bitRange>[15:15]</bitRange>
48287                        <access>read-write</access>
48288                    </field>
48289                    <field>
48290                        <name>UNLOCK</name>
48291                        <description>unlocks the VREG control interface after power up
48292                            0 - Locked (default)
48293                            1 - Unlocked
48294                            It cannot be relocked when it is unlocked.</description>
48295                        <bitRange>[13:13]</bitRange>
48296                        <access>read-write</access>
48297                    </field>
48298                    <field>
48299                        <name>ISOLATE</name>
48300                        <description>isolates the VREG control interface
48301                            0 - not isolated (default)
48302                            1 - isolated</description>
48303                        <bitRange>[12:12]</bitRange>
48304                        <access>read-write</access>
48305                    </field>
48306                    <field>
48307                        <name>DISABLE_VOLTAGE_LIMIT</name>
48308                        <description>0=not disabled, 1=enabled</description>
48309                        <bitRange>[8:8]</bitRange>
48310                        <access>read-write</access>
48311                    </field>
48312                    <field>
48313                        <name>HT_TH</name>
48314                        <description>high temperature protection threshold
48315                            regulator power transistors are disabled when junction temperature exceeds threshold
48316                            000 - 100C
48317                            001 - 105C
48318                            010 - 110C
48319                            011 - 115C
48320                            100 - 120C
48321                            101 - 125C
48322                            110 - 135C
48323                            111 - 150C</description>
48324                        <bitRange>[6:4]</bitRange>
48325                        <access>read-write</access>
48326                    </field>
48327                </fields>
48328            </register>
48329            <register>
48330                <name>VREG_STS</name>
48331                <addressOffset>0x00000008</addressOffset>
48332                <description>Voltage Regulator Status</description>
48333                <resetValue>0x00000000</resetValue>
48334                <fields>
48335                    <field>
48336                        <name>VOUT_OK</name>
48337                        <description>output regulation status
48338                            0=not in regulation, 1=in regulation</description>
48339                        <bitRange>[4:4]</bitRange>
48340                        <access>read-only</access>
48341                    </field>
48342                    <field>
48343                        <name>STARTUP</name>
48344                        <description>startup status
48345                            0=startup complete, 1=starting up</description>
48346                        <bitRange>[0:0]</bitRange>
48347                        <access>read-only</access>
48348                    </field>
48349                </fields>
48350            </register>
48351            <register>
48352                <name>VREG</name>
48353                <addressOffset>0x0000000c</addressOffset>
48354                <description>Voltage Regulator Settings</description>
48355                <resetValue>0x000000b0</resetValue>
48356                <fields>
48357                    <field>
48358                        <name>UPDATE_IN_PROGRESS</name>
48359                        <description>regulator state is being updated
48360                            writes to the vreg register will be ignored when this field is set</description>
48361                        <bitRange>[15:15]</bitRange>
48362                        <access>read-only</access>
48363                    </field>
48364                    <field>
48365                        <name>VSEL</name>
48366                        <description>output voltage select
48367                            the regulator output voltage is limited to 1.3V unless the voltage limit
48368                            is disabled using the disable_voltage_limit field in the vreg_ctrl register
48369                            00000 - 0.55V
48370                            00001 - 0.60V
48371                            00010 - 0.65V
48372                            00011 - 0.70V
48373                            00100 - 0.75V
48374                            00101 - 0.80V
48375                            00110 - 0.85V
48376                            00111 - 0.90V
48377                            01000 - 0.95V
48378                            01001 - 1.00V
48379                            01010 - 1.05V
48380                            01011 - 1.10V (default)
48381                            01100 - 1.15V
48382                            01101 - 1.20V
48383                            01110 - 1.25V
48384                            01111 - 1.30V
48385                            10000 - 1.35V
48386                            10001 - 1.40V
48387                            10010 - 1.50V
48388                            10011 - 1.60V
48389                            10100 - 1.65V
48390                            10101 - 1.70V
48391                            10110 - 1.80V
48392                            10111 - 1.90V
48393                            11000 - 2.00V
48394                            11001 - 2.35V
48395                            11010 - 2.50V
48396                            11011 - 2.65V
48397                            11100 - 2.80V
48398                            11101 - 3.00V
48399                            11110 - 3.15V
48400                            11111 - 3.30V</description>
48401                        <bitRange>[8:4]</bitRange>
48402                        <access>read-write</access>
48403                    </field>
48404                    <field>
48405                        <name>HIZ</name>
48406                        <description>high impedance mode select
48407                            0=not in high impedance mode, 1=in high impedance mode</description>
48408                        <bitRange>[1:1]</bitRange>
48409                        <access>read-write</access>
48410                    </field>
48411                </fields>
48412            </register>
48413            <register>
48414                <name>VREG_LP_ENTRY</name>
48415                <addressOffset>0x00000010</addressOffset>
48416                <description>Voltage Regulator Low Power Entry Settings</description>
48417                <resetValue>0x000000b4</resetValue>
48418                <fields>
48419                    <field>
48420                        <name>VSEL</name>
48421                        <description>output voltage select
48422                            the regulator output voltage is limited to 1.3V unless the voltage limit
48423                            is disabled using the disable_voltage_limit field in the vreg_ctrl register
48424                            00000 - 0.55V
48425                            00001 - 0.60V
48426                            00010 - 0.65V
48427                            00011 - 0.70V
48428                            00100 - 0.75V
48429                            00101 - 0.80V
48430                            00110 - 0.85V
48431                            00111 - 0.90V
48432                            01000 - 0.95V
48433                            01001 - 1.00V
48434                            01010 - 1.05V
48435                            01011 - 1.10V (default)
48436                            01100 - 1.15V
48437                            01101 - 1.20V
48438                            01110 - 1.25V
48439                            01111 - 1.30V
48440                            10000 - 1.35V
48441                            10001 - 1.40V
48442                            10010 - 1.50V
48443                            10011 - 1.60V
48444                            10100 - 1.65V
48445                            10101 - 1.70V
48446                            10110 - 1.80V
48447                            10111 - 1.90V
48448                            11000 - 2.00V
48449                            11001 - 2.35V
48450                            11010 - 2.50V
48451                            11011 - 2.65V
48452                            11100 - 2.80V
48453                            11101 - 3.00V
48454                            11110 - 3.15V
48455                            11111 - 3.30V</description>
48456                        <bitRange>[8:4]</bitRange>
48457                        <access>read-write</access>
48458                    </field>
48459                    <field>
48460                        <name>MODE</name>
48461                        <description>selects either normal (switching) mode or low power (linear) mode
48462                            low power mode can only be selected for output voltages up to 1.3V
48463                            0 = normal mode (switching)
48464                            1 = low power mode (linear)</description>
48465                        <bitRange>[2:2]</bitRange>
48466                        <access>read-write</access>
48467                    </field>
48468                    <field>
48469                        <name>HIZ</name>
48470                        <description>high impedance mode select
48471                            0=not in high impedance mode, 1=in high impedance mode</description>
48472                        <bitRange>[1:1]</bitRange>
48473                        <access>read-write</access>
48474                    </field>
48475                </fields>
48476            </register>
48477            <register>
48478                <name>VREG_LP_EXIT</name>
48479                <addressOffset>0x00000014</addressOffset>
48480                <description>Voltage Regulator Low Power Exit Settings</description>
48481                <resetValue>0x000000b0</resetValue>
48482                <fields>
48483                    <field>
48484                        <name>VSEL</name>
48485                        <description>output voltage select
48486                            the regulator output voltage is limited to 1.3V unless the voltage limit
48487                            is disabled using the disable_voltage_limit field in the vreg_ctrl register
48488                            00000 - 0.55V
48489                            00001 - 0.60V
48490                            00010 - 0.65V
48491                            00011 - 0.70V
48492                            00100 - 0.75V
48493                            00101 - 0.80V
48494                            00110 - 0.85V
48495                            00111 - 0.90V
48496                            01000 - 0.95V
48497                            01001 - 1.00V
48498                            01010 - 1.05V
48499                            01011 - 1.10V (default)
48500                            01100 - 1.15V
48501                            01101 - 1.20V
48502                            01110 - 1.25V
48503                            01111 - 1.30V
48504                            10000 - 1.35V
48505                            10001 - 1.40V
48506                            10010 - 1.50V
48507                            10011 - 1.60V
48508                            10100 - 1.65V
48509                            10101 - 1.70V
48510                            10110 - 1.80V
48511                            10111 - 1.90V
48512                            11000 - 2.00V
48513                            11001 - 2.35V
48514                            11010 - 2.50V
48515                            11011 - 2.65V
48516                            11100 - 2.80V
48517                            11101 - 3.00V
48518                            11110 - 3.15V
48519                            11111 - 3.30V</description>
48520                        <bitRange>[8:4]</bitRange>
48521                        <access>read-write</access>
48522                    </field>
48523                    <field>
48524                        <name>MODE</name>
48525                        <description>selects either normal (switching) mode or low power (linear) mode
48526                            low power mode can only be selected for output voltages up to 1.3V
48527                            0 = normal mode (switching)
48528                            1 = low power mode (linear)</description>
48529                        <bitRange>[2:2]</bitRange>
48530                        <access>read-write</access>
48531                    </field>
48532                    <field>
48533                        <name>HIZ</name>
48534                        <description>high impedance mode select
48535                            0=not in high impedance mode, 1=in high impedance mode</description>
48536                        <bitRange>[1:1]</bitRange>
48537                        <access>read-write</access>
48538                    </field>
48539                </fields>
48540            </register>
48541            <register>
48542                <name>BOD_CTRL</name>
48543                <addressOffset>0x00000018</addressOffset>
48544                <description>Brown-out Detection Control</description>
48545                <resetValue>0x00000000</resetValue>
48546                <fields>
48547                    <field>
48548                        <name>ISOLATE</name>
48549                        <description>isolates the brown-out detection control interface
48550                            0 - not isolated (default)
48551                            1 - isolated</description>
48552                        <bitRange>[12:12]</bitRange>
48553                        <access>read-write</access>
48554                    </field>
48555                </fields>
48556            </register>
48557            <register>
48558                <name>BOD</name>
48559                <addressOffset>0x0000001c</addressOffset>
48560                <description>Brown-out Detection Settings</description>
48561                <resetValue>0x000000b1</resetValue>
48562                <fields>
48563                    <field>
48564                        <name>VSEL</name>
48565                        <description>threshold select
48566                            00000 - 0.473V
48567                            00001 - 0.516V
48568                            00010 - 0.559V
48569                            00011 - 0.602V
48570                            00100 - 0.645VS
48571                            00101 - 0.688V
48572                            00110 - 0.731V
48573                            00111 - 0.774V
48574                            01000 - 0.817V
48575                            01001 - 0.860V (default)
48576                            01010 - 0.903V
48577                            01011 - 0.946V
48578                            01100 - 0.989V
48579                            01101 - 1.032V
48580                            01110 - 1.075V
48581                            01111 - 1.118V
48582                            10000 - 1.161
48583                            10001 - 1.204V</description>
48584                        <bitRange>[8:4]</bitRange>
48585                        <access>read-write</access>
48586                    </field>
48587                    <field>
48588                        <name>EN</name>
48589                        <description>enable brown-out detection
48590                            0=not enabled, 1=enabled</description>
48591                        <bitRange>[0:0]</bitRange>
48592                        <access>read-write</access>
48593                    </field>
48594                </fields>
48595            </register>
48596            <register>
48597                <name>BOD_LP_ENTRY</name>
48598                <addressOffset>0x00000020</addressOffset>
48599                <description>Brown-out Detection Low Power Entry Settings</description>
48600                <resetValue>0x000000b0</resetValue>
48601                <fields>
48602                    <field>
48603                        <name>VSEL</name>
48604                        <description>threshold select
48605                            00000 - 0.473V
48606                            00001 - 0.516V
48607                            00010 - 0.559V
48608                            00011 - 0.602V
48609                            00100 - 0.645VS
48610                            00101 - 0.688V
48611                            00110 - 0.731V
48612                            00111 - 0.774V
48613                            01000 - 0.817V
48614                            01001 - 0.860V (default)
48615                            01010 - 0.903V
48616                            01011 - 0.946V
48617                            01100 - 0.989V
48618                            01101 - 1.032V
48619                            01110 - 1.075V
48620                            01111 - 1.118V
48621                            10000 - 1.161
48622                            10001 - 1.204V</description>
48623                        <bitRange>[8:4]</bitRange>
48624                        <access>read-write</access>
48625                    </field>
48626                    <field>
48627                        <name>EN</name>
48628                        <description>enable brown-out detection
48629                            0=not enabled, 1=enabled</description>
48630                        <bitRange>[0:0]</bitRange>
48631                        <access>read-write</access>
48632                    </field>
48633                </fields>
48634            </register>
48635            <register>
48636                <name>BOD_LP_EXIT</name>
48637                <addressOffset>0x00000024</addressOffset>
48638                <description>Brown-out Detection Low Power Exit Settings</description>
48639                <resetValue>0x000000b1</resetValue>
48640                <fields>
48641                    <field>
48642                        <name>VSEL</name>
48643                        <description>threshold select
48644                            00000 - 0.473V
48645                            00001 - 0.516V
48646                            00010 - 0.559V
48647                            00011 - 0.602V
48648                            00100 - 0.645VS
48649                            00101 - 0.688V
48650                            00110 - 0.731V
48651                            00111 - 0.774V
48652                            01000 - 0.817V
48653                            01001 - 0.860V (default)
48654                            01010 - 0.903V
48655                            01011 - 0.946V
48656                            01100 - 0.989V
48657                            01101 - 1.032V
48658                            01110 - 1.075V
48659                            01111 - 1.118V
48660                            10000 - 1.161
48661                            10001 - 1.204V</description>
48662                        <bitRange>[8:4]</bitRange>
48663                        <access>read-write</access>
48664                    </field>
48665                    <field>
48666                        <name>EN</name>
48667                        <description>enable brown-out detection
48668                            0=not enabled, 1=enabled</description>
48669                        <bitRange>[0:0]</bitRange>
48670                        <access>read-write</access>
48671                    </field>
48672                </fields>
48673            </register>
48674            <register>
48675                <name>LPOSC</name>
48676                <addressOffset>0x00000028</addressOffset>
48677                <description>Low power oscillator control register.</description>
48678                <resetValue>0x00000203</resetValue>
48679                <fields>
48680                    <field>
48681                        <name>TRIM</name>
48682                        <description>Frequency trim - the trim step is typically 1% of the reset frequency, but can be up to 3%</description>
48683                        <bitRange>[9:4]</bitRange>
48684                        <access>read-write</access>
48685                    </field>
48686                    <field>
48687                        <name>MODE</name>
48688                        <description>This feature has been removed</description>
48689                        <bitRange>[1:0]</bitRange>
48690                        <access>read-write</access>
48691                    </field>
48692                </fields>
48693            </register>
48694            <register>
48695                <name>CHIP_RESET</name>
48696                <addressOffset>0x0000002c</addressOffset>
48697                <description>Chip reset control and status</description>
48698                <resetValue>0x00000000</resetValue>
48699                <fields>
48700                    <field>
48701                        <name>HAD_WATCHDOG_RESET_RSM</name>
48702                        <description>Last reset was a watchdog timeout which was configured to reset the power-on state machine
48703                            This resets:
48704                            double_tap flag    no
48705                            DP                 no
48706                            RPAP               no
48707                            rescue_flag        no
48708                            timer              no
48709                            powman             no
48710                            swcore             no
48711                            psm                yes
48712                            and does not change the power state</description>
48713                        <bitRange>[28:28]</bitRange>
48714                        <access>read-only</access>
48715                    </field>
48716                    <field>
48717                        <name>HAD_HZD_SYS_RESET_REQ</name>
48718                        <description>Last reset was a system reset from the hazard debugger
48719                            This resets:
48720                            double_tap flag    no
48721                            DP                 no
48722                            RPAP               no
48723                            rescue_flag        no
48724                            timer              no
48725                            powman             no
48726                            swcore             no
48727                            psm                yes
48728                            and does not change the power state</description>
48729                        <bitRange>[27:27]</bitRange>
48730                        <access>read-only</access>
48731                    </field>
48732                    <field>
48733                        <name>HAD_GLITCH_DETECT</name>
48734                        <description>Last reset was due to a power supply glitch
48735                            This resets:
48736                            double_tap flag    no
48737                            DP                 no
48738                            RPAP               no
48739                            rescue_flag        no
48740                            timer              no
48741                            powman             no
48742                            swcore             no
48743                            psm                yes
48744                            and does not change the power state</description>
48745                        <bitRange>[26:26]</bitRange>
48746                        <access>read-only</access>
48747                    </field>
48748                    <field>
48749                        <name>HAD_SWCORE_PD</name>
48750                        <description>Last reset was a switched core powerdown
48751                            This resets:
48752                            double_tap flag    no
48753                            DP                 no
48754                            RPAP               no
48755                            rescue_flag        no
48756                            timer              no
48757                            powman             no
48758                            swcore             yes
48759                            psm                yes
48760                            then starts the power sequencer</description>
48761                        <bitRange>[25:25]</bitRange>
48762                        <access>read-only</access>
48763                    </field>
48764                    <field>
48765                        <name>HAD_WATCHDOG_RESET_SWCORE</name>
48766                        <description>Last reset was a watchdog timeout which was configured to reset the switched-core
48767                            This resets:
48768                            double_tap flag    no
48769                            DP                 no
48770                            RPAP               no
48771                            rescue_flag        no
48772                            timer              no
48773                            powman             no
48774                            swcore             yes
48775                            psm                yes
48776                            then starts the power sequencer</description>
48777                        <bitRange>[24:24]</bitRange>
48778                        <access>read-only</access>
48779                    </field>
48780                    <field>
48781                        <name>HAD_WATCHDOG_RESET_POWMAN</name>
48782                        <description>Last reset was a watchdog timeout which was configured to reset the power manager
48783                            This resets:
48784                            double_tap flag    no
48785                            DP                 no
48786                            RPAP               no
48787                            rescue_flag        no
48788                            timer              yes
48789                            powman             yes
48790                            swcore             yes
48791                            psm                yes
48792                            then starts the power sequencer</description>
48793                        <bitRange>[23:23]</bitRange>
48794                        <access>read-only</access>
48795                    </field>
48796                    <field>
48797                        <name>HAD_WATCHDOG_RESET_POWMAN_ASYNC</name>
48798                        <description>Last reset was a watchdog timeout which was configured to reset the power manager asynchronously
48799                            This resets:
48800                            double_tap flag    no
48801                            DP                 no
48802                            RPAP               no
48803                            rescue_flag        no
48804                            timer              yes
48805                            powman             yes
48806                            swcore             yes
48807                            psm                yes
48808                            then starts the power sequencer</description>
48809                        <bitRange>[22:22]</bitRange>
48810                        <access>read-only</access>
48811                    </field>
48812                    <field>
48813                        <name>HAD_RESCUE</name>
48814                        <description>Last reset was a rescue reset from the debugger
48815                            This resets:
48816                            double_tap flag    no
48817                            DP                 no
48818                            RPAP               no
48819                            rescue_flag        no, it sets this flag
48820                            timer              yes
48821                            powman             yes
48822                            swcore             yes
48823                            psm                yes
48824                            then starts the power sequencer</description>
48825                        <bitRange>[21:21]</bitRange>
48826                        <access>read-only</access>
48827                    </field>
48828                    <field>
48829                        <name>HAD_DP_RESET_REQ</name>
48830                        <description>Last reset was an reset request from the arm debugger
48831                            This resets:
48832                            double_tap flag    no
48833                            DP                 no
48834                            RPAP               no
48835                            rescue_flag        yes
48836                            timer              yes
48837                            powman             yes
48838                            swcore             yes
48839                            psm                yes
48840                            then starts the power sequencer</description>
48841                        <bitRange>[19:19]</bitRange>
48842                        <access>read-only</access>
48843                    </field>
48844                    <field>
48845                        <name>HAD_RUN_LOW</name>
48846                        <description>Last reset was from the RUN pin
48847                            This resets:
48848                            double_tap flag    no
48849                            DP                 yes
48850                            RPAP               yes
48851                            rescue_flag        yes
48852                            timer              yes
48853                            powman             yes
48854                            swcore             yes
48855                            psm                yes
48856                            then starts the power sequencer</description>
48857                        <bitRange>[18:18]</bitRange>
48858                        <access>read-only</access>
48859                    </field>
48860                    <field>
48861                        <name>HAD_BOR</name>
48862                        <description>Last reset was from the brown-out detection block
48863                            This resets:
48864                            double_tap flag    yes
48865                            DP                 yes
48866                            RPAP               yes
48867                            rescue_flag        yes
48868                            timer              yes
48869                            powman             yes
48870                            swcore             yes
48871                            psm                yes
48872                            then starts the power sequencer</description>
48873                        <bitRange>[17:17]</bitRange>
48874                        <access>read-only</access>
48875                    </field>
48876                    <field>
48877                        <name>HAD_POR</name>
48878                        <description>Last reset was from the power-on reset
48879                            This resets:
48880                            double_tap flag    yes
48881                            DP                 yes
48882                            RPAP               yes
48883                            rescue_flag        yes
48884                            timer              yes
48885                            powman             yes
48886                            swcore             yes
48887                            psm                yes
48888                            then starts the power sequencer</description>
48889                        <bitRange>[16:16]</bitRange>
48890                        <access>read-only</access>
48891                    </field>
48892                    <field>
48893                        <name>RESCUE_FLAG</name>
48894                        <description>This is set by a rescue reset from the RP-AP.
48895                            Its purpose is to halt before the bootrom before booting from flash in order to recover from a boot lock-up.
48896                            The debugger can then attach once the bootrom has been halted and flash some working code that does not lock up.</description>
48897                        <bitRange>[4:4]</bitRange>
48898                        <access>read-write</access>
48899                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
48900                    </field>
48901                    <field>
48902                        <name>DOUBLE_TAP</name>
48903                        <description>This flag is set by double-tapping RUN. It tells bootcode to go into the bootloader.</description>
48904                        <bitRange>[0:0]</bitRange>
48905                        <access>read-write</access>
48906                    </field>
48907                </fields>
48908            </register>
48909            <register>
48910                <name>WDSEL</name>
48911                <addressOffset>0x00000030</addressOffset>
48912                <description>Allows a watchdog reset to reset the internal state of powman in addition to the power-on state machine (PSM).
48913                    Note that powman ignores watchdog resets that do not select at least the CLOCKS stage or earlier stages in the PSM. If using these bits, it&#39;s recommended to set PSM_WDSEL to all-ones in addition to the desired bits in this register. Failing to select CLOCKS or earlier will result in the POWMAN_WDSEL register having no effect.</description>
48914                <resetValue>0x00000000</resetValue>
48915                <fields>
48916                    <field>
48917                        <name>RESET_RSM</name>
48918                        <description>If set to 1, a watchdog reset will run the full power-on state machine (PSM) sequence
48919                            From a user perspective it is the same as setting RSM_WDSEL_PROC_COLD
48920                            From a hardware debug perspective it has the same effect as a reset from a glitch detector</description>
48921                        <bitRange>[12:12]</bitRange>
48922                        <access>read-write</access>
48923                    </field>
48924                    <field>
48925                        <name>RESET_SWCORE</name>
48926                        <description>If set to 1, a watchdog reset will reset the switched core power domain and run the full power-on state machine (PSM) sequence
48927                            From a user perspective it is the same as setting RSM_WDSEL_PROC_COLD
48928                            From a hardware debug perspective it has the same effect as a power-on reset for the switched core power domain</description>
48929                        <bitRange>[8:8]</bitRange>
48930                        <access>read-write</access>
48931                    </field>
48932                    <field>
48933                        <name>RESET_POWMAN</name>
48934                        <description>If set to 1, a watchdog reset will restore powman defaults, reset the timer, reset the switched core power domain
48935                            and run the full power-on state machine (PSM) sequence
48936                            This relies on clk_ref running. Use reset_powman_async if that may not be true</description>
48937                        <bitRange>[4:4]</bitRange>
48938                        <access>read-write</access>
48939                    </field>
48940                    <field>
48941                        <name>RESET_POWMAN_ASYNC</name>
48942                        <description>If set to 1, a watchdog reset will restore powman defaults, reset the timer,
48943                            reset the switched core domain and run the full power-on state machine (PSM) sequence
48944                            This does not rely on clk_ref running</description>
48945                        <bitRange>[0:0]</bitRange>
48946                        <access>read-write</access>
48947                    </field>
48948                </fields>
48949            </register>
48950            <register>
48951                <name>SEQ_CFG</name>
48952                <addressOffset>0x00000034</addressOffset>
48953                <description>For configuration of the power sequencer
48954                    Writes are ignored while POWMAN_STATE_CHANGING=1</description>
48955                <resetValue>0x001011f0</resetValue>
48956                <fields>
48957                    <field>
48958                        <name>USING_FAST_POWCK</name>
48959                        <description>0 indicates the POWMAN clock is running from the low power oscillator (32kHz)
48960                            1 indicates the POWMAN clock is running from the reference clock (2-50MHz)</description>
48961                        <bitRange>[20:20]</bitRange>
48962                        <access>read-only</access>
48963                    </field>
48964                    <field>
48965                        <name>USING_BOD_LP</name>
48966                        <description>Indicates the brown-out detector (BOD) mode
48967                            0 = BOD high power mode which is the default
48968                            1 = BOD low power mode</description>
48969                        <bitRange>[17:17]</bitRange>
48970                        <access>read-only</access>
48971                    </field>
48972                    <field>
48973                        <name>USING_VREG_LP</name>
48974                        <description>Indicates the voltage regulator (VREG) mode
48975                            0 = VREG high power mode which is the default
48976                            1 = VREG low power mode</description>
48977                        <bitRange>[16:16]</bitRange>
48978                        <access>read-only</access>
48979                    </field>
48980                    <field>
48981                        <name>USE_FAST_POWCK</name>
48982                        <description>selects the reference clock (clk_ref) as the source of the POWMAN clock when switched-core is powered. The POWMAN clock always switches to the slow clock (lposc) when switched-core is powered down because the fast clock stops running.
48983                            0 always run the POWMAN clock from the slow clock (lposc)
48984                            1 run the POWMAN clock from the fast clock when available
48985                            This setting takes effect when a power up sequence is next run</description>
48986                        <bitRange>[12:12]</bitRange>
48987                        <access>read-write</access>
48988                    </field>
48989                    <field>
48990                        <name>RUN_LPOSC_IN_LP</name>
48991                        <description>Set to 0 to stop the low power osc when the switched-core is powered down, which is unwise if using it to clock the timer
48992                            This setting takes effect when the swcore is next powered down</description>
48993                        <bitRange>[8:8]</bitRange>
48994                        <access>read-write</access>
48995                    </field>
48996                    <field>
48997                        <name>USE_BOD_HP</name>
48998                        <description>Set to 0 to prevent automatic switching to bod high power mode when switched-core is powered up
48999                            This setting takes effect when the swcore is next powered up</description>
49000                        <bitRange>[7:7]</bitRange>
49001                        <access>read-write</access>
49002                    </field>
49003                    <field>
49004                        <name>USE_BOD_LP</name>
49005                        <description>Set to 0 to prevent automatic switching to bod low power mode when switched-core is powered down
49006                            This setting takes effect when the swcore is next powered down</description>
49007                        <bitRange>[6:6]</bitRange>
49008                        <access>read-write</access>
49009                    </field>
49010                    <field>
49011                        <name>USE_VREG_HP</name>
49012                        <description>Set to 0 to prevent automatic switching to vreg high power mode when switched-core is powered up
49013                            This setting takes effect when the swcore is next powered up</description>
49014                        <bitRange>[5:5]</bitRange>
49015                        <access>read-write</access>
49016                    </field>
49017                    <field>
49018                        <name>USE_VREG_LP</name>
49019                        <description>Set to 0 to prevent automatic switching to vreg low power mode when switched-core is powered down
49020                            This setting takes effect when the swcore is next powered down</description>
49021                        <bitRange>[4:4]</bitRange>
49022                        <access>read-write</access>
49023                    </field>
49024                    <field>
49025                        <name>HW_PWRUP_SRAM0</name>
49026                        <description>Specifies the power state of SRAM0 when powering up swcore from a low power state (P1.xxx) to a high power state (P0.0xx).
49027                            0=power-up
49028                            1=no change</description>
49029                        <bitRange>[1:1]</bitRange>
49030                        <access>read-write</access>
49031                    </field>
49032                    <field>
49033                        <name>HW_PWRUP_SRAM1</name>
49034                        <description>Specifies the power state of SRAM1 when powering up swcore from a low power state (P1.xxx) to a high power state (P0.0xx).
49035                            0=power-up
49036                            1=no change</description>
49037                        <bitRange>[0:0]</bitRange>
49038                        <access>read-write</access>
49039                    </field>
49040                </fields>
49041            </register>
49042            <register>
49043                <name>STATE</name>
49044                <addressOffset>0x00000038</addressOffset>
49045                <description>This register controls the power state of the 4 power domains.
49046                    The current power state is indicated in POWMAN_STATE_CURRENT which is read-only.
49047                    To change the state, write to POWMAN_STATE_REQ.
49048                    The coding of POWMAN_STATE_CURRENT &amp; POWMAN_STATE_REQ corresponds to the power states
49049                    defined in the datasheet:
49050                    bit 3 = SWCORE
49051                    bit 2 = XIP cache
49052                    bit 1 = SRAM0
49053                    bit 0 = SRAM1
49054                    0 = powered up
49055                    1 = powered down
49056                    When POWMAN_STATE_REQ is written, the POWMAN_STATE_WAITING flag is set while the Power Manager determines what is required. If an invalid transition is requested the Power Manager will still register the request in POWMAN_STATE_REQ but will also set the POWMAN_BAD_REQ flag. It will then implement the power-up requests and ignore the power down requests. To do nothing would risk entering an unrecoverable lock-up state. Invalid requests are: any combination of power up and power down requests any request that results in swcore boing powered and xip unpowered If the request is to power down the switched-core domain then POWMAN_STATE_WAITING stays active until the processors halt. During this time the POWMAN_STATE_REQ field can be re-written to change or cancel the request. When the power state transition begins the POWMAN_STATE_WAITING_flag is cleared, the POWMAN_STATE_CHANGING flag is set and POWMAN register writes are ignored until the transition completes.</description>
49057                <resetValue>0x0000000f</resetValue>
49058                <fields>
49059                    <field>
49060                        <name>CHANGING</name>
49061                        <bitRange>[13:13]</bitRange>
49062                        <access>read-only</access>
49063                    </field>
49064                    <field>
49065                        <name>WAITING</name>
49066                        <bitRange>[12:12]</bitRange>
49067                        <access>read-only</access>
49068                    </field>
49069                    <field>
49070                        <name>BAD_HW_REQ</name>
49071                        <description>Bad hardware initiated state request. Went back to state 0 (i.e. everything powered up)</description>
49072                        <bitRange>[11:11]</bitRange>
49073                        <access>read-only</access>
49074                    </field>
49075                    <field>
49076                        <name>BAD_SW_REQ</name>
49077                        <description>Bad software initiated state request. No action taken.</description>
49078                        <bitRange>[10:10]</bitRange>
49079                        <access>read-only</access>
49080                    </field>
49081                    <field>
49082                        <name>PWRUP_WHILE_WAITING</name>
49083                        <description>Request ignored because of a pending pwrup request. See current_pwrup_req. Note this blocks powering up AND powering down.</description>
49084                        <bitRange>[9:9]</bitRange>
49085                        <access>read-write</access>
49086                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49087                    </field>
49088                    <field>
49089                        <name>REQ_IGNORED</name>
49090                        <bitRange>[8:8]</bitRange>
49091                        <access>read-write</access>
49092                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49093                    </field>
49094                    <field>
49095                        <name>REQ</name>
49096                        <bitRange>[7:4]</bitRange>
49097                        <access>read-write</access>
49098                    </field>
49099                    <field>
49100                        <name>CURRENT</name>
49101                        <bitRange>[3:0]</bitRange>
49102                        <access>read-only</access>
49103                    </field>
49104                </fields>
49105            </register>
49106            <register>
49107                <name>POW_FASTDIV</name>
49108                <addressOffset>0x0000003c</addressOffset>
49109                <resetValue>0x00000040</resetValue>
49110                <fields>
49111                    <field>
49112                        <name>POW_FASTDIV</name>
49113                        <description>divides the POWMAN clock to provide a tick for the delay module and state machines
49114                            when clk_pow is running from the slow clock it is not divided
49115                            when clk_pow is running from the fast clock it is divided by tick_div</description>
49116                        <bitRange>[10:0]</bitRange>
49117                        <access>read-write</access>
49118                    </field>
49119                </fields>
49120            </register>
49121            <register>
49122                <name>POW_DELAY</name>
49123                <addressOffset>0x00000040</addressOffset>
49124                <description>power state machine delays</description>
49125                <resetValue>0x00002011</resetValue>
49126                <fields>
49127                    <field>
49128                        <name>SRAM_STEP</name>
49129                        <description>timing between the sram0 and sram1 power state machine steps
49130                            measured in units of the powman tick period (&gt;=1us), 0 gives a delay of 1 unit</description>
49131                        <bitRange>[15:8]</bitRange>
49132                        <access>read-write</access>
49133                    </field>
49134                    <field>
49135                        <name>XIP_STEP</name>
49136                        <description>timing between the xip power state machine steps
49137                            measured in units of the lposc period, 0 gives a delay of 1 unit</description>
49138                        <bitRange>[7:4]</bitRange>
49139                        <access>read-write</access>
49140                    </field>
49141                    <field>
49142                        <name>SWCORE_STEP</name>
49143                        <description>timing between the swcore power state machine steps
49144                            measured in units of the lposc period, 0 gives a delay of 1 unit</description>
49145                        <bitRange>[3:0]</bitRange>
49146                        <access>read-write</access>
49147                    </field>
49148                </fields>
49149            </register>
49150            <register>
49151                <name>EXT_CTRL0</name>
49152                <addressOffset>0x00000044</addressOffset>
49153                <description>Configures a gpio as a power mode aware control output</description>
49154                <resetValue>0x0000003f</resetValue>
49155                <fields>
49156                    <field>
49157                        <name>LP_EXIT_STATE</name>
49158                        <description>output level when exiting the low power state</description>
49159                        <bitRange>[14:14]</bitRange>
49160                        <access>read-write</access>
49161                    </field>
49162                    <field>
49163                        <name>LP_ENTRY_STATE</name>
49164                        <description>output level when entering the low power state</description>
49165                        <bitRange>[13:13]</bitRange>
49166                        <access>read-write</access>
49167                    </field>
49168                    <field>
49169                        <name>INIT_STATE</name>
49170                        <bitRange>[12:12]</bitRange>
49171                        <access>read-write</access>
49172                    </field>
49173                    <field>
49174                        <name>INIT</name>
49175                        <bitRange>[8:8]</bitRange>
49176                        <access>read-write</access>
49177                    </field>
49178                    <field>
49179                        <name>GPIO_SELECT</name>
49180                        <description>selects from gpio 0-&gt;30
49181                            set to 31 to disable this feature</description>
49182                        <bitRange>[5:0]</bitRange>
49183                        <access>read-write</access>
49184                    </field>
49185                </fields>
49186            </register>
49187            <register>
49188                <name>EXT_CTRL1</name>
49189                <addressOffset>0x00000048</addressOffset>
49190                <description>Configures a gpio as a power mode aware control output</description>
49191                <resetValue>0x0000003f</resetValue>
49192                <fields>
49193                    <field>
49194                        <name>LP_EXIT_STATE</name>
49195                        <description>output level when exiting the low power state</description>
49196                        <bitRange>[14:14]</bitRange>
49197                        <access>read-write</access>
49198                    </field>
49199                    <field>
49200                        <name>LP_ENTRY_STATE</name>
49201                        <description>output level when entering the low power state</description>
49202                        <bitRange>[13:13]</bitRange>
49203                        <access>read-write</access>
49204                    </field>
49205                    <field>
49206                        <name>INIT_STATE</name>
49207                        <bitRange>[12:12]</bitRange>
49208                        <access>read-write</access>
49209                    </field>
49210                    <field>
49211                        <name>INIT</name>
49212                        <bitRange>[8:8]</bitRange>
49213                        <access>read-write</access>
49214                    </field>
49215                    <field>
49216                        <name>GPIO_SELECT</name>
49217                        <description>selects from gpio 0-&gt;30
49218                            set to 31 to disable this feature</description>
49219                        <bitRange>[5:0]</bitRange>
49220                        <access>read-write</access>
49221                    </field>
49222                </fields>
49223            </register>
49224            <register>
49225                <name>EXT_TIME_REF</name>
49226                <addressOffset>0x0000004c</addressOffset>
49227                <description>Select a GPIO to use as a time reference, the source can be used to drive the low power clock at 32kHz, or to provide a 1ms tick to the timer, or provide a 1Hz tick to the timer. The tick selection is controlled by the POWMAN_TIMER register.</description>
49228                <resetValue>0x00000000</resetValue>
49229                <fields>
49230                    <field>
49231                        <name>DRIVE_LPCK</name>
49232                        <description>Use the selected GPIO to drive the 32kHz low power clock, in place of LPOSC. This field must only be written when POWMAN_TIMER_RUN=0</description>
49233                        <bitRange>[4:4]</bitRange>
49234                        <access>read-write</access>
49235                    </field>
49236                    <field>
49237                        <name>SOURCE_SEL</name>
49238                        <description>0 -&gt;  gpio12
49239                            1 -&gt;  gpio20
49240                            2 -&gt;  gpio14
49241                            3 -&gt;  gpio22</description>
49242                        <bitRange>[1:0]</bitRange>
49243                        <access>read-write</access>
49244                    </field>
49245                </fields>
49246            </register>
49247            <register>
49248                <name>LPOSC_FREQ_KHZ_INT</name>
49249                <addressOffset>0x00000050</addressOffset>
49250                <description>Informs the AON Timer of the integer component of the clock frequency when running off the LPOSC.</description>
49251                <resetValue>0x00000020</resetValue>
49252                <fields>
49253                    <field>
49254                        <name>LPOSC_FREQ_KHZ_INT</name>
49255                        <description>Integer component of the LPOSC or GPIO clock source frequency in kHz. Default = 32 This field must only be written when POWMAN_TIMER_RUN=0 or POWMAN_TIMER_USING_XOSC=1</description>
49256                        <bitRange>[5:0]</bitRange>
49257                        <access>read-write</access>
49258                    </field>
49259                </fields>
49260            </register>
49261            <register>
49262                <name>LPOSC_FREQ_KHZ_FRAC</name>
49263                <addressOffset>0x00000054</addressOffset>
49264                <description>Informs the AON Timer of the fractional component of the clock frequency when running off the LPOSC.</description>
49265                <resetValue>0x0000c49c</resetValue>
49266                <fields>
49267                    <field>
49268                        <name>LPOSC_FREQ_KHZ_FRAC</name>
49269                        <description>Fractional component of the LPOSC or GPIO clock source frequency in kHz. Default = 0.768 This field must only be written when POWMAN_TIMER_RUN=0 or POWMAN_TIMER_USING_XOSC=1</description>
49270                        <bitRange>[15:0]</bitRange>
49271                        <access>read-write</access>
49272                    </field>
49273                </fields>
49274            </register>
49275            <register>
49276                <name>XOSC_FREQ_KHZ_INT</name>
49277                <addressOffset>0x00000058</addressOffset>
49278                <description>Informs the AON Timer of the integer component of the clock frequency when running off the XOSC.</description>
49279                <resetValue>0x00002ee0</resetValue>
49280                <fields>
49281                    <field>
49282                        <name>XOSC_FREQ_KHZ_INT</name>
49283                        <description>Integer component of the XOSC frequency in kHz. Default = 12000 Must be &gt;1 This field must only be written when POWMAN_TIMER_RUN=0 or POWMAN_TIMER_USING_XOSC=0</description>
49284                        <bitRange>[15:0]</bitRange>
49285                        <access>read-write</access>
49286                    </field>
49287                </fields>
49288            </register>
49289            <register>
49290                <name>XOSC_FREQ_KHZ_FRAC</name>
49291                <addressOffset>0x0000005c</addressOffset>
49292                <description>Informs the AON Timer of the fractional component of the clock frequency when running off the XOSC.</description>
49293                <resetValue>0x00000000</resetValue>
49294                <fields>
49295                    <field>
49296                        <name>XOSC_FREQ_KHZ_FRAC</name>
49297                        <description>Fractional component of the XOSC frequency in kHz. This field must only be written when POWMAN_TIMER_RUN=0 or POWMAN_TIMER_USING_XOSC=0</description>
49298                        <bitRange>[15:0]</bitRange>
49299                        <access>read-write</access>
49300                    </field>
49301                </fields>
49302            </register>
49303            <register>
49304                <name>SET_TIME_63TO48</name>
49305                <addressOffset>0x00000060</addressOffset>
49306                <resetValue>0x00000000</resetValue>
49307                <fields>
49308                    <field>
49309                        <name>SET_TIME_63TO48</name>
49310                        <description>For setting the time, do not use for reading the time, use POWMAN_READ_TIME_UPPER and POWMAN_READ_TIME_LOWER. This field must only be written when POWMAN_TIMER_RUN=0</description>
49311                        <bitRange>[15:0]</bitRange>
49312                        <access>read-write</access>
49313                    </field>
49314                </fields>
49315            </register>
49316            <register>
49317                <name>SET_TIME_47TO32</name>
49318                <addressOffset>0x00000064</addressOffset>
49319                <resetValue>0x00000000</resetValue>
49320                <fields>
49321                    <field>
49322                        <name>SET_TIME_47TO32</name>
49323                        <description>For setting the time, do not use for reading the time, use POWMAN_READ_TIME_UPPER and POWMAN_READ_TIME_LOWER. This field must only be written when POWMAN_TIMER_RUN=0</description>
49324                        <bitRange>[15:0]</bitRange>
49325                        <access>read-write</access>
49326                    </field>
49327                </fields>
49328            </register>
49329            <register>
49330                <name>SET_TIME_31TO16</name>
49331                <addressOffset>0x00000068</addressOffset>
49332                <resetValue>0x00000000</resetValue>
49333                <fields>
49334                    <field>
49335                        <name>SET_TIME_31TO16</name>
49336                        <description>For setting the time, do not use for reading the time, use POWMAN_READ_TIME_UPPER and POWMAN_READ_TIME_LOWER. This field must only be written when POWMAN_TIMER_RUN=0</description>
49337                        <bitRange>[15:0]</bitRange>
49338                        <access>read-write</access>
49339                    </field>
49340                </fields>
49341            </register>
49342            <register>
49343                <name>SET_TIME_15TO0</name>
49344                <addressOffset>0x0000006c</addressOffset>
49345                <resetValue>0x00000000</resetValue>
49346                <fields>
49347                    <field>
49348                        <name>SET_TIME_15TO0</name>
49349                        <description>For setting the time, do not use for reading the time, use POWMAN_READ_TIME_UPPER and POWMAN_READ_TIME_LOWER. This field must only be written when POWMAN_TIMER_RUN=0</description>
49350                        <bitRange>[15:0]</bitRange>
49351                        <access>read-write</access>
49352                    </field>
49353                </fields>
49354            </register>
49355            <register>
49356                <name>READ_TIME_UPPER</name>
49357                <addressOffset>0x00000070</addressOffset>
49358                <resetValue>0x00000000</resetValue>
49359                <fields>
49360                    <field>
49361                        <name>READ_TIME_UPPER</name>
49362                        <description>For reading bits 63:32 of the timer. When reading all 64 bits it is possible for the LOWER count to rollover during the read. It is recommended to read UPPER, then LOWER, then re-read UPPER and, if it has changed, re-read LOWER.</description>
49363                        <bitRange>[31:0]</bitRange>
49364                        <access>read-only</access>
49365                    </field>
49366                </fields>
49367            </register>
49368            <register>
49369                <name>READ_TIME_LOWER</name>
49370                <addressOffset>0x00000074</addressOffset>
49371                <resetValue>0x00000000</resetValue>
49372                <fields>
49373                    <field>
49374                        <name>READ_TIME_LOWER</name>
49375                        <description>For reading bits 31:0 of the timer.</description>
49376                        <bitRange>[31:0]</bitRange>
49377                        <access>read-only</access>
49378                    </field>
49379                </fields>
49380            </register>
49381            <register>
49382                <name>ALARM_TIME_63TO48</name>
49383                <addressOffset>0x00000078</addressOffset>
49384                <resetValue>0x00000000</resetValue>
49385                <fields>
49386                    <field>
49387                        <name>ALARM_TIME_63TO48</name>
49388                        <description>This field must only be written when POWMAN_ALARM_ENAB=0</description>
49389                        <bitRange>[15:0]</bitRange>
49390                        <access>read-write</access>
49391                    </field>
49392                </fields>
49393            </register>
49394            <register>
49395                <name>ALARM_TIME_47TO32</name>
49396                <addressOffset>0x0000007c</addressOffset>
49397                <resetValue>0x00000000</resetValue>
49398                <fields>
49399                    <field>
49400                        <name>ALARM_TIME_47TO32</name>
49401                        <description>This field must only be written when POWMAN_ALARM_ENAB=0</description>
49402                        <bitRange>[15:0]</bitRange>
49403                        <access>read-write</access>
49404                    </field>
49405                </fields>
49406            </register>
49407            <register>
49408                <name>ALARM_TIME_31TO16</name>
49409                <addressOffset>0x00000080</addressOffset>
49410                <resetValue>0x00000000</resetValue>
49411                <fields>
49412                    <field>
49413                        <name>ALARM_TIME_31TO16</name>
49414                        <description>This field must only be written when POWMAN_ALARM_ENAB=0</description>
49415                        <bitRange>[15:0]</bitRange>
49416                        <access>read-write</access>
49417                    </field>
49418                </fields>
49419            </register>
49420            <register>
49421                <name>ALARM_TIME_15TO0</name>
49422                <addressOffset>0x00000084</addressOffset>
49423                <resetValue>0x00000000</resetValue>
49424                <fields>
49425                    <field>
49426                        <name>ALARM_TIME_15TO0</name>
49427                        <description>This field must only be written when POWMAN_ALARM_ENAB=0</description>
49428                        <bitRange>[15:0]</bitRange>
49429                        <access>read-write</access>
49430                    </field>
49431                </fields>
49432            </register>
49433            <register>
49434                <name>TIMER</name>
49435                <addressOffset>0x00000088</addressOffset>
49436                <resetValue>0x00000000</resetValue>
49437                <fields>
49438                    <field>
49439                        <name>USING_GPIO_1HZ</name>
49440                        <description>Timer is synchronised to a 1hz gpio source</description>
49441                        <bitRange>[19:19]</bitRange>
49442                        <access>read-only</access>
49443                    </field>
49444                    <field>
49445                        <name>USING_GPIO_1KHZ</name>
49446                        <description>Timer is running from a 1khz gpio source</description>
49447                        <bitRange>[18:18]</bitRange>
49448                        <access>read-only</access>
49449                    </field>
49450                    <field>
49451                        <name>USING_LPOSC</name>
49452                        <description>Timer is running from lposc</description>
49453                        <bitRange>[17:17]</bitRange>
49454                        <access>read-only</access>
49455                    </field>
49456                    <field>
49457                        <name>USING_XOSC</name>
49458                        <description>Timer is running from xosc</description>
49459                        <bitRange>[16:16]</bitRange>
49460                        <access>read-only</access>
49461                    </field>
49462                    <field>
49463                        <name>USE_GPIO_1HZ</name>
49464                        <description>Selects the gpio source as the reference for the sec counter. The msec counter will continue to use the lposc or xosc reference.</description>
49465                        <bitRange>[13:13]</bitRange>
49466                        <access>read-write</access>
49467                    </field>
49468                    <field>
49469                        <name>USE_GPIO_1KHZ</name>
49470                        <description>switch to gpio as the source of the 1kHz timer tick</description>
49471                        <bitRange>[10:10]</bitRange>
49472                        <access>write-only</access>
49473                    </field>
49474                    <field>
49475                        <name>USE_XOSC</name>
49476                        <description>switch to xosc as the source of the 1kHz timer tick</description>
49477                        <bitRange>[9:9]</bitRange>
49478                        <access>write-only</access>
49479                    </field>
49480                    <field>
49481                        <name>USE_LPOSC</name>
49482                        <description>Switch to lposc as the source of the 1kHz timer tick</description>
49483                        <bitRange>[8:8]</bitRange>
49484                        <access>write-only</access>
49485                    </field>
49486                    <field>
49487                        <name>ALARM</name>
49488                        <description>Alarm has fired. Write to 1 to clear the alarm.</description>
49489                        <bitRange>[6:6]</bitRange>
49490                        <access>read-write</access>
49491                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49492                    </field>
49493                    <field>
49494                        <name>PWRUP_ON_ALARM</name>
49495                        <description>Alarm wakes the chip from low power mode</description>
49496                        <bitRange>[5:5]</bitRange>
49497                        <access>read-write</access>
49498                    </field>
49499                    <field>
49500                        <name>ALARM_ENAB</name>
49501                        <description>Enables the alarm. The alarm must be disabled while writing the alarm time.</description>
49502                        <bitRange>[4:4]</bitRange>
49503                        <access>read-write</access>
49504                    </field>
49505                    <field>
49506                        <name>CLEAR</name>
49507                        <description>Clears the timer, does not disable the timer and does not affect the alarm. This control can be written at any time.</description>
49508                        <bitRange>[2:2]</bitRange>
49509                        <access>write-only</access>
49510                    </field>
49511                    <field>
49512                        <name>RUN</name>
49513                        <description>Timer enable. Setting this bit causes the timer to begin counting up from its current value. Clearing this bit stops the timer from counting.
49514
49515                            Before enabling the timer, set the POWMAN_LPOSC_FREQ* and POWMAN_XOSC_FREQ* registers to configure the count rate, and initialise the current time by writing to SET_TIME_63TO48 through SET_TIME_15TO0. You must not write to the SET_TIME_x registers when the timer is running.
49516
49517                            Once configured, start the timer by setting POWMAN_TIMER_RUN=1. This will start the timer running from the LPOSC. When the XOSC is available switch the reference clock to XOSC then select it as the timer clock by setting POWMAN_TIMER_USE_XOSC=1</description>
49518                        <bitRange>[1:1]</bitRange>
49519                        <access>read-write</access>
49520                    </field>
49521                    <field>
49522                        <name>NONSEC_WRITE</name>
49523                        <description>Control whether Non-secure software can write to the timer registers. All other registers are hardwired to be inaccessible to Non-secure.</description>
49524                        <bitRange>[0:0]</bitRange>
49525                        <access>read-write</access>
49526                    </field>
49527                </fields>
49528            </register>
49529            <register>
49530                <name>PWRUP0</name>
49531                <addressOffset>0x0000008c</addressOffset>
49532                <description>4 GPIO powerup events can be configured to wake the chip up from a low power state.
49533                    The pwrups are level/edge sensitive and can be set to trigger on a high/rising or low/falling event
49534                    The number of gpios available depends on the package option. An invalid selection will be ignored
49535                    source = 0 selects gpio0
49536                    .
49537                    .
49538                    source = 47 selects gpio47
49539                    source = 48 selects qspi_ss
49540                    source = 49 selects qspi_sd0
49541                    source = 50 selects qspi_sd1
49542                    source = 51 selects qspi_sd2
49543                    source = 52 selects qspi_sd3
49544                    source = 53 selects qspi_sclk
49545                    level  = 0 triggers the pwrup when the source is low
49546                    level  = 1 triggers the pwrup when the source is high</description>
49547                <resetValue>0x0000003f</resetValue>
49548                <fields>
49549                    <field>
49550                        <name>RAW_STATUS</name>
49551                        <description>Value of selected gpio pin (only if enable == 1)</description>
49552                        <bitRange>[10:10]</bitRange>
49553                        <access>read-only</access>
49554                    </field>
49555                    <field>
49556                        <name>STATUS</name>
49557                        <description>Status of gpio wakeup. Write to 1 to clear a latched edge detect.</description>
49558                        <bitRange>[9:9]</bitRange>
49559                        <access>read-write</access>
49560                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49561                    </field>
49562                    <field>
49563                        <name>MODE</name>
49564                        <description>Edge or level detect. Edge will detect a 0 to 1 transition (or 1 to 0 transition). Level will detect a 1 or 0. Both types of event get latched into the current_pwrup_req register.</description>
49565                        <bitRange>[8:8]</bitRange>
49566                        <access>read-write</access>
49567                        <enumeratedValues>
49568                            <enumeratedValue>
49569                                <name>level</name>
49570                                <value>0</value>
49571                            </enumeratedValue>
49572                            <enumeratedValue>
49573                                <name>edge</name>
49574                                <value>1</value>
49575                            </enumeratedValue>
49576                        </enumeratedValues>
49577                    </field>
49578                    <field>
49579                        <name>DIRECTION</name>
49580                        <bitRange>[7:7]</bitRange>
49581                        <access>read-write</access>
49582                        <enumeratedValues>
49583                            <enumeratedValue>
49584                                <name>low_falling</name>
49585                                <value>0</value>
49586                            </enumeratedValue>
49587                            <enumeratedValue>
49588                                <name>high_rising</name>
49589                                <value>1</value>
49590                            </enumeratedValue>
49591                        </enumeratedValues>
49592                    </field>
49593                    <field>
49594                        <name>ENABLE</name>
49595                        <description>Set to 1 to enable the wakeup source. Set to 0 to disable the wakeup source and clear a pending wakeup event.
49596                            If using edge detect a latched edge needs to be cleared by writing 1 to the status register also.</description>
49597                        <bitRange>[6:6]</bitRange>
49598                        <access>read-write</access>
49599                    </field>
49600                    <field>
49601                        <name>SOURCE</name>
49602                        <bitRange>[5:0]</bitRange>
49603                        <access>read-write</access>
49604                    </field>
49605                </fields>
49606            </register>
49607            <register>
49608                <name>PWRUP1</name>
49609                <addressOffset>0x00000090</addressOffset>
49610                <description>4 GPIO powerup events can be configured to wake the chip up from a low power state.
49611                    The pwrups are level/edge sensitive and can be set to trigger on a high/rising or low/falling event
49612                    The number of gpios available depends on the package option. An invalid selection will be ignored
49613                    source = 0 selects gpio0
49614                    .
49615                    .
49616                    source = 47 selects gpio47
49617                    source = 48 selects qspi_ss
49618                    source = 49 selects qspi_sd0
49619                    source = 50 selects qspi_sd1
49620                    source = 51 selects qspi_sd2
49621                    source = 52 selects qspi_sd3
49622                    source = 53 selects qspi_sclk
49623                    level  = 0 triggers the pwrup when the source is low
49624                    level  = 1 triggers the pwrup when the source is high</description>
49625                <resetValue>0x0000003f</resetValue>
49626                <fields>
49627                    <field>
49628                        <name>RAW_STATUS</name>
49629                        <description>Value of selected gpio pin (only if enable == 1)</description>
49630                        <bitRange>[10:10]</bitRange>
49631                        <access>read-only</access>
49632                    </field>
49633                    <field>
49634                        <name>STATUS</name>
49635                        <description>Status of gpio wakeup. Write to 1 to clear a latched edge detect.</description>
49636                        <bitRange>[9:9]</bitRange>
49637                        <access>read-write</access>
49638                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49639                    </field>
49640                    <field>
49641                        <name>MODE</name>
49642                        <description>Edge or level detect. Edge will detect a 0 to 1 transition (or 1 to 0 transition). Level will detect a 1 or 0. Both types of event get latched into the current_pwrup_req register.</description>
49643                        <bitRange>[8:8]</bitRange>
49644                        <access>read-write</access>
49645                        <enumeratedValues>
49646                            <enumeratedValue>
49647                                <name>level</name>
49648                                <value>0</value>
49649                            </enumeratedValue>
49650                            <enumeratedValue>
49651                                <name>edge</name>
49652                                <value>1</value>
49653                            </enumeratedValue>
49654                        </enumeratedValues>
49655                    </field>
49656                    <field>
49657                        <name>DIRECTION</name>
49658                        <bitRange>[7:7]</bitRange>
49659                        <access>read-write</access>
49660                        <enumeratedValues>
49661                            <enumeratedValue>
49662                                <name>low_falling</name>
49663                                <value>0</value>
49664                            </enumeratedValue>
49665                            <enumeratedValue>
49666                                <name>high_rising</name>
49667                                <value>1</value>
49668                            </enumeratedValue>
49669                        </enumeratedValues>
49670                    </field>
49671                    <field>
49672                        <name>ENABLE</name>
49673                        <description>Set to 1 to enable the wakeup source. Set to 0 to disable the wakeup source and clear a pending wakeup event.
49674                            If using edge detect a latched edge needs to be cleared by writing 1 to the status register also.</description>
49675                        <bitRange>[6:6]</bitRange>
49676                        <access>read-write</access>
49677                    </field>
49678                    <field>
49679                        <name>SOURCE</name>
49680                        <bitRange>[5:0]</bitRange>
49681                        <access>read-write</access>
49682                    </field>
49683                </fields>
49684            </register>
49685            <register>
49686                <name>PWRUP2</name>
49687                <addressOffset>0x00000094</addressOffset>
49688                <description>4 GPIO powerup events can be configured to wake the chip up from a low power state.
49689                    The pwrups are level/edge sensitive and can be set to trigger on a high/rising or low/falling event
49690                    The number of gpios available depends on the package option. An invalid selection will be ignored
49691                    source = 0 selects gpio0
49692                    .
49693                    .
49694                    source = 47 selects gpio47
49695                    source = 48 selects qspi_ss
49696                    source = 49 selects qspi_sd0
49697                    source = 50 selects qspi_sd1
49698                    source = 51 selects qspi_sd2
49699                    source = 52 selects qspi_sd3
49700                    source = 53 selects qspi_sclk
49701                    level  = 0 triggers the pwrup when the source is low
49702                    level  = 1 triggers the pwrup when the source is high</description>
49703                <resetValue>0x0000003f</resetValue>
49704                <fields>
49705                    <field>
49706                        <name>RAW_STATUS</name>
49707                        <description>Value of selected gpio pin (only if enable == 1)</description>
49708                        <bitRange>[10:10]</bitRange>
49709                        <access>read-only</access>
49710                    </field>
49711                    <field>
49712                        <name>STATUS</name>
49713                        <description>Status of gpio wakeup. Write to 1 to clear a latched edge detect.</description>
49714                        <bitRange>[9:9]</bitRange>
49715                        <access>read-write</access>
49716                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49717                    </field>
49718                    <field>
49719                        <name>MODE</name>
49720                        <description>Edge or level detect. Edge will detect a 0 to 1 transition (or 1 to 0 transition). Level will detect a 1 or 0. Both types of event get latched into the current_pwrup_req register.</description>
49721                        <bitRange>[8:8]</bitRange>
49722                        <access>read-write</access>
49723                        <enumeratedValues>
49724                            <enumeratedValue>
49725                                <name>level</name>
49726                                <value>0</value>
49727                            </enumeratedValue>
49728                            <enumeratedValue>
49729                                <name>edge</name>
49730                                <value>1</value>
49731                            </enumeratedValue>
49732                        </enumeratedValues>
49733                    </field>
49734                    <field>
49735                        <name>DIRECTION</name>
49736                        <bitRange>[7:7]</bitRange>
49737                        <access>read-write</access>
49738                        <enumeratedValues>
49739                            <enumeratedValue>
49740                                <name>low_falling</name>
49741                                <value>0</value>
49742                            </enumeratedValue>
49743                            <enumeratedValue>
49744                                <name>high_rising</name>
49745                                <value>1</value>
49746                            </enumeratedValue>
49747                        </enumeratedValues>
49748                    </field>
49749                    <field>
49750                        <name>ENABLE</name>
49751                        <description>Set to 1 to enable the wakeup source. Set to 0 to disable the wakeup source and clear a pending wakeup event.
49752                            If using edge detect a latched edge needs to be cleared by writing 1 to the status register also.</description>
49753                        <bitRange>[6:6]</bitRange>
49754                        <access>read-write</access>
49755                    </field>
49756                    <field>
49757                        <name>SOURCE</name>
49758                        <bitRange>[5:0]</bitRange>
49759                        <access>read-write</access>
49760                    </field>
49761                </fields>
49762            </register>
49763            <register>
49764                <name>PWRUP3</name>
49765                <addressOffset>0x00000098</addressOffset>
49766                <description>4 GPIO powerup events can be configured to wake the chip up from a low power state.
49767                    The pwrups are level/edge sensitive and can be set to trigger on a high/rising or low/falling event
49768                    The number of gpios available depends on the package option. An invalid selection will be ignored
49769                    source = 0 selects gpio0
49770                    .
49771                    .
49772                    source = 47 selects gpio47
49773                    source = 48 selects qspi_ss
49774                    source = 49 selects qspi_sd0
49775                    source = 50 selects qspi_sd1
49776                    source = 51 selects qspi_sd2
49777                    source = 52 selects qspi_sd3
49778                    source = 53 selects qspi_sclk
49779                    level  = 0 triggers the pwrup when the source is low
49780                    level  = 1 triggers the pwrup when the source is high</description>
49781                <resetValue>0x0000003f</resetValue>
49782                <fields>
49783                    <field>
49784                        <name>RAW_STATUS</name>
49785                        <description>Value of selected gpio pin (only if enable == 1)</description>
49786                        <bitRange>[10:10]</bitRange>
49787                        <access>read-only</access>
49788                    </field>
49789                    <field>
49790                        <name>STATUS</name>
49791                        <description>Status of gpio wakeup. Write to 1 to clear a latched edge detect.</description>
49792                        <bitRange>[9:9]</bitRange>
49793                        <access>read-write</access>
49794                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49795                    </field>
49796                    <field>
49797                        <name>MODE</name>
49798                        <description>Edge or level detect. Edge will detect a 0 to 1 transition (or 1 to 0 transition). Level will detect a 1 or 0. Both types of event get latched into the current_pwrup_req register.</description>
49799                        <bitRange>[8:8]</bitRange>
49800                        <access>read-write</access>
49801                        <enumeratedValues>
49802                            <enumeratedValue>
49803                                <name>level</name>
49804                                <value>0</value>
49805                            </enumeratedValue>
49806                            <enumeratedValue>
49807                                <name>edge</name>
49808                                <value>1</value>
49809                            </enumeratedValue>
49810                        </enumeratedValues>
49811                    </field>
49812                    <field>
49813                        <name>DIRECTION</name>
49814                        <bitRange>[7:7]</bitRange>
49815                        <access>read-write</access>
49816                        <enumeratedValues>
49817                            <enumeratedValue>
49818                                <name>low_falling</name>
49819                                <value>0</value>
49820                            </enumeratedValue>
49821                            <enumeratedValue>
49822                                <name>high_rising</name>
49823                                <value>1</value>
49824                            </enumeratedValue>
49825                        </enumeratedValues>
49826                    </field>
49827                    <field>
49828                        <name>ENABLE</name>
49829                        <description>Set to 1 to enable the wakeup source. Set to 0 to disable the wakeup source and clear a pending wakeup event.
49830                            If using edge detect a latched edge needs to be cleared by writing 1 to the status register also.</description>
49831                        <bitRange>[6:6]</bitRange>
49832                        <access>read-write</access>
49833                    </field>
49834                    <field>
49835                        <name>SOURCE</name>
49836                        <bitRange>[5:0]</bitRange>
49837                        <access>read-write</access>
49838                    </field>
49839                </fields>
49840            </register>
49841            <register>
49842                <name>CURRENT_PWRUP_REQ</name>
49843                <addressOffset>0x0000009c</addressOffset>
49844                <description>Indicates current powerup request state
49845                    pwrup events can be cleared by removing the enable from the pwrup register. The alarm pwrup req can be cleared by clearing timer.alarm_enab
49846                    0 = chip reset, for the source of the last reset see POWMAN_CHIP_RESET
49847                    1 = pwrup0
49848                    2 = pwrup1
49849                    3 = pwrup2
49850                    4 = pwrup3
49851                    5 = coresight_pwrup
49852                    6 = alarm_pwrup</description>
49853                <resetValue>0x00000000</resetValue>
49854                <fields>
49855                    <field>
49856                        <name>CURRENT_PWRUP_REQ</name>
49857                        <bitRange>[6:0]</bitRange>
49858                        <access>read-only</access>
49859                    </field>
49860                </fields>
49861            </register>
49862            <register>
49863                <name>LAST_SWCORE_PWRUP</name>
49864                <addressOffset>0x000000a0</addressOffset>
49865                <description>Indicates which pwrup source triggered the last switched-core power up
49866                    0 = chip reset, for the source of the last reset see POWMAN_CHIP_RESET
49867                    1 = pwrup0
49868                    2 = pwrup1
49869                    3 = pwrup2
49870                    4 = pwrup3
49871                    5 = coresight_pwrup
49872                    6 = alarm_pwrup</description>
49873                <resetValue>0x00000000</resetValue>
49874                <fields>
49875                    <field>
49876                        <name>LAST_SWCORE_PWRUP</name>
49877                        <bitRange>[6:0]</bitRange>
49878                        <access>read-only</access>
49879                    </field>
49880                </fields>
49881            </register>
49882            <register>
49883                <name>DBG_PWRCFG</name>
49884                <addressOffset>0x000000a4</addressOffset>
49885                <resetValue>0x00000000</resetValue>
49886                <fields>
49887                    <field>
49888                        <name>IGNORE</name>
49889                        <description>Ignore pwrup req from debugger. If pwrup req is asserted then this will prevent power down and set powerdown blocked. Set ignore to stop paying attention to pwrup_req</description>
49890                        <bitRange>[0:0]</bitRange>
49891                        <access>read-write</access>
49892                    </field>
49893                </fields>
49894            </register>
49895            <register>
49896                <name>BOOTDIS</name>
49897                <addressOffset>0x000000a8</addressOffset>
49898                <description>Tell the bootrom to ignore the BOOT0..3 registers following the next RSM reset (e.g. the next core power down/up).
49899
49900                    If an early boot stage has soft-locked some OTP pages in order to protect their contents from later stages, there is a risk that Secure code running at a later stage can unlock the pages by powering the core up and down.
49901
49902                    This register can be used to ensure that the bootloader runs as normal on the next power up, preventing Secure code at a later stage from accessing OTP in its unlocked state.
49903
49904                    Should be used in conjunction with the OTP BOOTDIS register.</description>
49905                <resetValue>0x00000000</resetValue>
49906                <fields>
49907                    <field>
49908                        <name>NEXT</name>
49909                        <description>This flag always ORs writes into its current contents. It can be set but not cleared by software.
49910
49911                            The BOOTDIS_NEXT bit is OR&#39;d into the BOOTDIS_NOW bit when the core is powered down. Simultaneously, the BOOTDIS_NEXT bit is cleared. Setting this bit means that the BOOT0..3 registers will be ignored following the next reset of the RSM by powman.
49912
49913                            This flag should be set by an early boot stage that has soft-locked OTP pages, to prevent later stages from unlocking it by power cycling.</description>
49914                        <bitRange>[1:1]</bitRange>
49915                        <access>read-write</access>
49916                    </field>
49917                    <field>
49918                        <name>NOW</name>
49919                        <description>When powman resets the RSM, the current value of BOOTDIS_NEXT is OR&#39;d into BOOTDIS_NOW, and BOOTDIS_NEXT is cleared.
49920
49921                            The bootrom checks this flag before reading the BOOT0..3 registers. If it is set, the bootrom clears it, and ignores the BOOT registers. This prevents Secure software from diverting the boot path before a bootloader has had the chance to soft lock OTP pages containing sensitive data.</description>
49922                        <bitRange>[0:0]</bitRange>
49923                        <access>read-write</access>
49924                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
49925                    </field>
49926                </fields>
49927            </register>
49928            <register>
49929                <name>DBGCONFIG</name>
49930                <addressOffset>0x000000ac</addressOffset>
49931                <resetValue>0x00000000</resetValue>
49932                <fields>
49933                    <field>
49934                        <name>DP_INSTID</name>
49935                        <description>Configure DP instance ID for SWD multidrop selection.
49936                            Recommend that this is NOT changed until you require debug access in multi-chip environment</description>
49937                        <bitRange>[3:0]</bitRange>
49938                        <access>read-write</access>
49939                    </field>
49940                </fields>
49941            </register>
49942            <register>
49943                <name>SCRATCH0</name>
49944                <addressOffset>0x000000b0</addressOffset>
49945                <description>Scratch register. Information persists in low power mode</description>
49946                <resetValue>0x00000000</resetValue>
49947                <fields>
49948                    <field>
49949                        <name>SCRATCH0</name>
49950                        <bitRange>[31:0]</bitRange>
49951                        <access>read-write</access>
49952                    </field>
49953                </fields>
49954            </register>
49955            <register>
49956                <name>SCRATCH1</name>
49957                <addressOffset>0x000000b4</addressOffset>
49958                <description>Scratch register. Information persists in low power mode</description>
49959                <resetValue>0x00000000</resetValue>
49960                <fields>
49961                    <field>
49962                        <name>SCRATCH1</name>
49963                        <bitRange>[31:0]</bitRange>
49964                        <access>read-write</access>
49965                    </field>
49966                </fields>
49967            </register>
49968            <register>
49969                <name>SCRATCH2</name>
49970                <addressOffset>0x000000b8</addressOffset>
49971                <description>Scratch register. Information persists in low power mode</description>
49972                <resetValue>0x00000000</resetValue>
49973                <fields>
49974                    <field>
49975                        <name>SCRATCH2</name>
49976                        <bitRange>[31:0]</bitRange>
49977                        <access>read-write</access>
49978                    </field>
49979                </fields>
49980            </register>
49981            <register>
49982                <name>SCRATCH3</name>
49983                <addressOffset>0x000000bc</addressOffset>
49984                <description>Scratch register. Information persists in low power mode</description>
49985                <resetValue>0x00000000</resetValue>
49986                <fields>
49987                    <field>
49988                        <name>SCRATCH3</name>
49989                        <bitRange>[31:0]</bitRange>
49990                        <access>read-write</access>
49991                    </field>
49992                </fields>
49993            </register>
49994            <register>
49995                <name>SCRATCH4</name>
49996                <addressOffset>0x000000c0</addressOffset>
49997                <description>Scratch register. Information persists in low power mode</description>
49998                <resetValue>0x00000000</resetValue>
49999                <fields>
50000                    <field>
50001                        <name>SCRATCH4</name>
50002                        <bitRange>[31:0]</bitRange>
50003                        <access>read-write</access>
50004                    </field>
50005                </fields>
50006            </register>
50007            <register>
50008                <name>SCRATCH5</name>
50009                <addressOffset>0x000000c4</addressOffset>
50010                <description>Scratch register. Information persists in low power mode</description>
50011                <resetValue>0x00000000</resetValue>
50012                <fields>
50013                    <field>
50014                        <name>SCRATCH5</name>
50015                        <bitRange>[31:0]</bitRange>
50016                        <access>read-write</access>
50017                    </field>
50018                </fields>
50019            </register>
50020            <register>
50021                <name>SCRATCH6</name>
50022                <addressOffset>0x000000c8</addressOffset>
50023                <description>Scratch register. Information persists in low power mode</description>
50024                <resetValue>0x00000000</resetValue>
50025                <fields>
50026                    <field>
50027                        <name>SCRATCH6</name>
50028                        <bitRange>[31:0]</bitRange>
50029                        <access>read-write</access>
50030                    </field>
50031                </fields>
50032            </register>
50033            <register>
50034                <name>SCRATCH7</name>
50035                <addressOffset>0x000000cc</addressOffset>
50036                <description>Scratch register. Information persists in low power mode</description>
50037                <resetValue>0x00000000</resetValue>
50038                <fields>
50039                    <field>
50040                        <name>SCRATCH7</name>
50041                        <bitRange>[31:0]</bitRange>
50042                        <access>read-write</access>
50043                    </field>
50044                </fields>
50045            </register>
50046            <register>
50047                <name>BOOT0</name>
50048                <addressOffset>0x000000d0</addressOffset>
50049                <description>Scratch register. Information persists in low power mode</description>
50050                <resetValue>0x00000000</resetValue>
50051                <fields>
50052                    <field>
50053                        <name>BOOT0</name>
50054                        <bitRange>[31:0]</bitRange>
50055                        <access>read-write</access>
50056                    </field>
50057                </fields>
50058            </register>
50059            <register>
50060                <name>BOOT1</name>
50061                <addressOffset>0x000000d4</addressOffset>
50062                <description>Scratch register. Information persists in low power mode</description>
50063                <resetValue>0x00000000</resetValue>
50064                <fields>
50065                    <field>
50066                        <name>BOOT1</name>
50067                        <bitRange>[31:0]</bitRange>
50068                        <access>read-write</access>
50069                    </field>
50070                </fields>
50071            </register>
50072            <register>
50073                <name>BOOT2</name>
50074                <addressOffset>0x000000d8</addressOffset>
50075                <description>Scratch register. Information persists in low power mode</description>
50076                <resetValue>0x00000000</resetValue>
50077                <fields>
50078                    <field>
50079                        <name>BOOT2</name>
50080                        <bitRange>[31:0]</bitRange>
50081                        <access>read-write</access>
50082                    </field>
50083                </fields>
50084            </register>
50085            <register>
50086                <name>BOOT3</name>
50087                <addressOffset>0x000000dc</addressOffset>
50088                <description>Scratch register. Information persists in low power mode</description>
50089                <resetValue>0x00000000</resetValue>
50090                <fields>
50091                    <field>
50092                        <name>BOOT3</name>
50093                        <bitRange>[31:0]</bitRange>
50094                        <access>read-write</access>
50095                    </field>
50096                </fields>
50097            </register>
50098            <register>
50099                <name>INTR</name>
50100                <addressOffset>0x000000e0</addressOffset>
50101                <description>Raw Interrupts</description>
50102                <resetValue>0x00000000</resetValue>
50103                <fields>
50104                    <field>
50105                        <name>PWRUP_WHILE_WAITING</name>
50106                        <description>Source is state.pwrup_while_waiting</description>
50107                        <bitRange>[3:3]</bitRange>
50108                        <access>read-only</access>
50109                    </field>
50110                    <field>
50111                        <name>STATE_REQ_IGNORED</name>
50112                        <description>Source is state.req_ignored</description>
50113                        <bitRange>[2:2]</bitRange>
50114                        <access>read-only</access>
50115                    </field>
50116                    <field>
50117                        <name>TIMER</name>
50118                        <bitRange>[1:1]</bitRange>
50119                        <access>read-only</access>
50120                    </field>
50121                    <field>
50122                        <name>VREG_OUTPUT_LOW</name>
50123                        <bitRange>[0:0]</bitRange>
50124                        <access>read-write</access>
50125                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
50126                    </field>
50127                </fields>
50128            </register>
50129            <register>
50130                <name>INTE</name>
50131                <addressOffset>0x000000e4</addressOffset>
50132                <description>Interrupt Enable</description>
50133                <resetValue>0x00000000</resetValue>
50134                <fields>
50135                    <field>
50136                        <name>PWRUP_WHILE_WAITING</name>
50137                        <description>Source is state.pwrup_while_waiting</description>
50138                        <bitRange>[3:3]</bitRange>
50139                        <access>read-write</access>
50140                    </field>
50141                    <field>
50142                        <name>STATE_REQ_IGNORED</name>
50143                        <description>Source is state.req_ignored</description>
50144                        <bitRange>[2:2]</bitRange>
50145                        <access>read-write</access>
50146                    </field>
50147                    <field>
50148                        <name>TIMER</name>
50149                        <bitRange>[1:1]</bitRange>
50150                        <access>read-write</access>
50151                    </field>
50152                    <field>
50153                        <name>VREG_OUTPUT_LOW</name>
50154                        <bitRange>[0:0]</bitRange>
50155                        <access>read-write</access>
50156                    </field>
50157                </fields>
50158            </register>
50159            <register>
50160                <name>INTF</name>
50161                <addressOffset>0x000000e8</addressOffset>
50162                <description>Interrupt Force</description>
50163                <resetValue>0x00000000</resetValue>
50164                <fields>
50165                    <field>
50166                        <name>PWRUP_WHILE_WAITING</name>
50167                        <description>Source is state.pwrup_while_waiting</description>
50168                        <bitRange>[3:3]</bitRange>
50169                        <access>read-write</access>
50170                    </field>
50171                    <field>
50172                        <name>STATE_REQ_IGNORED</name>
50173                        <description>Source is state.req_ignored</description>
50174                        <bitRange>[2:2]</bitRange>
50175                        <access>read-write</access>
50176                    </field>
50177                    <field>
50178                        <name>TIMER</name>
50179                        <bitRange>[1:1]</bitRange>
50180                        <access>read-write</access>
50181                    </field>
50182                    <field>
50183                        <name>VREG_OUTPUT_LOW</name>
50184                        <bitRange>[0:0]</bitRange>
50185                        <access>read-write</access>
50186                    </field>
50187                </fields>
50188            </register>
50189            <register>
50190                <name>INTS</name>
50191                <addressOffset>0x000000ec</addressOffset>
50192                <description>Interrupt status after masking &amp; forcing</description>
50193                <resetValue>0x00000000</resetValue>
50194                <fields>
50195                    <field>
50196                        <name>PWRUP_WHILE_WAITING</name>
50197                        <description>Source is state.pwrup_while_waiting</description>
50198                        <bitRange>[3:3]</bitRange>
50199                        <access>read-only</access>
50200                    </field>
50201                    <field>
50202                        <name>STATE_REQ_IGNORED</name>
50203                        <description>Source is state.req_ignored</description>
50204                        <bitRange>[2:2]</bitRange>
50205                        <access>read-only</access>
50206                    </field>
50207                    <field>
50208                        <name>TIMER</name>
50209                        <bitRange>[1:1]</bitRange>
50210                        <access>read-only</access>
50211                    </field>
50212                    <field>
50213                        <name>VREG_OUTPUT_LOW</name>
50214                        <bitRange>[0:0]</bitRange>
50215                        <access>read-only</access>
50216                    </field>
50217                </fields>
50218            </register>
50219        </registers>
50220    </peripheral>
50221    <peripheral>
50222        <name>WATCHDOG</name>
50223        <baseAddress>0x400d8000</baseAddress>
50224        <addressBlock>
50225            <offset>0</offset>
50226            <size>44</size>
50227            <usage>registers</usage>
50228        </addressBlock>
50229        <registers>
50230            <register>
50231                <name>CTRL</name>
50232                <addressOffset>0x00000000</addressOffset>
50233                <description>Watchdog control
50234                    The rst_wdsel register determines which subsystems are reset when the watchdog is triggered.
50235                    The watchdog can be triggered in software.</description>
50236                <resetValue>0x07000000</resetValue>
50237                <fields>
50238                    <field>
50239                        <name>TRIGGER</name>
50240                        <description>Trigger a watchdog reset</description>
50241                        <bitRange>[31:31]</bitRange>
50242                        <access>write-only</access>
50243                    </field>
50244                    <field>
50245                        <name>ENABLE</name>
50246                        <description>When not enabled the watchdog timer is paused</description>
50247                        <bitRange>[30:30]</bitRange>
50248                        <access>read-write</access>
50249                    </field>
50250                    <field>
50251                        <name>PAUSE_DBG1</name>
50252                        <description>Pause the watchdog timer when processor 1 is in debug mode</description>
50253                        <bitRange>[26:26]</bitRange>
50254                        <access>read-write</access>
50255                    </field>
50256                    <field>
50257                        <name>PAUSE_DBG0</name>
50258                        <description>Pause the watchdog timer when processor 0 is in debug mode</description>
50259                        <bitRange>[25:25]</bitRange>
50260                        <access>read-write</access>
50261                    </field>
50262                    <field>
50263                        <name>PAUSE_JTAG</name>
50264                        <description>Pause the watchdog timer when JTAG is accessing the bus fabric</description>
50265                        <bitRange>[24:24]</bitRange>
50266                        <access>read-write</access>
50267                    </field>
50268                    <field>
50269                        <name>TIME</name>
50270                        <description>Indicates the time in usec before a watchdog reset will be triggered</description>
50271                        <bitRange>[23:0]</bitRange>
50272                        <access>read-only</access>
50273                    </field>
50274                </fields>
50275            </register>
50276            <register>
50277                <name>LOAD</name>
50278                <addressOffset>0x00000004</addressOffset>
50279                <description>Load the watchdog timer. The maximum setting is 0xffffff which corresponds to approximately 16 seconds.</description>
50280                <resetValue>0x00000000</resetValue>
50281                <fields>
50282                    <field>
50283                        <name>LOAD</name>
50284                        <bitRange>[23:0]</bitRange>
50285                        <access>write-only</access>
50286                    </field>
50287                </fields>
50288            </register>
50289            <register>
50290                <name>REASON</name>
50291                <addressOffset>0x00000008</addressOffset>
50292                <description>Logs the reason for the last reset. Both bits are zero for the case of a hardware reset.
50293
50294                    Additionally, as of RP2350, a debugger warm reset of either core (SYSRESETREQ or hartreset) will also clear the watchdog reason register, so that software loaded under the debugger following a watchdog timeout will not continue to see the timeout condition.</description>
50295                <resetValue>0x00000000</resetValue>
50296                <fields>
50297                    <field>
50298                        <name>FORCE</name>
50299                        <bitRange>[1:1]</bitRange>
50300                        <access>read-only</access>
50301                    </field>
50302                    <field>
50303                        <name>TIMER</name>
50304                        <bitRange>[0:0]</bitRange>
50305                        <access>read-only</access>
50306                    </field>
50307                </fields>
50308            </register>
50309            <register>
50310                <name>SCRATCH0</name>
50311                <addressOffset>0x0000000c</addressOffset>
50312                <description>Scratch register. Information persists through soft reset of the chip.</description>
50313                <resetValue>0x00000000</resetValue>
50314                <fields>
50315                    <field>
50316                        <name>SCRATCH0</name>
50317                        <bitRange>[31:0]</bitRange>
50318                        <access>read-write</access>
50319                    </field>
50320                </fields>
50321            </register>
50322            <register>
50323                <name>SCRATCH1</name>
50324                <addressOffset>0x00000010</addressOffset>
50325                <description>Scratch register. Information persists through soft reset of the chip.</description>
50326                <resetValue>0x00000000</resetValue>
50327                <fields>
50328                    <field>
50329                        <name>SCRATCH1</name>
50330                        <bitRange>[31:0]</bitRange>
50331                        <access>read-write</access>
50332                    </field>
50333                </fields>
50334            </register>
50335            <register>
50336                <name>SCRATCH2</name>
50337                <addressOffset>0x00000014</addressOffset>
50338                <description>Scratch register. Information persists through soft reset of the chip.</description>
50339                <resetValue>0x00000000</resetValue>
50340                <fields>
50341                    <field>
50342                        <name>SCRATCH2</name>
50343                        <bitRange>[31:0]</bitRange>
50344                        <access>read-write</access>
50345                    </field>
50346                </fields>
50347            </register>
50348            <register>
50349                <name>SCRATCH3</name>
50350                <addressOffset>0x00000018</addressOffset>
50351                <description>Scratch register. Information persists through soft reset of the chip.</description>
50352                <resetValue>0x00000000</resetValue>
50353                <fields>
50354                    <field>
50355                        <name>SCRATCH3</name>
50356                        <bitRange>[31:0]</bitRange>
50357                        <access>read-write</access>
50358                    </field>
50359                </fields>
50360            </register>
50361            <register>
50362                <name>SCRATCH4</name>
50363                <addressOffset>0x0000001c</addressOffset>
50364                <description>Scratch register. Information persists through soft reset of the chip.</description>
50365                <resetValue>0x00000000</resetValue>
50366                <fields>
50367                    <field>
50368                        <name>SCRATCH4</name>
50369                        <bitRange>[31:0]</bitRange>
50370                        <access>read-write</access>
50371                    </field>
50372                </fields>
50373            </register>
50374            <register>
50375                <name>SCRATCH5</name>
50376                <addressOffset>0x00000020</addressOffset>
50377                <description>Scratch register. Information persists through soft reset of the chip.</description>
50378                <resetValue>0x00000000</resetValue>
50379                <fields>
50380                    <field>
50381                        <name>SCRATCH5</name>
50382                        <bitRange>[31:0]</bitRange>
50383                        <access>read-write</access>
50384                    </field>
50385                </fields>
50386            </register>
50387            <register>
50388                <name>SCRATCH6</name>
50389                <addressOffset>0x00000024</addressOffset>
50390                <description>Scratch register. Information persists through soft reset of the chip.</description>
50391                <resetValue>0x00000000</resetValue>
50392                <fields>
50393                    <field>
50394                        <name>SCRATCH6</name>
50395                        <bitRange>[31:0]</bitRange>
50396                        <access>read-write</access>
50397                    </field>
50398                </fields>
50399            </register>
50400            <register>
50401                <name>SCRATCH7</name>
50402                <addressOffset>0x00000028</addressOffset>
50403                <description>Scratch register. Information persists through soft reset of the chip.</description>
50404                <resetValue>0x00000000</resetValue>
50405                <fields>
50406                    <field>
50407                        <name>SCRATCH7</name>
50408                        <bitRange>[31:0]</bitRange>
50409                        <access>read-write</access>
50410                    </field>
50411                </fields>
50412            </register>
50413        </registers>
50414    </peripheral>
50415    <peripheral>
50416        <name>DMA</name>
50417        <description>DMA with separate read and write masters</description>
50418        <baseAddress>0x50000000</baseAddress>
50419        <addressBlock>
50420            <offset>0</offset>
50421            <size>3016</size>
50422            <usage>registers</usage>
50423        </addressBlock>
50424        <interrupt>
50425            <name>DMA_IRQ_0</name>
50426            <value>10</value>
50427        </interrupt>
50428        <interrupt>
50429            <name>DMA_IRQ_1</name>
50430            <value>11</value>
50431        </interrupt>
50432        <interrupt>
50433            <name>DMA_IRQ_2</name>
50434            <value>12</value>
50435        </interrupt>
50436        <interrupt>
50437            <name>DMA_IRQ_3</name>
50438            <value>13</value>
50439        </interrupt>
50440        <registers>
50441            <register>
50442                <name>CH0_READ_ADDR</name>
50443                <addressOffset>0x00000000</addressOffset>
50444                <description>DMA Channel 0 Read Address pointer</description>
50445                <resetValue>0x00000000</resetValue>
50446                <fields>
50447                    <field>
50448                        <name>CH0_READ_ADDR</name>
50449                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
50450                        <bitRange>[31:0]</bitRange>
50451                        <access>read-write</access>
50452                    </field>
50453                </fields>
50454            </register>
50455            <register>
50456                <name>CH0_WRITE_ADDR</name>
50457                <addressOffset>0x00000004</addressOffset>
50458                <description>DMA Channel 0 Write Address pointer</description>
50459                <resetValue>0x00000000</resetValue>
50460                <fields>
50461                    <field>
50462                        <name>CH0_WRITE_ADDR</name>
50463                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
50464                        <bitRange>[31:0]</bitRange>
50465                        <access>read-write</access>
50466                    </field>
50467                </fields>
50468            </register>
50469            <register>
50470                <name>CH0_TRANS_COUNT</name>
50471                <addressOffset>0x00000008</addressOffset>
50472                <description>DMA Channel 0 Transfer Count</description>
50473                <resetValue>0x00000000</resetValue>
50474                <fields>
50475                    <field>
50476                        <name>MODE</name>
50477                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
50478
50479                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
50480
50481                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
50482
50483                            All other values are reserved.</description>
50484                        <bitRange>[31:28]</bitRange>
50485                        <access>read-write</access>
50486                        <enumeratedValues>
50487                            <enumeratedValue>
50488                                <name>NORMAL</name>
50489                                <value>0</value>
50490                            </enumeratedValue>
50491                            <enumeratedValue>
50492                                <name>TRIGGER_SELF</name>
50493                                <value>1</value>
50494                            </enumeratedValue>
50495                            <enumeratedValue>
50496                                <name>ENDLESS</name>
50497                                <value>15</value>
50498                            </enumeratedValue>
50499                        </enumeratedValues>
50500                    </field>
50501                    <field>
50502                        <name>COUNT</name>
50503                        <description>28-bit transfer count (256 million transfers maximum).
50504
50505                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
50506
50507                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
50508
50509                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
50510
50511                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
50512                        <bitRange>[27:0]</bitRange>
50513                        <access>read-write</access>
50514                    </field>
50515                </fields>
50516            </register>
50517            <register>
50518                <name>CH0_CTRL_TRIG</name>
50519                <addressOffset>0x0000000c</addressOffset>
50520                <description>DMA Channel 0 Control and Status</description>
50521                <resetValue>0x00000000</resetValue>
50522                <fields>
50523                    <field>
50524                        <name>AHB_ERROR</name>
50525                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
50526                        <bitRange>[31:31]</bitRange>
50527                        <access>read-only</access>
50528                    </field>
50529                    <field>
50530                        <name>READ_ERROR</name>
50531                        <description>If 1, the channel received a read bus error. Write one to clear.
50532                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
50533                        <bitRange>[30:30]</bitRange>
50534                        <access>read-write</access>
50535                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
50536                    </field>
50537                    <field>
50538                        <name>WRITE_ERROR</name>
50539                        <description>If 1, the channel received a write bus error. Write one to clear.
50540                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
50541                        <bitRange>[29:29]</bitRange>
50542                        <access>read-write</access>
50543                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
50544                    </field>
50545                    <field>
50546                        <name>BUSY</name>
50547                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
50548
50549                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
50550                        <bitRange>[26:26]</bitRange>
50551                        <access>read-only</access>
50552                    </field>
50553                    <field>
50554                        <name>SNIFF_EN</name>
50555                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
50556
50557                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
50558                        <bitRange>[25:25]</bitRange>
50559                        <access>read-write</access>
50560                    </field>
50561                    <field>
50562                        <name>BSWAP</name>
50563                        <description>Apply byte-swap transformation to DMA data.
50564                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
50565                        <bitRange>[24:24]</bitRange>
50566                        <access>read-write</access>
50567                    </field>
50568                    <field>
50569                        <name>IRQ_QUIET</name>
50570                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
50571
50572                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
50573                        <bitRange>[23:23]</bitRange>
50574                        <access>read-write</access>
50575                    </field>
50576                    <field>
50577                        <name>TREQ_SEL</name>
50578                        <description>Select a Transfer Request signal.
50579                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
50580                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
50581                        <bitRange>[22:17]</bitRange>
50582                        <access>read-write</access>
50583                        <enumeratedValues>
50584                            <enumeratedValue>
50585                                <name>PIO0_TX0</name>
50586                                <value>0</value>
50587                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
50588                            </enumeratedValue>
50589                            <enumeratedValue>
50590                                <name>PIO0_TX1</name>
50591                                <value>1</value>
50592                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
50593                            </enumeratedValue>
50594                            <enumeratedValue>
50595                                <name>PIO0_TX2</name>
50596                                <value>2</value>
50597                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
50598                            </enumeratedValue>
50599                            <enumeratedValue>
50600                                <name>PIO0_TX3</name>
50601                                <value>3</value>
50602                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
50603                            </enumeratedValue>
50604                            <enumeratedValue>
50605                                <name>PIO0_RX0</name>
50606                                <value>4</value>
50607                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
50608                            </enumeratedValue>
50609                            <enumeratedValue>
50610                                <name>PIO0_RX1</name>
50611                                <value>5</value>
50612                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
50613                            </enumeratedValue>
50614                            <enumeratedValue>
50615                                <name>PIO0_RX2</name>
50616                                <value>6</value>
50617                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
50618                            </enumeratedValue>
50619                            <enumeratedValue>
50620                                <name>PIO0_RX3</name>
50621                                <value>7</value>
50622                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
50623                            </enumeratedValue>
50624                            <enumeratedValue>
50625                                <name>PIO1_TX0</name>
50626                                <value>8</value>
50627                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
50628                            </enumeratedValue>
50629                            <enumeratedValue>
50630                                <name>PIO1_TX1</name>
50631                                <value>9</value>
50632                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
50633                            </enumeratedValue>
50634                            <enumeratedValue>
50635                                <name>PIO1_TX2</name>
50636                                <value>10</value>
50637                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
50638                            </enumeratedValue>
50639                            <enumeratedValue>
50640                                <name>PIO1_TX3</name>
50641                                <value>11</value>
50642                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
50643                            </enumeratedValue>
50644                            <enumeratedValue>
50645                                <name>PIO1_RX0</name>
50646                                <value>12</value>
50647                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
50648                            </enumeratedValue>
50649                            <enumeratedValue>
50650                                <name>PIO1_RX1</name>
50651                                <value>13</value>
50652                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
50653                            </enumeratedValue>
50654                            <enumeratedValue>
50655                                <name>PIO1_RX2</name>
50656                                <value>14</value>
50657                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
50658                            </enumeratedValue>
50659                            <enumeratedValue>
50660                                <name>PIO1_RX3</name>
50661                                <value>15</value>
50662                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
50663                            </enumeratedValue>
50664                            <enumeratedValue>
50665                                <name>PIO2_TX0</name>
50666                                <value>16</value>
50667                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
50668                            </enumeratedValue>
50669                            <enumeratedValue>
50670                                <name>PIO2_TX1</name>
50671                                <value>17</value>
50672                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
50673                            </enumeratedValue>
50674                            <enumeratedValue>
50675                                <name>PIO2_TX2</name>
50676                                <value>18</value>
50677                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
50678                            </enumeratedValue>
50679                            <enumeratedValue>
50680                                <name>PIO2_TX3</name>
50681                                <value>19</value>
50682                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
50683                            </enumeratedValue>
50684                            <enumeratedValue>
50685                                <name>PIO2_RX0</name>
50686                                <value>20</value>
50687                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
50688                            </enumeratedValue>
50689                            <enumeratedValue>
50690                                <name>PIO2_RX1</name>
50691                                <value>21</value>
50692                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
50693                            </enumeratedValue>
50694                            <enumeratedValue>
50695                                <name>PIO2_RX2</name>
50696                                <value>22</value>
50697                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
50698                            </enumeratedValue>
50699                            <enumeratedValue>
50700                                <name>PIO2_RX3</name>
50701                                <value>23</value>
50702                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
50703                            </enumeratedValue>
50704                            <enumeratedValue>
50705                                <name>SPI0_TX</name>
50706                                <value>24</value>
50707                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
50708                            </enumeratedValue>
50709                            <enumeratedValue>
50710                                <name>SPI0_RX</name>
50711                                <value>25</value>
50712                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
50713                            </enumeratedValue>
50714                            <enumeratedValue>
50715                                <name>SPI1_TX</name>
50716                                <value>26</value>
50717                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
50718                            </enumeratedValue>
50719                            <enumeratedValue>
50720                                <name>SPI1_RX</name>
50721                                <value>27</value>
50722                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
50723                            </enumeratedValue>
50724                            <enumeratedValue>
50725                                <name>UART0_TX</name>
50726                                <value>28</value>
50727                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
50728                            </enumeratedValue>
50729                            <enumeratedValue>
50730                                <name>UART0_RX</name>
50731                                <value>29</value>
50732                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
50733                            </enumeratedValue>
50734                            <enumeratedValue>
50735                                <name>UART1_TX</name>
50736                                <value>30</value>
50737                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
50738                            </enumeratedValue>
50739                            <enumeratedValue>
50740                                <name>UART1_RX</name>
50741                                <value>31</value>
50742                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
50743                            </enumeratedValue>
50744                            <enumeratedValue>
50745                                <name>PWM_WRAP0</name>
50746                                <value>32</value>
50747                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
50748                            </enumeratedValue>
50749                            <enumeratedValue>
50750                                <name>PWM_WRAP1</name>
50751                                <value>33</value>
50752                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
50753                            </enumeratedValue>
50754                            <enumeratedValue>
50755                                <name>PWM_WRAP2</name>
50756                                <value>34</value>
50757                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
50758                            </enumeratedValue>
50759                            <enumeratedValue>
50760                                <name>PWM_WRAP3</name>
50761                                <value>35</value>
50762                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
50763                            </enumeratedValue>
50764                            <enumeratedValue>
50765                                <name>PWM_WRAP4</name>
50766                                <value>36</value>
50767                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
50768                            </enumeratedValue>
50769                            <enumeratedValue>
50770                                <name>PWM_WRAP5</name>
50771                                <value>37</value>
50772                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
50773                            </enumeratedValue>
50774                            <enumeratedValue>
50775                                <name>PWM_WRAP6</name>
50776                                <value>38</value>
50777                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
50778                            </enumeratedValue>
50779                            <enumeratedValue>
50780                                <name>PWM_WRAP7</name>
50781                                <value>39</value>
50782                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
50783                            </enumeratedValue>
50784                            <enumeratedValue>
50785                                <name>PWM_WRAP8</name>
50786                                <value>40</value>
50787                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
50788                            </enumeratedValue>
50789                            <enumeratedValue>
50790                                <name>PWM_WRAP9</name>
50791                                <value>41</value>
50792                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
50793                            </enumeratedValue>
50794                            <enumeratedValue>
50795                                <name>PWM_WRAP10</name>
50796                                <value>42</value>
50797                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
50798                            </enumeratedValue>
50799                            <enumeratedValue>
50800                                <name>PWM_WRAP11</name>
50801                                <value>43</value>
50802                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
50803                            </enumeratedValue>
50804                            <enumeratedValue>
50805                                <name>I2C0_TX</name>
50806                                <value>44</value>
50807                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
50808                            </enumeratedValue>
50809                            <enumeratedValue>
50810                                <name>I2C0_RX</name>
50811                                <value>45</value>
50812                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
50813                            </enumeratedValue>
50814                            <enumeratedValue>
50815                                <name>I2C1_TX</name>
50816                                <value>46</value>
50817                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
50818                            </enumeratedValue>
50819                            <enumeratedValue>
50820                                <name>I2C1_RX</name>
50821                                <value>47</value>
50822                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
50823                            </enumeratedValue>
50824                            <enumeratedValue>
50825                                <name>ADC</name>
50826                                <value>48</value>
50827                                <description>Select the ADC as TREQ</description>
50828                            </enumeratedValue>
50829                            <enumeratedValue>
50830                                <name>XIP_STREAM</name>
50831                                <value>49</value>
50832                                <description>Select the XIP Streaming FIFO as TREQ</description>
50833                            </enumeratedValue>
50834                            <enumeratedValue>
50835                                <name>XIP_QMITX</name>
50836                                <value>50</value>
50837                                <description>Select XIP_QMITX as TREQ</description>
50838                            </enumeratedValue>
50839                            <enumeratedValue>
50840                                <name>XIP_QMIRX</name>
50841                                <value>51</value>
50842                                <description>Select XIP_QMIRX as TREQ</description>
50843                            </enumeratedValue>
50844                            <enumeratedValue>
50845                                <name>HSTX</name>
50846                                <value>52</value>
50847                                <description>Select HSTX as TREQ</description>
50848                            </enumeratedValue>
50849                            <enumeratedValue>
50850                                <name>CORESIGHT</name>
50851                                <value>53</value>
50852                                <description>Select CORESIGHT as TREQ</description>
50853                            </enumeratedValue>
50854                            <enumeratedValue>
50855                                <name>SHA256</name>
50856                                <value>54</value>
50857                                <description>Select SHA256 as TREQ</description>
50858                            </enumeratedValue>
50859                            <enumeratedValue>
50860                                <name>TIMER0</name>
50861                                <value>59</value>
50862                                <description>Select Timer 0 as TREQ</description>
50863                            </enumeratedValue>
50864                            <enumeratedValue>
50865                                <name>TIMER1</name>
50866                                <value>60</value>
50867                                <description>Select Timer 1 as TREQ</description>
50868                            </enumeratedValue>
50869                            <enumeratedValue>
50870                                <name>TIMER2</name>
50871                                <value>61</value>
50872                                <description>Select Timer 2 as TREQ (Optional)</description>
50873                            </enumeratedValue>
50874                            <enumeratedValue>
50875                                <name>TIMER3</name>
50876                                <value>62</value>
50877                                <description>Select Timer 3 as TREQ (Optional)</description>
50878                            </enumeratedValue>
50879                            <enumeratedValue>
50880                                <name>PERMANENT</name>
50881                                <value>63</value>
50882                                <description>Permanent request, for unpaced transfers.</description>
50883                            </enumeratedValue>
50884                        </enumeratedValues>
50885                    </field>
50886                    <field>
50887                        <name>CHAIN_TO</name>
50888                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
50889
50890                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
50891                        <bitRange>[16:13]</bitRange>
50892                        <access>read-write</access>
50893                    </field>
50894                    <field>
50895                        <name>RING_SEL</name>
50896                        <description>Select whether RING_SIZE applies to read or write addresses.
50897                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
50898                        <bitRange>[12:12]</bitRange>
50899                        <access>read-write</access>
50900                    </field>
50901                    <field>
50902                        <name>RING_SIZE</name>
50903                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
50904
50905                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
50906                        <bitRange>[11:8]</bitRange>
50907                        <access>read-write</access>
50908                        <enumeratedValues>
50909                            <enumeratedValue>
50910                                <name>RING_NONE</name>
50911                                <value>0</value>
50912                            </enumeratedValue>
50913                        </enumeratedValues>
50914                    </field>
50915                    <field>
50916                        <name>INCR_WRITE_REV</name>
50917                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
50918
50919                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
50920                        <bitRange>[7:7]</bitRange>
50921                        <access>read-write</access>
50922                    </field>
50923                    <field>
50924                        <name>INCR_WRITE</name>
50925                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
50926
50927                            Generally this should be disabled for memory-to-peripheral transfers.</description>
50928                        <bitRange>[6:6]</bitRange>
50929                        <access>read-write</access>
50930                    </field>
50931                    <field>
50932                        <name>INCR_READ_REV</name>
50933                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
50934
50935                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
50936                        <bitRange>[5:5]</bitRange>
50937                        <access>read-write</access>
50938                    </field>
50939                    <field>
50940                        <name>INCR_READ</name>
50941                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
50942
50943                            Generally this should be disabled for peripheral-to-memory transfers.</description>
50944                        <bitRange>[4:4]</bitRange>
50945                        <access>read-write</access>
50946                    </field>
50947                    <field>
50948                        <name>DATA_SIZE</name>
50949                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
50950                        <bitRange>[3:2]</bitRange>
50951                        <access>read-write</access>
50952                        <enumeratedValues>
50953                            <enumeratedValue>
50954                                <name>SIZE_BYTE</name>
50955                                <value>0</value>
50956                            </enumeratedValue>
50957                            <enumeratedValue>
50958                                <name>SIZE_HALFWORD</name>
50959                                <value>1</value>
50960                            </enumeratedValue>
50961                            <enumeratedValue>
50962                                <name>SIZE_WORD</name>
50963                                <value>2</value>
50964                            </enumeratedValue>
50965                        </enumeratedValues>
50966                    </field>
50967                    <field>
50968                        <name>HIGH_PRIORITY</name>
50969                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
50970
50971                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
50972                        <bitRange>[1:1]</bitRange>
50973                        <access>read-write</access>
50974                    </field>
50975                    <field>
50976                        <name>EN</name>
50977                        <description>DMA Channel Enable.
50978                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
50979                        <bitRange>[0:0]</bitRange>
50980                        <access>read-write</access>
50981                    </field>
50982                </fields>
50983            </register>
50984            <register>
50985                <name>CH0_AL1_CTRL</name>
50986                <addressOffset>0x00000010</addressOffset>
50987                <description>Alias for channel 0 CTRL register</description>
50988                <resetMask>0x00000000</resetMask>
50989                <fields>
50990                    <field>
50991                        <name>CH0_AL1_CTRL</name>
50992                        <bitRange>[31:0]</bitRange>
50993                        <access>read-write</access>
50994                    </field>
50995                </fields>
50996            </register>
50997            <register>
50998                <name>CH0_AL1_READ_ADDR</name>
50999                <addressOffset>0x00000014</addressOffset>
51000                <description>Alias for channel 0 READ_ADDR register</description>
51001                <resetMask>0x00000000</resetMask>
51002                <fields>
51003                    <field>
51004                        <name>CH0_AL1_READ_ADDR</name>
51005                        <bitRange>[31:0]</bitRange>
51006                        <access>read-write</access>
51007                    </field>
51008                </fields>
51009            </register>
51010            <register>
51011                <name>CH0_AL1_WRITE_ADDR</name>
51012                <addressOffset>0x00000018</addressOffset>
51013                <description>Alias for channel 0 WRITE_ADDR register</description>
51014                <resetMask>0x00000000</resetMask>
51015                <fields>
51016                    <field>
51017                        <name>CH0_AL1_WRITE_ADDR</name>
51018                        <bitRange>[31:0]</bitRange>
51019                        <access>read-write</access>
51020                    </field>
51021                </fields>
51022            </register>
51023            <register>
51024                <name>CH0_AL1_TRANS_COUNT_TRIG</name>
51025                <addressOffset>0x0000001c</addressOffset>
51026                <description>Alias for channel 0 TRANS_COUNT register
51027                    This is a trigger register (0xc). Writing a nonzero value will
51028                    reload the channel counter and start the channel.</description>
51029                <resetMask>0x00000000</resetMask>
51030                <fields>
51031                    <field>
51032                        <name>CH0_AL1_TRANS_COUNT_TRIG</name>
51033                        <bitRange>[31:0]</bitRange>
51034                        <access>read-write</access>
51035                    </field>
51036                </fields>
51037            </register>
51038            <register>
51039                <name>CH0_AL2_CTRL</name>
51040                <addressOffset>0x00000020</addressOffset>
51041                <description>Alias for channel 0 CTRL register</description>
51042                <resetMask>0x00000000</resetMask>
51043                <fields>
51044                    <field>
51045                        <name>CH0_AL2_CTRL</name>
51046                        <bitRange>[31:0]</bitRange>
51047                        <access>read-write</access>
51048                    </field>
51049                </fields>
51050            </register>
51051            <register>
51052                <name>CH0_AL2_TRANS_COUNT</name>
51053                <addressOffset>0x00000024</addressOffset>
51054                <description>Alias for channel 0 TRANS_COUNT register</description>
51055                <resetMask>0x00000000</resetMask>
51056                <fields>
51057                    <field>
51058                        <name>CH0_AL2_TRANS_COUNT</name>
51059                        <bitRange>[31:0]</bitRange>
51060                        <access>read-write</access>
51061                    </field>
51062                </fields>
51063            </register>
51064            <register>
51065                <name>CH0_AL2_READ_ADDR</name>
51066                <addressOffset>0x00000028</addressOffset>
51067                <description>Alias for channel 0 READ_ADDR register</description>
51068                <resetMask>0x00000000</resetMask>
51069                <fields>
51070                    <field>
51071                        <name>CH0_AL2_READ_ADDR</name>
51072                        <bitRange>[31:0]</bitRange>
51073                        <access>read-write</access>
51074                    </field>
51075                </fields>
51076            </register>
51077            <register>
51078                <name>CH0_AL2_WRITE_ADDR_TRIG</name>
51079                <addressOffset>0x0000002c</addressOffset>
51080                <description>Alias for channel 0 WRITE_ADDR register
51081                    This is a trigger register (0xc). Writing a nonzero value will
51082                    reload the channel counter and start the channel.</description>
51083                <resetMask>0x00000000</resetMask>
51084                <fields>
51085                    <field>
51086                        <name>CH0_AL2_WRITE_ADDR_TRIG</name>
51087                        <bitRange>[31:0]</bitRange>
51088                        <access>read-write</access>
51089                    </field>
51090                </fields>
51091            </register>
51092            <register>
51093                <name>CH0_AL3_CTRL</name>
51094                <addressOffset>0x00000030</addressOffset>
51095                <description>Alias for channel 0 CTRL register</description>
51096                <resetMask>0x00000000</resetMask>
51097                <fields>
51098                    <field>
51099                        <name>CH0_AL3_CTRL</name>
51100                        <bitRange>[31:0]</bitRange>
51101                        <access>read-write</access>
51102                    </field>
51103                </fields>
51104            </register>
51105            <register>
51106                <name>CH0_AL3_WRITE_ADDR</name>
51107                <addressOffset>0x00000034</addressOffset>
51108                <description>Alias for channel 0 WRITE_ADDR register</description>
51109                <resetMask>0x00000000</resetMask>
51110                <fields>
51111                    <field>
51112                        <name>CH0_AL3_WRITE_ADDR</name>
51113                        <bitRange>[31:0]</bitRange>
51114                        <access>read-write</access>
51115                    </field>
51116                </fields>
51117            </register>
51118            <register>
51119                <name>CH0_AL3_TRANS_COUNT</name>
51120                <addressOffset>0x00000038</addressOffset>
51121                <description>Alias for channel 0 TRANS_COUNT register</description>
51122                <resetMask>0x00000000</resetMask>
51123                <fields>
51124                    <field>
51125                        <name>CH0_AL3_TRANS_COUNT</name>
51126                        <bitRange>[31:0]</bitRange>
51127                        <access>read-write</access>
51128                    </field>
51129                </fields>
51130            </register>
51131            <register>
51132                <name>CH0_AL3_READ_ADDR_TRIG</name>
51133                <addressOffset>0x0000003c</addressOffset>
51134                <description>Alias for channel 0 READ_ADDR register
51135                    This is a trigger register (0xc). Writing a nonzero value will
51136                    reload the channel counter and start the channel.</description>
51137                <resetMask>0x00000000</resetMask>
51138                <fields>
51139                    <field>
51140                        <name>CH0_AL3_READ_ADDR_TRIG</name>
51141                        <bitRange>[31:0]</bitRange>
51142                        <access>read-write</access>
51143                    </field>
51144                </fields>
51145            </register>
51146            <register>
51147                <name>CH1_READ_ADDR</name>
51148                <addressOffset>0x00000040</addressOffset>
51149                <description>DMA Channel 1 Read Address pointer</description>
51150                <resetValue>0x00000000</resetValue>
51151                <fields>
51152                    <field>
51153                        <name>CH1_READ_ADDR</name>
51154                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
51155                        <bitRange>[31:0]</bitRange>
51156                        <access>read-write</access>
51157                    </field>
51158                </fields>
51159            </register>
51160            <register>
51161                <name>CH1_WRITE_ADDR</name>
51162                <addressOffset>0x00000044</addressOffset>
51163                <description>DMA Channel 1 Write Address pointer</description>
51164                <resetValue>0x00000000</resetValue>
51165                <fields>
51166                    <field>
51167                        <name>CH1_WRITE_ADDR</name>
51168                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
51169                        <bitRange>[31:0]</bitRange>
51170                        <access>read-write</access>
51171                    </field>
51172                </fields>
51173            </register>
51174            <register>
51175                <name>CH1_TRANS_COUNT</name>
51176                <addressOffset>0x00000048</addressOffset>
51177                <description>DMA Channel 1 Transfer Count</description>
51178                <resetValue>0x00000000</resetValue>
51179                <fields>
51180                    <field>
51181                        <name>MODE</name>
51182                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
51183
51184                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
51185
51186                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
51187
51188                            All other values are reserved.</description>
51189                        <bitRange>[31:28]</bitRange>
51190                        <access>read-write</access>
51191                        <enumeratedValues>
51192                            <enumeratedValue>
51193                                <name>NORMAL</name>
51194                                <value>0</value>
51195                            </enumeratedValue>
51196                            <enumeratedValue>
51197                                <name>TRIGGER_SELF</name>
51198                                <value>1</value>
51199                            </enumeratedValue>
51200                            <enumeratedValue>
51201                                <name>ENDLESS</name>
51202                                <value>15</value>
51203                            </enumeratedValue>
51204                        </enumeratedValues>
51205                    </field>
51206                    <field>
51207                        <name>COUNT</name>
51208                        <description>28-bit transfer count (256 million transfers maximum).
51209
51210                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
51211
51212                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
51213
51214                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
51215
51216                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
51217                        <bitRange>[27:0]</bitRange>
51218                        <access>read-write</access>
51219                    </field>
51220                </fields>
51221            </register>
51222            <register>
51223                <name>CH1_CTRL_TRIG</name>
51224                <addressOffset>0x0000004c</addressOffset>
51225                <description>DMA Channel 1 Control and Status</description>
51226                <resetValue>0x00000000</resetValue>
51227                <fields>
51228                    <field>
51229                        <name>AHB_ERROR</name>
51230                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
51231                        <bitRange>[31:31]</bitRange>
51232                        <access>read-only</access>
51233                    </field>
51234                    <field>
51235                        <name>READ_ERROR</name>
51236                        <description>If 1, the channel received a read bus error. Write one to clear.
51237                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
51238                        <bitRange>[30:30]</bitRange>
51239                        <access>read-write</access>
51240                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
51241                    </field>
51242                    <field>
51243                        <name>WRITE_ERROR</name>
51244                        <description>If 1, the channel received a write bus error. Write one to clear.
51245                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
51246                        <bitRange>[29:29]</bitRange>
51247                        <access>read-write</access>
51248                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
51249                    </field>
51250                    <field>
51251                        <name>BUSY</name>
51252                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
51253
51254                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
51255                        <bitRange>[26:26]</bitRange>
51256                        <access>read-only</access>
51257                    </field>
51258                    <field>
51259                        <name>SNIFF_EN</name>
51260                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
51261
51262                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
51263                        <bitRange>[25:25]</bitRange>
51264                        <access>read-write</access>
51265                    </field>
51266                    <field>
51267                        <name>BSWAP</name>
51268                        <description>Apply byte-swap transformation to DMA data.
51269                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
51270                        <bitRange>[24:24]</bitRange>
51271                        <access>read-write</access>
51272                    </field>
51273                    <field>
51274                        <name>IRQ_QUIET</name>
51275                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
51276
51277                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
51278                        <bitRange>[23:23]</bitRange>
51279                        <access>read-write</access>
51280                    </field>
51281                    <field>
51282                        <name>TREQ_SEL</name>
51283                        <description>Select a Transfer Request signal.
51284                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
51285                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
51286                        <bitRange>[22:17]</bitRange>
51287                        <access>read-write</access>
51288                        <enumeratedValues>
51289                            <enumeratedValue>
51290                                <name>PIO0_TX0</name>
51291                                <value>0</value>
51292                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
51293                            </enumeratedValue>
51294                            <enumeratedValue>
51295                                <name>PIO0_TX1</name>
51296                                <value>1</value>
51297                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
51298                            </enumeratedValue>
51299                            <enumeratedValue>
51300                                <name>PIO0_TX2</name>
51301                                <value>2</value>
51302                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
51303                            </enumeratedValue>
51304                            <enumeratedValue>
51305                                <name>PIO0_TX3</name>
51306                                <value>3</value>
51307                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
51308                            </enumeratedValue>
51309                            <enumeratedValue>
51310                                <name>PIO0_RX0</name>
51311                                <value>4</value>
51312                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
51313                            </enumeratedValue>
51314                            <enumeratedValue>
51315                                <name>PIO0_RX1</name>
51316                                <value>5</value>
51317                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
51318                            </enumeratedValue>
51319                            <enumeratedValue>
51320                                <name>PIO0_RX2</name>
51321                                <value>6</value>
51322                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
51323                            </enumeratedValue>
51324                            <enumeratedValue>
51325                                <name>PIO0_RX3</name>
51326                                <value>7</value>
51327                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
51328                            </enumeratedValue>
51329                            <enumeratedValue>
51330                                <name>PIO1_TX0</name>
51331                                <value>8</value>
51332                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
51333                            </enumeratedValue>
51334                            <enumeratedValue>
51335                                <name>PIO1_TX1</name>
51336                                <value>9</value>
51337                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
51338                            </enumeratedValue>
51339                            <enumeratedValue>
51340                                <name>PIO1_TX2</name>
51341                                <value>10</value>
51342                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
51343                            </enumeratedValue>
51344                            <enumeratedValue>
51345                                <name>PIO1_TX3</name>
51346                                <value>11</value>
51347                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
51348                            </enumeratedValue>
51349                            <enumeratedValue>
51350                                <name>PIO1_RX0</name>
51351                                <value>12</value>
51352                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
51353                            </enumeratedValue>
51354                            <enumeratedValue>
51355                                <name>PIO1_RX1</name>
51356                                <value>13</value>
51357                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
51358                            </enumeratedValue>
51359                            <enumeratedValue>
51360                                <name>PIO1_RX2</name>
51361                                <value>14</value>
51362                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
51363                            </enumeratedValue>
51364                            <enumeratedValue>
51365                                <name>PIO1_RX3</name>
51366                                <value>15</value>
51367                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
51368                            </enumeratedValue>
51369                            <enumeratedValue>
51370                                <name>PIO2_TX0</name>
51371                                <value>16</value>
51372                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
51373                            </enumeratedValue>
51374                            <enumeratedValue>
51375                                <name>PIO2_TX1</name>
51376                                <value>17</value>
51377                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
51378                            </enumeratedValue>
51379                            <enumeratedValue>
51380                                <name>PIO2_TX2</name>
51381                                <value>18</value>
51382                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
51383                            </enumeratedValue>
51384                            <enumeratedValue>
51385                                <name>PIO2_TX3</name>
51386                                <value>19</value>
51387                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
51388                            </enumeratedValue>
51389                            <enumeratedValue>
51390                                <name>PIO2_RX0</name>
51391                                <value>20</value>
51392                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
51393                            </enumeratedValue>
51394                            <enumeratedValue>
51395                                <name>PIO2_RX1</name>
51396                                <value>21</value>
51397                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
51398                            </enumeratedValue>
51399                            <enumeratedValue>
51400                                <name>PIO2_RX2</name>
51401                                <value>22</value>
51402                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
51403                            </enumeratedValue>
51404                            <enumeratedValue>
51405                                <name>PIO2_RX3</name>
51406                                <value>23</value>
51407                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
51408                            </enumeratedValue>
51409                            <enumeratedValue>
51410                                <name>SPI0_TX</name>
51411                                <value>24</value>
51412                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
51413                            </enumeratedValue>
51414                            <enumeratedValue>
51415                                <name>SPI0_RX</name>
51416                                <value>25</value>
51417                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
51418                            </enumeratedValue>
51419                            <enumeratedValue>
51420                                <name>SPI1_TX</name>
51421                                <value>26</value>
51422                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
51423                            </enumeratedValue>
51424                            <enumeratedValue>
51425                                <name>SPI1_RX</name>
51426                                <value>27</value>
51427                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
51428                            </enumeratedValue>
51429                            <enumeratedValue>
51430                                <name>UART0_TX</name>
51431                                <value>28</value>
51432                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
51433                            </enumeratedValue>
51434                            <enumeratedValue>
51435                                <name>UART0_RX</name>
51436                                <value>29</value>
51437                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
51438                            </enumeratedValue>
51439                            <enumeratedValue>
51440                                <name>UART1_TX</name>
51441                                <value>30</value>
51442                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
51443                            </enumeratedValue>
51444                            <enumeratedValue>
51445                                <name>UART1_RX</name>
51446                                <value>31</value>
51447                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
51448                            </enumeratedValue>
51449                            <enumeratedValue>
51450                                <name>PWM_WRAP0</name>
51451                                <value>32</value>
51452                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
51453                            </enumeratedValue>
51454                            <enumeratedValue>
51455                                <name>PWM_WRAP1</name>
51456                                <value>33</value>
51457                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
51458                            </enumeratedValue>
51459                            <enumeratedValue>
51460                                <name>PWM_WRAP2</name>
51461                                <value>34</value>
51462                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
51463                            </enumeratedValue>
51464                            <enumeratedValue>
51465                                <name>PWM_WRAP3</name>
51466                                <value>35</value>
51467                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
51468                            </enumeratedValue>
51469                            <enumeratedValue>
51470                                <name>PWM_WRAP4</name>
51471                                <value>36</value>
51472                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
51473                            </enumeratedValue>
51474                            <enumeratedValue>
51475                                <name>PWM_WRAP5</name>
51476                                <value>37</value>
51477                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
51478                            </enumeratedValue>
51479                            <enumeratedValue>
51480                                <name>PWM_WRAP6</name>
51481                                <value>38</value>
51482                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
51483                            </enumeratedValue>
51484                            <enumeratedValue>
51485                                <name>PWM_WRAP7</name>
51486                                <value>39</value>
51487                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
51488                            </enumeratedValue>
51489                            <enumeratedValue>
51490                                <name>PWM_WRAP8</name>
51491                                <value>40</value>
51492                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
51493                            </enumeratedValue>
51494                            <enumeratedValue>
51495                                <name>PWM_WRAP9</name>
51496                                <value>41</value>
51497                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
51498                            </enumeratedValue>
51499                            <enumeratedValue>
51500                                <name>PWM_WRAP10</name>
51501                                <value>42</value>
51502                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
51503                            </enumeratedValue>
51504                            <enumeratedValue>
51505                                <name>PWM_WRAP11</name>
51506                                <value>43</value>
51507                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
51508                            </enumeratedValue>
51509                            <enumeratedValue>
51510                                <name>I2C0_TX</name>
51511                                <value>44</value>
51512                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
51513                            </enumeratedValue>
51514                            <enumeratedValue>
51515                                <name>I2C0_RX</name>
51516                                <value>45</value>
51517                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
51518                            </enumeratedValue>
51519                            <enumeratedValue>
51520                                <name>I2C1_TX</name>
51521                                <value>46</value>
51522                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
51523                            </enumeratedValue>
51524                            <enumeratedValue>
51525                                <name>I2C1_RX</name>
51526                                <value>47</value>
51527                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
51528                            </enumeratedValue>
51529                            <enumeratedValue>
51530                                <name>ADC</name>
51531                                <value>48</value>
51532                                <description>Select the ADC as TREQ</description>
51533                            </enumeratedValue>
51534                            <enumeratedValue>
51535                                <name>XIP_STREAM</name>
51536                                <value>49</value>
51537                                <description>Select the XIP Streaming FIFO as TREQ</description>
51538                            </enumeratedValue>
51539                            <enumeratedValue>
51540                                <name>XIP_QMITX</name>
51541                                <value>50</value>
51542                                <description>Select XIP_QMITX as TREQ</description>
51543                            </enumeratedValue>
51544                            <enumeratedValue>
51545                                <name>XIP_QMIRX</name>
51546                                <value>51</value>
51547                                <description>Select XIP_QMIRX as TREQ</description>
51548                            </enumeratedValue>
51549                            <enumeratedValue>
51550                                <name>HSTX</name>
51551                                <value>52</value>
51552                                <description>Select HSTX as TREQ</description>
51553                            </enumeratedValue>
51554                            <enumeratedValue>
51555                                <name>CORESIGHT</name>
51556                                <value>53</value>
51557                                <description>Select CORESIGHT as TREQ</description>
51558                            </enumeratedValue>
51559                            <enumeratedValue>
51560                                <name>SHA256</name>
51561                                <value>54</value>
51562                                <description>Select SHA256 as TREQ</description>
51563                            </enumeratedValue>
51564                            <enumeratedValue>
51565                                <name>TIMER0</name>
51566                                <value>59</value>
51567                                <description>Select Timer 0 as TREQ</description>
51568                            </enumeratedValue>
51569                            <enumeratedValue>
51570                                <name>TIMER1</name>
51571                                <value>60</value>
51572                                <description>Select Timer 1 as TREQ</description>
51573                            </enumeratedValue>
51574                            <enumeratedValue>
51575                                <name>TIMER2</name>
51576                                <value>61</value>
51577                                <description>Select Timer 2 as TREQ (Optional)</description>
51578                            </enumeratedValue>
51579                            <enumeratedValue>
51580                                <name>TIMER3</name>
51581                                <value>62</value>
51582                                <description>Select Timer 3 as TREQ (Optional)</description>
51583                            </enumeratedValue>
51584                            <enumeratedValue>
51585                                <name>PERMANENT</name>
51586                                <value>63</value>
51587                                <description>Permanent request, for unpaced transfers.</description>
51588                            </enumeratedValue>
51589                        </enumeratedValues>
51590                    </field>
51591                    <field>
51592                        <name>CHAIN_TO</name>
51593                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
51594
51595                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
51596                        <bitRange>[16:13]</bitRange>
51597                        <access>read-write</access>
51598                    </field>
51599                    <field>
51600                        <name>RING_SEL</name>
51601                        <description>Select whether RING_SIZE applies to read or write addresses.
51602                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
51603                        <bitRange>[12:12]</bitRange>
51604                        <access>read-write</access>
51605                    </field>
51606                    <field>
51607                        <name>RING_SIZE</name>
51608                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
51609
51610                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
51611                        <bitRange>[11:8]</bitRange>
51612                        <access>read-write</access>
51613                        <enumeratedValues>
51614                            <enumeratedValue>
51615                                <name>RING_NONE</name>
51616                                <value>0</value>
51617                            </enumeratedValue>
51618                        </enumeratedValues>
51619                    </field>
51620                    <field>
51621                        <name>INCR_WRITE_REV</name>
51622                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
51623
51624                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
51625                        <bitRange>[7:7]</bitRange>
51626                        <access>read-write</access>
51627                    </field>
51628                    <field>
51629                        <name>INCR_WRITE</name>
51630                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
51631
51632                            Generally this should be disabled for memory-to-peripheral transfers.</description>
51633                        <bitRange>[6:6]</bitRange>
51634                        <access>read-write</access>
51635                    </field>
51636                    <field>
51637                        <name>INCR_READ_REV</name>
51638                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
51639
51640                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
51641                        <bitRange>[5:5]</bitRange>
51642                        <access>read-write</access>
51643                    </field>
51644                    <field>
51645                        <name>INCR_READ</name>
51646                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
51647
51648                            Generally this should be disabled for peripheral-to-memory transfers.</description>
51649                        <bitRange>[4:4]</bitRange>
51650                        <access>read-write</access>
51651                    </field>
51652                    <field>
51653                        <name>DATA_SIZE</name>
51654                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
51655                        <bitRange>[3:2]</bitRange>
51656                        <access>read-write</access>
51657                        <enumeratedValues>
51658                            <enumeratedValue>
51659                                <name>SIZE_BYTE</name>
51660                                <value>0</value>
51661                            </enumeratedValue>
51662                            <enumeratedValue>
51663                                <name>SIZE_HALFWORD</name>
51664                                <value>1</value>
51665                            </enumeratedValue>
51666                            <enumeratedValue>
51667                                <name>SIZE_WORD</name>
51668                                <value>2</value>
51669                            </enumeratedValue>
51670                        </enumeratedValues>
51671                    </field>
51672                    <field>
51673                        <name>HIGH_PRIORITY</name>
51674                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
51675
51676                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
51677                        <bitRange>[1:1]</bitRange>
51678                        <access>read-write</access>
51679                    </field>
51680                    <field>
51681                        <name>EN</name>
51682                        <description>DMA Channel Enable.
51683                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
51684                        <bitRange>[0:0]</bitRange>
51685                        <access>read-write</access>
51686                    </field>
51687                </fields>
51688            </register>
51689            <register>
51690                <name>CH1_AL1_CTRL</name>
51691                <addressOffset>0x00000050</addressOffset>
51692                <description>Alias for channel 1 CTRL register</description>
51693                <resetMask>0x00000000</resetMask>
51694                <fields>
51695                    <field>
51696                        <name>CH1_AL1_CTRL</name>
51697                        <bitRange>[31:0]</bitRange>
51698                        <access>read-write</access>
51699                    </field>
51700                </fields>
51701            </register>
51702            <register>
51703                <name>CH1_AL1_READ_ADDR</name>
51704                <addressOffset>0x00000054</addressOffset>
51705                <description>Alias for channel 1 READ_ADDR register</description>
51706                <resetMask>0x00000000</resetMask>
51707                <fields>
51708                    <field>
51709                        <name>CH1_AL1_READ_ADDR</name>
51710                        <bitRange>[31:0]</bitRange>
51711                        <access>read-write</access>
51712                    </field>
51713                </fields>
51714            </register>
51715            <register>
51716                <name>CH1_AL1_WRITE_ADDR</name>
51717                <addressOffset>0x00000058</addressOffset>
51718                <description>Alias for channel 1 WRITE_ADDR register</description>
51719                <resetMask>0x00000000</resetMask>
51720                <fields>
51721                    <field>
51722                        <name>CH1_AL1_WRITE_ADDR</name>
51723                        <bitRange>[31:0]</bitRange>
51724                        <access>read-write</access>
51725                    </field>
51726                </fields>
51727            </register>
51728            <register>
51729                <name>CH1_AL1_TRANS_COUNT_TRIG</name>
51730                <addressOffset>0x0000005c</addressOffset>
51731                <description>Alias for channel 1 TRANS_COUNT register
51732                    This is a trigger register (0xc). Writing a nonzero value will
51733                    reload the channel counter and start the channel.</description>
51734                <resetMask>0x00000000</resetMask>
51735                <fields>
51736                    <field>
51737                        <name>CH1_AL1_TRANS_COUNT_TRIG</name>
51738                        <bitRange>[31:0]</bitRange>
51739                        <access>read-write</access>
51740                    </field>
51741                </fields>
51742            </register>
51743            <register>
51744                <name>CH1_AL2_CTRL</name>
51745                <addressOffset>0x00000060</addressOffset>
51746                <description>Alias for channel 1 CTRL register</description>
51747                <resetMask>0x00000000</resetMask>
51748                <fields>
51749                    <field>
51750                        <name>CH1_AL2_CTRL</name>
51751                        <bitRange>[31:0]</bitRange>
51752                        <access>read-write</access>
51753                    </field>
51754                </fields>
51755            </register>
51756            <register>
51757                <name>CH1_AL2_TRANS_COUNT</name>
51758                <addressOffset>0x00000064</addressOffset>
51759                <description>Alias for channel 1 TRANS_COUNT register</description>
51760                <resetMask>0x00000000</resetMask>
51761                <fields>
51762                    <field>
51763                        <name>CH1_AL2_TRANS_COUNT</name>
51764                        <bitRange>[31:0]</bitRange>
51765                        <access>read-write</access>
51766                    </field>
51767                </fields>
51768            </register>
51769            <register>
51770                <name>CH1_AL2_READ_ADDR</name>
51771                <addressOffset>0x00000068</addressOffset>
51772                <description>Alias for channel 1 READ_ADDR register</description>
51773                <resetMask>0x00000000</resetMask>
51774                <fields>
51775                    <field>
51776                        <name>CH1_AL2_READ_ADDR</name>
51777                        <bitRange>[31:0]</bitRange>
51778                        <access>read-write</access>
51779                    </field>
51780                </fields>
51781            </register>
51782            <register>
51783                <name>CH1_AL2_WRITE_ADDR_TRIG</name>
51784                <addressOffset>0x0000006c</addressOffset>
51785                <description>Alias for channel 1 WRITE_ADDR register
51786                    This is a trigger register (0xc). Writing a nonzero value will
51787                    reload the channel counter and start the channel.</description>
51788                <resetMask>0x00000000</resetMask>
51789                <fields>
51790                    <field>
51791                        <name>CH1_AL2_WRITE_ADDR_TRIG</name>
51792                        <bitRange>[31:0]</bitRange>
51793                        <access>read-write</access>
51794                    </field>
51795                </fields>
51796            </register>
51797            <register>
51798                <name>CH1_AL3_CTRL</name>
51799                <addressOffset>0x00000070</addressOffset>
51800                <description>Alias for channel 1 CTRL register</description>
51801                <resetMask>0x00000000</resetMask>
51802                <fields>
51803                    <field>
51804                        <name>CH1_AL3_CTRL</name>
51805                        <bitRange>[31:0]</bitRange>
51806                        <access>read-write</access>
51807                    </field>
51808                </fields>
51809            </register>
51810            <register>
51811                <name>CH1_AL3_WRITE_ADDR</name>
51812                <addressOffset>0x00000074</addressOffset>
51813                <description>Alias for channel 1 WRITE_ADDR register</description>
51814                <resetMask>0x00000000</resetMask>
51815                <fields>
51816                    <field>
51817                        <name>CH1_AL3_WRITE_ADDR</name>
51818                        <bitRange>[31:0]</bitRange>
51819                        <access>read-write</access>
51820                    </field>
51821                </fields>
51822            </register>
51823            <register>
51824                <name>CH1_AL3_TRANS_COUNT</name>
51825                <addressOffset>0x00000078</addressOffset>
51826                <description>Alias for channel 1 TRANS_COUNT register</description>
51827                <resetMask>0x00000000</resetMask>
51828                <fields>
51829                    <field>
51830                        <name>CH1_AL3_TRANS_COUNT</name>
51831                        <bitRange>[31:0]</bitRange>
51832                        <access>read-write</access>
51833                    </field>
51834                </fields>
51835            </register>
51836            <register>
51837                <name>CH1_AL3_READ_ADDR_TRIG</name>
51838                <addressOffset>0x0000007c</addressOffset>
51839                <description>Alias for channel 1 READ_ADDR register
51840                    This is a trigger register (0xc). Writing a nonzero value will
51841                    reload the channel counter and start the channel.</description>
51842                <resetMask>0x00000000</resetMask>
51843                <fields>
51844                    <field>
51845                        <name>CH1_AL3_READ_ADDR_TRIG</name>
51846                        <bitRange>[31:0]</bitRange>
51847                        <access>read-write</access>
51848                    </field>
51849                </fields>
51850            </register>
51851            <register>
51852                <name>CH2_READ_ADDR</name>
51853                <addressOffset>0x00000080</addressOffset>
51854                <description>DMA Channel 2 Read Address pointer</description>
51855                <resetValue>0x00000000</resetValue>
51856                <fields>
51857                    <field>
51858                        <name>CH2_READ_ADDR</name>
51859                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
51860                        <bitRange>[31:0]</bitRange>
51861                        <access>read-write</access>
51862                    </field>
51863                </fields>
51864            </register>
51865            <register>
51866                <name>CH2_WRITE_ADDR</name>
51867                <addressOffset>0x00000084</addressOffset>
51868                <description>DMA Channel 2 Write Address pointer</description>
51869                <resetValue>0x00000000</resetValue>
51870                <fields>
51871                    <field>
51872                        <name>CH2_WRITE_ADDR</name>
51873                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
51874                        <bitRange>[31:0]</bitRange>
51875                        <access>read-write</access>
51876                    </field>
51877                </fields>
51878            </register>
51879            <register>
51880                <name>CH2_TRANS_COUNT</name>
51881                <addressOffset>0x00000088</addressOffset>
51882                <description>DMA Channel 2 Transfer Count</description>
51883                <resetValue>0x00000000</resetValue>
51884                <fields>
51885                    <field>
51886                        <name>MODE</name>
51887                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
51888
51889                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
51890
51891                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
51892
51893                            All other values are reserved.</description>
51894                        <bitRange>[31:28]</bitRange>
51895                        <access>read-write</access>
51896                        <enumeratedValues>
51897                            <enumeratedValue>
51898                                <name>NORMAL</name>
51899                                <value>0</value>
51900                            </enumeratedValue>
51901                            <enumeratedValue>
51902                                <name>TRIGGER_SELF</name>
51903                                <value>1</value>
51904                            </enumeratedValue>
51905                            <enumeratedValue>
51906                                <name>ENDLESS</name>
51907                                <value>15</value>
51908                            </enumeratedValue>
51909                        </enumeratedValues>
51910                    </field>
51911                    <field>
51912                        <name>COUNT</name>
51913                        <description>28-bit transfer count (256 million transfers maximum).
51914
51915                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
51916
51917                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
51918
51919                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
51920
51921                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
51922                        <bitRange>[27:0]</bitRange>
51923                        <access>read-write</access>
51924                    </field>
51925                </fields>
51926            </register>
51927            <register>
51928                <name>CH2_CTRL_TRIG</name>
51929                <addressOffset>0x0000008c</addressOffset>
51930                <description>DMA Channel 2 Control and Status</description>
51931                <resetValue>0x00000000</resetValue>
51932                <fields>
51933                    <field>
51934                        <name>AHB_ERROR</name>
51935                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
51936                        <bitRange>[31:31]</bitRange>
51937                        <access>read-only</access>
51938                    </field>
51939                    <field>
51940                        <name>READ_ERROR</name>
51941                        <description>If 1, the channel received a read bus error. Write one to clear.
51942                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
51943                        <bitRange>[30:30]</bitRange>
51944                        <access>read-write</access>
51945                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
51946                    </field>
51947                    <field>
51948                        <name>WRITE_ERROR</name>
51949                        <description>If 1, the channel received a write bus error. Write one to clear.
51950                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
51951                        <bitRange>[29:29]</bitRange>
51952                        <access>read-write</access>
51953                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
51954                    </field>
51955                    <field>
51956                        <name>BUSY</name>
51957                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
51958
51959                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
51960                        <bitRange>[26:26]</bitRange>
51961                        <access>read-only</access>
51962                    </field>
51963                    <field>
51964                        <name>SNIFF_EN</name>
51965                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
51966
51967                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
51968                        <bitRange>[25:25]</bitRange>
51969                        <access>read-write</access>
51970                    </field>
51971                    <field>
51972                        <name>BSWAP</name>
51973                        <description>Apply byte-swap transformation to DMA data.
51974                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
51975                        <bitRange>[24:24]</bitRange>
51976                        <access>read-write</access>
51977                    </field>
51978                    <field>
51979                        <name>IRQ_QUIET</name>
51980                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
51981
51982                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
51983                        <bitRange>[23:23]</bitRange>
51984                        <access>read-write</access>
51985                    </field>
51986                    <field>
51987                        <name>TREQ_SEL</name>
51988                        <description>Select a Transfer Request signal.
51989                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
51990                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
51991                        <bitRange>[22:17]</bitRange>
51992                        <access>read-write</access>
51993                        <enumeratedValues>
51994                            <enumeratedValue>
51995                                <name>PIO0_TX0</name>
51996                                <value>0</value>
51997                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
51998                            </enumeratedValue>
51999                            <enumeratedValue>
52000                                <name>PIO0_TX1</name>
52001                                <value>1</value>
52002                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
52003                            </enumeratedValue>
52004                            <enumeratedValue>
52005                                <name>PIO0_TX2</name>
52006                                <value>2</value>
52007                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
52008                            </enumeratedValue>
52009                            <enumeratedValue>
52010                                <name>PIO0_TX3</name>
52011                                <value>3</value>
52012                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
52013                            </enumeratedValue>
52014                            <enumeratedValue>
52015                                <name>PIO0_RX0</name>
52016                                <value>4</value>
52017                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
52018                            </enumeratedValue>
52019                            <enumeratedValue>
52020                                <name>PIO0_RX1</name>
52021                                <value>5</value>
52022                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
52023                            </enumeratedValue>
52024                            <enumeratedValue>
52025                                <name>PIO0_RX2</name>
52026                                <value>6</value>
52027                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
52028                            </enumeratedValue>
52029                            <enumeratedValue>
52030                                <name>PIO0_RX3</name>
52031                                <value>7</value>
52032                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
52033                            </enumeratedValue>
52034                            <enumeratedValue>
52035                                <name>PIO1_TX0</name>
52036                                <value>8</value>
52037                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
52038                            </enumeratedValue>
52039                            <enumeratedValue>
52040                                <name>PIO1_TX1</name>
52041                                <value>9</value>
52042                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
52043                            </enumeratedValue>
52044                            <enumeratedValue>
52045                                <name>PIO1_TX2</name>
52046                                <value>10</value>
52047                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
52048                            </enumeratedValue>
52049                            <enumeratedValue>
52050                                <name>PIO1_TX3</name>
52051                                <value>11</value>
52052                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
52053                            </enumeratedValue>
52054                            <enumeratedValue>
52055                                <name>PIO1_RX0</name>
52056                                <value>12</value>
52057                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
52058                            </enumeratedValue>
52059                            <enumeratedValue>
52060                                <name>PIO1_RX1</name>
52061                                <value>13</value>
52062                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
52063                            </enumeratedValue>
52064                            <enumeratedValue>
52065                                <name>PIO1_RX2</name>
52066                                <value>14</value>
52067                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
52068                            </enumeratedValue>
52069                            <enumeratedValue>
52070                                <name>PIO1_RX3</name>
52071                                <value>15</value>
52072                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
52073                            </enumeratedValue>
52074                            <enumeratedValue>
52075                                <name>PIO2_TX0</name>
52076                                <value>16</value>
52077                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
52078                            </enumeratedValue>
52079                            <enumeratedValue>
52080                                <name>PIO2_TX1</name>
52081                                <value>17</value>
52082                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
52083                            </enumeratedValue>
52084                            <enumeratedValue>
52085                                <name>PIO2_TX2</name>
52086                                <value>18</value>
52087                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
52088                            </enumeratedValue>
52089                            <enumeratedValue>
52090                                <name>PIO2_TX3</name>
52091                                <value>19</value>
52092                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
52093                            </enumeratedValue>
52094                            <enumeratedValue>
52095                                <name>PIO2_RX0</name>
52096                                <value>20</value>
52097                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
52098                            </enumeratedValue>
52099                            <enumeratedValue>
52100                                <name>PIO2_RX1</name>
52101                                <value>21</value>
52102                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
52103                            </enumeratedValue>
52104                            <enumeratedValue>
52105                                <name>PIO2_RX2</name>
52106                                <value>22</value>
52107                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
52108                            </enumeratedValue>
52109                            <enumeratedValue>
52110                                <name>PIO2_RX3</name>
52111                                <value>23</value>
52112                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
52113                            </enumeratedValue>
52114                            <enumeratedValue>
52115                                <name>SPI0_TX</name>
52116                                <value>24</value>
52117                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
52118                            </enumeratedValue>
52119                            <enumeratedValue>
52120                                <name>SPI0_RX</name>
52121                                <value>25</value>
52122                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
52123                            </enumeratedValue>
52124                            <enumeratedValue>
52125                                <name>SPI1_TX</name>
52126                                <value>26</value>
52127                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
52128                            </enumeratedValue>
52129                            <enumeratedValue>
52130                                <name>SPI1_RX</name>
52131                                <value>27</value>
52132                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
52133                            </enumeratedValue>
52134                            <enumeratedValue>
52135                                <name>UART0_TX</name>
52136                                <value>28</value>
52137                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
52138                            </enumeratedValue>
52139                            <enumeratedValue>
52140                                <name>UART0_RX</name>
52141                                <value>29</value>
52142                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
52143                            </enumeratedValue>
52144                            <enumeratedValue>
52145                                <name>UART1_TX</name>
52146                                <value>30</value>
52147                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
52148                            </enumeratedValue>
52149                            <enumeratedValue>
52150                                <name>UART1_RX</name>
52151                                <value>31</value>
52152                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
52153                            </enumeratedValue>
52154                            <enumeratedValue>
52155                                <name>PWM_WRAP0</name>
52156                                <value>32</value>
52157                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
52158                            </enumeratedValue>
52159                            <enumeratedValue>
52160                                <name>PWM_WRAP1</name>
52161                                <value>33</value>
52162                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
52163                            </enumeratedValue>
52164                            <enumeratedValue>
52165                                <name>PWM_WRAP2</name>
52166                                <value>34</value>
52167                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
52168                            </enumeratedValue>
52169                            <enumeratedValue>
52170                                <name>PWM_WRAP3</name>
52171                                <value>35</value>
52172                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
52173                            </enumeratedValue>
52174                            <enumeratedValue>
52175                                <name>PWM_WRAP4</name>
52176                                <value>36</value>
52177                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
52178                            </enumeratedValue>
52179                            <enumeratedValue>
52180                                <name>PWM_WRAP5</name>
52181                                <value>37</value>
52182                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
52183                            </enumeratedValue>
52184                            <enumeratedValue>
52185                                <name>PWM_WRAP6</name>
52186                                <value>38</value>
52187                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
52188                            </enumeratedValue>
52189                            <enumeratedValue>
52190                                <name>PWM_WRAP7</name>
52191                                <value>39</value>
52192                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
52193                            </enumeratedValue>
52194                            <enumeratedValue>
52195                                <name>PWM_WRAP8</name>
52196                                <value>40</value>
52197                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
52198                            </enumeratedValue>
52199                            <enumeratedValue>
52200                                <name>PWM_WRAP9</name>
52201                                <value>41</value>
52202                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
52203                            </enumeratedValue>
52204                            <enumeratedValue>
52205                                <name>PWM_WRAP10</name>
52206                                <value>42</value>
52207                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
52208                            </enumeratedValue>
52209                            <enumeratedValue>
52210                                <name>PWM_WRAP11</name>
52211                                <value>43</value>
52212                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
52213                            </enumeratedValue>
52214                            <enumeratedValue>
52215                                <name>I2C0_TX</name>
52216                                <value>44</value>
52217                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
52218                            </enumeratedValue>
52219                            <enumeratedValue>
52220                                <name>I2C0_RX</name>
52221                                <value>45</value>
52222                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
52223                            </enumeratedValue>
52224                            <enumeratedValue>
52225                                <name>I2C1_TX</name>
52226                                <value>46</value>
52227                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
52228                            </enumeratedValue>
52229                            <enumeratedValue>
52230                                <name>I2C1_RX</name>
52231                                <value>47</value>
52232                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
52233                            </enumeratedValue>
52234                            <enumeratedValue>
52235                                <name>ADC</name>
52236                                <value>48</value>
52237                                <description>Select the ADC as TREQ</description>
52238                            </enumeratedValue>
52239                            <enumeratedValue>
52240                                <name>XIP_STREAM</name>
52241                                <value>49</value>
52242                                <description>Select the XIP Streaming FIFO as TREQ</description>
52243                            </enumeratedValue>
52244                            <enumeratedValue>
52245                                <name>XIP_QMITX</name>
52246                                <value>50</value>
52247                                <description>Select XIP_QMITX as TREQ</description>
52248                            </enumeratedValue>
52249                            <enumeratedValue>
52250                                <name>XIP_QMIRX</name>
52251                                <value>51</value>
52252                                <description>Select XIP_QMIRX as TREQ</description>
52253                            </enumeratedValue>
52254                            <enumeratedValue>
52255                                <name>HSTX</name>
52256                                <value>52</value>
52257                                <description>Select HSTX as TREQ</description>
52258                            </enumeratedValue>
52259                            <enumeratedValue>
52260                                <name>CORESIGHT</name>
52261                                <value>53</value>
52262                                <description>Select CORESIGHT as TREQ</description>
52263                            </enumeratedValue>
52264                            <enumeratedValue>
52265                                <name>SHA256</name>
52266                                <value>54</value>
52267                                <description>Select SHA256 as TREQ</description>
52268                            </enumeratedValue>
52269                            <enumeratedValue>
52270                                <name>TIMER0</name>
52271                                <value>59</value>
52272                                <description>Select Timer 0 as TREQ</description>
52273                            </enumeratedValue>
52274                            <enumeratedValue>
52275                                <name>TIMER1</name>
52276                                <value>60</value>
52277                                <description>Select Timer 1 as TREQ</description>
52278                            </enumeratedValue>
52279                            <enumeratedValue>
52280                                <name>TIMER2</name>
52281                                <value>61</value>
52282                                <description>Select Timer 2 as TREQ (Optional)</description>
52283                            </enumeratedValue>
52284                            <enumeratedValue>
52285                                <name>TIMER3</name>
52286                                <value>62</value>
52287                                <description>Select Timer 3 as TREQ (Optional)</description>
52288                            </enumeratedValue>
52289                            <enumeratedValue>
52290                                <name>PERMANENT</name>
52291                                <value>63</value>
52292                                <description>Permanent request, for unpaced transfers.</description>
52293                            </enumeratedValue>
52294                        </enumeratedValues>
52295                    </field>
52296                    <field>
52297                        <name>CHAIN_TO</name>
52298                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
52299
52300                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
52301                        <bitRange>[16:13]</bitRange>
52302                        <access>read-write</access>
52303                    </field>
52304                    <field>
52305                        <name>RING_SEL</name>
52306                        <description>Select whether RING_SIZE applies to read or write addresses.
52307                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
52308                        <bitRange>[12:12]</bitRange>
52309                        <access>read-write</access>
52310                    </field>
52311                    <field>
52312                        <name>RING_SIZE</name>
52313                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
52314
52315                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
52316                        <bitRange>[11:8]</bitRange>
52317                        <access>read-write</access>
52318                        <enumeratedValues>
52319                            <enumeratedValue>
52320                                <name>RING_NONE</name>
52321                                <value>0</value>
52322                            </enumeratedValue>
52323                        </enumeratedValues>
52324                    </field>
52325                    <field>
52326                        <name>INCR_WRITE_REV</name>
52327                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
52328
52329                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
52330                        <bitRange>[7:7]</bitRange>
52331                        <access>read-write</access>
52332                    </field>
52333                    <field>
52334                        <name>INCR_WRITE</name>
52335                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
52336
52337                            Generally this should be disabled for memory-to-peripheral transfers.</description>
52338                        <bitRange>[6:6]</bitRange>
52339                        <access>read-write</access>
52340                    </field>
52341                    <field>
52342                        <name>INCR_READ_REV</name>
52343                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
52344
52345                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
52346                        <bitRange>[5:5]</bitRange>
52347                        <access>read-write</access>
52348                    </field>
52349                    <field>
52350                        <name>INCR_READ</name>
52351                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
52352
52353                            Generally this should be disabled for peripheral-to-memory transfers.</description>
52354                        <bitRange>[4:4]</bitRange>
52355                        <access>read-write</access>
52356                    </field>
52357                    <field>
52358                        <name>DATA_SIZE</name>
52359                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
52360                        <bitRange>[3:2]</bitRange>
52361                        <access>read-write</access>
52362                        <enumeratedValues>
52363                            <enumeratedValue>
52364                                <name>SIZE_BYTE</name>
52365                                <value>0</value>
52366                            </enumeratedValue>
52367                            <enumeratedValue>
52368                                <name>SIZE_HALFWORD</name>
52369                                <value>1</value>
52370                            </enumeratedValue>
52371                            <enumeratedValue>
52372                                <name>SIZE_WORD</name>
52373                                <value>2</value>
52374                            </enumeratedValue>
52375                        </enumeratedValues>
52376                    </field>
52377                    <field>
52378                        <name>HIGH_PRIORITY</name>
52379                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
52380
52381                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
52382                        <bitRange>[1:1]</bitRange>
52383                        <access>read-write</access>
52384                    </field>
52385                    <field>
52386                        <name>EN</name>
52387                        <description>DMA Channel Enable.
52388                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
52389                        <bitRange>[0:0]</bitRange>
52390                        <access>read-write</access>
52391                    </field>
52392                </fields>
52393            </register>
52394            <register>
52395                <name>CH2_AL1_CTRL</name>
52396                <addressOffset>0x00000090</addressOffset>
52397                <description>Alias for channel 2 CTRL register</description>
52398                <resetMask>0x00000000</resetMask>
52399                <fields>
52400                    <field>
52401                        <name>CH2_AL1_CTRL</name>
52402                        <bitRange>[31:0]</bitRange>
52403                        <access>read-write</access>
52404                    </field>
52405                </fields>
52406            </register>
52407            <register>
52408                <name>CH2_AL1_READ_ADDR</name>
52409                <addressOffset>0x00000094</addressOffset>
52410                <description>Alias for channel 2 READ_ADDR register</description>
52411                <resetMask>0x00000000</resetMask>
52412                <fields>
52413                    <field>
52414                        <name>CH2_AL1_READ_ADDR</name>
52415                        <bitRange>[31:0]</bitRange>
52416                        <access>read-write</access>
52417                    </field>
52418                </fields>
52419            </register>
52420            <register>
52421                <name>CH2_AL1_WRITE_ADDR</name>
52422                <addressOffset>0x00000098</addressOffset>
52423                <description>Alias for channel 2 WRITE_ADDR register</description>
52424                <resetMask>0x00000000</resetMask>
52425                <fields>
52426                    <field>
52427                        <name>CH2_AL1_WRITE_ADDR</name>
52428                        <bitRange>[31:0]</bitRange>
52429                        <access>read-write</access>
52430                    </field>
52431                </fields>
52432            </register>
52433            <register>
52434                <name>CH2_AL1_TRANS_COUNT_TRIG</name>
52435                <addressOffset>0x0000009c</addressOffset>
52436                <description>Alias for channel 2 TRANS_COUNT register
52437                    This is a trigger register (0xc). Writing a nonzero value will
52438                    reload the channel counter and start the channel.</description>
52439                <resetMask>0x00000000</resetMask>
52440                <fields>
52441                    <field>
52442                        <name>CH2_AL1_TRANS_COUNT_TRIG</name>
52443                        <bitRange>[31:0]</bitRange>
52444                        <access>read-write</access>
52445                    </field>
52446                </fields>
52447            </register>
52448            <register>
52449                <name>CH2_AL2_CTRL</name>
52450                <addressOffset>0x000000a0</addressOffset>
52451                <description>Alias for channel 2 CTRL register</description>
52452                <resetMask>0x00000000</resetMask>
52453                <fields>
52454                    <field>
52455                        <name>CH2_AL2_CTRL</name>
52456                        <bitRange>[31:0]</bitRange>
52457                        <access>read-write</access>
52458                    </field>
52459                </fields>
52460            </register>
52461            <register>
52462                <name>CH2_AL2_TRANS_COUNT</name>
52463                <addressOffset>0x000000a4</addressOffset>
52464                <description>Alias for channel 2 TRANS_COUNT register</description>
52465                <resetMask>0x00000000</resetMask>
52466                <fields>
52467                    <field>
52468                        <name>CH2_AL2_TRANS_COUNT</name>
52469                        <bitRange>[31:0]</bitRange>
52470                        <access>read-write</access>
52471                    </field>
52472                </fields>
52473            </register>
52474            <register>
52475                <name>CH2_AL2_READ_ADDR</name>
52476                <addressOffset>0x000000a8</addressOffset>
52477                <description>Alias for channel 2 READ_ADDR register</description>
52478                <resetMask>0x00000000</resetMask>
52479                <fields>
52480                    <field>
52481                        <name>CH2_AL2_READ_ADDR</name>
52482                        <bitRange>[31:0]</bitRange>
52483                        <access>read-write</access>
52484                    </field>
52485                </fields>
52486            </register>
52487            <register>
52488                <name>CH2_AL2_WRITE_ADDR_TRIG</name>
52489                <addressOffset>0x000000ac</addressOffset>
52490                <description>Alias for channel 2 WRITE_ADDR register
52491                    This is a trigger register (0xc). Writing a nonzero value will
52492                    reload the channel counter and start the channel.</description>
52493                <resetMask>0x00000000</resetMask>
52494                <fields>
52495                    <field>
52496                        <name>CH2_AL2_WRITE_ADDR_TRIG</name>
52497                        <bitRange>[31:0]</bitRange>
52498                        <access>read-write</access>
52499                    </field>
52500                </fields>
52501            </register>
52502            <register>
52503                <name>CH2_AL3_CTRL</name>
52504                <addressOffset>0x000000b0</addressOffset>
52505                <description>Alias for channel 2 CTRL register</description>
52506                <resetMask>0x00000000</resetMask>
52507                <fields>
52508                    <field>
52509                        <name>CH2_AL3_CTRL</name>
52510                        <bitRange>[31:0]</bitRange>
52511                        <access>read-write</access>
52512                    </field>
52513                </fields>
52514            </register>
52515            <register>
52516                <name>CH2_AL3_WRITE_ADDR</name>
52517                <addressOffset>0x000000b4</addressOffset>
52518                <description>Alias for channel 2 WRITE_ADDR register</description>
52519                <resetMask>0x00000000</resetMask>
52520                <fields>
52521                    <field>
52522                        <name>CH2_AL3_WRITE_ADDR</name>
52523                        <bitRange>[31:0]</bitRange>
52524                        <access>read-write</access>
52525                    </field>
52526                </fields>
52527            </register>
52528            <register>
52529                <name>CH2_AL3_TRANS_COUNT</name>
52530                <addressOffset>0x000000b8</addressOffset>
52531                <description>Alias for channel 2 TRANS_COUNT register</description>
52532                <resetMask>0x00000000</resetMask>
52533                <fields>
52534                    <field>
52535                        <name>CH2_AL3_TRANS_COUNT</name>
52536                        <bitRange>[31:0]</bitRange>
52537                        <access>read-write</access>
52538                    </field>
52539                </fields>
52540            </register>
52541            <register>
52542                <name>CH2_AL3_READ_ADDR_TRIG</name>
52543                <addressOffset>0x000000bc</addressOffset>
52544                <description>Alias for channel 2 READ_ADDR register
52545                    This is a trigger register (0xc). Writing a nonzero value will
52546                    reload the channel counter and start the channel.</description>
52547                <resetMask>0x00000000</resetMask>
52548                <fields>
52549                    <field>
52550                        <name>CH2_AL3_READ_ADDR_TRIG</name>
52551                        <bitRange>[31:0]</bitRange>
52552                        <access>read-write</access>
52553                    </field>
52554                </fields>
52555            </register>
52556            <register>
52557                <name>CH3_READ_ADDR</name>
52558                <addressOffset>0x000000c0</addressOffset>
52559                <description>DMA Channel 3 Read Address pointer</description>
52560                <resetValue>0x00000000</resetValue>
52561                <fields>
52562                    <field>
52563                        <name>CH3_READ_ADDR</name>
52564                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
52565                        <bitRange>[31:0]</bitRange>
52566                        <access>read-write</access>
52567                    </field>
52568                </fields>
52569            </register>
52570            <register>
52571                <name>CH3_WRITE_ADDR</name>
52572                <addressOffset>0x000000c4</addressOffset>
52573                <description>DMA Channel 3 Write Address pointer</description>
52574                <resetValue>0x00000000</resetValue>
52575                <fields>
52576                    <field>
52577                        <name>CH3_WRITE_ADDR</name>
52578                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
52579                        <bitRange>[31:0]</bitRange>
52580                        <access>read-write</access>
52581                    </field>
52582                </fields>
52583            </register>
52584            <register>
52585                <name>CH3_TRANS_COUNT</name>
52586                <addressOffset>0x000000c8</addressOffset>
52587                <description>DMA Channel 3 Transfer Count</description>
52588                <resetValue>0x00000000</resetValue>
52589                <fields>
52590                    <field>
52591                        <name>MODE</name>
52592                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
52593
52594                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
52595
52596                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
52597
52598                            All other values are reserved.</description>
52599                        <bitRange>[31:28]</bitRange>
52600                        <access>read-write</access>
52601                        <enumeratedValues>
52602                            <enumeratedValue>
52603                                <name>NORMAL</name>
52604                                <value>0</value>
52605                            </enumeratedValue>
52606                            <enumeratedValue>
52607                                <name>TRIGGER_SELF</name>
52608                                <value>1</value>
52609                            </enumeratedValue>
52610                            <enumeratedValue>
52611                                <name>ENDLESS</name>
52612                                <value>15</value>
52613                            </enumeratedValue>
52614                        </enumeratedValues>
52615                    </field>
52616                    <field>
52617                        <name>COUNT</name>
52618                        <description>28-bit transfer count (256 million transfers maximum).
52619
52620                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
52621
52622                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
52623
52624                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
52625
52626                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
52627                        <bitRange>[27:0]</bitRange>
52628                        <access>read-write</access>
52629                    </field>
52630                </fields>
52631            </register>
52632            <register>
52633                <name>CH3_CTRL_TRIG</name>
52634                <addressOffset>0x000000cc</addressOffset>
52635                <description>DMA Channel 3 Control and Status</description>
52636                <resetValue>0x00000000</resetValue>
52637                <fields>
52638                    <field>
52639                        <name>AHB_ERROR</name>
52640                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
52641                        <bitRange>[31:31]</bitRange>
52642                        <access>read-only</access>
52643                    </field>
52644                    <field>
52645                        <name>READ_ERROR</name>
52646                        <description>If 1, the channel received a read bus error. Write one to clear.
52647                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
52648                        <bitRange>[30:30]</bitRange>
52649                        <access>read-write</access>
52650                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
52651                    </field>
52652                    <field>
52653                        <name>WRITE_ERROR</name>
52654                        <description>If 1, the channel received a write bus error. Write one to clear.
52655                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
52656                        <bitRange>[29:29]</bitRange>
52657                        <access>read-write</access>
52658                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
52659                    </field>
52660                    <field>
52661                        <name>BUSY</name>
52662                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
52663
52664                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
52665                        <bitRange>[26:26]</bitRange>
52666                        <access>read-only</access>
52667                    </field>
52668                    <field>
52669                        <name>SNIFF_EN</name>
52670                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
52671
52672                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
52673                        <bitRange>[25:25]</bitRange>
52674                        <access>read-write</access>
52675                    </field>
52676                    <field>
52677                        <name>BSWAP</name>
52678                        <description>Apply byte-swap transformation to DMA data.
52679                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
52680                        <bitRange>[24:24]</bitRange>
52681                        <access>read-write</access>
52682                    </field>
52683                    <field>
52684                        <name>IRQ_QUIET</name>
52685                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
52686
52687                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
52688                        <bitRange>[23:23]</bitRange>
52689                        <access>read-write</access>
52690                    </field>
52691                    <field>
52692                        <name>TREQ_SEL</name>
52693                        <description>Select a Transfer Request signal.
52694                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
52695                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
52696                        <bitRange>[22:17]</bitRange>
52697                        <access>read-write</access>
52698                        <enumeratedValues>
52699                            <enumeratedValue>
52700                                <name>PIO0_TX0</name>
52701                                <value>0</value>
52702                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
52703                            </enumeratedValue>
52704                            <enumeratedValue>
52705                                <name>PIO0_TX1</name>
52706                                <value>1</value>
52707                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
52708                            </enumeratedValue>
52709                            <enumeratedValue>
52710                                <name>PIO0_TX2</name>
52711                                <value>2</value>
52712                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
52713                            </enumeratedValue>
52714                            <enumeratedValue>
52715                                <name>PIO0_TX3</name>
52716                                <value>3</value>
52717                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
52718                            </enumeratedValue>
52719                            <enumeratedValue>
52720                                <name>PIO0_RX0</name>
52721                                <value>4</value>
52722                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
52723                            </enumeratedValue>
52724                            <enumeratedValue>
52725                                <name>PIO0_RX1</name>
52726                                <value>5</value>
52727                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
52728                            </enumeratedValue>
52729                            <enumeratedValue>
52730                                <name>PIO0_RX2</name>
52731                                <value>6</value>
52732                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
52733                            </enumeratedValue>
52734                            <enumeratedValue>
52735                                <name>PIO0_RX3</name>
52736                                <value>7</value>
52737                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
52738                            </enumeratedValue>
52739                            <enumeratedValue>
52740                                <name>PIO1_TX0</name>
52741                                <value>8</value>
52742                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
52743                            </enumeratedValue>
52744                            <enumeratedValue>
52745                                <name>PIO1_TX1</name>
52746                                <value>9</value>
52747                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
52748                            </enumeratedValue>
52749                            <enumeratedValue>
52750                                <name>PIO1_TX2</name>
52751                                <value>10</value>
52752                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
52753                            </enumeratedValue>
52754                            <enumeratedValue>
52755                                <name>PIO1_TX3</name>
52756                                <value>11</value>
52757                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
52758                            </enumeratedValue>
52759                            <enumeratedValue>
52760                                <name>PIO1_RX0</name>
52761                                <value>12</value>
52762                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
52763                            </enumeratedValue>
52764                            <enumeratedValue>
52765                                <name>PIO1_RX1</name>
52766                                <value>13</value>
52767                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
52768                            </enumeratedValue>
52769                            <enumeratedValue>
52770                                <name>PIO1_RX2</name>
52771                                <value>14</value>
52772                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
52773                            </enumeratedValue>
52774                            <enumeratedValue>
52775                                <name>PIO1_RX3</name>
52776                                <value>15</value>
52777                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
52778                            </enumeratedValue>
52779                            <enumeratedValue>
52780                                <name>PIO2_TX0</name>
52781                                <value>16</value>
52782                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
52783                            </enumeratedValue>
52784                            <enumeratedValue>
52785                                <name>PIO2_TX1</name>
52786                                <value>17</value>
52787                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
52788                            </enumeratedValue>
52789                            <enumeratedValue>
52790                                <name>PIO2_TX2</name>
52791                                <value>18</value>
52792                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
52793                            </enumeratedValue>
52794                            <enumeratedValue>
52795                                <name>PIO2_TX3</name>
52796                                <value>19</value>
52797                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
52798                            </enumeratedValue>
52799                            <enumeratedValue>
52800                                <name>PIO2_RX0</name>
52801                                <value>20</value>
52802                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
52803                            </enumeratedValue>
52804                            <enumeratedValue>
52805                                <name>PIO2_RX1</name>
52806                                <value>21</value>
52807                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
52808                            </enumeratedValue>
52809                            <enumeratedValue>
52810                                <name>PIO2_RX2</name>
52811                                <value>22</value>
52812                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
52813                            </enumeratedValue>
52814                            <enumeratedValue>
52815                                <name>PIO2_RX3</name>
52816                                <value>23</value>
52817                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
52818                            </enumeratedValue>
52819                            <enumeratedValue>
52820                                <name>SPI0_TX</name>
52821                                <value>24</value>
52822                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
52823                            </enumeratedValue>
52824                            <enumeratedValue>
52825                                <name>SPI0_RX</name>
52826                                <value>25</value>
52827                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
52828                            </enumeratedValue>
52829                            <enumeratedValue>
52830                                <name>SPI1_TX</name>
52831                                <value>26</value>
52832                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
52833                            </enumeratedValue>
52834                            <enumeratedValue>
52835                                <name>SPI1_RX</name>
52836                                <value>27</value>
52837                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
52838                            </enumeratedValue>
52839                            <enumeratedValue>
52840                                <name>UART0_TX</name>
52841                                <value>28</value>
52842                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
52843                            </enumeratedValue>
52844                            <enumeratedValue>
52845                                <name>UART0_RX</name>
52846                                <value>29</value>
52847                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
52848                            </enumeratedValue>
52849                            <enumeratedValue>
52850                                <name>UART1_TX</name>
52851                                <value>30</value>
52852                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
52853                            </enumeratedValue>
52854                            <enumeratedValue>
52855                                <name>UART1_RX</name>
52856                                <value>31</value>
52857                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
52858                            </enumeratedValue>
52859                            <enumeratedValue>
52860                                <name>PWM_WRAP0</name>
52861                                <value>32</value>
52862                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
52863                            </enumeratedValue>
52864                            <enumeratedValue>
52865                                <name>PWM_WRAP1</name>
52866                                <value>33</value>
52867                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
52868                            </enumeratedValue>
52869                            <enumeratedValue>
52870                                <name>PWM_WRAP2</name>
52871                                <value>34</value>
52872                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
52873                            </enumeratedValue>
52874                            <enumeratedValue>
52875                                <name>PWM_WRAP3</name>
52876                                <value>35</value>
52877                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
52878                            </enumeratedValue>
52879                            <enumeratedValue>
52880                                <name>PWM_WRAP4</name>
52881                                <value>36</value>
52882                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
52883                            </enumeratedValue>
52884                            <enumeratedValue>
52885                                <name>PWM_WRAP5</name>
52886                                <value>37</value>
52887                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
52888                            </enumeratedValue>
52889                            <enumeratedValue>
52890                                <name>PWM_WRAP6</name>
52891                                <value>38</value>
52892                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
52893                            </enumeratedValue>
52894                            <enumeratedValue>
52895                                <name>PWM_WRAP7</name>
52896                                <value>39</value>
52897                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
52898                            </enumeratedValue>
52899                            <enumeratedValue>
52900                                <name>PWM_WRAP8</name>
52901                                <value>40</value>
52902                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
52903                            </enumeratedValue>
52904                            <enumeratedValue>
52905                                <name>PWM_WRAP9</name>
52906                                <value>41</value>
52907                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
52908                            </enumeratedValue>
52909                            <enumeratedValue>
52910                                <name>PWM_WRAP10</name>
52911                                <value>42</value>
52912                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
52913                            </enumeratedValue>
52914                            <enumeratedValue>
52915                                <name>PWM_WRAP11</name>
52916                                <value>43</value>
52917                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
52918                            </enumeratedValue>
52919                            <enumeratedValue>
52920                                <name>I2C0_TX</name>
52921                                <value>44</value>
52922                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
52923                            </enumeratedValue>
52924                            <enumeratedValue>
52925                                <name>I2C0_RX</name>
52926                                <value>45</value>
52927                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
52928                            </enumeratedValue>
52929                            <enumeratedValue>
52930                                <name>I2C1_TX</name>
52931                                <value>46</value>
52932                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
52933                            </enumeratedValue>
52934                            <enumeratedValue>
52935                                <name>I2C1_RX</name>
52936                                <value>47</value>
52937                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
52938                            </enumeratedValue>
52939                            <enumeratedValue>
52940                                <name>ADC</name>
52941                                <value>48</value>
52942                                <description>Select the ADC as TREQ</description>
52943                            </enumeratedValue>
52944                            <enumeratedValue>
52945                                <name>XIP_STREAM</name>
52946                                <value>49</value>
52947                                <description>Select the XIP Streaming FIFO as TREQ</description>
52948                            </enumeratedValue>
52949                            <enumeratedValue>
52950                                <name>XIP_QMITX</name>
52951                                <value>50</value>
52952                                <description>Select XIP_QMITX as TREQ</description>
52953                            </enumeratedValue>
52954                            <enumeratedValue>
52955                                <name>XIP_QMIRX</name>
52956                                <value>51</value>
52957                                <description>Select XIP_QMIRX as TREQ</description>
52958                            </enumeratedValue>
52959                            <enumeratedValue>
52960                                <name>HSTX</name>
52961                                <value>52</value>
52962                                <description>Select HSTX as TREQ</description>
52963                            </enumeratedValue>
52964                            <enumeratedValue>
52965                                <name>CORESIGHT</name>
52966                                <value>53</value>
52967                                <description>Select CORESIGHT as TREQ</description>
52968                            </enumeratedValue>
52969                            <enumeratedValue>
52970                                <name>SHA256</name>
52971                                <value>54</value>
52972                                <description>Select SHA256 as TREQ</description>
52973                            </enumeratedValue>
52974                            <enumeratedValue>
52975                                <name>TIMER0</name>
52976                                <value>59</value>
52977                                <description>Select Timer 0 as TREQ</description>
52978                            </enumeratedValue>
52979                            <enumeratedValue>
52980                                <name>TIMER1</name>
52981                                <value>60</value>
52982                                <description>Select Timer 1 as TREQ</description>
52983                            </enumeratedValue>
52984                            <enumeratedValue>
52985                                <name>TIMER2</name>
52986                                <value>61</value>
52987                                <description>Select Timer 2 as TREQ (Optional)</description>
52988                            </enumeratedValue>
52989                            <enumeratedValue>
52990                                <name>TIMER3</name>
52991                                <value>62</value>
52992                                <description>Select Timer 3 as TREQ (Optional)</description>
52993                            </enumeratedValue>
52994                            <enumeratedValue>
52995                                <name>PERMANENT</name>
52996                                <value>63</value>
52997                                <description>Permanent request, for unpaced transfers.</description>
52998                            </enumeratedValue>
52999                        </enumeratedValues>
53000                    </field>
53001                    <field>
53002                        <name>CHAIN_TO</name>
53003                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
53004
53005                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
53006                        <bitRange>[16:13]</bitRange>
53007                        <access>read-write</access>
53008                    </field>
53009                    <field>
53010                        <name>RING_SEL</name>
53011                        <description>Select whether RING_SIZE applies to read or write addresses.
53012                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
53013                        <bitRange>[12:12]</bitRange>
53014                        <access>read-write</access>
53015                    </field>
53016                    <field>
53017                        <name>RING_SIZE</name>
53018                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
53019
53020                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
53021                        <bitRange>[11:8]</bitRange>
53022                        <access>read-write</access>
53023                        <enumeratedValues>
53024                            <enumeratedValue>
53025                                <name>RING_NONE</name>
53026                                <value>0</value>
53027                            </enumeratedValue>
53028                        </enumeratedValues>
53029                    </field>
53030                    <field>
53031                        <name>INCR_WRITE_REV</name>
53032                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
53033
53034                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
53035                        <bitRange>[7:7]</bitRange>
53036                        <access>read-write</access>
53037                    </field>
53038                    <field>
53039                        <name>INCR_WRITE</name>
53040                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
53041
53042                            Generally this should be disabled for memory-to-peripheral transfers.</description>
53043                        <bitRange>[6:6]</bitRange>
53044                        <access>read-write</access>
53045                    </field>
53046                    <field>
53047                        <name>INCR_READ_REV</name>
53048                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
53049
53050                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
53051                        <bitRange>[5:5]</bitRange>
53052                        <access>read-write</access>
53053                    </field>
53054                    <field>
53055                        <name>INCR_READ</name>
53056                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
53057
53058                            Generally this should be disabled for peripheral-to-memory transfers.</description>
53059                        <bitRange>[4:4]</bitRange>
53060                        <access>read-write</access>
53061                    </field>
53062                    <field>
53063                        <name>DATA_SIZE</name>
53064                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
53065                        <bitRange>[3:2]</bitRange>
53066                        <access>read-write</access>
53067                        <enumeratedValues>
53068                            <enumeratedValue>
53069                                <name>SIZE_BYTE</name>
53070                                <value>0</value>
53071                            </enumeratedValue>
53072                            <enumeratedValue>
53073                                <name>SIZE_HALFWORD</name>
53074                                <value>1</value>
53075                            </enumeratedValue>
53076                            <enumeratedValue>
53077                                <name>SIZE_WORD</name>
53078                                <value>2</value>
53079                            </enumeratedValue>
53080                        </enumeratedValues>
53081                    </field>
53082                    <field>
53083                        <name>HIGH_PRIORITY</name>
53084                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
53085
53086                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
53087                        <bitRange>[1:1]</bitRange>
53088                        <access>read-write</access>
53089                    </field>
53090                    <field>
53091                        <name>EN</name>
53092                        <description>DMA Channel Enable.
53093                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
53094                        <bitRange>[0:0]</bitRange>
53095                        <access>read-write</access>
53096                    </field>
53097                </fields>
53098            </register>
53099            <register>
53100                <name>CH3_AL1_CTRL</name>
53101                <addressOffset>0x000000d0</addressOffset>
53102                <description>Alias for channel 3 CTRL register</description>
53103                <resetMask>0x00000000</resetMask>
53104                <fields>
53105                    <field>
53106                        <name>CH3_AL1_CTRL</name>
53107                        <bitRange>[31:0]</bitRange>
53108                        <access>read-write</access>
53109                    </field>
53110                </fields>
53111            </register>
53112            <register>
53113                <name>CH3_AL1_READ_ADDR</name>
53114                <addressOffset>0x000000d4</addressOffset>
53115                <description>Alias for channel 3 READ_ADDR register</description>
53116                <resetMask>0x00000000</resetMask>
53117                <fields>
53118                    <field>
53119                        <name>CH3_AL1_READ_ADDR</name>
53120                        <bitRange>[31:0]</bitRange>
53121                        <access>read-write</access>
53122                    </field>
53123                </fields>
53124            </register>
53125            <register>
53126                <name>CH3_AL1_WRITE_ADDR</name>
53127                <addressOffset>0x000000d8</addressOffset>
53128                <description>Alias for channel 3 WRITE_ADDR register</description>
53129                <resetMask>0x00000000</resetMask>
53130                <fields>
53131                    <field>
53132                        <name>CH3_AL1_WRITE_ADDR</name>
53133                        <bitRange>[31:0]</bitRange>
53134                        <access>read-write</access>
53135                    </field>
53136                </fields>
53137            </register>
53138            <register>
53139                <name>CH3_AL1_TRANS_COUNT_TRIG</name>
53140                <addressOffset>0x000000dc</addressOffset>
53141                <description>Alias for channel 3 TRANS_COUNT register
53142                    This is a trigger register (0xc). Writing a nonzero value will
53143                    reload the channel counter and start the channel.</description>
53144                <resetMask>0x00000000</resetMask>
53145                <fields>
53146                    <field>
53147                        <name>CH3_AL1_TRANS_COUNT_TRIG</name>
53148                        <bitRange>[31:0]</bitRange>
53149                        <access>read-write</access>
53150                    </field>
53151                </fields>
53152            </register>
53153            <register>
53154                <name>CH3_AL2_CTRL</name>
53155                <addressOffset>0x000000e0</addressOffset>
53156                <description>Alias for channel 3 CTRL register</description>
53157                <resetMask>0x00000000</resetMask>
53158                <fields>
53159                    <field>
53160                        <name>CH3_AL2_CTRL</name>
53161                        <bitRange>[31:0]</bitRange>
53162                        <access>read-write</access>
53163                    </field>
53164                </fields>
53165            </register>
53166            <register>
53167                <name>CH3_AL2_TRANS_COUNT</name>
53168                <addressOffset>0x000000e4</addressOffset>
53169                <description>Alias for channel 3 TRANS_COUNT register</description>
53170                <resetMask>0x00000000</resetMask>
53171                <fields>
53172                    <field>
53173                        <name>CH3_AL2_TRANS_COUNT</name>
53174                        <bitRange>[31:0]</bitRange>
53175                        <access>read-write</access>
53176                    </field>
53177                </fields>
53178            </register>
53179            <register>
53180                <name>CH3_AL2_READ_ADDR</name>
53181                <addressOffset>0x000000e8</addressOffset>
53182                <description>Alias for channel 3 READ_ADDR register</description>
53183                <resetMask>0x00000000</resetMask>
53184                <fields>
53185                    <field>
53186                        <name>CH3_AL2_READ_ADDR</name>
53187                        <bitRange>[31:0]</bitRange>
53188                        <access>read-write</access>
53189                    </field>
53190                </fields>
53191            </register>
53192            <register>
53193                <name>CH3_AL2_WRITE_ADDR_TRIG</name>
53194                <addressOffset>0x000000ec</addressOffset>
53195                <description>Alias for channel 3 WRITE_ADDR register
53196                    This is a trigger register (0xc). Writing a nonzero value will
53197                    reload the channel counter and start the channel.</description>
53198                <resetMask>0x00000000</resetMask>
53199                <fields>
53200                    <field>
53201                        <name>CH3_AL2_WRITE_ADDR_TRIG</name>
53202                        <bitRange>[31:0]</bitRange>
53203                        <access>read-write</access>
53204                    </field>
53205                </fields>
53206            </register>
53207            <register>
53208                <name>CH3_AL3_CTRL</name>
53209                <addressOffset>0x000000f0</addressOffset>
53210                <description>Alias for channel 3 CTRL register</description>
53211                <resetMask>0x00000000</resetMask>
53212                <fields>
53213                    <field>
53214                        <name>CH3_AL3_CTRL</name>
53215                        <bitRange>[31:0]</bitRange>
53216                        <access>read-write</access>
53217                    </field>
53218                </fields>
53219            </register>
53220            <register>
53221                <name>CH3_AL3_WRITE_ADDR</name>
53222                <addressOffset>0x000000f4</addressOffset>
53223                <description>Alias for channel 3 WRITE_ADDR register</description>
53224                <resetMask>0x00000000</resetMask>
53225                <fields>
53226                    <field>
53227                        <name>CH3_AL3_WRITE_ADDR</name>
53228                        <bitRange>[31:0]</bitRange>
53229                        <access>read-write</access>
53230                    </field>
53231                </fields>
53232            </register>
53233            <register>
53234                <name>CH3_AL3_TRANS_COUNT</name>
53235                <addressOffset>0x000000f8</addressOffset>
53236                <description>Alias for channel 3 TRANS_COUNT register</description>
53237                <resetMask>0x00000000</resetMask>
53238                <fields>
53239                    <field>
53240                        <name>CH3_AL3_TRANS_COUNT</name>
53241                        <bitRange>[31:0]</bitRange>
53242                        <access>read-write</access>
53243                    </field>
53244                </fields>
53245            </register>
53246            <register>
53247                <name>CH3_AL3_READ_ADDR_TRIG</name>
53248                <addressOffset>0x000000fc</addressOffset>
53249                <description>Alias for channel 3 READ_ADDR register
53250                    This is a trigger register (0xc). Writing a nonzero value will
53251                    reload the channel counter and start the channel.</description>
53252                <resetMask>0x00000000</resetMask>
53253                <fields>
53254                    <field>
53255                        <name>CH3_AL3_READ_ADDR_TRIG</name>
53256                        <bitRange>[31:0]</bitRange>
53257                        <access>read-write</access>
53258                    </field>
53259                </fields>
53260            </register>
53261            <register>
53262                <name>CH4_READ_ADDR</name>
53263                <addressOffset>0x00000100</addressOffset>
53264                <description>DMA Channel 4 Read Address pointer</description>
53265                <resetValue>0x00000000</resetValue>
53266                <fields>
53267                    <field>
53268                        <name>CH4_READ_ADDR</name>
53269                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
53270                        <bitRange>[31:0]</bitRange>
53271                        <access>read-write</access>
53272                    </field>
53273                </fields>
53274            </register>
53275            <register>
53276                <name>CH4_WRITE_ADDR</name>
53277                <addressOffset>0x00000104</addressOffset>
53278                <description>DMA Channel 4 Write Address pointer</description>
53279                <resetValue>0x00000000</resetValue>
53280                <fields>
53281                    <field>
53282                        <name>CH4_WRITE_ADDR</name>
53283                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
53284                        <bitRange>[31:0]</bitRange>
53285                        <access>read-write</access>
53286                    </field>
53287                </fields>
53288            </register>
53289            <register>
53290                <name>CH4_TRANS_COUNT</name>
53291                <addressOffset>0x00000108</addressOffset>
53292                <description>DMA Channel 4 Transfer Count</description>
53293                <resetValue>0x00000000</resetValue>
53294                <fields>
53295                    <field>
53296                        <name>MODE</name>
53297                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
53298
53299                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
53300
53301                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
53302
53303                            All other values are reserved.</description>
53304                        <bitRange>[31:28]</bitRange>
53305                        <access>read-write</access>
53306                        <enumeratedValues>
53307                            <enumeratedValue>
53308                                <name>NORMAL</name>
53309                                <value>0</value>
53310                            </enumeratedValue>
53311                            <enumeratedValue>
53312                                <name>TRIGGER_SELF</name>
53313                                <value>1</value>
53314                            </enumeratedValue>
53315                            <enumeratedValue>
53316                                <name>ENDLESS</name>
53317                                <value>15</value>
53318                            </enumeratedValue>
53319                        </enumeratedValues>
53320                    </field>
53321                    <field>
53322                        <name>COUNT</name>
53323                        <description>28-bit transfer count (256 million transfers maximum).
53324
53325                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
53326
53327                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
53328
53329                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
53330
53331                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
53332                        <bitRange>[27:0]</bitRange>
53333                        <access>read-write</access>
53334                    </field>
53335                </fields>
53336            </register>
53337            <register>
53338                <name>CH4_CTRL_TRIG</name>
53339                <addressOffset>0x0000010c</addressOffset>
53340                <description>DMA Channel 4 Control and Status</description>
53341                <resetValue>0x00000000</resetValue>
53342                <fields>
53343                    <field>
53344                        <name>AHB_ERROR</name>
53345                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
53346                        <bitRange>[31:31]</bitRange>
53347                        <access>read-only</access>
53348                    </field>
53349                    <field>
53350                        <name>READ_ERROR</name>
53351                        <description>If 1, the channel received a read bus error. Write one to clear.
53352                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
53353                        <bitRange>[30:30]</bitRange>
53354                        <access>read-write</access>
53355                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
53356                    </field>
53357                    <field>
53358                        <name>WRITE_ERROR</name>
53359                        <description>If 1, the channel received a write bus error. Write one to clear.
53360                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
53361                        <bitRange>[29:29]</bitRange>
53362                        <access>read-write</access>
53363                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
53364                    </field>
53365                    <field>
53366                        <name>BUSY</name>
53367                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
53368
53369                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
53370                        <bitRange>[26:26]</bitRange>
53371                        <access>read-only</access>
53372                    </field>
53373                    <field>
53374                        <name>SNIFF_EN</name>
53375                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
53376
53377                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
53378                        <bitRange>[25:25]</bitRange>
53379                        <access>read-write</access>
53380                    </field>
53381                    <field>
53382                        <name>BSWAP</name>
53383                        <description>Apply byte-swap transformation to DMA data.
53384                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
53385                        <bitRange>[24:24]</bitRange>
53386                        <access>read-write</access>
53387                    </field>
53388                    <field>
53389                        <name>IRQ_QUIET</name>
53390                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
53391
53392                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
53393                        <bitRange>[23:23]</bitRange>
53394                        <access>read-write</access>
53395                    </field>
53396                    <field>
53397                        <name>TREQ_SEL</name>
53398                        <description>Select a Transfer Request signal.
53399                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
53400                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
53401                        <bitRange>[22:17]</bitRange>
53402                        <access>read-write</access>
53403                        <enumeratedValues>
53404                            <enumeratedValue>
53405                                <name>PIO0_TX0</name>
53406                                <value>0</value>
53407                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
53408                            </enumeratedValue>
53409                            <enumeratedValue>
53410                                <name>PIO0_TX1</name>
53411                                <value>1</value>
53412                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
53413                            </enumeratedValue>
53414                            <enumeratedValue>
53415                                <name>PIO0_TX2</name>
53416                                <value>2</value>
53417                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
53418                            </enumeratedValue>
53419                            <enumeratedValue>
53420                                <name>PIO0_TX3</name>
53421                                <value>3</value>
53422                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
53423                            </enumeratedValue>
53424                            <enumeratedValue>
53425                                <name>PIO0_RX0</name>
53426                                <value>4</value>
53427                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
53428                            </enumeratedValue>
53429                            <enumeratedValue>
53430                                <name>PIO0_RX1</name>
53431                                <value>5</value>
53432                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
53433                            </enumeratedValue>
53434                            <enumeratedValue>
53435                                <name>PIO0_RX2</name>
53436                                <value>6</value>
53437                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
53438                            </enumeratedValue>
53439                            <enumeratedValue>
53440                                <name>PIO0_RX3</name>
53441                                <value>7</value>
53442                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
53443                            </enumeratedValue>
53444                            <enumeratedValue>
53445                                <name>PIO1_TX0</name>
53446                                <value>8</value>
53447                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
53448                            </enumeratedValue>
53449                            <enumeratedValue>
53450                                <name>PIO1_TX1</name>
53451                                <value>9</value>
53452                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
53453                            </enumeratedValue>
53454                            <enumeratedValue>
53455                                <name>PIO1_TX2</name>
53456                                <value>10</value>
53457                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
53458                            </enumeratedValue>
53459                            <enumeratedValue>
53460                                <name>PIO1_TX3</name>
53461                                <value>11</value>
53462                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
53463                            </enumeratedValue>
53464                            <enumeratedValue>
53465                                <name>PIO1_RX0</name>
53466                                <value>12</value>
53467                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
53468                            </enumeratedValue>
53469                            <enumeratedValue>
53470                                <name>PIO1_RX1</name>
53471                                <value>13</value>
53472                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
53473                            </enumeratedValue>
53474                            <enumeratedValue>
53475                                <name>PIO1_RX2</name>
53476                                <value>14</value>
53477                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
53478                            </enumeratedValue>
53479                            <enumeratedValue>
53480                                <name>PIO1_RX3</name>
53481                                <value>15</value>
53482                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
53483                            </enumeratedValue>
53484                            <enumeratedValue>
53485                                <name>PIO2_TX0</name>
53486                                <value>16</value>
53487                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
53488                            </enumeratedValue>
53489                            <enumeratedValue>
53490                                <name>PIO2_TX1</name>
53491                                <value>17</value>
53492                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
53493                            </enumeratedValue>
53494                            <enumeratedValue>
53495                                <name>PIO2_TX2</name>
53496                                <value>18</value>
53497                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
53498                            </enumeratedValue>
53499                            <enumeratedValue>
53500                                <name>PIO2_TX3</name>
53501                                <value>19</value>
53502                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
53503                            </enumeratedValue>
53504                            <enumeratedValue>
53505                                <name>PIO2_RX0</name>
53506                                <value>20</value>
53507                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
53508                            </enumeratedValue>
53509                            <enumeratedValue>
53510                                <name>PIO2_RX1</name>
53511                                <value>21</value>
53512                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
53513                            </enumeratedValue>
53514                            <enumeratedValue>
53515                                <name>PIO2_RX2</name>
53516                                <value>22</value>
53517                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
53518                            </enumeratedValue>
53519                            <enumeratedValue>
53520                                <name>PIO2_RX3</name>
53521                                <value>23</value>
53522                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
53523                            </enumeratedValue>
53524                            <enumeratedValue>
53525                                <name>SPI0_TX</name>
53526                                <value>24</value>
53527                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
53528                            </enumeratedValue>
53529                            <enumeratedValue>
53530                                <name>SPI0_RX</name>
53531                                <value>25</value>
53532                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
53533                            </enumeratedValue>
53534                            <enumeratedValue>
53535                                <name>SPI1_TX</name>
53536                                <value>26</value>
53537                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
53538                            </enumeratedValue>
53539                            <enumeratedValue>
53540                                <name>SPI1_RX</name>
53541                                <value>27</value>
53542                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
53543                            </enumeratedValue>
53544                            <enumeratedValue>
53545                                <name>UART0_TX</name>
53546                                <value>28</value>
53547                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
53548                            </enumeratedValue>
53549                            <enumeratedValue>
53550                                <name>UART0_RX</name>
53551                                <value>29</value>
53552                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
53553                            </enumeratedValue>
53554                            <enumeratedValue>
53555                                <name>UART1_TX</name>
53556                                <value>30</value>
53557                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
53558                            </enumeratedValue>
53559                            <enumeratedValue>
53560                                <name>UART1_RX</name>
53561                                <value>31</value>
53562                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
53563                            </enumeratedValue>
53564                            <enumeratedValue>
53565                                <name>PWM_WRAP0</name>
53566                                <value>32</value>
53567                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
53568                            </enumeratedValue>
53569                            <enumeratedValue>
53570                                <name>PWM_WRAP1</name>
53571                                <value>33</value>
53572                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
53573                            </enumeratedValue>
53574                            <enumeratedValue>
53575                                <name>PWM_WRAP2</name>
53576                                <value>34</value>
53577                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
53578                            </enumeratedValue>
53579                            <enumeratedValue>
53580                                <name>PWM_WRAP3</name>
53581                                <value>35</value>
53582                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
53583                            </enumeratedValue>
53584                            <enumeratedValue>
53585                                <name>PWM_WRAP4</name>
53586                                <value>36</value>
53587                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
53588                            </enumeratedValue>
53589                            <enumeratedValue>
53590                                <name>PWM_WRAP5</name>
53591                                <value>37</value>
53592                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
53593                            </enumeratedValue>
53594                            <enumeratedValue>
53595                                <name>PWM_WRAP6</name>
53596                                <value>38</value>
53597                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
53598                            </enumeratedValue>
53599                            <enumeratedValue>
53600                                <name>PWM_WRAP7</name>
53601                                <value>39</value>
53602                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
53603                            </enumeratedValue>
53604                            <enumeratedValue>
53605                                <name>PWM_WRAP8</name>
53606                                <value>40</value>
53607                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
53608                            </enumeratedValue>
53609                            <enumeratedValue>
53610                                <name>PWM_WRAP9</name>
53611                                <value>41</value>
53612                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
53613                            </enumeratedValue>
53614                            <enumeratedValue>
53615                                <name>PWM_WRAP10</name>
53616                                <value>42</value>
53617                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
53618                            </enumeratedValue>
53619                            <enumeratedValue>
53620                                <name>PWM_WRAP11</name>
53621                                <value>43</value>
53622                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
53623                            </enumeratedValue>
53624                            <enumeratedValue>
53625                                <name>I2C0_TX</name>
53626                                <value>44</value>
53627                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
53628                            </enumeratedValue>
53629                            <enumeratedValue>
53630                                <name>I2C0_RX</name>
53631                                <value>45</value>
53632                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
53633                            </enumeratedValue>
53634                            <enumeratedValue>
53635                                <name>I2C1_TX</name>
53636                                <value>46</value>
53637                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
53638                            </enumeratedValue>
53639                            <enumeratedValue>
53640                                <name>I2C1_RX</name>
53641                                <value>47</value>
53642                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
53643                            </enumeratedValue>
53644                            <enumeratedValue>
53645                                <name>ADC</name>
53646                                <value>48</value>
53647                                <description>Select the ADC as TREQ</description>
53648                            </enumeratedValue>
53649                            <enumeratedValue>
53650                                <name>XIP_STREAM</name>
53651                                <value>49</value>
53652                                <description>Select the XIP Streaming FIFO as TREQ</description>
53653                            </enumeratedValue>
53654                            <enumeratedValue>
53655                                <name>XIP_QMITX</name>
53656                                <value>50</value>
53657                                <description>Select XIP_QMITX as TREQ</description>
53658                            </enumeratedValue>
53659                            <enumeratedValue>
53660                                <name>XIP_QMIRX</name>
53661                                <value>51</value>
53662                                <description>Select XIP_QMIRX as TREQ</description>
53663                            </enumeratedValue>
53664                            <enumeratedValue>
53665                                <name>HSTX</name>
53666                                <value>52</value>
53667                                <description>Select HSTX as TREQ</description>
53668                            </enumeratedValue>
53669                            <enumeratedValue>
53670                                <name>CORESIGHT</name>
53671                                <value>53</value>
53672                                <description>Select CORESIGHT as TREQ</description>
53673                            </enumeratedValue>
53674                            <enumeratedValue>
53675                                <name>SHA256</name>
53676                                <value>54</value>
53677                                <description>Select SHA256 as TREQ</description>
53678                            </enumeratedValue>
53679                            <enumeratedValue>
53680                                <name>TIMER0</name>
53681                                <value>59</value>
53682                                <description>Select Timer 0 as TREQ</description>
53683                            </enumeratedValue>
53684                            <enumeratedValue>
53685                                <name>TIMER1</name>
53686                                <value>60</value>
53687                                <description>Select Timer 1 as TREQ</description>
53688                            </enumeratedValue>
53689                            <enumeratedValue>
53690                                <name>TIMER2</name>
53691                                <value>61</value>
53692                                <description>Select Timer 2 as TREQ (Optional)</description>
53693                            </enumeratedValue>
53694                            <enumeratedValue>
53695                                <name>TIMER3</name>
53696                                <value>62</value>
53697                                <description>Select Timer 3 as TREQ (Optional)</description>
53698                            </enumeratedValue>
53699                            <enumeratedValue>
53700                                <name>PERMANENT</name>
53701                                <value>63</value>
53702                                <description>Permanent request, for unpaced transfers.</description>
53703                            </enumeratedValue>
53704                        </enumeratedValues>
53705                    </field>
53706                    <field>
53707                        <name>CHAIN_TO</name>
53708                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
53709
53710                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
53711                        <bitRange>[16:13]</bitRange>
53712                        <access>read-write</access>
53713                    </field>
53714                    <field>
53715                        <name>RING_SEL</name>
53716                        <description>Select whether RING_SIZE applies to read or write addresses.
53717                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
53718                        <bitRange>[12:12]</bitRange>
53719                        <access>read-write</access>
53720                    </field>
53721                    <field>
53722                        <name>RING_SIZE</name>
53723                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
53724
53725                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
53726                        <bitRange>[11:8]</bitRange>
53727                        <access>read-write</access>
53728                        <enumeratedValues>
53729                            <enumeratedValue>
53730                                <name>RING_NONE</name>
53731                                <value>0</value>
53732                            </enumeratedValue>
53733                        </enumeratedValues>
53734                    </field>
53735                    <field>
53736                        <name>INCR_WRITE_REV</name>
53737                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
53738
53739                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
53740                        <bitRange>[7:7]</bitRange>
53741                        <access>read-write</access>
53742                    </field>
53743                    <field>
53744                        <name>INCR_WRITE</name>
53745                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
53746
53747                            Generally this should be disabled for memory-to-peripheral transfers.</description>
53748                        <bitRange>[6:6]</bitRange>
53749                        <access>read-write</access>
53750                    </field>
53751                    <field>
53752                        <name>INCR_READ_REV</name>
53753                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
53754
53755                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
53756                        <bitRange>[5:5]</bitRange>
53757                        <access>read-write</access>
53758                    </field>
53759                    <field>
53760                        <name>INCR_READ</name>
53761                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
53762
53763                            Generally this should be disabled for peripheral-to-memory transfers.</description>
53764                        <bitRange>[4:4]</bitRange>
53765                        <access>read-write</access>
53766                    </field>
53767                    <field>
53768                        <name>DATA_SIZE</name>
53769                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
53770                        <bitRange>[3:2]</bitRange>
53771                        <access>read-write</access>
53772                        <enumeratedValues>
53773                            <enumeratedValue>
53774                                <name>SIZE_BYTE</name>
53775                                <value>0</value>
53776                            </enumeratedValue>
53777                            <enumeratedValue>
53778                                <name>SIZE_HALFWORD</name>
53779                                <value>1</value>
53780                            </enumeratedValue>
53781                            <enumeratedValue>
53782                                <name>SIZE_WORD</name>
53783                                <value>2</value>
53784                            </enumeratedValue>
53785                        </enumeratedValues>
53786                    </field>
53787                    <field>
53788                        <name>HIGH_PRIORITY</name>
53789                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
53790
53791                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
53792                        <bitRange>[1:1]</bitRange>
53793                        <access>read-write</access>
53794                    </field>
53795                    <field>
53796                        <name>EN</name>
53797                        <description>DMA Channel Enable.
53798                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
53799                        <bitRange>[0:0]</bitRange>
53800                        <access>read-write</access>
53801                    </field>
53802                </fields>
53803            </register>
53804            <register>
53805                <name>CH4_AL1_CTRL</name>
53806                <addressOffset>0x00000110</addressOffset>
53807                <description>Alias for channel 4 CTRL register</description>
53808                <resetMask>0x00000000</resetMask>
53809                <fields>
53810                    <field>
53811                        <name>CH4_AL1_CTRL</name>
53812                        <bitRange>[31:0]</bitRange>
53813                        <access>read-write</access>
53814                    </field>
53815                </fields>
53816            </register>
53817            <register>
53818                <name>CH4_AL1_READ_ADDR</name>
53819                <addressOffset>0x00000114</addressOffset>
53820                <description>Alias for channel 4 READ_ADDR register</description>
53821                <resetMask>0x00000000</resetMask>
53822                <fields>
53823                    <field>
53824                        <name>CH4_AL1_READ_ADDR</name>
53825                        <bitRange>[31:0]</bitRange>
53826                        <access>read-write</access>
53827                    </field>
53828                </fields>
53829            </register>
53830            <register>
53831                <name>CH4_AL1_WRITE_ADDR</name>
53832                <addressOffset>0x00000118</addressOffset>
53833                <description>Alias for channel 4 WRITE_ADDR register</description>
53834                <resetMask>0x00000000</resetMask>
53835                <fields>
53836                    <field>
53837                        <name>CH4_AL1_WRITE_ADDR</name>
53838                        <bitRange>[31:0]</bitRange>
53839                        <access>read-write</access>
53840                    </field>
53841                </fields>
53842            </register>
53843            <register>
53844                <name>CH4_AL1_TRANS_COUNT_TRIG</name>
53845                <addressOffset>0x0000011c</addressOffset>
53846                <description>Alias for channel 4 TRANS_COUNT register
53847                    This is a trigger register (0xc). Writing a nonzero value will
53848                    reload the channel counter and start the channel.</description>
53849                <resetMask>0x00000000</resetMask>
53850                <fields>
53851                    <field>
53852                        <name>CH4_AL1_TRANS_COUNT_TRIG</name>
53853                        <bitRange>[31:0]</bitRange>
53854                        <access>read-write</access>
53855                    </field>
53856                </fields>
53857            </register>
53858            <register>
53859                <name>CH4_AL2_CTRL</name>
53860                <addressOffset>0x00000120</addressOffset>
53861                <description>Alias for channel 4 CTRL register</description>
53862                <resetMask>0x00000000</resetMask>
53863                <fields>
53864                    <field>
53865                        <name>CH4_AL2_CTRL</name>
53866                        <bitRange>[31:0]</bitRange>
53867                        <access>read-write</access>
53868                    </field>
53869                </fields>
53870            </register>
53871            <register>
53872                <name>CH4_AL2_TRANS_COUNT</name>
53873                <addressOffset>0x00000124</addressOffset>
53874                <description>Alias for channel 4 TRANS_COUNT register</description>
53875                <resetMask>0x00000000</resetMask>
53876                <fields>
53877                    <field>
53878                        <name>CH4_AL2_TRANS_COUNT</name>
53879                        <bitRange>[31:0]</bitRange>
53880                        <access>read-write</access>
53881                    </field>
53882                </fields>
53883            </register>
53884            <register>
53885                <name>CH4_AL2_READ_ADDR</name>
53886                <addressOffset>0x00000128</addressOffset>
53887                <description>Alias for channel 4 READ_ADDR register</description>
53888                <resetMask>0x00000000</resetMask>
53889                <fields>
53890                    <field>
53891                        <name>CH4_AL2_READ_ADDR</name>
53892                        <bitRange>[31:0]</bitRange>
53893                        <access>read-write</access>
53894                    </field>
53895                </fields>
53896            </register>
53897            <register>
53898                <name>CH4_AL2_WRITE_ADDR_TRIG</name>
53899                <addressOffset>0x0000012c</addressOffset>
53900                <description>Alias for channel 4 WRITE_ADDR register
53901                    This is a trigger register (0xc). Writing a nonzero value will
53902                    reload the channel counter and start the channel.</description>
53903                <resetMask>0x00000000</resetMask>
53904                <fields>
53905                    <field>
53906                        <name>CH4_AL2_WRITE_ADDR_TRIG</name>
53907                        <bitRange>[31:0]</bitRange>
53908                        <access>read-write</access>
53909                    </field>
53910                </fields>
53911            </register>
53912            <register>
53913                <name>CH4_AL3_CTRL</name>
53914                <addressOffset>0x00000130</addressOffset>
53915                <description>Alias for channel 4 CTRL register</description>
53916                <resetMask>0x00000000</resetMask>
53917                <fields>
53918                    <field>
53919                        <name>CH4_AL3_CTRL</name>
53920                        <bitRange>[31:0]</bitRange>
53921                        <access>read-write</access>
53922                    </field>
53923                </fields>
53924            </register>
53925            <register>
53926                <name>CH4_AL3_WRITE_ADDR</name>
53927                <addressOffset>0x00000134</addressOffset>
53928                <description>Alias for channel 4 WRITE_ADDR register</description>
53929                <resetMask>0x00000000</resetMask>
53930                <fields>
53931                    <field>
53932                        <name>CH4_AL3_WRITE_ADDR</name>
53933                        <bitRange>[31:0]</bitRange>
53934                        <access>read-write</access>
53935                    </field>
53936                </fields>
53937            </register>
53938            <register>
53939                <name>CH4_AL3_TRANS_COUNT</name>
53940                <addressOffset>0x00000138</addressOffset>
53941                <description>Alias for channel 4 TRANS_COUNT register</description>
53942                <resetMask>0x00000000</resetMask>
53943                <fields>
53944                    <field>
53945                        <name>CH4_AL3_TRANS_COUNT</name>
53946                        <bitRange>[31:0]</bitRange>
53947                        <access>read-write</access>
53948                    </field>
53949                </fields>
53950            </register>
53951            <register>
53952                <name>CH4_AL3_READ_ADDR_TRIG</name>
53953                <addressOffset>0x0000013c</addressOffset>
53954                <description>Alias for channel 4 READ_ADDR register
53955                    This is a trigger register (0xc). Writing a nonzero value will
53956                    reload the channel counter and start the channel.</description>
53957                <resetMask>0x00000000</resetMask>
53958                <fields>
53959                    <field>
53960                        <name>CH4_AL3_READ_ADDR_TRIG</name>
53961                        <bitRange>[31:0]</bitRange>
53962                        <access>read-write</access>
53963                    </field>
53964                </fields>
53965            </register>
53966            <register>
53967                <name>CH5_READ_ADDR</name>
53968                <addressOffset>0x00000140</addressOffset>
53969                <description>DMA Channel 5 Read Address pointer</description>
53970                <resetValue>0x00000000</resetValue>
53971                <fields>
53972                    <field>
53973                        <name>CH5_READ_ADDR</name>
53974                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
53975                        <bitRange>[31:0]</bitRange>
53976                        <access>read-write</access>
53977                    </field>
53978                </fields>
53979            </register>
53980            <register>
53981                <name>CH5_WRITE_ADDR</name>
53982                <addressOffset>0x00000144</addressOffset>
53983                <description>DMA Channel 5 Write Address pointer</description>
53984                <resetValue>0x00000000</resetValue>
53985                <fields>
53986                    <field>
53987                        <name>CH5_WRITE_ADDR</name>
53988                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
53989                        <bitRange>[31:0]</bitRange>
53990                        <access>read-write</access>
53991                    </field>
53992                </fields>
53993            </register>
53994            <register>
53995                <name>CH5_TRANS_COUNT</name>
53996                <addressOffset>0x00000148</addressOffset>
53997                <description>DMA Channel 5 Transfer Count</description>
53998                <resetValue>0x00000000</resetValue>
53999                <fields>
54000                    <field>
54001                        <name>MODE</name>
54002                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
54003
54004                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
54005
54006                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
54007
54008                            All other values are reserved.</description>
54009                        <bitRange>[31:28]</bitRange>
54010                        <access>read-write</access>
54011                        <enumeratedValues>
54012                            <enumeratedValue>
54013                                <name>NORMAL</name>
54014                                <value>0</value>
54015                            </enumeratedValue>
54016                            <enumeratedValue>
54017                                <name>TRIGGER_SELF</name>
54018                                <value>1</value>
54019                            </enumeratedValue>
54020                            <enumeratedValue>
54021                                <name>ENDLESS</name>
54022                                <value>15</value>
54023                            </enumeratedValue>
54024                        </enumeratedValues>
54025                    </field>
54026                    <field>
54027                        <name>COUNT</name>
54028                        <description>28-bit transfer count (256 million transfers maximum).
54029
54030                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
54031
54032                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
54033
54034                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
54035
54036                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
54037                        <bitRange>[27:0]</bitRange>
54038                        <access>read-write</access>
54039                    </field>
54040                </fields>
54041            </register>
54042            <register>
54043                <name>CH5_CTRL_TRIG</name>
54044                <addressOffset>0x0000014c</addressOffset>
54045                <description>DMA Channel 5 Control and Status</description>
54046                <resetValue>0x00000000</resetValue>
54047                <fields>
54048                    <field>
54049                        <name>AHB_ERROR</name>
54050                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
54051                        <bitRange>[31:31]</bitRange>
54052                        <access>read-only</access>
54053                    </field>
54054                    <field>
54055                        <name>READ_ERROR</name>
54056                        <description>If 1, the channel received a read bus error. Write one to clear.
54057                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
54058                        <bitRange>[30:30]</bitRange>
54059                        <access>read-write</access>
54060                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
54061                    </field>
54062                    <field>
54063                        <name>WRITE_ERROR</name>
54064                        <description>If 1, the channel received a write bus error. Write one to clear.
54065                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
54066                        <bitRange>[29:29]</bitRange>
54067                        <access>read-write</access>
54068                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
54069                    </field>
54070                    <field>
54071                        <name>BUSY</name>
54072                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
54073
54074                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
54075                        <bitRange>[26:26]</bitRange>
54076                        <access>read-only</access>
54077                    </field>
54078                    <field>
54079                        <name>SNIFF_EN</name>
54080                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
54081
54082                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
54083                        <bitRange>[25:25]</bitRange>
54084                        <access>read-write</access>
54085                    </field>
54086                    <field>
54087                        <name>BSWAP</name>
54088                        <description>Apply byte-swap transformation to DMA data.
54089                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
54090                        <bitRange>[24:24]</bitRange>
54091                        <access>read-write</access>
54092                    </field>
54093                    <field>
54094                        <name>IRQ_QUIET</name>
54095                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
54096
54097                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
54098                        <bitRange>[23:23]</bitRange>
54099                        <access>read-write</access>
54100                    </field>
54101                    <field>
54102                        <name>TREQ_SEL</name>
54103                        <description>Select a Transfer Request signal.
54104                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
54105                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
54106                        <bitRange>[22:17]</bitRange>
54107                        <access>read-write</access>
54108                        <enumeratedValues>
54109                            <enumeratedValue>
54110                                <name>PIO0_TX0</name>
54111                                <value>0</value>
54112                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
54113                            </enumeratedValue>
54114                            <enumeratedValue>
54115                                <name>PIO0_TX1</name>
54116                                <value>1</value>
54117                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
54118                            </enumeratedValue>
54119                            <enumeratedValue>
54120                                <name>PIO0_TX2</name>
54121                                <value>2</value>
54122                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
54123                            </enumeratedValue>
54124                            <enumeratedValue>
54125                                <name>PIO0_TX3</name>
54126                                <value>3</value>
54127                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
54128                            </enumeratedValue>
54129                            <enumeratedValue>
54130                                <name>PIO0_RX0</name>
54131                                <value>4</value>
54132                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
54133                            </enumeratedValue>
54134                            <enumeratedValue>
54135                                <name>PIO0_RX1</name>
54136                                <value>5</value>
54137                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
54138                            </enumeratedValue>
54139                            <enumeratedValue>
54140                                <name>PIO0_RX2</name>
54141                                <value>6</value>
54142                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
54143                            </enumeratedValue>
54144                            <enumeratedValue>
54145                                <name>PIO0_RX3</name>
54146                                <value>7</value>
54147                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
54148                            </enumeratedValue>
54149                            <enumeratedValue>
54150                                <name>PIO1_TX0</name>
54151                                <value>8</value>
54152                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
54153                            </enumeratedValue>
54154                            <enumeratedValue>
54155                                <name>PIO1_TX1</name>
54156                                <value>9</value>
54157                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
54158                            </enumeratedValue>
54159                            <enumeratedValue>
54160                                <name>PIO1_TX2</name>
54161                                <value>10</value>
54162                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
54163                            </enumeratedValue>
54164                            <enumeratedValue>
54165                                <name>PIO1_TX3</name>
54166                                <value>11</value>
54167                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
54168                            </enumeratedValue>
54169                            <enumeratedValue>
54170                                <name>PIO1_RX0</name>
54171                                <value>12</value>
54172                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
54173                            </enumeratedValue>
54174                            <enumeratedValue>
54175                                <name>PIO1_RX1</name>
54176                                <value>13</value>
54177                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
54178                            </enumeratedValue>
54179                            <enumeratedValue>
54180                                <name>PIO1_RX2</name>
54181                                <value>14</value>
54182                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
54183                            </enumeratedValue>
54184                            <enumeratedValue>
54185                                <name>PIO1_RX3</name>
54186                                <value>15</value>
54187                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
54188                            </enumeratedValue>
54189                            <enumeratedValue>
54190                                <name>PIO2_TX0</name>
54191                                <value>16</value>
54192                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
54193                            </enumeratedValue>
54194                            <enumeratedValue>
54195                                <name>PIO2_TX1</name>
54196                                <value>17</value>
54197                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
54198                            </enumeratedValue>
54199                            <enumeratedValue>
54200                                <name>PIO2_TX2</name>
54201                                <value>18</value>
54202                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
54203                            </enumeratedValue>
54204                            <enumeratedValue>
54205                                <name>PIO2_TX3</name>
54206                                <value>19</value>
54207                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
54208                            </enumeratedValue>
54209                            <enumeratedValue>
54210                                <name>PIO2_RX0</name>
54211                                <value>20</value>
54212                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
54213                            </enumeratedValue>
54214                            <enumeratedValue>
54215                                <name>PIO2_RX1</name>
54216                                <value>21</value>
54217                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
54218                            </enumeratedValue>
54219                            <enumeratedValue>
54220                                <name>PIO2_RX2</name>
54221                                <value>22</value>
54222                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
54223                            </enumeratedValue>
54224                            <enumeratedValue>
54225                                <name>PIO2_RX3</name>
54226                                <value>23</value>
54227                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
54228                            </enumeratedValue>
54229                            <enumeratedValue>
54230                                <name>SPI0_TX</name>
54231                                <value>24</value>
54232                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
54233                            </enumeratedValue>
54234                            <enumeratedValue>
54235                                <name>SPI0_RX</name>
54236                                <value>25</value>
54237                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
54238                            </enumeratedValue>
54239                            <enumeratedValue>
54240                                <name>SPI1_TX</name>
54241                                <value>26</value>
54242                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
54243                            </enumeratedValue>
54244                            <enumeratedValue>
54245                                <name>SPI1_RX</name>
54246                                <value>27</value>
54247                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
54248                            </enumeratedValue>
54249                            <enumeratedValue>
54250                                <name>UART0_TX</name>
54251                                <value>28</value>
54252                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
54253                            </enumeratedValue>
54254                            <enumeratedValue>
54255                                <name>UART0_RX</name>
54256                                <value>29</value>
54257                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
54258                            </enumeratedValue>
54259                            <enumeratedValue>
54260                                <name>UART1_TX</name>
54261                                <value>30</value>
54262                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
54263                            </enumeratedValue>
54264                            <enumeratedValue>
54265                                <name>UART1_RX</name>
54266                                <value>31</value>
54267                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
54268                            </enumeratedValue>
54269                            <enumeratedValue>
54270                                <name>PWM_WRAP0</name>
54271                                <value>32</value>
54272                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
54273                            </enumeratedValue>
54274                            <enumeratedValue>
54275                                <name>PWM_WRAP1</name>
54276                                <value>33</value>
54277                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
54278                            </enumeratedValue>
54279                            <enumeratedValue>
54280                                <name>PWM_WRAP2</name>
54281                                <value>34</value>
54282                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
54283                            </enumeratedValue>
54284                            <enumeratedValue>
54285                                <name>PWM_WRAP3</name>
54286                                <value>35</value>
54287                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
54288                            </enumeratedValue>
54289                            <enumeratedValue>
54290                                <name>PWM_WRAP4</name>
54291                                <value>36</value>
54292                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
54293                            </enumeratedValue>
54294                            <enumeratedValue>
54295                                <name>PWM_WRAP5</name>
54296                                <value>37</value>
54297                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
54298                            </enumeratedValue>
54299                            <enumeratedValue>
54300                                <name>PWM_WRAP6</name>
54301                                <value>38</value>
54302                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
54303                            </enumeratedValue>
54304                            <enumeratedValue>
54305                                <name>PWM_WRAP7</name>
54306                                <value>39</value>
54307                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
54308                            </enumeratedValue>
54309                            <enumeratedValue>
54310                                <name>PWM_WRAP8</name>
54311                                <value>40</value>
54312                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
54313                            </enumeratedValue>
54314                            <enumeratedValue>
54315                                <name>PWM_WRAP9</name>
54316                                <value>41</value>
54317                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
54318                            </enumeratedValue>
54319                            <enumeratedValue>
54320                                <name>PWM_WRAP10</name>
54321                                <value>42</value>
54322                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
54323                            </enumeratedValue>
54324                            <enumeratedValue>
54325                                <name>PWM_WRAP11</name>
54326                                <value>43</value>
54327                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
54328                            </enumeratedValue>
54329                            <enumeratedValue>
54330                                <name>I2C0_TX</name>
54331                                <value>44</value>
54332                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
54333                            </enumeratedValue>
54334                            <enumeratedValue>
54335                                <name>I2C0_RX</name>
54336                                <value>45</value>
54337                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
54338                            </enumeratedValue>
54339                            <enumeratedValue>
54340                                <name>I2C1_TX</name>
54341                                <value>46</value>
54342                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
54343                            </enumeratedValue>
54344                            <enumeratedValue>
54345                                <name>I2C1_RX</name>
54346                                <value>47</value>
54347                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
54348                            </enumeratedValue>
54349                            <enumeratedValue>
54350                                <name>ADC</name>
54351                                <value>48</value>
54352                                <description>Select the ADC as TREQ</description>
54353                            </enumeratedValue>
54354                            <enumeratedValue>
54355                                <name>XIP_STREAM</name>
54356                                <value>49</value>
54357                                <description>Select the XIP Streaming FIFO as TREQ</description>
54358                            </enumeratedValue>
54359                            <enumeratedValue>
54360                                <name>XIP_QMITX</name>
54361                                <value>50</value>
54362                                <description>Select XIP_QMITX as TREQ</description>
54363                            </enumeratedValue>
54364                            <enumeratedValue>
54365                                <name>XIP_QMIRX</name>
54366                                <value>51</value>
54367                                <description>Select XIP_QMIRX as TREQ</description>
54368                            </enumeratedValue>
54369                            <enumeratedValue>
54370                                <name>HSTX</name>
54371                                <value>52</value>
54372                                <description>Select HSTX as TREQ</description>
54373                            </enumeratedValue>
54374                            <enumeratedValue>
54375                                <name>CORESIGHT</name>
54376                                <value>53</value>
54377                                <description>Select CORESIGHT as TREQ</description>
54378                            </enumeratedValue>
54379                            <enumeratedValue>
54380                                <name>SHA256</name>
54381                                <value>54</value>
54382                                <description>Select SHA256 as TREQ</description>
54383                            </enumeratedValue>
54384                            <enumeratedValue>
54385                                <name>TIMER0</name>
54386                                <value>59</value>
54387                                <description>Select Timer 0 as TREQ</description>
54388                            </enumeratedValue>
54389                            <enumeratedValue>
54390                                <name>TIMER1</name>
54391                                <value>60</value>
54392                                <description>Select Timer 1 as TREQ</description>
54393                            </enumeratedValue>
54394                            <enumeratedValue>
54395                                <name>TIMER2</name>
54396                                <value>61</value>
54397                                <description>Select Timer 2 as TREQ (Optional)</description>
54398                            </enumeratedValue>
54399                            <enumeratedValue>
54400                                <name>TIMER3</name>
54401                                <value>62</value>
54402                                <description>Select Timer 3 as TREQ (Optional)</description>
54403                            </enumeratedValue>
54404                            <enumeratedValue>
54405                                <name>PERMANENT</name>
54406                                <value>63</value>
54407                                <description>Permanent request, for unpaced transfers.</description>
54408                            </enumeratedValue>
54409                        </enumeratedValues>
54410                    </field>
54411                    <field>
54412                        <name>CHAIN_TO</name>
54413                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
54414
54415                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
54416                        <bitRange>[16:13]</bitRange>
54417                        <access>read-write</access>
54418                    </field>
54419                    <field>
54420                        <name>RING_SEL</name>
54421                        <description>Select whether RING_SIZE applies to read or write addresses.
54422                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
54423                        <bitRange>[12:12]</bitRange>
54424                        <access>read-write</access>
54425                    </field>
54426                    <field>
54427                        <name>RING_SIZE</name>
54428                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
54429
54430                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
54431                        <bitRange>[11:8]</bitRange>
54432                        <access>read-write</access>
54433                        <enumeratedValues>
54434                            <enumeratedValue>
54435                                <name>RING_NONE</name>
54436                                <value>0</value>
54437                            </enumeratedValue>
54438                        </enumeratedValues>
54439                    </field>
54440                    <field>
54441                        <name>INCR_WRITE_REV</name>
54442                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
54443
54444                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
54445                        <bitRange>[7:7]</bitRange>
54446                        <access>read-write</access>
54447                    </field>
54448                    <field>
54449                        <name>INCR_WRITE</name>
54450                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
54451
54452                            Generally this should be disabled for memory-to-peripheral transfers.</description>
54453                        <bitRange>[6:6]</bitRange>
54454                        <access>read-write</access>
54455                    </field>
54456                    <field>
54457                        <name>INCR_READ_REV</name>
54458                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
54459
54460                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
54461                        <bitRange>[5:5]</bitRange>
54462                        <access>read-write</access>
54463                    </field>
54464                    <field>
54465                        <name>INCR_READ</name>
54466                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
54467
54468                            Generally this should be disabled for peripheral-to-memory transfers.</description>
54469                        <bitRange>[4:4]</bitRange>
54470                        <access>read-write</access>
54471                    </field>
54472                    <field>
54473                        <name>DATA_SIZE</name>
54474                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
54475                        <bitRange>[3:2]</bitRange>
54476                        <access>read-write</access>
54477                        <enumeratedValues>
54478                            <enumeratedValue>
54479                                <name>SIZE_BYTE</name>
54480                                <value>0</value>
54481                            </enumeratedValue>
54482                            <enumeratedValue>
54483                                <name>SIZE_HALFWORD</name>
54484                                <value>1</value>
54485                            </enumeratedValue>
54486                            <enumeratedValue>
54487                                <name>SIZE_WORD</name>
54488                                <value>2</value>
54489                            </enumeratedValue>
54490                        </enumeratedValues>
54491                    </field>
54492                    <field>
54493                        <name>HIGH_PRIORITY</name>
54494                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
54495
54496                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
54497                        <bitRange>[1:1]</bitRange>
54498                        <access>read-write</access>
54499                    </field>
54500                    <field>
54501                        <name>EN</name>
54502                        <description>DMA Channel Enable.
54503                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
54504                        <bitRange>[0:0]</bitRange>
54505                        <access>read-write</access>
54506                    </field>
54507                </fields>
54508            </register>
54509            <register>
54510                <name>CH5_AL1_CTRL</name>
54511                <addressOffset>0x00000150</addressOffset>
54512                <description>Alias for channel 5 CTRL register</description>
54513                <resetMask>0x00000000</resetMask>
54514                <fields>
54515                    <field>
54516                        <name>CH5_AL1_CTRL</name>
54517                        <bitRange>[31:0]</bitRange>
54518                        <access>read-write</access>
54519                    </field>
54520                </fields>
54521            </register>
54522            <register>
54523                <name>CH5_AL1_READ_ADDR</name>
54524                <addressOffset>0x00000154</addressOffset>
54525                <description>Alias for channel 5 READ_ADDR register</description>
54526                <resetMask>0x00000000</resetMask>
54527                <fields>
54528                    <field>
54529                        <name>CH5_AL1_READ_ADDR</name>
54530                        <bitRange>[31:0]</bitRange>
54531                        <access>read-write</access>
54532                    </field>
54533                </fields>
54534            </register>
54535            <register>
54536                <name>CH5_AL1_WRITE_ADDR</name>
54537                <addressOffset>0x00000158</addressOffset>
54538                <description>Alias for channel 5 WRITE_ADDR register</description>
54539                <resetMask>0x00000000</resetMask>
54540                <fields>
54541                    <field>
54542                        <name>CH5_AL1_WRITE_ADDR</name>
54543                        <bitRange>[31:0]</bitRange>
54544                        <access>read-write</access>
54545                    </field>
54546                </fields>
54547            </register>
54548            <register>
54549                <name>CH5_AL1_TRANS_COUNT_TRIG</name>
54550                <addressOffset>0x0000015c</addressOffset>
54551                <description>Alias for channel 5 TRANS_COUNT register
54552                    This is a trigger register (0xc). Writing a nonzero value will
54553                    reload the channel counter and start the channel.</description>
54554                <resetMask>0x00000000</resetMask>
54555                <fields>
54556                    <field>
54557                        <name>CH5_AL1_TRANS_COUNT_TRIG</name>
54558                        <bitRange>[31:0]</bitRange>
54559                        <access>read-write</access>
54560                    </field>
54561                </fields>
54562            </register>
54563            <register>
54564                <name>CH5_AL2_CTRL</name>
54565                <addressOffset>0x00000160</addressOffset>
54566                <description>Alias for channel 5 CTRL register</description>
54567                <resetMask>0x00000000</resetMask>
54568                <fields>
54569                    <field>
54570                        <name>CH5_AL2_CTRL</name>
54571                        <bitRange>[31:0]</bitRange>
54572                        <access>read-write</access>
54573                    </field>
54574                </fields>
54575            </register>
54576            <register>
54577                <name>CH5_AL2_TRANS_COUNT</name>
54578                <addressOffset>0x00000164</addressOffset>
54579                <description>Alias for channel 5 TRANS_COUNT register</description>
54580                <resetMask>0x00000000</resetMask>
54581                <fields>
54582                    <field>
54583                        <name>CH5_AL2_TRANS_COUNT</name>
54584                        <bitRange>[31:0]</bitRange>
54585                        <access>read-write</access>
54586                    </field>
54587                </fields>
54588            </register>
54589            <register>
54590                <name>CH5_AL2_READ_ADDR</name>
54591                <addressOffset>0x00000168</addressOffset>
54592                <description>Alias for channel 5 READ_ADDR register</description>
54593                <resetMask>0x00000000</resetMask>
54594                <fields>
54595                    <field>
54596                        <name>CH5_AL2_READ_ADDR</name>
54597                        <bitRange>[31:0]</bitRange>
54598                        <access>read-write</access>
54599                    </field>
54600                </fields>
54601            </register>
54602            <register>
54603                <name>CH5_AL2_WRITE_ADDR_TRIG</name>
54604                <addressOffset>0x0000016c</addressOffset>
54605                <description>Alias for channel 5 WRITE_ADDR register
54606                    This is a trigger register (0xc). Writing a nonzero value will
54607                    reload the channel counter and start the channel.</description>
54608                <resetMask>0x00000000</resetMask>
54609                <fields>
54610                    <field>
54611                        <name>CH5_AL2_WRITE_ADDR_TRIG</name>
54612                        <bitRange>[31:0]</bitRange>
54613                        <access>read-write</access>
54614                    </field>
54615                </fields>
54616            </register>
54617            <register>
54618                <name>CH5_AL3_CTRL</name>
54619                <addressOffset>0x00000170</addressOffset>
54620                <description>Alias for channel 5 CTRL register</description>
54621                <resetMask>0x00000000</resetMask>
54622                <fields>
54623                    <field>
54624                        <name>CH5_AL3_CTRL</name>
54625                        <bitRange>[31:0]</bitRange>
54626                        <access>read-write</access>
54627                    </field>
54628                </fields>
54629            </register>
54630            <register>
54631                <name>CH5_AL3_WRITE_ADDR</name>
54632                <addressOffset>0x00000174</addressOffset>
54633                <description>Alias for channel 5 WRITE_ADDR register</description>
54634                <resetMask>0x00000000</resetMask>
54635                <fields>
54636                    <field>
54637                        <name>CH5_AL3_WRITE_ADDR</name>
54638                        <bitRange>[31:0]</bitRange>
54639                        <access>read-write</access>
54640                    </field>
54641                </fields>
54642            </register>
54643            <register>
54644                <name>CH5_AL3_TRANS_COUNT</name>
54645                <addressOffset>0x00000178</addressOffset>
54646                <description>Alias for channel 5 TRANS_COUNT register</description>
54647                <resetMask>0x00000000</resetMask>
54648                <fields>
54649                    <field>
54650                        <name>CH5_AL3_TRANS_COUNT</name>
54651                        <bitRange>[31:0]</bitRange>
54652                        <access>read-write</access>
54653                    </field>
54654                </fields>
54655            </register>
54656            <register>
54657                <name>CH5_AL3_READ_ADDR_TRIG</name>
54658                <addressOffset>0x0000017c</addressOffset>
54659                <description>Alias for channel 5 READ_ADDR register
54660                    This is a trigger register (0xc). Writing a nonzero value will
54661                    reload the channel counter and start the channel.</description>
54662                <resetMask>0x00000000</resetMask>
54663                <fields>
54664                    <field>
54665                        <name>CH5_AL3_READ_ADDR_TRIG</name>
54666                        <bitRange>[31:0]</bitRange>
54667                        <access>read-write</access>
54668                    </field>
54669                </fields>
54670            </register>
54671            <register>
54672                <name>CH6_READ_ADDR</name>
54673                <addressOffset>0x00000180</addressOffset>
54674                <description>DMA Channel 6 Read Address pointer</description>
54675                <resetValue>0x00000000</resetValue>
54676                <fields>
54677                    <field>
54678                        <name>CH6_READ_ADDR</name>
54679                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
54680                        <bitRange>[31:0]</bitRange>
54681                        <access>read-write</access>
54682                    </field>
54683                </fields>
54684            </register>
54685            <register>
54686                <name>CH6_WRITE_ADDR</name>
54687                <addressOffset>0x00000184</addressOffset>
54688                <description>DMA Channel 6 Write Address pointer</description>
54689                <resetValue>0x00000000</resetValue>
54690                <fields>
54691                    <field>
54692                        <name>CH6_WRITE_ADDR</name>
54693                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
54694                        <bitRange>[31:0]</bitRange>
54695                        <access>read-write</access>
54696                    </field>
54697                </fields>
54698            </register>
54699            <register>
54700                <name>CH6_TRANS_COUNT</name>
54701                <addressOffset>0x00000188</addressOffset>
54702                <description>DMA Channel 6 Transfer Count</description>
54703                <resetValue>0x00000000</resetValue>
54704                <fields>
54705                    <field>
54706                        <name>MODE</name>
54707                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
54708
54709                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
54710
54711                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
54712
54713                            All other values are reserved.</description>
54714                        <bitRange>[31:28]</bitRange>
54715                        <access>read-write</access>
54716                        <enumeratedValues>
54717                            <enumeratedValue>
54718                                <name>NORMAL</name>
54719                                <value>0</value>
54720                            </enumeratedValue>
54721                            <enumeratedValue>
54722                                <name>TRIGGER_SELF</name>
54723                                <value>1</value>
54724                            </enumeratedValue>
54725                            <enumeratedValue>
54726                                <name>ENDLESS</name>
54727                                <value>15</value>
54728                            </enumeratedValue>
54729                        </enumeratedValues>
54730                    </field>
54731                    <field>
54732                        <name>COUNT</name>
54733                        <description>28-bit transfer count (256 million transfers maximum).
54734
54735                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
54736
54737                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
54738
54739                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
54740
54741                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
54742                        <bitRange>[27:0]</bitRange>
54743                        <access>read-write</access>
54744                    </field>
54745                </fields>
54746            </register>
54747            <register>
54748                <name>CH6_CTRL_TRIG</name>
54749                <addressOffset>0x0000018c</addressOffset>
54750                <description>DMA Channel 6 Control and Status</description>
54751                <resetValue>0x00000000</resetValue>
54752                <fields>
54753                    <field>
54754                        <name>AHB_ERROR</name>
54755                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
54756                        <bitRange>[31:31]</bitRange>
54757                        <access>read-only</access>
54758                    </field>
54759                    <field>
54760                        <name>READ_ERROR</name>
54761                        <description>If 1, the channel received a read bus error. Write one to clear.
54762                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
54763                        <bitRange>[30:30]</bitRange>
54764                        <access>read-write</access>
54765                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
54766                    </field>
54767                    <field>
54768                        <name>WRITE_ERROR</name>
54769                        <description>If 1, the channel received a write bus error. Write one to clear.
54770                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
54771                        <bitRange>[29:29]</bitRange>
54772                        <access>read-write</access>
54773                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
54774                    </field>
54775                    <field>
54776                        <name>BUSY</name>
54777                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
54778
54779                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
54780                        <bitRange>[26:26]</bitRange>
54781                        <access>read-only</access>
54782                    </field>
54783                    <field>
54784                        <name>SNIFF_EN</name>
54785                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
54786
54787                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
54788                        <bitRange>[25:25]</bitRange>
54789                        <access>read-write</access>
54790                    </field>
54791                    <field>
54792                        <name>BSWAP</name>
54793                        <description>Apply byte-swap transformation to DMA data.
54794                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
54795                        <bitRange>[24:24]</bitRange>
54796                        <access>read-write</access>
54797                    </field>
54798                    <field>
54799                        <name>IRQ_QUIET</name>
54800                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
54801
54802                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
54803                        <bitRange>[23:23]</bitRange>
54804                        <access>read-write</access>
54805                    </field>
54806                    <field>
54807                        <name>TREQ_SEL</name>
54808                        <description>Select a Transfer Request signal.
54809                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
54810                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
54811                        <bitRange>[22:17]</bitRange>
54812                        <access>read-write</access>
54813                        <enumeratedValues>
54814                            <enumeratedValue>
54815                                <name>PIO0_TX0</name>
54816                                <value>0</value>
54817                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
54818                            </enumeratedValue>
54819                            <enumeratedValue>
54820                                <name>PIO0_TX1</name>
54821                                <value>1</value>
54822                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
54823                            </enumeratedValue>
54824                            <enumeratedValue>
54825                                <name>PIO0_TX2</name>
54826                                <value>2</value>
54827                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
54828                            </enumeratedValue>
54829                            <enumeratedValue>
54830                                <name>PIO0_TX3</name>
54831                                <value>3</value>
54832                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
54833                            </enumeratedValue>
54834                            <enumeratedValue>
54835                                <name>PIO0_RX0</name>
54836                                <value>4</value>
54837                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
54838                            </enumeratedValue>
54839                            <enumeratedValue>
54840                                <name>PIO0_RX1</name>
54841                                <value>5</value>
54842                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
54843                            </enumeratedValue>
54844                            <enumeratedValue>
54845                                <name>PIO0_RX2</name>
54846                                <value>6</value>
54847                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
54848                            </enumeratedValue>
54849                            <enumeratedValue>
54850                                <name>PIO0_RX3</name>
54851                                <value>7</value>
54852                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
54853                            </enumeratedValue>
54854                            <enumeratedValue>
54855                                <name>PIO1_TX0</name>
54856                                <value>8</value>
54857                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
54858                            </enumeratedValue>
54859                            <enumeratedValue>
54860                                <name>PIO1_TX1</name>
54861                                <value>9</value>
54862                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
54863                            </enumeratedValue>
54864                            <enumeratedValue>
54865                                <name>PIO1_TX2</name>
54866                                <value>10</value>
54867                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
54868                            </enumeratedValue>
54869                            <enumeratedValue>
54870                                <name>PIO1_TX3</name>
54871                                <value>11</value>
54872                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
54873                            </enumeratedValue>
54874                            <enumeratedValue>
54875                                <name>PIO1_RX0</name>
54876                                <value>12</value>
54877                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
54878                            </enumeratedValue>
54879                            <enumeratedValue>
54880                                <name>PIO1_RX1</name>
54881                                <value>13</value>
54882                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
54883                            </enumeratedValue>
54884                            <enumeratedValue>
54885                                <name>PIO1_RX2</name>
54886                                <value>14</value>
54887                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
54888                            </enumeratedValue>
54889                            <enumeratedValue>
54890                                <name>PIO1_RX3</name>
54891                                <value>15</value>
54892                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
54893                            </enumeratedValue>
54894                            <enumeratedValue>
54895                                <name>PIO2_TX0</name>
54896                                <value>16</value>
54897                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
54898                            </enumeratedValue>
54899                            <enumeratedValue>
54900                                <name>PIO2_TX1</name>
54901                                <value>17</value>
54902                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
54903                            </enumeratedValue>
54904                            <enumeratedValue>
54905                                <name>PIO2_TX2</name>
54906                                <value>18</value>
54907                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
54908                            </enumeratedValue>
54909                            <enumeratedValue>
54910                                <name>PIO2_TX3</name>
54911                                <value>19</value>
54912                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
54913                            </enumeratedValue>
54914                            <enumeratedValue>
54915                                <name>PIO2_RX0</name>
54916                                <value>20</value>
54917                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
54918                            </enumeratedValue>
54919                            <enumeratedValue>
54920                                <name>PIO2_RX1</name>
54921                                <value>21</value>
54922                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
54923                            </enumeratedValue>
54924                            <enumeratedValue>
54925                                <name>PIO2_RX2</name>
54926                                <value>22</value>
54927                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
54928                            </enumeratedValue>
54929                            <enumeratedValue>
54930                                <name>PIO2_RX3</name>
54931                                <value>23</value>
54932                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
54933                            </enumeratedValue>
54934                            <enumeratedValue>
54935                                <name>SPI0_TX</name>
54936                                <value>24</value>
54937                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
54938                            </enumeratedValue>
54939                            <enumeratedValue>
54940                                <name>SPI0_RX</name>
54941                                <value>25</value>
54942                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
54943                            </enumeratedValue>
54944                            <enumeratedValue>
54945                                <name>SPI1_TX</name>
54946                                <value>26</value>
54947                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
54948                            </enumeratedValue>
54949                            <enumeratedValue>
54950                                <name>SPI1_RX</name>
54951                                <value>27</value>
54952                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
54953                            </enumeratedValue>
54954                            <enumeratedValue>
54955                                <name>UART0_TX</name>
54956                                <value>28</value>
54957                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
54958                            </enumeratedValue>
54959                            <enumeratedValue>
54960                                <name>UART0_RX</name>
54961                                <value>29</value>
54962                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
54963                            </enumeratedValue>
54964                            <enumeratedValue>
54965                                <name>UART1_TX</name>
54966                                <value>30</value>
54967                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
54968                            </enumeratedValue>
54969                            <enumeratedValue>
54970                                <name>UART1_RX</name>
54971                                <value>31</value>
54972                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
54973                            </enumeratedValue>
54974                            <enumeratedValue>
54975                                <name>PWM_WRAP0</name>
54976                                <value>32</value>
54977                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
54978                            </enumeratedValue>
54979                            <enumeratedValue>
54980                                <name>PWM_WRAP1</name>
54981                                <value>33</value>
54982                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
54983                            </enumeratedValue>
54984                            <enumeratedValue>
54985                                <name>PWM_WRAP2</name>
54986                                <value>34</value>
54987                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
54988                            </enumeratedValue>
54989                            <enumeratedValue>
54990                                <name>PWM_WRAP3</name>
54991                                <value>35</value>
54992                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
54993                            </enumeratedValue>
54994                            <enumeratedValue>
54995                                <name>PWM_WRAP4</name>
54996                                <value>36</value>
54997                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
54998                            </enumeratedValue>
54999                            <enumeratedValue>
55000                                <name>PWM_WRAP5</name>
55001                                <value>37</value>
55002                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
55003                            </enumeratedValue>
55004                            <enumeratedValue>
55005                                <name>PWM_WRAP6</name>
55006                                <value>38</value>
55007                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
55008                            </enumeratedValue>
55009                            <enumeratedValue>
55010                                <name>PWM_WRAP7</name>
55011                                <value>39</value>
55012                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
55013                            </enumeratedValue>
55014                            <enumeratedValue>
55015                                <name>PWM_WRAP8</name>
55016                                <value>40</value>
55017                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
55018                            </enumeratedValue>
55019                            <enumeratedValue>
55020                                <name>PWM_WRAP9</name>
55021                                <value>41</value>
55022                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
55023                            </enumeratedValue>
55024                            <enumeratedValue>
55025                                <name>PWM_WRAP10</name>
55026                                <value>42</value>
55027                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
55028                            </enumeratedValue>
55029                            <enumeratedValue>
55030                                <name>PWM_WRAP11</name>
55031                                <value>43</value>
55032                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
55033                            </enumeratedValue>
55034                            <enumeratedValue>
55035                                <name>I2C0_TX</name>
55036                                <value>44</value>
55037                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
55038                            </enumeratedValue>
55039                            <enumeratedValue>
55040                                <name>I2C0_RX</name>
55041                                <value>45</value>
55042                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
55043                            </enumeratedValue>
55044                            <enumeratedValue>
55045                                <name>I2C1_TX</name>
55046                                <value>46</value>
55047                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
55048                            </enumeratedValue>
55049                            <enumeratedValue>
55050                                <name>I2C1_RX</name>
55051                                <value>47</value>
55052                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
55053                            </enumeratedValue>
55054                            <enumeratedValue>
55055                                <name>ADC</name>
55056                                <value>48</value>
55057                                <description>Select the ADC as TREQ</description>
55058                            </enumeratedValue>
55059                            <enumeratedValue>
55060                                <name>XIP_STREAM</name>
55061                                <value>49</value>
55062                                <description>Select the XIP Streaming FIFO as TREQ</description>
55063                            </enumeratedValue>
55064                            <enumeratedValue>
55065                                <name>XIP_QMITX</name>
55066                                <value>50</value>
55067                                <description>Select XIP_QMITX as TREQ</description>
55068                            </enumeratedValue>
55069                            <enumeratedValue>
55070                                <name>XIP_QMIRX</name>
55071                                <value>51</value>
55072                                <description>Select XIP_QMIRX as TREQ</description>
55073                            </enumeratedValue>
55074                            <enumeratedValue>
55075                                <name>HSTX</name>
55076                                <value>52</value>
55077                                <description>Select HSTX as TREQ</description>
55078                            </enumeratedValue>
55079                            <enumeratedValue>
55080                                <name>CORESIGHT</name>
55081                                <value>53</value>
55082                                <description>Select CORESIGHT as TREQ</description>
55083                            </enumeratedValue>
55084                            <enumeratedValue>
55085                                <name>SHA256</name>
55086                                <value>54</value>
55087                                <description>Select SHA256 as TREQ</description>
55088                            </enumeratedValue>
55089                            <enumeratedValue>
55090                                <name>TIMER0</name>
55091                                <value>59</value>
55092                                <description>Select Timer 0 as TREQ</description>
55093                            </enumeratedValue>
55094                            <enumeratedValue>
55095                                <name>TIMER1</name>
55096                                <value>60</value>
55097                                <description>Select Timer 1 as TREQ</description>
55098                            </enumeratedValue>
55099                            <enumeratedValue>
55100                                <name>TIMER2</name>
55101                                <value>61</value>
55102                                <description>Select Timer 2 as TREQ (Optional)</description>
55103                            </enumeratedValue>
55104                            <enumeratedValue>
55105                                <name>TIMER3</name>
55106                                <value>62</value>
55107                                <description>Select Timer 3 as TREQ (Optional)</description>
55108                            </enumeratedValue>
55109                            <enumeratedValue>
55110                                <name>PERMANENT</name>
55111                                <value>63</value>
55112                                <description>Permanent request, for unpaced transfers.</description>
55113                            </enumeratedValue>
55114                        </enumeratedValues>
55115                    </field>
55116                    <field>
55117                        <name>CHAIN_TO</name>
55118                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
55119
55120                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
55121                        <bitRange>[16:13]</bitRange>
55122                        <access>read-write</access>
55123                    </field>
55124                    <field>
55125                        <name>RING_SEL</name>
55126                        <description>Select whether RING_SIZE applies to read or write addresses.
55127                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
55128                        <bitRange>[12:12]</bitRange>
55129                        <access>read-write</access>
55130                    </field>
55131                    <field>
55132                        <name>RING_SIZE</name>
55133                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
55134
55135                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
55136                        <bitRange>[11:8]</bitRange>
55137                        <access>read-write</access>
55138                        <enumeratedValues>
55139                            <enumeratedValue>
55140                                <name>RING_NONE</name>
55141                                <value>0</value>
55142                            </enumeratedValue>
55143                        </enumeratedValues>
55144                    </field>
55145                    <field>
55146                        <name>INCR_WRITE_REV</name>
55147                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
55148
55149                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
55150                        <bitRange>[7:7]</bitRange>
55151                        <access>read-write</access>
55152                    </field>
55153                    <field>
55154                        <name>INCR_WRITE</name>
55155                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
55156
55157                            Generally this should be disabled for memory-to-peripheral transfers.</description>
55158                        <bitRange>[6:6]</bitRange>
55159                        <access>read-write</access>
55160                    </field>
55161                    <field>
55162                        <name>INCR_READ_REV</name>
55163                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
55164
55165                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
55166                        <bitRange>[5:5]</bitRange>
55167                        <access>read-write</access>
55168                    </field>
55169                    <field>
55170                        <name>INCR_READ</name>
55171                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
55172
55173                            Generally this should be disabled for peripheral-to-memory transfers.</description>
55174                        <bitRange>[4:4]</bitRange>
55175                        <access>read-write</access>
55176                    </field>
55177                    <field>
55178                        <name>DATA_SIZE</name>
55179                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
55180                        <bitRange>[3:2]</bitRange>
55181                        <access>read-write</access>
55182                        <enumeratedValues>
55183                            <enumeratedValue>
55184                                <name>SIZE_BYTE</name>
55185                                <value>0</value>
55186                            </enumeratedValue>
55187                            <enumeratedValue>
55188                                <name>SIZE_HALFWORD</name>
55189                                <value>1</value>
55190                            </enumeratedValue>
55191                            <enumeratedValue>
55192                                <name>SIZE_WORD</name>
55193                                <value>2</value>
55194                            </enumeratedValue>
55195                        </enumeratedValues>
55196                    </field>
55197                    <field>
55198                        <name>HIGH_PRIORITY</name>
55199                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
55200
55201                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
55202                        <bitRange>[1:1]</bitRange>
55203                        <access>read-write</access>
55204                    </field>
55205                    <field>
55206                        <name>EN</name>
55207                        <description>DMA Channel Enable.
55208                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
55209                        <bitRange>[0:0]</bitRange>
55210                        <access>read-write</access>
55211                    </field>
55212                </fields>
55213            </register>
55214            <register>
55215                <name>CH6_AL1_CTRL</name>
55216                <addressOffset>0x00000190</addressOffset>
55217                <description>Alias for channel 6 CTRL register</description>
55218                <resetMask>0x00000000</resetMask>
55219                <fields>
55220                    <field>
55221                        <name>CH6_AL1_CTRL</name>
55222                        <bitRange>[31:0]</bitRange>
55223                        <access>read-write</access>
55224                    </field>
55225                </fields>
55226            </register>
55227            <register>
55228                <name>CH6_AL1_READ_ADDR</name>
55229                <addressOffset>0x00000194</addressOffset>
55230                <description>Alias for channel 6 READ_ADDR register</description>
55231                <resetMask>0x00000000</resetMask>
55232                <fields>
55233                    <field>
55234                        <name>CH6_AL1_READ_ADDR</name>
55235                        <bitRange>[31:0]</bitRange>
55236                        <access>read-write</access>
55237                    </field>
55238                </fields>
55239            </register>
55240            <register>
55241                <name>CH6_AL1_WRITE_ADDR</name>
55242                <addressOffset>0x00000198</addressOffset>
55243                <description>Alias for channel 6 WRITE_ADDR register</description>
55244                <resetMask>0x00000000</resetMask>
55245                <fields>
55246                    <field>
55247                        <name>CH6_AL1_WRITE_ADDR</name>
55248                        <bitRange>[31:0]</bitRange>
55249                        <access>read-write</access>
55250                    </field>
55251                </fields>
55252            </register>
55253            <register>
55254                <name>CH6_AL1_TRANS_COUNT_TRIG</name>
55255                <addressOffset>0x0000019c</addressOffset>
55256                <description>Alias for channel 6 TRANS_COUNT register
55257                    This is a trigger register (0xc). Writing a nonzero value will
55258                    reload the channel counter and start the channel.</description>
55259                <resetMask>0x00000000</resetMask>
55260                <fields>
55261                    <field>
55262                        <name>CH6_AL1_TRANS_COUNT_TRIG</name>
55263                        <bitRange>[31:0]</bitRange>
55264                        <access>read-write</access>
55265                    </field>
55266                </fields>
55267            </register>
55268            <register>
55269                <name>CH6_AL2_CTRL</name>
55270                <addressOffset>0x000001a0</addressOffset>
55271                <description>Alias for channel 6 CTRL register</description>
55272                <resetMask>0x00000000</resetMask>
55273                <fields>
55274                    <field>
55275                        <name>CH6_AL2_CTRL</name>
55276                        <bitRange>[31:0]</bitRange>
55277                        <access>read-write</access>
55278                    </field>
55279                </fields>
55280            </register>
55281            <register>
55282                <name>CH6_AL2_TRANS_COUNT</name>
55283                <addressOffset>0x000001a4</addressOffset>
55284                <description>Alias for channel 6 TRANS_COUNT register</description>
55285                <resetMask>0x00000000</resetMask>
55286                <fields>
55287                    <field>
55288                        <name>CH6_AL2_TRANS_COUNT</name>
55289                        <bitRange>[31:0]</bitRange>
55290                        <access>read-write</access>
55291                    </field>
55292                </fields>
55293            </register>
55294            <register>
55295                <name>CH6_AL2_READ_ADDR</name>
55296                <addressOffset>0x000001a8</addressOffset>
55297                <description>Alias for channel 6 READ_ADDR register</description>
55298                <resetMask>0x00000000</resetMask>
55299                <fields>
55300                    <field>
55301                        <name>CH6_AL2_READ_ADDR</name>
55302                        <bitRange>[31:0]</bitRange>
55303                        <access>read-write</access>
55304                    </field>
55305                </fields>
55306            </register>
55307            <register>
55308                <name>CH6_AL2_WRITE_ADDR_TRIG</name>
55309                <addressOffset>0x000001ac</addressOffset>
55310                <description>Alias for channel 6 WRITE_ADDR register
55311                    This is a trigger register (0xc). Writing a nonzero value will
55312                    reload the channel counter and start the channel.</description>
55313                <resetMask>0x00000000</resetMask>
55314                <fields>
55315                    <field>
55316                        <name>CH6_AL2_WRITE_ADDR_TRIG</name>
55317                        <bitRange>[31:0]</bitRange>
55318                        <access>read-write</access>
55319                    </field>
55320                </fields>
55321            </register>
55322            <register>
55323                <name>CH6_AL3_CTRL</name>
55324                <addressOffset>0x000001b0</addressOffset>
55325                <description>Alias for channel 6 CTRL register</description>
55326                <resetMask>0x00000000</resetMask>
55327                <fields>
55328                    <field>
55329                        <name>CH6_AL3_CTRL</name>
55330                        <bitRange>[31:0]</bitRange>
55331                        <access>read-write</access>
55332                    </field>
55333                </fields>
55334            </register>
55335            <register>
55336                <name>CH6_AL3_WRITE_ADDR</name>
55337                <addressOffset>0x000001b4</addressOffset>
55338                <description>Alias for channel 6 WRITE_ADDR register</description>
55339                <resetMask>0x00000000</resetMask>
55340                <fields>
55341                    <field>
55342                        <name>CH6_AL3_WRITE_ADDR</name>
55343                        <bitRange>[31:0]</bitRange>
55344                        <access>read-write</access>
55345                    </field>
55346                </fields>
55347            </register>
55348            <register>
55349                <name>CH6_AL3_TRANS_COUNT</name>
55350                <addressOffset>0x000001b8</addressOffset>
55351                <description>Alias for channel 6 TRANS_COUNT register</description>
55352                <resetMask>0x00000000</resetMask>
55353                <fields>
55354                    <field>
55355                        <name>CH6_AL3_TRANS_COUNT</name>
55356                        <bitRange>[31:0]</bitRange>
55357                        <access>read-write</access>
55358                    </field>
55359                </fields>
55360            </register>
55361            <register>
55362                <name>CH6_AL3_READ_ADDR_TRIG</name>
55363                <addressOffset>0x000001bc</addressOffset>
55364                <description>Alias for channel 6 READ_ADDR register
55365                    This is a trigger register (0xc). Writing a nonzero value will
55366                    reload the channel counter and start the channel.</description>
55367                <resetMask>0x00000000</resetMask>
55368                <fields>
55369                    <field>
55370                        <name>CH6_AL3_READ_ADDR_TRIG</name>
55371                        <bitRange>[31:0]</bitRange>
55372                        <access>read-write</access>
55373                    </field>
55374                </fields>
55375            </register>
55376            <register>
55377                <name>CH7_READ_ADDR</name>
55378                <addressOffset>0x000001c0</addressOffset>
55379                <description>DMA Channel 7 Read Address pointer</description>
55380                <resetValue>0x00000000</resetValue>
55381                <fields>
55382                    <field>
55383                        <name>CH7_READ_ADDR</name>
55384                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
55385                        <bitRange>[31:0]</bitRange>
55386                        <access>read-write</access>
55387                    </field>
55388                </fields>
55389            </register>
55390            <register>
55391                <name>CH7_WRITE_ADDR</name>
55392                <addressOffset>0x000001c4</addressOffset>
55393                <description>DMA Channel 7 Write Address pointer</description>
55394                <resetValue>0x00000000</resetValue>
55395                <fields>
55396                    <field>
55397                        <name>CH7_WRITE_ADDR</name>
55398                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
55399                        <bitRange>[31:0]</bitRange>
55400                        <access>read-write</access>
55401                    </field>
55402                </fields>
55403            </register>
55404            <register>
55405                <name>CH7_TRANS_COUNT</name>
55406                <addressOffset>0x000001c8</addressOffset>
55407                <description>DMA Channel 7 Transfer Count</description>
55408                <resetValue>0x00000000</resetValue>
55409                <fields>
55410                    <field>
55411                        <name>MODE</name>
55412                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
55413
55414                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
55415
55416                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
55417
55418                            All other values are reserved.</description>
55419                        <bitRange>[31:28]</bitRange>
55420                        <access>read-write</access>
55421                        <enumeratedValues>
55422                            <enumeratedValue>
55423                                <name>NORMAL</name>
55424                                <value>0</value>
55425                            </enumeratedValue>
55426                            <enumeratedValue>
55427                                <name>TRIGGER_SELF</name>
55428                                <value>1</value>
55429                            </enumeratedValue>
55430                            <enumeratedValue>
55431                                <name>ENDLESS</name>
55432                                <value>15</value>
55433                            </enumeratedValue>
55434                        </enumeratedValues>
55435                    </field>
55436                    <field>
55437                        <name>COUNT</name>
55438                        <description>28-bit transfer count (256 million transfers maximum).
55439
55440                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
55441
55442                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
55443
55444                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
55445
55446                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
55447                        <bitRange>[27:0]</bitRange>
55448                        <access>read-write</access>
55449                    </field>
55450                </fields>
55451            </register>
55452            <register>
55453                <name>CH7_CTRL_TRIG</name>
55454                <addressOffset>0x000001cc</addressOffset>
55455                <description>DMA Channel 7 Control and Status</description>
55456                <resetValue>0x00000000</resetValue>
55457                <fields>
55458                    <field>
55459                        <name>AHB_ERROR</name>
55460                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
55461                        <bitRange>[31:31]</bitRange>
55462                        <access>read-only</access>
55463                    </field>
55464                    <field>
55465                        <name>READ_ERROR</name>
55466                        <description>If 1, the channel received a read bus error. Write one to clear.
55467                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
55468                        <bitRange>[30:30]</bitRange>
55469                        <access>read-write</access>
55470                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
55471                    </field>
55472                    <field>
55473                        <name>WRITE_ERROR</name>
55474                        <description>If 1, the channel received a write bus error. Write one to clear.
55475                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
55476                        <bitRange>[29:29]</bitRange>
55477                        <access>read-write</access>
55478                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
55479                    </field>
55480                    <field>
55481                        <name>BUSY</name>
55482                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
55483
55484                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
55485                        <bitRange>[26:26]</bitRange>
55486                        <access>read-only</access>
55487                    </field>
55488                    <field>
55489                        <name>SNIFF_EN</name>
55490                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
55491
55492                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
55493                        <bitRange>[25:25]</bitRange>
55494                        <access>read-write</access>
55495                    </field>
55496                    <field>
55497                        <name>BSWAP</name>
55498                        <description>Apply byte-swap transformation to DMA data.
55499                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
55500                        <bitRange>[24:24]</bitRange>
55501                        <access>read-write</access>
55502                    </field>
55503                    <field>
55504                        <name>IRQ_QUIET</name>
55505                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
55506
55507                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
55508                        <bitRange>[23:23]</bitRange>
55509                        <access>read-write</access>
55510                    </field>
55511                    <field>
55512                        <name>TREQ_SEL</name>
55513                        <description>Select a Transfer Request signal.
55514                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
55515                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
55516                        <bitRange>[22:17]</bitRange>
55517                        <access>read-write</access>
55518                        <enumeratedValues>
55519                            <enumeratedValue>
55520                                <name>PIO0_TX0</name>
55521                                <value>0</value>
55522                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
55523                            </enumeratedValue>
55524                            <enumeratedValue>
55525                                <name>PIO0_TX1</name>
55526                                <value>1</value>
55527                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
55528                            </enumeratedValue>
55529                            <enumeratedValue>
55530                                <name>PIO0_TX2</name>
55531                                <value>2</value>
55532                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
55533                            </enumeratedValue>
55534                            <enumeratedValue>
55535                                <name>PIO0_TX3</name>
55536                                <value>3</value>
55537                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
55538                            </enumeratedValue>
55539                            <enumeratedValue>
55540                                <name>PIO0_RX0</name>
55541                                <value>4</value>
55542                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
55543                            </enumeratedValue>
55544                            <enumeratedValue>
55545                                <name>PIO0_RX1</name>
55546                                <value>5</value>
55547                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
55548                            </enumeratedValue>
55549                            <enumeratedValue>
55550                                <name>PIO0_RX2</name>
55551                                <value>6</value>
55552                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
55553                            </enumeratedValue>
55554                            <enumeratedValue>
55555                                <name>PIO0_RX3</name>
55556                                <value>7</value>
55557                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
55558                            </enumeratedValue>
55559                            <enumeratedValue>
55560                                <name>PIO1_TX0</name>
55561                                <value>8</value>
55562                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
55563                            </enumeratedValue>
55564                            <enumeratedValue>
55565                                <name>PIO1_TX1</name>
55566                                <value>9</value>
55567                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
55568                            </enumeratedValue>
55569                            <enumeratedValue>
55570                                <name>PIO1_TX2</name>
55571                                <value>10</value>
55572                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
55573                            </enumeratedValue>
55574                            <enumeratedValue>
55575                                <name>PIO1_TX3</name>
55576                                <value>11</value>
55577                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
55578                            </enumeratedValue>
55579                            <enumeratedValue>
55580                                <name>PIO1_RX0</name>
55581                                <value>12</value>
55582                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
55583                            </enumeratedValue>
55584                            <enumeratedValue>
55585                                <name>PIO1_RX1</name>
55586                                <value>13</value>
55587                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
55588                            </enumeratedValue>
55589                            <enumeratedValue>
55590                                <name>PIO1_RX2</name>
55591                                <value>14</value>
55592                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
55593                            </enumeratedValue>
55594                            <enumeratedValue>
55595                                <name>PIO1_RX3</name>
55596                                <value>15</value>
55597                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
55598                            </enumeratedValue>
55599                            <enumeratedValue>
55600                                <name>PIO2_TX0</name>
55601                                <value>16</value>
55602                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
55603                            </enumeratedValue>
55604                            <enumeratedValue>
55605                                <name>PIO2_TX1</name>
55606                                <value>17</value>
55607                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
55608                            </enumeratedValue>
55609                            <enumeratedValue>
55610                                <name>PIO2_TX2</name>
55611                                <value>18</value>
55612                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
55613                            </enumeratedValue>
55614                            <enumeratedValue>
55615                                <name>PIO2_TX3</name>
55616                                <value>19</value>
55617                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
55618                            </enumeratedValue>
55619                            <enumeratedValue>
55620                                <name>PIO2_RX0</name>
55621                                <value>20</value>
55622                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
55623                            </enumeratedValue>
55624                            <enumeratedValue>
55625                                <name>PIO2_RX1</name>
55626                                <value>21</value>
55627                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
55628                            </enumeratedValue>
55629                            <enumeratedValue>
55630                                <name>PIO2_RX2</name>
55631                                <value>22</value>
55632                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
55633                            </enumeratedValue>
55634                            <enumeratedValue>
55635                                <name>PIO2_RX3</name>
55636                                <value>23</value>
55637                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
55638                            </enumeratedValue>
55639                            <enumeratedValue>
55640                                <name>SPI0_TX</name>
55641                                <value>24</value>
55642                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
55643                            </enumeratedValue>
55644                            <enumeratedValue>
55645                                <name>SPI0_RX</name>
55646                                <value>25</value>
55647                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
55648                            </enumeratedValue>
55649                            <enumeratedValue>
55650                                <name>SPI1_TX</name>
55651                                <value>26</value>
55652                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
55653                            </enumeratedValue>
55654                            <enumeratedValue>
55655                                <name>SPI1_RX</name>
55656                                <value>27</value>
55657                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
55658                            </enumeratedValue>
55659                            <enumeratedValue>
55660                                <name>UART0_TX</name>
55661                                <value>28</value>
55662                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
55663                            </enumeratedValue>
55664                            <enumeratedValue>
55665                                <name>UART0_RX</name>
55666                                <value>29</value>
55667                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
55668                            </enumeratedValue>
55669                            <enumeratedValue>
55670                                <name>UART1_TX</name>
55671                                <value>30</value>
55672                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
55673                            </enumeratedValue>
55674                            <enumeratedValue>
55675                                <name>UART1_RX</name>
55676                                <value>31</value>
55677                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
55678                            </enumeratedValue>
55679                            <enumeratedValue>
55680                                <name>PWM_WRAP0</name>
55681                                <value>32</value>
55682                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
55683                            </enumeratedValue>
55684                            <enumeratedValue>
55685                                <name>PWM_WRAP1</name>
55686                                <value>33</value>
55687                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
55688                            </enumeratedValue>
55689                            <enumeratedValue>
55690                                <name>PWM_WRAP2</name>
55691                                <value>34</value>
55692                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
55693                            </enumeratedValue>
55694                            <enumeratedValue>
55695                                <name>PWM_WRAP3</name>
55696                                <value>35</value>
55697                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
55698                            </enumeratedValue>
55699                            <enumeratedValue>
55700                                <name>PWM_WRAP4</name>
55701                                <value>36</value>
55702                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
55703                            </enumeratedValue>
55704                            <enumeratedValue>
55705                                <name>PWM_WRAP5</name>
55706                                <value>37</value>
55707                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
55708                            </enumeratedValue>
55709                            <enumeratedValue>
55710                                <name>PWM_WRAP6</name>
55711                                <value>38</value>
55712                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
55713                            </enumeratedValue>
55714                            <enumeratedValue>
55715                                <name>PWM_WRAP7</name>
55716                                <value>39</value>
55717                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
55718                            </enumeratedValue>
55719                            <enumeratedValue>
55720                                <name>PWM_WRAP8</name>
55721                                <value>40</value>
55722                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
55723                            </enumeratedValue>
55724                            <enumeratedValue>
55725                                <name>PWM_WRAP9</name>
55726                                <value>41</value>
55727                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
55728                            </enumeratedValue>
55729                            <enumeratedValue>
55730                                <name>PWM_WRAP10</name>
55731                                <value>42</value>
55732                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
55733                            </enumeratedValue>
55734                            <enumeratedValue>
55735                                <name>PWM_WRAP11</name>
55736                                <value>43</value>
55737                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
55738                            </enumeratedValue>
55739                            <enumeratedValue>
55740                                <name>I2C0_TX</name>
55741                                <value>44</value>
55742                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
55743                            </enumeratedValue>
55744                            <enumeratedValue>
55745                                <name>I2C0_RX</name>
55746                                <value>45</value>
55747                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
55748                            </enumeratedValue>
55749                            <enumeratedValue>
55750                                <name>I2C1_TX</name>
55751                                <value>46</value>
55752                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
55753                            </enumeratedValue>
55754                            <enumeratedValue>
55755                                <name>I2C1_RX</name>
55756                                <value>47</value>
55757                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
55758                            </enumeratedValue>
55759                            <enumeratedValue>
55760                                <name>ADC</name>
55761                                <value>48</value>
55762                                <description>Select the ADC as TREQ</description>
55763                            </enumeratedValue>
55764                            <enumeratedValue>
55765                                <name>XIP_STREAM</name>
55766                                <value>49</value>
55767                                <description>Select the XIP Streaming FIFO as TREQ</description>
55768                            </enumeratedValue>
55769                            <enumeratedValue>
55770                                <name>XIP_QMITX</name>
55771                                <value>50</value>
55772                                <description>Select XIP_QMITX as TREQ</description>
55773                            </enumeratedValue>
55774                            <enumeratedValue>
55775                                <name>XIP_QMIRX</name>
55776                                <value>51</value>
55777                                <description>Select XIP_QMIRX as TREQ</description>
55778                            </enumeratedValue>
55779                            <enumeratedValue>
55780                                <name>HSTX</name>
55781                                <value>52</value>
55782                                <description>Select HSTX as TREQ</description>
55783                            </enumeratedValue>
55784                            <enumeratedValue>
55785                                <name>CORESIGHT</name>
55786                                <value>53</value>
55787                                <description>Select CORESIGHT as TREQ</description>
55788                            </enumeratedValue>
55789                            <enumeratedValue>
55790                                <name>SHA256</name>
55791                                <value>54</value>
55792                                <description>Select SHA256 as TREQ</description>
55793                            </enumeratedValue>
55794                            <enumeratedValue>
55795                                <name>TIMER0</name>
55796                                <value>59</value>
55797                                <description>Select Timer 0 as TREQ</description>
55798                            </enumeratedValue>
55799                            <enumeratedValue>
55800                                <name>TIMER1</name>
55801                                <value>60</value>
55802                                <description>Select Timer 1 as TREQ</description>
55803                            </enumeratedValue>
55804                            <enumeratedValue>
55805                                <name>TIMER2</name>
55806                                <value>61</value>
55807                                <description>Select Timer 2 as TREQ (Optional)</description>
55808                            </enumeratedValue>
55809                            <enumeratedValue>
55810                                <name>TIMER3</name>
55811                                <value>62</value>
55812                                <description>Select Timer 3 as TREQ (Optional)</description>
55813                            </enumeratedValue>
55814                            <enumeratedValue>
55815                                <name>PERMANENT</name>
55816                                <value>63</value>
55817                                <description>Permanent request, for unpaced transfers.</description>
55818                            </enumeratedValue>
55819                        </enumeratedValues>
55820                    </field>
55821                    <field>
55822                        <name>CHAIN_TO</name>
55823                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
55824
55825                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
55826                        <bitRange>[16:13]</bitRange>
55827                        <access>read-write</access>
55828                    </field>
55829                    <field>
55830                        <name>RING_SEL</name>
55831                        <description>Select whether RING_SIZE applies to read or write addresses.
55832                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
55833                        <bitRange>[12:12]</bitRange>
55834                        <access>read-write</access>
55835                    </field>
55836                    <field>
55837                        <name>RING_SIZE</name>
55838                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
55839
55840                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
55841                        <bitRange>[11:8]</bitRange>
55842                        <access>read-write</access>
55843                        <enumeratedValues>
55844                            <enumeratedValue>
55845                                <name>RING_NONE</name>
55846                                <value>0</value>
55847                            </enumeratedValue>
55848                        </enumeratedValues>
55849                    </field>
55850                    <field>
55851                        <name>INCR_WRITE_REV</name>
55852                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
55853
55854                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
55855                        <bitRange>[7:7]</bitRange>
55856                        <access>read-write</access>
55857                    </field>
55858                    <field>
55859                        <name>INCR_WRITE</name>
55860                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
55861
55862                            Generally this should be disabled for memory-to-peripheral transfers.</description>
55863                        <bitRange>[6:6]</bitRange>
55864                        <access>read-write</access>
55865                    </field>
55866                    <field>
55867                        <name>INCR_READ_REV</name>
55868                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
55869
55870                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
55871                        <bitRange>[5:5]</bitRange>
55872                        <access>read-write</access>
55873                    </field>
55874                    <field>
55875                        <name>INCR_READ</name>
55876                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
55877
55878                            Generally this should be disabled for peripheral-to-memory transfers.</description>
55879                        <bitRange>[4:4]</bitRange>
55880                        <access>read-write</access>
55881                    </field>
55882                    <field>
55883                        <name>DATA_SIZE</name>
55884                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
55885                        <bitRange>[3:2]</bitRange>
55886                        <access>read-write</access>
55887                        <enumeratedValues>
55888                            <enumeratedValue>
55889                                <name>SIZE_BYTE</name>
55890                                <value>0</value>
55891                            </enumeratedValue>
55892                            <enumeratedValue>
55893                                <name>SIZE_HALFWORD</name>
55894                                <value>1</value>
55895                            </enumeratedValue>
55896                            <enumeratedValue>
55897                                <name>SIZE_WORD</name>
55898                                <value>2</value>
55899                            </enumeratedValue>
55900                        </enumeratedValues>
55901                    </field>
55902                    <field>
55903                        <name>HIGH_PRIORITY</name>
55904                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
55905
55906                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
55907                        <bitRange>[1:1]</bitRange>
55908                        <access>read-write</access>
55909                    </field>
55910                    <field>
55911                        <name>EN</name>
55912                        <description>DMA Channel Enable.
55913                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
55914                        <bitRange>[0:0]</bitRange>
55915                        <access>read-write</access>
55916                    </field>
55917                </fields>
55918            </register>
55919            <register>
55920                <name>CH7_AL1_CTRL</name>
55921                <addressOffset>0x000001d0</addressOffset>
55922                <description>Alias for channel 7 CTRL register</description>
55923                <resetMask>0x00000000</resetMask>
55924                <fields>
55925                    <field>
55926                        <name>CH7_AL1_CTRL</name>
55927                        <bitRange>[31:0]</bitRange>
55928                        <access>read-write</access>
55929                    </field>
55930                </fields>
55931            </register>
55932            <register>
55933                <name>CH7_AL1_READ_ADDR</name>
55934                <addressOffset>0x000001d4</addressOffset>
55935                <description>Alias for channel 7 READ_ADDR register</description>
55936                <resetMask>0x00000000</resetMask>
55937                <fields>
55938                    <field>
55939                        <name>CH7_AL1_READ_ADDR</name>
55940                        <bitRange>[31:0]</bitRange>
55941                        <access>read-write</access>
55942                    </field>
55943                </fields>
55944            </register>
55945            <register>
55946                <name>CH7_AL1_WRITE_ADDR</name>
55947                <addressOffset>0x000001d8</addressOffset>
55948                <description>Alias for channel 7 WRITE_ADDR register</description>
55949                <resetMask>0x00000000</resetMask>
55950                <fields>
55951                    <field>
55952                        <name>CH7_AL1_WRITE_ADDR</name>
55953                        <bitRange>[31:0]</bitRange>
55954                        <access>read-write</access>
55955                    </field>
55956                </fields>
55957            </register>
55958            <register>
55959                <name>CH7_AL1_TRANS_COUNT_TRIG</name>
55960                <addressOffset>0x000001dc</addressOffset>
55961                <description>Alias for channel 7 TRANS_COUNT register
55962                    This is a trigger register (0xc). Writing a nonzero value will
55963                    reload the channel counter and start the channel.</description>
55964                <resetMask>0x00000000</resetMask>
55965                <fields>
55966                    <field>
55967                        <name>CH7_AL1_TRANS_COUNT_TRIG</name>
55968                        <bitRange>[31:0]</bitRange>
55969                        <access>read-write</access>
55970                    </field>
55971                </fields>
55972            </register>
55973            <register>
55974                <name>CH7_AL2_CTRL</name>
55975                <addressOffset>0x000001e0</addressOffset>
55976                <description>Alias for channel 7 CTRL register</description>
55977                <resetMask>0x00000000</resetMask>
55978                <fields>
55979                    <field>
55980                        <name>CH7_AL2_CTRL</name>
55981                        <bitRange>[31:0]</bitRange>
55982                        <access>read-write</access>
55983                    </field>
55984                </fields>
55985            </register>
55986            <register>
55987                <name>CH7_AL2_TRANS_COUNT</name>
55988                <addressOffset>0x000001e4</addressOffset>
55989                <description>Alias for channel 7 TRANS_COUNT register</description>
55990                <resetMask>0x00000000</resetMask>
55991                <fields>
55992                    <field>
55993                        <name>CH7_AL2_TRANS_COUNT</name>
55994                        <bitRange>[31:0]</bitRange>
55995                        <access>read-write</access>
55996                    </field>
55997                </fields>
55998            </register>
55999            <register>
56000                <name>CH7_AL2_READ_ADDR</name>
56001                <addressOffset>0x000001e8</addressOffset>
56002                <description>Alias for channel 7 READ_ADDR register</description>
56003                <resetMask>0x00000000</resetMask>
56004                <fields>
56005                    <field>
56006                        <name>CH7_AL2_READ_ADDR</name>
56007                        <bitRange>[31:0]</bitRange>
56008                        <access>read-write</access>
56009                    </field>
56010                </fields>
56011            </register>
56012            <register>
56013                <name>CH7_AL2_WRITE_ADDR_TRIG</name>
56014                <addressOffset>0x000001ec</addressOffset>
56015                <description>Alias for channel 7 WRITE_ADDR register
56016                    This is a trigger register (0xc). Writing a nonzero value will
56017                    reload the channel counter and start the channel.</description>
56018                <resetMask>0x00000000</resetMask>
56019                <fields>
56020                    <field>
56021                        <name>CH7_AL2_WRITE_ADDR_TRIG</name>
56022                        <bitRange>[31:0]</bitRange>
56023                        <access>read-write</access>
56024                    </field>
56025                </fields>
56026            </register>
56027            <register>
56028                <name>CH7_AL3_CTRL</name>
56029                <addressOffset>0x000001f0</addressOffset>
56030                <description>Alias for channel 7 CTRL register</description>
56031                <resetMask>0x00000000</resetMask>
56032                <fields>
56033                    <field>
56034                        <name>CH7_AL3_CTRL</name>
56035                        <bitRange>[31:0]</bitRange>
56036                        <access>read-write</access>
56037                    </field>
56038                </fields>
56039            </register>
56040            <register>
56041                <name>CH7_AL3_WRITE_ADDR</name>
56042                <addressOffset>0x000001f4</addressOffset>
56043                <description>Alias for channel 7 WRITE_ADDR register</description>
56044                <resetMask>0x00000000</resetMask>
56045                <fields>
56046                    <field>
56047                        <name>CH7_AL3_WRITE_ADDR</name>
56048                        <bitRange>[31:0]</bitRange>
56049                        <access>read-write</access>
56050                    </field>
56051                </fields>
56052            </register>
56053            <register>
56054                <name>CH7_AL3_TRANS_COUNT</name>
56055                <addressOffset>0x000001f8</addressOffset>
56056                <description>Alias for channel 7 TRANS_COUNT register</description>
56057                <resetMask>0x00000000</resetMask>
56058                <fields>
56059                    <field>
56060                        <name>CH7_AL3_TRANS_COUNT</name>
56061                        <bitRange>[31:0]</bitRange>
56062                        <access>read-write</access>
56063                    </field>
56064                </fields>
56065            </register>
56066            <register>
56067                <name>CH7_AL3_READ_ADDR_TRIG</name>
56068                <addressOffset>0x000001fc</addressOffset>
56069                <description>Alias for channel 7 READ_ADDR register
56070                    This is a trigger register (0xc). Writing a nonzero value will
56071                    reload the channel counter and start the channel.</description>
56072                <resetMask>0x00000000</resetMask>
56073                <fields>
56074                    <field>
56075                        <name>CH7_AL3_READ_ADDR_TRIG</name>
56076                        <bitRange>[31:0]</bitRange>
56077                        <access>read-write</access>
56078                    </field>
56079                </fields>
56080            </register>
56081            <register>
56082                <name>CH8_READ_ADDR</name>
56083                <addressOffset>0x00000200</addressOffset>
56084                <description>DMA Channel 8 Read Address pointer</description>
56085                <resetValue>0x00000000</resetValue>
56086                <fields>
56087                    <field>
56088                        <name>CH8_READ_ADDR</name>
56089                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
56090                        <bitRange>[31:0]</bitRange>
56091                        <access>read-write</access>
56092                    </field>
56093                </fields>
56094            </register>
56095            <register>
56096                <name>CH8_WRITE_ADDR</name>
56097                <addressOffset>0x00000204</addressOffset>
56098                <description>DMA Channel 8 Write Address pointer</description>
56099                <resetValue>0x00000000</resetValue>
56100                <fields>
56101                    <field>
56102                        <name>CH8_WRITE_ADDR</name>
56103                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
56104                        <bitRange>[31:0]</bitRange>
56105                        <access>read-write</access>
56106                    </field>
56107                </fields>
56108            </register>
56109            <register>
56110                <name>CH8_TRANS_COUNT</name>
56111                <addressOffset>0x00000208</addressOffset>
56112                <description>DMA Channel 8 Transfer Count</description>
56113                <resetValue>0x00000000</resetValue>
56114                <fields>
56115                    <field>
56116                        <name>MODE</name>
56117                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
56118
56119                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
56120
56121                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
56122
56123                            All other values are reserved.</description>
56124                        <bitRange>[31:28]</bitRange>
56125                        <access>read-write</access>
56126                        <enumeratedValues>
56127                            <enumeratedValue>
56128                                <name>NORMAL</name>
56129                                <value>0</value>
56130                            </enumeratedValue>
56131                            <enumeratedValue>
56132                                <name>TRIGGER_SELF</name>
56133                                <value>1</value>
56134                            </enumeratedValue>
56135                            <enumeratedValue>
56136                                <name>ENDLESS</name>
56137                                <value>15</value>
56138                            </enumeratedValue>
56139                        </enumeratedValues>
56140                    </field>
56141                    <field>
56142                        <name>COUNT</name>
56143                        <description>28-bit transfer count (256 million transfers maximum).
56144
56145                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
56146
56147                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
56148
56149                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
56150
56151                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
56152                        <bitRange>[27:0]</bitRange>
56153                        <access>read-write</access>
56154                    </field>
56155                </fields>
56156            </register>
56157            <register>
56158                <name>CH8_CTRL_TRIG</name>
56159                <addressOffset>0x0000020c</addressOffset>
56160                <description>DMA Channel 8 Control and Status</description>
56161                <resetValue>0x00000000</resetValue>
56162                <fields>
56163                    <field>
56164                        <name>AHB_ERROR</name>
56165                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
56166                        <bitRange>[31:31]</bitRange>
56167                        <access>read-only</access>
56168                    </field>
56169                    <field>
56170                        <name>READ_ERROR</name>
56171                        <description>If 1, the channel received a read bus error. Write one to clear.
56172                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
56173                        <bitRange>[30:30]</bitRange>
56174                        <access>read-write</access>
56175                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
56176                    </field>
56177                    <field>
56178                        <name>WRITE_ERROR</name>
56179                        <description>If 1, the channel received a write bus error. Write one to clear.
56180                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
56181                        <bitRange>[29:29]</bitRange>
56182                        <access>read-write</access>
56183                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
56184                    </field>
56185                    <field>
56186                        <name>BUSY</name>
56187                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
56188
56189                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
56190                        <bitRange>[26:26]</bitRange>
56191                        <access>read-only</access>
56192                    </field>
56193                    <field>
56194                        <name>SNIFF_EN</name>
56195                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
56196
56197                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
56198                        <bitRange>[25:25]</bitRange>
56199                        <access>read-write</access>
56200                    </field>
56201                    <field>
56202                        <name>BSWAP</name>
56203                        <description>Apply byte-swap transformation to DMA data.
56204                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
56205                        <bitRange>[24:24]</bitRange>
56206                        <access>read-write</access>
56207                    </field>
56208                    <field>
56209                        <name>IRQ_QUIET</name>
56210                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
56211
56212                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
56213                        <bitRange>[23:23]</bitRange>
56214                        <access>read-write</access>
56215                    </field>
56216                    <field>
56217                        <name>TREQ_SEL</name>
56218                        <description>Select a Transfer Request signal.
56219                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
56220                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
56221                        <bitRange>[22:17]</bitRange>
56222                        <access>read-write</access>
56223                        <enumeratedValues>
56224                            <enumeratedValue>
56225                                <name>PIO0_TX0</name>
56226                                <value>0</value>
56227                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
56228                            </enumeratedValue>
56229                            <enumeratedValue>
56230                                <name>PIO0_TX1</name>
56231                                <value>1</value>
56232                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
56233                            </enumeratedValue>
56234                            <enumeratedValue>
56235                                <name>PIO0_TX2</name>
56236                                <value>2</value>
56237                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
56238                            </enumeratedValue>
56239                            <enumeratedValue>
56240                                <name>PIO0_TX3</name>
56241                                <value>3</value>
56242                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
56243                            </enumeratedValue>
56244                            <enumeratedValue>
56245                                <name>PIO0_RX0</name>
56246                                <value>4</value>
56247                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
56248                            </enumeratedValue>
56249                            <enumeratedValue>
56250                                <name>PIO0_RX1</name>
56251                                <value>5</value>
56252                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
56253                            </enumeratedValue>
56254                            <enumeratedValue>
56255                                <name>PIO0_RX2</name>
56256                                <value>6</value>
56257                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
56258                            </enumeratedValue>
56259                            <enumeratedValue>
56260                                <name>PIO0_RX3</name>
56261                                <value>7</value>
56262                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
56263                            </enumeratedValue>
56264                            <enumeratedValue>
56265                                <name>PIO1_TX0</name>
56266                                <value>8</value>
56267                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
56268                            </enumeratedValue>
56269                            <enumeratedValue>
56270                                <name>PIO1_TX1</name>
56271                                <value>9</value>
56272                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
56273                            </enumeratedValue>
56274                            <enumeratedValue>
56275                                <name>PIO1_TX2</name>
56276                                <value>10</value>
56277                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
56278                            </enumeratedValue>
56279                            <enumeratedValue>
56280                                <name>PIO1_TX3</name>
56281                                <value>11</value>
56282                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
56283                            </enumeratedValue>
56284                            <enumeratedValue>
56285                                <name>PIO1_RX0</name>
56286                                <value>12</value>
56287                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
56288                            </enumeratedValue>
56289                            <enumeratedValue>
56290                                <name>PIO1_RX1</name>
56291                                <value>13</value>
56292                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
56293                            </enumeratedValue>
56294                            <enumeratedValue>
56295                                <name>PIO1_RX2</name>
56296                                <value>14</value>
56297                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
56298                            </enumeratedValue>
56299                            <enumeratedValue>
56300                                <name>PIO1_RX3</name>
56301                                <value>15</value>
56302                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
56303                            </enumeratedValue>
56304                            <enumeratedValue>
56305                                <name>PIO2_TX0</name>
56306                                <value>16</value>
56307                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
56308                            </enumeratedValue>
56309                            <enumeratedValue>
56310                                <name>PIO2_TX1</name>
56311                                <value>17</value>
56312                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
56313                            </enumeratedValue>
56314                            <enumeratedValue>
56315                                <name>PIO2_TX2</name>
56316                                <value>18</value>
56317                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
56318                            </enumeratedValue>
56319                            <enumeratedValue>
56320                                <name>PIO2_TX3</name>
56321                                <value>19</value>
56322                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
56323                            </enumeratedValue>
56324                            <enumeratedValue>
56325                                <name>PIO2_RX0</name>
56326                                <value>20</value>
56327                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
56328                            </enumeratedValue>
56329                            <enumeratedValue>
56330                                <name>PIO2_RX1</name>
56331                                <value>21</value>
56332                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
56333                            </enumeratedValue>
56334                            <enumeratedValue>
56335                                <name>PIO2_RX2</name>
56336                                <value>22</value>
56337                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
56338                            </enumeratedValue>
56339                            <enumeratedValue>
56340                                <name>PIO2_RX3</name>
56341                                <value>23</value>
56342                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
56343                            </enumeratedValue>
56344                            <enumeratedValue>
56345                                <name>SPI0_TX</name>
56346                                <value>24</value>
56347                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
56348                            </enumeratedValue>
56349                            <enumeratedValue>
56350                                <name>SPI0_RX</name>
56351                                <value>25</value>
56352                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
56353                            </enumeratedValue>
56354                            <enumeratedValue>
56355                                <name>SPI1_TX</name>
56356                                <value>26</value>
56357                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
56358                            </enumeratedValue>
56359                            <enumeratedValue>
56360                                <name>SPI1_RX</name>
56361                                <value>27</value>
56362                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
56363                            </enumeratedValue>
56364                            <enumeratedValue>
56365                                <name>UART0_TX</name>
56366                                <value>28</value>
56367                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
56368                            </enumeratedValue>
56369                            <enumeratedValue>
56370                                <name>UART0_RX</name>
56371                                <value>29</value>
56372                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
56373                            </enumeratedValue>
56374                            <enumeratedValue>
56375                                <name>UART1_TX</name>
56376                                <value>30</value>
56377                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
56378                            </enumeratedValue>
56379                            <enumeratedValue>
56380                                <name>UART1_RX</name>
56381                                <value>31</value>
56382                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
56383                            </enumeratedValue>
56384                            <enumeratedValue>
56385                                <name>PWM_WRAP0</name>
56386                                <value>32</value>
56387                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
56388                            </enumeratedValue>
56389                            <enumeratedValue>
56390                                <name>PWM_WRAP1</name>
56391                                <value>33</value>
56392                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
56393                            </enumeratedValue>
56394                            <enumeratedValue>
56395                                <name>PWM_WRAP2</name>
56396                                <value>34</value>
56397                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
56398                            </enumeratedValue>
56399                            <enumeratedValue>
56400                                <name>PWM_WRAP3</name>
56401                                <value>35</value>
56402                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
56403                            </enumeratedValue>
56404                            <enumeratedValue>
56405                                <name>PWM_WRAP4</name>
56406                                <value>36</value>
56407                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
56408                            </enumeratedValue>
56409                            <enumeratedValue>
56410                                <name>PWM_WRAP5</name>
56411                                <value>37</value>
56412                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
56413                            </enumeratedValue>
56414                            <enumeratedValue>
56415                                <name>PWM_WRAP6</name>
56416                                <value>38</value>
56417                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
56418                            </enumeratedValue>
56419                            <enumeratedValue>
56420                                <name>PWM_WRAP7</name>
56421                                <value>39</value>
56422                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
56423                            </enumeratedValue>
56424                            <enumeratedValue>
56425                                <name>PWM_WRAP8</name>
56426                                <value>40</value>
56427                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
56428                            </enumeratedValue>
56429                            <enumeratedValue>
56430                                <name>PWM_WRAP9</name>
56431                                <value>41</value>
56432                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
56433                            </enumeratedValue>
56434                            <enumeratedValue>
56435                                <name>PWM_WRAP10</name>
56436                                <value>42</value>
56437                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
56438                            </enumeratedValue>
56439                            <enumeratedValue>
56440                                <name>PWM_WRAP11</name>
56441                                <value>43</value>
56442                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
56443                            </enumeratedValue>
56444                            <enumeratedValue>
56445                                <name>I2C0_TX</name>
56446                                <value>44</value>
56447                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
56448                            </enumeratedValue>
56449                            <enumeratedValue>
56450                                <name>I2C0_RX</name>
56451                                <value>45</value>
56452                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
56453                            </enumeratedValue>
56454                            <enumeratedValue>
56455                                <name>I2C1_TX</name>
56456                                <value>46</value>
56457                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
56458                            </enumeratedValue>
56459                            <enumeratedValue>
56460                                <name>I2C1_RX</name>
56461                                <value>47</value>
56462                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
56463                            </enumeratedValue>
56464                            <enumeratedValue>
56465                                <name>ADC</name>
56466                                <value>48</value>
56467                                <description>Select the ADC as TREQ</description>
56468                            </enumeratedValue>
56469                            <enumeratedValue>
56470                                <name>XIP_STREAM</name>
56471                                <value>49</value>
56472                                <description>Select the XIP Streaming FIFO as TREQ</description>
56473                            </enumeratedValue>
56474                            <enumeratedValue>
56475                                <name>XIP_QMITX</name>
56476                                <value>50</value>
56477                                <description>Select XIP_QMITX as TREQ</description>
56478                            </enumeratedValue>
56479                            <enumeratedValue>
56480                                <name>XIP_QMIRX</name>
56481                                <value>51</value>
56482                                <description>Select XIP_QMIRX as TREQ</description>
56483                            </enumeratedValue>
56484                            <enumeratedValue>
56485                                <name>HSTX</name>
56486                                <value>52</value>
56487                                <description>Select HSTX as TREQ</description>
56488                            </enumeratedValue>
56489                            <enumeratedValue>
56490                                <name>CORESIGHT</name>
56491                                <value>53</value>
56492                                <description>Select CORESIGHT as TREQ</description>
56493                            </enumeratedValue>
56494                            <enumeratedValue>
56495                                <name>SHA256</name>
56496                                <value>54</value>
56497                                <description>Select SHA256 as TREQ</description>
56498                            </enumeratedValue>
56499                            <enumeratedValue>
56500                                <name>TIMER0</name>
56501                                <value>59</value>
56502                                <description>Select Timer 0 as TREQ</description>
56503                            </enumeratedValue>
56504                            <enumeratedValue>
56505                                <name>TIMER1</name>
56506                                <value>60</value>
56507                                <description>Select Timer 1 as TREQ</description>
56508                            </enumeratedValue>
56509                            <enumeratedValue>
56510                                <name>TIMER2</name>
56511                                <value>61</value>
56512                                <description>Select Timer 2 as TREQ (Optional)</description>
56513                            </enumeratedValue>
56514                            <enumeratedValue>
56515                                <name>TIMER3</name>
56516                                <value>62</value>
56517                                <description>Select Timer 3 as TREQ (Optional)</description>
56518                            </enumeratedValue>
56519                            <enumeratedValue>
56520                                <name>PERMANENT</name>
56521                                <value>63</value>
56522                                <description>Permanent request, for unpaced transfers.</description>
56523                            </enumeratedValue>
56524                        </enumeratedValues>
56525                    </field>
56526                    <field>
56527                        <name>CHAIN_TO</name>
56528                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
56529
56530                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
56531                        <bitRange>[16:13]</bitRange>
56532                        <access>read-write</access>
56533                    </field>
56534                    <field>
56535                        <name>RING_SEL</name>
56536                        <description>Select whether RING_SIZE applies to read or write addresses.
56537                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
56538                        <bitRange>[12:12]</bitRange>
56539                        <access>read-write</access>
56540                    </field>
56541                    <field>
56542                        <name>RING_SIZE</name>
56543                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
56544
56545                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
56546                        <bitRange>[11:8]</bitRange>
56547                        <access>read-write</access>
56548                        <enumeratedValues>
56549                            <enumeratedValue>
56550                                <name>RING_NONE</name>
56551                                <value>0</value>
56552                            </enumeratedValue>
56553                        </enumeratedValues>
56554                    </field>
56555                    <field>
56556                        <name>INCR_WRITE_REV</name>
56557                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
56558
56559                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
56560                        <bitRange>[7:7]</bitRange>
56561                        <access>read-write</access>
56562                    </field>
56563                    <field>
56564                        <name>INCR_WRITE</name>
56565                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
56566
56567                            Generally this should be disabled for memory-to-peripheral transfers.</description>
56568                        <bitRange>[6:6]</bitRange>
56569                        <access>read-write</access>
56570                    </field>
56571                    <field>
56572                        <name>INCR_READ_REV</name>
56573                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
56574
56575                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
56576                        <bitRange>[5:5]</bitRange>
56577                        <access>read-write</access>
56578                    </field>
56579                    <field>
56580                        <name>INCR_READ</name>
56581                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
56582
56583                            Generally this should be disabled for peripheral-to-memory transfers.</description>
56584                        <bitRange>[4:4]</bitRange>
56585                        <access>read-write</access>
56586                    </field>
56587                    <field>
56588                        <name>DATA_SIZE</name>
56589                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
56590                        <bitRange>[3:2]</bitRange>
56591                        <access>read-write</access>
56592                        <enumeratedValues>
56593                            <enumeratedValue>
56594                                <name>SIZE_BYTE</name>
56595                                <value>0</value>
56596                            </enumeratedValue>
56597                            <enumeratedValue>
56598                                <name>SIZE_HALFWORD</name>
56599                                <value>1</value>
56600                            </enumeratedValue>
56601                            <enumeratedValue>
56602                                <name>SIZE_WORD</name>
56603                                <value>2</value>
56604                            </enumeratedValue>
56605                        </enumeratedValues>
56606                    </field>
56607                    <field>
56608                        <name>HIGH_PRIORITY</name>
56609                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
56610
56611                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
56612                        <bitRange>[1:1]</bitRange>
56613                        <access>read-write</access>
56614                    </field>
56615                    <field>
56616                        <name>EN</name>
56617                        <description>DMA Channel Enable.
56618                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
56619                        <bitRange>[0:0]</bitRange>
56620                        <access>read-write</access>
56621                    </field>
56622                </fields>
56623            </register>
56624            <register>
56625                <name>CH8_AL1_CTRL</name>
56626                <addressOffset>0x00000210</addressOffset>
56627                <description>Alias for channel 8 CTRL register</description>
56628                <resetMask>0x00000000</resetMask>
56629                <fields>
56630                    <field>
56631                        <name>CH8_AL1_CTRL</name>
56632                        <bitRange>[31:0]</bitRange>
56633                        <access>read-write</access>
56634                    </field>
56635                </fields>
56636            </register>
56637            <register>
56638                <name>CH8_AL1_READ_ADDR</name>
56639                <addressOffset>0x00000214</addressOffset>
56640                <description>Alias for channel 8 READ_ADDR register</description>
56641                <resetMask>0x00000000</resetMask>
56642                <fields>
56643                    <field>
56644                        <name>CH8_AL1_READ_ADDR</name>
56645                        <bitRange>[31:0]</bitRange>
56646                        <access>read-write</access>
56647                    </field>
56648                </fields>
56649            </register>
56650            <register>
56651                <name>CH8_AL1_WRITE_ADDR</name>
56652                <addressOffset>0x00000218</addressOffset>
56653                <description>Alias for channel 8 WRITE_ADDR register</description>
56654                <resetMask>0x00000000</resetMask>
56655                <fields>
56656                    <field>
56657                        <name>CH8_AL1_WRITE_ADDR</name>
56658                        <bitRange>[31:0]</bitRange>
56659                        <access>read-write</access>
56660                    </field>
56661                </fields>
56662            </register>
56663            <register>
56664                <name>CH8_AL1_TRANS_COUNT_TRIG</name>
56665                <addressOffset>0x0000021c</addressOffset>
56666                <description>Alias for channel 8 TRANS_COUNT register
56667                    This is a trigger register (0xc). Writing a nonzero value will
56668                    reload the channel counter and start the channel.</description>
56669                <resetMask>0x00000000</resetMask>
56670                <fields>
56671                    <field>
56672                        <name>CH8_AL1_TRANS_COUNT_TRIG</name>
56673                        <bitRange>[31:0]</bitRange>
56674                        <access>read-write</access>
56675                    </field>
56676                </fields>
56677            </register>
56678            <register>
56679                <name>CH8_AL2_CTRL</name>
56680                <addressOffset>0x00000220</addressOffset>
56681                <description>Alias for channel 8 CTRL register</description>
56682                <resetMask>0x00000000</resetMask>
56683                <fields>
56684                    <field>
56685                        <name>CH8_AL2_CTRL</name>
56686                        <bitRange>[31:0]</bitRange>
56687                        <access>read-write</access>
56688                    </field>
56689                </fields>
56690            </register>
56691            <register>
56692                <name>CH8_AL2_TRANS_COUNT</name>
56693                <addressOffset>0x00000224</addressOffset>
56694                <description>Alias for channel 8 TRANS_COUNT register</description>
56695                <resetMask>0x00000000</resetMask>
56696                <fields>
56697                    <field>
56698                        <name>CH8_AL2_TRANS_COUNT</name>
56699                        <bitRange>[31:0]</bitRange>
56700                        <access>read-write</access>
56701                    </field>
56702                </fields>
56703            </register>
56704            <register>
56705                <name>CH8_AL2_READ_ADDR</name>
56706                <addressOffset>0x00000228</addressOffset>
56707                <description>Alias for channel 8 READ_ADDR register</description>
56708                <resetMask>0x00000000</resetMask>
56709                <fields>
56710                    <field>
56711                        <name>CH8_AL2_READ_ADDR</name>
56712                        <bitRange>[31:0]</bitRange>
56713                        <access>read-write</access>
56714                    </field>
56715                </fields>
56716            </register>
56717            <register>
56718                <name>CH8_AL2_WRITE_ADDR_TRIG</name>
56719                <addressOffset>0x0000022c</addressOffset>
56720                <description>Alias for channel 8 WRITE_ADDR register
56721                    This is a trigger register (0xc). Writing a nonzero value will
56722                    reload the channel counter and start the channel.</description>
56723                <resetMask>0x00000000</resetMask>
56724                <fields>
56725                    <field>
56726                        <name>CH8_AL2_WRITE_ADDR_TRIG</name>
56727                        <bitRange>[31:0]</bitRange>
56728                        <access>read-write</access>
56729                    </field>
56730                </fields>
56731            </register>
56732            <register>
56733                <name>CH8_AL3_CTRL</name>
56734                <addressOffset>0x00000230</addressOffset>
56735                <description>Alias for channel 8 CTRL register</description>
56736                <resetMask>0x00000000</resetMask>
56737                <fields>
56738                    <field>
56739                        <name>CH8_AL3_CTRL</name>
56740                        <bitRange>[31:0]</bitRange>
56741                        <access>read-write</access>
56742                    </field>
56743                </fields>
56744            </register>
56745            <register>
56746                <name>CH8_AL3_WRITE_ADDR</name>
56747                <addressOffset>0x00000234</addressOffset>
56748                <description>Alias for channel 8 WRITE_ADDR register</description>
56749                <resetMask>0x00000000</resetMask>
56750                <fields>
56751                    <field>
56752                        <name>CH8_AL3_WRITE_ADDR</name>
56753                        <bitRange>[31:0]</bitRange>
56754                        <access>read-write</access>
56755                    </field>
56756                </fields>
56757            </register>
56758            <register>
56759                <name>CH8_AL3_TRANS_COUNT</name>
56760                <addressOffset>0x00000238</addressOffset>
56761                <description>Alias for channel 8 TRANS_COUNT register</description>
56762                <resetMask>0x00000000</resetMask>
56763                <fields>
56764                    <field>
56765                        <name>CH8_AL3_TRANS_COUNT</name>
56766                        <bitRange>[31:0]</bitRange>
56767                        <access>read-write</access>
56768                    </field>
56769                </fields>
56770            </register>
56771            <register>
56772                <name>CH8_AL3_READ_ADDR_TRIG</name>
56773                <addressOffset>0x0000023c</addressOffset>
56774                <description>Alias for channel 8 READ_ADDR register
56775                    This is a trigger register (0xc). Writing a nonzero value will
56776                    reload the channel counter and start the channel.</description>
56777                <resetMask>0x00000000</resetMask>
56778                <fields>
56779                    <field>
56780                        <name>CH8_AL3_READ_ADDR_TRIG</name>
56781                        <bitRange>[31:0]</bitRange>
56782                        <access>read-write</access>
56783                    </field>
56784                </fields>
56785            </register>
56786            <register>
56787                <name>CH9_READ_ADDR</name>
56788                <addressOffset>0x00000240</addressOffset>
56789                <description>DMA Channel 9 Read Address pointer</description>
56790                <resetValue>0x00000000</resetValue>
56791                <fields>
56792                    <field>
56793                        <name>CH9_READ_ADDR</name>
56794                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
56795                        <bitRange>[31:0]</bitRange>
56796                        <access>read-write</access>
56797                    </field>
56798                </fields>
56799            </register>
56800            <register>
56801                <name>CH9_WRITE_ADDR</name>
56802                <addressOffset>0x00000244</addressOffset>
56803                <description>DMA Channel 9 Write Address pointer</description>
56804                <resetValue>0x00000000</resetValue>
56805                <fields>
56806                    <field>
56807                        <name>CH9_WRITE_ADDR</name>
56808                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
56809                        <bitRange>[31:0]</bitRange>
56810                        <access>read-write</access>
56811                    </field>
56812                </fields>
56813            </register>
56814            <register>
56815                <name>CH9_TRANS_COUNT</name>
56816                <addressOffset>0x00000248</addressOffset>
56817                <description>DMA Channel 9 Transfer Count</description>
56818                <resetValue>0x00000000</resetValue>
56819                <fields>
56820                    <field>
56821                        <name>MODE</name>
56822                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
56823
56824                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
56825
56826                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
56827
56828                            All other values are reserved.</description>
56829                        <bitRange>[31:28]</bitRange>
56830                        <access>read-write</access>
56831                        <enumeratedValues>
56832                            <enumeratedValue>
56833                                <name>NORMAL</name>
56834                                <value>0</value>
56835                            </enumeratedValue>
56836                            <enumeratedValue>
56837                                <name>TRIGGER_SELF</name>
56838                                <value>1</value>
56839                            </enumeratedValue>
56840                            <enumeratedValue>
56841                                <name>ENDLESS</name>
56842                                <value>15</value>
56843                            </enumeratedValue>
56844                        </enumeratedValues>
56845                    </field>
56846                    <field>
56847                        <name>COUNT</name>
56848                        <description>28-bit transfer count (256 million transfers maximum).
56849
56850                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
56851
56852                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
56853
56854                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
56855
56856                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
56857                        <bitRange>[27:0]</bitRange>
56858                        <access>read-write</access>
56859                    </field>
56860                </fields>
56861            </register>
56862            <register>
56863                <name>CH9_CTRL_TRIG</name>
56864                <addressOffset>0x0000024c</addressOffset>
56865                <description>DMA Channel 9 Control and Status</description>
56866                <resetValue>0x00000000</resetValue>
56867                <fields>
56868                    <field>
56869                        <name>AHB_ERROR</name>
56870                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
56871                        <bitRange>[31:31]</bitRange>
56872                        <access>read-only</access>
56873                    </field>
56874                    <field>
56875                        <name>READ_ERROR</name>
56876                        <description>If 1, the channel received a read bus error. Write one to clear.
56877                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
56878                        <bitRange>[30:30]</bitRange>
56879                        <access>read-write</access>
56880                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
56881                    </field>
56882                    <field>
56883                        <name>WRITE_ERROR</name>
56884                        <description>If 1, the channel received a write bus error. Write one to clear.
56885                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
56886                        <bitRange>[29:29]</bitRange>
56887                        <access>read-write</access>
56888                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
56889                    </field>
56890                    <field>
56891                        <name>BUSY</name>
56892                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
56893
56894                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
56895                        <bitRange>[26:26]</bitRange>
56896                        <access>read-only</access>
56897                    </field>
56898                    <field>
56899                        <name>SNIFF_EN</name>
56900                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
56901
56902                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
56903                        <bitRange>[25:25]</bitRange>
56904                        <access>read-write</access>
56905                    </field>
56906                    <field>
56907                        <name>BSWAP</name>
56908                        <description>Apply byte-swap transformation to DMA data.
56909                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
56910                        <bitRange>[24:24]</bitRange>
56911                        <access>read-write</access>
56912                    </field>
56913                    <field>
56914                        <name>IRQ_QUIET</name>
56915                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
56916
56917                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
56918                        <bitRange>[23:23]</bitRange>
56919                        <access>read-write</access>
56920                    </field>
56921                    <field>
56922                        <name>TREQ_SEL</name>
56923                        <description>Select a Transfer Request signal.
56924                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
56925                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
56926                        <bitRange>[22:17]</bitRange>
56927                        <access>read-write</access>
56928                        <enumeratedValues>
56929                            <enumeratedValue>
56930                                <name>PIO0_TX0</name>
56931                                <value>0</value>
56932                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
56933                            </enumeratedValue>
56934                            <enumeratedValue>
56935                                <name>PIO0_TX1</name>
56936                                <value>1</value>
56937                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
56938                            </enumeratedValue>
56939                            <enumeratedValue>
56940                                <name>PIO0_TX2</name>
56941                                <value>2</value>
56942                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
56943                            </enumeratedValue>
56944                            <enumeratedValue>
56945                                <name>PIO0_TX3</name>
56946                                <value>3</value>
56947                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
56948                            </enumeratedValue>
56949                            <enumeratedValue>
56950                                <name>PIO0_RX0</name>
56951                                <value>4</value>
56952                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
56953                            </enumeratedValue>
56954                            <enumeratedValue>
56955                                <name>PIO0_RX1</name>
56956                                <value>5</value>
56957                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
56958                            </enumeratedValue>
56959                            <enumeratedValue>
56960                                <name>PIO0_RX2</name>
56961                                <value>6</value>
56962                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
56963                            </enumeratedValue>
56964                            <enumeratedValue>
56965                                <name>PIO0_RX3</name>
56966                                <value>7</value>
56967                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
56968                            </enumeratedValue>
56969                            <enumeratedValue>
56970                                <name>PIO1_TX0</name>
56971                                <value>8</value>
56972                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
56973                            </enumeratedValue>
56974                            <enumeratedValue>
56975                                <name>PIO1_TX1</name>
56976                                <value>9</value>
56977                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
56978                            </enumeratedValue>
56979                            <enumeratedValue>
56980                                <name>PIO1_TX2</name>
56981                                <value>10</value>
56982                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
56983                            </enumeratedValue>
56984                            <enumeratedValue>
56985                                <name>PIO1_TX3</name>
56986                                <value>11</value>
56987                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
56988                            </enumeratedValue>
56989                            <enumeratedValue>
56990                                <name>PIO1_RX0</name>
56991                                <value>12</value>
56992                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
56993                            </enumeratedValue>
56994                            <enumeratedValue>
56995                                <name>PIO1_RX1</name>
56996                                <value>13</value>
56997                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
56998                            </enumeratedValue>
56999                            <enumeratedValue>
57000                                <name>PIO1_RX2</name>
57001                                <value>14</value>
57002                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
57003                            </enumeratedValue>
57004                            <enumeratedValue>
57005                                <name>PIO1_RX3</name>
57006                                <value>15</value>
57007                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
57008                            </enumeratedValue>
57009                            <enumeratedValue>
57010                                <name>PIO2_TX0</name>
57011                                <value>16</value>
57012                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
57013                            </enumeratedValue>
57014                            <enumeratedValue>
57015                                <name>PIO2_TX1</name>
57016                                <value>17</value>
57017                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
57018                            </enumeratedValue>
57019                            <enumeratedValue>
57020                                <name>PIO2_TX2</name>
57021                                <value>18</value>
57022                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
57023                            </enumeratedValue>
57024                            <enumeratedValue>
57025                                <name>PIO2_TX3</name>
57026                                <value>19</value>
57027                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
57028                            </enumeratedValue>
57029                            <enumeratedValue>
57030                                <name>PIO2_RX0</name>
57031                                <value>20</value>
57032                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
57033                            </enumeratedValue>
57034                            <enumeratedValue>
57035                                <name>PIO2_RX1</name>
57036                                <value>21</value>
57037                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
57038                            </enumeratedValue>
57039                            <enumeratedValue>
57040                                <name>PIO2_RX2</name>
57041                                <value>22</value>
57042                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
57043                            </enumeratedValue>
57044                            <enumeratedValue>
57045                                <name>PIO2_RX3</name>
57046                                <value>23</value>
57047                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
57048                            </enumeratedValue>
57049                            <enumeratedValue>
57050                                <name>SPI0_TX</name>
57051                                <value>24</value>
57052                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
57053                            </enumeratedValue>
57054                            <enumeratedValue>
57055                                <name>SPI0_RX</name>
57056                                <value>25</value>
57057                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
57058                            </enumeratedValue>
57059                            <enumeratedValue>
57060                                <name>SPI1_TX</name>
57061                                <value>26</value>
57062                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
57063                            </enumeratedValue>
57064                            <enumeratedValue>
57065                                <name>SPI1_RX</name>
57066                                <value>27</value>
57067                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
57068                            </enumeratedValue>
57069                            <enumeratedValue>
57070                                <name>UART0_TX</name>
57071                                <value>28</value>
57072                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
57073                            </enumeratedValue>
57074                            <enumeratedValue>
57075                                <name>UART0_RX</name>
57076                                <value>29</value>
57077                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
57078                            </enumeratedValue>
57079                            <enumeratedValue>
57080                                <name>UART1_TX</name>
57081                                <value>30</value>
57082                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
57083                            </enumeratedValue>
57084                            <enumeratedValue>
57085                                <name>UART1_RX</name>
57086                                <value>31</value>
57087                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
57088                            </enumeratedValue>
57089                            <enumeratedValue>
57090                                <name>PWM_WRAP0</name>
57091                                <value>32</value>
57092                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
57093                            </enumeratedValue>
57094                            <enumeratedValue>
57095                                <name>PWM_WRAP1</name>
57096                                <value>33</value>
57097                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
57098                            </enumeratedValue>
57099                            <enumeratedValue>
57100                                <name>PWM_WRAP2</name>
57101                                <value>34</value>
57102                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
57103                            </enumeratedValue>
57104                            <enumeratedValue>
57105                                <name>PWM_WRAP3</name>
57106                                <value>35</value>
57107                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
57108                            </enumeratedValue>
57109                            <enumeratedValue>
57110                                <name>PWM_WRAP4</name>
57111                                <value>36</value>
57112                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
57113                            </enumeratedValue>
57114                            <enumeratedValue>
57115                                <name>PWM_WRAP5</name>
57116                                <value>37</value>
57117                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
57118                            </enumeratedValue>
57119                            <enumeratedValue>
57120                                <name>PWM_WRAP6</name>
57121                                <value>38</value>
57122                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
57123                            </enumeratedValue>
57124                            <enumeratedValue>
57125                                <name>PWM_WRAP7</name>
57126                                <value>39</value>
57127                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
57128                            </enumeratedValue>
57129                            <enumeratedValue>
57130                                <name>PWM_WRAP8</name>
57131                                <value>40</value>
57132                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
57133                            </enumeratedValue>
57134                            <enumeratedValue>
57135                                <name>PWM_WRAP9</name>
57136                                <value>41</value>
57137                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
57138                            </enumeratedValue>
57139                            <enumeratedValue>
57140                                <name>PWM_WRAP10</name>
57141                                <value>42</value>
57142                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
57143                            </enumeratedValue>
57144                            <enumeratedValue>
57145                                <name>PWM_WRAP11</name>
57146                                <value>43</value>
57147                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
57148                            </enumeratedValue>
57149                            <enumeratedValue>
57150                                <name>I2C0_TX</name>
57151                                <value>44</value>
57152                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
57153                            </enumeratedValue>
57154                            <enumeratedValue>
57155                                <name>I2C0_RX</name>
57156                                <value>45</value>
57157                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
57158                            </enumeratedValue>
57159                            <enumeratedValue>
57160                                <name>I2C1_TX</name>
57161                                <value>46</value>
57162                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
57163                            </enumeratedValue>
57164                            <enumeratedValue>
57165                                <name>I2C1_RX</name>
57166                                <value>47</value>
57167                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
57168                            </enumeratedValue>
57169                            <enumeratedValue>
57170                                <name>ADC</name>
57171                                <value>48</value>
57172                                <description>Select the ADC as TREQ</description>
57173                            </enumeratedValue>
57174                            <enumeratedValue>
57175                                <name>XIP_STREAM</name>
57176                                <value>49</value>
57177                                <description>Select the XIP Streaming FIFO as TREQ</description>
57178                            </enumeratedValue>
57179                            <enumeratedValue>
57180                                <name>XIP_QMITX</name>
57181                                <value>50</value>
57182                                <description>Select XIP_QMITX as TREQ</description>
57183                            </enumeratedValue>
57184                            <enumeratedValue>
57185                                <name>XIP_QMIRX</name>
57186                                <value>51</value>
57187                                <description>Select XIP_QMIRX as TREQ</description>
57188                            </enumeratedValue>
57189                            <enumeratedValue>
57190                                <name>HSTX</name>
57191                                <value>52</value>
57192                                <description>Select HSTX as TREQ</description>
57193                            </enumeratedValue>
57194                            <enumeratedValue>
57195                                <name>CORESIGHT</name>
57196                                <value>53</value>
57197                                <description>Select CORESIGHT as TREQ</description>
57198                            </enumeratedValue>
57199                            <enumeratedValue>
57200                                <name>SHA256</name>
57201                                <value>54</value>
57202                                <description>Select SHA256 as TREQ</description>
57203                            </enumeratedValue>
57204                            <enumeratedValue>
57205                                <name>TIMER0</name>
57206                                <value>59</value>
57207                                <description>Select Timer 0 as TREQ</description>
57208                            </enumeratedValue>
57209                            <enumeratedValue>
57210                                <name>TIMER1</name>
57211                                <value>60</value>
57212                                <description>Select Timer 1 as TREQ</description>
57213                            </enumeratedValue>
57214                            <enumeratedValue>
57215                                <name>TIMER2</name>
57216                                <value>61</value>
57217                                <description>Select Timer 2 as TREQ (Optional)</description>
57218                            </enumeratedValue>
57219                            <enumeratedValue>
57220                                <name>TIMER3</name>
57221                                <value>62</value>
57222                                <description>Select Timer 3 as TREQ (Optional)</description>
57223                            </enumeratedValue>
57224                            <enumeratedValue>
57225                                <name>PERMANENT</name>
57226                                <value>63</value>
57227                                <description>Permanent request, for unpaced transfers.</description>
57228                            </enumeratedValue>
57229                        </enumeratedValues>
57230                    </field>
57231                    <field>
57232                        <name>CHAIN_TO</name>
57233                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
57234
57235                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
57236                        <bitRange>[16:13]</bitRange>
57237                        <access>read-write</access>
57238                    </field>
57239                    <field>
57240                        <name>RING_SEL</name>
57241                        <description>Select whether RING_SIZE applies to read or write addresses.
57242                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
57243                        <bitRange>[12:12]</bitRange>
57244                        <access>read-write</access>
57245                    </field>
57246                    <field>
57247                        <name>RING_SIZE</name>
57248                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
57249
57250                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
57251                        <bitRange>[11:8]</bitRange>
57252                        <access>read-write</access>
57253                        <enumeratedValues>
57254                            <enumeratedValue>
57255                                <name>RING_NONE</name>
57256                                <value>0</value>
57257                            </enumeratedValue>
57258                        </enumeratedValues>
57259                    </field>
57260                    <field>
57261                        <name>INCR_WRITE_REV</name>
57262                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
57263
57264                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
57265                        <bitRange>[7:7]</bitRange>
57266                        <access>read-write</access>
57267                    </field>
57268                    <field>
57269                        <name>INCR_WRITE</name>
57270                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
57271
57272                            Generally this should be disabled for memory-to-peripheral transfers.</description>
57273                        <bitRange>[6:6]</bitRange>
57274                        <access>read-write</access>
57275                    </field>
57276                    <field>
57277                        <name>INCR_READ_REV</name>
57278                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
57279
57280                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
57281                        <bitRange>[5:5]</bitRange>
57282                        <access>read-write</access>
57283                    </field>
57284                    <field>
57285                        <name>INCR_READ</name>
57286                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
57287
57288                            Generally this should be disabled for peripheral-to-memory transfers.</description>
57289                        <bitRange>[4:4]</bitRange>
57290                        <access>read-write</access>
57291                    </field>
57292                    <field>
57293                        <name>DATA_SIZE</name>
57294                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
57295                        <bitRange>[3:2]</bitRange>
57296                        <access>read-write</access>
57297                        <enumeratedValues>
57298                            <enumeratedValue>
57299                                <name>SIZE_BYTE</name>
57300                                <value>0</value>
57301                            </enumeratedValue>
57302                            <enumeratedValue>
57303                                <name>SIZE_HALFWORD</name>
57304                                <value>1</value>
57305                            </enumeratedValue>
57306                            <enumeratedValue>
57307                                <name>SIZE_WORD</name>
57308                                <value>2</value>
57309                            </enumeratedValue>
57310                        </enumeratedValues>
57311                    </field>
57312                    <field>
57313                        <name>HIGH_PRIORITY</name>
57314                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
57315
57316                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
57317                        <bitRange>[1:1]</bitRange>
57318                        <access>read-write</access>
57319                    </field>
57320                    <field>
57321                        <name>EN</name>
57322                        <description>DMA Channel Enable.
57323                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
57324                        <bitRange>[0:0]</bitRange>
57325                        <access>read-write</access>
57326                    </field>
57327                </fields>
57328            </register>
57329            <register>
57330                <name>CH9_AL1_CTRL</name>
57331                <addressOffset>0x00000250</addressOffset>
57332                <description>Alias for channel 9 CTRL register</description>
57333                <resetMask>0x00000000</resetMask>
57334                <fields>
57335                    <field>
57336                        <name>CH9_AL1_CTRL</name>
57337                        <bitRange>[31:0]</bitRange>
57338                        <access>read-write</access>
57339                    </field>
57340                </fields>
57341            </register>
57342            <register>
57343                <name>CH9_AL1_READ_ADDR</name>
57344                <addressOffset>0x00000254</addressOffset>
57345                <description>Alias for channel 9 READ_ADDR register</description>
57346                <resetMask>0x00000000</resetMask>
57347                <fields>
57348                    <field>
57349                        <name>CH9_AL1_READ_ADDR</name>
57350                        <bitRange>[31:0]</bitRange>
57351                        <access>read-write</access>
57352                    </field>
57353                </fields>
57354            </register>
57355            <register>
57356                <name>CH9_AL1_WRITE_ADDR</name>
57357                <addressOffset>0x00000258</addressOffset>
57358                <description>Alias for channel 9 WRITE_ADDR register</description>
57359                <resetMask>0x00000000</resetMask>
57360                <fields>
57361                    <field>
57362                        <name>CH9_AL1_WRITE_ADDR</name>
57363                        <bitRange>[31:0]</bitRange>
57364                        <access>read-write</access>
57365                    </field>
57366                </fields>
57367            </register>
57368            <register>
57369                <name>CH9_AL1_TRANS_COUNT_TRIG</name>
57370                <addressOffset>0x0000025c</addressOffset>
57371                <description>Alias for channel 9 TRANS_COUNT register
57372                    This is a trigger register (0xc). Writing a nonzero value will
57373                    reload the channel counter and start the channel.</description>
57374                <resetMask>0x00000000</resetMask>
57375                <fields>
57376                    <field>
57377                        <name>CH9_AL1_TRANS_COUNT_TRIG</name>
57378                        <bitRange>[31:0]</bitRange>
57379                        <access>read-write</access>
57380                    </field>
57381                </fields>
57382            </register>
57383            <register>
57384                <name>CH9_AL2_CTRL</name>
57385                <addressOffset>0x00000260</addressOffset>
57386                <description>Alias for channel 9 CTRL register</description>
57387                <resetMask>0x00000000</resetMask>
57388                <fields>
57389                    <field>
57390                        <name>CH9_AL2_CTRL</name>
57391                        <bitRange>[31:0]</bitRange>
57392                        <access>read-write</access>
57393                    </field>
57394                </fields>
57395            </register>
57396            <register>
57397                <name>CH9_AL2_TRANS_COUNT</name>
57398                <addressOffset>0x00000264</addressOffset>
57399                <description>Alias for channel 9 TRANS_COUNT register</description>
57400                <resetMask>0x00000000</resetMask>
57401                <fields>
57402                    <field>
57403                        <name>CH9_AL2_TRANS_COUNT</name>
57404                        <bitRange>[31:0]</bitRange>
57405                        <access>read-write</access>
57406                    </field>
57407                </fields>
57408            </register>
57409            <register>
57410                <name>CH9_AL2_READ_ADDR</name>
57411                <addressOffset>0x00000268</addressOffset>
57412                <description>Alias for channel 9 READ_ADDR register</description>
57413                <resetMask>0x00000000</resetMask>
57414                <fields>
57415                    <field>
57416                        <name>CH9_AL2_READ_ADDR</name>
57417                        <bitRange>[31:0]</bitRange>
57418                        <access>read-write</access>
57419                    </field>
57420                </fields>
57421            </register>
57422            <register>
57423                <name>CH9_AL2_WRITE_ADDR_TRIG</name>
57424                <addressOffset>0x0000026c</addressOffset>
57425                <description>Alias for channel 9 WRITE_ADDR register
57426                    This is a trigger register (0xc). Writing a nonzero value will
57427                    reload the channel counter and start the channel.</description>
57428                <resetMask>0x00000000</resetMask>
57429                <fields>
57430                    <field>
57431                        <name>CH9_AL2_WRITE_ADDR_TRIG</name>
57432                        <bitRange>[31:0]</bitRange>
57433                        <access>read-write</access>
57434                    </field>
57435                </fields>
57436            </register>
57437            <register>
57438                <name>CH9_AL3_CTRL</name>
57439                <addressOffset>0x00000270</addressOffset>
57440                <description>Alias for channel 9 CTRL register</description>
57441                <resetMask>0x00000000</resetMask>
57442                <fields>
57443                    <field>
57444                        <name>CH9_AL3_CTRL</name>
57445                        <bitRange>[31:0]</bitRange>
57446                        <access>read-write</access>
57447                    </field>
57448                </fields>
57449            </register>
57450            <register>
57451                <name>CH9_AL3_WRITE_ADDR</name>
57452                <addressOffset>0x00000274</addressOffset>
57453                <description>Alias for channel 9 WRITE_ADDR register</description>
57454                <resetMask>0x00000000</resetMask>
57455                <fields>
57456                    <field>
57457                        <name>CH9_AL3_WRITE_ADDR</name>
57458                        <bitRange>[31:0]</bitRange>
57459                        <access>read-write</access>
57460                    </field>
57461                </fields>
57462            </register>
57463            <register>
57464                <name>CH9_AL3_TRANS_COUNT</name>
57465                <addressOffset>0x00000278</addressOffset>
57466                <description>Alias for channel 9 TRANS_COUNT register</description>
57467                <resetMask>0x00000000</resetMask>
57468                <fields>
57469                    <field>
57470                        <name>CH9_AL3_TRANS_COUNT</name>
57471                        <bitRange>[31:0]</bitRange>
57472                        <access>read-write</access>
57473                    </field>
57474                </fields>
57475            </register>
57476            <register>
57477                <name>CH9_AL3_READ_ADDR_TRIG</name>
57478                <addressOffset>0x0000027c</addressOffset>
57479                <description>Alias for channel 9 READ_ADDR register
57480                    This is a trigger register (0xc). Writing a nonzero value will
57481                    reload the channel counter and start the channel.</description>
57482                <resetMask>0x00000000</resetMask>
57483                <fields>
57484                    <field>
57485                        <name>CH9_AL3_READ_ADDR_TRIG</name>
57486                        <bitRange>[31:0]</bitRange>
57487                        <access>read-write</access>
57488                    </field>
57489                </fields>
57490            </register>
57491            <register>
57492                <name>CH10_READ_ADDR</name>
57493                <addressOffset>0x00000280</addressOffset>
57494                <description>DMA Channel 10 Read Address pointer</description>
57495                <resetValue>0x00000000</resetValue>
57496                <fields>
57497                    <field>
57498                        <name>CH10_READ_ADDR</name>
57499                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
57500                        <bitRange>[31:0]</bitRange>
57501                        <access>read-write</access>
57502                    </field>
57503                </fields>
57504            </register>
57505            <register>
57506                <name>CH10_WRITE_ADDR</name>
57507                <addressOffset>0x00000284</addressOffset>
57508                <description>DMA Channel 10 Write Address pointer</description>
57509                <resetValue>0x00000000</resetValue>
57510                <fields>
57511                    <field>
57512                        <name>CH10_WRITE_ADDR</name>
57513                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
57514                        <bitRange>[31:0]</bitRange>
57515                        <access>read-write</access>
57516                    </field>
57517                </fields>
57518            </register>
57519            <register>
57520                <name>CH10_TRANS_COUNT</name>
57521                <addressOffset>0x00000288</addressOffset>
57522                <description>DMA Channel 10 Transfer Count</description>
57523                <resetValue>0x00000000</resetValue>
57524                <fields>
57525                    <field>
57526                        <name>MODE</name>
57527                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
57528
57529                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
57530
57531                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
57532
57533                            All other values are reserved.</description>
57534                        <bitRange>[31:28]</bitRange>
57535                        <access>read-write</access>
57536                        <enumeratedValues>
57537                            <enumeratedValue>
57538                                <name>NORMAL</name>
57539                                <value>0</value>
57540                            </enumeratedValue>
57541                            <enumeratedValue>
57542                                <name>TRIGGER_SELF</name>
57543                                <value>1</value>
57544                            </enumeratedValue>
57545                            <enumeratedValue>
57546                                <name>ENDLESS</name>
57547                                <value>15</value>
57548                            </enumeratedValue>
57549                        </enumeratedValues>
57550                    </field>
57551                    <field>
57552                        <name>COUNT</name>
57553                        <description>28-bit transfer count (256 million transfers maximum).
57554
57555                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
57556
57557                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
57558
57559                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
57560
57561                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
57562                        <bitRange>[27:0]</bitRange>
57563                        <access>read-write</access>
57564                    </field>
57565                </fields>
57566            </register>
57567            <register>
57568                <name>CH10_CTRL_TRIG</name>
57569                <addressOffset>0x0000028c</addressOffset>
57570                <description>DMA Channel 10 Control and Status</description>
57571                <resetValue>0x00000000</resetValue>
57572                <fields>
57573                    <field>
57574                        <name>AHB_ERROR</name>
57575                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
57576                        <bitRange>[31:31]</bitRange>
57577                        <access>read-only</access>
57578                    </field>
57579                    <field>
57580                        <name>READ_ERROR</name>
57581                        <description>If 1, the channel received a read bus error. Write one to clear.
57582                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
57583                        <bitRange>[30:30]</bitRange>
57584                        <access>read-write</access>
57585                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
57586                    </field>
57587                    <field>
57588                        <name>WRITE_ERROR</name>
57589                        <description>If 1, the channel received a write bus error. Write one to clear.
57590                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
57591                        <bitRange>[29:29]</bitRange>
57592                        <access>read-write</access>
57593                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
57594                    </field>
57595                    <field>
57596                        <name>BUSY</name>
57597                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
57598
57599                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
57600                        <bitRange>[26:26]</bitRange>
57601                        <access>read-only</access>
57602                    </field>
57603                    <field>
57604                        <name>SNIFF_EN</name>
57605                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
57606
57607                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
57608                        <bitRange>[25:25]</bitRange>
57609                        <access>read-write</access>
57610                    </field>
57611                    <field>
57612                        <name>BSWAP</name>
57613                        <description>Apply byte-swap transformation to DMA data.
57614                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
57615                        <bitRange>[24:24]</bitRange>
57616                        <access>read-write</access>
57617                    </field>
57618                    <field>
57619                        <name>IRQ_QUIET</name>
57620                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
57621
57622                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
57623                        <bitRange>[23:23]</bitRange>
57624                        <access>read-write</access>
57625                    </field>
57626                    <field>
57627                        <name>TREQ_SEL</name>
57628                        <description>Select a Transfer Request signal.
57629                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
57630                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
57631                        <bitRange>[22:17]</bitRange>
57632                        <access>read-write</access>
57633                        <enumeratedValues>
57634                            <enumeratedValue>
57635                                <name>PIO0_TX0</name>
57636                                <value>0</value>
57637                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
57638                            </enumeratedValue>
57639                            <enumeratedValue>
57640                                <name>PIO0_TX1</name>
57641                                <value>1</value>
57642                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
57643                            </enumeratedValue>
57644                            <enumeratedValue>
57645                                <name>PIO0_TX2</name>
57646                                <value>2</value>
57647                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
57648                            </enumeratedValue>
57649                            <enumeratedValue>
57650                                <name>PIO0_TX3</name>
57651                                <value>3</value>
57652                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
57653                            </enumeratedValue>
57654                            <enumeratedValue>
57655                                <name>PIO0_RX0</name>
57656                                <value>4</value>
57657                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
57658                            </enumeratedValue>
57659                            <enumeratedValue>
57660                                <name>PIO0_RX1</name>
57661                                <value>5</value>
57662                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
57663                            </enumeratedValue>
57664                            <enumeratedValue>
57665                                <name>PIO0_RX2</name>
57666                                <value>6</value>
57667                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
57668                            </enumeratedValue>
57669                            <enumeratedValue>
57670                                <name>PIO0_RX3</name>
57671                                <value>7</value>
57672                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
57673                            </enumeratedValue>
57674                            <enumeratedValue>
57675                                <name>PIO1_TX0</name>
57676                                <value>8</value>
57677                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
57678                            </enumeratedValue>
57679                            <enumeratedValue>
57680                                <name>PIO1_TX1</name>
57681                                <value>9</value>
57682                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
57683                            </enumeratedValue>
57684                            <enumeratedValue>
57685                                <name>PIO1_TX2</name>
57686                                <value>10</value>
57687                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
57688                            </enumeratedValue>
57689                            <enumeratedValue>
57690                                <name>PIO1_TX3</name>
57691                                <value>11</value>
57692                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
57693                            </enumeratedValue>
57694                            <enumeratedValue>
57695                                <name>PIO1_RX0</name>
57696                                <value>12</value>
57697                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
57698                            </enumeratedValue>
57699                            <enumeratedValue>
57700                                <name>PIO1_RX1</name>
57701                                <value>13</value>
57702                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
57703                            </enumeratedValue>
57704                            <enumeratedValue>
57705                                <name>PIO1_RX2</name>
57706                                <value>14</value>
57707                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
57708                            </enumeratedValue>
57709                            <enumeratedValue>
57710                                <name>PIO1_RX3</name>
57711                                <value>15</value>
57712                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
57713                            </enumeratedValue>
57714                            <enumeratedValue>
57715                                <name>PIO2_TX0</name>
57716                                <value>16</value>
57717                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
57718                            </enumeratedValue>
57719                            <enumeratedValue>
57720                                <name>PIO2_TX1</name>
57721                                <value>17</value>
57722                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
57723                            </enumeratedValue>
57724                            <enumeratedValue>
57725                                <name>PIO2_TX2</name>
57726                                <value>18</value>
57727                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
57728                            </enumeratedValue>
57729                            <enumeratedValue>
57730                                <name>PIO2_TX3</name>
57731                                <value>19</value>
57732                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
57733                            </enumeratedValue>
57734                            <enumeratedValue>
57735                                <name>PIO2_RX0</name>
57736                                <value>20</value>
57737                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
57738                            </enumeratedValue>
57739                            <enumeratedValue>
57740                                <name>PIO2_RX1</name>
57741                                <value>21</value>
57742                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
57743                            </enumeratedValue>
57744                            <enumeratedValue>
57745                                <name>PIO2_RX2</name>
57746                                <value>22</value>
57747                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
57748                            </enumeratedValue>
57749                            <enumeratedValue>
57750                                <name>PIO2_RX3</name>
57751                                <value>23</value>
57752                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
57753                            </enumeratedValue>
57754                            <enumeratedValue>
57755                                <name>SPI0_TX</name>
57756                                <value>24</value>
57757                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
57758                            </enumeratedValue>
57759                            <enumeratedValue>
57760                                <name>SPI0_RX</name>
57761                                <value>25</value>
57762                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
57763                            </enumeratedValue>
57764                            <enumeratedValue>
57765                                <name>SPI1_TX</name>
57766                                <value>26</value>
57767                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
57768                            </enumeratedValue>
57769                            <enumeratedValue>
57770                                <name>SPI1_RX</name>
57771                                <value>27</value>
57772                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
57773                            </enumeratedValue>
57774                            <enumeratedValue>
57775                                <name>UART0_TX</name>
57776                                <value>28</value>
57777                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
57778                            </enumeratedValue>
57779                            <enumeratedValue>
57780                                <name>UART0_RX</name>
57781                                <value>29</value>
57782                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
57783                            </enumeratedValue>
57784                            <enumeratedValue>
57785                                <name>UART1_TX</name>
57786                                <value>30</value>
57787                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
57788                            </enumeratedValue>
57789                            <enumeratedValue>
57790                                <name>UART1_RX</name>
57791                                <value>31</value>
57792                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
57793                            </enumeratedValue>
57794                            <enumeratedValue>
57795                                <name>PWM_WRAP0</name>
57796                                <value>32</value>
57797                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
57798                            </enumeratedValue>
57799                            <enumeratedValue>
57800                                <name>PWM_WRAP1</name>
57801                                <value>33</value>
57802                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
57803                            </enumeratedValue>
57804                            <enumeratedValue>
57805                                <name>PWM_WRAP2</name>
57806                                <value>34</value>
57807                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
57808                            </enumeratedValue>
57809                            <enumeratedValue>
57810                                <name>PWM_WRAP3</name>
57811                                <value>35</value>
57812                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
57813                            </enumeratedValue>
57814                            <enumeratedValue>
57815                                <name>PWM_WRAP4</name>
57816                                <value>36</value>
57817                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
57818                            </enumeratedValue>
57819                            <enumeratedValue>
57820                                <name>PWM_WRAP5</name>
57821                                <value>37</value>
57822                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
57823                            </enumeratedValue>
57824                            <enumeratedValue>
57825                                <name>PWM_WRAP6</name>
57826                                <value>38</value>
57827                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
57828                            </enumeratedValue>
57829                            <enumeratedValue>
57830                                <name>PWM_WRAP7</name>
57831                                <value>39</value>
57832                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
57833                            </enumeratedValue>
57834                            <enumeratedValue>
57835                                <name>PWM_WRAP8</name>
57836                                <value>40</value>
57837                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
57838                            </enumeratedValue>
57839                            <enumeratedValue>
57840                                <name>PWM_WRAP9</name>
57841                                <value>41</value>
57842                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
57843                            </enumeratedValue>
57844                            <enumeratedValue>
57845                                <name>PWM_WRAP10</name>
57846                                <value>42</value>
57847                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
57848                            </enumeratedValue>
57849                            <enumeratedValue>
57850                                <name>PWM_WRAP11</name>
57851                                <value>43</value>
57852                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
57853                            </enumeratedValue>
57854                            <enumeratedValue>
57855                                <name>I2C0_TX</name>
57856                                <value>44</value>
57857                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
57858                            </enumeratedValue>
57859                            <enumeratedValue>
57860                                <name>I2C0_RX</name>
57861                                <value>45</value>
57862                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
57863                            </enumeratedValue>
57864                            <enumeratedValue>
57865                                <name>I2C1_TX</name>
57866                                <value>46</value>
57867                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
57868                            </enumeratedValue>
57869                            <enumeratedValue>
57870                                <name>I2C1_RX</name>
57871                                <value>47</value>
57872                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
57873                            </enumeratedValue>
57874                            <enumeratedValue>
57875                                <name>ADC</name>
57876                                <value>48</value>
57877                                <description>Select the ADC as TREQ</description>
57878                            </enumeratedValue>
57879                            <enumeratedValue>
57880                                <name>XIP_STREAM</name>
57881                                <value>49</value>
57882                                <description>Select the XIP Streaming FIFO as TREQ</description>
57883                            </enumeratedValue>
57884                            <enumeratedValue>
57885                                <name>XIP_QMITX</name>
57886                                <value>50</value>
57887                                <description>Select XIP_QMITX as TREQ</description>
57888                            </enumeratedValue>
57889                            <enumeratedValue>
57890                                <name>XIP_QMIRX</name>
57891                                <value>51</value>
57892                                <description>Select XIP_QMIRX as TREQ</description>
57893                            </enumeratedValue>
57894                            <enumeratedValue>
57895                                <name>HSTX</name>
57896                                <value>52</value>
57897                                <description>Select HSTX as TREQ</description>
57898                            </enumeratedValue>
57899                            <enumeratedValue>
57900                                <name>CORESIGHT</name>
57901                                <value>53</value>
57902                                <description>Select CORESIGHT as TREQ</description>
57903                            </enumeratedValue>
57904                            <enumeratedValue>
57905                                <name>SHA256</name>
57906                                <value>54</value>
57907                                <description>Select SHA256 as TREQ</description>
57908                            </enumeratedValue>
57909                            <enumeratedValue>
57910                                <name>TIMER0</name>
57911                                <value>59</value>
57912                                <description>Select Timer 0 as TREQ</description>
57913                            </enumeratedValue>
57914                            <enumeratedValue>
57915                                <name>TIMER1</name>
57916                                <value>60</value>
57917                                <description>Select Timer 1 as TREQ</description>
57918                            </enumeratedValue>
57919                            <enumeratedValue>
57920                                <name>TIMER2</name>
57921                                <value>61</value>
57922                                <description>Select Timer 2 as TREQ (Optional)</description>
57923                            </enumeratedValue>
57924                            <enumeratedValue>
57925                                <name>TIMER3</name>
57926                                <value>62</value>
57927                                <description>Select Timer 3 as TREQ (Optional)</description>
57928                            </enumeratedValue>
57929                            <enumeratedValue>
57930                                <name>PERMANENT</name>
57931                                <value>63</value>
57932                                <description>Permanent request, for unpaced transfers.</description>
57933                            </enumeratedValue>
57934                        </enumeratedValues>
57935                    </field>
57936                    <field>
57937                        <name>CHAIN_TO</name>
57938                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
57939
57940                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
57941                        <bitRange>[16:13]</bitRange>
57942                        <access>read-write</access>
57943                    </field>
57944                    <field>
57945                        <name>RING_SEL</name>
57946                        <description>Select whether RING_SIZE applies to read or write addresses.
57947                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
57948                        <bitRange>[12:12]</bitRange>
57949                        <access>read-write</access>
57950                    </field>
57951                    <field>
57952                        <name>RING_SIZE</name>
57953                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
57954
57955                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
57956                        <bitRange>[11:8]</bitRange>
57957                        <access>read-write</access>
57958                        <enumeratedValues>
57959                            <enumeratedValue>
57960                                <name>RING_NONE</name>
57961                                <value>0</value>
57962                            </enumeratedValue>
57963                        </enumeratedValues>
57964                    </field>
57965                    <field>
57966                        <name>INCR_WRITE_REV</name>
57967                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
57968
57969                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
57970                        <bitRange>[7:7]</bitRange>
57971                        <access>read-write</access>
57972                    </field>
57973                    <field>
57974                        <name>INCR_WRITE</name>
57975                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
57976
57977                            Generally this should be disabled for memory-to-peripheral transfers.</description>
57978                        <bitRange>[6:6]</bitRange>
57979                        <access>read-write</access>
57980                    </field>
57981                    <field>
57982                        <name>INCR_READ_REV</name>
57983                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
57984
57985                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
57986                        <bitRange>[5:5]</bitRange>
57987                        <access>read-write</access>
57988                    </field>
57989                    <field>
57990                        <name>INCR_READ</name>
57991                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
57992
57993                            Generally this should be disabled for peripheral-to-memory transfers.</description>
57994                        <bitRange>[4:4]</bitRange>
57995                        <access>read-write</access>
57996                    </field>
57997                    <field>
57998                        <name>DATA_SIZE</name>
57999                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
58000                        <bitRange>[3:2]</bitRange>
58001                        <access>read-write</access>
58002                        <enumeratedValues>
58003                            <enumeratedValue>
58004                                <name>SIZE_BYTE</name>
58005                                <value>0</value>
58006                            </enumeratedValue>
58007                            <enumeratedValue>
58008                                <name>SIZE_HALFWORD</name>
58009                                <value>1</value>
58010                            </enumeratedValue>
58011                            <enumeratedValue>
58012                                <name>SIZE_WORD</name>
58013                                <value>2</value>
58014                            </enumeratedValue>
58015                        </enumeratedValues>
58016                    </field>
58017                    <field>
58018                        <name>HIGH_PRIORITY</name>
58019                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
58020
58021                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
58022                        <bitRange>[1:1]</bitRange>
58023                        <access>read-write</access>
58024                    </field>
58025                    <field>
58026                        <name>EN</name>
58027                        <description>DMA Channel Enable.
58028                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
58029                        <bitRange>[0:0]</bitRange>
58030                        <access>read-write</access>
58031                    </field>
58032                </fields>
58033            </register>
58034            <register>
58035                <name>CH10_AL1_CTRL</name>
58036                <addressOffset>0x00000290</addressOffset>
58037                <description>Alias for channel 10 CTRL register</description>
58038                <resetMask>0x00000000</resetMask>
58039                <fields>
58040                    <field>
58041                        <name>CH10_AL1_CTRL</name>
58042                        <bitRange>[31:0]</bitRange>
58043                        <access>read-write</access>
58044                    </field>
58045                </fields>
58046            </register>
58047            <register>
58048                <name>CH10_AL1_READ_ADDR</name>
58049                <addressOffset>0x00000294</addressOffset>
58050                <description>Alias for channel 10 READ_ADDR register</description>
58051                <resetMask>0x00000000</resetMask>
58052                <fields>
58053                    <field>
58054                        <name>CH10_AL1_READ_ADDR</name>
58055                        <bitRange>[31:0]</bitRange>
58056                        <access>read-write</access>
58057                    </field>
58058                </fields>
58059            </register>
58060            <register>
58061                <name>CH10_AL1_WRITE_ADDR</name>
58062                <addressOffset>0x00000298</addressOffset>
58063                <description>Alias for channel 10 WRITE_ADDR register</description>
58064                <resetMask>0x00000000</resetMask>
58065                <fields>
58066                    <field>
58067                        <name>CH10_AL1_WRITE_ADDR</name>
58068                        <bitRange>[31:0]</bitRange>
58069                        <access>read-write</access>
58070                    </field>
58071                </fields>
58072            </register>
58073            <register>
58074                <name>CH10_AL1_TRANS_COUNT_TRIG</name>
58075                <addressOffset>0x0000029c</addressOffset>
58076                <description>Alias for channel 10 TRANS_COUNT register
58077                    This is a trigger register (0xc). Writing a nonzero value will
58078                    reload the channel counter and start the channel.</description>
58079                <resetMask>0x00000000</resetMask>
58080                <fields>
58081                    <field>
58082                        <name>CH10_AL1_TRANS_COUNT_TRIG</name>
58083                        <bitRange>[31:0]</bitRange>
58084                        <access>read-write</access>
58085                    </field>
58086                </fields>
58087            </register>
58088            <register>
58089                <name>CH10_AL2_CTRL</name>
58090                <addressOffset>0x000002a0</addressOffset>
58091                <description>Alias for channel 10 CTRL register</description>
58092                <resetMask>0x00000000</resetMask>
58093                <fields>
58094                    <field>
58095                        <name>CH10_AL2_CTRL</name>
58096                        <bitRange>[31:0]</bitRange>
58097                        <access>read-write</access>
58098                    </field>
58099                </fields>
58100            </register>
58101            <register>
58102                <name>CH10_AL2_TRANS_COUNT</name>
58103                <addressOffset>0x000002a4</addressOffset>
58104                <description>Alias for channel 10 TRANS_COUNT register</description>
58105                <resetMask>0x00000000</resetMask>
58106                <fields>
58107                    <field>
58108                        <name>CH10_AL2_TRANS_COUNT</name>
58109                        <bitRange>[31:0]</bitRange>
58110                        <access>read-write</access>
58111                    </field>
58112                </fields>
58113            </register>
58114            <register>
58115                <name>CH10_AL2_READ_ADDR</name>
58116                <addressOffset>0x000002a8</addressOffset>
58117                <description>Alias for channel 10 READ_ADDR register</description>
58118                <resetMask>0x00000000</resetMask>
58119                <fields>
58120                    <field>
58121                        <name>CH10_AL2_READ_ADDR</name>
58122                        <bitRange>[31:0]</bitRange>
58123                        <access>read-write</access>
58124                    </field>
58125                </fields>
58126            </register>
58127            <register>
58128                <name>CH10_AL2_WRITE_ADDR_TRIG</name>
58129                <addressOffset>0x000002ac</addressOffset>
58130                <description>Alias for channel 10 WRITE_ADDR register
58131                    This is a trigger register (0xc). Writing a nonzero value will
58132                    reload the channel counter and start the channel.</description>
58133                <resetMask>0x00000000</resetMask>
58134                <fields>
58135                    <field>
58136                        <name>CH10_AL2_WRITE_ADDR_TRIG</name>
58137                        <bitRange>[31:0]</bitRange>
58138                        <access>read-write</access>
58139                    </field>
58140                </fields>
58141            </register>
58142            <register>
58143                <name>CH10_AL3_CTRL</name>
58144                <addressOffset>0x000002b0</addressOffset>
58145                <description>Alias for channel 10 CTRL register</description>
58146                <resetMask>0x00000000</resetMask>
58147                <fields>
58148                    <field>
58149                        <name>CH10_AL3_CTRL</name>
58150                        <bitRange>[31:0]</bitRange>
58151                        <access>read-write</access>
58152                    </field>
58153                </fields>
58154            </register>
58155            <register>
58156                <name>CH10_AL3_WRITE_ADDR</name>
58157                <addressOffset>0x000002b4</addressOffset>
58158                <description>Alias for channel 10 WRITE_ADDR register</description>
58159                <resetMask>0x00000000</resetMask>
58160                <fields>
58161                    <field>
58162                        <name>CH10_AL3_WRITE_ADDR</name>
58163                        <bitRange>[31:0]</bitRange>
58164                        <access>read-write</access>
58165                    </field>
58166                </fields>
58167            </register>
58168            <register>
58169                <name>CH10_AL3_TRANS_COUNT</name>
58170                <addressOffset>0x000002b8</addressOffset>
58171                <description>Alias for channel 10 TRANS_COUNT register</description>
58172                <resetMask>0x00000000</resetMask>
58173                <fields>
58174                    <field>
58175                        <name>CH10_AL3_TRANS_COUNT</name>
58176                        <bitRange>[31:0]</bitRange>
58177                        <access>read-write</access>
58178                    </field>
58179                </fields>
58180            </register>
58181            <register>
58182                <name>CH10_AL3_READ_ADDR_TRIG</name>
58183                <addressOffset>0x000002bc</addressOffset>
58184                <description>Alias for channel 10 READ_ADDR register
58185                    This is a trigger register (0xc). Writing a nonzero value will
58186                    reload the channel counter and start the channel.</description>
58187                <resetMask>0x00000000</resetMask>
58188                <fields>
58189                    <field>
58190                        <name>CH10_AL3_READ_ADDR_TRIG</name>
58191                        <bitRange>[31:0]</bitRange>
58192                        <access>read-write</access>
58193                    </field>
58194                </fields>
58195            </register>
58196            <register>
58197                <name>CH11_READ_ADDR</name>
58198                <addressOffset>0x000002c0</addressOffset>
58199                <description>DMA Channel 11 Read Address pointer</description>
58200                <resetValue>0x00000000</resetValue>
58201                <fields>
58202                    <field>
58203                        <name>CH11_READ_ADDR</name>
58204                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
58205                        <bitRange>[31:0]</bitRange>
58206                        <access>read-write</access>
58207                    </field>
58208                </fields>
58209            </register>
58210            <register>
58211                <name>CH11_WRITE_ADDR</name>
58212                <addressOffset>0x000002c4</addressOffset>
58213                <description>DMA Channel 11 Write Address pointer</description>
58214                <resetValue>0x00000000</resetValue>
58215                <fields>
58216                    <field>
58217                        <name>CH11_WRITE_ADDR</name>
58218                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
58219                        <bitRange>[31:0]</bitRange>
58220                        <access>read-write</access>
58221                    </field>
58222                </fields>
58223            </register>
58224            <register>
58225                <name>CH11_TRANS_COUNT</name>
58226                <addressOffset>0x000002c8</addressOffset>
58227                <description>DMA Channel 11 Transfer Count</description>
58228                <resetValue>0x00000000</resetValue>
58229                <fields>
58230                    <field>
58231                        <name>MODE</name>
58232                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
58233
58234                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
58235
58236                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
58237
58238                            All other values are reserved.</description>
58239                        <bitRange>[31:28]</bitRange>
58240                        <access>read-write</access>
58241                        <enumeratedValues>
58242                            <enumeratedValue>
58243                                <name>NORMAL</name>
58244                                <value>0</value>
58245                            </enumeratedValue>
58246                            <enumeratedValue>
58247                                <name>TRIGGER_SELF</name>
58248                                <value>1</value>
58249                            </enumeratedValue>
58250                            <enumeratedValue>
58251                                <name>ENDLESS</name>
58252                                <value>15</value>
58253                            </enumeratedValue>
58254                        </enumeratedValues>
58255                    </field>
58256                    <field>
58257                        <name>COUNT</name>
58258                        <description>28-bit transfer count (256 million transfers maximum).
58259
58260                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
58261
58262                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
58263
58264                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
58265
58266                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
58267                        <bitRange>[27:0]</bitRange>
58268                        <access>read-write</access>
58269                    </field>
58270                </fields>
58271            </register>
58272            <register>
58273                <name>CH11_CTRL_TRIG</name>
58274                <addressOffset>0x000002cc</addressOffset>
58275                <description>DMA Channel 11 Control and Status</description>
58276                <resetValue>0x00000000</resetValue>
58277                <fields>
58278                    <field>
58279                        <name>AHB_ERROR</name>
58280                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
58281                        <bitRange>[31:31]</bitRange>
58282                        <access>read-only</access>
58283                    </field>
58284                    <field>
58285                        <name>READ_ERROR</name>
58286                        <description>If 1, the channel received a read bus error. Write one to clear.
58287                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
58288                        <bitRange>[30:30]</bitRange>
58289                        <access>read-write</access>
58290                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
58291                    </field>
58292                    <field>
58293                        <name>WRITE_ERROR</name>
58294                        <description>If 1, the channel received a write bus error. Write one to clear.
58295                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
58296                        <bitRange>[29:29]</bitRange>
58297                        <access>read-write</access>
58298                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
58299                    </field>
58300                    <field>
58301                        <name>BUSY</name>
58302                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
58303
58304                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
58305                        <bitRange>[26:26]</bitRange>
58306                        <access>read-only</access>
58307                    </field>
58308                    <field>
58309                        <name>SNIFF_EN</name>
58310                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
58311
58312                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
58313                        <bitRange>[25:25]</bitRange>
58314                        <access>read-write</access>
58315                    </field>
58316                    <field>
58317                        <name>BSWAP</name>
58318                        <description>Apply byte-swap transformation to DMA data.
58319                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
58320                        <bitRange>[24:24]</bitRange>
58321                        <access>read-write</access>
58322                    </field>
58323                    <field>
58324                        <name>IRQ_QUIET</name>
58325                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
58326
58327                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
58328                        <bitRange>[23:23]</bitRange>
58329                        <access>read-write</access>
58330                    </field>
58331                    <field>
58332                        <name>TREQ_SEL</name>
58333                        <description>Select a Transfer Request signal.
58334                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
58335                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
58336                        <bitRange>[22:17]</bitRange>
58337                        <access>read-write</access>
58338                        <enumeratedValues>
58339                            <enumeratedValue>
58340                                <name>PIO0_TX0</name>
58341                                <value>0</value>
58342                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
58343                            </enumeratedValue>
58344                            <enumeratedValue>
58345                                <name>PIO0_TX1</name>
58346                                <value>1</value>
58347                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
58348                            </enumeratedValue>
58349                            <enumeratedValue>
58350                                <name>PIO0_TX2</name>
58351                                <value>2</value>
58352                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
58353                            </enumeratedValue>
58354                            <enumeratedValue>
58355                                <name>PIO0_TX3</name>
58356                                <value>3</value>
58357                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
58358                            </enumeratedValue>
58359                            <enumeratedValue>
58360                                <name>PIO0_RX0</name>
58361                                <value>4</value>
58362                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
58363                            </enumeratedValue>
58364                            <enumeratedValue>
58365                                <name>PIO0_RX1</name>
58366                                <value>5</value>
58367                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
58368                            </enumeratedValue>
58369                            <enumeratedValue>
58370                                <name>PIO0_RX2</name>
58371                                <value>6</value>
58372                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
58373                            </enumeratedValue>
58374                            <enumeratedValue>
58375                                <name>PIO0_RX3</name>
58376                                <value>7</value>
58377                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
58378                            </enumeratedValue>
58379                            <enumeratedValue>
58380                                <name>PIO1_TX0</name>
58381                                <value>8</value>
58382                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
58383                            </enumeratedValue>
58384                            <enumeratedValue>
58385                                <name>PIO1_TX1</name>
58386                                <value>9</value>
58387                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
58388                            </enumeratedValue>
58389                            <enumeratedValue>
58390                                <name>PIO1_TX2</name>
58391                                <value>10</value>
58392                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
58393                            </enumeratedValue>
58394                            <enumeratedValue>
58395                                <name>PIO1_TX3</name>
58396                                <value>11</value>
58397                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
58398                            </enumeratedValue>
58399                            <enumeratedValue>
58400                                <name>PIO1_RX0</name>
58401                                <value>12</value>
58402                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
58403                            </enumeratedValue>
58404                            <enumeratedValue>
58405                                <name>PIO1_RX1</name>
58406                                <value>13</value>
58407                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
58408                            </enumeratedValue>
58409                            <enumeratedValue>
58410                                <name>PIO1_RX2</name>
58411                                <value>14</value>
58412                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
58413                            </enumeratedValue>
58414                            <enumeratedValue>
58415                                <name>PIO1_RX3</name>
58416                                <value>15</value>
58417                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
58418                            </enumeratedValue>
58419                            <enumeratedValue>
58420                                <name>PIO2_TX0</name>
58421                                <value>16</value>
58422                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
58423                            </enumeratedValue>
58424                            <enumeratedValue>
58425                                <name>PIO2_TX1</name>
58426                                <value>17</value>
58427                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
58428                            </enumeratedValue>
58429                            <enumeratedValue>
58430                                <name>PIO2_TX2</name>
58431                                <value>18</value>
58432                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
58433                            </enumeratedValue>
58434                            <enumeratedValue>
58435                                <name>PIO2_TX3</name>
58436                                <value>19</value>
58437                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
58438                            </enumeratedValue>
58439                            <enumeratedValue>
58440                                <name>PIO2_RX0</name>
58441                                <value>20</value>
58442                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
58443                            </enumeratedValue>
58444                            <enumeratedValue>
58445                                <name>PIO2_RX1</name>
58446                                <value>21</value>
58447                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
58448                            </enumeratedValue>
58449                            <enumeratedValue>
58450                                <name>PIO2_RX2</name>
58451                                <value>22</value>
58452                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
58453                            </enumeratedValue>
58454                            <enumeratedValue>
58455                                <name>PIO2_RX3</name>
58456                                <value>23</value>
58457                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
58458                            </enumeratedValue>
58459                            <enumeratedValue>
58460                                <name>SPI0_TX</name>
58461                                <value>24</value>
58462                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
58463                            </enumeratedValue>
58464                            <enumeratedValue>
58465                                <name>SPI0_RX</name>
58466                                <value>25</value>
58467                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
58468                            </enumeratedValue>
58469                            <enumeratedValue>
58470                                <name>SPI1_TX</name>
58471                                <value>26</value>
58472                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
58473                            </enumeratedValue>
58474                            <enumeratedValue>
58475                                <name>SPI1_RX</name>
58476                                <value>27</value>
58477                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
58478                            </enumeratedValue>
58479                            <enumeratedValue>
58480                                <name>UART0_TX</name>
58481                                <value>28</value>
58482                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
58483                            </enumeratedValue>
58484                            <enumeratedValue>
58485                                <name>UART0_RX</name>
58486                                <value>29</value>
58487                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
58488                            </enumeratedValue>
58489                            <enumeratedValue>
58490                                <name>UART1_TX</name>
58491                                <value>30</value>
58492                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
58493                            </enumeratedValue>
58494                            <enumeratedValue>
58495                                <name>UART1_RX</name>
58496                                <value>31</value>
58497                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
58498                            </enumeratedValue>
58499                            <enumeratedValue>
58500                                <name>PWM_WRAP0</name>
58501                                <value>32</value>
58502                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
58503                            </enumeratedValue>
58504                            <enumeratedValue>
58505                                <name>PWM_WRAP1</name>
58506                                <value>33</value>
58507                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
58508                            </enumeratedValue>
58509                            <enumeratedValue>
58510                                <name>PWM_WRAP2</name>
58511                                <value>34</value>
58512                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
58513                            </enumeratedValue>
58514                            <enumeratedValue>
58515                                <name>PWM_WRAP3</name>
58516                                <value>35</value>
58517                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
58518                            </enumeratedValue>
58519                            <enumeratedValue>
58520                                <name>PWM_WRAP4</name>
58521                                <value>36</value>
58522                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
58523                            </enumeratedValue>
58524                            <enumeratedValue>
58525                                <name>PWM_WRAP5</name>
58526                                <value>37</value>
58527                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
58528                            </enumeratedValue>
58529                            <enumeratedValue>
58530                                <name>PWM_WRAP6</name>
58531                                <value>38</value>
58532                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
58533                            </enumeratedValue>
58534                            <enumeratedValue>
58535                                <name>PWM_WRAP7</name>
58536                                <value>39</value>
58537                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
58538                            </enumeratedValue>
58539                            <enumeratedValue>
58540                                <name>PWM_WRAP8</name>
58541                                <value>40</value>
58542                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
58543                            </enumeratedValue>
58544                            <enumeratedValue>
58545                                <name>PWM_WRAP9</name>
58546                                <value>41</value>
58547                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
58548                            </enumeratedValue>
58549                            <enumeratedValue>
58550                                <name>PWM_WRAP10</name>
58551                                <value>42</value>
58552                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
58553                            </enumeratedValue>
58554                            <enumeratedValue>
58555                                <name>PWM_WRAP11</name>
58556                                <value>43</value>
58557                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
58558                            </enumeratedValue>
58559                            <enumeratedValue>
58560                                <name>I2C0_TX</name>
58561                                <value>44</value>
58562                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
58563                            </enumeratedValue>
58564                            <enumeratedValue>
58565                                <name>I2C0_RX</name>
58566                                <value>45</value>
58567                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
58568                            </enumeratedValue>
58569                            <enumeratedValue>
58570                                <name>I2C1_TX</name>
58571                                <value>46</value>
58572                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
58573                            </enumeratedValue>
58574                            <enumeratedValue>
58575                                <name>I2C1_RX</name>
58576                                <value>47</value>
58577                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
58578                            </enumeratedValue>
58579                            <enumeratedValue>
58580                                <name>ADC</name>
58581                                <value>48</value>
58582                                <description>Select the ADC as TREQ</description>
58583                            </enumeratedValue>
58584                            <enumeratedValue>
58585                                <name>XIP_STREAM</name>
58586                                <value>49</value>
58587                                <description>Select the XIP Streaming FIFO as TREQ</description>
58588                            </enumeratedValue>
58589                            <enumeratedValue>
58590                                <name>XIP_QMITX</name>
58591                                <value>50</value>
58592                                <description>Select XIP_QMITX as TREQ</description>
58593                            </enumeratedValue>
58594                            <enumeratedValue>
58595                                <name>XIP_QMIRX</name>
58596                                <value>51</value>
58597                                <description>Select XIP_QMIRX as TREQ</description>
58598                            </enumeratedValue>
58599                            <enumeratedValue>
58600                                <name>HSTX</name>
58601                                <value>52</value>
58602                                <description>Select HSTX as TREQ</description>
58603                            </enumeratedValue>
58604                            <enumeratedValue>
58605                                <name>CORESIGHT</name>
58606                                <value>53</value>
58607                                <description>Select CORESIGHT as TREQ</description>
58608                            </enumeratedValue>
58609                            <enumeratedValue>
58610                                <name>SHA256</name>
58611                                <value>54</value>
58612                                <description>Select SHA256 as TREQ</description>
58613                            </enumeratedValue>
58614                            <enumeratedValue>
58615                                <name>TIMER0</name>
58616                                <value>59</value>
58617                                <description>Select Timer 0 as TREQ</description>
58618                            </enumeratedValue>
58619                            <enumeratedValue>
58620                                <name>TIMER1</name>
58621                                <value>60</value>
58622                                <description>Select Timer 1 as TREQ</description>
58623                            </enumeratedValue>
58624                            <enumeratedValue>
58625                                <name>TIMER2</name>
58626                                <value>61</value>
58627                                <description>Select Timer 2 as TREQ (Optional)</description>
58628                            </enumeratedValue>
58629                            <enumeratedValue>
58630                                <name>TIMER3</name>
58631                                <value>62</value>
58632                                <description>Select Timer 3 as TREQ (Optional)</description>
58633                            </enumeratedValue>
58634                            <enumeratedValue>
58635                                <name>PERMANENT</name>
58636                                <value>63</value>
58637                                <description>Permanent request, for unpaced transfers.</description>
58638                            </enumeratedValue>
58639                        </enumeratedValues>
58640                    </field>
58641                    <field>
58642                        <name>CHAIN_TO</name>
58643                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
58644
58645                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
58646                        <bitRange>[16:13]</bitRange>
58647                        <access>read-write</access>
58648                    </field>
58649                    <field>
58650                        <name>RING_SEL</name>
58651                        <description>Select whether RING_SIZE applies to read or write addresses.
58652                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
58653                        <bitRange>[12:12]</bitRange>
58654                        <access>read-write</access>
58655                    </field>
58656                    <field>
58657                        <name>RING_SIZE</name>
58658                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
58659
58660                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
58661                        <bitRange>[11:8]</bitRange>
58662                        <access>read-write</access>
58663                        <enumeratedValues>
58664                            <enumeratedValue>
58665                                <name>RING_NONE</name>
58666                                <value>0</value>
58667                            </enumeratedValue>
58668                        </enumeratedValues>
58669                    </field>
58670                    <field>
58671                        <name>INCR_WRITE_REV</name>
58672                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
58673
58674                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
58675                        <bitRange>[7:7]</bitRange>
58676                        <access>read-write</access>
58677                    </field>
58678                    <field>
58679                        <name>INCR_WRITE</name>
58680                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
58681
58682                            Generally this should be disabled for memory-to-peripheral transfers.</description>
58683                        <bitRange>[6:6]</bitRange>
58684                        <access>read-write</access>
58685                    </field>
58686                    <field>
58687                        <name>INCR_READ_REV</name>
58688                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
58689
58690                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
58691                        <bitRange>[5:5]</bitRange>
58692                        <access>read-write</access>
58693                    </field>
58694                    <field>
58695                        <name>INCR_READ</name>
58696                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
58697
58698                            Generally this should be disabled for peripheral-to-memory transfers.</description>
58699                        <bitRange>[4:4]</bitRange>
58700                        <access>read-write</access>
58701                    </field>
58702                    <field>
58703                        <name>DATA_SIZE</name>
58704                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
58705                        <bitRange>[3:2]</bitRange>
58706                        <access>read-write</access>
58707                        <enumeratedValues>
58708                            <enumeratedValue>
58709                                <name>SIZE_BYTE</name>
58710                                <value>0</value>
58711                            </enumeratedValue>
58712                            <enumeratedValue>
58713                                <name>SIZE_HALFWORD</name>
58714                                <value>1</value>
58715                            </enumeratedValue>
58716                            <enumeratedValue>
58717                                <name>SIZE_WORD</name>
58718                                <value>2</value>
58719                            </enumeratedValue>
58720                        </enumeratedValues>
58721                    </field>
58722                    <field>
58723                        <name>HIGH_PRIORITY</name>
58724                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
58725
58726                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
58727                        <bitRange>[1:1]</bitRange>
58728                        <access>read-write</access>
58729                    </field>
58730                    <field>
58731                        <name>EN</name>
58732                        <description>DMA Channel Enable.
58733                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
58734                        <bitRange>[0:0]</bitRange>
58735                        <access>read-write</access>
58736                    </field>
58737                </fields>
58738            </register>
58739            <register>
58740                <name>CH11_AL1_CTRL</name>
58741                <addressOffset>0x000002d0</addressOffset>
58742                <description>Alias for channel 11 CTRL register</description>
58743                <resetMask>0x00000000</resetMask>
58744                <fields>
58745                    <field>
58746                        <name>CH11_AL1_CTRL</name>
58747                        <bitRange>[31:0]</bitRange>
58748                        <access>read-write</access>
58749                    </field>
58750                </fields>
58751            </register>
58752            <register>
58753                <name>CH11_AL1_READ_ADDR</name>
58754                <addressOffset>0x000002d4</addressOffset>
58755                <description>Alias for channel 11 READ_ADDR register</description>
58756                <resetMask>0x00000000</resetMask>
58757                <fields>
58758                    <field>
58759                        <name>CH11_AL1_READ_ADDR</name>
58760                        <bitRange>[31:0]</bitRange>
58761                        <access>read-write</access>
58762                    </field>
58763                </fields>
58764            </register>
58765            <register>
58766                <name>CH11_AL1_WRITE_ADDR</name>
58767                <addressOffset>0x000002d8</addressOffset>
58768                <description>Alias for channel 11 WRITE_ADDR register</description>
58769                <resetMask>0x00000000</resetMask>
58770                <fields>
58771                    <field>
58772                        <name>CH11_AL1_WRITE_ADDR</name>
58773                        <bitRange>[31:0]</bitRange>
58774                        <access>read-write</access>
58775                    </field>
58776                </fields>
58777            </register>
58778            <register>
58779                <name>CH11_AL1_TRANS_COUNT_TRIG</name>
58780                <addressOffset>0x000002dc</addressOffset>
58781                <description>Alias for channel 11 TRANS_COUNT register
58782                    This is a trigger register (0xc). Writing a nonzero value will
58783                    reload the channel counter and start the channel.</description>
58784                <resetMask>0x00000000</resetMask>
58785                <fields>
58786                    <field>
58787                        <name>CH11_AL1_TRANS_COUNT_TRIG</name>
58788                        <bitRange>[31:0]</bitRange>
58789                        <access>read-write</access>
58790                    </field>
58791                </fields>
58792            </register>
58793            <register>
58794                <name>CH11_AL2_CTRL</name>
58795                <addressOffset>0x000002e0</addressOffset>
58796                <description>Alias for channel 11 CTRL register</description>
58797                <resetMask>0x00000000</resetMask>
58798                <fields>
58799                    <field>
58800                        <name>CH11_AL2_CTRL</name>
58801                        <bitRange>[31:0]</bitRange>
58802                        <access>read-write</access>
58803                    </field>
58804                </fields>
58805            </register>
58806            <register>
58807                <name>CH11_AL2_TRANS_COUNT</name>
58808                <addressOffset>0x000002e4</addressOffset>
58809                <description>Alias for channel 11 TRANS_COUNT register</description>
58810                <resetMask>0x00000000</resetMask>
58811                <fields>
58812                    <field>
58813                        <name>CH11_AL2_TRANS_COUNT</name>
58814                        <bitRange>[31:0]</bitRange>
58815                        <access>read-write</access>
58816                    </field>
58817                </fields>
58818            </register>
58819            <register>
58820                <name>CH11_AL2_READ_ADDR</name>
58821                <addressOffset>0x000002e8</addressOffset>
58822                <description>Alias for channel 11 READ_ADDR register</description>
58823                <resetMask>0x00000000</resetMask>
58824                <fields>
58825                    <field>
58826                        <name>CH11_AL2_READ_ADDR</name>
58827                        <bitRange>[31:0]</bitRange>
58828                        <access>read-write</access>
58829                    </field>
58830                </fields>
58831            </register>
58832            <register>
58833                <name>CH11_AL2_WRITE_ADDR_TRIG</name>
58834                <addressOffset>0x000002ec</addressOffset>
58835                <description>Alias for channel 11 WRITE_ADDR register
58836                    This is a trigger register (0xc). Writing a nonzero value will
58837                    reload the channel counter and start the channel.</description>
58838                <resetMask>0x00000000</resetMask>
58839                <fields>
58840                    <field>
58841                        <name>CH11_AL2_WRITE_ADDR_TRIG</name>
58842                        <bitRange>[31:0]</bitRange>
58843                        <access>read-write</access>
58844                    </field>
58845                </fields>
58846            </register>
58847            <register>
58848                <name>CH11_AL3_CTRL</name>
58849                <addressOffset>0x000002f0</addressOffset>
58850                <description>Alias for channel 11 CTRL register</description>
58851                <resetMask>0x00000000</resetMask>
58852                <fields>
58853                    <field>
58854                        <name>CH11_AL3_CTRL</name>
58855                        <bitRange>[31:0]</bitRange>
58856                        <access>read-write</access>
58857                    </field>
58858                </fields>
58859            </register>
58860            <register>
58861                <name>CH11_AL3_WRITE_ADDR</name>
58862                <addressOffset>0x000002f4</addressOffset>
58863                <description>Alias for channel 11 WRITE_ADDR register</description>
58864                <resetMask>0x00000000</resetMask>
58865                <fields>
58866                    <field>
58867                        <name>CH11_AL3_WRITE_ADDR</name>
58868                        <bitRange>[31:0]</bitRange>
58869                        <access>read-write</access>
58870                    </field>
58871                </fields>
58872            </register>
58873            <register>
58874                <name>CH11_AL3_TRANS_COUNT</name>
58875                <addressOffset>0x000002f8</addressOffset>
58876                <description>Alias for channel 11 TRANS_COUNT register</description>
58877                <resetMask>0x00000000</resetMask>
58878                <fields>
58879                    <field>
58880                        <name>CH11_AL3_TRANS_COUNT</name>
58881                        <bitRange>[31:0]</bitRange>
58882                        <access>read-write</access>
58883                    </field>
58884                </fields>
58885            </register>
58886            <register>
58887                <name>CH11_AL3_READ_ADDR_TRIG</name>
58888                <addressOffset>0x000002fc</addressOffset>
58889                <description>Alias for channel 11 READ_ADDR register
58890                    This is a trigger register (0xc). Writing a nonzero value will
58891                    reload the channel counter and start the channel.</description>
58892                <resetMask>0x00000000</resetMask>
58893                <fields>
58894                    <field>
58895                        <name>CH11_AL3_READ_ADDR_TRIG</name>
58896                        <bitRange>[31:0]</bitRange>
58897                        <access>read-write</access>
58898                    </field>
58899                </fields>
58900            </register>
58901            <register>
58902                <name>CH12_READ_ADDR</name>
58903                <addressOffset>0x00000300</addressOffset>
58904                <description>DMA Channel 12 Read Address pointer</description>
58905                <resetValue>0x00000000</resetValue>
58906                <fields>
58907                    <field>
58908                        <name>CH12_READ_ADDR</name>
58909                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
58910                        <bitRange>[31:0]</bitRange>
58911                        <access>read-write</access>
58912                    </field>
58913                </fields>
58914            </register>
58915            <register>
58916                <name>CH12_WRITE_ADDR</name>
58917                <addressOffset>0x00000304</addressOffset>
58918                <description>DMA Channel 12 Write Address pointer</description>
58919                <resetValue>0x00000000</resetValue>
58920                <fields>
58921                    <field>
58922                        <name>CH12_WRITE_ADDR</name>
58923                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
58924                        <bitRange>[31:0]</bitRange>
58925                        <access>read-write</access>
58926                    </field>
58927                </fields>
58928            </register>
58929            <register>
58930                <name>CH12_TRANS_COUNT</name>
58931                <addressOffset>0x00000308</addressOffset>
58932                <description>DMA Channel 12 Transfer Count</description>
58933                <resetValue>0x00000000</resetValue>
58934                <fields>
58935                    <field>
58936                        <name>MODE</name>
58937                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
58938
58939                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
58940
58941                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
58942
58943                            All other values are reserved.</description>
58944                        <bitRange>[31:28]</bitRange>
58945                        <access>read-write</access>
58946                        <enumeratedValues>
58947                            <enumeratedValue>
58948                                <name>NORMAL</name>
58949                                <value>0</value>
58950                            </enumeratedValue>
58951                            <enumeratedValue>
58952                                <name>TRIGGER_SELF</name>
58953                                <value>1</value>
58954                            </enumeratedValue>
58955                            <enumeratedValue>
58956                                <name>ENDLESS</name>
58957                                <value>15</value>
58958                            </enumeratedValue>
58959                        </enumeratedValues>
58960                    </field>
58961                    <field>
58962                        <name>COUNT</name>
58963                        <description>28-bit transfer count (256 million transfers maximum).
58964
58965                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
58966
58967                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
58968
58969                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
58970
58971                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
58972                        <bitRange>[27:0]</bitRange>
58973                        <access>read-write</access>
58974                    </field>
58975                </fields>
58976            </register>
58977            <register>
58978                <name>CH12_CTRL_TRIG</name>
58979                <addressOffset>0x0000030c</addressOffset>
58980                <description>DMA Channel 12 Control and Status</description>
58981                <resetValue>0x00000000</resetValue>
58982                <fields>
58983                    <field>
58984                        <name>AHB_ERROR</name>
58985                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
58986                        <bitRange>[31:31]</bitRange>
58987                        <access>read-only</access>
58988                    </field>
58989                    <field>
58990                        <name>READ_ERROR</name>
58991                        <description>If 1, the channel received a read bus error. Write one to clear.
58992                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
58993                        <bitRange>[30:30]</bitRange>
58994                        <access>read-write</access>
58995                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
58996                    </field>
58997                    <field>
58998                        <name>WRITE_ERROR</name>
58999                        <description>If 1, the channel received a write bus error. Write one to clear.
59000                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
59001                        <bitRange>[29:29]</bitRange>
59002                        <access>read-write</access>
59003                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
59004                    </field>
59005                    <field>
59006                        <name>BUSY</name>
59007                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
59008
59009                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
59010                        <bitRange>[26:26]</bitRange>
59011                        <access>read-only</access>
59012                    </field>
59013                    <field>
59014                        <name>SNIFF_EN</name>
59015                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
59016
59017                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
59018                        <bitRange>[25:25]</bitRange>
59019                        <access>read-write</access>
59020                    </field>
59021                    <field>
59022                        <name>BSWAP</name>
59023                        <description>Apply byte-swap transformation to DMA data.
59024                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
59025                        <bitRange>[24:24]</bitRange>
59026                        <access>read-write</access>
59027                    </field>
59028                    <field>
59029                        <name>IRQ_QUIET</name>
59030                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
59031
59032                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
59033                        <bitRange>[23:23]</bitRange>
59034                        <access>read-write</access>
59035                    </field>
59036                    <field>
59037                        <name>TREQ_SEL</name>
59038                        <description>Select a Transfer Request signal.
59039                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
59040                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
59041                        <bitRange>[22:17]</bitRange>
59042                        <access>read-write</access>
59043                        <enumeratedValues>
59044                            <enumeratedValue>
59045                                <name>PIO0_TX0</name>
59046                                <value>0</value>
59047                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
59048                            </enumeratedValue>
59049                            <enumeratedValue>
59050                                <name>PIO0_TX1</name>
59051                                <value>1</value>
59052                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
59053                            </enumeratedValue>
59054                            <enumeratedValue>
59055                                <name>PIO0_TX2</name>
59056                                <value>2</value>
59057                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
59058                            </enumeratedValue>
59059                            <enumeratedValue>
59060                                <name>PIO0_TX3</name>
59061                                <value>3</value>
59062                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
59063                            </enumeratedValue>
59064                            <enumeratedValue>
59065                                <name>PIO0_RX0</name>
59066                                <value>4</value>
59067                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
59068                            </enumeratedValue>
59069                            <enumeratedValue>
59070                                <name>PIO0_RX1</name>
59071                                <value>5</value>
59072                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
59073                            </enumeratedValue>
59074                            <enumeratedValue>
59075                                <name>PIO0_RX2</name>
59076                                <value>6</value>
59077                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
59078                            </enumeratedValue>
59079                            <enumeratedValue>
59080                                <name>PIO0_RX3</name>
59081                                <value>7</value>
59082                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
59083                            </enumeratedValue>
59084                            <enumeratedValue>
59085                                <name>PIO1_TX0</name>
59086                                <value>8</value>
59087                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
59088                            </enumeratedValue>
59089                            <enumeratedValue>
59090                                <name>PIO1_TX1</name>
59091                                <value>9</value>
59092                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
59093                            </enumeratedValue>
59094                            <enumeratedValue>
59095                                <name>PIO1_TX2</name>
59096                                <value>10</value>
59097                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
59098                            </enumeratedValue>
59099                            <enumeratedValue>
59100                                <name>PIO1_TX3</name>
59101                                <value>11</value>
59102                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
59103                            </enumeratedValue>
59104                            <enumeratedValue>
59105                                <name>PIO1_RX0</name>
59106                                <value>12</value>
59107                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
59108                            </enumeratedValue>
59109                            <enumeratedValue>
59110                                <name>PIO1_RX1</name>
59111                                <value>13</value>
59112                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
59113                            </enumeratedValue>
59114                            <enumeratedValue>
59115                                <name>PIO1_RX2</name>
59116                                <value>14</value>
59117                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
59118                            </enumeratedValue>
59119                            <enumeratedValue>
59120                                <name>PIO1_RX3</name>
59121                                <value>15</value>
59122                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
59123                            </enumeratedValue>
59124                            <enumeratedValue>
59125                                <name>PIO2_TX0</name>
59126                                <value>16</value>
59127                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
59128                            </enumeratedValue>
59129                            <enumeratedValue>
59130                                <name>PIO2_TX1</name>
59131                                <value>17</value>
59132                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
59133                            </enumeratedValue>
59134                            <enumeratedValue>
59135                                <name>PIO2_TX2</name>
59136                                <value>18</value>
59137                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
59138                            </enumeratedValue>
59139                            <enumeratedValue>
59140                                <name>PIO2_TX3</name>
59141                                <value>19</value>
59142                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
59143                            </enumeratedValue>
59144                            <enumeratedValue>
59145                                <name>PIO2_RX0</name>
59146                                <value>20</value>
59147                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
59148                            </enumeratedValue>
59149                            <enumeratedValue>
59150                                <name>PIO2_RX1</name>
59151                                <value>21</value>
59152                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
59153                            </enumeratedValue>
59154                            <enumeratedValue>
59155                                <name>PIO2_RX2</name>
59156                                <value>22</value>
59157                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
59158                            </enumeratedValue>
59159                            <enumeratedValue>
59160                                <name>PIO2_RX3</name>
59161                                <value>23</value>
59162                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
59163                            </enumeratedValue>
59164                            <enumeratedValue>
59165                                <name>SPI0_TX</name>
59166                                <value>24</value>
59167                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
59168                            </enumeratedValue>
59169                            <enumeratedValue>
59170                                <name>SPI0_RX</name>
59171                                <value>25</value>
59172                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
59173                            </enumeratedValue>
59174                            <enumeratedValue>
59175                                <name>SPI1_TX</name>
59176                                <value>26</value>
59177                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
59178                            </enumeratedValue>
59179                            <enumeratedValue>
59180                                <name>SPI1_RX</name>
59181                                <value>27</value>
59182                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
59183                            </enumeratedValue>
59184                            <enumeratedValue>
59185                                <name>UART0_TX</name>
59186                                <value>28</value>
59187                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
59188                            </enumeratedValue>
59189                            <enumeratedValue>
59190                                <name>UART0_RX</name>
59191                                <value>29</value>
59192                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
59193                            </enumeratedValue>
59194                            <enumeratedValue>
59195                                <name>UART1_TX</name>
59196                                <value>30</value>
59197                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
59198                            </enumeratedValue>
59199                            <enumeratedValue>
59200                                <name>UART1_RX</name>
59201                                <value>31</value>
59202                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
59203                            </enumeratedValue>
59204                            <enumeratedValue>
59205                                <name>PWM_WRAP0</name>
59206                                <value>32</value>
59207                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
59208                            </enumeratedValue>
59209                            <enumeratedValue>
59210                                <name>PWM_WRAP1</name>
59211                                <value>33</value>
59212                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
59213                            </enumeratedValue>
59214                            <enumeratedValue>
59215                                <name>PWM_WRAP2</name>
59216                                <value>34</value>
59217                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
59218                            </enumeratedValue>
59219                            <enumeratedValue>
59220                                <name>PWM_WRAP3</name>
59221                                <value>35</value>
59222                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
59223                            </enumeratedValue>
59224                            <enumeratedValue>
59225                                <name>PWM_WRAP4</name>
59226                                <value>36</value>
59227                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
59228                            </enumeratedValue>
59229                            <enumeratedValue>
59230                                <name>PWM_WRAP5</name>
59231                                <value>37</value>
59232                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
59233                            </enumeratedValue>
59234                            <enumeratedValue>
59235                                <name>PWM_WRAP6</name>
59236                                <value>38</value>
59237                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
59238                            </enumeratedValue>
59239                            <enumeratedValue>
59240                                <name>PWM_WRAP7</name>
59241                                <value>39</value>
59242                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
59243                            </enumeratedValue>
59244                            <enumeratedValue>
59245                                <name>PWM_WRAP8</name>
59246                                <value>40</value>
59247                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
59248                            </enumeratedValue>
59249                            <enumeratedValue>
59250                                <name>PWM_WRAP9</name>
59251                                <value>41</value>
59252                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
59253                            </enumeratedValue>
59254                            <enumeratedValue>
59255                                <name>PWM_WRAP10</name>
59256                                <value>42</value>
59257                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
59258                            </enumeratedValue>
59259                            <enumeratedValue>
59260                                <name>PWM_WRAP11</name>
59261                                <value>43</value>
59262                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
59263                            </enumeratedValue>
59264                            <enumeratedValue>
59265                                <name>I2C0_TX</name>
59266                                <value>44</value>
59267                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
59268                            </enumeratedValue>
59269                            <enumeratedValue>
59270                                <name>I2C0_RX</name>
59271                                <value>45</value>
59272                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
59273                            </enumeratedValue>
59274                            <enumeratedValue>
59275                                <name>I2C1_TX</name>
59276                                <value>46</value>
59277                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
59278                            </enumeratedValue>
59279                            <enumeratedValue>
59280                                <name>I2C1_RX</name>
59281                                <value>47</value>
59282                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
59283                            </enumeratedValue>
59284                            <enumeratedValue>
59285                                <name>ADC</name>
59286                                <value>48</value>
59287                                <description>Select the ADC as TREQ</description>
59288                            </enumeratedValue>
59289                            <enumeratedValue>
59290                                <name>XIP_STREAM</name>
59291                                <value>49</value>
59292                                <description>Select the XIP Streaming FIFO as TREQ</description>
59293                            </enumeratedValue>
59294                            <enumeratedValue>
59295                                <name>XIP_QMITX</name>
59296                                <value>50</value>
59297                                <description>Select XIP_QMITX as TREQ</description>
59298                            </enumeratedValue>
59299                            <enumeratedValue>
59300                                <name>XIP_QMIRX</name>
59301                                <value>51</value>
59302                                <description>Select XIP_QMIRX as TREQ</description>
59303                            </enumeratedValue>
59304                            <enumeratedValue>
59305                                <name>HSTX</name>
59306                                <value>52</value>
59307                                <description>Select HSTX as TREQ</description>
59308                            </enumeratedValue>
59309                            <enumeratedValue>
59310                                <name>CORESIGHT</name>
59311                                <value>53</value>
59312                                <description>Select CORESIGHT as TREQ</description>
59313                            </enumeratedValue>
59314                            <enumeratedValue>
59315                                <name>SHA256</name>
59316                                <value>54</value>
59317                                <description>Select SHA256 as TREQ</description>
59318                            </enumeratedValue>
59319                            <enumeratedValue>
59320                                <name>TIMER0</name>
59321                                <value>59</value>
59322                                <description>Select Timer 0 as TREQ</description>
59323                            </enumeratedValue>
59324                            <enumeratedValue>
59325                                <name>TIMER1</name>
59326                                <value>60</value>
59327                                <description>Select Timer 1 as TREQ</description>
59328                            </enumeratedValue>
59329                            <enumeratedValue>
59330                                <name>TIMER2</name>
59331                                <value>61</value>
59332                                <description>Select Timer 2 as TREQ (Optional)</description>
59333                            </enumeratedValue>
59334                            <enumeratedValue>
59335                                <name>TIMER3</name>
59336                                <value>62</value>
59337                                <description>Select Timer 3 as TREQ (Optional)</description>
59338                            </enumeratedValue>
59339                            <enumeratedValue>
59340                                <name>PERMANENT</name>
59341                                <value>63</value>
59342                                <description>Permanent request, for unpaced transfers.</description>
59343                            </enumeratedValue>
59344                        </enumeratedValues>
59345                    </field>
59346                    <field>
59347                        <name>CHAIN_TO</name>
59348                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
59349
59350                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
59351                        <bitRange>[16:13]</bitRange>
59352                        <access>read-write</access>
59353                    </field>
59354                    <field>
59355                        <name>RING_SEL</name>
59356                        <description>Select whether RING_SIZE applies to read or write addresses.
59357                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
59358                        <bitRange>[12:12]</bitRange>
59359                        <access>read-write</access>
59360                    </field>
59361                    <field>
59362                        <name>RING_SIZE</name>
59363                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
59364
59365                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
59366                        <bitRange>[11:8]</bitRange>
59367                        <access>read-write</access>
59368                        <enumeratedValues>
59369                            <enumeratedValue>
59370                                <name>RING_NONE</name>
59371                                <value>0</value>
59372                            </enumeratedValue>
59373                        </enumeratedValues>
59374                    </field>
59375                    <field>
59376                        <name>INCR_WRITE_REV</name>
59377                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
59378
59379                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
59380                        <bitRange>[7:7]</bitRange>
59381                        <access>read-write</access>
59382                    </field>
59383                    <field>
59384                        <name>INCR_WRITE</name>
59385                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
59386
59387                            Generally this should be disabled for memory-to-peripheral transfers.</description>
59388                        <bitRange>[6:6]</bitRange>
59389                        <access>read-write</access>
59390                    </field>
59391                    <field>
59392                        <name>INCR_READ_REV</name>
59393                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
59394
59395                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
59396                        <bitRange>[5:5]</bitRange>
59397                        <access>read-write</access>
59398                    </field>
59399                    <field>
59400                        <name>INCR_READ</name>
59401                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
59402
59403                            Generally this should be disabled for peripheral-to-memory transfers.</description>
59404                        <bitRange>[4:4]</bitRange>
59405                        <access>read-write</access>
59406                    </field>
59407                    <field>
59408                        <name>DATA_SIZE</name>
59409                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
59410                        <bitRange>[3:2]</bitRange>
59411                        <access>read-write</access>
59412                        <enumeratedValues>
59413                            <enumeratedValue>
59414                                <name>SIZE_BYTE</name>
59415                                <value>0</value>
59416                            </enumeratedValue>
59417                            <enumeratedValue>
59418                                <name>SIZE_HALFWORD</name>
59419                                <value>1</value>
59420                            </enumeratedValue>
59421                            <enumeratedValue>
59422                                <name>SIZE_WORD</name>
59423                                <value>2</value>
59424                            </enumeratedValue>
59425                        </enumeratedValues>
59426                    </field>
59427                    <field>
59428                        <name>HIGH_PRIORITY</name>
59429                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
59430
59431                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
59432                        <bitRange>[1:1]</bitRange>
59433                        <access>read-write</access>
59434                    </field>
59435                    <field>
59436                        <name>EN</name>
59437                        <description>DMA Channel Enable.
59438                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
59439                        <bitRange>[0:0]</bitRange>
59440                        <access>read-write</access>
59441                    </field>
59442                </fields>
59443            </register>
59444            <register>
59445                <name>CH12_AL1_CTRL</name>
59446                <addressOffset>0x00000310</addressOffset>
59447                <description>Alias for channel 12 CTRL register</description>
59448                <resetMask>0x00000000</resetMask>
59449                <fields>
59450                    <field>
59451                        <name>CH12_AL1_CTRL</name>
59452                        <bitRange>[31:0]</bitRange>
59453                        <access>read-write</access>
59454                    </field>
59455                </fields>
59456            </register>
59457            <register>
59458                <name>CH12_AL1_READ_ADDR</name>
59459                <addressOffset>0x00000314</addressOffset>
59460                <description>Alias for channel 12 READ_ADDR register</description>
59461                <resetMask>0x00000000</resetMask>
59462                <fields>
59463                    <field>
59464                        <name>CH12_AL1_READ_ADDR</name>
59465                        <bitRange>[31:0]</bitRange>
59466                        <access>read-write</access>
59467                    </field>
59468                </fields>
59469            </register>
59470            <register>
59471                <name>CH12_AL1_WRITE_ADDR</name>
59472                <addressOffset>0x00000318</addressOffset>
59473                <description>Alias for channel 12 WRITE_ADDR register</description>
59474                <resetMask>0x00000000</resetMask>
59475                <fields>
59476                    <field>
59477                        <name>CH12_AL1_WRITE_ADDR</name>
59478                        <bitRange>[31:0]</bitRange>
59479                        <access>read-write</access>
59480                    </field>
59481                </fields>
59482            </register>
59483            <register>
59484                <name>CH12_AL1_TRANS_COUNT_TRIG</name>
59485                <addressOffset>0x0000031c</addressOffset>
59486                <description>Alias for channel 12 TRANS_COUNT register
59487                    This is a trigger register (0xc). Writing a nonzero value will
59488                    reload the channel counter and start the channel.</description>
59489                <resetMask>0x00000000</resetMask>
59490                <fields>
59491                    <field>
59492                        <name>CH12_AL1_TRANS_COUNT_TRIG</name>
59493                        <bitRange>[31:0]</bitRange>
59494                        <access>read-write</access>
59495                    </field>
59496                </fields>
59497            </register>
59498            <register>
59499                <name>CH12_AL2_CTRL</name>
59500                <addressOffset>0x00000320</addressOffset>
59501                <description>Alias for channel 12 CTRL register</description>
59502                <resetMask>0x00000000</resetMask>
59503                <fields>
59504                    <field>
59505                        <name>CH12_AL2_CTRL</name>
59506                        <bitRange>[31:0]</bitRange>
59507                        <access>read-write</access>
59508                    </field>
59509                </fields>
59510            </register>
59511            <register>
59512                <name>CH12_AL2_TRANS_COUNT</name>
59513                <addressOffset>0x00000324</addressOffset>
59514                <description>Alias for channel 12 TRANS_COUNT register</description>
59515                <resetMask>0x00000000</resetMask>
59516                <fields>
59517                    <field>
59518                        <name>CH12_AL2_TRANS_COUNT</name>
59519                        <bitRange>[31:0]</bitRange>
59520                        <access>read-write</access>
59521                    </field>
59522                </fields>
59523            </register>
59524            <register>
59525                <name>CH12_AL2_READ_ADDR</name>
59526                <addressOffset>0x00000328</addressOffset>
59527                <description>Alias for channel 12 READ_ADDR register</description>
59528                <resetMask>0x00000000</resetMask>
59529                <fields>
59530                    <field>
59531                        <name>CH12_AL2_READ_ADDR</name>
59532                        <bitRange>[31:0]</bitRange>
59533                        <access>read-write</access>
59534                    </field>
59535                </fields>
59536            </register>
59537            <register>
59538                <name>CH12_AL2_WRITE_ADDR_TRIG</name>
59539                <addressOffset>0x0000032c</addressOffset>
59540                <description>Alias for channel 12 WRITE_ADDR register
59541                    This is a trigger register (0xc). Writing a nonzero value will
59542                    reload the channel counter and start the channel.</description>
59543                <resetMask>0x00000000</resetMask>
59544                <fields>
59545                    <field>
59546                        <name>CH12_AL2_WRITE_ADDR_TRIG</name>
59547                        <bitRange>[31:0]</bitRange>
59548                        <access>read-write</access>
59549                    </field>
59550                </fields>
59551            </register>
59552            <register>
59553                <name>CH12_AL3_CTRL</name>
59554                <addressOffset>0x00000330</addressOffset>
59555                <description>Alias for channel 12 CTRL register</description>
59556                <resetMask>0x00000000</resetMask>
59557                <fields>
59558                    <field>
59559                        <name>CH12_AL3_CTRL</name>
59560                        <bitRange>[31:0]</bitRange>
59561                        <access>read-write</access>
59562                    </field>
59563                </fields>
59564            </register>
59565            <register>
59566                <name>CH12_AL3_WRITE_ADDR</name>
59567                <addressOffset>0x00000334</addressOffset>
59568                <description>Alias for channel 12 WRITE_ADDR register</description>
59569                <resetMask>0x00000000</resetMask>
59570                <fields>
59571                    <field>
59572                        <name>CH12_AL3_WRITE_ADDR</name>
59573                        <bitRange>[31:0]</bitRange>
59574                        <access>read-write</access>
59575                    </field>
59576                </fields>
59577            </register>
59578            <register>
59579                <name>CH12_AL3_TRANS_COUNT</name>
59580                <addressOffset>0x00000338</addressOffset>
59581                <description>Alias for channel 12 TRANS_COUNT register</description>
59582                <resetMask>0x00000000</resetMask>
59583                <fields>
59584                    <field>
59585                        <name>CH12_AL3_TRANS_COUNT</name>
59586                        <bitRange>[31:0]</bitRange>
59587                        <access>read-write</access>
59588                    </field>
59589                </fields>
59590            </register>
59591            <register>
59592                <name>CH12_AL3_READ_ADDR_TRIG</name>
59593                <addressOffset>0x0000033c</addressOffset>
59594                <description>Alias for channel 12 READ_ADDR register
59595                    This is a trigger register (0xc). Writing a nonzero value will
59596                    reload the channel counter and start the channel.</description>
59597                <resetMask>0x00000000</resetMask>
59598                <fields>
59599                    <field>
59600                        <name>CH12_AL3_READ_ADDR_TRIG</name>
59601                        <bitRange>[31:0]</bitRange>
59602                        <access>read-write</access>
59603                    </field>
59604                </fields>
59605            </register>
59606            <register>
59607                <name>CH13_READ_ADDR</name>
59608                <addressOffset>0x00000340</addressOffset>
59609                <description>DMA Channel 13 Read Address pointer</description>
59610                <resetValue>0x00000000</resetValue>
59611                <fields>
59612                    <field>
59613                        <name>CH13_READ_ADDR</name>
59614                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
59615                        <bitRange>[31:0]</bitRange>
59616                        <access>read-write</access>
59617                    </field>
59618                </fields>
59619            </register>
59620            <register>
59621                <name>CH13_WRITE_ADDR</name>
59622                <addressOffset>0x00000344</addressOffset>
59623                <description>DMA Channel 13 Write Address pointer</description>
59624                <resetValue>0x00000000</resetValue>
59625                <fields>
59626                    <field>
59627                        <name>CH13_WRITE_ADDR</name>
59628                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
59629                        <bitRange>[31:0]</bitRange>
59630                        <access>read-write</access>
59631                    </field>
59632                </fields>
59633            </register>
59634            <register>
59635                <name>CH13_TRANS_COUNT</name>
59636                <addressOffset>0x00000348</addressOffset>
59637                <description>DMA Channel 13 Transfer Count</description>
59638                <resetValue>0x00000000</resetValue>
59639                <fields>
59640                    <field>
59641                        <name>MODE</name>
59642                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
59643
59644                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
59645
59646                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
59647
59648                            All other values are reserved.</description>
59649                        <bitRange>[31:28]</bitRange>
59650                        <access>read-write</access>
59651                        <enumeratedValues>
59652                            <enumeratedValue>
59653                                <name>NORMAL</name>
59654                                <value>0</value>
59655                            </enumeratedValue>
59656                            <enumeratedValue>
59657                                <name>TRIGGER_SELF</name>
59658                                <value>1</value>
59659                            </enumeratedValue>
59660                            <enumeratedValue>
59661                                <name>ENDLESS</name>
59662                                <value>15</value>
59663                            </enumeratedValue>
59664                        </enumeratedValues>
59665                    </field>
59666                    <field>
59667                        <name>COUNT</name>
59668                        <description>28-bit transfer count (256 million transfers maximum).
59669
59670                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
59671
59672                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
59673
59674                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
59675
59676                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
59677                        <bitRange>[27:0]</bitRange>
59678                        <access>read-write</access>
59679                    </field>
59680                </fields>
59681            </register>
59682            <register>
59683                <name>CH13_CTRL_TRIG</name>
59684                <addressOffset>0x0000034c</addressOffset>
59685                <description>DMA Channel 13 Control and Status</description>
59686                <resetValue>0x00000000</resetValue>
59687                <fields>
59688                    <field>
59689                        <name>AHB_ERROR</name>
59690                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
59691                        <bitRange>[31:31]</bitRange>
59692                        <access>read-only</access>
59693                    </field>
59694                    <field>
59695                        <name>READ_ERROR</name>
59696                        <description>If 1, the channel received a read bus error. Write one to clear.
59697                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
59698                        <bitRange>[30:30]</bitRange>
59699                        <access>read-write</access>
59700                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
59701                    </field>
59702                    <field>
59703                        <name>WRITE_ERROR</name>
59704                        <description>If 1, the channel received a write bus error. Write one to clear.
59705                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
59706                        <bitRange>[29:29]</bitRange>
59707                        <access>read-write</access>
59708                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
59709                    </field>
59710                    <field>
59711                        <name>BUSY</name>
59712                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
59713
59714                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
59715                        <bitRange>[26:26]</bitRange>
59716                        <access>read-only</access>
59717                    </field>
59718                    <field>
59719                        <name>SNIFF_EN</name>
59720                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
59721
59722                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
59723                        <bitRange>[25:25]</bitRange>
59724                        <access>read-write</access>
59725                    </field>
59726                    <field>
59727                        <name>BSWAP</name>
59728                        <description>Apply byte-swap transformation to DMA data.
59729                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
59730                        <bitRange>[24:24]</bitRange>
59731                        <access>read-write</access>
59732                    </field>
59733                    <field>
59734                        <name>IRQ_QUIET</name>
59735                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
59736
59737                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
59738                        <bitRange>[23:23]</bitRange>
59739                        <access>read-write</access>
59740                    </field>
59741                    <field>
59742                        <name>TREQ_SEL</name>
59743                        <description>Select a Transfer Request signal.
59744                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
59745                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
59746                        <bitRange>[22:17]</bitRange>
59747                        <access>read-write</access>
59748                        <enumeratedValues>
59749                            <enumeratedValue>
59750                                <name>PIO0_TX0</name>
59751                                <value>0</value>
59752                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
59753                            </enumeratedValue>
59754                            <enumeratedValue>
59755                                <name>PIO0_TX1</name>
59756                                <value>1</value>
59757                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
59758                            </enumeratedValue>
59759                            <enumeratedValue>
59760                                <name>PIO0_TX2</name>
59761                                <value>2</value>
59762                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
59763                            </enumeratedValue>
59764                            <enumeratedValue>
59765                                <name>PIO0_TX3</name>
59766                                <value>3</value>
59767                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
59768                            </enumeratedValue>
59769                            <enumeratedValue>
59770                                <name>PIO0_RX0</name>
59771                                <value>4</value>
59772                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
59773                            </enumeratedValue>
59774                            <enumeratedValue>
59775                                <name>PIO0_RX1</name>
59776                                <value>5</value>
59777                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
59778                            </enumeratedValue>
59779                            <enumeratedValue>
59780                                <name>PIO0_RX2</name>
59781                                <value>6</value>
59782                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
59783                            </enumeratedValue>
59784                            <enumeratedValue>
59785                                <name>PIO0_RX3</name>
59786                                <value>7</value>
59787                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
59788                            </enumeratedValue>
59789                            <enumeratedValue>
59790                                <name>PIO1_TX0</name>
59791                                <value>8</value>
59792                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
59793                            </enumeratedValue>
59794                            <enumeratedValue>
59795                                <name>PIO1_TX1</name>
59796                                <value>9</value>
59797                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
59798                            </enumeratedValue>
59799                            <enumeratedValue>
59800                                <name>PIO1_TX2</name>
59801                                <value>10</value>
59802                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
59803                            </enumeratedValue>
59804                            <enumeratedValue>
59805                                <name>PIO1_TX3</name>
59806                                <value>11</value>
59807                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
59808                            </enumeratedValue>
59809                            <enumeratedValue>
59810                                <name>PIO1_RX0</name>
59811                                <value>12</value>
59812                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
59813                            </enumeratedValue>
59814                            <enumeratedValue>
59815                                <name>PIO1_RX1</name>
59816                                <value>13</value>
59817                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
59818                            </enumeratedValue>
59819                            <enumeratedValue>
59820                                <name>PIO1_RX2</name>
59821                                <value>14</value>
59822                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
59823                            </enumeratedValue>
59824                            <enumeratedValue>
59825                                <name>PIO1_RX3</name>
59826                                <value>15</value>
59827                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
59828                            </enumeratedValue>
59829                            <enumeratedValue>
59830                                <name>PIO2_TX0</name>
59831                                <value>16</value>
59832                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
59833                            </enumeratedValue>
59834                            <enumeratedValue>
59835                                <name>PIO2_TX1</name>
59836                                <value>17</value>
59837                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
59838                            </enumeratedValue>
59839                            <enumeratedValue>
59840                                <name>PIO2_TX2</name>
59841                                <value>18</value>
59842                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
59843                            </enumeratedValue>
59844                            <enumeratedValue>
59845                                <name>PIO2_TX3</name>
59846                                <value>19</value>
59847                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
59848                            </enumeratedValue>
59849                            <enumeratedValue>
59850                                <name>PIO2_RX0</name>
59851                                <value>20</value>
59852                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
59853                            </enumeratedValue>
59854                            <enumeratedValue>
59855                                <name>PIO2_RX1</name>
59856                                <value>21</value>
59857                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
59858                            </enumeratedValue>
59859                            <enumeratedValue>
59860                                <name>PIO2_RX2</name>
59861                                <value>22</value>
59862                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
59863                            </enumeratedValue>
59864                            <enumeratedValue>
59865                                <name>PIO2_RX3</name>
59866                                <value>23</value>
59867                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
59868                            </enumeratedValue>
59869                            <enumeratedValue>
59870                                <name>SPI0_TX</name>
59871                                <value>24</value>
59872                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
59873                            </enumeratedValue>
59874                            <enumeratedValue>
59875                                <name>SPI0_RX</name>
59876                                <value>25</value>
59877                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
59878                            </enumeratedValue>
59879                            <enumeratedValue>
59880                                <name>SPI1_TX</name>
59881                                <value>26</value>
59882                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
59883                            </enumeratedValue>
59884                            <enumeratedValue>
59885                                <name>SPI1_RX</name>
59886                                <value>27</value>
59887                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
59888                            </enumeratedValue>
59889                            <enumeratedValue>
59890                                <name>UART0_TX</name>
59891                                <value>28</value>
59892                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
59893                            </enumeratedValue>
59894                            <enumeratedValue>
59895                                <name>UART0_RX</name>
59896                                <value>29</value>
59897                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
59898                            </enumeratedValue>
59899                            <enumeratedValue>
59900                                <name>UART1_TX</name>
59901                                <value>30</value>
59902                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
59903                            </enumeratedValue>
59904                            <enumeratedValue>
59905                                <name>UART1_RX</name>
59906                                <value>31</value>
59907                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
59908                            </enumeratedValue>
59909                            <enumeratedValue>
59910                                <name>PWM_WRAP0</name>
59911                                <value>32</value>
59912                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
59913                            </enumeratedValue>
59914                            <enumeratedValue>
59915                                <name>PWM_WRAP1</name>
59916                                <value>33</value>
59917                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
59918                            </enumeratedValue>
59919                            <enumeratedValue>
59920                                <name>PWM_WRAP2</name>
59921                                <value>34</value>
59922                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
59923                            </enumeratedValue>
59924                            <enumeratedValue>
59925                                <name>PWM_WRAP3</name>
59926                                <value>35</value>
59927                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
59928                            </enumeratedValue>
59929                            <enumeratedValue>
59930                                <name>PWM_WRAP4</name>
59931                                <value>36</value>
59932                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
59933                            </enumeratedValue>
59934                            <enumeratedValue>
59935                                <name>PWM_WRAP5</name>
59936                                <value>37</value>
59937                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
59938                            </enumeratedValue>
59939                            <enumeratedValue>
59940                                <name>PWM_WRAP6</name>
59941                                <value>38</value>
59942                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
59943                            </enumeratedValue>
59944                            <enumeratedValue>
59945                                <name>PWM_WRAP7</name>
59946                                <value>39</value>
59947                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
59948                            </enumeratedValue>
59949                            <enumeratedValue>
59950                                <name>PWM_WRAP8</name>
59951                                <value>40</value>
59952                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
59953                            </enumeratedValue>
59954                            <enumeratedValue>
59955                                <name>PWM_WRAP9</name>
59956                                <value>41</value>
59957                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
59958                            </enumeratedValue>
59959                            <enumeratedValue>
59960                                <name>PWM_WRAP10</name>
59961                                <value>42</value>
59962                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
59963                            </enumeratedValue>
59964                            <enumeratedValue>
59965                                <name>PWM_WRAP11</name>
59966                                <value>43</value>
59967                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
59968                            </enumeratedValue>
59969                            <enumeratedValue>
59970                                <name>I2C0_TX</name>
59971                                <value>44</value>
59972                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
59973                            </enumeratedValue>
59974                            <enumeratedValue>
59975                                <name>I2C0_RX</name>
59976                                <value>45</value>
59977                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
59978                            </enumeratedValue>
59979                            <enumeratedValue>
59980                                <name>I2C1_TX</name>
59981                                <value>46</value>
59982                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
59983                            </enumeratedValue>
59984                            <enumeratedValue>
59985                                <name>I2C1_RX</name>
59986                                <value>47</value>
59987                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
59988                            </enumeratedValue>
59989                            <enumeratedValue>
59990                                <name>ADC</name>
59991                                <value>48</value>
59992                                <description>Select the ADC as TREQ</description>
59993                            </enumeratedValue>
59994                            <enumeratedValue>
59995                                <name>XIP_STREAM</name>
59996                                <value>49</value>
59997                                <description>Select the XIP Streaming FIFO as TREQ</description>
59998                            </enumeratedValue>
59999                            <enumeratedValue>
60000                                <name>XIP_QMITX</name>
60001                                <value>50</value>
60002                                <description>Select XIP_QMITX as TREQ</description>
60003                            </enumeratedValue>
60004                            <enumeratedValue>
60005                                <name>XIP_QMIRX</name>
60006                                <value>51</value>
60007                                <description>Select XIP_QMIRX as TREQ</description>
60008                            </enumeratedValue>
60009                            <enumeratedValue>
60010                                <name>HSTX</name>
60011                                <value>52</value>
60012                                <description>Select HSTX as TREQ</description>
60013                            </enumeratedValue>
60014                            <enumeratedValue>
60015                                <name>CORESIGHT</name>
60016                                <value>53</value>
60017                                <description>Select CORESIGHT as TREQ</description>
60018                            </enumeratedValue>
60019                            <enumeratedValue>
60020                                <name>SHA256</name>
60021                                <value>54</value>
60022                                <description>Select SHA256 as TREQ</description>
60023                            </enumeratedValue>
60024                            <enumeratedValue>
60025                                <name>TIMER0</name>
60026                                <value>59</value>
60027                                <description>Select Timer 0 as TREQ</description>
60028                            </enumeratedValue>
60029                            <enumeratedValue>
60030                                <name>TIMER1</name>
60031                                <value>60</value>
60032                                <description>Select Timer 1 as TREQ</description>
60033                            </enumeratedValue>
60034                            <enumeratedValue>
60035                                <name>TIMER2</name>
60036                                <value>61</value>
60037                                <description>Select Timer 2 as TREQ (Optional)</description>
60038                            </enumeratedValue>
60039                            <enumeratedValue>
60040                                <name>TIMER3</name>
60041                                <value>62</value>
60042                                <description>Select Timer 3 as TREQ (Optional)</description>
60043                            </enumeratedValue>
60044                            <enumeratedValue>
60045                                <name>PERMANENT</name>
60046                                <value>63</value>
60047                                <description>Permanent request, for unpaced transfers.</description>
60048                            </enumeratedValue>
60049                        </enumeratedValues>
60050                    </field>
60051                    <field>
60052                        <name>CHAIN_TO</name>
60053                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
60054
60055                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
60056                        <bitRange>[16:13]</bitRange>
60057                        <access>read-write</access>
60058                    </field>
60059                    <field>
60060                        <name>RING_SEL</name>
60061                        <description>Select whether RING_SIZE applies to read or write addresses.
60062                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
60063                        <bitRange>[12:12]</bitRange>
60064                        <access>read-write</access>
60065                    </field>
60066                    <field>
60067                        <name>RING_SIZE</name>
60068                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
60069
60070                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
60071                        <bitRange>[11:8]</bitRange>
60072                        <access>read-write</access>
60073                        <enumeratedValues>
60074                            <enumeratedValue>
60075                                <name>RING_NONE</name>
60076                                <value>0</value>
60077                            </enumeratedValue>
60078                        </enumeratedValues>
60079                    </field>
60080                    <field>
60081                        <name>INCR_WRITE_REV</name>
60082                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
60083
60084                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
60085                        <bitRange>[7:7]</bitRange>
60086                        <access>read-write</access>
60087                    </field>
60088                    <field>
60089                        <name>INCR_WRITE</name>
60090                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
60091
60092                            Generally this should be disabled for memory-to-peripheral transfers.</description>
60093                        <bitRange>[6:6]</bitRange>
60094                        <access>read-write</access>
60095                    </field>
60096                    <field>
60097                        <name>INCR_READ_REV</name>
60098                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
60099
60100                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
60101                        <bitRange>[5:5]</bitRange>
60102                        <access>read-write</access>
60103                    </field>
60104                    <field>
60105                        <name>INCR_READ</name>
60106                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
60107
60108                            Generally this should be disabled for peripheral-to-memory transfers.</description>
60109                        <bitRange>[4:4]</bitRange>
60110                        <access>read-write</access>
60111                    </field>
60112                    <field>
60113                        <name>DATA_SIZE</name>
60114                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
60115                        <bitRange>[3:2]</bitRange>
60116                        <access>read-write</access>
60117                        <enumeratedValues>
60118                            <enumeratedValue>
60119                                <name>SIZE_BYTE</name>
60120                                <value>0</value>
60121                            </enumeratedValue>
60122                            <enumeratedValue>
60123                                <name>SIZE_HALFWORD</name>
60124                                <value>1</value>
60125                            </enumeratedValue>
60126                            <enumeratedValue>
60127                                <name>SIZE_WORD</name>
60128                                <value>2</value>
60129                            </enumeratedValue>
60130                        </enumeratedValues>
60131                    </field>
60132                    <field>
60133                        <name>HIGH_PRIORITY</name>
60134                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
60135
60136                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
60137                        <bitRange>[1:1]</bitRange>
60138                        <access>read-write</access>
60139                    </field>
60140                    <field>
60141                        <name>EN</name>
60142                        <description>DMA Channel Enable.
60143                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
60144                        <bitRange>[0:0]</bitRange>
60145                        <access>read-write</access>
60146                    </field>
60147                </fields>
60148            </register>
60149            <register>
60150                <name>CH13_AL1_CTRL</name>
60151                <addressOffset>0x00000350</addressOffset>
60152                <description>Alias for channel 13 CTRL register</description>
60153                <resetMask>0x00000000</resetMask>
60154                <fields>
60155                    <field>
60156                        <name>CH13_AL1_CTRL</name>
60157                        <bitRange>[31:0]</bitRange>
60158                        <access>read-write</access>
60159                    </field>
60160                </fields>
60161            </register>
60162            <register>
60163                <name>CH13_AL1_READ_ADDR</name>
60164                <addressOffset>0x00000354</addressOffset>
60165                <description>Alias for channel 13 READ_ADDR register</description>
60166                <resetMask>0x00000000</resetMask>
60167                <fields>
60168                    <field>
60169                        <name>CH13_AL1_READ_ADDR</name>
60170                        <bitRange>[31:0]</bitRange>
60171                        <access>read-write</access>
60172                    </field>
60173                </fields>
60174            </register>
60175            <register>
60176                <name>CH13_AL1_WRITE_ADDR</name>
60177                <addressOffset>0x00000358</addressOffset>
60178                <description>Alias for channel 13 WRITE_ADDR register</description>
60179                <resetMask>0x00000000</resetMask>
60180                <fields>
60181                    <field>
60182                        <name>CH13_AL1_WRITE_ADDR</name>
60183                        <bitRange>[31:0]</bitRange>
60184                        <access>read-write</access>
60185                    </field>
60186                </fields>
60187            </register>
60188            <register>
60189                <name>CH13_AL1_TRANS_COUNT_TRIG</name>
60190                <addressOffset>0x0000035c</addressOffset>
60191                <description>Alias for channel 13 TRANS_COUNT register
60192                    This is a trigger register (0xc). Writing a nonzero value will
60193                    reload the channel counter and start the channel.</description>
60194                <resetMask>0x00000000</resetMask>
60195                <fields>
60196                    <field>
60197                        <name>CH13_AL1_TRANS_COUNT_TRIG</name>
60198                        <bitRange>[31:0]</bitRange>
60199                        <access>read-write</access>
60200                    </field>
60201                </fields>
60202            </register>
60203            <register>
60204                <name>CH13_AL2_CTRL</name>
60205                <addressOffset>0x00000360</addressOffset>
60206                <description>Alias for channel 13 CTRL register</description>
60207                <resetMask>0x00000000</resetMask>
60208                <fields>
60209                    <field>
60210                        <name>CH13_AL2_CTRL</name>
60211                        <bitRange>[31:0]</bitRange>
60212                        <access>read-write</access>
60213                    </field>
60214                </fields>
60215            </register>
60216            <register>
60217                <name>CH13_AL2_TRANS_COUNT</name>
60218                <addressOffset>0x00000364</addressOffset>
60219                <description>Alias for channel 13 TRANS_COUNT register</description>
60220                <resetMask>0x00000000</resetMask>
60221                <fields>
60222                    <field>
60223                        <name>CH13_AL2_TRANS_COUNT</name>
60224                        <bitRange>[31:0]</bitRange>
60225                        <access>read-write</access>
60226                    </field>
60227                </fields>
60228            </register>
60229            <register>
60230                <name>CH13_AL2_READ_ADDR</name>
60231                <addressOffset>0x00000368</addressOffset>
60232                <description>Alias for channel 13 READ_ADDR register</description>
60233                <resetMask>0x00000000</resetMask>
60234                <fields>
60235                    <field>
60236                        <name>CH13_AL2_READ_ADDR</name>
60237                        <bitRange>[31:0]</bitRange>
60238                        <access>read-write</access>
60239                    </field>
60240                </fields>
60241            </register>
60242            <register>
60243                <name>CH13_AL2_WRITE_ADDR_TRIG</name>
60244                <addressOffset>0x0000036c</addressOffset>
60245                <description>Alias for channel 13 WRITE_ADDR register
60246                    This is a trigger register (0xc). Writing a nonzero value will
60247                    reload the channel counter and start the channel.</description>
60248                <resetMask>0x00000000</resetMask>
60249                <fields>
60250                    <field>
60251                        <name>CH13_AL2_WRITE_ADDR_TRIG</name>
60252                        <bitRange>[31:0]</bitRange>
60253                        <access>read-write</access>
60254                    </field>
60255                </fields>
60256            </register>
60257            <register>
60258                <name>CH13_AL3_CTRL</name>
60259                <addressOffset>0x00000370</addressOffset>
60260                <description>Alias for channel 13 CTRL register</description>
60261                <resetMask>0x00000000</resetMask>
60262                <fields>
60263                    <field>
60264                        <name>CH13_AL3_CTRL</name>
60265                        <bitRange>[31:0]</bitRange>
60266                        <access>read-write</access>
60267                    </field>
60268                </fields>
60269            </register>
60270            <register>
60271                <name>CH13_AL3_WRITE_ADDR</name>
60272                <addressOffset>0x00000374</addressOffset>
60273                <description>Alias for channel 13 WRITE_ADDR register</description>
60274                <resetMask>0x00000000</resetMask>
60275                <fields>
60276                    <field>
60277                        <name>CH13_AL3_WRITE_ADDR</name>
60278                        <bitRange>[31:0]</bitRange>
60279                        <access>read-write</access>
60280                    </field>
60281                </fields>
60282            </register>
60283            <register>
60284                <name>CH13_AL3_TRANS_COUNT</name>
60285                <addressOffset>0x00000378</addressOffset>
60286                <description>Alias for channel 13 TRANS_COUNT register</description>
60287                <resetMask>0x00000000</resetMask>
60288                <fields>
60289                    <field>
60290                        <name>CH13_AL3_TRANS_COUNT</name>
60291                        <bitRange>[31:0]</bitRange>
60292                        <access>read-write</access>
60293                    </field>
60294                </fields>
60295            </register>
60296            <register>
60297                <name>CH13_AL3_READ_ADDR_TRIG</name>
60298                <addressOffset>0x0000037c</addressOffset>
60299                <description>Alias for channel 13 READ_ADDR register
60300                    This is a trigger register (0xc). Writing a nonzero value will
60301                    reload the channel counter and start the channel.</description>
60302                <resetMask>0x00000000</resetMask>
60303                <fields>
60304                    <field>
60305                        <name>CH13_AL3_READ_ADDR_TRIG</name>
60306                        <bitRange>[31:0]</bitRange>
60307                        <access>read-write</access>
60308                    </field>
60309                </fields>
60310            </register>
60311            <register>
60312                <name>CH14_READ_ADDR</name>
60313                <addressOffset>0x00000380</addressOffset>
60314                <description>DMA Channel 14 Read Address pointer</description>
60315                <resetValue>0x00000000</resetValue>
60316                <fields>
60317                    <field>
60318                        <name>CH14_READ_ADDR</name>
60319                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
60320                        <bitRange>[31:0]</bitRange>
60321                        <access>read-write</access>
60322                    </field>
60323                </fields>
60324            </register>
60325            <register>
60326                <name>CH14_WRITE_ADDR</name>
60327                <addressOffset>0x00000384</addressOffset>
60328                <description>DMA Channel 14 Write Address pointer</description>
60329                <resetValue>0x00000000</resetValue>
60330                <fields>
60331                    <field>
60332                        <name>CH14_WRITE_ADDR</name>
60333                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
60334                        <bitRange>[31:0]</bitRange>
60335                        <access>read-write</access>
60336                    </field>
60337                </fields>
60338            </register>
60339            <register>
60340                <name>CH14_TRANS_COUNT</name>
60341                <addressOffset>0x00000388</addressOffset>
60342                <description>DMA Channel 14 Transfer Count</description>
60343                <resetValue>0x00000000</resetValue>
60344                <fields>
60345                    <field>
60346                        <name>MODE</name>
60347                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
60348
60349                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
60350
60351                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
60352
60353                            All other values are reserved.</description>
60354                        <bitRange>[31:28]</bitRange>
60355                        <access>read-write</access>
60356                        <enumeratedValues>
60357                            <enumeratedValue>
60358                                <name>NORMAL</name>
60359                                <value>0</value>
60360                            </enumeratedValue>
60361                            <enumeratedValue>
60362                                <name>TRIGGER_SELF</name>
60363                                <value>1</value>
60364                            </enumeratedValue>
60365                            <enumeratedValue>
60366                                <name>ENDLESS</name>
60367                                <value>15</value>
60368                            </enumeratedValue>
60369                        </enumeratedValues>
60370                    </field>
60371                    <field>
60372                        <name>COUNT</name>
60373                        <description>28-bit transfer count (256 million transfers maximum).
60374
60375                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
60376
60377                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
60378
60379                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
60380
60381                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
60382                        <bitRange>[27:0]</bitRange>
60383                        <access>read-write</access>
60384                    </field>
60385                </fields>
60386            </register>
60387            <register>
60388                <name>CH14_CTRL_TRIG</name>
60389                <addressOffset>0x0000038c</addressOffset>
60390                <description>DMA Channel 14 Control and Status</description>
60391                <resetValue>0x00000000</resetValue>
60392                <fields>
60393                    <field>
60394                        <name>AHB_ERROR</name>
60395                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
60396                        <bitRange>[31:31]</bitRange>
60397                        <access>read-only</access>
60398                    </field>
60399                    <field>
60400                        <name>READ_ERROR</name>
60401                        <description>If 1, the channel received a read bus error. Write one to clear.
60402                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
60403                        <bitRange>[30:30]</bitRange>
60404                        <access>read-write</access>
60405                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
60406                    </field>
60407                    <field>
60408                        <name>WRITE_ERROR</name>
60409                        <description>If 1, the channel received a write bus error. Write one to clear.
60410                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
60411                        <bitRange>[29:29]</bitRange>
60412                        <access>read-write</access>
60413                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
60414                    </field>
60415                    <field>
60416                        <name>BUSY</name>
60417                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
60418
60419                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
60420                        <bitRange>[26:26]</bitRange>
60421                        <access>read-only</access>
60422                    </field>
60423                    <field>
60424                        <name>SNIFF_EN</name>
60425                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
60426
60427                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
60428                        <bitRange>[25:25]</bitRange>
60429                        <access>read-write</access>
60430                    </field>
60431                    <field>
60432                        <name>BSWAP</name>
60433                        <description>Apply byte-swap transformation to DMA data.
60434                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
60435                        <bitRange>[24:24]</bitRange>
60436                        <access>read-write</access>
60437                    </field>
60438                    <field>
60439                        <name>IRQ_QUIET</name>
60440                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
60441
60442                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
60443                        <bitRange>[23:23]</bitRange>
60444                        <access>read-write</access>
60445                    </field>
60446                    <field>
60447                        <name>TREQ_SEL</name>
60448                        <description>Select a Transfer Request signal.
60449                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
60450                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
60451                        <bitRange>[22:17]</bitRange>
60452                        <access>read-write</access>
60453                        <enumeratedValues>
60454                            <enumeratedValue>
60455                                <name>PIO0_TX0</name>
60456                                <value>0</value>
60457                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
60458                            </enumeratedValue>
60459                            <enumeratedValue>
60460                                <name>PIO0_TX1</name>
60461                                <value>1</value>
60462                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
60463                            </enumeratedValue>
60464                            <enumeratedValue>
60465                                <name>PIO0_TX2</name>
60466                                <value>2</value>
60467                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
60468                            </enumeratedValue>
60469                            <enumeratedValue>
60470                                <name>PIO0_TX3</name>
60471                                <value>3</value>
60472                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
60473                            </enumeratedValue>
60474                            <enumeratedValue>
60475                                <name>PIO0_RX0</name>
60476                                <value>4</value>
60477                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
60478                            </enumeratedValue>
60479                            <enumeratedValue>
60480                                <name>PIO0_RX1</name>
60481                                <value>5</value>
60482                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
60483                            </enumeratedValue>
60484                            <enumeratedValue>
60485                                <name>PIO0_RX2</name>
60486                                <value>6</value>
60487                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
60488                            </enumeratedValue>
60489                            <enumeratedValue>
60490                                <name>PIO0_RX3</name>
60491                                <value>7</value>
60492                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
60493                            </enumeratedValue>
60494                            <enumeratedValue>
60495                                <name>PIO1_TX0</name>
60496                                <value>8</value>
60497                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
60498                            </enumeratedValue>
60499                            <enumeratedValue>
60500                                <name>PIO1_TX1</name>
60501                                <value>9</value>
60502                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
60503                            </enumeratedValue>
60504                            <enumeratedValue>
60505                                <name>PIO1_TX2</name>
60506                                <value>10</value>
60507                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
60508                            </enumeratedValue>
60509                            <enumeratedValue>
60510                                <name>PIO1_TX3</name>
60511                                <value>11</value>
60512                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
60513                            </enumeratedValue>
60514                            <enumeratedValue>
60515                                <name>PIO1_RX0</name>
60516                                <value>12</value>
60517                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
60518                            </enumeratedValue>
60519                            <enumeratedValue>
60520                                <name>PIO1_RX1</name>
60521                                <value>13</value>
60522                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
60523                            </enumeratedValue>
60524                            <enumeratedValue>
60525                                <name>PIO1_RX2</name>
60526                                <value>14</value>
60527                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
60528                            </enumeratedValue>
60529                            <enumeratedValue>
60530                                <name>PIO1_RX3</name>
60531                                <value>15</value>
60532                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
60533                            </enumeratedValue>
60534                            <enumeratedValue>
60535                                <name>PIO2_TX0</name>
60536                                <value>16</value>
60537                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
60538                            </enumeratedValue>
60539                            <enumeratedValue>
60540                                <name>PIO2_TX1</name>
60541                                <value>17</value>
60542                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
60543                            </enumeratedValue>
60544                            <enumeratedValue>
60545                                <name>PIO2_TX2</name>
60546                                <value>18</value>
60547                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
60548                            </enumeratedValue>
60549                            <enumeratedValue>
60550                                <name>PIO2_TX3</name>
60551                                <value>19</value>
60552                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
60553                            </enumeratedValue>
60554                            <enumeratedValue>
60555                                <name>PIO2_RX0</name>
60556                                <value>20</value>
60557                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
60558                            </enumeratedValue>
60559                            <enumeratedValue>
60560                                <name>PIO2_RX1</name>
60561                                <value>21</value>
60562                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
60563                            </enumeratedValue>
60564                            <enumeratedValue>
60565                                <name>PIO2_RX2</name>
60566                                <value>22</value>
60567                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
60568                            </enumeratedValue>
60569                            <enumeratedValue>
60570                                <name>PIO2_RX3</name>
60571                                <value>23</value>
60572                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
60573                            </enumeratedValue>
60574                            <enumeratedValue>
60575                                <name>SPI0_TX</name>
60576                                <value>24</value>
60577                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
60578                            </enumeratedValue>
60579                            <enumeratedValue>
60580                                <name>SPI0_RX</name>
60581                                <value>25</value>
60582                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
60583                            </enumeratedValue>
60584                            <enumeratedValue>
60585                                <name>SPI1_TX</name>
60586                                <value>26</value>
60587                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
60588                            </enumeratedValue>
60589                            <enumeratedValue>
60590                                <name>SPI1_RX</name>
60591                                <value>27</value>
60592                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
60593                            </enumeratedValue>
60594                            <enumeratedValue>
60595                                <name>UART0_TX</name>
60596                                <value>28</value>
60597                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
60598                            </enumeratedValue>
60599                            <enumeratedValue>
60600                                <name>UART0_RX</name>
60601                                <value>29</value>
60602                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
60603                            </enumeratedValue>
60604                            <enumeratedValue>
60605                                <name>UART1_TX</name>
60606                                <value>30</value>
60607                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
60608                            </enumeratedValue>
60609                            <enumeratedValue>
60610                                <name>UART1_RX</name>
60611                                <value>31</value>
60612                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
60613                            </enumeratedValue>
60614                            <enumeratedValue>
60615                                <name>PWM_WRAP0</name>
60616                                <value>32</value>
60617                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
60618                            </enumeratedValue>
60619                            <enumeratedValue>
60620                                <name>PWM_WRAP1</name>
60621                                <value>33</value>
60622                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
60623                            </enumeratedValue>
60624                            <enumeratedValue>
60625                                <name>PWM_WRAP2</name>
60626                                <value>34</value>
60627                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
60628                            </enumeratedValue>
60629                            <enumeratedValue>
60630                                <name>PWM_WRAP3</name>
60631                                <value>35</value>
60632                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
60633                            </enumeratedValue>
60634                            <enumeratedValue>
60635                                <name>PWM_WRAP4</name>
60636                                <value>36</value>
60637                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
60638                            </enumeratedValue>
60639                            <enumeratedValue>
60640                                <name>PWM_WRAP5</name>
60641                                <value>37</value>
60642                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
60643                            </enumeratedValue>
60644                            <enumeratedValue>
60645                                <name>PWM_WRAP6</name>
60646                                <value>38</value>
60647                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
60648                            </enumeratedValue>
60649                            <enumeratedValue>
60650                                <name>PWM_WRAP7</name>
60651                                <value>39</value>
60652                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
60653                            </enumeratedValue>
60654                            <enumeratedValue>
60655                                <name>PWM_WRAP8</name>
60656                                <value>40</value>
60657                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
60658                            </enumeratedValue>
60659                            <enumeratedValue>
60660                                <name>PWM_WRAP9</name>
60661                                <value>41</value>
60662                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
60663                            </enumeratedValue>
60664                            <enumeratedValue>
60665                                <name>PWM_WRAP10</name>
60666                                <value>42</value>
60667                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
60668                            </enumeratedValue>
60669                            <enumeratedValue>
60670                                <name>PWM_WRAP11</name>
60671                                <value>43</value>
60672                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
60673                            </enumeratedValue>
60674                            <enumeratedValue>
60675                                <name>I2C0_TX</name>
60676                                <value>44</value>
60677                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
60678                            </enumeratedValue>
60679                            <enumeratedValue>
60680                                <name>I2C0_RX</name>
60681                                <value>45</value>
60682                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
60683                            </enumeratedValue>
60684                            <enumeratedValue>
60685                                <name>I2C1_TX</name>
60686                                <value>46</value>
60687                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
60688                            </enumeratedValue>
60689                            <enumeratedValue>
60690                                <name>I2C1_RX</name>
60691                                <value>47</value>
60692                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
60693                            </enumeratedValue>
60694                            <enumeratedValue>
60695                                <name>ADC</name>
60696                                <value>48</value>
60697                                <description>Select the ADC as TREQ</description>
60698                            </enumeratedValue>
60699                            <enumeratedValue>
60700                                <name>XIP_STREAM</name>
60701                                <value>49</value>
60702                                <description>Select the XIP Streaming FIFO as TREQ</description>
60703                            </enumeratedValue>
60704                            <enumeratedValue>
60705                                <name>XIP_QMITX</name>
60706                                <value>50</value>
60707                                <description>Select XIP_QMITX as TREQ</description>
60708                            </enumeratedValue>
60709                            <enumeratedValue>
60710                                <name>XIP_QMIRX</name>
60711                                <value>51</value>
60712                                <description>Select XIP_QMIRX as TREQ</description>
60713                            </enumeratedValue>
60714                            <enumeratedValue>
60715                                <name>HSTX</name>
60716                                <value>52</value>
60717                                <description>Select HSTX as TREQ</description>
60718                            </enumeratedValue>
60719                            <enumeratedValue>
60720                                <name>CORESIGHT</name>
60721                                <value>53</value>
60722                                <description>Select CORESIGHT as TREQ</description>
60723                            </enumeratedValue>
60724                            <enumeratedValue>
60725                                <name>SHA256</name>
60726                                <value>54</value>
60727                                <description>Select SHA256 as TREQ</description>
60728                            </enumeratedValue>
60729                            <enumeratedValue>
60730                                <name>TIMER0</name>
60731                                <value>59</value>
60732                                <description>Select Timer 0 as TREQ</description>
60733                            </enumeratedValue>
60734                            <enumeratedValue>
60735                                <name>TIMER1</name>
60736                                <value>60</value>
60737                                <description>Select Timer 1 as TREQ</description>
60738                            </enumeratedValue>
60739                            <enumeratedValue>
60740                                <name>TIMER2</name>
60741                                <value>61</value>
60742                                <description>Select Timer 2 as TREQ (Optional)</description>
60743                            </enumeratedValue>
60744                            <enumeratedValue>
60745                                <name>TIMER3</name>
60746                                <value>62</value>
60747                                <description>Select Timer 3 as TREQ (Optional)</description>
60748                            </enumeratedValue>
60749                            <enumeratedValue>
60750                                <name>PERMANENT</name>
60751                                <value>63</value>
60752                                <description>Permanent request, for unpaced transfers.</description>
60753                            </enumeratedValue>
60754                        </enumeratedValues>
60755                    </field>
60756                    <field>
60757                        <name>CHAIN_TO</name>
60758                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
60759
60760                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
60761                        <bitRange>[16:13]</bitRange>
60762                        <access>read-write</access>
60763                    </field>
60764                    <field>
60765                        <name>RING_SEL</name>
60766                        <description>Select whether RING_SIZE applies to read or write addresses.
60767                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
60768                        <bitRange>[12:12]</bitRange>
60769                        <access>read-write</access>
60770                    </field>
60771                    <field>
60772                        <name>RING_SIZE</name>
60773                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
60774
60775                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
60776                        <bitRange>[11:8]</bitRange>
60777                        <access>read-write</access>
60778                        <enumeratedValues>
60779                            <enumeratedValue>
60780                                <name>RING_NONE</name>
60781                                <value>0</value>
60782                            </enumeratedValue>
60783                        </enumeratedValues>
60784                    </field>
60785                    <field>
60786                        <name>INCR_WRITE_REV</name>
60787                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
60788
60789                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
60790                        <bitRange>[7:7]</bitRange>
60791                        <access>read-write</access>
60792                    </field>
60793                    <field>
60794                        <name>INCR_WRITE</name>
60795                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
60796
60797                            Generally this should be disabled for memory-to-peripheral transfers.</description>
60798                        <bitRange>[6:6]</bitRange>
60799                        <access>read-write</access>
60800                    </field>
60801                    <field>
60802                        <name>INCR_READ_REV</name>
60803                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
60804
60805                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
60806                        <bitRange>[5:5]</bitRange>
60807                        <access>read-write</access>
60808                    </field>
60809                    <field>
60810                        <name>INCR_READ</name>
60811                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
60812
60813                            Generally this should be disabled for peripheral-to-memory transfers.</description>
60814                        <bitRange>[4:4]</bitRange>
60815                        <access>read-write</access>
60816                    </field>
60817                    <field>
60818                        <name>DATA_SIZE</name>
60819                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
60820                        <bitRange>[3:2]</bitRange>
60821                        <access>read-write</access>
60822                        <enumeratedValues>
60823                            <enumeratedValue>
60824                                <name>SIZE_BYTE</name>
60825                                <value>0</value>
60826                            </enumeratedValue>
60827                            <enumeratedValue>
60828                                <name>SIZE_HALFWORD</name>
60829                                <value>1</value>
60830                            </enumeratedValue>
60831                            <enumeratedValue>
60832                                <name>SIZE_WORD</name>
60833                                <value>2</value>
60834                            </enumeratedValue>
60835                        </enumeratedValues>
60836                    </field>
60837                    <field>
60838                        <name>HIGH_PRIORITY</name>
60839                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
60840
60841                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
60842                        <bitRange>[1:1]</bitRange>
60843                        <access>read-write</access>
60844                    </field>
60845                    <field>
60846                        <name>EN</name>
60847                        <description>DMA Channel Enable.
60848                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
60849                        <bitRange>[0:0]</bitRange>
60850                        <access>read-write</access>
60851                    </field>
60852                </fields>
60853            </register>
60854            <register>
60855                <name>CH14_AL1_CTRL</name>
60856                <addressOffset>0x00000390</addressOffset>
60857                <description>Alias for channel 14 CTRL register</description>
60858                <resetMask>0x00000000</resetMask>
60859                <fields>
60860                    <field>
60861                        <name>CH14_AL1_CTRL</name>
60862                        <bitRange>[31:0]</bitRange>
60863                        <access>read-write</access>
60864                    </field>
60865                </fields>
60866            </register>
60867            <register>
60868                <name>CH14_AL1_READ_ADDR</name>
60869                <addressOffset>0x00000394</addressOffset>
60870                <description>Alias for channel 14 READ_ADDR register</description>
60871                <resetMask>0x00000000</resetMask>
60872                <fields>
60873                    <field>
60874                        <name>CH14_AL1_READ_ADDR</name>
60875                        <bitRange>[31:0]</bitRange>
60876                        <access>read-write</access>
60877                    </field>
60878                </fields>
60879            </register>
60880            <register>
60881                <name>CH14_AL1_WRITE_ADDR</name>
60882                <addressOffset>0x00000398</addressOffset>
60883                <description>Alias for channel 14 WRITE_ADDR register</description>
60884                <resetMask>0x00000000</resetMask>
60885                <fields>
60886                    <field>
60887                        <name>CH14_AL1_WRITE_ADDR</name>
60888                        <bitRange>[31:0]</bitRange>
60889                        <access>read-write</access>
60890                    </field>
60891                </fields>
60892            </register>
60893            <register>
60894                <name>CH14_AL1_TRANS_COUNT_TRIG</name>
60895                <addressOffset>0x0000039c</addressOffset>
60896                <description>Alias for channel 14 TRANS_COUNT register
60897                    This is a trigger register (0xc). Writing a nonzero value will
60898                    reload the channel counter and start the channel.</description>
60899                <resetMask>0x00000000</resetMask>
60900                <fields>
60901                    <field>
60902                        <name>CH14_AL1_TRANS_COUNT_TRIG</name>
60903                        <bitRange>[31:0]</bitRange>
60904                        <access>read-write</access>
60905                    </field>
60906                </fields>
60907            </register>
60908            <register>
60909                <name>CH14_AL2_CTRL</name>
60910                <addressOffset>0x000003a0</addressOffset>
60911                <description>Alias for channel 14 CTRL register</description>
60912                <resetMask>0x00000000</resetMask>
60913                <fields>
60914                    <field>
60915                        <name>CH14_AL2_CTRL</name>
60916                        <bitRange>[31:0]</bitRange>
60917                        <access>read-write</access>
60918                    </field>
60919                </fields>
60920            </register>
60921            <register>
60922                <name>CH14_AL2_TRANS_COUNT</name>
60923                <addressOffset>0x000003a4</addressOffset>
60924                <description>Alias for channel 14 TRANS_COUNT register</description>
60925                <resetMask>0x00000000</resetMask>
60926                <fields>
60927                    <field>
60928                        <name>CH14_AL2_TRANS_COUNT</name>
60929                        <bitRange>[31:0]</bitRange>
60930                        <access>read-write</access>
60931                    </field>
60932                </fields>
60933            </register>
60934            <register>
60935                <name>CH14_AL2_READ_ADDR</name>
60936                <addressOffset>0x000003a8</addressOffset>
60937                <description>Alias for channel 14 READ_ADDR register</description>
60938                <resetMask>0x00000000</resetMask>
60939                <fields>
60940                    <field>
60941                        <name>CH14_AL2_READ_ADDR</name>
60942                        <bitRange>[31:0]</bitRange>
60943                        <access>read-write</access>
60944                    </field>
60945                </fields>
60946            </register>
60947            <register>
60948                <name>CH14_AL2_WRITE_ADDR_TRIG</name>
60949                <addressOffset>0x000003ac</addressOffset>
60950                <description>Alias for channel 14 WRITE_ADDR register
60951                    This is a trigger register (0xc). Writing a nonzero value will
60952                    reload the channel counter and start the channel.</description>
60953                <resetMask>0x00000000</resetMask>
60954                <fields>
60955                    <field>
60956                        <name>CH14_AL2_WRITE_ADDR_TRIG</name>
60957                        <bitRange>[31:0]</bitRange>
60958                        <access>read-write</access>
60959                    </field>
60960                </fields>
60961            </register>
60962            <register>
60963                <name>CH14_AL3_CTRL</name>
60964                <addressOffset>0x000003b0</addressOffset>
60965                <description>Alias for channel 14 CTRL register</description>
60966                <resetMask>0x00000000</resetMask>
60967                <fields>
60968                    <field>
60969                        <name>CH14_AL3_CTRL</name>
60970                        <bitRange>[31:0]</bitRange>
60971                        <access>read-write</access>
60972                    </field>
60973                </fields>
60974            </register>
60975            <register>
60976                <name>CH14_AL3_WRITE_ADDR</name>
60977                <addressOffset>0x000003b4</addressOffset>
60978                <description>Alias for channel 14 WRITE_ADDR register</description>
60979                <resetMask>0x00000000</resetMask>
60980                <fields>
60981                    <field>
60982                        <name>CH14_AL3_WRITE_ADDR</name>
60983                        <bitRange>[31:0]</bitRange>
60984                        <access>read-write</access>
60985                    </field>
60986                </fields>
60987            </register>
60988            <register>
60989                <name>CH14_AL3_TRANS_COUNT</name>
60990                <addressOffset>0x000003b8</addressOffset>
60991                <description>Alias for channel 14 TRANS_COUNT register</description>
60992                <resetMask>0x00000000</resetMask>
60993                <fields>
60994                    <field>
60995                        <name>CH14_AL3_TRANS_COUNT</name>
60996                        <bitRange>[31:0]</bitRange>
60997                        <access>read-write</access>
60998                    </field>
60999                </fields>
61000            </register>
61001            <register>
61002                <name>CH14_AL3_READ_ADDR_TRIG</name>
61003                <addressOffset>0x000003bc</addressOffset>
61004                <description>Alias for channel 14 READ_ADDR register
61005                    This is a trigger register (0xc). Writing a nonzero value will
61006                    reload the channel counter and start the channel.</description>
61007                <resetMask>0x00000000</resetMask>
61008                <fields>
61009                    <field>
61010                        <name>CH14_AL3_READ_ADDR_TRIG</name>
61011                        <bitRange>[31:0]</bitRange>
61012                        <access>read-write</access>
61013                    </field>
61014                </fields>
61015            </register>
61016            <register>
61017                <name>CH15_READ_ADDR</name>
61018                <addressOffset>0x000003c0</addressOffset>
61019                <description>DMA Channel 15 Read Address pointer</description>
61020                <resetValue>0x00000000</resetValue>
61021                <fields>
61022                    <field>
61023                        <name>CH15_READ_ADDR</name>
61024                        <description>This register updates automatically each time a read completes. The current value is the next address to be read by this channel.</description>
61025                        <bitRange>[31:0]</bitRange>
61026                        <access>read-write</access>
61027                    </field>
61028                </fields>
61029            </register>
61030            <register>
61031                <name>CH15_WRITE_ADDR</name>
61032                <addressOffset>0x000003c4</addressOffset>
61033                <description>DMA Channel 15 Write Address pointer</description>
61034                <resetValue>0x00000000</resetValue>
61035                <fields>
61036                    <field>
61037                        <name>CH15_WRITE_ADDR</name>
61038                        <description>This register updates automatically each time a write completes. The current value is the next address to be written by this channel.</description>
61039                        <bitRange>[31:0]</bitRange>
61040                        <access>read-write</access>
61041                    </field>
61042                </fields>
61043            </register>
61044            <register>
61045                <name>CH15_TRANS_COUNT</name>
61046                <addressOffset>0x000003c8</addressOffset>
61047                <description>DMA Channel 15 Transfer Count</description>
61048                <resetValue>0x00000000</resetValue>
61049                <fields>
61050                    <field>
61051                        <name>MODE</name>
61052                        <description>When MODE is 0x0, the transfer count decrements with each transfer until 0, and then the channel triggers the next channel indicated by CTRL_CHAIN_TO.
61053
61054                            When MODE is 0x1, the transfer count decrements with each transfer until 0, and then the channel re-triggers itself, in addition to the trigger indicated by CTRL_CHAIN_TO. This is useful for e.g. an endless ring-buffer DMA with periodic interrupts.
61055
61056                            When MODE is 0xf, the transfer count does not decrement. The DMA channel performs an endless sequence of transfers, never triggering other channels or raising interrupts, until an ABORT is raised.
61057
61058                            All other values are reserved.</description>
61059                        <bitRange>[31:28]</bitRange>
61060                        <access>read-write</access>
61061                        <enumeratedValues>
61062                            <enumeratedValue>
61063                                <name>NORMAL</name>
61064                                <value>0</value>
61065                            </enumeratedValue>
61066                            <enumeratedValue>
61067                                <name>TRIGGER_SELF</name>
61068                                <value>1</value>
61069                            </enumeratedValue>
61070                            <enumeratedValue>
61071                                <name>ENDLESS</name>
61072                                <value>15</value>
61073                            </enumeratedValue>
61074                        </enumeratedValues>
61075                    </field>
61076                    <field>
61077                        <name>COUNT</name>
61078                        <description>28-bit transfer count (256 million transfers maximum).
61079
61080                            Program the number of bus transfers a channel will perform before halting. Note that, if transfers are larger than one byte in size, this is not equal to the number of bytes transferred (see CTRL_DATA_SIZE).
61081
61082                            When the channel is active, reading this register shows the number of transfers remaining, updating automatically each time a write transfer completes.
61083
61084                            Writing this register sets the RELOAD value for the transfer counter. Each time this channel is triggered, the RELOAD value is copied into the live transfer counter. The channel can be started multiple times, and will perform the same number of transfers each time, as programmed by most recent write.
61085
61086                            The RELOAD value can be observed at CHx_DBG_TCR. If TRANS_COUNT is used as a trigger, the written value is used immediately as the length of the new transfer sequence, as well as being written to RELOAD.</description>
61087                        <bitRange>[27:0]</bitRange>
61088                        <access>read-write</access>
61089                    </field>
61090                </fields>
61091            </register>
61092            <register>
61093                <name>CH15_CTRL_TRIG</name>
61094                <addressOffset>0x000003cc</addressOffset>
61095                <description>DMA Channel 15 Control and Status</description>
61096                <resetValue>0x00000000</resetValue>
61097                <fields>
61098                    <field>
61099                        <name>AHB_ERROR</name>
61100                        <description>Logical OR of the READ_ERROR and WRITE_ERROR flags. The channel halts when it encounters any bus error, and always raises its channel IRQ flag.</description>
61101                        <bitRange>[31:31]</bitRange>
61102                        <access>read-only</access>
61103                    </field>
61104                    <field>
61105                        <name>READ_ERROR</name>
61106                        <description>If 1, the channel received a read bus error. Write one to clear.
61107                            READ_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 3 transfers later)</description>
61108                        <bitRange>[30:30]</bitRange>
61109                        <access>read-write</access>
61110                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61111                    </field>
61112                    <field>
61113                        <name>WRITE_ERROR</name>
61114                        <description>If 1, the channel received a write bus error. Write one to clear.
61115                            WRITE_ADDR shows the approximate address where the bus error was encountered (will not be earlier, or more than 5 transfers later)</description>
61116                        <bitRange>[29:29]</bitRange>
61117                        <access>read-write</access>
61118                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61119                    </field>
61120                    <field>
61121                        <name>BUSY</name>
61122                        <description>This flag goes high when the channel starts a new transfer sequence, and low when the last transfer of that sequence completes. Clearing EN while BUSY is high pauses the channel, and BUSY will stay high while paused.
61123
61124                            To terminate a sequence early (and clear the BUSY flag), see CHAN_ABORT.</description>
61125                        <bitRange>[26:26]</bitRange>
61126                        <access>read-only</access>
61127                    </field>
61128                    <field>
61129                        <name>SNIFF_EN</name>
61130                        <description>If 1, this channel&#39;s data transfers are visible to the sniff hardware, and each transfer will advance the state of the checksum. This only applies if the sniff hardware is enabled, and has this channel selected.
61131
61132                            This allows checksum to be enabled or disabled on a per-control- block basis.</description>
61133                        <bitRange>[25:25]</bitRange>
61134                        <access>read-write</access>
61135                    </field>
61136                    <field>
61137                        <name>BSWAP</name>
61138                        <description>Apply byte-swap transformation to DMA data.
61139                            For byte data, this has no effect. For halfword data, the two bytes of each halfword are swapped. For word data, the four bytes of each word are swapped to reverse order.</description>
61140                        <bitRange>[24:24]</bitRange>
61141                        <access>read-write</access>
61142                    </field>
61143                    <field>
61144                        <name>IRQ_QUIET</name>
61145                        <description>In QUIET mode, the channel does not generate IRQs at the end of every transfer block. Instead, an IRQ is raised when NULL is written to a trigger register, indicating the end of a control block chain.
61146
61147                            This reduces the number of interrupts to be serviced by the CPU when transferring a DMA chain of many small control blocks.</description>
61148                        <bitRange>[23:23]</bitRange>
61149                        <access>read-write</access>
61150                    </field>
61151                    <field>
61152                        <name>TREQ_SEL</name>
61153                        <description>Select a Transfer Request signal.
61154                            The channel uses the transfer request signal to pace its data transfer rate. Sources for TREQ signals are internal (TIMERS) or external (DREQ, a Data Request from the system).
61155                            0x0 to 0x3a -&gt; select DREQ n as TREQ</description>
61156                        <bitRange>[22:17]</bitRange>
61157                        <access>read-write</access>
61158                        <enumeratedValues>
61159                            <enumeratedValue>
61160                                <name>PIO0_TX0</name>
61161                                <value>0</value>
61162                                <description>Select PIO0&#39;s TX FIFO 0 as TREQ</description>
61163                            </enumeratedValue>
61164                            <enumeratedValue>
61165                                <name>PIO0_TX1</name>
61166                                <value>1</value>
61167                                <description>Select PIO0&#39;s TX FIFO 1 as TREQ</description>
61168                            </enumeratedValue>
61169                            <enumeratedValue>
61170                                <name>PIO0_TX2</name>
61171                                <value>2</value>
61172                                <description>Select PIO0&#39;s TX FIFO 2 as TREQ</description>
61173                            </enumeratedValue>
61174                            <enumeratedValue>
61175                                <name>PIO0_TX3</name>
61176                                <value>3</value>
61177                                <description>Select PIO0&#39;s TX FIFO 3 as TREQ</description>
61178                            </enumeratedValue>
61179                            <enumeratedValue>
61180                                <name>PIO0_RX0</name>
61181                                <value>4</value>
61182                                <description>Select PIO0&#39;s RX FIFO 0 as TREQ</description>
61183                            </enumeratedValue>
61184                            <enumeratedValue>
61185                                <name>PIO0_RX1</name>
61186                                <value>5</value>
61187                                <description>Select PIO0&#39;s RX FIFO 1 as TREQ</description>
61188                            </enumeratedValue>
61189                            <enumeratedValue>
61190                                <name>PIO0_RX2</name>
61191                                <value>6</value>
61192                                <description>Select PIO0&#39;s RX FIFO 2 as TREQ</description>
61193                            </enumeratedValue>
61194                            <enumeratedValue>
61195                                <name>PIO0_RX3</name>
61196                                <value>7</value>
61197                                <description>Select PIO0&#39;s RX FIFO 3 as TREQ</description>
61198                            </enumeratedValue>
61199                            <enumeratedValue>
61200                                <name>PIO1_TX0</name>
61201                                <value>8</value>
61202                                <description>Select PIO1&#39;s TX FIFO 0 as TREQ</description>
61203                            </enumeratedValue>
61204                            <enumeratedValue>
61205                                <name>PIO1_TX1</name>
61206                                <value>9</value>
61207                                <description>Select PIO1&#39;s TX FIFO 1 as TREQ</description>
61208                            </enumeratedValue>
61209                            <enumeratedValue>
61210                                <name>PIO1_TX2</name>
61211                                <value>10</value>
61212                                <description>Select PIO1&#39;s TX FIFO 2 as TREQ</description>
61213                            </enumeratedValue>
61214                            <enumeratedValue>
61215                                <name>PIO1_TX3</name>
61216                                <value>11</value>
61217                                <description>Select PIO1&#39;s TX FIFO 3 as TREQ</description>
61218                            </enumeratedValue>
61219                            <enumeratedValue>
61220                                <name>PIO1_RX0</name>
61221                                <value>12</value>
61222                                <description>Select PIO1&#39;s RX FIFO 0 as TREQ</description>
61223                            </enumeratedValue>
61224                            <enumeratedValue>
61225                                <name>PIO1_RX1</name>
61226                                <value>13</value>
61227                                <description>Select PIO1&#39;s RX FIFO 1 as TREQ</description>
61228                            </enumeratedValue>
61229                            <enumeratedValue>
61230                                <name>PIO1_RX2</name>
61231                                <value>14</value>
61232                                <description>Select PIO1&#39;s RX FIFO 2 as TREQ</description>
61233                            </enumeratedValue>
61234                            <enumeratedValue>
61235                                <name>PIO1_RX3</name>
61236                                <value>15</value>
61237                                <description>Select PIO1&#39;s RX FIFO 3 as TREQ</description>
61238                            </enumeratedValue>
61239                            <enumeratedValue>
61240                                <name>PIO2_TX0</name>
61241                                <value>16</value>
61242                                <description>Select PIO2&#39;s TX FIFO 0 as TREQ</description>
61243                            </enumeratedValue>
61244                            <enumeratedValue>
61245                                <name>PIO2_TX1</name>
61246                                <value>17</value>
61247                                <description>Select PIO2&#39;s TX FIFO 1 as TREQ</description>
61248                            </enumeratedValue>
61249                            <enumeratedValue>
61250                                <name>PIO2_TX2</name>
61251                                <value>18</value>
61252                                <description>Select PIO2&#39;s TX FIFO 2 as TREQ</description>
61253                            </enumeratedValue>
61254                            <enumeratedValue>
61255                                <name>PIO2_TX3</name>
61256                                <value>19</value>
61257                                <description>Select PIO2&#39;s TX FIFO 3 as TREQ</description>
61258                            </enumeratedValue>
61259                            <enumeratedValue>
61260                                <name>PIO2_RX0</name>
61261                                <value>20</value>
61262                                <description>Select PIO2&#39;s RX FIFO 0 as TREQ</description>
61263                            </enumeratedValue>
61264                            <enumeratedValue>
61265                                <name>PIO2_RX1</name>
61266                                <value>21</value>
61267                                <description>Select PIO2&#39;s RX FIFO 1 as TREQ</description>
61268                            </enumeratedValue>
61269                            <enumeratedValue>
61270                                <name>PIO2_RX2</name>
61271                                <value>22</value>
61272                                <description>Select PIO2&#39;s RX FIFO 2 as TREQ</description>
61273                            </enumeratedValue>
61274                            <enumeratedValue>
61275                                <name>PIO2_RX3</name>
61276                                <value>23</value>
61277                                <description>Select PIO2&#39;s RX FIFO 3 as TREQ</description>
61278                            </enumeratedValue>
61279                            <enumeratedValue>
61280                                <name>SPI0_TX</name>
61281                                <value>24</value>
61282                                <description>Select SPI0&#39;s TX FIFO as TREQ</description>
61283                            </enumeratedValue>
61284                            <enumeratedValue>
61285                                <name>SPI0_RX</name>
61286                                <value>25</value>
61287                                <description>Select SPI0&#39;s RX FIFO as TREQ</description>
61288                            </enumeratedValue>
61289                            <enumeratedValue>
61290                                <name>SPI1_TX</name>
61291                                <value>26</value>
61292                                <description>Select SPI1&#39;s TX FIFO as TREQ</description>
61293                            </enumeratedValue>
61294                            <enumeratedValue>
61295                                <name>SPI1_RX</name>
61296                                <value>27</value>
61297                                <description>Select SPI1&#39;s RX FIFO as TREQ</description>
61298                            </enumeratedValue>
61299                            <enumeratedValue>
61300                                <name>UART0_TX</name>
61301                                <value>28</value>
61302                                <description>Select UART0&#39;s TX FIFO as TREQ</description>
61303                            </enumeratedValue>
61304                            <enumeratedValue>
61305                                <name>UART0_RX</name>
61306                                <value>29</value>
61307                                <description>Select UART0&#39;s RX FIFO as TREQ</description>
61308                            </enumeratedValue>
61309                            <enumeratedValue>
61310                                <name>UART1_TX</name>
61311                                <value>30</value>
61312                                <description>Select UART1&#39;s TX FIFO as TREQ</description>
61313                            </enumeratedValue>
61314                            <enumeratedValue>
61315                                <name>UART1_RX</name>
61316                                <value>31</value>
61317                                <description>Select UART1&#39;s RX FIFO as TREQ</description>
61318                            </enumeratedValue>
61319                            <enumeratedValue>
61320                                <name>PWM_WRAP0</name>
61321                                <value>32</value>
61322                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
61323                            </enumeratedValue>
61324                            <enumeratedValue>
61325                                <name>PWM_WRAP1</name>
61326                                <value>33</value>
61327                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
61328                            </enumeratedValue>
61329                            <enumeratedValue>
61330                                <name>PWM_WRAP2</name>
61331                                <value>34</value>
61332                                <description>Select PWM Counter 2&#39;s Wrap Value as TREQ</description>
61333                            </enumeratedValue>
61334                            <enumeratedValue>
61335                                <name>PWM_WRAP3</name>
61336                                <value>35</value>
61337                                <description>Select PWM Counter 3&#39;s Wrap Value as TREQ</description>
61338                            </enumeratedValue>
61339                            <enumeratedValue>
61340                                <name>PWM_WRAP4</name>
61341                                <value>36</value>
61342                                <description>Select PWM Counter 4&#39;s Wrap Value as TREQ</description>
61343                            </enumeratedValue>
61344                            <enumeratedValue>
61345                                <name>PWM_WRAP5</name>
61346                                <value>37</value>
61347                                <description>Select PWM Counter 5&#39;s Wrap Value as TREQ</description>
61348                            </enumeratedValue>
61349                            <enumeratedValue>
61350                                <name>PWM_WRAP6</name>
61351                                <value>38</value>
61352                                <description>Select PWM Counter 6&#39;s Wrap Value as TREQ</description>
61353                            </enumeratedValue>
61354                            <enumeratedValue>
61355                                <name>PWM_WRAP7</name>
61356                                <value>39</value>
61357                                <description>Select PWM Counter 7&#39;s Wrap Value as TREQ</description>
61358                            </enumeratedValue>
61359                            <enumeratedValue>
61360                                <name>PWM_WRAP8</name>
61361                                <value>40</value>
61362                                <description>Select PWM Counter 8&#39;s Wrap Value as TREQ</description>
61363                            </enumeratedValue>
61364                            <enumeratedValue>
61365                                <name>PWM_WRAP9</name>
61366                                <value>41</value>
61367                                <description>Select PWM Counter 9&#39;s Wrap Value as TREQ</description>
61368                            </enumeratedValue>
61369                            <enumeratedValue>
61370                                <name>PWM_WRAP10</name>
61371                                <value>42</value>
61372                                <description>Select PWM Counter 0&#39;s Wrap Value as TREQ</description>
61373                            </enumeratedValue>
61374                            <enumeratedValue>
61375                                <name>PWM_WRAP11</name>
61376                                <value>43</value>
61377                                <description>Select PWM Counter 1&#39;s Wrap Value as TREQ</description>
61378                            </enumeratedValue>
61379                            <enumeratedValue>
61380                                <name>I2C0_TX</name>
61381                                <value>44</value>
61382                                <description>Select I2C0&#39;s TX FIFO as TREQ</description>
61383                            </enumeratedValue>
61384                            <enumeratedValue>
61385                                <name>I2C0_RX</name>
61386                                <value>45</value>
61387                                <description>Select I2C0&#39;s RX FIFO as TREQ</description>
61388                            </enumeratedValue>
61389                            <enumeratedValue>
61390                                <name>I2C1_TX</name>
61391                                <value>46</value>
61392                                <description>Select I2C1&#39;s TX FIFO as TREQ</description>
61393                            </enumeratedValue>
61394                            <enumeratedValue>
61395                                <name>I2C1_RX</name>
61396                                <value>47</value>
61397                                <description>Select I2C1&#39;s RX FIFO as TREQ</description>
61398                            </enumeratedValue>
61399                            <enumeratedValue>
61400                                <name>ADC</name>
61401                                <value>48</value>
61402                                <description>Select the ADC as TREQ</description>
61403                            </enumeratedValue>
61404                            <enumeratedValue>
61405                                <name>XIP_STREAM</name>
61406                                <value>49</value>
61407                                <description>Select the XIP Streaming FIFO as TREQ</description>
61408                            </enumeratedValue>
61409                            <enumeratedValue>
61410                                <name>XIP_QMITX</name>
61411                                <value>50</value>
61412                                <description>Select XIP_QMITX as TREQ</description>
61413                            </enumeratedValue>
61414                            <enumeratedValue>
61415                                <name>XIP_QMIRX</name>
61416                                <value>51</value>
61417                                <description>Select XIP_QMIRX as TREQ</description>
61418                            </enumeratedValue>
61419                            <enumeratedValue>
61420                                <name>HSTX</name>
61421                                <value>52</value>
61422                                <description>Select HSTX as TREQ</description>
61423                            </enumeratedValue>
61424                            <enumeratedValue>
61425                                <name>CORESIGHT</name>
61426                                <value>53</value>
61427                                <description>Select CORESIGHT as TREQ</description>
61428                            </enumeratedValue>
61429                            <enumeratedValue>
61430                                <name>SHA256</name>
61431                                <value>54</value>
61432                                <description>Select SHA256 as TREQ</description>
61433                            </enumeratedValue>
61434                            <enumeratedValue>
61435                                <name>TIMER0</name>
61436                                <value>59</value>
61437                                <description>Select Timer 0 as TREQ</description>
61438                            </enumeratedValue>
61439                            <enumeratedValue>
61440                                <name>TIMER1</name>
61441                                <value>60</value>
61442                                <description>Select Timer 1 as TREQ</description>
61443                            </enumeratedValue>
61444                            <enumeratedValue>
61445                                <name>TIMER2</name>
61446                                <value>61</value>
61447                                <description>Select Timer 2 as TREQ (Optional)</description>
61448                            </enumeratedValue>
61449                            <enumeratedValue>
61450                                <name>TIMER3</name>
61451                                <value>62</value>
61452                                <description>Select Timer 3 as TREQ (Optional)</description>
61453                            </enumeratedValue>
61454                            <enumeratedValue>
61455                                <name>PERMANENT</name>
61456                                <value>63</value>
61457                                <description>Permanent request, for unpaced transfers.</description>
61458                            </enumeratedValue>
61459                        </enumeratedValues>
61460                    </field>
61461                    <field>
61462                        <name>CHAIN_TO</name>
61463                        <description>When this channel completes, it will trigger the channel indicated by CHAIN_TO. Disable by setting CHAIN_TO = _(this channel)_.
61464
61465                            Note this field resets to 0, so channels 1 and above will chain to channel 0 by default. Set this field to avoid this behaviour.</description>
61466                        <bitRange>[16:13]</bitRange>
61467                        <access>read-write</access>
61468                    </field>
61469                    <field>
61470                        <name>RING_SEL</name>
61471                        <description>Select whether RING_SIZE applies to read or write addresses.
61472                            If 0, read addresses are wrapped on a (1 &lt;&lt; RING_SIZE) boundary. If 1, write addresses are wrapped.</description>
61473                        <bitRange>[12:12]</bitRange>
61474                        <access>read-write</access>
61475                    </field>
61476                    <field>
61477                        <name>RING_SIZE</name>
61478                        <description>Size of address wrap region. If 0, don&#39;t wrap. For values n &gt; 0, only the lower n bits of the address will change. This wraps the address on a (1 &lt;&lt; n) byte boundary, facilitating access to naturally-aligned ring buffers.
61479
61480                            Ring sizes between 2 and 32768 bytes are possible. This can apply to either read or write addresses, based on value of RING_SEL.</description>
61481                        <bitRange>[11:8]</bitRange>
61482                        <access>read-write</access>
61483                        <enumeratedValues>
61484                            <enumeratedValue>
61485                                <name>RING_NONE</name>
61486                                <value>0</value>
61487                            </enumeratedValue>
61488                        </enumeratedValues>
61489                    </field>
61490                    <field>
61491                        <name>INCR_WRITE_REV</name>
61492                        <description>If 1, and INCR_WRITE is 1, the write address is decremented rather than incremented with each transfer.
61493
61494                            If 1, and INCR_WRITE is 0, this otherwise-unused combination causes the write address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
61495                        <bitRange>[7:7]</bitRange>
61496                        <access>read-write</access>
61497                    </field>
61498                    <field>
61499                        <name>INCR_WRITE</name>
61500                        <description>If 1, the write address increments with each transfer. If 0, each write is directed to the same, initial address.
61501
61502                            Generally this should be disabled for memory-to-peripheral transfers.</description>
61503                        <bitRange>[6:6]</bitRange>
61504                        <access>read-write</access>
61505                    </field>
61506                    <field>
61507                        <name>INCR_READ_REV</name>
61508                        <description>If 1, and INCR_READ is 1, the read address is decremented rather than incremented with each transfer.
61509
61510                            If 1, and INCR_READ is 0, this otherwise-unused combination causes the read address to be incremented by twice the transfer size, i.e. skipping over alternate addresses.</description>
61511                        <bitRange>[5:5]</bitRange>
61512                        <access>read-write</access>
61513                    </field>
61514                    <field>
61515                        <name>INCR_READ</name>
61516                        <description>If 1, the read address increments with each transfer. If 0, each read is directed to the same, initial address.
61517
61518                            Generally this should be disabled for peripheral-to-memory transfers.</description>
61519                        <bitRange>[4:4]</bitRange>
61520                        <access>read-write</access>
61521                    </field>
61522                    <field>
61523                        <name>DATA_SIZE</name>
61524                        <description>Set the size of each bus transfer (byte/halfword/word). READ_ADDR and WRITE_ADDR advance by this amount (1/2/4 bytes) with each transfer.</description>
61525                        <bitRange>[3:2]</bitRange>
61526                        <access>read-write</access>
61527                        <enumeratedValues>
61528                            <enumeratedValue>
61529                                <name>SIZE_BYTE</name>
61530                                <value>0</value>
61531                            </enumeratedValue>
61532                            <enumeratedValue>
61533                                <name>SIZE_HALFWORD</name>
61534                                <value>1</value>
61535                            </enumeratedValue>
61536                            <enumeratedValue>
61537                                <name>SIZE_WORD</name>
61538                                <value>2</value>
61539                            </enumeratedValue>
61540                        </enumeratedValues>
61541                    </field>
61542                    <field>
61543                        <name>HIGH_PRIORITY</name>
61544                        <description>HIGH_PRIORITY gives a channel preferential treatment in issue scheduling: in each scheduling round, all high priority channels are considered first, and then only a single low priority channel, before returning to the high priority channels.
61545
61546                            This only affects the order in which the DMA schedules channels. The DMA&#39;s bus priority is not changed. If the DMA is not saturated then a low priority channel will see no loss of throughput.</description>
61547                        <bitRange>[1:1]</bitRange>
61548                        <access>read-write</access>
61549                    </field>
61550                    <field>
61551                        <name>EN</name>
61552                        <description>DMA Channel Enable.
61553                            When 1, the channel will respond to triggering events, which will cause it to become BUSY and start transferring data. When 0, the channel will ignore triggers, stop issuing transfers, and pause the current transfer sequence (i.e. BUSY will remain high if already high)</description>
61554                        <bitRange>[0:0]</bitRange>
61555                        <access>read-write</access>
61556                    </field>
61557                </fields>
61558            </register>
61559            <register>
61560                <name>CH15_AL1_CTRL</name>
61561                <addressOffset>0x000003d0</addressOffset>
61562                <description>Alias for channel 15 CTRL register</description>
61563                <resetMask>0x00000000</resetMask>
61564                <fields>
61565                    <field>
61566                        <name>CH15_AL1_CTRL</name>
61567                        <bitRange>[31:0]</bitRange>
61568                        <access>read-write</access>
61569                    </field>
61570                </fields>
61571            </register>
61572            <register>
61573                <name>CH15_AL1_READ_ADDR</name>
61574                <addressOffset>0x000003d4</addressOffset>
61575                <description>Alias for channel 15 READ_ADDR register</description>
61576                <resetMask>0x00000000</resetMask>
61577                <fields>
61578                    <field>
61579                        <name>CH15_AL1_READ_ADDR</name>
61580                        <bitRange>[31:0]</bitRange>
61581                        <access>read-write</access>
61582                    </field>
61583                </fields>
61584            </register>
61585            <register>
61586                <name>CH15_AL1_WRITE_ADDR</name>
61587                <addressOffset>0x000003d8</addressOffset>
61588                <description>Alias for channel 15 WRITE_ADDR register</description>
61589                <resetMask>0x00000000</resetMask>
61590                <fields>
61591                    <field>
61592                        <name>CH15_AL1_WRITE_ADDR</name>
61593                        <bitRange>[31:0]</bitRange>
61594                        <access>read-write</access>
61595                    </field>
61596                </fields>
61597            </register>
61598            <register>
61599                <name>CH15_AL1_TRANS_COUNT_TRIG</name>
61600                <addressOffset>0x000003dc</addressOffset>
61601                <description>Alias for channel 15 TRANS_COUNT register
61602                    This is a trigger register (0xc). Writing a nonzero value will
61603                    reload the channel counter and start the channel.</description>
61604                <resetMask>0x00000000</resetMask>
61605                <fields>
61606                    <field>
61607                        <name>CH15_AL1_TRANS_COUNT_TRIG</name>
61608                        <bitRange>[31:0]</bitRange>
61609                        <access>read-write</access>
61610                    </field>
61611                </fields>
61612            </register>
61613            <register>
61614                <name>CH15_AL2_CTRL</name>
61615                <addressOffset>0x000003e0</addressOffset>
61616                <description>Alias for channel 15 CTRL register</description>
61617                <resetMask>0x00000000</resetMask>
61618                <fields>
61619                    <field>
61620                        <name>CH15_AL2_CTRL</name>
61621                        <bitRange>[31:0]</bitRange>
61622                        <access>read-write</access>
61623                    </field>
61624                </fields>
61625            </register>
61626            <register>
61627                <name>CH15_AL2_TRANS_COUNT</name>
61628                <addressOffset>0x000003e4</addressOffset>
61629                <description>Alias for channel 15 TRANS_COUNT register</description>
61630                <resetMask>0x00000000</resetMask>
61631                <fields>
61632                    <field>
61633                        <name>CH15_AL2_TRANS_COUNT</name>
61634                        <bitRange>[31:0]</bitRange>
61635                        <access>read-write</access>
61636                    </field>
61637                </fields>
61638            </register>
61639            <register>
61640                <name>CH15_AL2_READ_ADDR</name>
61641                <addressOffset>0x000003e8</addressOffset>
61642                <description>Alias for channel 15 READ_ADDR register</description>
61643                <resetMask>0x00000000</resetMask>
61644                <fields>
61645                    <field>
61646                        <name>CH15_AL2_READ_ADDR</name>
61647                        <bitRange>[31:0]</bitRange>
61648                        <access>read-write</access>
61649                    </field>
61650                </fields>
61651            </register>
61652            <register>
61653                <name>CH15_AL2_WRITE_ADDR_TRIG</name>
61654                <addressOffset>0x000003ec</addressOffset>
61655                <description>Alias for channel 15 WRITE_ADDR register
61656                    This is a trigger register (0xc). Writing a nonzero value will
61657                    reload the channel counter and start the channel.</description>
61658                <resetMask>0x00000000</resetMask>
61659                <fields>
61660                    <field>
61661                        <name>CH15_AL2_WRITE_ADDR_TRIG</name>
61662                        <bitRange>[31:0]</bitRange>
61663                        <access>read-write</access>
61664                    </field>
61665                </fields>
61666            </register>
61667            <register>
61668                <name>CH15_AL3_CTRL</name>
61669                <addressOffset>0x000003f0</addressOffset>
61670                <description>Alias for channel 15 CTRL register</description>
61671                <resetMask>0x00000000</resetMask>
61672                <fields>
61673                    <field>
61674                        <name>CH15_AL3_CTRL</name>
61675                        <bitRange>[31:0]</bitRange>
61676                        <access>read-write</access>
61677                    </field>
61678                </fields>
61679            </register>
61680            <register>
61681                <name>CH15_AL3_WRITE_ADDR</name>
61682                <addressOffset>0x000003f4</addressOffset>
61683                <description>Alias for channel 15 WRITE_ADDR register</description>
61684                <resetMask>0x00000000</resetMask>
61685                <fields>
61686                    <field>
61687                        <name>CH15_AL3_WRITE_ADDR</name>
61688                        <bitRange>[31:0]</bitRange>
61689                        <access>read-write</access>
61690                    </field>
61691                </fields>
61692            </register>
61693            <register>
61694                <name>CH15_AL3_TRANS_COUNT</name>
61695                <addressOffset>0x000003f8</addressOffset>
61696                <description>Alias for channel 15 TRANS_COUNT register</description>
61697                <resetMask>0x00000000</resetMask>
61698                <fields>
61699                    <field>
61700                        <name>CH15_AL3_TRANS_COUNT</name>
61701                        <bitRange>[31:0]</bitRange>
61702                        <access>read-write</access>
61703                    </field>
61704                </fields>
61705            </register>
61706            <register>
61707                <name>CH15_AL3_READ_ADDR_TRIG</name>
61708                <addressOffset>0x000003fc</addressOffset>
61709                <description>Alias for channel 15 READ_ADDR register
61710                    This is a trigger register (0xc). Writing a nonzero value will
61711                    reload the channel counter and start the channel.</description>
61712                <resetMask>0x00000000</resetMask>
61713                <fields>
61714                    <field>
61715                        <name>CH15_AL3_READ_ADDR_TRIG</name>
61716                        <bitRange>[31:0]</bitRange>
61717                        <access>read-write</access>
61718                    </field>
61719                </fields>
61720            </register>
61721            <register>
61722                <name>INTR</name>
61723                <addressOffset>0x00000400</addressOffset>
61724                <description>Interrupt Status (raw)</description>
61725                <resetValue>0x00000000</resetValue>
61726                <fields>
61727                    <field>
61728                        <name>INTR</name>
61729                        <description>Raw interrupt status for DMA Channels 0..15. Bit n corresponds to channel n. Ignores any masking or forcing. Channel interrupts can be cleared by writing a bit mask to INTR or INTS0/1/2/3.
61730
61731                            Channel interrupts can be routed to either of four system-level IRQs based on INTE0, INTE1, INTE2 and INTE3.
61732
61733                            The multiple system-level interrupts might be used to allow NVIC IRQ preemption for more time-critical channels, to spread IRQ load across different cores, or to target IRQs to different security domains.
61734
61735                            It is also valid to ignore the multiple IRQs, and just use INTE0/INTS0/IRQ 0.
61736
61737                            If this register is accessed at a security/privilege level less than that of a given channel (as defined by that channel&#39;s SECCFG_CHx register), then that channel&#39;s interrupt status will read as 0, ignore writes.</description>
61738                        <bitRange>[15:0]</bitRange>
61739                        <access>read-write</access>
61740                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61741                    </field>
61742                </fields>
61743            </register>
61744            <register>
61745                <name>INTE0</name>
61746                <addressOffset>0x00000404</addressOffset>
61747                <description>Interrupt Enables for IRQ 0</description>
61748                <resetValue>0x00000000</resetValue>
61749                <fields>
61750                    <field>
61751                        <name>INTE0</name>
61752                        <description>Set bit n to pass interrupts from channel n to DMA IRQ 0.
61753
61754                            Note this bit has no effect if the channel security/privilege level, defined by SECCFG_CHx, is greater than the IRQ security/privilege defined by SECCFG_IRQ0.</description>
61755                        <bitRange>[15:0]</bitRange>
61756                        <access>read-write</access>
61757                    </field>
61758                </fields>
61759            </register>
61760            <register>
61761                <name>INTF0</name>
61762                <addressOffset>0x00000408</addressOffset>
61763                <description>Force Interrupts</description>
61764                <resetValue>0x00000000</resetValue>
61765                <fields>
61766                    <field>
61767                        <name>INTF0</name>
61768                        <description>Write 1s to force the corresponding bits in INTS0. The interrupt remains asserted until INTF0 is cleared.</description>
61769                        <bitRange>[15:0]</bitRange>
61770                        <access>read-write</access>
61771                    </field>
61772                </fields>
61773            </register>
61774            <register>
61775                <name>INTS0</name>
61776                <addressOffset>0x0000040c</addressOffset>
61777                <description>Interrupt Status for IRQ 0</description>
61778                <resetValue>0x00000000</resetValue>
61779                <fields>
61780                    <field>
61781                        <name>INTS0</name>
61782                        <description>Indicates active channel interrupt requests which are currently causing IRQ 0 to be asserted.
61783                            Channel interrupts can be cleared by writing a bit mask here.
61784
61785                            Channels with a security/privilege (SECCFG_CHx) greater SECCFG_IRQ0) read as 0 in this register, and ignore writes.</description>
61786                        <bitRange>[15:0]</bitRange>
61787                        <access>read-write</access>
61788                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61789                    </field>
61790                </fields>
61791            </register>
61792            <register>
61793                <name>INTR1</name>
61794                <addressOffset>0x00000410</addressOffset>
61795                <description>Interrupt Status (raw)</description>
61796                <resetValue>0x00000000</resetValue>
61797                <fields>
61798                    <field>
61799                        <name>INTR1</name>
61800                        <description>Raw interrupt status for DMA Channels 0..15. Bit n corresponds to channel n. Ignores any masking or forcing. Channel interrupts can be cleared by writing a bit mask to INTR or INTS0/1/2/3.
61801
61802                            Channel interrupts can be routed to either of four system-level IRQs based on INTE0, INTE1, INTE2 and INTE3.
61803
61804                            The multiple system-level interrupts might be used to allow NVIC IRQ preemption for more time-critical channels, to spread IRQ load across different cores, or to target IRQs to different security domains.
61805
61806                            It is also valid to ignore the multiple IRQs, and just use INTE0/INTS0/IRQ 0.
61807
61808                            If this register is accessed at a security/privilege level less than that of a given channel (as defined by that channel&#39;s SECCFG_CHx register), then that channel&#39;s interrupt status will read as 0, ignore writes.</description>
61809                        <bitRange>[15:0]</bitRange>
61810                        <access>read-write</access>
61811                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61812                    </field>
61813                </fields>
61814            </register>
61815            <register>
61816                <name>INTE1</name>
61817                <addressOffset>0x00000414</addressOffset>
61818                <description>Interrupt Enables for IRQ 1</description>
61819                <resetValue>0x00000000</resetValue>
61820                <fields>
61821                    <field>
61822                        <name>INTE1</name>
61823                        <description>Set bit n to pass interrupts from channel n to DMA IRQ 1.
61824
61825                            Note this bit has no effect if the channel security/privilege level, defined by SECCFG_CHx, is greater than the IRQ security/privilege defined by SECCFG_IRQ1.</description>
61826                        <bitRange>[15:0]</bitRange>
61827                        <access>read-write</access>
61828                    </field>
61829                </fields>
61830            </register>
61831            <register>
61832                <name>INTF1</name>
61833                <addressOffset>0x00000418</addressOffset>
61834                <description>Force Interrupts</description>
61835                <resetValue>0x00000000</resetValue>
61836                <fields>
61837                    <field>
61838                        <name>INTF1</name>
61839                        <description>Write 1s to force the corresponding bits in INTS1. The interrupt remains asserted until INTF1 is cleared.</description>
61840                        <bitRange>[15:0]</bitRange>
61841                        <access>read-write</access>
61842                    </field>
61843                </fields>
61844            </register>
61845            <register>
61846                <name>INTS1</name>
61847                <addressOffset>0x0000041c</addressOffset>
61848                <description>Interrupt Status for IRQ 1</description>
61849                <resetValue>0x00000000</resetValue>
61850                <fields>
61851                    <field>
61852                        <name>INTS1</name>
61853                        <description>Indicates active channel interrupt requests which are currently causing IRQ 1 to be asserted.
61854                            Channel interrupts can be cleared by writing a bit mask here.
61855
61856                            Channels with a security/privilege (SECCFG_CHx) greater SECCFG_IRQ1) read as 0 in this register, and ignore writes.</description>
61857                        <bitRange>[15:0]</bitRange>
61858                        <access>read-write</access>
61859                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61860                    </field>
61861                </fields>
61862            </register>
61863            <register>
61864                <name>INTR2</name>
61865                <addressOffset>0x00000420</addressOffset>
61866                <description>Interrupt Status (raw)</description>
61867                <resetValue>0x00000000</resetValue>
61868                <fields>
61869                    <field>
61870                        <name>INTR2</name>
61871                        <description>Raw interrupt status for DMA Channels 0..15. Bit n corresponds to channel n. Ignores any masking or forcing. Channel interrupts can be cleared by writing a bit mask to INTR or INTS0/1/2/3.
61872
61873                            Channel interrupts can be routed to either of four system-level IRQs based on INTE0, INTE1, INTE2 and INTE3.
61874
61875                            The multiple system-level interrupts might be used to allow NVIC IRQ preemption for more time-critical channels, to spread IRQ load across different cores, or to target IRQs to different security domains.
61876
61877                            It is also valid to ignore the multiple IRQs, and just use INTE0/INTS0/IRQ 0.
61878
61879                            If this register is accessed at a security/privilege level less than that of a given channel (as defined by that channel&#39;s SECCFG_CHx register), then that channel&#39;s interrupt status will read as 0, ignore writes.</description>
61880                        <bitRange>[15:0]</bitRange>
61881                        <access>read-write</access>
61882                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61883                    </field>
61884                </fields>
61885            </register>
61886            <register>
61887                <name>INTE2</name>
61888                <addressOffset>0x00000424</addressOffset>
61889                <description>Interrupt Enables for IRQ 2</description>
61890                <resetValue>0x00000000</resetValue>
61891                <fields>
61892                    <field>
61893                        <name>INTE2</name>
61894                        <description>Set bit n to pass interrupts from channel n to DMA IRQ 2.
61895
61896                            Note this bit has no effect if the channel security/privilege level, defined by SECCFG_CHx, is greater than the IRQ security/privilege defined by SECCFG_IRQ2.</description>
61897                        <bitRange>[15:0]</bitRange>
61898                        <access>read-write</access>
61899                    </field>
61900                </fields>
61901            </register>
61902            <register>
61903                <name>INTF2</name>
61904                <addressOffset>0x00000428</addressOffset>
61905                <description>Force Interrupts</description>
61906                <resetValue>0x00000000</resetValue>
61907                <fields>
61908                    <field>
61909                        <name>INTF2</name>
61910                        <description>Write 1s to force the corresponding bits in INTS2. The interrupt remains asserted until INTF2 is cleared.</description>
61911                        <bitRange>[15:0]</bitRange>
61912                        <access>read-write</access>
61913                    </field>
61914                </fields>
61915            </register>
61916            <register>
61917                <name>INTS2</name>
61918                <addressOffset>0x0000042c</addressOffset>
61919                <description>Interrupt Status for IRQ 2</description>
61920                <resetValue>0x00000000</resetValue>
61921                <fields>
61922                    <field>
61923                        <name>INTS2</name>
61924                        <description>Indicates active channel interrupt requests which are currently causing IRQ 2 to be asserted.
61925                            Channel interrupts can be cleared by writing a bit mask here.
61926
61927                            Channels with a security/privilege (SECCFG_CHx) greater SECCFG_IRQ2) read as 0 in this register, and ignore writes.</description>
61928                        <bitRange>[15:0]</bitRange>
61929                        <access>read-write</access>
61930                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61931                    </field>
61932                </fields>
61933            </register>
61934            <register>
61935                <name>INTR3</name>
61936                <addressOffset>0x00000430</addressOffset>
61937                <description>Interrupt Status (raw)</description>
61938                <resetValue>0x00000000</resetValue>
61939                <fields>
61940                    <field>
61941                        <name>INTR3</name>
61942                        <description>Raw interrupt status for DMA Channels 0..15. Bit n corresponds to channel n. Ignores any masking or forcing. Channel interrupts can be cleared by writing a bit mask to INTR or INTS0/1/2/3.
61943
61944                            Channel interrupts can be routed to either of four system-level IRQs based on INTE0, INTE1, INTE2 and INTE3.
61945
61946                            The multiple system-level interrupts might be used to allow NVIC IRQ preemption for more time-critical channels, to spread IRQ load across different cores, or to target IRQs to different security domains.
61947
61948                            It is also valid to ignore the multiple IRQs, and just use INTE0/INTS0/IRQ 0.
61949
61950                            If this register is accessed at a security/privilege level less than that of a given channel (as defined by that channel&#39;s SECCFG_CHx register), then that channel&#39;s interrupt status will read as 0, ignore writes.</description>
61951                        <bitRange>[15:0]</bitRange>
61952                        <access>read-write</access>
61953                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
61954                    </field>
61955                </fields>
61956            </register>
61957            <register>
61958                <name>INTE3</name>
61959                <addressOffset>0x00000434</addressOffset>
61960                <description>Interrupt Enables for IRQ 3</description>
61961                <resetValue>0x00000000</resetValue>
61962                <fields>
61963                    <field>
61964                        <name>INTE3</name>
61965                        <description>Set bit n to pass interrupts from channel n to DMA IRQ 3.
61966
61967                            Note this bit has no effect if the channel security/privilege level, defined by SECCFG_CHx, is greater than the IRQ security/privilege defined by SECCFG_IRQ3.</description>
61968                        <bitRange>[15:0]</bitRange>
61969                        <access>read-write</access>
61970                    </field>
61971                </fields>
61972            </register>
61973            <register>
61974                <name>INTF3</name>
61975                <addressOffset>0x00000438</addressOffset>
61976                <description>Force Interrupts</description>
61977                <resetValue>0x00000000</resetValue>
61978                <fields>
61979                    <field>
61980                        <name>INTF3</name>
61981                        <description>Write 1s to force the corresponding bits in INTS3. The interrupt remains asserted until INTF3 is cleared.</description>
61982                        <bitRange>[15:0]</bitRange>
61983                        <access>read-write</access>
61984                    </field>
61985                </fields>
61986            </register>
61987            <register>
61988                <name>INTS3</name>
61989                <addressOffset>0x0000043c</addressOffset>
61990                <description>Interrupt Status for IRQ 3</description>
61991                <resetValue>0x00000000</resetValue>
61992                <fields>
61993                    <field>
61994                        <name>INTS3</name>
61995                        <description>Indicates active channel interrupt requests which are currently causing IRQ 3 to be asserted.
61996                            Channel interrupts can be cleared by writing a bit mask here.
61997
61998                            Channels with a security/privilege (SECCFG_CHx) greater SECCFG_IRQ3) read as 0 in this register, and ignore writes.</description>
61999                        <bitRange>[15:0]</bitRange>
62000                        <access>read-write</access>
62001                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
62002                    </field>
62003                </fields>
62004            </register>
62005            <register>
62006                <name>TIMER0</name>
62007                <addressOffset>0x00000440</addressOffset>
62008                <description>Pacing (X/Y) fractional timer
62009                    The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.</description>
62010                <resetValue>0x00000000</resetValue>
62011                <fields>
62012                    <field>
62013                        <name>X</name>
62014                        <description>Pacing Timer Dividend. Specifies the X value for the (X/Y) fractional timer.</description>
62015                        <bitRange>[31:16]</bitRange>
62016                        <access>read-write</access>
62017                    </field>
62018                    <field>
62019                        <name>Y</name>
62020                        <description>Pacing Timer Divisor. Specifies the Y value for the (X/Y) fractional timer.</description>
62021                        <bitRange>[15:0]</bitRange>
62022                        <access>read-write</access>
62023                    </field>
62024                </fields>
62025            </register>
62026            <register>
62027                <name>TIMER1</name>
62028                <addressOffset>0x00000444</addressOffset>
62029                <description>Pacing (X/Y) fractional timer
62030                    The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.</description>
62031                <resetValue>0x00000000</resetValue>
62032                <fields>
62033                    <field>
62034                        <name>X</name>
62035                        <description>Pacing Timer Dividend. Specifies the X value for the (X/Y) fractional timer.</description>
62036                        <bitRange>[31:16]</bitRange>
62037                        <access>read-write</access>
62038                    </field>
62039                    <field>
62040                        <name>Y</name>
62041                        <description>Pacing Timer Divisor. Specifies the Y value for the (X/Y) fractional timer.</description>
62042                        <bitRange>[15:0]</bitRange>
62043                        <access>read-write</access>
62044                    </field>
62045                </fields>
62046            </register>
62047            <register>
62048                <name>TIMER2</name>
62049                <addressOffset>0x00000448</addressOffset>
62050                <description>Pacing (X/Y) fractional timer
62051                    The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.</description>
62052                <resetValue>0x00000000</resetValue>
62053                <fields>
62054                    <field>
62055                        <name>X</name>
62056                        <description>Pacing Timer Dividend. Specifies the X value for the (X/Y) fractional timer.</description>
62057                        <bitRange>[31:16]</bitRange>
62058                        <access>read-write</access>
62059                    </field>
62060                    <field>
62061                        <name>Y</name>
62062                        <description>Pacing Timer Divisor. Specifies the Y value for the (X/Y) fractional timer.</description>
62063                        <bitRange>[15:0]</bitRange>
62064                        <access>read-write</access>
62065                    </field>
62066                </fields>
62067            </register>
62068            <register>
62069                <name>TIMER3</name>
62070                <addressOffset>0x0000044c</addressOffset>
62071                <description>Pacing (X/Y) fractional timer
62072                    The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.</description>
62073                <resetValue>0x00000000</resetValue>
62074                <fields>
62075                    <field>
62076                        <name>X</name>
62077                        <description>Pacing Timer Dividend. Specifies the X value for the (X/Y) fractional timer.</description>
62078                        <bitRange>[31:16]</bitRange>
62079                        <access>read-write</access>
62080                    </field>
62081                    <field>
62082                        <name>Y</name>
62083                        <description>Pacing Timer Divisor. Specifies the Y value for the (X/Y) fractional timer.</description>
62084                        <bitRange>[15:0]</bitRange>
62085                        <access>read-write</access>
62086                    </field>
62087                </fields>
62088            </register>
62089            <register>
62090                <name>MULTI_CHAN_TRIGGER</name>
62091                <addressOffset>0x00000450</addressOffset>
62092                <description>Trigger one or more channels simultaneously</description>
62093                <resetValue>0x00000000</resetValue>
62094                <fields>
62095                    <field>
62096                        <name>MULTI_CHAN_TRIGGER</name>
62097                        <description>Each bit in this register corresponds to a DMA channel. Writing a 1 to the relevant bit is the same as writing to that channel&#39;s trigger register; the channel will start if it is currently enabled and not already busy.</description>
62098                        <bitRange>[15:0]</bitRange>
62099                        <access>write-only</access>
62100                    </field>
62101                </fields>
62102            </register>
62103            <register>
62104                <name>SNIFF_CTRL</name>
62105                <addressOffset>0x00000454</addressOffset>
62106                <description>Sniffer Control</description>
62107                <resetValue>0x00000000</resetValue>
62108                <fields>
62109                    <field>
62110                        <name>OUT_INV</name>
62111                        <description>If set, the result appears inverted (bitwise complement) when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus.</description>
62112                        <bitRange>[11:11]</bitRange>
62113                        <access>read-write</access>
62114                    </field>
62115                    <field>
62116                        <name>OUT_REV</name>
62117                        <description>If set, the result appears bit-reversed when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus.</description>
62118                        <bitRange>[10:10]</bitRange>
62119                        <access>read-write</access>
62120                    </field>
62121                    <field>
62122                        <name>BSWAP</name>
62123                        <description>Locally perform a byte reverse on the sniffed data, before feeding into checksum.
62124
62125                            Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if channel CTRL_BSWAP and SNIFF_CTRL_BSWAP are both enabled, their effects cancel from the sniffer&#39;s point of view.</description>
62126                        <bitRange>[9:9]</bitRange>
62127                        <access>read-write</access>
62128                    </field>
62129                    <field>
62130                        <name>CALC</name>
62131                        <bitRange>[8:5]</bitRange>
62132                        <access>read-write</access>
62133                        <enumeratedValues>
62134                            <enumeratedValue>
62135                                <name>CRC32</name>
62136                                <value>0</value>
62137                                <description>Calculate a CRC-32 (IEEE802.3 polynomial)</description>
62138                            </enumeratedValue>
62139                            <enumeratedValue>
62140                                <name>CRC32R</name>
62141                                <value>1</value>
62142                                <description>Calculate a CRC-32 (IEEE802.3 polynomial) with bit reversed data</description>
62143                            </enumeratedValue>
62144                            <enumeratedValue>
62145                                <name>CRC16</name>
62146                                <value>2</value>
62147                                <description>Calculate a CRC-16-CCITT</description>
62148                            </enumeratedValue>
62149                            <enumeratedValue>
62150                                <name>CRC16R</name>
62151                                <value>3</value>
62152                                <description>Calculate a CRC-16-CCITT with bit reversed data</description>
62153                            </enumeratedValue>
62154                            <enumeratedValue>
62155                                <name>EVEN</name>
62156                                <value>14</value>
62157                                <description>XOR reduction over all data. == 1 if the total 1 population count is odd.</description>
62158                            </enumeratedValue>
62159                            <enumeratedValue>
62160                                <name>SUM</name>
62161                                <value>15</value>
62162                                <description>Calculate a simple 32-bit checksum (addition with a 32 bit accumulator)</description>
62163                            </enumeratedValue>
62164                        </enumeratedValues>
62165                    </field>
62166                    <field>
62167                        <name>DMACH</name>
62168                        <description>DMA channel for Sniffer to observe</description>
62169                        <bitRange>[4:1]</bitRange>
62170                        <access>read-write</access>
62171                    </field>
62172                    <field>
62173                        <name>EN</name>
62174                        <description>Enable sniffer</description>
62175                        <bitRange>[0:0]</bitRange>
62176                        <access>read-write</access>
62177                    </field>
62178                </fields>
62179            </register>
62180            <register>
62181                <name>SNIFF_DATA</name>
62182                <addressOffset>0x00000458</addressOffset>
62183                <description>Data accumulator for sniff hardware</description>
62184                <resetValue>0x00000000</resetValue>
62185                <fields>
62186                    <field>
62187                        <name>SNIFF_DATA</name>
62188                        <description>Write an initial seed value here before starting a DMA transfer on the channel indicated by SNIFF_CTRL_DMACH. The hardware will update this register each time it observes a read from the indicated channel. Once the channel completes, the final result can be read from this register.</description>
62189                        <bitRange>[31:0]</bitRange>
62190                        <access>read-write</access>
62191                    </field>
62192                </fields>
62193            </register>
62194            <register>
62195                <name>FIFO_LEVELS</name>
62196                <addressOffset>0x00000460</addressOffset>
62197                <description>Debug RAF, WAF, TDF levels</description>
62198                <resetValue>0x00000000</resetValue>
62199                <fields>
62200                    <field>
62201                        <name>RAF_LVL</name>
62202                        <description>Current Read-Address-FIFO fill level</description>
62203                        <bitRange>[23:16]</bitRange>
62204                        <access>read-only</access>
62205                    </field>
62206                    <field>
62207                        <name>WAF_LVL</name>
62208                        <description>Current Write-Address-FIFO fill level</description>
62209                        <bitRange>[15:8]</bitRange>
62210                        <access>read-only</access>
62211                    </field>
62212                    <field>
62213                        <name>TDF_LVL</name>
62214                        <description>Current Transfer-Data-FIFO fill level</description>
62215                        <bitRange>[7:0]</bitRange>
62216                        <access>read-only</access>
62217                    </field>
62218                </fields>
62219            </register>
62220            <register>
62221                <name>CHAN_ABORT</name>
62222                <addressOffset>0x00000464</addressOffset>
62223                <description>Abort an in-progress transfer sequence on one or more channels</description>
62224                <resetValue>0x00000000</resetValue>
62225                <fields>
62226                    <field>
62227                        <name>CHAN_ABORT</name>
62228                        <description>Each bit corresponds to a channel. Writing a 1 aborts whatever transfer sequence is in progress on that channel. The bit will remain high until any in-flight transfers have been flushed through the address and data FIFOs.
62229
62230                            After writing, this register must be polled until it returns all-zero. Until this point, it is unsafe to restart the channel.</description>
62231                        <bitRange>[15:0]</bitRange>
62232                        <access>write-only</access>
62233                    </field>
62234                </fields>
62235            </register>
62236            <register>
62237                <name>N_CHANNELS</name>
62238                <addressOffset>0x00000468</addressOffset>
62239                <description>The number of channels this DMA instance is equipped with. This DMA supports up to 16 hardware channels, but can be configured with as few as one, to minimise silicon area.</description>
62240                <resetMask>0x00000000</resetMask>
62241                <fields>
62242                    <field>
62243                        <name>N_CHANNELS</name>
62244                        <bitRange>[4:0]</bitRange>
62245                        <access>read-only</access>
62246                    </field>
62247                </fields>
62248            </register>
62249            <register>
62250                <name>SECCFG_CH0</name>
62251                <addressOffset>0x00000480</addressOffset>
62252                <description>Security configuration for channel 0. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62253
62254                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62255
62256                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62257
62258                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62259                <resetValue>0x00000003</resetValue>
62260                <fields>
62261                    <field>
62262                        <name>LOCK</name>
62263                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62264
62265                            Once its LOCK bit is set, this register becomes read-only.
62266
62267                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62268                        <bitRange>[2:2]</bitRange>
62269                        <access>read-write</access>
62270                    </field>
62271                    <field>
62272                        <name>S</name>
62273                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62274
62275                            If 1, this channel is controllable only from a Secure context.</description>
62276                        <bitRange>[1:1]</bitRange>
62277                        <access>read-write</access>
62278                    </field>
62279                    <field>
62280                        <name>P</name>
62281                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62282
62283                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62284                        <bitRange>[0:0]</bitRange>
62285                        <access>read-write</access>
62286                    </field>
62287                </fields>
62288            </register>
62289            <register>
62290                <name>SECCFG_CH1</name>
62291                <addressOffset>0x00000484</addressOffset>
62292                <description>Security configuration for channel 1. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62293
62294                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62295
62296                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62297
62298                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62299                <resetValue>0x00000003</resetValue>
62300                <fields>
62301                    <field>
62302                        <name>LOCK</name>
62303                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62304
62305                            Once its LOCK bit is set, this register becomes read-only.
62306
62307                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62308                        <bitRange>[2:2]</bitRange>
62309                        <access>read-write</access>
62310                    </field>
62311                    <field>
62312                        <name>S</name>
62313                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62314
62315                            If 1, this channel is controllable only from a Secure context.</description>
62316                        <bitRange>[1:1]</bitRange>
62317                        <access>read-write</access>
62318                    </field>
62319                    <field>
62320                        <name>P</name>
62321                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62322
62323                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62324                        <bitRange>[0:0]</bitRange>
62325                        <access>read-write</access>
62326                    </field>
62327                </fields>
62328            </register>
62329            <register>
62330                <name>SECCFG_CH2</name>
62331                <addressOffset>0x00000488</addressOffset>
62332                <description>Security configuration for channel 2. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62333
62334                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62335
62336                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62337
62338                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62339                <resetValue>0x00000003</resetValue>
62340                <fields>
62341                    <field>
62342                        <name>LOCK</name>
62343                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62344
62345                            Once its LOCK bit is set, this register becomes read-only.
62346
62347                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62348                        <bitRange>[2:2]</bitRange>
62349                        <access>read-write</access>
62350                    </field>
62351                    <field>
62352                        <name>S</name>
62353                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62354
62355                            If 1, this channel is controllable only from a Secure context.</description>
62356                        <bitRange>[1:1]</bitRange>
62357                        <access>read-write</access>
62358                    </field>
62359                    <field>
62360                        <name>P</name>
62361                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62362
62363                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62364                        <bitRange>[0:0]</bitRange>
62365                        <access>read-write</access>
62366                    </field>
62367                </fields>
62368            </register>
62369            <register>
62370                <name>SECCFG_CH3</name>
62371                <addressOffset>0x0000048c</addressOffset>
62372                <description>Security configuration for channel 3. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62373
62374                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62375
62376                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62377
62378                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62379                <resetValue>0x00000003</resetValue>
62380                <fields>
62381                    <field>
62382                        <name>LOCK</name>
62383                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62384
62385                            Once its LOCK bit is set, this register becomes read-only.
62386
62387                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62388                        <bitRange>[2:2]</bitRange>
62389                        <access>read-write</access>
62390                    </field>
62391                    <field>
62392                        <name>S</name>
62393                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62394
62395                            If 1, this channel is controllable only from a Secure context.</description>
62396                        <bitRange>[1:1]</bitRange>
62397                        <access>read-write</access>
62398                    </field>
62399                    <field>
62400                        <name>P</name>
62401                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62402
62403                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62404                        <bitRange>[0:0]</bitRange>
62405                        <access>read-write</access>
62406                    </field>
62407                </fields>
62408            </register>
62409            <register>
62410                <name>SECCFG_CH4</name>
62411                <addressOffset>0x00000490</addressOffset>
62412                <description>Security configuration for channel 4. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62413
62414                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62415
62416                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62417
62418                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62419                <resetValue>0x00000003</resetValue>
62420                <fields>
62421                    <field>
62422                        <name>LOCK</name>
62423                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62424
62425                            Once its LOCK bit is set, this register becomes read-only.
62426
62427                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62428                        <bitRange>[2:2]</bitRange>
62429                        <access>read-write</access>
62430                    </field>
62431                    <field>
62432                        <name>S</name>
62433                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62434
62435                            If 1, this channel is controllable only from a Secure context.</description>
62436                        <bitRange>[1:1]</bitRange>
62437                        <access>read-write</access>
62438                    </field>
62439                    <field>
62440                        <name>P</name>
62441                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62442
62443                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62444                        <bitRange>[0:0]</bitRange>
62445                        <access>read-write</access>
62446                    </field>
62447                </fields>
62448            </register>
62449            <register>
62450                <name>SECCFG_CH5</name>
62451                <addressOffset>0x00000494</addressOffset>
62452                <description>Security configuration for channel 5. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62453
62454                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62455
62456                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62457
62458                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62459                <resetValue>0x00000003</resetValue>
62460                <fields>
62461                    <field>
62462                        <name>LOCK</name>
62463                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62464
62465                            Once its LOCK bit is set, this register becomes read-only.
62466
62467                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62468                        <bitRange>[2:2]</bitRange>
62469                        <access>read-write</access>
62470                    </field>
62471                    <field>
62472                        <name>S</name>
62473                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62474
62475                            If 1, this channel is controllable only from a Secure context.</description>
62476                        <bitRange>[1:1]</bitRange>
62477                        <access>read-write</access>
62478                    </field>
62479                    <field>
62480                        <name>P</name>
62481                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62482
62483                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62484                        <bitRange>[0:0]</bitRange>
62485                        <access>read-write</access>
62486                    </field>
62487                </fields>
62488            </register>
62489            <register>
62490                <name>SECCFG_CH6</name>
62491                <addressOffset>0x00000498</addressOffset>
62492                <description>Security configuration for channel 6. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62493
62494                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62495
62496                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62497
62498                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62499                <resetValue>0x00000003</resetValue>
62500                <fields>
62501                    <field>
62502                        <name>LOCK</name>
62503                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62504
62505                            Once its LOCK bit is set, this register becomes read-only.
62506
62507                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62508                        <bitRange>[2:2]</bitRange>
62509                        <access>read-write</access>
62510                    </field>
62511                    <field>
62512                        <name>S</name>
62513                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62514
62515                            If 1, this channel is controllable only from a Secure context.</description>
62516                        <bitRange>[1:1]</bitRange>
62517                        <access>read-write</access>
62518                    </field>
62519                    <field>
62520                        <name>P</name>
62521                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62522
62523                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62524                        <bitRange>[0:0]</bitRange>
62525                        <access>read-write</access>
62526                    </field>
62527                </fields>
62528            </register>
62529            <register>
62530                <name>SECCFG_CH7</name>
62531                <addressOffset>0x0000049c</addressOffset>
62532                <description>Security configuration for channel 7. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62533
62534                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62535
62536                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62537
62538                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62539                <resetValue>0x00000003</resetValue>
62540                <fields>
62541                    <field>
62542                        <name>LOCK</name>
62543                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62544
62545                            Once its LOCK bit is set, this register becomes read-only.
62546
62547                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62548                        <bitRange>[2:2]</bitRange>
62549                        <access>read-write</access>
62550                    </field>
62551                    <field>
62552                        <name>S</name>
62553                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62554
62555                            If 1, this channel is controllable only from a Secure context.</description>
62556                        <bitRange>[1:1]</bitRange>
62557                        <access>read-write</access>
62558                    </field>
62559                    <field>
62560                        <name>P</name>
62561                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62562
62563                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62564                        <bitRange>[0:0]</bitRange>
62565                        <access>read-write</access>
62566                    </field>
62567                </fields>
62568            </register>
62569            <register>
62570                <name>SECCFG_CH8</name>
62571                <addressOffset>0x000004a0</addressOffset>
62572                <description>Security configuration for channel 8. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62573
62574                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62575
62576                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62577
62578                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62579                <resetValue>0x00000003</resetValue>
62580                <fields>
62581                    <field>
62582                        <name>LOCK</name>
62583                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62584
62585                            Once its LOCK bit is set, this register becomes read-only.
62586
62587                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62588                        <bitRange>[2:2]</bitRange>
62589                        <access>read-write</access>
62590                    </field>
62591                    <field>
62592                        <name>S</name>
62593                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62594
62595                            If 1, this channel is controllable only from a Secure context.</description>
62596                        <bitRange>[1:1]</bitRange>
62597                        <access>read-write</access>
62598                    </field>
62599                    <field>
62600                        <name>P</name>
62601                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62602
62603                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62604                        <bitRange>[0:0]</bitRange>
62605                        <access>read-write</access>
62606                    </field>
62607                </fields>
62608            </register>
62609            <register>
62610                <name>SECCFG_CH9</name>
62611                <addressOffset>0x000004a4</addressOffset>
62612                <description>Security configuration for channel 9. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62613
62614                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62615
62616                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62617
62618                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62619                <resetValue>0x00000003</resetValue>
62620                <fields>
62621                    <field>
62622                        <name>LOCK</name>
62623                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62624
62625                            Once its LOCK bit is set, this register becomes read-only.
62626
62627                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62628                        <bitRange>[2:2]</bitRange>
62629                        <access>read-write</access>
62630                    </field>
62631                    <field>
62632                        <name>S</name>
62633                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62634
62635                            If 1, this channel is controllable only from a Secure context.</description>
62636                        <bitRange>[1:1]</bitRange>
62637                        <access>read-write</access>
62638                    </field>
62639                    <field>
62640                        <name>P</name>
62641                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62642
62643                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62644                        <bitRange>[0:0]</bitRange>
62645                        <access>read-write</access>
62646                    </field>
62647                </fields>
62648            </register>
62649            <register>
62650                <name>SECCFG_CH10</name>
62651                <addressOffset>0x000004a8</addressOffset>
62652                <description>Security configuration for channel 10. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62653
62654                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62655
62656                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62657
62658                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62659                <resetValue>0x00000003</resetValue>
62660                <fields>
62661                    <field>
62662                        <name>LOCK</name>
62663                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62664
62665                            Once its LOCK bit is set, this register becomes read-only.
62666
62667                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62668                        <bitRange>[2:2]</bitRange>
62669                        <access>read-write</access>
62670                    </field>
62671                    <field>
62672                        <name>S</name>
62673                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62674
62675                            If 1, this channel is controllable only from a Secure context.</description>
62676                        <bitRange>[1:1]</bitRange>
62677                        <access>read-write</access>
62678                    </field>
62679                    <field>
62680                        <name>P</name>
62681                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62682
62683                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62684                        <bitRange>[0:0]</bitRange>
62685                        <access>read-write</access>
62686                    </field>
62687                </fields>
62688            </register>
62689            <register>
62690                <name>SECCFG_CH11</name>
62691                <addressOffset>0x000004ac</addressOffset>
62692                <description>Security configuration for channel 11. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62693
62694                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62695
62696                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62697
62698                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62699                <resetValue>0x00000003</resetValue>
62700                <fields>
62701                    <field>
62702                        <name>LOCK</name>
62703                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62704
62705                            Once its LOCK bit is set, this register becomes read-only.
62706
62707                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62708                        <bitRange>[2:2]</bitRange>
62709                        <access>read-write</access>
62710                    </field>
62711                    <field>
62712                        <name>S</name>
62713                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62714
62715                            If 1, this channel is controllable only from a Secure context.</description>
62716                        <bitRange>[1:1]</bitRange>
62717                        <access>read-write</access>
62718                    </field>
62719                    <field>
62720                        <name>P</name>
62721                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62722
62723                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62724                        <bitRange>[0:0]</bitRange>
62725                        <access>read-write</access>
62726                    </field>
62727                </fields>
62728            </register>
62729            <register>
62730                <name>SECCFG_CH12</name>
62731                <addressOffset>0x000004b0</addressOffset>
62732                <description>Security configuration for channel 12. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62733
62734                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62735
62736                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62737
62738                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62739                <resetValue>0x00000003</resetValue>
62740                <fields>
62741                    <field>
62742                        <name>LOCK</name>
62743                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62744
62745                            Once its LOCK bit is set, this register becomes read-only.
62746
62747                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62748                        <bitRange>[2:2]</bitRange>
62749                        <access>read-write</access>
62750                    </field>
62751                    <field>
62752                        <name>S</name>
62753                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62754
62755                            If 1, this channel is controllable only from a Secure context.</description>
62756                        <bitRange>[1:1]</bitRange>
62757                        <access>read-write</access>
62758                    </field>
62759                    <field>
62760                        <name>P</name>
62761                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62762
62763                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62764                        <bitRange>[0:0]</bitRange>
62765                        <access>read-write</access>
62766                    </field>
62767                </fields>
62768            </register>
62769            <register>
62770                <name>SECCFG_CH13</name>
62771                <addressOffset>0x000004b4</addressOffset>
62772                <description>Security configuration for channel 13. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62773
62774                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62775
62776                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62777
62778                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62779                <resetValue>0x00000003</resetValue>
62780                <fields>
62781                    <field>
62782                        <name>LOCK</name>
62783                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62784
62785                            Once its LOCK bit is set, this register becomes read-only.
62786
62787                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62788                        <bitRange>[2:2]</bitRange>
62789                        <access>read-write</access>
62790                    </field>
62791                    <field>
62792                        <name>S</name>
62793                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62794
62795                            If 1, this channel is controllable only from a Secure context.</description>
62796                        <bitRange>[1:1]</bitRange>
62797                        <access>read-write</access>
62798                    </field>
62799                    <field>
62800                        <name>P</name>
62801                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62802
62803                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62804                        <bitRange>[0:0]</bitRange>
62805                        <access>read-write</access>
62806                    </field>
62807                </fields>
62808            </register>
62809            <register>
62810                <name>SECCFG_CH14</name>
62811                <addressOffset>0x000004b8</addressOffset>
62812                <description>Security configuration for channel 14. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62813
62814                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62815
62816                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62817
62818                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62819                <resetValue>0x00000003</resetValue>
62820                <fields>
62821                    <field>
62822                        <name>LOCK</name>
62823                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62824
62825                            Once its LOCK bit is set, this register becomes read-only.
62826
62827                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62828                        <bitRange>[2:2]</bitRange>
62829                        <access>read-write</access>
62830                    </field>
62831                    <field>
62832                        <name>S</name>
62833                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62834
62835                            If 1, this channel is controllable only from a Secure context.</description>
62836                        <bitRange>[1:1]</bitRange>
62837                        <access>read-write</access>
62838                    </field>
62839                    <field>
62840                        <name>P</name>
62841                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62842
62843                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62844                        <bitRange>[0:0]</bitRange>
62845                        <access>read-write</access>
62846                    </field>
62847                </fields>
62848            </register>
62849            <register>
62850                <name>SECCFG_CH15</name>
62851                <addressOffset>0x000004bc</addressOffset>
62852                <description>Security configuration for channel 15. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.
62853
62854                    If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P &gt; S+U &gt; NS+P &gt; NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.
62855
62856                    This register automatically locks down (becomes read-only) once software starts to configure the channel.
62857
62858                    This register is world-readable, but is writable only from a Secure, Privileged context.</description>
62859                <resetValue>0x00000003</resetValue>
62860                <fields>
62861                    <field>
62862                        <name>LOCK</name>
62863                        <description>LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel&#39;s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.
62864
62865                            Once its LOCK bit is set, this register becomes read-only.
62866
62867                            A failed write, for example due to the write&#39;s privilege being lower than that specified in the channel&#39;s SECCFG register, will not set the LOCK bit.</description>
62868                        <bitRange>[2:2]</bitRange>
62869                        <access>read-write</access>
62870                    </field>
62871                    <field>
62872                        <name>S</name>
62873                        <description>Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.
62874
62875                            If 1, this channel is controllable only from a Secure context.</description>
62876                        <bitRange>[1:1]</bitRange>
62877                        <access>read-write</access>
62878                    </field>
62879                    <field>
62880                        <name>P</name>
62881                        <description>Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.
62882
62883                            If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.</description>
62884                        <bitRange>[0:0]</bitRange>
62885                        <access>read-write</access>
62886                    </field>
62887                </fields>
62888            </register>
62889            <register>
62890                <name>SECCFG_IRQ0</name>
62891                <addressOffset>0x000004c0</addressOffset>
62892                <description>Security configuration for IRQ 0. Control whether the IRQ permits configuration by Non-secure/Unprivileged contexts, and whether it can observe Secure/Privileged channel interrupt flags.</description>
62893                <resetValue>0x00000003</resetValue>
62894                <fields>
62895                    <field>
62896                        <name>S</name>
62897                        <description>Secure IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Secure context.
62898
62899                            If 0, this IRQ&#39;s control registers can be accessed from a Non-secure context, but Secure channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Secure channels.</description>
62900                        <bitRange>[1:1]</bitRange>
62901                        <access>read-write</access>
62902                    </field>
62903                    <field>
62904                        <name>P</name>
62905                        <description>Privileged IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Privileged context.
62906
62907                            If 0, this IRQ&#39;s control registers can be accessed from an Unprivileged context, but Privileged channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Privileged channels.</description>
62908                        <bitRange>[0:0]</bitRange>
62909                        <access>read-write</access>
62910                    </field>
62911                </fields>
62912            </register>
62913            <register>
62914                <name>SECCFG_IRQ1</name>
62915                <addressOffset>0x000004c4</addressOffset>
62916                <description>Security configuration for IRQ 1. Control whether the IRQ permits configuration by Non-secure/Unprivileged contexts, and whether it can observe Secure/Privileged channel interrupt flags.</description>
62917                <resetValue>0x00000003</resetValue>
62918                <fields>
62919                    <field>
62920                        <name>S</name>
62921                        <description>Secure IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Secure context.
62922
62923                            If 0, this IRQ&#39;s control registers can be accessed from a Non-secure context, but Secure channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Secure channels.</description>
62924                        <bitRange>[1:1]</bitRange>
62925                        <access>read-write</access>
62926                    </field>
62927                    <field>
62928                        <name>P</name>
62929                        <description>Privileged IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Privileged context.
62930
62931                            If 0, this IRQ&#39;s control registers can be accessed from an Unprivileged context, but Privileged channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Privileged channels.</description>
62932                        <bitRange>[0:0]</bitRange>
62933                        <access>read-write</access>
62934                    </field>
62935                </fields>
62936            </register>
62937            <register>
62938                <name>SECCFG_IRQ2</name>
62939                <addressOffset>0x000004c8</addressOffset>
62940                <description>Security configuration for IRQ 2. Control whether the IRQ permits configuration by Non-secure/Unprivileged contexts, and whether it can observe Secure/Privileged channel interrupt flags.</description>
62941                <resetValue>0x00000003</resetValue>
62942                <fields>
62943                    <field>
62944                        <name>S</name>
62945                        <description>Secure IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Secure context.
62946
62947                            If 0, this IRQ&#39;s control registers can be accessed from a Non-secure context, but Secure channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Secure channels.</description>
62948                        <bitRange>[1:1]</bitRange>
62949                        <access>read-write</access>
62950                    </field>
62951                    <field>
62952                        <name>P</name>
62953                        <description>Privileged IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Privileged context.
62954
62955                            If 0, this IRQ&#39;s control registers can be accessed from an Unprivileged context, but Privileged channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Privileged channels.</description>
62956                        <bitRange>[0:0]</bitRange>
62957                        <access>read-write</access>
62958                    </field>
62959                </fields>
62960            </register>
62961            <register>
62962                <name>SECCFG_IRQ3</name>
62963                <addressOffset>0x000004cc</addressOffset>
62964                <description>Security configuration for IRQ 3. Control whether the IRQ permits configuration by Non-secure/Unprivileged contexts, and whether it can observe Secure/Privileged channel interrupt flags.</description>
62965                <resetValue>0x00000003</resetValue>
62966                <fields>
62967                    <field>
62968                        <name>S</name>
62969                        <description>Secure IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Secure context.
62970
62971                            If 0, this IRQ&#39;s control registers can be accessed from a Non-secure context, but Secure channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Secure channels.</description>
62972                        <bitRange>[1:1]</bitRange>
62973                        <access>read-write</access>
62974                    </field>
62975                    <field>
62976                        <name>P</name>
62977                        <description>Privileged IRQ. If 1, this IRQ&#39;s control registers can only be accessed from a Privileged context.
62978
62979                            If 0, this IRQ&#39;s control registers can be accessed from an Unprivileged context, but Privileged channels (as per SECCFG_CHx) are masked from the IRQ status, and this IRQ&#39;s registers can not be used to acknowledge the channel interrupts of Privileged channels.</description>
62980                        <bitRange>[0:0]</bitRange>
62981                        <access>read-write</access>
62982                    </field>
62983                </fields>
62984            </register>
62985            <register>
62986                <name>SECCFG_MISC</name>
62987                <addressOffset>0x000004d0</addressOffset>
62988                <description>Miscellaneous security configuration</description>
62989                <resetValue>0x000003ff</resetValue>
62990                <fields>
62991                    <field>
62992                        <name>TIMER3_S</name>
62993                        <description>If 1, the TIMER3 register is only accessible from a Secure context, and timer DREQ 3 is only visible to Secure channels.</description>
62994                        <bitRange>[9:9]</bitRange>
62995                        <access>read-write</access>
62996                    </field>
62997                    <field>
62998                        <name>TIMER3_P</name>
62999                        <description>If 1, the TIMER3 register is only accessible from a Privileged (or more Secure) context, and timer DREQ 3 is only visible to Privileged (or more Secure) channels.</description>
63000                        <bitRange>[8:8]</bitRange>
63001                        <access>read-write</access>
63002                    </field>
63003                    <field>
63004                        <name>TIMER2_S</name>
63005                        <description>If 1, the TIMER2 register is only accessible from a Secure context, and timer DREQ 2 is only visible to Secure channels.</description>
63006                        <bitRange>[7:7]</bitRange>
63007                        <access>read-write</access>
63008                    </field>
63009                    <field>
63010                        <name>TIMER2_P</name>
63011                        <description>If 1, the TIMER2 register is only accessible from a Privileged (or more Secure) context, and timer DREQ 2 is only visible to Privileged (or more Secure) channels.</description>
63012                        <bitRange>[6:6]</bitRange>
63013                        <access>read-write</access>
63014                    </field>
63015                    <field>
63016                        <name>TIMER1_S</name>
63017                        <description>If 1, the TIMER1 register is only accessible from a Secure context, and timer DREQ 1 is only visible to Secure channels.</description>
63018                        <bitRange>[5:5]</bitRange>
63019                        <access>read-write</access>
63020                    </field>
63021                    <field>
63022                        <name>TIMER1_P</name>
63023                        <description>If 1, the TIMER1 register is only accessible from a Privileged (or more Secure) context, and timer DREQ 1 is only visible to Privileged (or more Secure) channels.</description>
63024                        <bitRange>[4:4]</bitRange>
63025                        <access>read-write</access>
63026                    </field>
63027                    <field>
63028                        <name>TIMER0_S</name>
63029                        <description>If 1, the TIMER0 register is only accessible from a Secure context, and timer DREQ 0 is only visible to Secure channels.</description>
63030                        <bitRange>[3:3]</bitRange>
63031                        <access>read-write</access>
63032                    </field>
63033                    <field>
63034                        <name>TIMER0_P</name>
63035                        <description>If 1, the TIMER0 register is only accessible from a Privileged (or more Secure) context, and timer DREQ 0 is only visible to Privileged (or more Secure) channels.</description>
63036                        <bitRange>[2:2]</bitRange>
63037                        <access>read-write</access>
63038                    </field>
63039                    <field>
63040                        <name>SNIFF_S</name>
63041                        <description>If 1, the sniffer can see data transfers from Secure channels, and can itself only be accessed from a Secure context.
63042
63043                            If 0, the sniffer can be accessed from either a Secure or Non-secure context, but can not see data transfers of Secure channels.</description>
63044                        <bitRange>[1:1]</bitRange>
63045                        <access>read-write</access>
63046                    </field>
63047                    <field>
63048                        <name>SNIFF_P</name>
63049                        <description>If 1, the sniffer can see data transfers from Privileged channels, and can itself only be accessed from a privileged context, or from a Secure context when SNIFF_S is 0.
63050
63051                            If 0, the sniffer can be accessed from either a Privileged or Unprivileged context (with sufficient security level) but can not see transfers from Privileged channels.</description>
63052                        <bitRange>[0:0]</bitRange>
63053                        <access>read-write</access>
63054                    </field>
63055                </fields>
63056            </register>
63057            <register>
63058                <name>MPU_CTRL</name>
63059                <addressOffset>0x00000500</addressOffset>
63060                <description>Control register for DMA MPU. Accessible only from a Privileged context.</description>
63061                <resetValue>0x00000000</resetValue>
63062                <fields>
63063                    <field>
63064                        <name>NS_HIDE_ADDR</name>
63065                        <description>By default, when a region&#39;s S bit is clear, Non-secure-Privileged reads can see the region&#39;s base address and limit address. Set this bit to make the addresses appear as 0 to Non-secure reads, even when the region is Non-secure, to avoid leaking information about the processor SAU map.</description>
63066                        <bitRange>[3:3]</bitRange>
63067                        <access>read-write</access>
63068                    </field>
63069                    <field>
63070                        <name>S</name>
63071                        <description>Determine whether an address not covered by an active MPU region is Secure (1) or Non-secure (0)</description>
63072                        <bitRange>[2:2]</bitRange>
63073                        <access>read-write</access>
63074                    </field>
63075                    <field>
63076                        <name>P</name>
63077                        <description>Determine whether an address not covered by an active MPU region is Privileged (1) or Unprivileged (0)</description>
63078                        <bitRange>[1:1]</bitRange>
63079                        <access>read-write</access>
63080                    </field>
63081                </fields>
63082            </register>
63083            <register>
63084                <name>MPU_BAR0</name>
63085                <addressOffset>0x00000504</addressOffset>
63086                <description>Base address register for MPU region 0. Writable only from a Secure, Privileged context.</description>
63087                <resetValue>0x00000000</resetValue>
63088                <fields>
63089                    <field>
63090                        <name>ADDR</name>
63091                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63092
63093                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63094                        <bitRange>[31:5]</bitRange>
63095                        <access>read-write</access>
63096                    </field>
63097                </fields>
63098            </register>
63099            <register>
63100                <name>MPU_LAR0</name>
63101                <addressOffset>0x00000508</addressOffset>
63102                <description>Limit address register for MPU region 0. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63103                <resetValue>0x00000000</resetValue>
63104                <fields>
63105                    <field>
63106                        <name>ADDR</name>
63107                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63108                        <bitRange>[31:5]</bitRange>
63109                        <access>read-write</access>
63110                    </field>
63111                    <field>
63112                        <name>S</name>
63113                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63114                        <bitRange>[2:2]</bitRange>
63115                        <access>read-write</access>
63116                    </field>
63117                    <field>
63118                        <name>P</name>
63119                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63120                        <bitRange>[1:1]</bitRange>
63121                        <access>read-write</access>
63122                    </field>
63123                    <field>
63124                        <name>EN</name>
63125                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63126                        <bitRange>[0:0]</bitRange>
63127                        <access>read-write</access>
63128                    </field>
63129                </fields>
63130            </register>
63131            <register>
63132                <name>MPU_BAR1</name>
63133                <addressOffset>0x0000050c</addressOffset>
63134                <description>Base address register for MPU region 1. Writable only from a Secure, Privileged context.</description>
63135                <resetValue>0x00000000</resetValue>
63136                <fields>
63137                    <field>
63138                        <name>ADDR</name>
63139                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63140
63141                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63142                        <bitRange>[31:5]</bitRange>
63143                        <access>read-write</access>
63144                    </field>
63145                </fields>
63146            </register>
63147            <register>
63148                <name>MPU_LAR1</name>
63149                <addressOffset>0x00000510</addressOffset>
63150                <description>Limit address register for MPU region 1. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63151                <resetValue>0x00000000</resetValue>
63152                <fields>
63153                    <field>
63154                        <name>ADDR</name>
63155                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63156                        <bitRange>[31:5]</bitRange>
63157                        <access>read-write</access>
63158                    </field>
63159                    <field>
63160                        <name>S</name>
63161                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63162                        <bitRange>[2:2]</bitRange>
63163                        <access>read-write</access>
63164                    </field>
63165                    <field>
63166                        <name>P</name>
63167                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63168                        <bitRange>[1:1]</bitRange>
63169                        <access>read-write</access>
63170                    </field>
63171                    <field>
63172                        <name>EN</name>
63173                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63174                        <bitRange>[0:0]</bitRange>
63175                        <access>read-write</access>
63176                    </field>
63177                </fields>
63178            </register>
63179            <register>
63180                <name>MPU_BAR2</name>
63181                <addressOffset>0x00000514</addressOffset>
63182                <description>Base address register for MPU region 2. Writable only from a Secure, Privileged context.</description>
63183                <resetValue>0x00000000</resetValue>
63184                <fields>
63185                    <field>
63186                        <name>ADDR</name>
63187                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63188
63189                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63190                        <bitRange>[31:5]</bitRange>
63191                        <access>read-write</access>
63192                    </field>
63193                </fields>
63194            </register>
63195            <register>
63196                <name>MPU_LAR2</name>
63197                <addressOffset>0x00000518</addressOffset>
63198                <description>Limit address register for MPU region 2. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63199                <resetValue>0x00000000</resetValue>
63200                <fields>
63201                    <field>
63202                        <name>ADDR</name>
63203                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63204                        <bitRange>[31:5]</bitRange>
63205                        <access>read-write</access>
63206                    </field>
63207                    <field>
63208                        <name>S</name>
63209                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63210                        <bitRange>[2:2]</bitRange>
63211                        <access>read-write</access>
63212                    </field>
63213                    <field>
63214                        <name>P</name>
63215                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63216                        <bitRange>[1:1]</bitRange>
63217                        <access>read-write</access>
63218                    </field>
63219                    <field>
63220                        <name>EN</name>
63221                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63222                        <bitRange>[0:0]</bitRange>
63223                        <access>read-write</access>
63224                    </field>
63225                </fields>
63226            </register>
63227            <register>
63228                <name>MPU_BAR3</name>
63229                <addressOffset>0x0000051c</addressOffset>
63230                <description>Base address register for MPU region 3. Writable only from a Secure, Privileged context.</description>
63231                <resetValue>0x00000000</resetValue>
63232                <fields>
63233                    <field>
63234                        <name>ADDR</name>
63235                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63236
63237                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63238                        <bitRange>[31:5]</bitRange>
63239                        <access>read-write</access>
63240                    </field>
63241                </fields>
63242            </register>
63243            <register>
63244                <name>MPU_LAR3</name>
63245                <addressOffset>0x00000520</addressOffset>
63246                <description>Limit address register for MPU region 3. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63247                <resetValue>0x00000000</resetValue>
63248                <fields>
63249                    <field>
63250                        <name>ADDR</name>
63251                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63252                        <bitRange>[31:5]</bitRange>
63253                        <access>read-write</access>
63254                    </field>
63255                    <field>
63256                        <name>S</name>
63257                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63258                        <bitRange>[2:2]</bitRange>
63259                        <access>read-write</access>
63260                    </field>
63261                    <field>
63262                        <name>P</name>
63263                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63264                        <bitRange>[1:1]</bitRange>
63265                        <access>read-write</access>
63266                    </field>
63267                    <field>
63268                        <name>EN</name>
63269                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63270                        <bitRange>[0:0]</bitRange>
63271                        <access>read-write</access>
63272                    </field>
63273                </fields>
63274            </register>
63275            <register>
63276                <name>MPU_BAR4</name>
63277                <addressOffset>0x00000524</addressOffset>
63278                <description>Base address register for MPU region 4. Writable only from a Secure, Privileged context.</description>
63279                <resetValue>0x00000000</resetValue>
63280                <fields>
63281                    <field>
63282                        <name>ADDR</name>
63283                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63284
63285                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63286                        <bitRange>[31:5]</bitRange>
63287                        <access>read-write</access>
63288                    </field>
63289                </fields>
63290            </register>
63291            <register>
63292                <name>MPU_LAR4</name>
63293                <addressOffset>0x00000528</addressOffset>
63294                <description>Limit address register for MPU region 4. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63295                <resetValue>0x00000000</resetValue>
63296                <fields>
63297                    <field>
63298                        <name>ADDR</name>
63299                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63300                        <bitRange>[31:5]</bitRange>
63301                        <access>read-write</access>
63302                    </field>
63303                    <field>
63304                        <name>S</name>
63305                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63306                        <bitRange>[2:2]</bitRange>
63307                        <access>read-write</access>
63308                    </field>
63309                    <field>
63310                        <name>P</name>
63311                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63312                        <bitRange>[1:1]</bitRange>
63313                        <access>read-write</access>
63314                    </field>
63315                    <field>
63316                        <name>EN</name>
63317                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63318                        <bitRange>[0:0]</bitRange>
63319                        <access>read-write</access>
63320                    </field>
63321                </fields>
63322            </register>
63323            <register>
63324                <name>MPU_BAR5</name>
63325                <addressOffset>0x0000052c</addressOffset>
63326                <description>Base address register for MPU region 5. Writable only from a Secure, Privileged context.</description>
63327                <resetValue>0x00000000</resetValue>
63328                <fields>
63329                    <field>
63330                        <name>ADDR</name>
63331                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63332
63333                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63334                        <bitRange>[31:5]</bitRange>
63335                        <access>read-write</access>
63336                    </field>
63337                </fields>
63338            </register>
63339            <register>
63340                <name>MPU_LAR5</name>
63341                <addressOffset>0x00000530</addressOffset>
63342                <description>Limit address register for MPU region 5. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63343                <resetValue>0x00000000</resetValue>
63344                <fields>
63345                    <field>
63346                        <name>ADDR</name>
63347                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63348                        <bitRange>[31:5]</bitRange>
63349                        <access>read-write</access>
63350                    </field>
63351                    <field>
63352                        <name>S</name>
63353                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63354                        <bitRange>[2:2]</bitRange>
63355                        <access>read-write</access>
63356                    </field>
63357                    <field>
63358                        <name>P</name>
63359                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63360                        <bitRange>[1:1]</bitRange>
63361                        <access>read-write</access>
63362                    </field>
63363                    <field>
63364                        <name>EN</name>
63365                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63366                        <bitRange>[0:0]</bitRange>
63367                        <access>read-write</access>
63368                    </field>
63369                </fields>
63370            </register>
63371            <register>
63372                <name>MPU_BAR6</name>
63373                <addressOffset>0x00000534</addressOffset>
63374                <description>Base address register for MPU region 6. Writable only from a Secure, Privileged context.</description>
63375                <resetValue>0x00000000</resetValue>
63376                <fields>
63377                    <field>
63378                        <name>ADDR</name>
63379                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63380
63381                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63382                        <bitRange>[31:5]</bitRange>
63383                        <access>read-write</access>
63384                    </field>
63385                </fields>
63386            </register>
63387            <register>
63388                <name>MPU_LAR6</name>
63389                <addressOffset>0x00000538</addressOffset>
63390                <description>Limit address register for MPU region 6. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63391                <resetValue>0x00000000</resetValue>
63392                <fields>
63393                    <field>
63394                        <name>ADDR</name>
63395                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63396                        <bitRange>[31:5]</bitRange>
63397                        <access>read-write</access>
63398                    </field>
63399                    <field>
63400                        <name>S</name>
63401                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63402                        <bitRange>[2:2]</bitRange>
63403                        <access>read-write</access>
63404                    </field>
63405                    <field>
63406                        <name>P</name>
63407                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63408                        <bitRange>[1:1]</bitRange>
63409                        <access>read-write</access>
63410                    </field>
63411                    <field>
63412                        <name>EN</name>
63413                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63414                        <bitRange>[0:0]</bitRange>
63415                        <access>read-write</access>
63416                    </field>
63417                </fields>
63418            </register>
63419            <register>
63420                <name>MPU_BAR7</name>
63421                <addressOffset>0x0000053c</addressOffset>
63422                <description>Base address register for MPU region 7. Writable only from a Secure, Privileged context.</description>
63423                <resetValue>0x00000000</resetValue>
63424                <fields>
63425                    <field>
63426                        <name>ADDR</name>
63427                        <description>This MPU region matches addresses where addr[31:5] (the 27 most significant bits) are greater than or equal to BAR_ADDR, and less than or equal to LAR_ADDR.
63428
63429                            Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63430                        <bitRange>[31:5]</bitRange>
63431                        <access>read-write</access>
63432                    </field>
63433                </fields>
63434            </register>
63435            <register>
63436                <name>MPU_LAR7</name>
63437                <addressOffset>0x00000540</addressOffset>
63438                <description>Limit address register for MPU region 7. Writable only from a Secure, Privileged context, with the exception of the P bit.</description>
63439                <resetValue>0x00000000</resetValue>
63440                <fields>
63441                    <field>
63442                        <name>ADDR</name>
63443                        <description>Limit address bits 31:5. Readable from any Privileged context, if and only if this region&#39;s S bit is clear, and MPU_CTRL_NS_HIDE_ADDR is clear. Otherwise readable only from a Secure, Privileged context.</description>
63444                        <bitRange>[31:5]</bitRange>
63445                        <access>read-write</access>
63446                    </field>
63447                    <field>
63448                        <name>S</name>
63449                        <description>Determines the Secure/Non-secure (=1/0) status of addresses matching this region, if this region is enabled.</description>
63450                        <bitRange>[2:2]</bitRange>
63451                        <access>read-write</access>
63452                    </field>
63453                    <field>
63454                        <name>P</name>
63455                        <description>Determines the Privileged/Unprivileged (=1/0) status of addresses matching this region, if this region is enabled. Writable from any Privileged context, if and only if the S bit is clear. Otherwise, writable only from a Secure, Privileged context.</description>
63456                        <bitRange>[1:1]</bitRange>
63457                        <access>read-write</access>
63458                    </field>
63459                    <field>
63460                        <name>EN</name>
63461                        <description>Region enable. If 1, any address within range specified by the base address (BAR_ADDR) and limit address (LAR_ADDR) has the attributes specified by S and P.</description>
63462                        <bitRange>[0:0]</bitRange>
63463                        <access>read-write</access>
63464                    </field>
63465                </fields>
63466            </register>
63467            <register>
63468                <name>CH0_DBG_CTDREQ</name>
63469                <addressOffset>0x00000800</addressOffset>
63470                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63471                <resetValue>0x00000000</resetValue>
63472                <fields>
63473                    <field>
63474                        <name>CH0_DBG_CTDREQ</name>
63475                        <bitRange>[5:0]</bitRange>
63476                        <access>read-write</access>
63477                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63478                    </field>
63479                </fields>
63480            </register>
63481            <register>
63482                <name>CH0_DBG_TCR</name>
63483                <addressOffset>0x00000804</addressOffset>
63484                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63485                <resetValue>0x00000000</resetValue>
63486                <fields>
63487                    <field>
63488                        <name>CH0_DBG_TCR</name>
63489                        <bitRange>[31:0]</bitRange>
63490                        <access>read-only</access>
63491                    </field>
63492                </fields>
63493            </register>
63494            <register>
63495                <name>CH1_DBG_CTDREQ</name>
63496                <addressOffset>0x00000840</addressOffset>
63497                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63498                <resetValue>0x00000000</resetValue>
63499                <fields>
63500                    <field>
63501                        <name>CH1_DBG_CTDREQ</name>
63502                        <bitRange>[5:0]</bitRange>
63503                        <access>read-write</access>
63504                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63505                    </field>
63506                </fields>
63507            </register>
63508            <register>
63509                <name>CH1_DBG_TCR</name>
63510                <addressOffset>0x00000844</addressOffset>
63511                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63512                <resetValue>0x00000000</resetValue>
63513                <fields>
63514                    <field>
63515                        <name>CH1_DBG_TCR</name>
63516                        <bitRange>[31:0]</bitRange>
63517                        <access>read-only</access>
63518                    </field>
63519                </fields>
63520            </register>
63521            <register>
63522                <name>CH2_DBG_CTDREQ</name>
63523                <addressOffset>0x00000880</addressOffset>
63524                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63525                <resetValue>0x00000000</resetValue>
63526                <fields>
63527                    <field>
63528                        <name>CH2_DBG_CTDREQ</name>
63529                        <bitRange>[5:0]</bitRange>
63530                        <access>read-write</access>
63531                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63532                    </field>
63533                </fields>
63534            </register>
63535            <register>
63536                <name>CH2_DBG_TCR</name>
63537                <addressOffset>0x00000884</addressOffset>
63538                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63539                <resetValue>0x00000000</resetValue>
63540                <fields>
63541                    <field>
63542                        <name>CH2_DBG_TCR</name>
63543                        <bitRange>[31:0]</bitRange>
63544                        <access>read-only</access>
63545                    </field>
63546                </fields>
63547            </register>
63548            <register>
63549                <name>CH3_DBG_CTDREQ</name>
63550                <addressOffset>0x000008c0</addressOffset>
63551                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63552                <resetValue>0x00000000</resetValue>
63553                <fields>
63554                    <field>
63555                        <name>CH3_DBG_CTDREQ</name>
63556                        <bitRange>[5:0]</bitRange>
63557                        <access>read-write</access>
63558                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63559                    </field>
63560                </fields>
63561            </register>
63562            <register>
63563                <name>CH3_DBG_TCR</name>
63564                <addressOffset>0x000008c4</addressOffset>
63565                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63566                <resetValue>0x00000000</resetValue>
63567                <fields>
63568                    <field>
63569                        <name>CH3_DBG_TCR</name>
63570                        <bitRange>[31:0]</bitRange>
63571                        <access>read-only</access>
63572                    </field>
63573                </fields>
63574            </register>
63575            <register>
63576                <name>CH4_DBG_CTDREQ</name>
63577                <addressOffset>0x00000900</addressOffset>
63578                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63579                <resetValue>0x00000000</resetValue>
63580                <fields>
63581                    <field>
63582                        <name>CH4_DBG_CTDREQ</name>
63583                        <bitRange>[5:0]</bitRange>
63584                        <access>read-write</access>
63585                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63586                    </field>
63587                </fields>
63588            </register>
63589            <register>
63590                <name>CH4_DBG_TCR</name>
63591                <addressOffset>0x00000904</addressOffset>
63592                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63593                <resetValue>0x00000000</resetValue>
63594                <fields>
63595                    <field>
63596                        <name>CH4_DBG_TCR</name>
63597                        <bitRange>[31:0]</bitRange>
63598                        <access>read-only</access>
63599                    </field>
63600                </fields>
63601            </register>
63602            <register>
63603                <name>CH5_DBG_CTDREQ</name>
63604                <addressOffset>0x00000940</addressOffset>
63605                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63606                <resetValue>0x00000000</resetValue>
63607                <fields>
63608                    <field>
63609                        <name>CH5_DBG_CTDREQ</name>
63610                        <bitRange>[5:0]</bitRange>
63611                        <access>read-write</access>
63612                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63613                    </field>
63614                </fields>
63615            </register>
63616            <register>
63617                <name>CH5_DBG_TCR</name>
63618                <addressOffset>0x00000944</addressOffset>
63619                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63620                <resetValue>0x00000000</resetValue>
63621                <fields>
63622                    <field>
63623                        <name>CH5_DBG_TCR</name>
63624                        <bitRange>[31:0]</bitRange>
63625                        <access>read-only</access>
63626                    </field>
63627                </fields>
63628            </register>
63629            <register>
63630                <name>CH6_DBG_CTDREQ</name>
63631                <addressOffset>0x00000980</addressOffset>
63632                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63633                <resetValue>0x00000000</resetValue>
63634                <fields>
63635                    <field>
63636                        <name>CH6_DBG_CTDREQ</name>
63637                        <bitRange>[5:0]</bitRange>
63638                        <access>read-write</access>
63639                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63640                    </field>
63641                </fields>
63642            </register>
63643            <register>
63644                <name>CH6_DBG_TCR</name>
63645                <addressOffset>0x00000984</addressOffset>
63646                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63647                <resetValue>0x00000000</resetValue>
63648                <fields>
63649                    <field>
63650                        <name>CH6_DBG_TCR</name>
63651                        <bitRange>[31:0]</bitRange>
63652                        <access>read-only</access>
63653                    </field>
63654                </fields>
63655            </register>
63656            <register>
63657                <name>CH7_DBG_CTDREQ</name>
63658                <addressOffset>0x000009c0</addressOffset>
63659                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63660                <resetValue>0x00000000</resetValue>
63661                <fields>
63662                    <field>
63663                        <name>CH7_DBG_CTDREQ</name>
63664                        <bitRange>[5:0]</bitRange>
63665                        <access>read-write</access>
63666                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63667                    </field>
63668                </fields>
63669            </register>
63670            <register>
63671                <name>CH7_DBG_TCR</name>
63672                <addressOffset>0x000009c4</addressOffset>
63673                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63674                <resetValue>0x00000000</resetValue>
63675                <fields>
63676                    <field>
63677                        <name>CH7_DBG_TCR</name>
63678                        <bitRange>[31:0]</bitRange>
63679                        <access>read-only</access>
63680                    </field>
63681                </fields>
63682            </register>
63683            <register>
63684                <name>CH8_DBG_CTDREQ</name>
63685                <addressOffset>0x00000a00</addressOffset>
63686                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63687                <resetValue>0x00000000</resetValue>
63688                <fields>
63689                    <field>
63690                        <name>CH8_DBG_CTDREQ</name>
63691                        <bitRange>[5:0]</bitRange>
63692                        <access>read-write</access>
63693                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63694                    </field>
63695                </fields>
63696            </register>
63697            <register>
63698                <name>CH8_DBG_TCR</name>
63699                <addressOffset>0x00000a04</addressOffset>
63700                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63701                <resetValue>0x00000000</resetValue>
63702                <fields>
63703                    <field>
63704                        <name>CH8_DBG_TCR</name>
63705                        <bitRange>[31:0]</bitRange>
63706                        <access>read-only</access>
63707                    </field>
63708                </fields>
63709            </register>
63710            <register>
63711                <name>CH9_DBG_CTDREQ</name>
63712                <addressOffset>0x00000a40</addressOffset>
63713                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63714                <resetValue>0x00000000</resetValue>
63715                <fields>
63716                    <field>
63717                        <name>CH9_DBG_CTDREQ</name>
63718                        <bitRange>[5:0]</bitRange>
63719                        <access>read-write</access>
63720                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63721                    </field>
63722                </fields>
63723            </register>
63724            <register>
63725                <name>CH9_DBG_TCR</name>
63726                <addressOffset>0x00000a44</addressOffset>
63727                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63728                <resetValue>0x00000000</resetValue>
63729                <fields>
63730                    <field>
63731                        <name>CH9_DBG_TCR</name>
63732                        <bitRange>[31:0]</bitRange>
63733                        <access>read-only</access>
63734                    </field>
63735                </fields>
63736            </register>
63737            <register>
63738                <name>CH10_DBG_CTDREQ</name>
63739                <addressOffset>0x00000a80</addressOffset>
63740                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63741                <resetValue>0x00000000</resetValue>
63742                <fields>
63743                    <field>
63744                        <name>CH10_DBG_CTDREQ</name>
63745                        <bitRange>[5:0]</bitRange>
63746                        <access>read-write</access>
63747                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63748                    </field>
63749                </fields>
63750            </register>
63751            <register>
63752                <name>CH10_DBG_TCR</name>
63753                <addressOffset>0x00000a84</addressOffset>
63754                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63755                <resetValue>0x00000000</resetValue>
63756                <fields>
63757                    <field>
63758                        <name>CH10_DBG_TCR</name>
63759                        <bitRange>[31:0]</bitRange>
63760                        <access>read-only</access>
63761                    </field>
63762                </fields>
63763            </register>
63764            <register>
63765                <name>CH11_DBG_CTDREQ</name>
63766                <addressOffset>0x00000ac0</addressOffset>
63767                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63768                <resetValue>0x00000000</resetValue>
63769                <fields>
63770                    <field>
63771                        <name>CH11_DBG_CTDREQ</name>
63772                        <bitRange>[5:0]</bitRange>
63773                        <access>read-write</access>
63774                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63775                    </field>
63776                </fields>
63777            </register>
63778            <register>
63779                <name>CH11_DBG_TCR</name>
63780                <addressOffset>0x00000ac4</addressOffset>
63781                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63782                <resetValue>0x00000000</resetValue>
63783                <fields>
63784                    <field>
63785                        <name>CH11_DBG_TCR</name>
63786                        <bitRange>[31:0]</bitRange>
63787                        <access>read-only</access>
63788                    </field>
63789                </fields>
63790            </register>
63791            <register>
63792                <name>CH12_DBG_CTDREQ</name>
63793                <addressOffset>0x00000b00</addressOffset>
63794                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63795                <resetValue>0x00000000</resetValue>
63796                <fields>
63797                    <field>
63798                        <name>CH12_DBG_CTDREQ</name>
63799                        <bitRange>[5:0]</bitRange>
63800                        <access>read-write</access>
63801                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63802                    </field>
63803                </fields>
63804            </register>
63805            <register>
63806                <name>CH12_DBG_TCR</name>
63807                <addressOffset>0x00000b04</addressOffset>
63808                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63809                <resetValue>0x00000000</resetValue>
63810                <fields>
63811                    <field>
63812                        <name>CH12_DBG_TCR</name>
63813                        <bitRange>[31:0]</bitRange>
63814                        <access>read-only</access>
63815                    </field>
63816                </fields>
63817            </register>
63818            <register>
63819                <name>CH13_DBG_CTDREQ</name>
63820                <addressOffset>0x00000b40</addressOffset>
63821                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63822                <resetValue>0x00000000</resetValue>
63823                <fields>
63824                    <field>
63825                        <name>CH13_DBG_CTDREQ</name>
63826                        <bitRange>[5:0]</bitRange>
63827                        <access>read-write</access>
63828                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63829                    </field>
63830                </fields>
63831            </register>
63832            <register>
63833                <name>CH13_DBG_TCR</name>
63834                <addressOffset>0x00000b44</addressOffset>
63835                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63836                <resetValue>0x00000000</resetValue>
63837                <fields>
63838                    <field>
63839                        <name>CH13_DBG_TCR</name>
63840                        <bitRange>[31:0]</bitRange>
63841                        <access>read-only</access>
63842                    </field>
63843                </fields>
63844            </register>
63845            <register>
63846                <name>CH14_DBG_CTDREQ</name>
63847                <addressOffset>0x00000b80</addressOffset>
63848                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63849                <resetValue>0x00000000</resetValue>
63850                <fields>
63851                    <field>
63852                        <name>CH14_DBG_CTDREQ</name>
63853                        <bitRange>[5:0]</bitRange>
63854                        <access>read-write</access>
63855                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63856                    </field>
63857                </fields>
63858            </register>
63859            <register>
63860                <name>CH14_DBG_TCR</name>
63861                <addressOffset>0x00000b84</addressOffset>
63862                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63863                <resetValue>0x00000000</resetValue>
63864                <fields>
63865                    <field>
63866                        <name>CH14_DBG_TCR</name>
63867                        <bitRange>[31:0]</bitRange>
63868                        <access>read-only</access>
63869                    </field>
63870                </fields>
63871            </register>
63872            <register>
63873                <name>CH15_DBG_CTDREQ</name>
63874                <addressOffset>0x00000bc0</addressOffset>
63875                <description>Read: get channel DREQ counter (i.e. how many accesses the DMA expects it can perform on the peripheral without overflow/underflow. Write any value: clears the counter, and cause channel to re-initiate DREQ handshake.</description>
63876                <resetValue>0x00000000</resetValue>
63877                <fields>
63878                    <field>
63879                        <name>CH15_DBG_CTDREQ</name>
63880                        <bitRange>[5:0]</bitRange>
63881                        <access>read-write</access>
63882                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
63883                    </field>
63884                </fields>
63885            </register>
63886            <register>
63887                <name>CH15_DBG_TCR</name>
63888                <addressOffset>0x00000bc4</addressOffset>
63889                <description>Read to get channel TRANS_COUNT reload value, i.e. the length of the next transfer</description>
63890                <resetValue>0x00000000</resetValue>
63891                <fields>
63892                    <field>
63893                        <name>CH15_DBG_TCR</name>
63894                        <bitRange>[31:0]</bitRange>
63895                        <access>read-only</access>
63896                    </field>
63897                </fields>
63898            </register>
63899        </registers>
63900    </peripheral>
63901    <peripheral>
63902        <name>TIMER0</name>
63903        <description>Controls time and alarms
63904
63905            time is a 64 bit value indicating the time since power-on
63906
63907            timeh is the top 32 bits of time &amp; timel is the bottom 32 bits to change time write to timelw before timehw to read time read from timelr before timehr
63908
63909            An alarm is set by setting alarm_enable and writing to the corresponding alarm register When an alarm is pending, the corresponding alarm_running signal will be high An alarm can be cancelled before it has finished by clearing the alarm_enable When an alarm fires, the corresponding alarm_irq is set and alarm_running is cleared To clear the interrupt write a 1 to the corresponding alarm_irq The timer can be locked to prevent writing</description>
63910        <baseAddress>0x400b0000</baseAddress>
63911        <addressBlock>
63912            <offset>0</offset>
63913            <size>76</size>
63914            <usage>registers</usage>
63915        </addressBlock>
63916        <interrupt>
63917            <name>TIMER0_IRQ_0</name>
63918            <value>0</value>
63919        </interrupt>
63920        <interrupt>
63921            <name>TIMER0_IRQ_1</name>
63922            <value>1</value>
63923        </interrupt>
63924        <interrupt>
63925            <name>TIMER0_IRQ_2</name>
63926            <value>2</value>
63927        </interrupt>
63928        <interrupt>
63929            <name>TIMER0_IRQ_3</name>
63930            <value>3</value>
63931        </interrupt>
63932        <registers>
63933            <register>
63934                <name>TIMEHW</name>
63935                <addressOffset>0x00000000</addressOffset>
63936                <description>Write to bits 63:32 of time always write timelw before timehw</description>
63937                <resetValue>0x00000000</resetValue>
63938                <fields>
63939                    <field>
63940                        <name>TIMEHW</name>
63941                        <bitRange>[31:0]</bitRange>
63942                        <access>write-only</access>
63943                    </field>
63944                </fields>
63945            </register>
63946            <register>
63947                <name>TIMELW</name>
63948                <addressOffset>0x00000004</addressOffset>
63949                <description>Write to bits 31:0 of time writes do not get copied to time until timehw is written</description>
63950                <resetValue>0x00000000</resetValue>
63951                <fields>
63952                    <field>
63953                        <name>TIMELW</name>
63954                        <bitRange>[31:0]</bitRange>
63955                        <access>write-only</access>
63956                    </field>
63957                </fields>
63958            </register>
63959            <register>
63960                <name>TIMEHR</name>
63961                <addressOffset>0x00000008</addressOffset>
63962                <description>Read from bits 63:32 of time always read timelr before timehr</description>
63963                <resetValue>0x00000000</resetValue>
63964                <fields>
63965                    <field>
63966                        <name>TIMEHR</name>
63967                        <bitRange>[31:0]</bitRange>
63968                        <access>read-only</access>
63969                    </field>
63970                </fields>
63971            </register>
63972            <register>
63973                <name>TIMELR</name>
63974                <addressOffset>0x0000000c</addressOffset>
63975                <description>Read from bits 31:0 of time</description>
63976                <resetValue>0x00000000</resetValue>
63977                <fields>
63978                    <field>
63979                        <name>TIMELR</name>
63980                        <bitRange>[31:0]</bitRange>
63981                        <access>read-only</access>
63982                        <readAction>modify</readAction>
63983                    </field>
63984                </fields>
63985            </register>
63986            <register>
63987                <name>ALARM0</name>
63988                <addressOffset>0x00000010</addressOffset>
63989                <description>Arm alarm 0, and configure the time it will fire. Once armed, the alarm fires when TIMER_ALARM0 == TIMELR. The alarm will disarm itself once it fires, and can be disarmed early using the ARMED status register.</description>
63990                <resetValue>0x00000000</resetValue>
63991                <fields>
63992                    <field>
63993                        <name>ALARM0</name>
63994                        <bitRange>[31:0]</bitRange>
63995                        <access>read-write</access>
63996                    </field>
63997                </fields>
63998            </register>
63999            <register>
64000                <name>ALARM1</name>
64001                <addressOffset>0x00000014</addressOffset>
64002                <description>Arm alarm 1, and configure the time it will fire. Once armed, the alarm fires when TIMER_ALARM1 == TIMELR. The alarm will disarm itself once it fires, and can be disarmed early using the ARMED status register.</description>
64003                <resetValue>0x00000000</resetValue>
64004                <fields>
64005                    <field>
64006                        <name>ALARM1</name>
64007                        <bitRange>[31:0]</bitRange>
64008                        <access>read-write</access>
64009                    </field>
64010                </fields>
64011            </register>
64012            <register>
64013                <name>ALARM2</name>
64014                <addressOffset>0x00000018</addressOffset>
64015                <description>Arm alarm 2, and configure the time it will fire. Once armed, the alarm fires when TIMER_ALARM2 == TIMELR. The alarm will disarm itself once it fires, and can be disarmed early using the ARMED status register.</description>
64016                <resetValue>0x00000000</resetValue>
64017                <fields>
64018                    <field>
64019                        <name>ALARM2</name>
64020                        <bitRange>[31:0]</bitRange>
64021                        <access>read-write</access>
64022                    </field>
64023                </fields>
64024            </register>
64025            <register>
64026                <name>ALARM3</name>
64027                <addressOffset>0x0000001c</addressOffset>
64028                <description>Arm alarm 3, and configure the time it will fire. Once armed, the alarm fires when TIMER_ALARM3 == TIMELR. The alarm will disarm itself once it fires, and can be disarmed early using the ARMED status register.</description>
64029                <resetValue>0x00000000</resetValue>
64030                <fields>
64031                    <field>
64032                        <name>ALARM3</name>
64033                        <bitRange>[31:0]</bitRange>
64034                        <access>read-write</access>
64035                    </field>
64036                </fields>
64037            </register>
64038            <register>
64039                <name>ARMED</name>
64040                <addressOffset>0x00000020</addressOffset>
64041                <description>Indicates the armed/disarmed status of each alarm. A write to the corresponding ALARMx register arms the alarm. Alarms automatically disarm upon firing, but writing ones here will disarm immediately without waiting to fire.</description>
64042                <resetValue>0x00000000</resetValue>
64043                <fields>
64044                    <field>
64045                        <name>ARMED</name>
64046                        <bitRange>[3:0]</bitRange>
64047                        <access>read-write</access>
64048                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
64049                    </field>
64050                </fields>
64051            </register>
64052            <register>
64053                <name>TIMERAWH</name>
64054                <addressOffset>0x00000024</addressOffset>
64055                <description>Raw read from bits 63:32 of time (no side effects)</description>
64056                <resetValue>0x00000000</resetValue>
64057                <fields>
64058                    <field>
64059                        <name>TIMERAWH</name>
64060                        <bitRange>[31:0]</bitRange>
64061                        <access>read-only</access>
64062                    </field>
64063                </fields>
64064            </register>
64065            <register>
64066                <name>TIMERAWL</name>
64067                <addressOffset>0x00000028</addressOffset>
64068                <description>Raw read from bits 31:0 of time (no side effects)</description>
64069                <resetValue>0x00000000</resetValue>
64070                <fields>
64071                    <field>
64072                        <name>TIMERAWL</name>
64073                        <bitRange>[31:0]</bitRange>
64074                        <access>read-only</access>
64075                    </field>
64076                </fields>
64077            </register>
64078            <register>
64079                <name>DBGPAUSE</name>
64080                <addressOffset>0x0000002c</addressOffset>
64081                <description>Set bits high to enable pause when the corresponding debug ports are active</description>
64082                <resetValue>0x00000007</resetValue>
64083                <fields>
64084                    <field>
64085                        <name>DBG1</name>
64086                        <description>Pause when processor 1 is in debug mode</description>
64087                        <bitRange>[2:2]</bitRange>
64088                        <access>read-write</access>
64089                    </field>
64090                    <field>
64091                        <name>DBG0</name>
64092                        <description>Pause when processor 0 is in debug mode</description>
64093                        <bitRange>[1:1]</bitRange>
64094                        <access>read-write</access>
64095                    </field>
64096                </fields>
64097            </register>
64098            <register>
64099                <name>PAUSE</name>
64100                <addressOffset>0x00000030</addressOffset>
64101                <description>Set high to pause the timer</description>
64102                <resetValue>0x00000000</resetValue>
64103                <fields>
64104                    <field>
64105                        <name>PAUSE</name>
64106                        <bitRange>[0:0]</bitRange>
64107                        <access>read-write</access>
64108                    </field>
64109                </fields>
64110            </register>
64111            <register>
64112                <name>LOCKED</name>
64113                <addressOffset>0x00000034</addressOffset>
64114                <description>Set locked bit to disable write access to timer Once set, cannot be cleared (without a reset)</description>
64115                <resetValue>0x00000000</resetValue>
64116                <fields>
64117                    <field>
64118                        <name>LOCKED</name>
64119                        <bitRange>[0:0]</bitRange>
64120                        <access>read-write</access>
64121                    </field>
64122                </fields>
64123            </register>
64124            <register>
64125                <name>SOURCE</name>
64126                <addressOffset>0x00000038</addressOffset>
64127                <description>Selects the source for the timer. Defaults to the normal tick configured in the ticks block (typically configured to 1 microsecond). Writing to 1 will ignore the tick and count clk_sys cycles instead.</description>
64128                <resetValue>0x00000000</resetValue>
64129                <fields>
64130                    <field>
64131                        <name>CLK_SYS</name>
64132                        <bitRange>[0:0]</bitRange>
64133                        <access>read-write</access>
64134                        <enumeratedValues>
64135                            <enumeratedValue>
64136                                <name>TICK</name>
64137                                <value>0</value>
64138                            </enumeratedValue>
64139                            <enumeratedValue>
64140                                <name>CLK_SYS</name>
64141                                <value>1</value>
64142                            </enumeratedValue>
64143                        </enumeratedValues>
64144                    </field>
64145                </fields>
64146            </register>
64147            <register>
64148                <name>INTR</name>
64149                <addressOffset>0x0000003c</addressOffset>
64150                <description>Raw Interrupts</description>
64151                <resetValue>0x00000000</resetValue>
64152                <fields>
64153                    <field>
64154                        <name>ALARM_3</name>
64155                        <bitRange>[3:3]</bitRange>
64156                        <access>read-write</access>
64157                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
64158                    </field>
64159                    <field>
64160                        <name>ALARM_2</name>
64161                        <bitRange>[2:2]</bitRange>
64162                        <access>read-write</access>
64163                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
64164                    </field>
64165                    <field>
64166                        <name>ALARM_1</name>
64167                        <bitRange>[1:1]</bitRange>
64168                        <access>read-write</access>
64169                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
64170                    </field>
64171                    <field>
64172                        <name>ALARM_0</name>
64173                        <bitRange>[0:0]</bitRange>
64174                        <access>read-write</access>
64175                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
64176                    </field>
64177                </fields>
64178            </register>
64179            <register>
64180                <name>INTE</name>
64181                <addressOffset>0x00000040</addressOffset>
64182                <description>Interrupt Enable</description>
64183                <resetValue>0x00000000</resetValue>
64184                <fields>
64185                    <field>
64186                        <name>ALARM_3</name>
64187                        <bitRange>[3:3]</bitRange>
64188                        <access>read-write</access>
64189                    </field>
64190                    <field>
64191                        <name>ALARM_2</name>
64192                        <bitRange>[2:2]</bitRange>
64193                        <access>read-write</access>
64194                    </field>
64195                    <field>
64196                        <name>ALARM_1</name>
64197                        <bitRange>[1:1]</bitRange>
64198                        <access>read-write</access>
64199                    </field>
64200                    <field>
64201                        <name>ALARM_0</name>
64202                        <bitRange>[0:0]</bitRange>
64203                        <access>read-write</access>
64204                    </field>
64205                </fields>
64206            </register>
64207            <register>
64208                <name>INTF</name>
64209                <addressOffset>0x00000044</addressOffset>
64210                <description>Interrupt Force</description>
64211                <resetValue>0x00000000</resetValue>
64212                <fields>
64213                    <field>
64214                        <name>ALARM_3</name>
64215                        <bitRange>[3:3]</bitRange>
64216                        <access>read-write</access>
64217                    </field>
64218                    <field>
64219                        <name>ALARM_2</name>
64220                        <bitRange>[2:2]</bitRange>
64221                        <access>read-write</access>
64222                    </field>
64223                    <field>
64224                        <name>ALARM_1</name>
64225                        <bitRange>[1:1]</bitRange>
64226                        <access>read-write</access>
64227                    </field>
64228                    <field>
64229                        <name>ALARM_0</name>
64230                        <bitRange>[0:0]</bitRange>
64231                        <access>read-write</access>
64232                    </field>
64233                </fields>
64234            </register>
64235            <register>
64236                <name>INTS</name>
64237                <addressOffset>0x00000048</addressOffset>
64238                <description>Interrupt status after masking &amp; forcing</description>
64239                <resetValue>0x00000000</resetValue>
64240                <fields>
64241                    <field>
64242                        <name>ALARM_3</name>
64243                        <bitRange>[3:3]</bitRange>
64244                        <access>read-only</access>
64245                    </field>
64246                    <field>
64247                        <name>ALARM_2</name>
64248                        <bitRange>[2:2]</bitRange>
64249                        <access>read-only</access>
64250                    </field>
64251                    <field>
64252                        <name>ALARM_1</name>
64253                        <bitRange>[1:1]</bitRange>
64254                        <access>read-only</access>
64255                    </field>
64256                    <field>
64257                        <name>ALARM_0</name>
64258                        <bitRange>[0:0]</bitRange>
64259                        <access>read-only</access>
64260                    </field>
64261                </fields>
64262            </register>
64263        </registers>
64264    </peripheral>
64265    <peripheral derivedFrom="TIMER0">
64266        <name>TIMER1</name>
64267        <baseAddress>0x400b8000</baseAddress>
64268        <interrupt>
64269        <name>TIMER1_IRQ_0</name>
64270        <value>4</value>
64271    </interrupt>
64272        <interrupt>
64273        <name>TIMER1_IRQ_1</name>
64274        <value>5</value>
64275    </interrupt>
64276        <interrupt>
64277        <name>TIMER1_IRQ_2</name>
64278        <value>6</value>
64279    </interrupt>
64280        <interrupt>
64281        <name>TIMER1_IRQ_3</name>
64282        <value>7</value>
64283    </interrupt>
64284    </peripheral>
64285    <peripheral>
64286        <name>PWM</name>
64287        <description>Simple PWM</description>
64288        <baseAddress>0x400a8000</baseAddress>
64289        <addressBlock>
64290            <offset>0</offset>
64291            <size>272</size>
64292            <usage>registers</usage>
64293        </addressBlock>
64294        <interrupt>
64295            <name>PWM_IRQ_WRAP_0</name>
64296            <value>8</value>
64297        </interrupt>
64298        <interrupt>
64299            <name>PWM_IRQ_WRAP_1</name>
64300            <value>9</value>
64301        </interrupt>
64302        <registers>
64303            <register>
64304                <name>CH0_CSR</name>
64305                <addressOffset>0x00000000</addressOffset>
64306                <description>Control and status register</description>
64307                <resetValue>0x00000000</resetValue>
64308                <fields>
64309                    <field>
64310                        <name>PH_ADV</name>
64311                        <description>Advance the phase of the counter by 1 count, while it is running.
64312                            Self-clearing. Write a 1, and poll until low. Counter must be running
64313                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
64314                        <bitRange>[7:7]</bitRange>
64315                        <access>write-only</access>
64316                    </field>
64317                    <field>
64318                        <name>PH_RET</name>
64319                        <description>Retard the phase of the counter by 1 count, while it is running.
64320                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
64321                        <bitRange>[6:6]</bitRange>
64322                        <access>write-only</access>
64323                    </field>
64324                    <field>
64325                        <name>DIVMODE</name>
64326                        <bitRange>[5:4]</bitRange>
64327                        <access>read-write</access>
64328                        <enumeratedValues>
64329                            <enumeratedValue>
64330                                <name>div</name>
64331                                <value>0</value>
64332                                <description>Free-running counting at rate dictated by fractional divider</description>
64333                            </enumeratedValue>
64334                            <enumeratedValue>
64335                                <name>level</name>
64336                                <value>1</value>
64337                                <description>Fractional divider operation is gated by the PWM B pin.</description>
64338                            </enumeratedValue>
64339                            <enumeratedValue>
64340                                <name>rise</name>
64341                                <value>2</value>
64342                                <description>Counter advances with each rising edge of the PWM B pin.</description>
64343                            </enumeratedValue>
64344                            <enumeratedValue>
64345                                <name>fall</name>
64346                                <value>3</value>
64347                                <description>Counter advances with each falling edge of the PWM B pin.</description>
64348                            </enumeratedValue>
64349                        </enumeratedValues>
64350                    </field>
64351                    <field>
64352                        <name>B_INV</name>
64353                        <description>Invert output B</description>
64354                        <bitRange>[3:3]</bitRange>
64355                        <access>read-write</access>
64356                    </field>
64357                    <field>
64358                        <name>A_INV</name>
64359                        <description>Invert output A</description>
64360                        <bitRange>[2:2]</bitRange>
64361                        <access>read-write</access>
64362                    </field>
64363                    <field>
64364                        <name>PH_CORRECT</name>
64365                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
64366                        <bitRange>[1:1]</bitRange>
64367                        <access>read-write</access>
64368                    </field>
64369                    <field>
64370                        <name>EN</name>
64371                        <description>Enable the PWM channel.</description>
64372                        <bitRange>[0:0]</bitRange>
64373                        <access>read-write</access>
64374                    </field>
64375                </fields>
64376            </register>
64377            <register>
64378                <name>CH0_DIV</name>
64379                <addressOffset>0x00000004</addressOffset>
64380                <description>INT and FRAC form a fixed-point fractional number.
64381                    Counting rate is system clock frequency divided by this number.
64382                    Fractional division uses simple 1st-order sigma-delta.</description>
64383                <resetValue>0x00000010</resetValue>
64384                <fields>
64385                    <field>
64386                        <name>INT</name>
64387                        <bitRange>[11:4]</bitRange>
64388                        <access>read-write</access>
64389                    </field>
64390                    <field>
64391                        <name>FRAC</name>
64392                        <bitRange>[3:0]</bitRange>
64393                        <access>read-write</access>
64394                    </field>
64395                </fields>
64396            </register>
64397            <register>
64398                <name>CH0_CTR</name>
64399                <addressOffset>0x00000008</addressOffset>
64400                <description>Direct access to the PWM counter</description>
64401                <resetValue>0x00000000</resetValue>
64402                <fields>
64403                    <field>
64404                        <name>CH0_CTR</name>
64405                        <bitRange>[15:0]</bitRange>
64406                        <access>read-write</access>
64407                    </field>
64408                </fields>
64409            </register>
64410            <register>
64411                <name>CH0_CC</name>
64412                <addressOffset>0x0000000c</addressOffset>
64413                <description>Counter compare values</description>
64414                <resetValue>0x00000000</resetValue>
64415                <fields>
64416                    <field>
64417                        <name>B</name>
64418                        <bitRange>[31:16]</bitRange>
64419                        <access>read-write</access>
64420                    </field>
64421                    <field>
64422                        <name>A</name>
64423                        <bitRange>[15:0]</bitRange>
64424                        <access>read-write</access>
64425                    </field>
64426                </fields>
64427            </register>
64428            <register>
64429                <name>CH0_TOP</name>
64430                <addressOffset>0x00000010</addressOffset>
64431                <description>Counter wrap value</description>
64432                <resetValue>0x0000ffff</resetValue>
64433                <fields>
64434                    <field>
64435                        <name>CH0_TOP</name>
64436                        <bitRange>[15:0]</bitRange>
64437                        <access>read-write</access>
64438                    </field>
64439                </fields>
64440            </register>
64441            <register>
64442                <name>CH1_CSR</name>
64443                <addressOffset>0x00000014</addressOffset>
64444                <description>Control and status register</description>
64445                <resetValue>0x00000000</resetValue>
64446                <fields>
64447                    <field>
64448                        <name>PH_ADV</name>
64449                        <description>Advance the phase of the counter by 1 count, while it is running.
64450                            Self-clearing. Write a 1, and poll until low. Counter must be running
64451                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
64452                        <bitRange>[7:7]</bitRange>
64453                        <access>write-only</access>
64454                    </field>
64455                    <field>
64456                        <name>PH_RET</name>
64457                        <description>Retard the phase of the counter by 1 count, while it is running.
64458                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
64459                        <bitRange>[6:6]</bitRange>
64460                        <access>write-only</access>
64461                    </field>
64462                    <field>
64463                        <name>DIVMODE</name>
64464                        <bitRange>[5:4]</bitRange>
64465                        <access>read-write</access>
64466                        <enumeratedValues>
64467                            <enumeratedValue>
64468                                <name>div</name>
64469                                <value>0</value>
64470                                <description>Free-running counting at rate dictated by fractional divider</description>
64471                            </enumeratedValue>
64472                            <enumeratedValue>
64473                                <name>level</name>
64474                                <value>1</value>
64475                                <description>Fractional divider operation is gated by the PWM B pin.</description>
64476                            </enumeratedValue>
64477                            <enumeratedValue>
64478                                <name>rise</name>
64479                                <value>2</value>
64480                                <description>Counter advances with each rising edge of the PWM B pin.</description>
64481                            </enumeratedValue>
64482                            <enumeratedValue>
64483                                <name>fall</name>
64484                                <value>3</value>
64485                                <description>Counter advances with each falling edge of the PWM B pin.</description>
64486                            </enumeratedValue>
64487                        </enumeratedValues>
64488                    </field>
64489                    <field>
64490                        <name>B_INV</name>
64491                        <description>Invert output B</description>
64492                        <bitRange>[3:3]</bitRange>
64493                        <access>read-write</access>
64494                    </field>
64495                    <field>
64496                        <name>A_INV</name>
64497                        <description>Invert output A</description>
64498                        <bitRange>[2:2]</bitRange>
64499                        <access>read-write</access>
64500                    </field>
64501                    <field>
64502                        <name>PH_CORRECT</name>
64503                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
64504                        <bitRange>[1:1]</bitRange>
64505                        <access>read-write</access>
64506                    </field>
64507                    <field>
64508                        <name>EN</name>
64509                        <description>Enable the PWM channel.</description>
64510                        <bitRange>[0:0]</bitRange>
64511                        <access>read-write</access>
64512                    </field>
64513                </fields>
64514            </register>
64515            <register>
64516                <name>CH1_DIV</name>
64517                <addressOffset>0x00000018</addressOffset>
64518                <description>INT and FRAC form a fixed-point fractional number.
64519                    Counting rate is system clock frequency divided by this number.
64520                    Fractional division uses simple 1st-order sigma-delta.</description>
64521                <resetValue>0x00000010</resetValue>
64522                <fields>
64523                    <field>
64524                        <name>INT</name>
64525                        <bitRange>[11:4]</bitRange>
64526                        <access>read-write</access>
64527                    </field>
64528                    <field>
64529                        <name>FRAC</name>
64530                        <bitRange>[3:0]</bitRange>
64531                        <access>read-write</access>
64532                    </field>
64533                </fields>
64534            </register>
64535            <register>
64536                <name>CH1_CTR</name>
64537                <addressOffset>0x0000001c</addressOffset>
64538                <description>Direct access to the PWM counter</description>
64539                <resetValue>0x00000000</resetValue>
64540                <fields>
64541                    <field>
64542                        <name>CH1_CTR</name>
64543                        <bitRange>[15:0]</bitRange>
64544                        <access>read-write</access>
64545                    </field>
64546                </fields>
64547            </register>
64548            <register>
64549                <name>CH1_CC</name>
64550                <addressOffset>0x00000020</addressOffset>
64551                <description>Counter compare values</description>
64552                <resetValue>0x00000000</resetValue>
64553                <fields>
64554                    <field>
64555                        <name>B</name>
64556                        <bitRange>[31:16]</bitRange>
64557                        <access>read-write</access>
64558                    </field>
64559                    <field>
64560                        <name>A</name>
64561                        <bitRange>[15:0]</bitRange>
64562                        <access>read-write</access>
64563                    </field>
64564                </fields>
64565            </register>
64566            <register>
64567                <name>CH1_TOP</name>
64568                <addressOffset>0x00000024</addressOffset>
64569                <description>Counter wrap value</description>
64570                <resetValue>0x0000ffff</resetValue>
64571                <fields>
64572                    <field>
64573                        <name>CH1_TOP</name>
64574                        <bitRange>[15:0]</bitRange>
64575                        <access>read-write</access>
64576                    </field>
64577                </fields>
64578            </register>
64579            <register>
64580                <name>CH2_CSR</name>
64581                <addressOffset>0x00000028</addressOffset>
64582                <description>Control and status register</description>
64583                <resetValue>0x00000000</resetValue>
64584                <fields>
64585                    <field>
64586                        <name>PH_ADV</name>
64587                        <description>Advance the phase of the counter by 1 count, while it is running.
64588                            Self-clearing. Write a 1, and poll until low. Counter must be running
64589                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
64590                        <bitRange>[7:7]</bitRange>
64591                        <access>write-only</access>
64592                    </field>
64593                    <field>
64594                        <name>PH_RET</name>
64595                        <description>Retard the phase of the counter by 1 count, while it is running.
64596                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
64597                        <bitRange>[6:6]</bitRange>
64598                        <access>write-only</access>
64599                    </field>
64600                    <field>
64601                        <name>DIVMODE</name>
64602                        <bitRange>[5:4]</bitRange>
64603                        <access>read-write</access>
64604                        <enumeratedValues>
64605                            <enumeratedValue>
64606                                <name>div</name>
64607                                <value>0</value>
64608                                <description>Free-running counting at rate dictated by fractional divider</description>
64609                            </enumeratedValue>
64610                            <enumeratedValue>
64611                                <name>level</name>
64612                                <value>1</value>
64613                                <description>Fractional divider operation is gated by the PWM B pin.</description>
64614                            </enumeratedValue>
64615                            <enumeratedValue>
64616                                <name>rise</name>
64617                                <value>2</value>
64618                                <description>Counter advances with each rising edge of the PWM B pin.</description>
64619                            </enumeratedValue>
64620                            <enumeratedValue>
64621                                <name>fall</name>
64622                                <value>3</value>
64623                                <description>Counter advances with each falling edge of the PWM B pin.</description>
64624                            </enumeratedValue>
64625                        </enumeratedValues>
64626                    </field>
64627                    <field>
64628                        <name>B_INV</name>
64629                        <description>Invert output B</description>
64630                        <bitRange>[3:3]</bitRange>
64631                        <access>read-write</access>
64632                    </field>
64633                    <field>
64634                        <name>A_INV</name>
64635                        <description>Invert output A</description>
64636                        <bitRange>[2:2]</bitRange>
64637                        <access>read-write</access>
64638                    </field>
64639                    <field>
64640                        <name>PH_CORRECT</name>
64641                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
64642                        <bitRange>[1:1]</bitRange>
64643                        <access>read-write</access>
64644                    </field>
64645                    <field>
64646                        <name>EN</name>
64647                        <description>Enable the PWM channel.</description>
64648                        <bitRange>[0:0]</bitRange>
64649                        <access>read-write</access>
64650                    </field>
64651                </fields>
64652            </register>
64653            <register>
64654                <name>CH2_DIV</name>
64655                <addressOffset>0x0000002c</addressOffset>
64656                <description>INT and FRAC form a fixed-point fractional number.
64657                    Counting rate is system clock frequency divided by this number.
64658                    Fractional division uses simple 1st-order sigma-delta.</description>
64659                <resetValue>0x00000010</resetValue>
64660                <fields>
64661                    <field>
64662                        <name>INT</name>
64663                        <bitRange>[11:4]</bitRange>
64664                        <access>read-write</access>
64665                    </field>
64666                    <field>
64667                        <name>FRAC</name>
64668                        <bitRange>[3:0]</bitRange>
64669                        <access>read-write</access>
64670                    </field>
64671                </fields>
64672            </register>
64673            <register>
64674                <name>CH2_CTR</name>
64675                <addressOffset>0x00000030</addressOffset>
64676                <description>Direct access to the PWM counter</description>
64677                <resetValue>0x00000000</resetValue>
64678                <fields>
64679                    <field>
64680                        <name>CH2_CTR</name>
64681                        <bitRange>[15:0]</bitRange>
64682                        <access>read-write</access>
64683                    </field>
64684                </fields>
64685            </register>
64686            <register>
64687                <name>CH2_CC</name>
64688                <addressOffset>0x00000034</addressOffset>
64689                <description>Counter compare values</description>
64690                <resetValue>0x00000000</resetValue>
64691                <fields>
64692                    <field>
64693                        <name>B</name>
64694                        <bitRange>[31:16]</bitRange>
64695                        <access>read-write</access>
64696                    </field>
64697                    <field>
64698                        <name>A</name>
64699                        <bitRange>[15:0]</bitRange>
64700                        <access>read-write</access>
64701                    </field>
64702                </fields>
64703            </register>
64704            <register>
64705                <name>CH2_TOP</name>
64706                <addressOffset>0x00000038</addressOffset>
64707                <description>Counter wrap value</description>
64708                <resetValue>0x0000ffff</resetValue>
64709                <fields>
64710                    <field>
64711                        <name>CH2_TOP</name>
64712                        <bitRange>[15:0]</bitRange>
64713                        <access>read-write</access>
64714                    </field>
64715                </fields>
64716            </register>
64717            <register>
64718                <name>CH3_CSR</name>
64719                <addressOffset>0x0000003c</addressOffset>
64720                <description>Control and status register</description>
64721                <resetValue>0x00000000</resetValue>
64722                <fields>
64723                    <field>
64724                        <name>PH_ADV</name>
64725                        <description>Advance the phase of the counter by 1 count, while it is running.
64726                            Self-clearing. Write a 1, and poll until low. Counter must be running
64727                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
64728                        <bitRange>[7:7]</bitRange>
64729                        <access>write-only</access>
64730                    </field>
64731                    <field>
64732                        <name>PH_RET</name>
64733                        <description>Retard the phase of the counter by 1 count, while it is running.
64734                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
64735                        <bitRange>[6:6]</bitRange>
64736                        <access>write-only</access>
64737                    </field>
64738                    <field>
64739                        <name>DIVMODE</name>
64740                        <bitRange>[5:4]</bitRange>
64741                        <access>read-write</access>
64742                        <enumeratedValues>
64743                            <enumeratedValue>
64744                                <name>div</name>
64745                                <value>0</value>
64746                                <description>Free-running counting at rate dictated by fractional divider</description>
64747                            </enumeratedValue>
64748                            <enumeratedValue>
64749                                <name>level</name>
64750                                <value>1</value>
64751                                <description>Fractional divider operation is gated by the PWM B pin.</description>
64752                            </enumeratedValue>
64753                            <enumeratedValue>
64754                                <name>rise</name>
64755                                <value>2</value>
64756                                <description>Counter advances with each rising edge of the PWM B pin.</description>
64757                            </enumeratedValue>
64758                            <enumeratedValue>
64759                                <name>fall</name>
64760                                <value>3</value>
64761                                <description>Counter advances with each falling edge of the PWM B pin.</description>
64762                            </enumeratedValue>
64763                        </enumeratedValues>
64764                    </field>
64765                    <field>
64766                        <name>B_INV</name>
64767                        <description>Invert output B</description>
64768                        <bitRange>[3:3]</bitRange>
64769                        <access>read-write</access>
64770                    </field>
64771                    <field>
64772                        <name>A_INV</name>
64773                        <description>Invert output A</description>
64774                        <bitRange>[2:2]</bitRange>
64775                        <access>read-write</access>
64776                    </field>
64777                    <field>
64778                        <name>PH_CORRECT</name>
64779                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
64780                        <bitRange>[1:1]</bitRange>
64781                        <access>read-write</access>
64782                    </field>
64783                    <field>
64784                        <name>EN</name>
64785                        <description>Enable the PWM channel.</description>
64786                        <bitRange>[0:0]</bitRange>
64787                        <access>read-write</access>
64788                    </field>
64789                </fields>
64790            </register>
64791            <register>
64792                <name>CH3_DIV</name>
64793                <addressOffset>0x00000040</addressOffset>
64794                <description>INT and FRAC form a fixed-point fractional number.
64795                    Counting rate is system clock frequency divided by this number.
64796                    Fractional division uses simple 1st-order sigma-delta.</description>
64797                <resetValue>0x00000010</resetValue>
64798                <fields>
64799                    <field>
64800                        <name>INT</name>
64801                        <bitRange>[11:4]</bitRange>
64802                        <access>read-write</access>
64803                    </field>
64804                    <field>
64805                        <name>FRAC</name>
64806                        <bitRange>[3:0]</bitRange>
64807                        <access>read-write</access>
64808                    </field>
64809                </fields>
64810            </register>
64811            <register>
64812                <name>CH3_CTR</name>
64813                <addressOffset>0x00000044</addressOffset>
64814                <description>Direct access to the PWM counter</description>
64815                <resetValue>0x00000000</resetValue>
64816                <fields>
64817                    <field>
64818                        <name>CH3_CTR</name>
64819                        <bitRange>[15:0]</bitRange>
64820                        <access>read-write</access>
64821                    </field>
64822                </fields>
64823            </register>
64824            <register>
64825                <name>CH3_CC</name>
64826                <addressOffset>0x00000048</addressOffset>
64827                <description>Counter compare values</description>
64828                <resetValue>0x00000000</resetValue>
64829                <fields>
64830                    <field>
64831                        <name>B</name>
64832                        <bitRange>[31:16]</bitRange>
64833                        <access>read-write</access>
64834                    </field>
64835                    <field>
64836                        <name>A</name>
64837                        <bitRange>[15:0]</bitRange>
64838                        <access>read-write</access>
64839                    </field>
64840                </fields>
64841            </register>
64842            <register>
64843                <name>CH3_TOP</name>
64844                <addressOffset>0x0000004c</addressOffset>
64845                <description>Counter wrap value</description>
64846                <resetValue>0x0000ffff</resetValue>
64847                <fields>
64848                    <field>
64849                        <name>CH3_TOP</name>
64850                        <bitRange>[15:0]</bitRange>
64851                        <access>read-write</access>
64852                    </field>
64853                </fields>
64854            </register>
64855            <register>
64856                <name>CH4_CSR</name>
64857                <addressOffset>0x00000050</addressOffset>
64858                <description>Control and status register</description>
64859                <resetValue>0x00000000</resetValue>
64860                <fields>
64861                    <field>
64862                        <name>PH_ADV</name>
64863                        <description>Advance the phase of the counter by 1 count, while it is running.
64864                            Self-clearing. Write a 1, and poll until low. Counter must be running
64865                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
64866                        <bitRange>[7:7]</bitRange>
64867                        <access>write-only</access>
64868                    </field>
64869                    <field>
64870                        <name>PH_RET</name>
64871                        <description>Retard the phase of the counter by 1 count, while it is running.
64872                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
64873                        <bitRange>[6:6]</bitRange>
64874                        <access>write-only</access>
64875                    </field>
64876                    <field>
64877                        <name>DIVMODE</name>
64878                        <bitRange>[5:4]</bitRange>
64879                        <access>read-write</access>
64880                        <enumeratedValues>
64881                            <enumeratedValue>
64882                                <name>div</name>
64883                                <value>0</value>
64884                                <description>Free-running counting at rate dictated by fractional divider</description>
64885                            </enumeratedValue>
64886                            <enumeratedValue>
64887                                <name>level</name>
64888                                <value>1</value>
64889                                <description>Fractional divider operation is gated by the PWM B pin.</description>
64890                            </enumeratedValue>
64891                            <enumeratedValue>
64892                                <name>rise</name>
64893                                <value>2</value>
64894                                <description>Counter advances with each rising edge of the PWM B pin.</description>
64895                            </enumeratedValue>
64896                            <enumeratedValue>
64897                                <name>fall</name>
64898                                <value>3</value>
64899                                <description>Counter advances with each falling edge of the PWM B pin.</description>
64900                            </enumeratedValue>
64901                        </enumeratedValues>
64902                    </field>
64903                    <field>
64904                        <name>B_INV</name>
64905                        <description>Invert output B</description>
64906                        <bitRange>[3:3]</bitRange>
64907                        <access>read-write</access>
64908                    </field>
64909                    <field>
64910                        <name>A_INV</name>
64911                        <description>Invert output A</description>
64912                        <bitRange>[2:2]</bitRange>
64913                        <access>read-write</access>
64914                    </field>
64915                    <field>
64916                        <name>PH_CORRECT</name>
64917                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
64918                        <bitRange>[1:1]</bitRange>
64919                        <access>read-write</access>
64920                    </field>
64921                    <field>
64922                        <name>EN</name>
64923                        <description>Enable the PWM channel.</description>
64924                        <bitRange>[0:0]</bitRange>
64925                        <access>read-write</access>
64926                    </field>
64927                </fields>
64928            </register>
64929            <register>
64930                <name>CH4_DIV</name>
64931                <addressOffset>0x00000054</addressOffset>
64932                <description>INT and FRAC form a fixed-point fractional number.
64933                    Counting rate is system clock frequency divided by this number.
64934                    Fractional division uses simple 1st-order sigma-delta.</description>
64935                <resetValue>0x00000010</resetValue>
64936                <fields>
64937                    <field>
64938                        <name>INT</name>
64939                        <bitRange>[11:4]</bitRange>
64940                        <access>read-write</access>
64941                    </field>
64942                    <field>
64943                        <name>FRAC</name>
64944                        <bitRange>[3:0]</bitRange>
64945                        <access>read-write</access>
64946                    </field>
64947                </fields>
64948            </register>
64949            <register>
64950                <name>CH4_CTR</name>
64951                <addressOffset>0x00000058</addressOffset>
64952                <description>Direct access to the PWM counter</description>
64953                <resetValue>0x00000000</resetValue>
64954                <fields>
64955                    <field>
64956                        <name>CH4_CTR</name>
64957                        <bitRange>[15:0]</bitRange>
64958                        <access>read-write</access>
64959                    </field>
64960                </fields>
64961            </register>
64962            <register>
64963                <name>CH4_CC</name>
64964                <addressOffset>0x0000005c</addressOffset>
64965                <description>Counter compare values</description>
64966                <resetValue>0x00000000</resetValue>
64967                <fields>
64968                    <field>
64969                        <name>B</name>
64970                        <bitRange>[31:16]</bitRange>
64971                        <access>read-write</access>
64972                    </field>
64973                    <field>
64974                        <name>A</name>
64975                        <bitRange>[15:0]</bitRange>
64976                        <access>read-write</access>
64977                    </field>
64978                </fields>
64979            </register>
64980            <register>
64981                <name>CH4_TOP</name>
64982                <addressOffset>0x00000060</addressOffset>
64983                <description>Counter wrap value</description>
64984                <resetValue>0x0000ffff</resetValue>
64985                <fields>
64986                    <field>
64987                        <name>CH4_TOP</name>
64988                        <bitRange>[15:0]</bitRange>
64989                        <access>read-write</access>
64990                    </field>
64991                </fields>
64992            </register>
64993            <register>
64994                <name>CH5_CSR</name>
64995                <addressOffset>0x00000064</addressOffset>
64996                <description>Control and status register</description>
64997                <resetValue>0x00000000</resetValue>
64998                <fields>
64999                    <field>
65000                        <name>PH_ADV</name>
65001                        <description>Advance the phase of the counter by 1 count, while it is running.
65002                            Self-clearing. Write a 1, and poll until low. Counter must be running
65003                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65004                        <bitRange>[7:7]</bitRange>
65005                        <access>write-only</access>
65006                    </field>
65007                    <field>
65008                        <name>PH_RET</name>
65009                        <description>Retard the phase of the counter by 1 count, while it is running.
65010                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65011                        <bitRange>[6:6]</bitRange>
65012                        <access>write-only</access>
65013                    </field>
65014                    <field>
65015                        <name>DIVMODE</name>
65016                        <bitRange>[5:4]</bitRange>
65017                        <access>read-write</access>
65018                        <enumeratedValues>
65019                            <enumeratedValue>
65020                                <name>div</name>
65021                                <value>0</value>
65022                                <description>Free-running counting at rate dictated by fractional divider</description>
65023                            </enumeratedValue>
65024                            <enumeratedValue>
65025                                <name>level</name>
65026                                <value>1</value>
65027                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65028                            </enumeratedValue>
65029                            <enumeratedValue>
65030                                <name>rise</name>
65031                                <value>2</value>
65032                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65033                            </enumeratedValue>
65034                            <enumeratedValue>
65035                                <name>fall</name>
65036                                <value>3</value>
65037                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65038                            </enumeratedValue>
65039                        </enumeratedValues>
65040                    </field>
65041                    <field>
65042                        <name>B_INV</name>
65043                        <description>Invert output B</description>
65044                        <bitRange>[3:3]</bitRange>
65045                        <access>read-write</access>
65046                    </field>
65047                    <field>
65048                        <name>A_INV</name>
65049                        <description>Invert output A</description>
65050                        <bitRange>[2:2]</bitRange>
65051                        <access>read-write</access>
65052                    </field>
65053                    <field>
65054                        <name>PH_CORRECT</name>
65055                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65056                        <bitRange>[1:1]</bitRange>
65057                        <access>read-write</access>
65058                    </field>
65059                    <field>
65060                        <name>EN</name>
65061                        <description>Enable the PWM channel.</description>
65062                        <bitRange>[0:0]</bitRange>
65063                        <access>read-write</access>
65064                    </field>
65065                </fields>
65066            </register>
65067            <register>
65068                <name>CH5_DIV</name>
65069                <addressOffset>0x00000068</addressOffset>
65070                <description>INT and FRAC form a fixed-point fractional number.
65071                    Counting rate is system clock frequency divided by this number.
65072                    Fractional division uses simple 1st-order sigma-delta.</description>
65073                <resetValue>0x00000010</resetValue>
65074                <fields>
65075                    <field>
65076                        <name>INT</name>
65077                        <bitRange>[11:4]</bitRange>
65078                        <access>read-write</access>
65079                    </field>
65080                    <field>
65081                        <name>FRAC</name>
65082                        <bitRange>[3:0]</bitRange>
65083                        <access>read-write</access>
65084                    </field>
65085                </fields>
65086            </register>
65087            <register>
65088                <name>CH5_CTR</name>
65089                <addressOffset>0x0000006c</addressOffset>
65090                <description>Direct access to the PWM counter</description>
65091                <resetValue>0x00000000</resetValue>
65092                <fields>
65093                    <field>
65094                        <name>CH5_CTR</name>
65095                        <bitRange>[15:0]</bitRange>
65096                        <access>read-write</access>
65097                    </field>
65098                </fields>
65099            </register>
65100            <register>
65101                <name>CH5_CC</name>
65102                <addressOffset>0x00000070</addressOffset>
65103                <description>Counter compare values</description>
65104                <resetValue>0x00000000</resetValue>
65105                <fields>
65106                    <field>
65107                        <name>B</name>
65108                        <bitRange>[31:16]</bitRange>
65109                        <access>read-write</access>
65110                    </field>
65111                    <field>
65112                        <name>A</name>
65113                        <bitRange>[15:0]</bitRange>
65114                        <access>read-write</access>
65115                    </field>
65116                </fields>
65117            </register>
65118            <register>
65119                <name>CH5_TOP</name>
65120                <addressOffset>0x00000074</addressOffset>
65121                <description>Counter wrap value</description>
65122                <resetValue>0x0000ffff</resetValue>
65123                <fields>
65124                    <field>
65125                        <name>CH5_TOP</name>
65126                        <bitRange>[15:0]</bitRange>
65127                        <access>read-write</access>
65128                    </field>
65129                </fields>
65130            </register>
65131            <register>
65132                <name>CH6_CSR</name>
65133                <addressOffset>0x00000078</addressOffset>
65134                <description>Control and status register</description>
65135                <resetValue>0x00000000</resetValue>
65136                <fields>
65137                    <field>
65138                        <name>PH_ADV</name>
65139                        <description>Advance the phase of the counter by 1 count, while it is running.
65140                            Self-clearing. Write a 1, and poll until low. Counter must be running
65141                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65142                        <bitRange>[7:7]</bitRange>
65143                        <access>write-only</access>
65144                    </field>
65145                    <field>
65146                        <name>PH_RET</name>
65147                        <description>Retard the phase of the counter by 1 count, while it is running.
65148                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65149                        <bitRange>[6:6]</bitRange>
65150                        <access>write-only</access>
65151                    </field>
65152                    <field>
65153                        <name>DIVMODE</name>
65154                        <bitRange>[5:4]</bitRange>
65155                        <access>read-write</access>
65156                        <enumeratedValues>
65157                            <enumeratedValue>
65158                                <name>div</name>
65159                                <value>0</value>
65160                                <description>Free-running counting at rate dictated by fractional divider</description>
65161                            </enumeratedValue>
65162                            <enumeratedValue>
65163                                <name>level</name>
65164                                <value>1</value>
65165                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65166                            </enumeratedValue>
65167                            <enumeratedValue>
65168                                <name>rise</name>
65169                                <value>2</value>
65170                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65171                            </enumeratedValue>
65172                            <enumeratedValue>
65173                                <name>fall</name>
65174                                <value>3</value>
65175                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65176                            </enumeratedValue>
65177                        </enumeratedValues>
65178                    </field>
65179                    <field>
65180                        <name>B_INV</name>
65181                        <description>Invert output B</description>
65182                        <bitRange>[3:3]</bitRange>
65183                        <access>read-write</access>
65184                    </field>
65185                    <field>
65186                        <name>A_INV</name>
65187                        <description>Invert output A</description>
65188                        <bitRange>[2:2]</bitRange>
65189                        <access>read-write</access>
65190                    </field>
65191                    <field>
65192                        <name>PH_CORRECT</name>
65193                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65194                        <bitRange>[1:1]</bitRange>
65195                        <access>read-write</access>
65196                    </field>
65197                    <field>
65198                        <name>EN</name>
65199                        <description>Enable the PWM channel.</description>
65200                        <bitRange>[0:0]</bitRange>
65201                        <access>read-write</access>
65202                    </field>
65203                </fields>
65204            </register>
65205            <register>
65206                <name>CH6_DIV</name>
65207                <addressOffset>0x0000007c</addressOffset>
65208                <description>INT and FRAC form a fixed-point fractional number.
65209                    Counting rate is system clock frequency divided by this number.
65210                    Fractional division uses simple 1st-order sigma-delta.</description>
65211                <resetValue>0x00000010</resetValue>
65212                <fields>
65213                    <field>
65214                        <name>INT</name>
65215                        <bitRange>[11:4]</bitRange>
65216                        <access>read-write</access>
65217                    </field>
65218                    <field>
65219                        <name>FRAC</name>
65220                        <bitRange>[3:0]</bitRange>
65221                        <access>read-write</access>
65222                    </field>
65223                </fields>
65224            </register>
65225            <register>
65226                <name>CH6_CTR</name>
65227                <addressOffset>0x00000080</addressOffset>
65228                <description>Direct access to the PWM counter</description>
65229                <resetValue>0x00000000</resetValue>
65230                <fields>
65231                    <field>
65232                        <name>CH6_CTR</name>
65233                        <bitRange>[15:0]</bitRange>
65234                        <access>read-write</access>
65235                    </field>
65236                </fields>
65237            </register>
65238            <register>
65239                <name>CH6_CC</name>
65240                <addressOffset>0x00000084</addressOffset>
65241                <description>Counter compare values</description>
65242                <resetValue>0x00000000</resetValue>
65243                <fields>
65244                    <field>
65245                        <name>B</name>
65246                        <bitRange>[31:16]</bitRange>
65247                        <access>read-write</access>
65248                    </field>
65249                    <field>
65250                        <name>A</name>
65251                        <bitRange>[15:0]</bitRange>
65252                        <access>read-write</access>
65253                    </field>
65254                </fields>
65255            </register>
65256            <register>
65257                <name>CH6_TOP</name>
65258                <addressOffset>0x00000088</addressOffset>
65259                <description>Counter wrap value</description>
65260                <resetValue>0x0000ffff</resetValue>
65261                <fields>
65262                    <field>
65263                        <name>CH6_TOP</name>
65264                        <bitRange>[15:0]</bitRange>
65265                        <access>read-write</access>
65266                    </field>
65267                </fields>
65268            </register>
65269            <register>
65270                <name>CH7_CSR</name>
65271                <addressOffset>0x0000008c</addressOffset>
65272                <description>Control and status register</description>
65273                <resetValue>0x00000000</resetValue>
65274                <fields>
65275                    <field>
65276                        <name>PH_ADV</name>
65277                        <description>Advance the phase of the counter by 1 count, while it is running.
65278                            Self-clearing. Write a 1, and poll until low. Counter must be running
65279                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65280                        <bitRange>[7:7]</bitRange>
65281                        <access>write-only</access>
65282                    </field>
65283                    <field>
65284                        <name>PH_RET</name>
65285                        <description>Retard the phase of the counter by 1 count, while it is running.
65286                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65287                        <bitRange>[6:6]</bitRange>
65288                        <access>write-only</access>
65289                    </field>
65290                    <field>
65291                        <name>DIVMODE</name>
65292                        <bitRange>[5:4]</bitRange>
65293                        <access>read-write</access>
65294                        <enumeratedValues>
65295                            <enumeratedValue>
65296                                <name>div</name>
65297                                <value>0</value>
65298                                <description>Free-running counting at rate dictated by fractional divider</description>
65299                            </enumeratedValue>
65300                            <enumeratedValue>
65301                                <name>level</name>
65302                                <value>1</value>
65303                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65304                            </enumeratedValue>
65305                            <enumeratedValue>
65306                                <name>rise</name>
65307                                <value>2</value>
65308                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65309                            </enumeratedValue>
65310                            <enumeratedValue>
65311                                <name>fall</name>
65312                                <value>3</value>
65313                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65314                            </enumeratedValue>
65315                        </enumeratedValues>
65316                    </field>
65317                    <field>
65318                        <name>B_INV</name>
65319                        <description>Invert output B</description>
65320                        <bitRange>[3:3]</bitRange>
65321                        <access>read-write</access>
65322                    </field>
65323                    <field>
65324                        <name>A_INV</name>
65325                        <description>Invert output A</description>
65326                        <bitRange>[2:2]</bitRange>
65327                        <access>read-write</access>
65328                    </field>
65329                    <field>
65330                        <name>PH_CORRECT</name>
65331                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65332                        <bitRange>[1:1]</bitRange>
65333                        <access>read-write</access>
65334                    </field>
65335                    <field>
65336                        <name>EN</name>
65337                        <description>Enable the PWM channel.</description>
65338                        <bitRange>[0:0]</bitRange>
65339                        <access>read-write</access>
65340                    </field>
65341                </fields>
65342            </register>
65343            <register>
65344                <name>CH7_DIV</name>
65345                <addressOffset>0x00000090</addressOffset>
65346                <description>INT and FRAC form a fixed-point fractional number.
65347                    Counting rate is system clock frequency divided by this number.
65348                    Fractional division uses simple 1st-order sigma-delta.</description>
65349                <resetValue>0x00000010</resetValue>
65350                <fields>
65351                    <field>
65352                        <name>INT</name>
65353                        <bitRange>[11:4]</bitRange>
65354                        <access>read-write</access>
65355                    </field>
65356                    <field>
65357                        <name>FRAC</name>
65358                        <bitRange>[3:0]</bitRange>
65359                        <access>read-write</access>
65360                    </field>
65361                </fields>
65362            </register>
65363            <register>
65364                <name>CH7_CTR</name>
65365                <addressOffset>0x00000094</addressOffset>
65366                <description>Direct access to the PWM counter</description>
65367                <resetValue>0x00000000</resetValue>
65368                <fields>
65369                    <field>
65370                        <name>CH7_CTR</name>
65371                        <bitRange>[15:0]</bitRange>
65372                        <access>read-write</access>
65373                    </field>
65374                </fields>
65375            </register>
65376            <register>
65377                <name>CH7_CC</name>
65378                <addressOffset>0x00000098</addressOffset>
65379                <description>Counter compare values</description>
65380                <resetValue>0x00000000</resetValue>
65381                <fields>
65382                    <field>
65383                        <name>B</name>
65384                        <bitRange>[31:16]</bitRange>
65385                        <access>read-write</access>
65386                    </field>
65387                    <field>
65388                        <name>A</name>
65389                        <bitRange>[15:0]</bitRange>
65390                        <access>read-write</access>
65391                    </field>
65392                </fields>
65393            </register>
65394            <register>
65395                <name>CH7_TOP</name>
65396                <addressOffset>0x0000009c</addressOffset>
65397                <description>Counter wrap value</description>
65398                <resetValue>0x0000ffff</resetValue>
65399                <fields>
65400                    <field>
65401                        <name>CH7_TOP</name>
65402                        <bitRange>[15:0]</bitRange>
65403                        <access>read-write</access>
65404                    </field>
65405                </fields>
65406            </register>
65407            <register>
65408                <name>CH8_CSR</name>
65409                <addressOffset>0x000000a0</addressOffset>
65410                <description>Control and status register</description>
65411                <resetValue>0x00000000</resetValue>
65412                <fields>
65413                    <field>
65414                        <name>PH_ADV</name>
65415                        <description>Advance the phase of the counter by 1 count, while it is running.
65416                            Self-clearing. Write a 1, and poll until low. Counter must be running
65417                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65418                        <bitRange>[7:7]</bitRange>
65419                        <access>write-only</access>
65420                    </field>
65421                    <field>
65422                        <name>PH_RET</name>
65423                        <description>Retard the phase of the counter by 1 count, while it is running.
65424                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65425                        <bitRange>[6:6]</bitRange>
65426                        <access>write-only</access>
65427                    </field>
65428                    <field>
65429                        <name>DIVMODE</name>
65430                        <bitRange>[5:4]</bitRange>
65431                        <access>read-write</access>
65432                        <enumeratedValues>
65433                            <enumeratedValue>
65434                                <name>div</name>
65435                                <value>0</value>
65436                                <description>Free-running counting at rate dictated by fractional divider</description>
65437                            </enumeratedValue>
65438                            <enumeratedValue>
65439                                <name>level</name>
65440                                <value>1</value>
65441                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65442                            </enumeratedValue>
65443                            <enumeratedValue>
65444                                <name>rise</name>
65445                                <value>2</value>
65446                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65447                            </enumeratedValue>
65448                            <enumeratedValue>
65449                                <name>fall</name>
65450                                <value>3</value>
65451                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65452                            </enumeratedValue>
65453                        </enumeratedValues>
65454                    </field>
65455                    <field>
65456                        <name>B_INV</name>
65457                        <description>Invert output B</description>
65458                        <bitRange>[3:3]</bitRange>
65459                        <access>read-write</access>
65460                    </field>
65461                    <field>
65462                        <name>A_INV</name>
65463                        <description>Invert output A</description>
65464                        <bitRange>[2:2]</bitRange>
65465                        <access>read-write</access>
65466                    </field>
65467                    <field>
65468                        <name>PH_CORRECT</name>
65469                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65470                        <bitRange>[1:1]</bitRange>
65471                        <access>read-write</access>
65472                    </field>
65473                    <field>
65474                        <name>EN</name>
65475                        <description>Enable the PWM channel.</description>
65476                        <bitRange>[0:0]</bitRange>
65477                        <access>read-write</access>
65478                    </field>
65479                </fields>
65480            </register>
65481            <register>
65482                <name>CH8_DIV</name>
65483                <addressOffset>0x000000a4</addressOffset>
65484                <description>INT and FRAC form a fixed-point fractional number.
65485                    Counting rate is system clock frequency divided by this number.
65486                    Fractional division uses simple 1st-order sigma-delta.</description>
65487                <resetValue>0x00000010</resetValue>
65488                <fields>
65489                    <field>
65490                        <name>INT</name>
65491                        <bitRange>[11:4]</bitRange>
65492                        <access>read-write</access>
65493                    </field>
65494                    <field>
65495                        <name>FRAC</name>
65496                        <bitRange>[3:0]</bitRange>
65497                        <access>read-write</access>
65498                    </field>
65499                </fields>
65500            </register>
65501            <register>
65502                <name>CH8_CTR</name>
65503                <addressOffset>0x000000a8</addressOffset>
65504                <description>Direct access to the PWM counter</description>
65505                <resetValue>0x00000000</resetValue>
65506                <fields>
65507                    <field>
65508                        <name>CH8_CTR</name>
65509                        <bitRange>[15:0]</bitRange>
65510                        <access>read-write</access>
65511                    </field>
65512                </fields>
65513            </register>
65514            <register>
65515                <name>CH8_CC</name>
65516                <addressOffset>0x000000ac</addressOffset>
65517                <description>Counter compare values</description>
65518                <resetValue>0x00000000</resetValue>
65519                <fields>
65520                    <field>
65521                        <name>B</name>
65522                        <bitRange>[31:16]</bitRange>
65523                        <access>read-write</access>
65524                    </field>
65525                    <field>
65526                        <name>A</name>
65527                        <bitRange>[15:0]</bitRange>
65528                        <access>read-write</access>
65529                    </field>
65530                </fields>
65531            </register>
65532            <register>
65533                <name>CH8_TOP</name>
65534                <addressOffset>0x000000b0</addressOffset>
65535                <description>Counter wrap value</description>
65536                <resetValue>0x0000ffff</resetValue>
65537                <fields>
65538                    <field>
65539                        <name>CH8_TOP</name>
65540                        <bitRange>[15:0]</bitRange>
65541                        <access>read-write</access>
65542                    </field>
65543                </fields>
65544            </register>
65545            <register>
65546                <name>CH9_CSR</name>
65547                <addressOffset>0x000000b4</addressOffset>
65548                <description>Control and status register</description>
65549                <resetValue>0x00000000</resetValue>
65550                <fields>
65551                    <field>
65552                        <name>PH_ADV</name>
65553                        <description>Advance the phase of the counter by 1 count, while it is running.
65554                            Self-clearing. Write a 1, and poll until low. Counter must be running
65555                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65556                        <bitRange>[7:7]</bitRange>
65557                        <access>write-only</access>
65558                    </field>
65559                    <field>
65560                        <name>PH_RET</name>
65561                        <description>Retard the phase of the counter by 1 count, while it is running.
65562                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65563                        <bitRange>[6:6]</bitRange>
65564                        <access>write-only</access>
65565                    </field>
65566                    <field>
65567                        <name>DIVMODE</name>
65568                        <bitRange>[5:4]</bitRange>
65569                        <access>read-write</access>
65570                        <enumeratedValues>
65571                            <enumeratedValue>
65572                                <name>div</name>
65573                                <value>0</value>
65574                                <description>Free-running counting at rate dictated by fractional divider</description>
65575                            </enumeratedValue>
65576                            <enumeratedValue>
65577                                <name>level</name>
65578                                <value>1</value>
65579                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65580                            </enumeratedValue>
65581                            <enumeratedValue>
65582                                <name>rise</name>
65583                                <value>2</value>
65584                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65585                            </enumeratedValue>
65586                            <enumeratedValue>
65587                                <name>fall</name>
65588                                <value>3</value>
65589                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65590                            </enumeratedValue>
65591                        </enumeratedValues>
65592                    </field>
65593                    <field>
65594                        <name>B_INV</name>
65595                        <description>Invert output B</description>
65596                        <bitRange>[3:3]</bitRange>
65597                        <access>read-write</access>
65598                    </field>
65599                    <field>
65600                        <name>A_INV</name>
65601                        <description>Invert output A</description>
65602                        <bitRange>[2:2]</bitRange>
65603                        <access>read-write</access>
65604                    </field>
65605                    <field>
65606                        <name>PH_CORRECT</name>
65607                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65608                        <bitRange>[1:1]</bitRange>
65609                        <access>read-write</access>
65610                    </field>
65611                    <field>
65612                        <name>EN</name>
65613                        <description>Enable the PWM channel.</description>
65614                        <bitRange>[0:0]</bitRange>
65615                        <access>read-write</access>
65616                    </field>
65617                </fields>
65618            </register>
65619            <register>
65620                <name>CH9_DIV</name>
65621                <addressOffset>0x000000b8</addressOffset>
65622                <description>INT and FRAC form a fixed-point fractional number.
65623                    Counting rate is system clock frequency divided by this number.
65624                    Fractional division uses simple 1st-order sigma-delta.</description>
65625                <resetValue>0x00000010</resetValue>
65626                <fields>
65627                    <field>
65628                        <name>INT</name>
65629                        <bitRange>[11:4]</bitRange>
65630                        <access>read-write</access>
65631                    </field>
65632                    <field>
65633                        <name>FRAC</name>
65634                        <bitRange>[3:0]</bitRange>
65635                        <access>read-write</access>
65636                    </field>
65637                </fields>
65638            </register>
65639            <register>
65640                <name>CH9_CTR</name>
65641                <addressOffset>0x000000bc</addressOffset>
65642                <description>Direct access to the PWM counter</description>
65643                <resetValue>0x00000000</resetValue>
65644                <fields>
65645                    <field>
65646                        <name>CH9_CTR</name>
65647                        <bitRange>[15:0]</bitRange>
65648                        <access>read-write</access>
65649                    </field>
65650                </fields>
65651            </register>
65652            <register>
65653                <name>CH9_CC</name>
65654                <addressOffset>0x000000c0</addressOffset>
65655                <description>Counter compare values</description>
65656                <resetValue>0x00000000</resetValue>
65657                <fields>
65658                    <field>
65659                        <name>B</name>
65660                        <bitRange>[31:16]</bitRange>
65661                        <access>read-write</access>
65662                    </field>
65663                    <field>
65664                        <name>A</name>
65665                        <bitRange>[15:0]</bitRange>
65666                        <access>read-write</access>
65667                    </field>
65668                </fields>
65669            </register>
65670            <register>
65671                <name>CH9_TOP</name>
65672                <addressOffset>0x000000c4</addressOffset>
65673                <description>Counter wrap value</description>
65674                <resetValue>0x0000ffff</resetValue>
65675                <fields>
65676                    <field>
65677                        <name>CH9_TOP</name>
65678                        <bitRange>[15:0]</bitRange>
65679                        <access>read-write</access>
65680                    </field>
65681                </fields>
65682            </register>
65683            <register>
65684                <name>CH10_CSR</name>
65685                <addressOffset>0x000000c8</addressOffset>
65686                <description>Control and status register</description>
65687                <resetValue>0x00000000</resetValue>
65688                <fields>
65689                    <field>
65690                        <name>PH_ADV</name>
65691                        <description>Advance the phase of the counter by 1 count, while it is running.
65692                            Self-clearing. Write a 1, and poll until low. Counter must be running
65693                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65694                        <bitRange>[7:7]</bitRange>
65695                        <access>write-only</access>
65696                    </field>
65697                    <field>
65698                        <name>PH_RET</name>
65699                        <description>Retard the phase of the counter by 1 count, while it is running.
65700                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65701                        <bitRange>[6:6]</bitRange>
65702                        <access>write-only</access>
65703                    </field>
65704                    <field>
65705                        <name>DIVMODE</name>
65706                        <bitRange>[5:4]</bitRange>
65707                        <access>read-write</access>
65708                        <enumeratedValues>
65709                            <enumeratedValue>
65710                                <name>div</name>
65711                                <value>0</value>
65712                                <description>Free-running counting at rate dictated by fractional divider</description>
65713                            </enumeratedValue>
65714                            <enumeratedValue>
65715                                <name>level</name>
65716                                <value>1</value>
65717                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65718                            </enumeratedValue>
65719                            <enumeratedValue>
65720                                <name>rise</name>
65721                                <value>2</value>
65722                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65723                            </enumeratedValue>
65724                            <enumeratedValue>
65725                                <name>fall</name>
65726                                <value>3</value>
65727                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65728                            </enumeratedValue>
65729                        </enumeratedValues>
65730                    </field>
65731                    <field>
65732                        <name>B_INV</name>
65733                        <description>Invert output B</description>
65734                        <bitRange>[3:3]</bitRange>
65735                        <access>read-write</access>
65736                    </field>
65737                    <field>
65738                        <name>A_INV</name>
65739                        <description>Invert output A</description>
65740                        <bitRange>[2:2]</bitRange>
65741                        <access>read-write</access>
65742                    </field>
65743                    <field>
65744                        <name>PH_CORRECT</name>
65745                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65746                        <bitRange>[1:1]</bitRange>
65747                        <access>read-write</access>
65748                    </field>
65749                    <field>
65750                        <name>EN</name>
65751                        <description>Enable the PWM channel.</description>
65752                        <bitRange>[0:0]</bitRange>
65753                        <access>read-write</access>
65754                    </field>
65755                </fields>
65756            </register>
65757            <register>
65758                <name>CH10_DIV</name>
65759                <addressOffset>0x000000cc</addressOffset>
65760                <description>INT and FRAC form a fixed-point fractional number.
65761                    Counting rate is system clock frequency divided by this number.
65762                    Fractional division uses simple 1st-order sigma-delta.</description>
65763                <resetValue>0x00000010</resetValue>
65764                <fields>
65765                    <field>
65766                        <name>INT</name>
65767                        <bitRange>[11:4]</bitRange>
65768                        <access>read-write</access>
65769                    </field>
65770                    <field>
65771                        <name>FRAC</name>
65772                        <bitRange>[3:0]</bitRange>
65773                        <access>read-write</access>
65774                    </field>
65775                </fields>
65776            </register>
65777            <register>
65778                <name>CH10_CTR</name>
65779                <addressOffset>0x000000d0</addressOffset>
65780                <description>Direct access to the PWM counter</description>
65781                <resetValue>0x00000000</resetValue>
65782                <fields>
65783                    <field>
65784                        <name>CH10_CTR</name>
65785                        <bitRange>[15:0]</bitRange>
65786                        <access>read-write</access>
65787                    </field>
65788                </fields>
65789            </register>
65790            <register>
65791                <name>CH10_CC</name>
65792                <addressOffset>0x000000d4</addressOffset>
65793                <description>Counter compare values</description>
65794                <resetValue>0x00000000</resetValue>
65795                <fields>
65796                    <field>
65797                        <name>B</name>
65798                        <bitRange>[31:16]</bitRange>
65799                        <access>read-write</access>
65800                    </field>
65801                    <field>
65802                        <name>A</name>
65803                        <bitRange>[15:0]</bitRange>
65804                        <access>read-write</access>
65805                    </field>
65806                </fields>
65807            </register>
65808            <register>
65809                <name>CH10_TOP</name>
65810                <addressOffset>0x000000d8</addressOffset>
65811                <description>Counter wrap value</description>
65812                <resetValue>0x0000ffff</resetValue>
65813                <fields>
65814                    <field>
65815                        <name>CH10_TOP</name>
65816                        <bitRange>[15:0]</bitRange>
65817                        <access>read-write</access>
65818                    </field>
65819                </fields>
65820            </register>
65821            <register>
65822                <name>CH11_CSR</name>
65823                <addressOffset>0x000000dc</addressOffset>
65824                <description>Control and status register</description>
65825                <resetValue>0x00000000</resetValue>
65826                <fields>
65827                    <field>
65828                        <name>PH_ADV</name>
65829                        <description>Advance the phase of the counter by 1 count, while it is running.
65830                            Self-clearing. Write a 1, and poll until low. Counter must be running
65831                            at less than full speed (div_int + div_frac / 16 &gt; 1)</description>
65832                        <bitRange>[7:7]</bitRange>
65833                        <access>write-only</access>
65834                    </field>
65835                    <field>
65836                        <name>PH_RET</name>
65837                        <description>Retard the phase of the counter by 1 count, while it is running.
65838                            Self-clearing. Write a 1, and poll until low. Counter must be running.</description>
65839                        <bitRange>[6:6]</bitRange>
65840                        <access>write-only</access>
65841                    </field>
65842                    <field>
65843                        <name>DIVMODE</name>
65844                        <bitRange>[5:4]</bitRange>
65845                        <access>read-write</access>
65846                        <enumeratedValues>
65847                            <enumeratedValue>
65848                                <name>div</name>
65849                                <value>0</value>
65850                                <description>Free-running counting at rate dictated by fractional divider</description>
65851                            </enumeratedValue>
65852                            <enumeratedValue>
65853                                <name>level</name>
65854                                <value>1</value>
65855                                <description>Fractional divider operation is gated by the PWM B pin.</description>
65856                            </enumeratedValue>
65857                            <enumeratedValue>
65858                                <name>rise</name>
65859                                <value>2</value>
65860                                <description>Counter advances with each rising edge of the PWM B pin.</description>
65861                            </enumeratedValue>
65862                            <enumeratedValue>
65863                                <name>fall</name>
65864                                <value>3</value>
65865                                <description>Counter advances with each falling edge of the PWM B pin.</description>
65866                            </enumeratedValue>
65867                        </enumeratedValues>
65868                    </field>
65869                    <field>
65870                        <name>B_INV</name>
65871                        <description>Invert output B</description>
65872                        <bitRange>[3:3]</bitRange>
65873                        <access>read-write</access>
65874                    </field>
65875                    <field>
65876                        <name>A_INV</name>
65877                        <description>Invert output A</description>
65878                        <bitRange>[2:2]</bitRange>
65879                        <access>read-write</access>
65880                    </field>
65881                    <field>
65882                        <name>PH_CORRECT</name>
65883                        <description>1: Enable phase-correct modulation. 0: Trailing-edge</description>
65884                        <bitRange>[1:1]</bitRange>
65885                        <access>read-write</access>
65886                    </field>
65887                    <field>
65888                        <name>EN</name>
65889                        <description>Enable the PWM channel.</description>
65890                        <bitRange>[0:0]</bitRange>
65891                        <access>read-write</access>
65892                    </field>
65893                </fields>
65894            </register>
65895            <register>
65896                <name>CH11_DIV</name>
65897                <addressOffset>0x000000e0</addressOffset>
65898                <description>INT and FRAC form a fixed-point fractional number.
65899                    Counting rate is system clock frequency divided by this number.
65900                    Fractional division uses simple 1st-order sigma-delta.</description>
65901                <resetValue>0x00000010</resetValue>
65902                <fields>
65903                    <field>
65904                        <name>INT</name>
65905                        <bitRange>[11:4]</bitRange>
65906                        <access>read-write</access>
65907                    </field>
65908                    <field>
65909                        <name>FRAC</name>
65910                        <bitRange>[3:0]</bitRange>
65911                        <access>read-write</access>
65912                    </field>
65913                </fields>
65914            </register>
65915            <register>
65916                <name>CH11_CTR</name>
65917                <addressOffset>0x000000e4</addressOffset>
65918                <description>Direct access to the PWM counter</description>
65919                <resetValue>0x00000000</resetValue>
65920                <fields>
65921                    <field>
65922                        <name>CH11_CTR</name>
65923                        <bitRange>[15:0]</bitRange>
65924                        <access>read-write</access>
65925                    </field>
65926                </fields>
65927            </register>
65928            <register>
65929                <name>CH11_CC</name>
65930                <addressOffset>0x000000e8</addressOffset>
65931                <description>Counter compare values</description>
65932                <resetValue>0x00000000</resetValue>
65933                <fields>
65934                    <field>
65935                        <name>B</name>
65936                        <bitRange>[31:16]</bitRange>
65937                        <access>read-write</access>
65938                    </field>
65939                    <field>
65940                        <name>A</name>
65941                        <bitRange>[15:0]</bitRange>
65942                        <access>read-write</access>
65943                    </field>
65944                </fields>
65945            </register>
65946            <register>
65947                <name>CH11_TOP</name>
65948                <addressOffset>0x000000ec</addressOffset>
65949                <description>Counter wrap value</description>
65950                <resetValue>0x0000ffff</resetValue>
65951                <fields>
65952                    <field>
65953                        <name>CH11_TOP</name>
65954                        <bitRange>[15:0]</bitRange>
65955                        <access>read-write</access>
65956                    </field>
65957                </fields>
65958            </register>
65959            <register>
65960                <name>EN</name>
65961                <addressOffset>0x000000f0</addressOffset>
65962                <description>This register aliases the CSR_EN bits for all channels.
65963                    Writing to this register allows multiple channels to be enabled
65964                    or disabled simultaneously, so they can run in perfect sync.
65965                    For each channel, there is only one physical EN register bit,
65966                    which can be accessed through here or CHx_CSR.</description>
65967                <resetValue>0x00000000</resetValue>
65968                <fields>
65969                    <field>
65970                        <name>CH11</name>
65971                        <bitRange>[11:11]</bitRange>
65972                        <access>read-write</access>
65973                    </field>
65974                    <field>
65975                        <name>CH10</name>
65976                        <bitRange>[10:10]</bitRange>
65977                        <access>read-write</access>
65978                    </field>
65979                    <field>
65980                        <name>CH9</name>
65981                        <bitRange>[9:9]</bitRange>
65982                        <access>read-write</access>
65983                    </field>
65984                    <field>
65985                        <name>CH8</name>
65986                        <bitRange>[8:8]</bitRange>
65987                        <access>read-write</access>
65988                    </field>
65989                    <field>
65990                        <name>CH7</name>
65991                        <bitRange>[7:7]</bitRange>
65992                        <access>read-write</access>
65993                    </field>
65994                    <field>
65995                        <name>CH6</name>
65996                        <bitRange>[6:6]</bitRange>
65997                        <access>read-write</access>
65998                    </field>
65999                    <field>
66000                        <name>CH5</name>
66001                        <bitRange>[5:5]</bitRange>
66002                        <access>read-write</access>
66003                    </field>
66004                    <field>
66005                        <name>CH4</name>
66006                        <bitRange>[4:4]</bitRange>
66007                        <access>read-write</access>
66008                    </field>
66009                    <field>
66010                        <name>CH3</name>
66011                        <bitRange>[3:3]</bitRange>
66012                        <access>read-write</access>
66013                    </field>
66014                    <field>
66015                        <name>CH2</name>
66016                        <bitRange>[2:2]</bitRange>
66017                        <access>read-write</access>
66018                    </field>
66019                    <field>
66020                        <name>CH1</name>
66021                        <bitRange>[1:1]</bitRange>
66022                        <access>read-write</access>
66023                    </field>
66024                    <field>
66025                        <name>CH0</name>
66026                        <bitRange>[0:0]</bitRange>
66027                        <access>read-write</access>
66028                    </field>
66029                </fields>
66030            </register>
66031            <register>
66032                <name>INTR</name>
66033                <addressOffset>0x000000f4</addressOffset>
66034                <description>Raw Interrupts</description>
66035                <resetValue>0x00000000</resetValue>
66036                <fields>
66037                    <field>
66038                        <name>CH11</name>
66039                        <bitRange>[11:11]</bitRange>
66040                        <access>read-write</access>
66041                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66042                    </field>
66043                    <field>
66044                        <name>CH10</name>
66045                        <bitRange>[10:10]</bitRange>
66046                        <access>read-write</access>
66047                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66048                    </field>
66049                    <field>
66050                        <name>CH9</name>
66051                        <bitRange>[9:9]</bitRange>
66052                        <access>read-write</access>
66053                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66054                    </field>
66055                    <field>
66056                        <name>CH8</name>
66057                        <bitRange>[8:8]</bitRange>
66058                        <access>read-write</access>
66059                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66060                    </field>
66061                    <field>
66062                        <name>CH7</name>
66063                        <bitRange>[7:7]</bitRange>
66064                        <access>read-write</access>
66065                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66066                    </field>
66067                    <field>
66068                        <name>CH6</name>
66069                        <bitRange>[6:6]</bitRange>
66070                        <access>read-write</access>
66071                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66072                    </field>
66073                    <field>
66074                        <name>CH5</name>
66075                        <bitRange>[5:5]</bitRange>
66076                        <access>read-write</access>
66077                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66078                    </field>
66079                    <field>
66080                        <name>CH4</name>
66081                        <bitRange>[4:4]</bitRange>
66082                        <access>read-write</access>
66083                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66084                    </field>
66085                    <field>
66086                        <name>CH3</name>
66087                        <bitRange>[3:3]</bitRange>
66088                        <access>read-write</access>
66089                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66090                    </field>
66091                    <field>
66092                        <name>CH2</name>
66093                        <bitRange>[2:2]</bitRange>
66094                        <access>read-write</access>
66095                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66096                    </field>
66097                    <field>
66098                        <name>CH1</name>
66099                        <bitRange>[1:1]</bitRange>
66100                        <access>read-write</access>
66101                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66102                    </field>
66103                    <field>
66104                        <name>CH0</name>
66105                        <bitRange>[0:0]</bitRange>
66106                        <access>read-write</access>
66107                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66108                    </field>
66109                </fields>
66110            </register>
66111            <register>
66112                <name>IRQ0_INTE</name>
66113                <addressOffset>0x000000f8</addressOffset>
66114                <description>Interrupt Enable for irq0</description>
66115                <resetValue>0x00000000</resetValue>
66116                <fields>
66117                    <field>
66118                        <name>CH11</name>
66119                        <bitRange>[11:11]</bitRange>
66120                        <access>read-write</access>
66121                    </field>
66122                    <field>
66123                        <name>CH10</name>
66124                        <bitRange>[10:10]</bitRange>
66125                        <access>read-write</access>
66126                    </field>
66127                    <field>
66128                        <name>CH9</name>
66129                        <bitRange>[9:9]</bitRange>
66130                        <access>read-write</access>
66131                    </field>
66132                    <field>
66133                        <name>CH8</name>
66134                        <bitRange>[8:8]</bitRange>
66135                        <access>read-write</access>
66136                    </field>
66137                    <field>
66138                        <name>CH7</name>
66139                        <bitRange>[7:7]</bitRange>
66140                        <access>read-write</access>
66141                    </field>
66142                    <field>
66143                        <name>CH6</name>
66144                        <bitRange>[6:6]</bitRange>
66145                        <access>read-write</access>
66146                    </field>
66147                    <field>
66148                        <name>CH5</name>
66149                        <bitRange>[5:5]</bitRange>
66150                        <access>read-write</access>
66151                    </field>
66152                    <field>
66153                        <name>CH4</name>
66154                        <bitRange>[4:4]</bitRange>
66155                        <access>read-write</access>
66156                    </field>
66157                    <field>
66158                        <name>CH3</name>
66159                        <bitRange>[3:3]</bitRange>
66160                        <access>read-write</access>
66161                    </field>
66162                    <field>
66163                        <name>CH2</name>
66164                        <bitRange>[2:2]</bitRange>
66165                        <access>read-write</access>
66166                    </field>
66167                    <field>
66168                        <name>CH1</name>
66169                        <bitRange>[1:1]</bitRange>
66170                        <access>read-write</access>
66171                    </field>
66172                    <field>
66173                        <name>CH0</name>
66174                        <bitRange>[0:0]</bitRange>
66175                        <access>read-write</access>
66176                    </field>
66177                </fields>
66178            </register>
66179            <register>
66180                <name>IRQ0_INTF</name>
66181                <addressOffset>0x000000fc</addressOffset>
66182                <description>Interrupt Force for irq0</description>
66183                <resetValue>0x00000000</resetValue>
66184                <fields>
66185                    <field>
66186                        <name>CH11</name>
66187                        <bitRange>[11:11]</bitRange>
66188                        <access>read-write</access>
66189                    </field>
66190                    <field>
66191                        <name>CH10</name>
66192                        <bitRange>[10:10]</bitRange>
66193                        <access>read-write</access>
66194                    </field>
66195                    <field>
66196                        <name>CH9</name>
66197                        <bitRange>[9:9]</bitRange>
66198                        <access>read-write</access>
66199                    </field>
66200                    <field>
66201                        <name>CH8</name>
66202                        <bitRange>[8:8]</bitRange>
66203                        <access>read-write</access>
66204                    </field>
66205                    <field>
66206                        <name>CH7</name>
66207                        <bitRange>[7:7]</bitRange>
66208                        <access>read-write</access>
66209                    </field>
66210                    <field>
66211                        <name>CH6</name>
66212                        <bitRange>[6:6]</bitRange>
66213                        <access>read-write</access>
66214                    </field>
66215                    <field>
66216                        <name>CH5</name>
66217                        <bitRange>[5:5]</bitRange>
66218                        <access>read-write</access>
66219                    </field>
66220                    <field>
66221                        <name>CH4</name>
66222                        <bitRange>[4:4]</bitRange>
66223                        <access>read-write</access>
66224                    </field>
66225                    <field>
66226                        <name>CH3</name>
66227                        <bitRange>[3:3]</bitRange>
66228                        <access>read-write</access>
66229                    </field>
66230                    <field>
66231                        <name>CH2</name>
66232                        <bitRange>[2:2]</bitRange>
66233                        <access>read-write</access>
66234                    </field>
66235                    <field>
66236                        <name>CH1</name>
66237                        <bitRange>[1:1]</bitRange>
66238                        <access>read-write</access>
66239                    </field>
66240                    <field>
66241                        <name>CH0</name>
66242                        <bitRange>[0:0]</bitRange>
66243                        <access>read-write</access>
66244                    </field>
66245                </fields>
66246            </register>
66247            <register>
66248                <name>IRQ0_INTS</name>
66249                <addressOffset>0x00000100</addressOffset>
66250                <description>Interrupt status after masking &amp; forcing for irq0</description>
66251                <resetValue>0x00000000</resetValue>
66252                <fields>
66253                    <field>
66254                        <name>CH11</name>
66255                        <bitRange>[11:11]</bitRange>
66256                        <access>read-only</access>
66257                    </field>
66258                    <field>
66259                        <name>CH10</name>
66260                        <bitRange>[10:10]</bitRange>
66261                        <access>read-only</access>
66262                    </field>
66263                    <field>
66264                        <name>CH9</name>
66265                        <bitRange>[9:9]</bitRange>
66266                        <access>read-only</access>
66267                    </field>
66268                    <field>
66269                        <name>CH8</name>
66270                        <bitRange>[8:8]</bitRange>
66271                        <access>read-only</access>
66272                    </field>
66273                    <field>
66274                        <name>CH7</name>
66275                        <bitRange>[7:7]</bitRange>
66276                        <access>read-only</access>
66277                    </field>
66278                    <field>
66279                        <name>CH6</name>
66280                        <bitRange>[6:6]</bitRange>
66281                        <access>read-only</access>
66282                    </field>
66283                    <field>
66284                        <name>CH5</name>
66285                        <bitRange>[5:5]</bitRange>
66286                        <access>read-only</access>
66287                    </field>
66288                    <field>
66289                        <name>CH4</name>
66290                        <bitRange>[4:4]</bitRange>
66291                        <access>read-only</access>
66292                    </field>
66293                    <field>
66294                        <name>CH3</name>
66295                        <bitRange>[3:3]</bitRange>
66296                        <access>read-only</access>
66297                    </field>
66298                    <field>
66299                        <name>CH2</name>
66300                        <bitRange>[2:2]</bitRange>
66301                        <access>read-only</access>
66302                    </field>
66303                    <field>
66304                        <name>CH1</name>
66305                        <bitRange>[1:1]</bitRange>
66306                        <access>read-only</access>
66307                    </field>
66308                    <field>
66309                        <name>CH0</name>
66310                        <bitRange>[0:0]</bitRange>
66311                        <access>read-only</access>
66312                    </field>
66313                </fields>
66314            </register>
66315            <register>
66316                <name>IRQ1_INTE</name>
66317                <addressOffset>0x00000104</addressOffset>
66318                <description>Interrupt Enable for irq1</description>
66319                <resetValue>0x00000000</resetValue>
66320                <fields>
66321                    <field>
66322                        <name>CH11</name>
66323                        <bitRange>[11:11]</bitRange>
66324                        <access>read-write</access>
66325                    </field>
66326                    <field>
66327                        <name>CH10</name>
66328                        <bitRange>[10:10]</bitRange>
66329                        <access>read-write</access>
66330                    </field>
66331                    <field>
66332                        <name>CH9</name>
66333                        <bitRange>[9:9]</bitRange>
66334                        <access>read-write</access>
66335                    </field>
66336                    <field>
66337                        <name>CH8</name>
66338                        <bitRange>[8:8]</bitRange>
66339                        <access>read-write</access>
66340                    </field>
66341                    <field>
66342                        <name>CH7</name>
66343                        <bitRange>[7:7]</bitRange>
66344                        <access>read-write</access>
66345                    </field>
66346                    <field>
66347                        <name>CH6</name>
66348                        <bitRange>[6:6]</bitRange>
66349                        <access>read-write</access>
66350                    </field>
66351                    <field>
66352                        <name>CH5</name>
66353                        <bitRange>[5:5]</bitRange>
66354                        <access>read-write</access>
66355                    </field>
66356                    <field>
66357                        <name>CH4</name>
66358                        <bitRange>[4:4]</bitRange>
66359                        <access>read-write</access>
66360                    </field>
66361                    <field>
66362                        <name>CH3</name>
66363                        <bitRange>[3:3]</bitRange>
66364                        <access>read-write</access>
66365                    </field>
66366                    <field>
66367                        <name>CH2</name>
66368                        <bitRange>[2:2]</bitRange>
66369                        <access>read-write</access>
66370                    </field>
66371                    <field>
66372                        <name>CH1</name>
66373                        <bitRange>[1:1]</bitRange>
66374                        <access>read-write</access>
66375                    </field>
66376                    <field>
66377                        <name>CH0</name>
66378                        <bitRange>[0:0]</bitRange>
66379                        <access>read-write</access>
66380                    </field>
66381                </fields>
66382            </register>
66383            <register>
66384                <name>IRQ1_INTF</name>
66385                <addressOffset>0x00000108</addressOffset>
66386                <description>Interrupt Force for irq1</description>
66387                <resetValue>0x00000000</resetValue>
66388                <fields>
66389                    <field>
66390                        <name>CH11</name>
66391                        <bitRange>[11:11]</bitRange>
66392                        <access>read-write</access>
66393                    </field>
66394                    <field>
66395                        <name>CH10</name>
66396                        <bitRange>[10:10]</bitRange>
66397                        <access>read-write</access>
66398                    </field>
66399                    <field>
66400                        <name>CH9</name>
66401                        <bitRange>[9:9]</bitRange>
66402                        <access>read-write</access>
66403                    </field>
66404                    <field>
66405                        <name>CH8</name>
66406                        <bitRange>[8:8]</bitRange>
66407                        <access>read-write</access>
66408                    </field>
66409                    <field>
66410                        <name>CH7</name>
66411                        <bitRange>[7:7]</bitRange>
66412                        <access>read-write</access>
66413                    </field>
66414                    <field>
66415                        <name>CH6</name>
66416                        <bitRange>[6:6]</bitRange>
66417                        <access>read-write</access>
66418                    </field>
66419                    <field>
66420                        <name>CH5</name>
66421                        <bitRange>[5:5]</bitRange>
66422                        <access>read-write</access>
66423                    </field>
66424                    <field>
66425                        <name>CH4</name>
66426                        <bitRange>[4:4]</bitRange>
66427                        <access>read-write</access>
66428                    </field>
66429                    <field>
66430                        <name>CH3</name>
66431                        <bitRange>[3:3]</bitRange>
66432                        <access>read-write</access>
66433                    </field>
66434                    <field>
66435                        <name>CH2</name>
66436                        <bitRange>[2:2]</bitRange>
66437                        <access>read-write</access>
66438                    </field>
66439                    <field>
66440                        <name>CH1</name>
66441                        <bitRange>[1:1]</bitRange>
66442                        <access>read-write</access>
66443                    </field>
66444                    <field>
66445                        <name>CH0</name>
66446                        <bitRange>[0:0]</bitRange>
66447                        <access>read-write</access>
66448                    </field>
66449                </fields>
66450            </register>
66451            <register>
66452                <name>IRQ1_INTS</name>
66453                <addressOffset>0x0000010c</addressOffset>
66454                <description>Interrupt status after masking &amp; forcing for irq1</description>
66455                <resetValue>0x00000000</resetValue>
66456                <fields>
66457                    <field>
66458                        <name>CH11</name>
66459                        <bitRange>[11:11]</bitRange>
66460                        <access>read-only</access>
66461                    </field>
66462                    <field>
66463                        <name>CH10</name>
66464                        <bitRange>[10:10]</bitRange>
66465                        <access>read-only</access>
66466                    </field>
66467                    <field>
66468                        <name>CH9</name>
66469                        <bitRange>[9:9]</bitRange>
66470                        <access>read-only</access>
66471                    </field>
66472                    <field>
66473                        <name>CH8</name>
66474                        <bitRange>[8:8]</bitRange>
66475                        <access>read-only</access>
66476                    </field>
66477                    <field>
66478                        <name>CH7</name>
66479                        <bitRange>[7:7]</bitRange>
66480                        <access>read-only</access>
66481                    </field>
66482                    <field>
66483                        <name>CH6</name>
66484                        <bitRange>[6:6]</bitRange>
66485                        <access>read-only</access>
66486                    </field>
66487                    <field>
66488                        <name>CH5</name>
66489                        <bitRange>[5:5]</bitRange>
66490                        <access>read-only</access>
66491                    </field>
66492                    <field>
66493                        <name>CH4</name>
66494                        <bitRange>[4:4]</bitRange>
66495                        <access>read-only</access>
66496                    </field>
66497                    <field>
66498                        <name>CH3</name>
66499                        <bitRange>[3:3]</bitRange>
66500                        <access>read-only</access>
66501                    </field>
66502                    <field>
66503                        <name>CH2</name>
66504                        <bitRange>[2:2]</bitRange>
66505                        <access>read-only</access>
66506                    </field>
66507                    <field>
66508                        <name>CH1</name>
66509                        <bitRange>[1:1]</bitRange>
66510                        <access>read-only</access>
66511                    </field>
66512                    <field>
66513                        <name>CH0</name>
66514                        <bitRange>[0:0]</bitRange>
66515                        <access>read-only</access>
66516                    </field>
66517                </fields>
66518            </register>
66519        </registers>
66520    </peripheral>
66521    <peripheral>
66522        <name>ADC</name>
66523        <description>Control and data interface to SAR ADC</description>
66524        <baseAddress>0x400a0000</baseAddress>
66525        <addressBlock>
66526            <offset>0</offset>
66527            <size>36</size>
66528            <usage>registers</usage>
66529        </addressBlock>
66530        <interrupt>
66531            <name>ADC_IRQ_FIFO</name>
66532            <value>35</value>
66533        </interrupt>
66534        <registers>
66535            <register>
66536                <name>CS</name>
66537                <addressOffset>0x00000000</addressOffset>
66538                <description>ADC Control and Status</description>
66539                <resetValue>0x00000000</resetValue>
66540                <fields>
66541                    <field>
66542                        <name>RROBIN</name>
66543                        <description>Round-robin sampling. 1 bit per channel. Set all bits to 0 to disable.
66544                            Otherwise, the ADC will cycle through each enabled channel in a round-robin fashion.
66545                            The first channel to be sampled will be the one currently indicated by AINSEL.
66546                            AINSEL will be updated after each conversion with the newly-selected channel.</description>
66547                        <bitRange>[24:16]</bitRange>
66548                        <access>read-write</access>
66549                    </field>
66550                    <field>
66551                        <name>AINSEL</name>
66552                        <description>Select analog mux input. Updated automatically in round-robin mode.
66553                            This is corrected for the package option so only ADC channels which are bonded are available, and in the correct order</description>
66554                        <bitRange>[15:12]</bitRange>
66555                        <access>read-write</access>
66556                    </field>
66557                    <field>
66558                        <name>ERR_STICKY</name>
66559                        <description>Some past ADC conversion encountered an error. Write 1 to clear.</description>
66560                        <bitRange>[10:10]</bitRange>
66561                        <access>read-write</access>
66562                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66563                    </field>
66564                    <field>
66565                        <name>ERR</name>
66566                        <description>The most recent ADC conversion encountered an error; result is undefined or noisy.</description>
66567                        <bitRange>[9:9]</bitRange>
66568                        <access>read-only</access>
66569                    </field>
66570                    <field>
66571                        <name>READY</name>
66572                        <description>1 if the ADC is ready to start a new conversion. Implies any previous conversion has completed.
66573                            0 whilst conversion in progress.</description>
66574                        <bitRange>[8:8]</bitRange>
66575                        <access>read-only</access>
66576                    </field>
66577                    <field>
66578                        <name>START_MANY</name>
66579                        <description>Continuously perform conversions whilst this bit is 1. A new conversion will start immediately after the previous finishes.</description>
66580                        <bitRange>[3:3]</bitRange>
66581                        <access>read-write</access>
66582                    </field>
66583                    <field>
66584                        <name>START_ONCE</name>
66585                        <description>Start a single conversion. Self-clearing. Ignored if start_many is asserted.</description>
66586                        <bitRange>[2:2]</bitRange>
66587                        <access>write-only</access>
66588                    </field>
66589                    <field>
66590                        <name>TS_EN</name>
66591                        <description>Power on temperature sensor. 1 - enabled. 0 - disabled.</description>
66592                        <bitRange>[1:1]</bitRange>
66593                        <access>read-write</access>
66594                    </field>
66595                    <field>
66596                        <name>EN</name>
66597                        <description>Power on ADC and enable its clock.
66598                            1 - enabled. 0 - disabled.</description>
66599                        <bitRange>[0:0]</bitRange>
66600                        <access>read-write</access>
66601                    </field>
66602                </fields>
66603            </register>
66604            <register>
66605                <name>RESULT</name>
66606                <addressOffset>0x00000004</addressOffset>
66607                <description>Result of most recent ADC conversion</description>
66608                <resetValue>0x00000000</resetValue>
66609                <fields>
66610                    <field>
66611                        <name>RESULT</name>
66612                        <bitRange>[11:0]</bitRange>
66613                        <access>read-only</access>
66614                    </field>
66615                </fields>
66616            </register>
66617            <register>
66618                <name>FCS</name>
66619                <addressOffset>0x00000008</addressOffset>
66620                <description>FIFO control and status</description>
66621                <resetValue>0x00000000</resetValue>
66622                <fields>
66623                    <field>
66624                        <name>THRESH</name>
66625                        <description>DREQ/IRQ asserted when level &gt;= threshold</description>
66626                        <bitRange>[27:24]</bitRange>
66627                        <access>read-write</access>
66628                    </field>
66629                    <field>
66630                        <name>LEVEL</name>
66631                        <description>The number of conversion results currently waiting in the FIFO</description>
66632                        <bitRange>[19:16]</bitRange>
66633                        <access>read-only</access>
66634                    </field>
66635                    <field>
66636                        <name>OVER</name>
66637                        <description>1 if the FIFO has been overflowed. Write 1 to clear.</description>
66638                        <bitRange>[11:11]</bitRange>
66639                        <access>read-write</access>
66640                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66641                    </field>
66642                    <field>
66643                        <name>UNDER</name>
66644                        <description>1 if the FIFO has been underflowed. Write 1 to clear.</description>
66645                        <bitRange>[10:10]</bitRange>
66646                        <access>read-write</access>
66647                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
66648                    </field>
66649                    <field>
66650                        <name>FULL</name>
66651                        <bitRange>[9:9]</bitRange>
66652                        <access>read-only</access>
66653                    </field>
66654                    <field>
66655                        <name>EMPTY</name>
66656                        <bitRange>[8:8]</bitRange>
66657                        <access>read-only</access>
66658                    </field>
66659                    <field>
66660                        <name>DREQ_EN</name>
66661                        <description>If 1: assert DMA requests when FIFO contains data</description>
66662                        <bitRange>[3:3]</bitRange>
66663                        <access>read-write</access>
66664                    </field>
66665                    <field>
66666                        <name>ERR</name>
66667                        <description>If 1: conversion error bit appears in the FIFO alongside the result</description>
66668                        <bitRange>[2:2]</bitRange>
66669                        <access>read-write</access>
66670                    </field>
66671                    <field>
66672                        <name>SHIFT</name>
66673                        <description>If 1: FIFO results are right-shifted to be one byte in size. Enables DMA to byte buffers.</description>
66674                        <bitRange>[1:1]</bitRange>
66675                        <access>read-write</access>
66676                    </field>
66677                    <field>
66678                        <name>EN</name>
66679                        <description>If 1: write result to the FIFO after each conversion.</description>
66680                        <bitRange>[0:0]</bitRange>
66681                        <access>read-write</access>
66682                    </field>
66683                </fields>
66684            </register>
66685            <register>
66686                <name>FIFO</name>
66687                <addressOffset>0x0000000c</addressOffset>
66688                <description>Conversion result FIFO</description>
66689                <resetValue>0x00000000</resetValue>
66690                <fields>
66691                    <field>
66692                        <name>ERR</name>
66693                        <description>1 if this particular sample experienced a conversion error. Remains in the same location if the sample is shifted.</description>
66694                        <bitRange>[15:15]</bitRange>
66695                        <access>read-only</access>
66696                        <readAction>modify</readAction>
66697                    </field>
66698                    <field>
66699                        <name>VAL</name>
66700                        <bitRange>[11:0]</bitRange>
66701                        <access>read-only</access>
66702                        <readAction>modify</readAction>
66703                    </field>
66704                </fields>
66705            </register>
66706            <register>
66707                <name>DIV</name>
66708                <addressOffset>0x00000010</addressOffset>
66709                <description>Clock divider. If non-zero, CS_START_MANY will start conversions
66710                    at regular intervals rather than back-to-back.
66711                    The divider is reset when either of these fields are written.
66712                    Total period is 1 + INT + FRAC / 256</description>
66713                <resetValue>0x00000000</resetValue>
66714                <fields>
66715                    <field>
66716                        <name>INT</name>
66717                        <description>Integer part of clock divisor.</description>
66718                        <bitRange>[23:8]</bitRange>
66719                        <access>read-write</access>
66720                    </field>
66721                    <field>
66722                        <name>FRAC</name>
66723                        <description>Fractional part of clock divisor. First-order delta-sigma.</description>
66724                        <bitRange>[7:0]</bitRange>
66725                        <access>read-write</access>
66726                    </field>
66727                </fields>
66728            </register>
66729            <register>
66730                <name>INTR</name>
66731                <addressOffset>0x00000014</addressOffset>
66732                <description>Raw Interrupts</description>
66733                <resetValue>0x00000000</resetValue>
66734                <fields>
66735                    <field>
66736                        <name>FIFO</name>
66737                        <description>Triggered when the sample FIFO reaches a certain level.
66738                            This level can be programmed via the FCS_THRESH field.</description>
66739                        <bitRange>[0:0]</bitRange>
66740                        <access>read-only</access>
66741                    </field>
66742                </fields>
66743            </register>
66744            <register>
66745                <name>INTE</name>
66746                <addressOffset>0x00000018</addressOffset>
66747                <description>Interrupt Enable</description>
66748                <resetValue>0x00000000</resetValue>
66749                <fields>
66750                    <field>
66751                        <name>FIFO</name>
66752                        <description>Triggered when the sample FIFO reaches a certain level.
66753                            This level can be programmed via the FCS_THRESH field.</description>
66754                        <bitRange>[0:0]</bitRange>
66755                        <access>read-write</access>
66756                    </field>
66757                </fields>
66758            </register>
66759            <register>
66760                <name>INTF</name>
66761                <addressOffset>0x0000001c</addressOffset>
66762                <description>Interrupt Force</description>
66763                <resetValue>0x00000000</resetValue>
66764                <fields>
66765                    <field>
66766                        <name>FIFO</name>
66767                        <description>Triggered when the sample FIFO reaches a certain level.
66768                            This level can be programmed via the FCS_THRESH field.</description>
66769                        <bitRange>[0:0]</bitRange>
66770                        <access>read-write</access>
66771                    </field>
66772                </fields>
66773            </register>
66774            <register>
66775                <name>INTS</name>
66776                <addressOffset>0x00000020</addressOffset>
66777                <description>Interrupt status after masking &amp; forcing</description>
66778                <resetValue>0x00000000</resetValue>
66779                <fields>
66780                    <field>
66781                        <name>FIFO</name>
66782                        <description>Triggered when the sample FIFO reaches a certain level.
66783                            This level can be programmed via the FCS_THRESH field.</description>
66784                        <bitRange>[0:0]</bitRange>
66785                        <access>read-only</access>
66786                    </field>
66787                </fields>
66788            </register>
66789        </registers>
66790    </peripheral>
66791    <peripheral>
66792        <name>I2C0</name>
66793        <description>DW_apb_i2c address block
66794
66795            List of configuration constants for the Synopsys I2C hardware (you may see references to these in I2C register header; these are *fixed* values, set at hardware design time):
66796
66797            IC_ULTRA_FAST_MODE ................ 0x0
66798            IC_UFM_TBUF_CNT_DEFAULT ........... 0x8
66799            IC_UFM_SCL_LOW_COUNT .............. 0x0008
66800            IC_UFM_SCL_HIGH_COUNT ............. 0x0006
66801            IC_TX_TL .......................... 0x0
66802            IC_TX_CMD_BLOCK ................... 0x1
66803            IC_HAS_DMA ........................ 0x1
66804            IC_HAS_ASYNC_FIFO ................. 0x0
66805            IC_SMBUS_ARP ...................... 0x0
66806            IC_FIRST_DATA_BYTE_STATUS ......... 0x1
66807            IC_INTR_IO ........................ 0x1
66808            IC_MASTER_MODE .................... 0x1
66809            IC_DEFAULT_ACK_GENERAL_CALL ....... 0x1
66810            IC_INTR_POL ....................... 0x1
66811            IC_OPTIONAL_SAR ................... 0x0
66812            IC_DEFAULT_TAR_SLAVE_ADDR ......... 0x055
66813            IC_DEFAULT_SLAVE_ADDR ............. 0x055
66814            IC_DEFAULT_HS_SPKLEN .............. 0x1
66815            IC_FS_SCL_HIGH_COUNT .............. 0x0006
66816            IC_HS_SCL_LOW_COUNT ............... 0x0008
66817            IC_DEVICE_ID_VALUE ................ 0x0
66818            IC_10BITADDR_MASTER ............... 0x0
66819            IC_CLK_FREQ_OPTIMIZATION .......... 0x0
66820            IC_DEFAULT_FS_SPKLEN .............. 0x7
66821            IC_ADD_ENCODED_PARAMS ............. 0x0
66822            IC_DEFAULT_SDA_HOLD ............... 0x000001
66823            IC_DEFAULT_SDA_SETUP .............. 0x64
66824            IC_AVOID_RX_FIFO_FLUSH_ON_TX_ABRT . 0x0
66825            IC_CLOCK_PERIOD ................... 100
66826            IC_EMPTYFIFO_HOLD_MASTER_EN ....... 1
66827            IC_RESTART_EN ..................... 0x1
66828            IC_TX_CMD_BLOCK_DEFAULT ........... 0x0
66829            IC_BUS_CLEAR_FEATURE .............. 0x0
66830            IC_CAP_LOADING .................... 100
66831            IC_FS_SCL_LOW_COUNT ............... 0x000d
66832            APB_DATA_WIDTH .................... 32
66833            IC_SDA_STUCK_TIMEOUT_DEFAULT ...... 0xffffffff
66834            IC_SLV_DATA_NACK_ONLY ............. 0x1
66835            IC_10BITADDR_SLAVE ................ 0x0
66836            IC_CLK_TYPE ....................... 0x0
66837            IC_SMBUS_UDID_MSB ................. 0x0
66838            IC_SMBUS_SUSPEND_ALERT ............ 0x0
66839            IC_HS_SCL_HIGH_COUNT .............. 0x0006
66840            IC_SLV_RESTART_DET_EN ............. 0x1
66841            IC_SMBUS .......................... 0x0
66842            IC_OPTIONAL_SAR_DEFAULT ........... 0x0
66843            IC_PERSISTANT_SLV_ADDR_DEFAULT .... 0x0
66844            IC_USE_COUNTS ..................... 0x0
66845            IC_RX_BUFFER_DEPTH ................ 16
66846            IC_SCL_STUCK_TIMEOUT_DEFAULT ...... 0xffffffff
66847            IC_RX_FULL_HLD_BUS_EN ............. 0x1
66848            IC_SLAVE_DISABLE .................. 0x1
66849            IC_RX_TL .......................... 0x0
66850            IC_DEVICE_ID ...................... 0x0
66851            IC_HC_COUNT_VALUES ................ 0x0
66852            I2C_DYNAMIC_TAR_UPDATE ............ 0
66853            IC_SMBUS_CLK_LOW_MEXT_DEFAULT ..... 0xffffffff
66854            IC_SMBUS_CLK_LOW_SEXT_DEFAULT ..... 0xffffffff
66855            IC_HS_MASTER_CODE ................. 0x1
66856            IC_SMBUS_RST_IDLE_CNT_DEFAULT ..... 0xffff
66857            IC_SMBUS_UDID_LSB_DEFAULT ......... 0xffffffff
66858            IC_SS_SCL_HIGH_COUNT .............. 0x0028
66859            IC_SS_SCL_LOW_COUNT ............... 0x002f
66860            IC_MAX_SPEED_MODE ................. 0x2
66861            IC_STAT_FOR_CLK_STRETCH ........... 0x0
66862            IC_STOP_DET_IF_MASTER_ACTIVE ...... 0x0
66863            IC_DEFAULT_UFM_SPKLEN ............. 0x1
66864            IC_TX_BUFFER_DEPTH ................ 16</description>
66865        <baseAddress>0x40090000</baseAddress>
66866        <addressBlock>
66867            <offset>0</offset>
66868            <size>256</size>
66869            <usage>registers</usage>
66870        </addressBlock>
66871        <interrupt>
66872            <name>I2C0_IRQ</name>
66873            <value>36</value>
66874        </interrupt>
66875        <registers>
66876            <register>
66877                <name>IC_CON</name>
66878                <addressOffset>0x00000000</addressOffset>
66879                <description>I2C Control Register. This register can be written only when the DW_apb_i2c is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
66880
66881                    Read/Write Access: - bit 10 is read only. - bit 11 is read only - bit 16 is read only - bit 17 is read only - bits 18 and 19 are read only.</description>
66882                <resetValue>0x00000065</resetValue>
66883                <fields>
66884                    <field>
66885                        <name>STOP_DET_IF_MASTER_ACTIVE</name>
66886                        <description>Master issues the STOP_DET interrupt irrespective of whether master is active or not</description>
66887                        <bitRange>[10:10]</bitRange>
66888                        <access>read-only</access>
66889                    </field>
66890                    <field>
66891                        <name>RX_FIFO_FULL_HLD_CTRL</name>
66892                        <description>This bit controls whether DW_apb_i2c should hold the bus when the Rx FIFO is physically full to its RX_BUFFER_DEPTH, as described in the IC_RX_FULL_HLD_BUS_EN parameter.
66893
66894                            Reset value: 0x0.</description>
66895                        <bitRange>[9:9]</bitRange>
66896                        <access>read-write</access>
66897                        <enumeratedValues>
66898                            <enumeratedValue>
66899                                <name>DISABLED</name>
66900                                <value>0</value>
66901                                <description>Overflow when RX_FIFO is full</description>
66902                            </enumeratedValue>
66903                            <enumeratedValue>
66904                                <name>ENABLED</name>
66905                                <value>1</value>
66906                                <description>Hold bus when RX_FIFO is full</description>
66907                            </enumeratedValue>
66908                        </enumeratedValues>
66909                    </field>
66910                    <field>
66911                        <name>TX_EMPTY_CTRL</name>
66912                        <description>This bit controls the generation of the TX_EMPTY interrupt, as described in the IC_RAW_INTR_STAT register.
66913
66914                            Reset value: 0x0.</description>
66915                        <bitRange>[8:8]</bitRange>
66916                        <access>read-write</access>
66917                        <enumeratedValues>
66918                            <enumeratedValue>
66919                                <name>DISABLED</name>
66920                                <value>0</value>
66921                                <description>Default behaviour of TX_EMPTY interrupt</description>
66922                            </enumeratedValue>
66923                            <enumeratedValue>
66924                                <name>ENABLED</name>
66925                                <value>1</value>
66926                                <description>Controlled generation of TX_EMPTY interrupt</description>
66927                            </enumeratedValue>
66928                        </enumeratedValues>
66929                    </field>
66930                    <field>
66931                        <name>STOP_DET_IFADDRESSED</name>
66932                        <description>In slave mode: - 1&#39;b1:  issues the STOP_DET interrupt only when it is addressed. - 1&#39;b0:  issues the STOP_DET irrespective of whether it&#39;s addressed or not. Reset value: 0x0
66933
66934                            NOTE: During a general call address, this slave does not issue the STOP_DET interrupt if STOP_DET_IF_ADDRESSED = 1&#39;b1, even if the slave responds to the general call address by generating ACK. The STOP_DET interrupt is generated only when the transmitted address matches the slave address (SAR).</description>
66935                        <bitRange>[7:7]</bitRange>
66936                        <access>read-write</access>
66937                        <enumeratedValues>
66938                            <enumeratedValue>
66939                                <name>DISABLED</name>
66940                                <value>0</value>
66941                                <description>slave issues STOP_DET intr always</description>
66942                            </enumeratedValue>
66943                            <enumeratedValue>
66944                                <name>ENABLED</name>
66945                                <value>1</value>
66946                                <description>slave issues STOP_DET intr only if addressed</description>
66947                            </enumeratedValue>
66948                        </enumeratedValues>
66949                    </field>
66950                    <field>
66951                        <name>IC_SLAVE_DISABLE</name>
66952                        <description>This bit controls whether I2C has its slave disabled, which means once the presetn signal is applied, then this bit is set and the slave is disabled.
66953
66954                            If this bit is set (slave is disabled), DW_apb_i2c functions only as a master and does not perform any action that requires a slave.
66955
66956                            NOTE: Software should ensure that if this bit is written with 0, then bit 0 should also be written with a 0.</description>
66957                        <bitRange>[6:6]</bitRange>
66958                        <access>read-write</access>
66959                        <enumeratedValues>
66960                            <enumeratedValue>
66961                                <name>SLAVE_ENABLED</name>
66962                                <value>0</value>
66963                                <description>Slave mode is enabled</description>
66964                            </enumeratedValue>
66965                            <enumeratedValue>
66966                                <name>SLAVE_DISABLED</name>
66967                                <value>1</value>
66968                                <description>Slave mode is disabled</description>
66969                            </enumeratedValue>
66970                        </enumeratedValues>
66971                    </field>
66972                    <field>
66973                        <name>IC_RESTART_EN</name>
66974                        <description>Determines whether RESTART conditions may be sent when acting as a master. Some older slaves do not support handling RESTART conditions; however, RESTART conditions are used in several DW_apb_i2c operations. When RESTART is disabled, the master is prohibited from performing the following functions: - Sending a START BYTE - Performing any high-speed mode operation - High-speed mode operation - Performing direction changes in combined format mode - Performing a read operation with a 10-bit address By replacing RESTART condition followed by a STOP and a subsequent START condition, split operations are broken down into multiple DW_apb_i2c transfers. If the above operations are performed, it will result in setting bit 6 (TX_ABRT) of the IC_RAW_INTR_STAT register.
66975
66976                            Reset value: ENABLED</description>
66977                        <bitRange>[5:5]</bitRange>
66978                        <access>read-write</access>
66979                        <enumeratedValues>
66980                            <enumeratedValue>
66981                                <name>DISABLED</name>
66982                                <value>0</value>
66983                                <description>Master restart disabled</description>
66984                            </enumeratedValue>
66985                            <enumeratedValue>
66986                                <name>ENABLED</name>
66987                                <value>1</value>
66988                                <description>Master restart enabled</description>
66989                            </enumeratedValue>
66990                        </enumeratedValues>
66991                    </field>
66992                    <field>
66993                        <name>IC_10BITADDR_MASTER</name>
66994                        <description>Controls whether the DW_apb_i2c starts its transfers in 7- or 10-bit addressing mode when acting as a master. - 0: 7-bit addressing - 1: 10-bit addressing</description>
66995                        <bitRange>[4:4]</bitRange>
66996                        <access>read-write</access>
66997                        <enumeratedValues>
66998                            <enumeratedValue>
66999                                <name>ADDR_7BITS</name>
67000                                <value>0</value>
67001                                <description>Master 7Bit addressing mode</description>
67002                            </enumeratedValue>
67003                            <enumeratedValue>
67004                                <name>ADDR_10BITS</name>
67005                                <value>1</value>
67006                                <description>Master 10Bit addressing mode</description>
67007                            </enumeratedValue>
67008                        </enumeratedValues>
67009                    </field>
67010                    <field>
67011                        <name>IC_10BITADDR_SLAVE</name>
67012                        <description>When acting as a slave, this bit controls whether the DW_apb_i2c responds to 7- or 10-bit addresses. - 0: 7-bit addressing. The DW_apb_i2c ignores transactions that involve 10-bit addressing; for 7-bit addressing, only the lower 7 bits of the IC_SAR register are compared. - 1: 10-bit addressing. The DW_apb_i2c responds to only 10-bit addressing transfers that match the full 10 bits of the IC_SAR register.</description>
67013                        <bitRange>[3:3]</bitRange>
67014                        <access>read-write</access>
67015                        <enumeratedValues>
67016                            <enumeratedValue>
67017                                <name>ADDR_7BITS</name>
67018                                <value>0</value>
67019                                <description>Slave 7Bit addressing</description>
67020                            </enumeratedValue>
67021                            <enumeratedValue>
67022                                <name>ADDR_10BITS</name>
67023                                <value>1</value>
67024                                <description>Slave 10Bit addressing</description>
67025                            </enumeratedValue>
67026                        </enumeratedValues>
67027                    </field>
67028                    <field>
67029                        <name>SPEED</name>
67030                        <description>These bits control at which speed the DW_apb_i2c operates; its setting is relevant only if one is operating the DW_apb_i2c in master mode. Hardware protects against illegal values being programmed by software. These bits must be programmed appropriately for slave mode also, as it is used to capture correct value of spike filter as per the speed mode.
67031
67032                            This register should be programmed only with a value in the range of 1 to IC_MAX_SPEED_MODE; otherwise, hardware updates this register with the value of IC_MAX_SPEED_MODE.
67033
67034                            1: standard mode (100 kbit/s)
67035
67036                            2: fast mode (&lt;=400 kbit/s) or fast mode plus (&lt;=1000Kbit/s)
67037
67038                            3: high speed mode (3.4 Mbit/s)
67039
67040                            Note: This field is not applicable when IC_ULTRA_FAST_MODE=1</description>
67041                        <bitRange>[2:1]</bitRange>
67042                        <access>read-write</access>
67043                        <enumeratedValues>
67044                            <enumeratedValue>
67045                                <name>STANDARD</name>
67046                                <value>1</value>
67047                                <description>Standard Speed mode of operation</description>
67048                            </enumeratedValue>
67049                            <enumeratedValue>
67050                                <name>FAST</name>
67051                                <value>2</value>
67052                                <description>Fast or Fast Plus mode of operation</description>
67053                            </enumeratedValue>
67054                            <enumeratedValue>
67055                                <name>HIGH</name>
67056                                <value>3</value>
67057                                <description>High Speed mode of operation</description>
67058                            </enumeratedValue>
67059                        </enumeratedValues>
67060                    </field>
67061                    <field>
67062                        <name>MASTER_MODE</name>
67063                        <description>This bit controls whether the DW_apb_i2c master is enabled.
67064
67065                            NOTE: Software should ensure that if this bit is written with &#39;1&#39; then bit 6 should also be written with a &#39;1&#39;.</description>
67066                        <bitRange>[0:0]</bitRange>
67067                        <access>read-write</access>
67068                        <enumeratedValues>
67069                            <enumeratedValue>
67070                                <name>DISABLED</name>
67071                                <value>0</value>
67072                                <description>Master mode is disabled</description>
67073                            </enumeratedValue>
67074                            <enumeratedValue>
67075                                <name>ENABLED</name>
67076                                <value>1</value>
67077                                <description>Master mode is enabled</description>
67078                            </enumeratedValue>
67079                        </enumeratedValues>
67080                    </field>
67081                </fields>
67082            </register>
67083            <register>
67084                <name>IC_TAR</name>
67085                <addressOffset>0x00000004</addressOffset>
67086                <description>I2C Target Address Register
67087
67088                    This register is 12 bits wide, and bits 31:12 are reserved. This register can be written to only when IC_ENABLE[0] is set to 0.
67089
67090                    Note: If the software or application is aware that the DW_apb_i2c is not using the TAR address for the pending commands in the Tx FIFO, then it is possible to update the TAR address even while the Tx FIFO has entries (IC_STATUS[2]= 0). - It is not necessary to perform any write to this register if DW_apb_i2c is enabled as an I2C slave only.</description>
67091                <resetValue>0x00000055</resetValue>
67092                <fields>
67093                    <field>
67094                        <name>SPECIAL</name>
67095                        <description>This bit indicates whether software performs a Device-ID or General Call or START BYTE command. - 0: ignore bit 10 GC_OR_START and use IC_TAR normally - 1: perform special I2C command as specified in Device_ID or GC_OR_START bit Reset value: 0x0</description>
67096                        <bitRange>[11:11]</bitRange>
67097                        <access>read-write</access>
67098                        <enumeratedValues>
67099                            <enumeratedValue>
67100                                <name>DISABLED</name>
67101                                <value>0</value>
67102                                <description>Disables programming of GENERAL_CALL or START_BYTE transmission</description>
67103                            </enumeratedValue>
67104                            <enumeratedValue>
67105                                <name>ENABLED</name>
67106                                <value>1</value>
67107                                <description>Enables programming of GENERAL_CALL or START_BYTE transmission</description>
67108                            </enumeratedValue>
67109                        </enumeratedValues>
67110                    </field>
67111                    <field>
67112                        <name>GC_OR_START</name>
67113                        <description>If bit 11 (SPECIAL) is set to 1 and bit 13(Device-ID) is set to 0, then this bit indicates whether a General Call or START byte command is to be performed by the DW_apb_i2c. - 0: General Call Address - after issuing a General Call, only writes may be performed. Attempting to issue a read command results in setting bit 6 (TX_ABRT) of the IC_RAW_INTR_STAT register. The DW_apb_i2c remains in General Call mode until the SPECIAL bit value (bit 11) is cleared. - 1: START BYTE Reset value: 0x0</description>
67114                        <bitRange>[10:10]</bitRange>
67115                        <access>read-write</access>
67116                        <enumeratedValues>
67117                            <enumeratedValue>
67118                                <name>GENERAL_CALL</name>
67119                                <value>0</value>
67120                                <description>GENERAL_CALL byte transmission</description>
67121                            </enumeratedValue>
67122                            <enumeratedValue>
67123                                <name>START_BYTE</name>
67124                                <value>1</value>
67125                                <description>START byte transmission</description>
67126                            </enumeratedValue>
67127                        </enumeratedValues>
67128                    </field>
67129                    <field>
67130                        <name>IC_TAR</name>
67131                        <description>This is the target address for any master transaction. When transmitting a General Call, these bits are ignored. To generate a START BYTE, the CPU needs to write only once into these bits.
67132
67133                            If the IC_TAR and IC_SAR are the same, loopback exists but the FIFOs are shared between master and slave, so full loopback is not feasible. Only one direction loopback mode is supported (simplex), not duplex. A master cannot transmit to itself; it can transmit to only a slave.</description>
67134                        <bitRange>[9:0]</bitRange>
67135                        <access>read-write</access>
67136                    </field>
67137                </fields>
67138            </register>
67139            <register>
67140                <name>IC_SAR</name>
67141                <addressOffset>0x00000008</addressOffset>
67142                <description>I2C Slave Address Register</description>
67143                <resetValue>0x00000055</resetValue>
67144                <fields>
67145                    <field>
67146                        <name>IC_SAR</name>
67147                        <description>The IC_SAR holds the slave address when the I2C is operating as a slave. For 7-bit addressing, only IC_SAR[6:0] is used.
67148
67149                            This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
67150
67151                            Note: The default values cannot be any of the reserved address locations: that is, 0x00 to 0x07, or 0x78 to 0x7f. The correct operation of the device is not guaranteed if you program the IC_SAR or IC_TAR to a reserved value. Refer to &lt;&lt;table_I2C_firstbyte_bit_defs&gt;&gt; for a complete list of these reserved values.</description>
67152                        <bitRange>[9:0]</bitRange>
67153                        <access>read-write</access>
67154                    </field>
67155                </fields>
67156            </register>
67157            <register>
67158                <name>IC_DATA_CMD</name>
67159                <addressOffset>0x00000010</addressOffset>
67160                <description>I2C Rx/Tx Data Buffer and Command Register; this is the register the CPU writes to when filling the TX FIFO and the CPU reads from when retrieving bytes from RX FIFO.
67161
67162                    The size of the register changes as follows:
67163
67164                    Write: - 11 bits when IC_EMPTYFIFO_HOLD_MASTER_EN=1 - 9 bits when IC_EMPTYFIFO_HOLD_MASTER_EN=0 Read: - 12 bits when IC_FIRST_DATA_BYTE_STATUS = 1 - 8 bits when IC_FIRST_DATA_BYTE_STATUS = 0 Note: In order for the DW_apb_i2c to continue acknowledging reads, a read command should be written for every byte that is to be received; otherwise the DW_apb_i2c will stop acknowledging.</description>
67165                <resetValue>0x00000000</resetValue>
67166                <fields>
67167                    <field>
67168                        <name>FIRST_DATA_BYTE</name>
67169                        <description>Indicates the first data byte received after the address phase for receive transfer in Master receiver or Slave receiver mode.
67170
67171                            Reset value : 0x0
67172
67173                            NOTE:  In case of APB_DATA_WIDTH=8,
67174
67175                            1. The user has to perform two APB Reads to IC_DATA_CMD in order to get status on 11 bit.
67176
67177                            2. In order to read the 11 bit, the user has to perform the first data byte read [7:0] (offset 0x10) and then perform the second read [15:8] (offset 0x11) in order to know the status of 11 bit (whether the data received in previous read is a first data byte or not).
67178
67179                            3. The 11th bit is an optional read field, user can ignore 2nd byte read [15:8] (offset 0x11) if not interested in FIRST_DATA_BYTE status.</description>
67180                        <bitRange>[11:11]</bitRange>
67181                        <access>read-only</access>
67182                        <enumeratedValues>
67183                            <enumeratedValue>
67184                                <name>INACTIVE</name>
67185                                <value>0</value>
67186                                <description>Sequential data byte received</description>
67187                            </enumeratedValue>
67188                            <enumeratedValue>
67189                                <name>ACTIVE</name>
67190                                <value>1</value>
67191                                <description>Non sequential data byte received</description>
67192                            </enumeratedValue>
67193                        </enumeratedValues>
67194                    </field>
67195                    <field>
67196                        <name>RESTART</name>
67197                        <description>This bit controls whether a RESTART is issued before the byte is sent or received.
67198
67199                            1 - If IC_RESTART_EN is 1, a RESTART is issued before the data is sent/received (according to the value of CMD), regardless of whether or not the transfer direction is changing from the previous command; if IC_RESTART_EN is 0, a STOP followed by a START is issued instead.
67200
67201                            0 - If IC_RESTART_EN is 1, a RESTART is issued only if the transfer direction is changing from the previous command; if IC_RESTART_EN is 0, a STOP followed by a START is issued instead.
67202
67203                            Reset value: 0x0</description>
67204                        <bitRange>[10:10]</bitRange>
67205                        <access>write-only</access>
67206                        <enumeratedValues>
67207                            <enumeratedValue>
67208                                <name>DISABLE</name>
67209                                <value>0</value>
67210                                <description>Don&#39;t Issue RESTART before this command</description>
67211                            </enumeratedValue>
67212                            <enumeratedValue>
67213                                <name>ENABLE</name>
67214                                <value>1</value>
67215                                <description>Issue RESTART before this command</description>
67216                            </enumeratedValue>
67217                        </enumeratedValues>
67218                    </field>
67219                    <field>
67220                        <name>STOP</name>
67221                        <description>This bit controls whether a STOP is issued after the byte is sent or received.
67222
67223                            - 1 - STOP is issued after this byte, regardless of whether or not the Tx FIFO is empty. If the Tx FIFO is not empty, the master immediately tries to start a new transfer by issuing a START and arbitrating for the bus. - 0 - STOP is not issued after this byte, regardless of whether or not the Tx FIFO is empty. If the Tx FIFO is not empty, the master continues the current transfer by sending/receiving data bytes according to the value of the CMD bit. If the Tx FIFO is empty, the master holds the SCL line low and stalls the bus until a new command is available in the Tx FIFO. Reset value: 0x0</description>
67224                        <bitRange>[9:9]</bitRange>
67225                        <access>write-only</access>
67226                        <enumeratedValues>
67227                            <enumeratedValue>
67228                                <name>DISABLE</name>
67229                                <value>0</value>
67230                                <description>Don&#39;t Issue STOP after this command</description>
67231                            </enumeratedValue>
67232                            <enumeratedValue>
67233                                <name>ENABLE</name>
67234                                <value>1</value>
67235                                <description>Issue STOP after this command</description>
67236                            </enumeratedValue>
67237                        </enumeratedValues>
67238                    </field>
67239                    <field>
67240                        <name>CMD</name>
67241                        <description>This bit controls whether a read or a write is performed. This bit does not control the direction when the DW_apb_i2con acts as a slave. It controls only the direction when it acts as a master.
67242
67243                            When a command is entered in the TX FIFO, this bit distinguishes the write and read commands. In slave-receiver mode, this bit is a &#39;don&#39;t care&#39; because writes to this register are not required. In slave-transmitter mode, a &#39;0&#39; indicates that the data in IC_DATA_CMD is to be transmitted.
67244
67245                            When programming this bit, you should remember the following: attempting to perform a read operation after a General Call command has been sent results in a TX_ABRT interrupt (bit 6 of the IC_RAW_INTR_STAT register), unless bit 11 (SPECIAL) in the IC_TAR register has been cleared. If a &#39;1&#39; is written to this bit after receiving a RD_REQ interrupt, then a TX_ABRT interrupt occurs.
67246
67247                            Reset value: 0x0</description>
67248                        <bitRange>[8:8]</bitRange>
67249                        <access>write-only</access>
67250                        <enumeratedValues>
67251                            <enumeratedValue>
67252                                <name>WRITE</name>
67253                                <value>0</value>
67254                                <description>Master Write Command</description>
67255                            </enumeratedValue>
67256                            <enumeratedValue>
67257                                <name>READ</name>
67258                                <value>1</value>
67259                                <description>Master Read Command</description>
67260                            </enumeratedValue>
67261                        </enumeratedValues>
67262                    </field>
67263                    <field>
67264                        <name>DAT</name>
67265                        <description>This register contains the data to be transmitted or received on the I2C bus. If you are writing to this register and want to perform a read, bits 7:0 (DAT) are ignored by the DW_apb_i2c. However, when you read this register, these bits return the value of data received on the DW_apb_i2c interface.
67266
67267                            Reset value: 0x0</description>
67268                        <bitRange>[7:0]</bitRange>
67269                        <access>read-write</access>
67270                    </field>
67271                </fields>
67272            </register>
67273            <register>
67274                <name>IC_SS_SCL_HCNT</name>
67275                <addressOffset>0x00000014</addressOffset>
67276                <description>Standard Speed I2C Clock SCL High Count Register</description>
67277                <resetValue>0x00000028</resetValue>
67278                <fields>
67279                    <field>
67280                        <name>IC_SS_SCL_HCNT</name>
67281                        <description>This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for standard speed. For more information, refer to &#39;IC_CLK Frequency Configuration&#39;.
67282
67283                            This register can be written only when the I2C interface is disabled which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
67284
67285                            The minimum valid value is 6; hardware prevents values less than this being written, and if attempted results in 6 being set. For designs with APB_DATA_WIDTH = 8, the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed.
67286
67287                            NOTE: This register must not be programmed to a value higher than 65525, because DW_apb_i2c uses a 16-bit counter to flag an I2C bus idle condition when this counter reaches a value of IC_SS_SCL_HCNT + 10.</description>
67288                        <bitRange>[15:0]</bitRange>
67289                        <access>read-write</access>
67290                    </field>
67291                </fields>
67292            </register>
67293            <register>
67294                <name>IC_SS_SCL_LCNT</name>
67295                <addressOffset>0x00000018</addressOffset>
67296                <description>Standard Speed I2C Clock SCL Low Count Register</description>
67297                <resetValue>0x0000002f</resetValue>
67298                <fields>
67299                    <field>
67300                        <name>IC_SS_SCL_LCNT</name>
67301                        <description>This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for standard speed. For more information, refer to &#39;IC_CLK Frequency Configuration&#39;
67302
67303                            This register can be written only when the I2C interface is disabled which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
67304
67305                            The minimum valid value is 8; hardware prevents values less than this being written, and if attempted, results in 8 being set. For designs with APB_DATA_WIDTH = 8, the order of programming is important to ensure the correct operation of DW_apb_i2c. The lower byte must be programmed first, and then the upper byte is programmed.</description>
67306                        <bitRange>[15:0]</bitRange>
67307                        <access>read-write</access>
67308                    </field>
67309                </fields>
67310            </register>
67311            <register>
67312                <name>IC_FS_SCL_HCNT</name>
67313                <addressOffset>0x0000001c</addressOffset>
67314                <description>Fast Mode or Fast Mode Plus I2C Clock SCL High Count Register</description>
67315                <resetValue>0x00000006</resetValue>
67316                <fields>
67317                    <field>
67318                        <name>IC_FS_SCL_HCNT</name>
67319                        <description>This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock high-period count for fast mode or fast mode plus. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to &#39;IC_CLK Frequency Configuration&#39;.
67320
67321                            This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
67322
67323                            The minimum valid value is 6; hardware prevents values less than this being written, and if attempted results in 6 being set. For designs with APB_DATA_WIDTH == 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed.</description>
67324                        <bitRange>[15:0]</bitRange>
67325                        <access>read-write</access>
67326                    </field>
67327                </fields>
67328            </register>
67329            <register>
67330                <name>IC_FS_SCL_LCNT</name>
67331                <addressOffset>0x00000020</addressOffset>
67332                <description>Fast Mode or Fast Mode Plus I2C Clock SCL Low Count Register</description>
67333                <resetValue>0x0000000d</resetValue>
67334                <fields>
67335                    <field>
67336                        <name>IC_FS_SCL_LCNT</name>
67337                        <description>This register must be set before any I2C bus transaction can take place to ensure proper I/O timing. This register sets the SCL clock low period count for fast speed. It is used in high-speed mode to send the Master Code and START BYTE or General CALL. For more information, refer to &#39;IC_CLK Frequency Configuration&#39;.
67338
67339                            This register goes away and becomes read-only returning 0s if IC_MAX_SPEED_MODE = standard.
67340
67341                            This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.
67342
67343                            The minimum valid value is 8; hardware prevents values less than this being written, and if attempted results in 8 being set. For designs with APB_DATA_WIDTH = 8 the order of programming is important to ensure the correct operation of the DW_apb_i2c. The lower byte must be programmed first. Then the upper byte is programmed. If the value is less than 8 then the count value gets changed to 8.</description>
67344                        <bitRange>[15:0]</bitRange>
67345                        <access>read-write</access>
67346                    </field>
67347                </fields>
67348            </register>
67349            <register>
67350                <name>IC_INTR_STAT</name>
67351                <addressOffset>0x0000002c</addressOffset>
67352                <description>I2C Interrupt Status Register
67353
67354                    Each bit in this register has a corresponding mask bit in the IC_INTR_MASK register. These bits are cleared by reading the matching interrupt clear register. The unmasked raw versions of these bits are available in the IC_RAW_INTR_STAT register.</description>
67355                <resetValue>0x00000000</resetValue>
67356                <fields>
67357                    <field>
67358                        <name>R_RESTART_DET</name>
67359                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RESTART_DET bit.
67360
67361                            Reset value: 0x0</description>
67362                        <bitRange>[12:12]</bitRange>
67363                        <access>read-only</access>
67364                        <enumeratedValues>
67365                            <enumeratedValue>
67366                                <name>INACTIVE</name>
67367                                <value>0</value>
67368                                <description>R_RESTART_DET interrupt is inactive</description>
67369                            </enumeratedValue>
67370                            <enumeratedValue>
67371                                <name>ACTIVE</name>
67372                                <value>1</value>
67373                                <description>R_RESTART_DET interrupt is active</description>
67374                            </enumeratedValue>
67375                        </enumeratedValues>
67376                    </field>
67377                    <field>
67378                        <name>R_GEN_CALL</name>
67379                        <description>See IC_RAW_INTR_STAT for a detailed description of R_GEN_CALL bit.
67380
67381                            Reset value: 0x0</description>
67382                        <bitRange>[11:11]</bitRange>
67383                        <access>read-only</access>
67384                        <enumeratedValues>
67385                            <enumeratedValue>
67386                                <name>INACTIVE</name>
67387                                <value>0</value>
67388                                <description>R_GEN_CALL interrupt is inactive</description>
67389                            </enumeratedValue>
67390                            <enumeratedValue>
67391                                <name>ACTIVE</name>
67392                                <value>1</value>
67393                                <description>R_GEN_CALL interrupt is active</description>
67394                            </enumeratedValue>
67395                        </enumeratedValues>
67396                    </field>
67397                    <field>
67398                        <name>R_START_DET</name>
67399                        <description>See IC_RAW_INTR_STAT for a detailed description of R_START_DET bit.
67400
67401                            Reset value: 0x0</description>
67402                        <bitRange>[10:10]</bitRange>
67403                        <access>read-only</access>
67404                        <enumeratedValues>
67405                            <enumeratedValue>
67406                                <name>INACTIVE</name>
67407                                <value>0</value>
67408                                <description>R_START_DET interrupt is inactive</description>
67409                            </enumeratedValue>
67410                            <enumeratedValue>
67411                                <name>ACTIVE</name>
67412                                <value>1</value>
67413                                <description>R_START_DET interrupt is active</description>
67414                            </enumeratedValue>
67415                        </enumeratedValues>
67416                    </field>
67417                    <field>
67418                        <name>R_STOP_DET</name>
67419                        <description>See IC_RAW_INTR_STAT for a detailed description of R_STOP_DET bit.
67420
67421                            Reset value: 0x0</description>
67422                        <bitRange>[9:9]</bitRange>
67423                        <access>read-only</access>
67424                        <enumeratedValues>
67425                            <enumeratedValue>
67426                                <name>INACTIVE</name>
67427                                <value>0</value>
67428                                <description>R_STOP_DET interrupt is inactive</description>
67429                            </enumeratedValue>
67430                            <enumeratedValue>
67431                                <name>ACTIVE</name>
67432                                <value>1</value>
67433                                <description>R_STOP_DET interrupt is active</description>
67434                            </enumeratedValue>
67435                        </enumeratedValues>
67436                    </field>
67437                    <field>
67438                        <name>R_ACTIVITY</name>
67439                        <description>See IC_RAW_INTR_STAT for a detailed description of R_ACTIVITY bit.
67440
67441                            Reset value: 0x0</description>
67442                        <bitRange>[8:8]</bitRange>
67443                        <access>read-only</access>
67444                        <enumeratedValues>
67445                            <enumeratedValue>
67446                                <name>INACTIVE</name>
67447                                <value>0</value>
67448                                <description>R_ACTIVITY interrupt is inactive</description>
67449                            </enumeratedValue>
67450                            <enumeratedValue>
67451                                <name>ACTIVE</name>
67452                                <value>1</value>
67453                                <description>R_ACTIVITY interrupt is active</description>
67454                            </enumeratedValue>
67455                        </enumeratedValues>
67456                    </field>
67457                    <field>
67458                        <name>R_RX_DONE</name>
67459                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RX_DONE bit.
67460
67461                            Reset value: 0x0</description>
67462                        <bitRange>[7:7]</bitRange>
67463                        <access>read-only</access>
67464                        <enumeratedValues>
67465                            <enumeratedValue>
67466                                <name>INACTIVE</name>
67467                                <value>0</value>
67468                                <description>R_RX_DONE interrupt is inactive</description>
67469                            </enumeratedValue>
67470                            <enumeratedValue>
67471                                <name>ACTIVE</name>
67472                                <value>1</value>
67473                                <description>R_RX_DONE interrupt is active</description>
67474                            </enumeratedValue>
67475                        </enumeratedValues>
67476                    </field>
67477                    <field>
67478                        <name>R_TX_ABRT</name>
67479                        <description>See IC_RAW_INTR_STAT for a detailed description of R_TX_ABRT bit.
67480
67481                            Reset value: 0x0</description>
67482                        <bitRange>[6:6]</bitRange>
67483                        <access>read-only</access>
67484                        <enumeratedValues>
67485                            <enumeratedValue>
67486                                <name>INACTIVE</name>
67487                                <value>0</value>
67488                                <description>R_TX_ABRT interrupt is inactive</description>
67489                            </enumeratedValue>
67490                            <enumeratedValue>
67491                                <name>ACTIVE</name>
67492                                <value>1</value>
67493                                <description>R_TX_ABRT interrupt is active</description>
67494                            </enumeratedValue>
67495                        </enumeratedValues>
67496                    </field>
67497                    <field>
67498                        <name>R_RD_REQ</name>
67499                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RD_REQ bit.
67500
67501                            Reset value: 0x0</description>
67502                        <bitRange>[5:5]</bitRange>
67503                        <access>read-only</access>
67504                        <enumeratedValues>
67505                            <enumeratedValue>
67506                                <name>INACTIVE</name>
67507                                <value>0</value>
67508                                <description>R_RD_REQ interrupt is inactive</description>
67509                            </enumeratedValue>
67510                            <enumeratedValue>
67511                                <name>ACTIVE</name>
67512                                <value>1</value>
67513                                <description>R_RD_REQ interrupt is active</description>
67514                            </enumeratedValue>
67515                        </enumeratedValues>
67516                    </field>
67517                    <field>
67518                        <name>R_TX_EMPTY</name>
67519                        <description>See IC_RAW_INTR_STAT for a detailed description of R_TX_EMPTY bit.
67520
67521                            Reset value: 0x0</description>
67522                        <bitRange>[4:4]</bitRange>
67523                        <access>read-only</access>
67524                        <enumeratedValues>
67525                            <enumeratedValue>
67526                                <name>INACTIVE</name>
67527                                <value>0</value>
67528                                <description>R_TX_EMPTY interrupt is inactive</description>
67529                            </enumeratedValue>
67530                            <enumeratedValue>
67531                                <name>ACTIVE</name>
67532                                <value>1</value>
67533                                <description>R_TX_EMPTY interrupt is active</description>
67534                            </enumeratedValue>
67535                        </enumeratedValues>
67536                    </field>
67537                    <field>
67538                        <name>R_TX_OVER</name>
67539                        <description>See IC_RAW_INTR_STAT for a detailed description of R_TX_OVER bit.
67540
67541                            Reset value: 0x0</description>
67542                        <bitRange>[3:3]</bitRange>
67543                        <access>read-only</access>
67544                        <enumeratedValues>
67545                            <enumeratedValue>
67546                                <name>INACTIVE</name>
67547                                <value>0</value>
67548                                <description>R_TX_OVER interrupt is inactive</description>
67549                            </enumeratedValue>
67550                            <enumeratedValue>
67551                                <name>ACTIVE</name>
67552                                <value>1</value>
67553                                <description>R_TX_OVER interrupt is active</description>
67554                            </enumeratedValue>
67555                        </enumeratedValues>
67556                    </field>
67557                    <field>
67558                        <name>R_RX_FULL</name>
67559                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RX_FULL bit.
67560
67561                            Reset value: 0x0</description>
67562                        <bitRange>[2:2]</bitRange>
67563                        <access>read-only</access>
67564                        <enumeratedValues>
67565                            <enumeratedValue>
67566                                <name>INACTIVE</name>
67567                                <value>0</value>
67568                                <description>R_RX_FULL interrupt is inactive</description>
67569                            </enumeratedValue>
67570                            <enumeratedValue>
67571                                <name>ACTIVE</name>
67572                                <value>1</value>
67573                                <description>R_RX_FULL interrupt is active</description>
67574                            </enumeratedValue>
67575                        </enumeratedValues>
67576                    </field>
67577                    <field>
67578                        <name>R_RX_OVER</name>
67579                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RX_OVER bit.
67580
67581                            Reset value: 0x0</description>
67582                        <bitRange>[1:1]</bitRange>
67583                        <access>read-only</access>
67584                        <enumeratedValues>
67585                            <enumeratedValue>
67586                                <name>INACTIVE</name>
67587                                <value>0</value>
67588                                <description>R_RX_OVER interrupt is inactive</description>
67589                            </enumeratedValue>
67590                            <enumeratedValue>
67591                                <name>ACTIVE</name>
67592                                <value>1</value>
67593                                <description>R_RX_OVER interrupt is active</description>
67594                            </enumeratedValue>
67595                        </enumeratedValues>
67596                    </field>
67597                    <field>
67598                        <name>R_RX_UNDER</name>
67599                        <description>See IC_RAW_INTR_STAT for a detailed description of R_RX_UNDER bit.
67600
67601                            Reset value: 0x0</description>
67602                        <bitRange>[0:0]</bitRange>
67603                        <access>read-only</access>
67604                        <enumeratedValues>
67605                            <enumeratedValue>
67606                                <name>INACTIVE</name>
67607                                <value>0</value>
67608                                <description>RX_UNDER interrupt is inactive</description>
67609                            </enumeratedValue>
67610                            <enumeratedValue>
67611                                <name>ACTIVE</name>
67612                                <value>1</value>
67613                                <description>RX_UNDER interrupt is active</description>
67614                            </enumeratedValue>
67615                        </enumeratedValues>
67616                    </field>
67617                </fields>
67618            </register>
67619            <register>
67620                <name>IC_INTR_MASK</name>
67621                <addressOffset>0x00000030</addressOffset>
67622                <description>I2C Interrupt Mask Register.
67623
67624                    These bits mask their corresponding interrupt status bits. This register is active low; a value of 0 masks the interrupt, whereas a value of 1 unmasks the interrupt.</description>
67625                <resetValue>0x000008ff</resetValue>
67626                <fields>
67627                    <field>
67628                        <name>M_RESTART_DET</name>
67629                        <description>This bit masks the R_RESTART_DET interrupt in IC_INTR_STAT register.
67630
67631                            Reset value: 0x0</description>
67632                        <bitRange>[12:12]</bitRange>
67633                        <access>read-write</access>
67634                        <enumeratedValues>
67635                            <enumeratedValue>
67636                                <name>ENABLED</name>
67637                                <value>0</value>
67638                                <description>RESTART_DET interrupt is masked</description>
67639                            </enumeratedValue>
67640                            <enumeratedValue>
67641                                <name>DISABLED</name>
67642                                <value>1</value>
67643                                <description>RESTART_DET interrupt is unmasked</description>
67644                            </enumeratedValue>
67645                        </enumeratedValues>
67646                    </field>
67647                    <field>
67648                        <name>M_GEN_CALL</name>
67649                        <description>This bit masks the R_GEN_CALL interrupt in IC_INTR_STAT register.
67650
67651                            Reset value: 0x1</description>
67652                        <bitRange>[11:11]</bitRange>
67653                        <access>read-write</access>
67654                        <enumeratedValues>
67655                            <enumeratedValue>
67656                                <name>ENABLED</name>
67657                                <value>0</value>
67658                                <description>GEN_CALL interrupt is masked</description>
67659                            </enumeratedValue>
67660                            <enumeratedValue>
67661                                <name>DISABLED</name>
67662                                <value>1</value>
67663                                <description>GEN_CALL interrupt is unmasked</description>
67664                            </enumeratedValue>
67665                        </enumeratedValues>
67666                    </field>
67667                    <field>
67668                        <name>M_START_DET</name>
67669                        <description>This bit masks the R_START_DET interrupt in IC_INTR_STAT register.
67670
67671                            Reset value: 0x0</description>
67672                        <bitRange>[10:10]</bitRange>
67673                        <access>read-write</access>
67674                        <enumeratedValues>
67675                            <enumeratedValue>
67676                                <name>ENABLED</name>
67677                                <value>0</value>
67678                                <description>START_DET interrupt is masked</description>
67679                            </enumeratedValue>
67680                            <enumeratedValue>
67681                                <name>DISABLED</name>
67682                                <value>1</value>
67683                                <description>START_DET interrupt is unmasked</description>
67684                            </enumeratedValue>
67685                        </enumeratedValues>
67686                    </field>
67687                    <field>
67688                        <name>M_STOP_DET</name>
67689                        <description>This bit masks the R_STOP_DET interrupt in IC_INTR_STAT register.
67690
67691                            Reset value: 0x0</description>
67692                        <bitRange>[9:9]</bitRange>
67693                        <access>read-write</access>
67694                        <enumeratedValues>
67695                            <enumeratedValue>
67696                                <name>ENABLED</name>
67697                                <value>0</value>
67698                                <description>STOP_DET interrupt is masked</description>
67699                            </enumeratedValue>
67700                            <enumeratedValue>
67701                                <name>DISABLED</name>
67702                                <value>1</value>
67703                                <description>STOP_DET interrupt is unmasked</description>
67704                            </enumeratedValue>
67705                        </enumeratedValues>
67706                    </field>
67707                    <field>
67708                        <name>M_ACTIVITY</name>
67709                        <description>This bit masks the R_ACTIVITY interrupt in IC_INTR_STAT register.
67710
67711                            Reset value: 0x0</description>
67712                        <bitRange>[8:8]</bitRange>
67713                        <access>read-write</access>
67714                        <enumeratedValues>
67715                            <enumeratedValue>
67716                                <name>ENABLED</name>
67717                                <value>0</value>
67718                                <description>ACTIVITY interrupt is masked</description>
67719                            </enumeratedValue>
67720                            <enumeratedValue>
67721                                <name>DISABLED</name>
67722                                <value>1</value>
67723                                <description>ACTIVITY interrupt is unmasked</description>
67724                            </enumeratedValue>
67725                        </enumeratedValues>
67726                    </field>
67727                    <field>
67728                        <name>M_RX_DONE</name>
67729                        <description>This bit masks the R_RX_DONE interrupt in IC_INTR_STAT register.
67730
67731                            Reset value: 0x1</description>
67732                        <bitRange>[7:7]</bitRange>
67733                        <access>read-write</access>
67734                        <enumeratedValues>
67735                            <enumeratedValue>
67736                                <name>ENABLED</name>
67737                                <value>0</value>
67738                                <description>RX_DONE interrupt is masked</description>
67739                            </enumeratedValue>
67740                            <enumeratedValue>
67741                                <name>DISABLED</name>
67742                                <value>1</value>
67743                                <description>RX_DONE interrupt is unmasked</description>
67744                            </enumeratedValue>
67745                        </enumeratedValues>
67746                    </field>
67747                    <field>
67748                        <name>M_TX_ABRT</name>
67749                        <description>This bit masks the R_TX_ABRT interrupt in IC_INTR_STAT register.
67750
67751                            Reset value: 0x1</description>
67752                        <bitRange>[6:6]</bitRange>
67753                        <access>read-write</access>
67754                        <enumeratedValues>
67755                            <enumeratedValue>
67756                                <name>ENABLED</name>
67757                                <value>0</value>
67758                                <description>TX_ABORT interrupt is masked</description>
67759                            </enumeratedValue>
67760                            <enumeratedValue>
67761                                <name>DISABLED</name>
67762                                <value>1</value>
67763                                <description>TX_ABORT interrupt is unmasked</description>
67764                            </enumeratedValue>
67765                        </enumeratedValues>
67766                    </field>
67767                    <field>
67768                        <name>M_RD_REQ</name>
67769                        <description>This bit masks the R_RD_REQ interrupt in IC_INTR_STAT register.
67770
67771                            Reset value: 0x1</description>
67772                        <bitRange>[5:5]</bitRange>
67773                        <access>read-write</access>
67774                        <enumeratedValues>
67775                            <enumeratedValue>
67776                                <name>ENABLED</name>
67777                                <value>0</value>
67778                                <description>RD_REQ interrupt is masked</description>
67779                            </enumeratedValue>
67780                            <enumeratedValue>
67781                                <name>DISABLED</name>
67782                                <value>1</value>
67783                                <description>RD_REQ interrupt is unmasked</description>
67784                            </enumeratedValue>
67785                        </enumeratedValues>
67786                    </field>
67787                    <field>
67788                        <name>M_TX_EMPTY</name>
67789                        <description>This bit masks the R_TX_EMPTY interrupt in IC_INTR_STAT register.
67790
67791                            Reset value: 0x1</description>
67792                        <bitRange>[4:4]</bitRange>
67793                        <access>read-write</access>
67794                        <enumeratedValues>
67795                            <enumeratedValue>
67796                                <name>ENABLED</name>
67797                                <value>0</value>
67798                                <description>TX_EMPTY interrupt is masked</description>
67799                            </enumeratedValue>
67800                            <enumeratedValue>
67801                                <name>DISABLED</name>
67802                                <value>1</value>
67803                                <description>TX_EMPTY interrupt is unmasked</description>
67804                            </enumeratedValue>
67805                        </enumeratedValues>
67806                    </field>
67807                    <field>
67808                        <name>M_TX_OVER</name>
67809                        <description>This bit masks the R_TX_OVER interrupt in IC_INTR_STAT register.
67810
67811                            Reset value: 0x1</description>
67812                        <bitRange>[3:3]</bitRange>
67813                        <access>read-write</access>
67814                        <enumeratedValues>
67815                            <enumeratedValue>
67816                                <name>ENABLED</name>
67817                                <value>0</value>
67818                                <description>TX_OVER interrupt is masked</description>
67819                            </enumeratedValue>
67820                            <enumeratedValue>
67821                                <name>DISABLED</name>
67822                                <value>1</value>
67823                                <description>TX_OVER interrupt is unmasked</description>
67824                            </enumeratedValue>
67825                        </enumeratedValues>
67826                    </field>
67827                    <field>
67828                        <name>M_RX_FULL</name>
67829                        <description>This bit masks the R_RX_FULL interrupt in IC_INTR_STAT register.
67830
67831                            Reset value: 0x1</description>
67832                        <bitRange>[2:2]</bitRange>
67833                        <access>read-write</access>
67834                        <enumeratedValues>
67835                            <enumeratedValue>
67836                                <name>ENABLED</name>
67837                                <value>0</value>
67838                                <description>RX_FULL interrupt is masked</description>
67839                            </enumeratedValue>
67840                            <enumeratedValue>
67841                                <name>DISABLED</name>
67842                                <value>1</value>
67843                                <description>RX_FULL interrupt is unmasked</description>
67844                            </enumeratedValue>
67845                        </enumeratedValues>
67846                    </field>
67847                    <field>
67848                        <name>M_RX_OVER</name>
67849                        <description>This bit masks the R_RX_OVER interrupt in IC_INTR_STAT register.
67850
67851                            Reset value: 0x1</description>
67852                        <bitRange>[1:1]</bitRange>
67853                        <access>read-write</access>
67854                        <enumeratedValues>
67855                            <enumeratedValue>
67856                                <name>ENABLED</name>
67857                                <value>0</value>
67858                                <description>RX_OVER interrupt is masked</description>
67859                            </enumeratedValue>
67860                            <enumeratedValue>
67861                                <name>DISABLED</name>
67862                                <value>1</value>
67863                                <description>RX_OVER interrupt is unmasked</description>
67864                            </enumeratedValue>
67865                        </enumeratedValues>
67866                    </field>
67867                    <field>
67868                        <name>M_RX_UNDER</name>
67869                        <description>This bit masks the R_RX_UNDER interrupt in IC_INTR_STAT register.
67870
67871                            Reset value: 0x1</description>
67872                        <bitRange>[0:0]</bitRange>
67873                        <access>read-write</access>
67874                        <enumeratedValues>
67875                            <enumeratedValue>
67876                                <name>ENABLED</name>
67877                                <value>0</value>
67878                                <description>RX_UNDER interrupt is masked</description>
67879                            </enumeratedValue>
67880                            <enumeratedValue>
67881                                <name>DISABLED</name>
67882                                <value>1</value>
67883                                <description>RX_UNDER interrupt is unmasked</description>
67884                            </enumeratedValue>
67885                        </enumeratedValues>
67886                    </field>
67887                </fields>
67888            </register>
67889            <register>
67890                <name>IC_RAW_INTR_STAT</name>
67891                <addressOffset>0x00000034</addressOffset>
67892                <description>I2C Raw Interrupt Status Register
67893
67894                    Unlike the IC_INTR_STAT register, these bits are not masked so they always show the true status of the DW_apb_i2c.</description>
67895                <resetValue>0x00000000</resetValue>
67896                <fields>
67897                    <field>
67898                        <name>RESTART_DET</name>
67899                        <description>Indicates whether a RESTART condition has occurred on the I2C interface when DW_apb_i2c is operating in Slave mode and the slave is being addressed. Enabled only when IC_SLV_RESTART_DET_EN=1.
67900
67901                            Note: However, in high-speed mode or during a START BYTE transfer, the RESTART comes before the address field as per the I2C protocol. In this case, the slave is not the addressed slave when the RESTART is issued, therefore DW_apb_i2c does not generate the RESTART_DET interrupt.
67902
67903                            Reset value: 0x0</description>
67904                        <bitRange>[12:12]</bitRange>
67905                        <access>read-only</access>
67906                        <enumeratedValues>
67907                            <enumeratedValue>
67908                                <name>INACTIVE</name>
67909                                <value>0</value>
67910                                <description>RESTART_DET interrupt is inactive</description>
67911                            </enumeratedValue>
67912                            <enumeratedValue>
67913                                <name>ACTIVE</name>
67914                                <value>1</value>
67915                                <description>RESTART_DET interrupt is active</description>
67916                            </enumeratedValue>
67917                        </enumeratedValues>
67918                    </field>
67919                    <field>
67920                        <name>GEN_CALL</name>
67921                        <description>Set only when a General Call address is received and it is acknowledged. It stays set until it is cleared either by disabling DW_apb_i2c or when the CPU reads bit 0 of the IC_CLR_GEN_CALL register. DW_apb_i2c stores the received data in the Rx buffer.
67922
67923                            Reset value: 0x0</description>
67924                        <bitRange>[11:11]</bitRange>
67925                        <access>read-only</access>
67926                        <enumeratedValues>
67927                            <enumeratedValue>
67928                                <name>INACTIVE</name>
67929                                <value>0</value>
67930                                <description>GEN_CALL interrupt is inactive</description>
67931                            </enumeratedValue>
67932                            <enumeratedValue>
67933                                <name>ACTIVE</name>
67934                                <value>1</value>
67935                                <description>GEN_CALL interrupt is active</description>
67936                            </enumeratedValue>
67937                        </enumeratedValues>
67938                    </field>
67939                    <field>
67940                        <name>START_DET</name>
67941                        <description>Indicates whether a START or RESTART condition has occurred on the I2C interface regardless of whether DW_apb_i2c is operating in slave or master mode.
67942
67943                            Reset value: 0x0</description>
67944                        <bitRange>[10:10]</bitRange>
67945                        <access>read-only</access>
67946                        <enumeratedValues>
67947                            <enumeratedValue>
67948                                <name>INACTIVE</name>
67949                                <value>0</value>
67950                                <description>START_DET interrupt is inactive</description>
67951                            </enumeratedValue>
67952                            <enumeratedValue>
67953                                <name>ACTIVE</name>
67954                                <value>1</value>
67955                                <description>START_DET interrupt is active</description>
67956                            </enumeratedValue>
67957                        </enumeratedValues>
67958                    </field>
67959                    <field>
67960                        <name>STOP_DET</name>
67961                        <description>Indicates whether a STOP condition has occurred on the I2C interface regardless of whether DW_apb_i2c is operating in slave or master mode.
67962
67963                            In Slave Mode: - If IC_CON[7]=1&#39;b1  (STOP_DET_IFADDRESSED), the STOP_DET interrupt will be issued only if slave is addressed. Note: During a general call address, this slave does not issue a STOP_DET interrupt if STOP_DET_IF_ADDRESSED=1&#39;b1, even if the slave responds to the general call address by generating ACK. The STOP_DET interrupt is generated only when the transmitted address matches the slave address (SAR). - If IC_CON[7]=1&#39;b0 (STOP_DET_IFADDRESSED), the STOP_DET interrupt is issued irrespective of whether it is being addressed. In Master Mode: - If IC_CON[10]=1&#39;b1  (STOP_DET_IF_MASTER_ACTIVE),the STOP_DET interrupt will be issued only if Master is active. - If IC_CON[10]=1&#39;b0  (STOP_DET_IFADDRESSED),the STOP_DET interrupt will be issued irrespective of whether master is active or not. Reset value: 0x0</description>
67964                        <bitRange>[9:9]</bitRange>
67965                        <access>read-only</access>
67966                        <enumeratedValues>
67967                            <enumeratedValue>
67968                                <name>INACTIVE</name>
67969                                <value>0</value>
67970                                <description>STOP_DET interrupt is inactive</description>
67971                            </enumeratedValue>
67972                            <enumeratedValue>
67973                                <name>ACTIVE</name>
67974                                <value>1</value>
67975                                <description>STOP_DET interrupt is active</description>
67976                            </enumeratedValue>
67977                        </enumeratedValues>
67978                    </field>
67979                    <field>
67980                        <name>ACTIVITY</name>
67981                        <description>This bit captures DW_apb_i2c activity and stays set until it is cleared. There are four ways to clear it: - Disabling the DW_apb_i2c - Reading the IC_CLR_ACTIVITY register - Reading the IC_CLR_INTR register - System reset Once this bit is set, it stays set unless one of the four methods is used to clear it. Even if the DW_apb_i2c module is idle, this bit remains set until cleared, indicating that there was activity on the bus.
67982
67983                            Reset value: 0x0</description>
67984                        <bitRange>[8:8]</bitRange>
67985                        <access>read-only</access>
67986                        <enumeratedValues>
67987                            <enumeratedValue>
67988                                <name>INACTIVE</name>
67989                                <value>0</value>
67990                                <description>RAW_INTR_ACTIVITY interrupt is inactive</description>
67991                            </enumeratedValue>
67992                            <enumeratedValue>
67993                                <name>ACTIVE</name>
67994                                <value>1</value>
67995                                <description>RAW_INTR_ACTIVITY interrupt is active</description>
67996                            </enumeratedValue>
67997                        </enumeratedValues>
67998                    </field>
67999                    <field>
68000                        <name>RX_DONE</name>
68001                        <description>When the DW_apb_i2c is acting as a slave-transmitter, this bit is set to 1 if the master does not acknowledge a transmitted byte. This occurs on the last byte of the transmission, indicating that the transmission is done.
68002
68003                            Reset value: 0x0</description>
68004                        <bitRange>[7:7]</bitRange>
68005                        <access>read-only</access>
68006                        <enumeratedValues>
68007                            <enumeratedValue>
68008                                <name>INACTIVE</name>
68009                                <value>0</value>
68010                                <description>RX_DONE interrupt is inactive</description>
68011                            </enumeratedValue>
68012                            <enumeratedValue>
68013                                <name>ACTIVE</name>
68014                                <value>1</value>
68015                                <description>RX_DONE interrupt is active</description>
68016                            </enumeratedValue>
68017                        </enumeratedValues>
68018                    </field>
68019                    <field>
68020                        <name>TX_ABRT</name>
68021                        <description>This bit indicates if DW_apb_i2c, as an I2C transmitter, is unable to complete the intended actions on the contents of the transmit FIFO. This situation can occur both as an I2C master or an I2C slave, and is referred to as a &#39;transmit abort&#39;. When this bit is set to 1, the IC_TX_ABRT_SOURCE register indicates the reason why the transmit abort takes places.
68022
68023                            Note:  The DW_apb_i2c flushes/resets/empties the TX_FIFO and RX_FIFO whenever there is a transmit abort caused by any of the events tracked by the IC_TX_ABRT_SOURCE register. The FIFOs remains in this flushed state until the register IC_CLR_TX_ABRT is read. Once this read is performed, the Tx FIFO is then ready to accept more data bytes from the APB interface.
68024
68025                            Reset value: 0x0</description>
68026                        <bitRange>[6:6]</bitRange>
68027                        <access>read-only</access>
68028                        <enumeratedValues>
68029                            <enumeratedValue>
68030                                <name>INACTIVE</name>
68031                                <value>0</value>
68032                                <description>TX_ABRT interrupt is inactive</description>
68033                            </enumeratedValue>
68034                            <enumeratedValue>
68035                                <name>ACTIVE</name>
68036                                <value>1</value>
68037                                <description>TX_ABRT interrupt is active</description>
68038                            </enumeratedValue>
68039                        </enumeratedValues>
68040                    </field>
68041                    <field>
68042                        <name>RD_REQ</name>
68043                        <description>This bit is set to 1 when DW_apb_i2c is acting as a slave and another I2C master is attempting to read data from DW_apb_i2c. The DW_apb_i2c holds the I2C bus in a wait state (SCL=0) until this interrupt is serviced, which means that the slave has been addressed by a remote master that is asking for data to be transferred. The processor must respond to this interrupt and then write the requested data to the IC_DATA_CMD register. This bit is set to 0 just after the processor reads the IC_CLR_RD_REQ register.
68044
68045                            Reset value: 0x0</description>
68046                        <bitRange>[5:5]</bitRange>
68047                        <access>read-only</access>
68048                        <enumeratedValues>
68049                            <enumeratedValue>
68050                                <name>INACTIVE</name>
68051                                <value>0</value>
68052                                <description>RD_REQ interrupt is inactive</description>
68053                            </enumeratedValue>
68054                            <enumeratedValue>
68055                                <name>ACTIVE</name>
68056                                <value>1</value>
68057                                <description>RD_REQ interrupt is active</description>
68058                            </enumeratedValue>
68059                        </enumeratedValues>
68060                    </field>
68061                    <field>
68062                        <name>TX_EMPTY</name>
68063                        <description>The behavior of the TX_EMPTY interrupt status differs based on the TX_EMPTY_CTRL selection in the IC_CON register. - When TX_EMPTY_CTRL = 0: This bit is set to 1 when the transmit buffer is at or below the threshold value set in the IC_TX_TL register. - When TX_EMPTY_CTRL = 1: This bit is set to 1 when the transmit buffer is at or below the threshold value set in the IC_TX_TL register and the transmission of the address/data from the internal shift register for the most recently popped command is completed. It is automatically cleared by hardware when the buffer level goes above the threshold. When IC_ENABLE[0] is set to 0, the TX FIFO is flushed and held in reset. There the TX FIFO looks like it has no data within it, so this bit is set to 1, provided there is activity in the master or slave state machines. When there is no longer any activity, then with ic_en=0, this bit is set to 0.
68064
68065                            Reset value: 0x0.</description>
68066                        <bitRange>[4:4]</bitRange>
68067                        <access>read-only</access>
68068                        <enumeratedValues>
68069                            <enumeratedValue>
68070                                <name>INACTIVE</name>
68071                                <value>0</value>
68072                                <description>TX_EMPTY interrupt is inactive</description>
68073                            </enumeratedValue>
68074                            <enumeratedValue>
68075                                <name>ACTIVE</name>
68076                                <value>1</value>
68077                                <description>TX_EMPTY interrupt is active</description>
68078                            </enumeratedValue>
68079                        </enumeratedValues>
68080                    </field>
68081                    <field>
68082                        <name>TX_OVER</name>
68083                        <description>Set during transmit if the transmit buffer is filled to IC_TX_BUFFER_DEPTH and the processor attempts to issue another I2C command by writing to the IC_DATA_CMD register. When the module is disabled, this bit keeps its level until the master or slave state machines go into idle, and when ic_en goes to 0, this interrupt is cleared.
68084
68085                            Reset value: 0x0</description>
68086                        <bitRange>[3:3]</bitRange>
68087                        <access>read-only</access>
68088                        <enumeratedValues>
68089                            <enumeratedValue>
68090                                <name>INACTIVE</name>
68091                                <value>0</value>
68092                                <description>TX_OVER interrupt is inactive</description>
68093                            </enumeratedValue>
68094                            <enumeratedValue>
68095                                <name>ACTIVE</name>
68096                                <value>1</value>
68097                                <description>TX_OVER interrupt is active</description>
68098                            </enumeratedValue>
68099                        </enumeratedValues>
68100                    </field>
68101                    <field>
68102                        <name>RX_FULL</name>
68103                        <description>Set when the receive buffer reaches or goes above the RX_TL threshold in the IC_RX_TL register. It is automatically cleared by hardware when buffer level goes below the threshold. If the module is disabled (IC_ENABLE[0]=0), the RX FIFO is flushed and held in reset; therefore the RX FIFO is not full. So this bit is cleared once the IC_ENABLE bit 0 is programmed with a 0, regardless of the activity that continues.
68104
68105                            Reset value: 0x0</description>
68106                        <bitRange>[2:2]</bitRange>
68107                        <access>read-only</access>
68108                        <enumeratedValues>
68109                            <enumeratedValue>
68110                                <name>INACTIVE</name>
68111                                <value>0</value>
68112                                <description>RX_FULL interrupt is inactive</description>
68113                            </enumeratedValue>
68114                            <enumeratedValue>
68115                                <name>ACTIVE</name>
68116                                <value>1</value>
68117                                <description>RX_FULL interrupt is active</description>
68118                            </enumeratedValue>
68119                        </enumeratedValues>
68120                    </field>
68121                    <field>
68122                        <name>RX_OVER</name>
68123                        <description>Set if the receive buffer is completely filled to IC_RX_BUFFER_DEPTH and an additional byte is received from an external I2C device. The DW_apb_i2c acknowledges this, but any data bytes received after the FIFO is full are lost. If the module is disabled (IC_ENABLE[0]=0), this bit keeps its level until the master or slave state machines go into idle, and when ic_en goes to 0, this interrupt is cleared.
68124
68125                            Note:  If bit 9 of the IC_CON register (RX_FIFO_FULL_HLD_CTRL) is programmed to HIGH, then the RX_OVER interrupt never occurs, because the Rx FIFO never overflows.
68126
68127                            Reset value: 0x0</description>
68128                        <bitRange>[1:1]</bitRange>
68129                        <access>read-only</access>
68130                        <enumeratedValues>
68131                            <enumeratedValue>
68132                                <name>INACTIVE</name>
68133                                <value>0</value>
68134                                <description>RX_OVER interrupt is inactive</description>
68135                            </enumeratedValue>
68136                            <enumeratedValue>
68137                                <name>ACTIVE</name>
68138                                <value>1</value>
68139                                <description>RX_OVER interrupt is active</description>
68140                            </enumeratedValue>
68141                        </enumeratedValues>
68142                    </field>
68143                    <field>
68144                        <name>RX_UNDER</name>
68145                        <description>Set if the processor attempts to read the receive buffer when it is empty by reading from the IC_DATA_CMD register. If the module is disabled (IC_ENABLE[0]=0), this bit keeps its level until the master or slave state machines go into idle, and when ic_en goes to 0, this interrupt is cleared.
68146
68147                            Reset value: 0x0</description>
68148                        <bitRange>[0:0]</bitRange>
68149                        <access>read-only</access>
68150                        <enumeratedValues>
68151                            <enumeratedValue>
68152                                <name>INACTIVE</name>
68153                                <value>0</value>
68154                                <description>RX_UNDER interrupt is inactive</description>
68155                            </enumeratedValue>
68156                            <enumeratedValue>
68157                                <name>ACTIVE</name>
68158                                <value>1</value>
68159                                <description>RX_UNDER interrupt is active</description>
68160                            </enumeratedValue>
68161                        </enumeratedValues>
68162                    </field>
68163                </fields>
68164            </register>
68165            <register>
68166                <name>IC_RX_TL</name>
68167                <addressOffset>0x00000038</addressOffset>
68168                <description>I2C Receive FIFO Threshold Register</description>
68169                <resetValue>0x00000000</resetValue>
68170                <fields>
68171                    <field>
68172                        <name>RX_TL</name>
68173                        <description>Receive FIFO Threshold Level.
68174
68175                            Controls the level of entries (or above) that triggers the RX_FULL interrupt (bit 2 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that hardware does not allow this value to be set to a value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 1 entry, and a value of 255 sets the threshold for 256 entries.</description>
68176                        <bitRange>[7:0]</bitRange>
68177                        <access>read-write</access>
68178                    </field>
68179                </fields>
68180            </register>
68181            <register>
68182                <name>IC_TX_TL</name>
68183                <addressOffset>0x0000003c</addressOffset>
68184                <description>I2C Transmit FIFO Threshold Register</description>
68185                <resetValue>0x00000000</resetValue>
68186                <fields>
68187                    <field>
68188                        <name>TX_TL</name>
68189                        <description>Transmit FIFO Threshold Level.
68190
68191                            Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that it may not be set to value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 0 entries, and a value of 255 sets the threshold for 255 entries.</description>
68192                        <bitRange>[7:0]</bitRange>
68193                        <access>read-write</access>
68194                    </field>
68195                </fields>
68196            </register>
68197            <register>
68198                <name>IC_CLR_INTR</name>
68199                <addressOffset>0x00000040</addressOffset>
68200                <description>Clear Combined and Individual Interrupt Register</description>
68201                <resetValue>0x00000000</resetValue>
68202                <fields>
68203                    <field>
68204                        <name>CLR_INTR</name>
68205                        <description>Read this register to clear the combined interrupt, all individual interrupts, and the IC_TX_ABRT_SOURCE register. This bit does not clear hardware clearable interrupts but software clearable interrupts. Refer to Bit 9 of the IC_TX_ABRT_SOURCE register for an exception to clearing IC_TX_ABRT_SOURCE.
68206
68207                            Reset value: 0x0</description>
68208                        <bitRange>[0:0]</bitRange>
68209                        <access>read-only</access>
68210                    </field>
68211                </fields>
68212            </register>
68213            <register>
68214                <name>IC_CLR_RX_UNDER</name>
68215                <addressOffset>0x00000044</addressOffset>
68216                <description>Clear RX_UNDER Interrupt Register</description>
68217                <resetValue>0x00000000</resetValue>
68218                <fields>
68219                    <field>
68220                        <name>CLR_RX_UNDER</name>
68221                        <description>Read this register to clear the RX_UNDER interrupt (bit 0) of the IC_RAW_INTR_STAT register.
68222
68223                            Reset value: 0x0</description>
68224                        <bitRange>[0:0]</bitRange>
68225                        <access>read-only</access>
68226                    </field>
68227                </fields>
68228            </register>
68229            <register>
68230                <name>IC_CLR_RX_OVER</name>
68231                <addressOffset>0x00000048</addressOffset>
68232                <description>Clear RX_OVER Interrupt Register</description>
68233                <resetValue>0x00000000</resetValue>
68234                <fields>
68235                    <field>
68236                        <name>CLR_RX_OVER</name>
68237                        <description>Read this register to clear the RX_OVER interrupt (bit 1) of the IC_RAW_INTR_STAT register.
68238
68239                            Reset value: 0x0</description>
68240                        <bitRange>[0:0]</bitRange>
68241                        <access>read-only</access>
68242                    </field>
68243                </fields>
68244            </register>
68245            <register>
68246                <name>IC_CLR_TX_OVER</name>
68247                <addressOffset>0x0000004c</addressOffset>
68248                <description>Clear TX_OVER Interrupt Register</description>
68249                <resetValue>0x00000000</resetValue>
68250                <fields>
68251                    <field>
68252                        <name>CLR_TX_OVER</name>
68253                        <description>Read this register to clear the TX_OVER interrupt (bit 3) of the IC_RAW_INTR_STAT register.
68254
68255                            Reset value: 0x0</description>
68256                        <bitRange>[0:0]</bitRange>
68257                        <access>read-only</access>
68258                    </field>
68259                </fields>
68260            </register>
68261            <register>
68262                <name>IC_CLR_RD_REQ</name>
68263                <addressOffset>0x00000050</addressOffset>
68264                <description>Clear RD_REQ Interrupt Register</description>
68265                <resetValue>0x00000000</resetValue>
68266                <fields>
68267                    <field>
68268                        <name>CLR_RD_REQ</name>
68269                        <description>Read this register to clear the RD_REQ interrupt (bit 5) of the IC_RAW_INTR_STAT register.
68270
68271                            Reset value: 0x0</description>
68272                        <bitRange>[0:0]</bitRange>
68273                        <access>read-only</access>
68274                    </field>
68275                </fields>
68276            </register>
68277            <register>
68278                <name>IC_CLR_TX_ABRT</name>
68279                <addressOffset>0x00000054</addressOffset>
68280                <description>Clear TX_ABRT Interrupt Register</description>
68281                <resetValue>0x00000000</resetValue>
68282                <fields>
68283                    <field>
68284                        <name>CLR_TX_ABRT</name>
68285                        <description>Read this register to clear the TX_ABRT interrupt (bit 6) of the IC_RAW_INTR_STAT register, and the IC_TX_ABRT_SOURCE register. This also releases the TX FIFO from the flushed/reset state, allowing more writes to the TX FIFO. Refer to Bit 9 of the IC_TX_ABRT_SOURCE register for an exception to clearing IC_TX_ABRT_SOURCE.
68286
68287                            Reset value: 0x0</description>
68288                        <bitRange>[0:0]</bitRange>
68289                        <access>read-only</access>
68290                    </field>
68291                </fields>
68292            </register>
68293            <register>
68294                <name>IC_CLR_RX_DONE</name>
68295                <addressOffset>0x00000058</addressOffset>
68296                <description>Clear RX_DONE Interrupt Register</description>
68297                <resetValue>0x00000000</resetValue>
68298                <fields>
68299                    <field>
68300                        <name>CLR_RX_DONE</name>
68301                        <description>Read this register to clear the RX_DONE interrupt (bit 7) of the IC_RAW_INTR_STAT register.
68302
68303                            Reset value: 0x0</description>
68304                        <bitRange>[0:0]</bitRange>
68305                        <access>read-only</access>
68306                    </field>
68307                </fields>
68308            </register>
68309            <register>
68310                <name>IC_CLR_ACTIVITY</name>
68311                <addressOffset>0x0000005c</addressOffset>
68312                <description>Clear ACTIVITY Interrupt Register</description>
68313                <resetValue>0x00000000</resetValue>
68314                <fields>
68315                    <field>
68316                        <name>CLR_ACTIVITY</name>
68317                        <description>Reading this register clears the ACTIVITY interrupt if the I2C is not active anymore. If the I2C module is still active on the bus, the ACTIVITY interrupt bit continues to be set. It is automatically cleared by hardware if the module is disabled and if there is no further activity on the bus. The value read from this register to get status of the ACTIVITY interrupt (bit 8) of the IC_RAW_INTR_STAT register.
68318
68319                            Reset value: 0x0</description>
68320                        <bitRange>[0:0]</bitRange>
68321                        <access>read-only</access>
68322                    </field>
68323                </fields>
68324            </register>
68325            <register>
68326                <name>IC_CLR_STOP_DET</name>
68327                <addressOffset>0x00000060</addressOffset>
68328                <description>Clear STOP_DET Interrupt Register</description>
68329                <resetValue>0x00000000</resetValue>
68330                <fields>
68331                    <field>
68332                        <name>CLR_STOP_DET</name>
68333                        <description>Read this register to clear the STOP_DET interrupt (bit 9) of the IC_RAW_INTR_STAT register.
68334
68335                            Reset value: 0x0</description>
68336                        <bitRange>[0:0]</bitRange>
68337                        <access>read-only</access>
68338                    </field>
68339                </fields>
68340            </register>
68341            <register>
68342                <name>IC_CLR_START_DET</name>
68343                <addressOffset>0x00000064</addressOffset>
68344                <description>Clear START_DET Interrupt Register</description>
68345                <resetValue>0x00000000</resetValue>
68346                <fields>
68347                    <field>
68348                        <name>CLR_START_DET</name>
68349                        <description>Read this register to clear the START_DET interrupt (bit 10) of the IC_RAW_INTR_STAT register.
68350
68351                            Reset value: 0x0</description>
68352                        <bitRange>[0:0]</bitRange>
68353                        <access>read-only</access>
68354                    </field>
68355                </fields>
68356            </register>
68357            <register>
68358                <name>IC_CLR_GEN_CALL</name>
68359                <addressOffset>0x00000068</addressOffset>
68360                <description>Clear GEN_CALL Interrupt Register</description>
68361                <resetValue>0x00000000</resetValue>
68362                <fields>
68363                    <field>
68364                        <name>CLR_GEN_CALL</name>
68365                        <description>Read this register to clear the GEN_CALL interrupt (bit 11) of IC_RAW_INTR_STAT register.
68366
68367                            Reset value: 0x0</description>
68368                        <bitRange>[0:0]</bitRange>
68369                        <access>read-only</access>
68370                    </field>
68371                </fields>
68372            </register>
68373            <register>
68374                <name>IC_ENABLE</name>
68375                <addressOffset>0x0000006c</addressOffset>
68376                <description>I2C Enable Register</description>
68377                <resetValue>0x00000000</resetValue>
68378                <fields>
68379                    <field>
68380                        <name>TX_CMD_BLOCK</name>
68381                        <description>In Master mode: - 1&#39;b1: Blocks the transmission of data on I2C bus even if Tx FIFO has data to transmit. - 1&#39;b0: The transmission of data starts on I2C bus automatically, as soon as the first data is available in the Tx FIFO. Note: To block the execution of Master commands, set the TX_CMD_BLOCK bit only when Tx FIFO is empty (IC_STATUS[2]==1) and Master is in Idle state (IC_STATUS[5] == 0). Any further commands put in the Tx FIFO are not executed until TX_CMD_BLOCK bit is unset. Reset value:  IC_TX_CMD_BLOCK_DEFAULT</description>
68382                        <bitRange>[2:2]</bitRange>
68383                        <access>read-write</access>
68384                        <enumeratedValues>
68385                            <enumeratedValue>
68386                                <name>NOT_BLOCKED</name>
68387                                <value>0</value>
68388                                <description>Tx Command execution not blocked</description>
68389                            </enumeratedValue>
68390                            <enumeratedValue>
68391                                <name>BLOCKED</name>
68392                                <value>1</value>
68393                                <description>Tx Command execution blocked</description>
68394                            </enumeratedValue>
68395                        </enumeratedValues>
68396                    </field>
68397                    <field>
68398                        <name>ABORT</name>
68399                        <description>When set, the controller initiates the transfer abort. - 0: ABORT not initiated or ABORT done - 1: ABORT operation in progress The software can abort the I2C transfer in master mode by setting this bit. The software can set this bit only when ENABLE is already set; otherwise, the controller ignores any write to ABORT bit. The software cannot clear the ABORT bit once set. In response to an ABORT, the controller issues a STOP and flushes the Tx FIFO after completing the current transfer, then sets the TX_ABORT interrupt after the abort operation. The ABORT bit is cleared automatically after the abort operation.
68400
68401                            For a detailed description on how to abort I2C transfers, refer to &#39;Aborting I2C Transfers&#39;.
68402
68403                            Reset value: 0x0</description>
68404                        <bitRange>[1:1]</bitRange>
68405                        <access>read-write</access>
68406                        <enumeratedValues>
68407                            <enumeratedValue>
68408                                <name>DISABLE</name>
68409                                <value>0</value>
68410                                <description>ABORT operation not in progress</description>
68411                            </enumeratedValue>
68412                            <enumeratedValue>
68413                                <name>ENABLED</name>
68414                                <value>1</value>
68415                                <description>ABORT operation in progress</description>
68416                            </enumeratedValue>
68417                        </enumeratedValues>
68418                    </field>
68419                    <field>
68420                        <name>ENABLE</name>
68421                        <description>Controls whether the DW_apb_i2c is enabled. - 0: Disables DW_apb_i2c (TX and RX FIFOs are held in an erased state) - 1: Enables DW_apb_i2c Software can disable DW_apb_i2c while it is active. However, it is important that care be taken to ensure that DW_apb_i2c is disabled properly. A recommended procedure is described in &#39;Disabling DW_apb_i2c&#39;.
68422
68423                            When DW_apb_i2c is disabled, the following occurs: - The TX FIFO and RX FIFO get flushed. - Status bits in the IC_INTR_STAT register are still active until DW_apb_i2c goes into IDLE state. If the module is transmitting, it stops as well as deletes the contents of the transmit buffer after the current transfer is complete. If the module is receiving, the DW_apb_i2c stops the current transfer at the end of the current byte and does not acknowledge the transfer.
68424
68425                            In systems with asynchronous pclk and ic_clk when IC_CLK_TYPE parameter set to asynchronous (1), there is a two ic_clk delay when enabling or disabling the DW_apb_i2c. For a detailed description on how to disable DW_apb_i2c, refer to &#39;Disabling DW_apb_i2c&#39;
68426
68427                            Reset value: 0x0</description>
68428                        <bitRange>[0:0]</bitRange>
68429                        <access>read-write</access>
68430                        <enumeratedValues>
68431                            <enumeratedValue>
68432                                <name>DISABLED</name>
68433                                <value>0</value>
68434                                <description>I2C is disabled</description>
68435                            </enumeratedValue>
68436                            <enumeratedValue>
68437                                <name>ENABLED</name>
68438                                <value>1</value>
68439                                <description>I2C is enabled</description>
68440                            </enumeratedValue>
68441                        </enumeratedValues>
68442                    </field>
68443                </fields>
68444            </register>
68445            <register>
68446                <name>IC_STATUS</name>
68447                <addressOffset>0x00000070</addressOffset>
68448                <description>I2C Status Register
68449
68450                    This is a read-only register used to indicate the current transfer status and FIFO status. The status register may be read at any time. None of the bits in this register request an interrupt.
68451
68452                    When the I2C is disabled by writing 0 in bit 0 of the IC_ENABLE register: - Bits 1 and 2 are set to 1 - Bits 3 and 10 are set to 0 When the master or slave state machines goes to idle and ic_en=0: - Bits 5 and 6 are set to 0</description>
68453                <resetValue>0x00000006</resetValue>
68454                <fields>
68455                    <field>
68456                        <name>SLV_ACTIVITY</name>
68457                        <description>Slave FSM Activity Status. When the Slave Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Slave FSM is in IDLE state so the Slave part of DW_apb_i2c is not Active - 1: Slave FSM is not in IDLE state so the Slave part of DW_apb_i2c is Active Reset value: 0x0</description>
68458                        <bitRange>[6:6]</bitRange>
68459                        <access>read-only</access>
68460                        <enumeratedValues>
68461                            <enumeratedValue>
68462                                <name>IDLE</name>
68463                                <value>0</value>
68464                                <description>Slave is idle</description>
68465                            </enumeratedValue>
68466                            <enumeratedValue>
68467                                <name>ACTIVE</name>
68468                                <value>1</value>
68469                                <description>Slave not idle</description>
68470                            </enumeratedValue>
68471                        </enumeratedValues>
68472                    </field>
68473                    <field>
68474                        <name>MST_ACTIVITY</name>
68475                        <description>Master FSM Activity Status. When the Master Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Master FSM is in IDLE state so the Master part of DW_apb_i2c is not Active - 1: Master FSM is not in IDLE state so the Master part of DW_apb_i2c is Active Note: IC_STATUS[0]-that is, ACTIVITY bit-is the OR of SLV_ACTIVITY and MST_ACTIVITY bits.
68476
68477                            Reset value: 0x0</description>
68478                        <bitRange>[5:5]</bitRange>
68479                        <access>read-only</access>
68480                        <enumeratedValues>
68481                            <enumeratedValue>
68482                                <name>IDLE</name>
68483                                <value>0</value>
68484                                <description>Master is idle</description>
68485                            </enumeratedValue>
68486                            <enumeratedValue>
68487                                <name>ACTIVE</name>
68488                                <value>1</value>
68489                                <description>Master not idle</description>
68490                            </enumeratedValue>
68491                        </enumeratedValues>
68492                    </field>
68493                    <field>
68494                        <name>RFF</name>
68495                        <description>Receive FIFO Completely Full. When the receive FIFO is completely full, this bit is set. When the receive FIFO contains one or more empty location, this bit is cleared. - 0: Receive FIFO is not full - 1: Receive FIFO is full Reset value: 0x0</description>
68496                        <bitRange>[4:4]</bitRange>
68497                        <access>read-only</access>
68498                        <enumeratedValues>
68499                            <enumeratedValue>
68500                                <name>NOT_FULL</name>
68501                                <value>0</value>
68502                                <description>Rx FIFO not full</description>
68503                            </enumeratedValue>
68504                            <enumeratedValue>
68505                                <name>FULL</name>
68506                                <value>1</value>
68507                                <description>Rx FIFO is full</description>
68508                            </enumeratedValue>
68509                        </enumeratedValues>
68510                    </field>
68511                    <field>
68512                        <name>RFNE</name>
68513                        <description>Receive FIFO Not Empty. This bit is set when the receive FIFO contains one or more entries; it is cleared when the receive FIFO is empty. - 0: Receive FIFO is empty - 1: Receive FIFO is not empty Reset value: 0x0</description>
68514                        <bitRange>[3:3]</bitRange>
68515                        <access>read-only</access>
68516                        <enumeratedValues>
68517                            <enumeratedValue>
68518                                <name>EMPTY</name>
68519                                <value>0</value>
68520                                <description>Rx FIFO is empty</description>
68521                            </enumeratedValue>
68522                            <enumeratedValue>
68523                                <name>NOT_EMPTY</name>
68524                                <value>1</value>
68525                                <description>Rx FIFO not empty</description>
68526                            </enumeratedValue>
68527                        </enumeratedValues>
68528                    </field>
68529                    <field>
68530                        <name>TFE</name>
68531                        <description>Transmit FIFO Completely Empty. When the transmit FIFO is completely empty, this bit is set. When it contains one or more valid entries, this bit is cleared. This bit field does not request an interrupt. - 0: Transmit FIFO is not empty - 1: Transmit FIFO is empty Reset value: 0x1</description>
68532                        <bitRange>[2:2]</bitRange>
68533                        <access>read-only</access>
68534                        <enumeratedValues>
68535                            <enumeratedValue>
68536                                <name>NON_EMPTY</name>
68537                                <value>0</value>
68538                                <description>Tx FIFO not empty</description>
68539                            </enumeratedValue>
68540                            <enumeratedValue>
68541                                <name>EMPTY</name>
68542                                <value>1</value>
68543                                <description>Tx FIFO is empty</description>
68544                            </enumeratedValue>
68545                        </enumeratedValues>
68546                    </field>
68547                    <field>
68548                        <name>TFNF</name>
68549                        <description>Transmit FIFO Not Full. Set when the transmit FIFO contains one or more empty locations, and is cleared when the FIFO is full. - 0: Transmit FIFO is full - 1: Transmit FIFO is not full Reset value: 0x1</description>
68550                        <bitRange>[1:1]</bitRange>
68551                        <access>read-only</access>
68552                        <enumeratedValues>
68553                            <enumeratedValue>
68554                                <name>FULL</name>
68555                                <value>0</value>
68556                                <description>Tx FIFO is full</description>
68557                            </enumeratedValue>
68558                            <enumeratedValue>
68559                                <name>NOT_FULL</name>
68560                                <value>1</value>
68561                                <description>Tx FIFO not full</description>
68562                            </enumeratedValue>
68563                        </enumeratedValues>
68564                    </field>
68565                    <field>
68566                        <name>ACTIVITY</name>
68567                        <description>I2C Activity Status. Reset value: 0x0</description>
68568                        <bitRange>[0:0]</bitRange>
68569                        <access>read-only</access>
68570                        <enumeratedValues>
68571                            <enumeratedValue>
68572                                <name>INACTIVE</name>
68573                                <value>0</value>
68574                                <description>I2C is idle</description>
68575                            </enumeratedValue>
68576                            <enumeratedValue>
68577                                <name>ACTIVE</name>
68578                                <value>1</value>
68579                                <description>I2C is active</description>
68580                            </enumeratedValue>
68581                        </enumeratedValues>
68582                    </field>
68583                </fields>
68584            </register>
68585            <register>
68586                <name>IC_TXFLR</name>
68587                <addressOffset>0x00000074</addressOffset>
68588                <description>I2C Transmit FIFO Level Register This register contains the number of valid data entries in the transmit FIFO buffer. It is cleared whenever: - The I2C is disabled - There is a transmit abort - that is, TX_ABRT bit is set in the IC_RAW_INTR_STAT register - The slave bulk transmit mode is aborted The register increments whenever data is placed into the transmit FIFO and decrements when data is taken from the transmit FIFO.</description>
68589                <resetValue>0x00000000</resetValue>
68590                <fields>
68591                    <field>
68592                        <name>TXFLR</name>
68593                        <description>Transmit FIFO Level. Contains the number of valid data entries in the transmit FIFO.
68594
68595                            Reset value: 0x0</description>
68596                        <bitRange>[4:0]</bitRange>
68597                        <access>read-only</access>
68598                    </field>
68599                </fields>
68600            </register>
68601            <register>
68602                <name>IC_RXFLR</name>
68603                <addressOffset>0x00000078</addressOffset>
68604                <description>I2C Receive FIFO Level Register This register contains the number of valid data entries in the receive FIFO buffer. It is cleared whenever: - The I2C is disabled - Whenever there is a transmit abort caused by any of the events tracked in IC_TX_ABRT_SOURCE The register increments whenever data is placed into the receive FIFO and decrements when data is taken from the receive FIFO.</description>
68605                <resetValue>0x00000000</resetValue>
68606                <fields>
68607                    <field>
68608                        <name>RXFLR</name>
68609                        <description>Receive FIFO Level. Contains the number of valid data entries in the receive FIFO.
68610
68611                            Reset value: 0x0</description>
68612                        <bitRange>[4:0]</bitRange>
68613                        <access>read-only</access>
68614                    </field>
68615                </fields>
68616            </register>
68617            <register>
68618                <name>IC_SDA_HOLD</name>
68619                <addressOffset>0x0000007c</addressOffset>
68620                <description>I2C SDA Hold Time Length Register
68621
68622                    The bits [15:0] of this register are used to control the hold time of SDA during transmit in both slave and master mode (after SCL goes from HIGH to LOW).
68623
68624                    The bits [23:16] of this register are used to extend the SDA transition (if any) whenever SCL is HIGH in the receiver in either master or slave mode.
68625
68626                    Writes to this register succeed only when IC_ENABLE[0]=0.
68627
68628                    The values in this register are in units of ic_clk period. The value programmed in IC_SDA_TX_HOLD must be greater than the minimum hold time in each mode (one cycle in master mode, seven cycles in slave mode) for the value to be implemented.
68629
68630                    The programmed SDA hold time during transmit (IC_SDA_TX_HOLD) cannot exceed at any time the duration of the low part of scl. Therefore the programmed value cannot be larger than N_SCL_LOW-2, where N_SCL_LOW is the duration of the low part of the scl period measured in ic_clk cycles.</description>
68631                <resetValue>0x00000001</resetValue>
68632                <fields>
68633                    <field>
68634                        <name>IC_SDA_RX_HOLD</name>
68635                        <description>Sets the required SDA hold time in units of ic_clk period, when DW_apb_i2c acts as a receiver.
68636
68637                            Reset value: IC_DEFAULT_SDA_HOLD[23:16].</description>
68638                        <bitRange>[23:16]</bitRange>
68639                        <access>read-write</access>
68640                    </field>
68641                    <field>
68642                        <name>IC_SDA_TX_HOLD</name>
68643                        <description>Sets the required SDA hold time in units of ic_clk period, when DW_apb_i2c acts as a transmitter.
68644
68645                            Reset value: IC_DEFAULT_SDA_HOLD[15:0].</description>
68646                        <bitRange>[15:0]</bitRange>
68647                        <access>read-write</access>
68648                    </field>
68649                </fields>
68650            </register>
68651            <register>
68652                <name>IC_TX_ABRT_SOURCE</name>
68653                <addressOffset>0x00000080</addressOffset>
68654                <description>I2C Transmit Abort Source Register
68655
68656                    This register has 32 bits that indicate the source of the TX_ABRT bit. Except for Bit 9, this register is cleared whenever the IC_CLR_TX_ABRT register or the IC_CLR_INTR register is read. To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; RESTART must be enabled (IC_CON[5]=1), the SPECIAL bit must be cleared (IC_TAR[11]), or the GC_OR_START bit must be cleared (IC_TAR[10]).
68657
68658                    Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, Bit 9 clears for one cycle and is then re-asserted.</description>
68659                <resetValue>0x00000000</resetValue>
68660                <fields>
68661                    <field>
68662                        <name>TX_FLUSH_CNT</name>
68663                        <description>This field indicates the number of Tx FIFO Data Commands which are flushed due to TX_ABRT interrupt. It is cleared whenever I2C is disabled.
68664
68665                            Reset value: 0x0
68666
68667                            Role of DW_apb_i2c:  Master-Transmitter or Slave-Transmitter</description>
68668                        <bitRange>[31:23]</bitRange>
68669                        <access>read-only</access>
68670                    </field>
68671                    <field>
68672                        <name>ABRT_USER_ABRT</name>
68673                        <description>This is a master-mode-only bit. Master has detected the transfer abort (IC_ENABLE[1])
68674
68675                            Reset value: 0x0
68676
68677                            Role of DW_apb_i2c:  Master-Transmitter</description>
68678                        <bitRange>[16:16]</bitRange>
68679                        <access>read-only</access>
68680                        <enumeratedValues>
68681                            <enumeratedValue>
68682                                <name>ABRT_USER_ABRT_VOID</name>
68683                                <value>0</value>
68684                                <description>Transfer abort detected by master- scenario not present</description>
68685                            </enumeratedValue>
68686                            <enumeratedValue>
68687                                <name>ABRT_USER_ABRT_GENERATED</name>
68688                                <value>1</value>
68689                                <description>Transfer abort detected by master</description>
68690                            </enumeratedValue>
68691                        </enumeratedValues>
68692                    </field>
68693                    <field>
68694                        <name>ABRT_SLVRD_INTX</name>
68695                        <description>1: When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes a 1 in CMD (bit 8) of IC_DATA_CMD register.
68696
68697                            Reset value: 0x0
68698
68699                            Role of DW_apb_i2c:  Slave-Transmitter</description>
68700                        <bitRange>[15:15]</bitRange>
68701                        <access>read-only</access>
68702                        <enumeratedValues>
68703                            <enumeratedValue>
68704                                <name>ABRT_SLVRD_INTX_VOID</name>
68705                                <value>0</value>
68706                                <description>Slave trying to transmit to remote master in read mode- scenario not present</description>
68707                            </enumeratedValue>
68708                            <enumeratedValue>
68709                                <name>ABRT_SLVRD_INTX_GENERATED</name>
68710                                <value>1</value>
68711                                <description>Slave trying to transmit to remote master in read mode</description>
68712                            </enumeratedValue>
68713                        </enumeratedValues>
68714                    </field>
68715                    <field>
68716                        <name>ABRT_SLV_ARBLOST</name>
68717                        <description>This field indicates that a Slave has lost the bus while transmitting data to a remote master. IC_TX_ABRT_SOURCE[12] is set at the same time. Note:  Even though the slave never &#39;owns&#39; the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then DW_apb_i2c no longer own the bus.
68718
68719                            Reset value: 0x0
68720
68721                            Role of DW_apb_i2c:  Slave-Transmitter</description>
68722                        <bitRange>[14:14]</bitRange>
68723                        <access>read-only</access>
68724                        <enumeratedValues>
68725                            <enumeratedValue>
68726                                <name>ABRT_SLV_ARBLOST_VOID</name>
68727                                <value>0</value>
68728                                <description>Slave lost arbitration to remote master- scenario not present</description>
68729                            </enumeratedValue>
68730                            <enumeratedValue>
68731                                <name>ABRT_SLV_ARBLOST_GENERATED</name>
68732                                <value>1</value>
68733                                <description>Slave lost arbitration to remote master</description>
68734                            </enumeratedValue>
68735                        </enumeratedValues>
68736                    </field>
68737                    <field>
68738                        <name>ABRT_SLVFLUSH_TXFIFO</name>
68739                        <description>This field specifies that the Slave has received a read command and some data exists in the TX FIFO, so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO.
68740
68741                            Reset value: 0x0
68742
68743                            Role of DW_apb_i2c:  Slave-Transmitter</description>
68744                        <bitRange>[13:13]</bitRange>
68745                        <access>read-only</access>
68746                        <enumeratedValues>
68747                            <enumeratedValue>
68748                                <name>ABRT_SLVFLUSH_TXFIFO_VOID</name>
68749                                <value>0</value>
68750                                <description>Slave flushes existing data in TX-FIFO upon getting read command- scenario not present</description>
68751                            </enumeratedValue>
68752                            <enumeratedValue>
68753                                <name>ABRT_SLVFLUSH_TXFIFO_GENERATED</name>
68754                                <value>1</value>
68755                                <description>Slave flushes existing data in TX-FIFO upon getting read command</description>
68756                            </enumeratedValue>
68757                        </enumeratedValues>
68758                    </field>
68759                    <field>
68760                        <name>ARB_LOST</name>
68761                        <description>This field specifies that the Master has lost arbitration, or if IC_TX_ABRT_SOURCE[14] is also set, then the slave transmitter has lost arbitration.
68762
68763                            Reset value: 0x0
68764
68765                            Role of DW_apb_i2c:  Master-Transmitter or Slave-Transmitter</description>
68766                        <bitRange>[12:12]</bitRange>
68767                        <access>read-only</access>
68768                        <enumeratedValues>
68769                            <enumeratedValue>
68770                                <name>ABRT_LOST_VOID</name>
68771                                <value>0</value>
68772                                <description>Master or Slave-Transmitter lost arbitration- scenario not present</description>
68773                            </enumeratedValue>
68774                            <enumeratedValue>
68775                                <name>ABRT_LOST_GENERATED</name>
68776                                <value>1</value>
68777                                <description>Master or Slave-Transmitter lost arbitration</description>
68778                            </enumeratedValue>
68779                        </enumeratedValues>
68780                    </field>
68781                    <field>
68782                        <name>ABRT_MASTER_DIS</name>
68783                        <description>This field indicates that the User tries to initiate a Master operation with the Master mode disabled.
68784
68785                            Reset value: 0x0
68786
68787                            Role of DW_apb_i2c:  Master-Transmitter or Master-Receiver</description>
68788                        <bitRange>[11:11]</bitRange>
68789                        <access>read-only</access>
68790                        <enumeratedValues>
68791                            <enumeratedValue>
68792                                <name>ABRT_MASTER_DIS_VOID</name>
68793                                <value>0</value>
68794                                <description>User initiating master operation when MASTER disabled- scenario not present</description>
68795                            </enumeratedValue>
68796                            <enumeratedValue>
68797                                <name>ABRT_MASTER_DIS_GENERATED</name>
68798                                <value>1</value>
68799                                <description>User initiating master operation when MASTER disabled</description>
68800                            </enumeratedValue>
68801                        </enumeratedValues>
68802                    </field>
68803                    <field>
68804                        <name>ABRT_10B_RD_NORSTRT</name>
68805                        <description>This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =0) and the master sends a read command in 10-bit addressing mode.
68806
68807                            Reset value: 0x0
68808
68809                            Role of DW_apb_i2c:  Master-Receiver</description>
68810                        <bitRange>[10:10]</bitRange>
68811                        <access>read-only</access>
68812                        <enumeratedValues>
68813                            <enumeratedValue>
68814                                <name>ABRT_10B_RD_VOID</name>
68815                                <value>0</value>
68816                                <description>Master not trying to read in 10Bit addressing mode when RESTART disabled</description>
68817                            </enumeratedValue>
68818                            <enumeratedValue>
68819                                <name>ABRT_10B_RD_GENERATED</name>
68820                                <value>1</value>
68821                                <description>Master trying to read in 10Bit addressing mode when RESTART disabled</description>
68822                            </enumeratedValue>
68823                        </enumeratedValues>
68824                    </field>
68825                    <field>
68826                        <name>ABRT_SBYTE_NORSTRT</name>
68827                        <description>To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; restart must be enabled (IC_CON[5]=1), the SPECIAL bit must be cleared (IC_TAR[11]), or the GC_OR_START bit must be cleared (IC_TAR[10]). Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, bit 9 clears for one cycle and then gets reasserted. When this field is set to 1, the restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =0) and the user is trying to send a START Byte.
68828
68829                            Reset value: 0x0
68830
68831                            Role of DW_apb_i2c:  Master</description>
68832                        <bitRange>[9:9]</bitRange>
68833                        <access>read-only</access>
68834                        <enumeratedValues>
68835                            <enumeratedValue>
68836                                <name>ABRT_SBYTE_NORSTRT_VOID</name>
68837                                <value>0</value>
68838                                <description>User trying to send START byte when RESTART disabled- scenario not present</description>
68839                            </enumeratedValue>
68840                            <enumeratedValue>
68841                                <name>ABRT_SBYTE_NORSTRT_GENERATED</name>
68842                                <value>1</value>
68843                                <description>User trying to send START byte when RESTART disabled</description>
68844                            </enumeratedValue>
68845                        </enumeratedValues>
68846                    </field>
68847                    <field>
68848                        <name>ABRT_HS_NORSTRT</name>
68849                        <description>This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =0) and the user is trying to use the master to transfer data in High Speed mode.
68850
68851                            Reset value: 0x0
68852
68853                            Role of DW_apb_i2c:  Master-Transmitter or Master-Receiver</description>
68854                        <bitRange>[8:8]</bitRange>
68855                        <access>read-only</access>
68856                        <enumeratedValues>
68857                            <enumeratedValue>
68858                                <name>ABRT_HS_NORSTRT_VOID</name>
68859                                <value>0</value>
68860                                <description>User trying to switch Master to HS mode when RESTART disabled- scenario not present</description>
68861                            </enumeratedValue>
68862                            <enumeratedValue>
68863                                <name>ABRT_HS_NORSTRT_GENERATED</name>
68864                                <value>1</value>
68865                                <description>User trying to switch Master to HS mode when RESTART disabled</description>
68866                            </enumeratedValue>
68867                        </enumeratedValues>
68868                    </field>
68869                    <field>
68870                        <name>ABRT_SBYTE_ACKDET</name>
68871                        <description>This field indicates that the Master has sent a START Byte and the START Byte was acknowledged (wrong behavior).
68872
68873                            Reset value: 0x0
68874
68875                            Role of DW_apb_i2c:  Master</description>
68876                        <bitRange>[7:7]</bitRange>
68877                        <access>read-only</access>
68878                        <enumeratedValues>
68879                            <enumeratedValue>
68880                                <name>ABRT_SBYTE_ACKDET_VOID</name>
68881                                <value>0</value>
68882                                <description>ACK detected for START byte- scenario not present</description>
68883                            </enumeratedValue>
68884                            <enumeratedValue>
68885                                <name>ABRT_SBYTE_ACKDET_GENERATED</name>
68886                                <value>1</value>
68887                                <description>ACK detected for START byte</description>
68888                            </enumeratedValue>
68889                        </enumeratedValues>
68890                    </field>
68891                    <field>
68892                        <name>ABRT_HS_ACKDET</name>
68893                        <description>This field indicates that the Master is in High Speed mode and the High Speed Master code was acknowledged (wrong behavior).
68894
68895                            Reset value: 0x0
68896
68897                            Role of DW_apb_i2c:  Master</description>
68898                        <bitRange>[6:6]</bitRange>
68899                        <access>read-only</access>
68900                        <enumeratedValues>
68901                            <enumeratedValue>
68902                                <name>ABRT_HS_ACK_VOID</name>
68903                                <value>0</value>
68904                                <description>HS Master code ACKed in HS Mode- scenario not present</description>
68905                            </enumeratedValue>
68906                            <enumeratedValue>
68907                                <name>ABRT_HS_ACK_GENERATED</name>
68908                                <value>1</value>
68909                                <description>HS Master code ACKed in HS Mode</description>
68910                            </enumeratedValue>
68911                        </enumeratedValues>
68912                    </field>
68913                    <field>
68914                        <name>ABRT_GCALL_READ</name>
68915                        <description>This field indicates that DW_apb_i2c in the master mode has sent a General Call but the user programmed the byte following the General Call to be a read from the bus (IC_DATA_CMD[9] is set to 1).
68916
68917                            Reset value: 0x0
68918
68919                            Role of DW_apb_i2c:  Master-Transmitter</description>
68920                        <bitRange>[5:5]</bitRange>
68921                        <access>read-only</access>
68922                        <enumeratedValues>
68923                            <enumeratedValue>
68924                                <name>ABRT_GCALL_READ_VOID</name>
68925                                <value>0</value>
68926                                <description>GCALL is followed by read from bus-scenario not present</description>
68927                            </enumeratedValue>
68928                            <enumeratedValue>
68929                                <name>ABRT_GCALL_READ_GENERATED</name>
68930                                <value>1</value>
68931                                <description>GCALL is followed by read from bus</description>
68932                            </enumeratedValue>
68933                        </enumeratedValues>
68934                    </field>
68935                    <field>
68936                        <name>ABRT_GCALL_NOACK</name>
68937                        <description>This field indicates that DW_apb_i2c in master mode has sent a General Call and no slave on the bus acknowledged the General Call.
68938
68939                            Reset value: 0x0
68940
68941                            Role of DW_apb_i2c:  Master-Transmitter</description>
68942                        <bitRange>[4:4]</bitRange>
68943                        <access>read-only</access>
68944                        <enumeratedValues>
68945                            <enumeratedValue>
68946                                <name>ABRT_GCALL_NOACK_VOID</name>
68947                                <value>0</value>
68948                                <description>GCALL not ACKed by any slave-scenario not present</description>
68949                            </enumeratedValue>
68950                            <enumeratedValue>
68951                                <name>ABRT_GCALL_NOACK_GENERATED</name>
68952                                <value>1</value>
68953                                <description>GCALL not ACKed by any slave</description>
68954                            </enumeratedValue>
68955                        </enumeratedValues>
68956                    </field>
68957                    <field>
68958                        <name>ABRT_TXDATA_NOACK</name>
68959                        <description>This field indicates the master-mode only bit. When the master receives an acknowledgement for the address, but when it sends data byte(s) following the address, it did not receive an acknowledge from the remote slave(s).
68960
68961                            Reset value: 0x0
68962
68963                            Role of DW_apb_i2c:  Master-Transmitter</description>
68964                        <bitRange>[3:3]</bitRange>
68965                        <access>read-only</access>
68966                        <enumeratedValues>
68967                            <enumeratedValue>
68968                                <name>ABRT_TXDATA_NOACK_VOID</name>
68969                                <value>0</value>
68970                                <description>Transmitted data non-ACKed by addressed slave-scenario not present</description>
68971                            </enumeratedValue>
68972                            <enumeratedValue>
68973                                <name>ABRT_TXDATA_NOACK_GENERATED</name>
68974                                <value>1</value>
68975                                <description>Transmitted data not ACKed by addressed slave</description>
68976                            </enumeratedValue>
68977                        </enumeratedValues>
68978                    </field>
68979                    <field>
68980                        <name>ABRT_10ADDR2_NOACK</name>
68981                        <description>This field indicates that the Master is in 10-bit address mode and that the second address byte of the 10-bit address was not acknowledged by any slave.
68982
68983                            Reset value: 0x0
68984
68985                            Role of DW_apb_i2c:  Master-Transmitter or Master-Receiver</description>
68986                        <bitRange>[2:2]</bitRange>
68987                        <access>read-only</access>
68988                        <enumeratedValues>
68989                            <enumeratedValue>
68990                                <name>INACTIVE</name>
68991                                <value>0</value>
68992                                <description>This abort is not generated</description>
68993                            </enumeratedValue>
68994                            <enumeratedValue>
68995                                <name>ACTIVE</name>
68996                                <value>1</value>
68997                                <description>Byte 2 of 10Bit Address not ACKed by any slave</description>
68998                            </enumeratedValue>
68999                        </enumeratedValues>
69000                    </field>
69001                    <field>
69002                        <name>ABRT_10ADDR1_NOACK</name>
69003                        <description>This field indicates that the Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave.
69004
69005                            Reset value: 0x0
69006
69007                            Role of DW_apb_i2c:  Master-Transmitter or Master-Receiver</description>
69008                        <bitRange>[1:1]</bitRange>
69009                        <access>read-only</access>
69010                        <enumeratedValues>
69011                            <enumeratedValue>
69012                                <name>INACTIVE</name>
69013                                <value>0</value>
69014                                <description>This abort is not generated</description>
69015                            </enumeratedValue>
69016                            <enumeratedValue>
69017                                <name>ACTIVE</name>
69018                                <value>1</value>
69019                                <description>Byte 1 of 10Bit Address not ACKed by any slave</description>
69020                            </enumeratedValue>
69021                        </enumeratedValues>
69022                    </field>
69023                    <field>
69024                        <name>ABRT_7B_ADDR_NOACK</name>
69025                        <description>This field indicates that the Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave.
69026
69027                            Reset value: 0x0
69028
69029                            Role of DW_apb_i2c:  Master-Transmitter or Master-Receiver</description>
69030                        <bitRange>[0:0]</bitRange>
69031                        <access>read-only</access>
69032                        <enumeratedValues>
69033                            <enumeratedValue>
69034                                <name>INACTIVE</name>
69035                                <value>0</value>
69036                                <description>This abort is not generated</description>
69037                            </enumeratedValue>
69038                            <enumeratedValue>
69039                                <name>ACTIVE</name>
69040                                <value>1</value>
69041                                <description>This abort is generated because of NOACK for 7-bit address</description>
69042                            </enumeratedValue>
69043                        </enumeratedValues>
69044                    </field>
69045                </fields>
69046            </register>
69047            <register>
69048                <name>IC_SLV_DATA_NACK_ONLY</name>
69049                <addressOffset>0x00000084</addressOffset>
69050                <description>Generate Slave Data NACK Register
69051
69052                    The register is used to generate a NACK for the data part of a transfer when DW_apb_i2c is acting as a slave-receiver. This register only exists when the IC_SLV_DATA_NACK_ONLY parameter is set to 1. When this parameter disabled, this register does not exist and writing to the register&#39;s address has no effect.
69053
69054                    A write can occur on this register if both of the following conditions are met: - DW_apb_i2c is disabled (IC_ENABLE[0] = 0) - Slave part is inactive (IC_STATUS[6] = 0) Note: The IC_STATUS[6] is a register read-back location for the internal slv_activity signal; the user should poll this before writing the ic_slv_data_nack_only bit.</description>
69055                <resetValue>0x00000000</resetValue>
69056                <fields>
69057                    <field>
69058                        <name>NACK</name>
69059                        <description>Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.
69060
69061                            When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0</description>
69062                        <bitRange>[0:0]</bitRange>
69063                        <access>read-write</access>
69064                        <enumeratedValues>
69065                            <enumeratedValue>
69066                                <name>DISABLED</name>
69067                                <value>0</value>
69068                                <description>Slave receiver generates NACK normally</description>
69069                            </enumeratedValue>
69070                            <enumeratedValue>
69071                                <name>ENABLED</name>
69072                                <value>1</value>
69073                                <description>Slave receiver generates NACK upon data reception only</description>
69074                            </enumeratedValue>
69075                        </enumeratedValues>
69076                    </field>
69077                </fields>
69078            </register>
69079            <register>
69080                <name>IC_DMA_CR</name>
69081                <addressOffset>0x00000088</addressOffset>
69082                <description>DMA Control Register
69083
69084                    The register is used to enable the DMA Controller interface operation. There is a separate bit for transmit and receive. This can be programmed regardless of the state of IC_ENABLE.</description>
69085                <resetValue>0x00000000</resetValue>
69086                <fields>
69087                    <field>
69088                        <name>TDMAE</name>
69089                        <description>Transmit DMA Enable. This bit enables/disables the transmit FIFO DMA channel. Reset value: 0x0</description>
69090                        <bitRange>[1:1]</bitRange>
69091                        <access>read-write</access>
69092                        <enumeratedValues>
69093                            <enumeratedValue>
69094                                <name>DISABLED</name>
69095                                <value>0</value>
69096                                <description>transmit FIFO DMA channel disabled</description>
69097                            </enumeratedValue>
69098                            <enumeratedValue>
69099                                <name>ENABLED</name>
69100                                <value>1</value>
69101                                <description>Transmit FIFO DMA channel enabled</description>
69102                            </enumeratedValue>
69103                        </enumeratedValues>
69104                    </field>
69105                    <field>
69106                        <name>RDMAE</name>
69107                        <description>Receive DMA Enable. This bit enables/disables the receive FIFO DMA channel. Reset value: 0x0</description>
69108                        <bitRange>[0:0]</bitRange>
69109                        <access>read-write</access>
69110                        <enumeratedValues>
69111                            <enumeratedValue>
69112                                <name>DISABLED</name>
69113                                <value>0</value>
69114                                <description>Receive FIFO DMA channel disabled</description>
69115                            </enumeratedValue>
69116                            <enumeratedValue>
69117                                <name>ENABLED</name>
69118                                <value>1</value>
69119                                <description>Receive FIFO DMA channel enabled</description>
69120                            </enumeratedValue>
69121                        </enumeratedValues>
69122                    </field>
69123                </fields>
69124            </register>
69125            <register>
69126                <name>IC_DMA_TDLR</name>
69127                <addressOffset>0x0000008c</addressOffset>
69128                <description>DMA Transmit Data Level Register</description>
69129                <resetValue>0x00000000</resetValue>
69130                <fields>
69131                    <field>
69132                        <name>DMATDL</name>
69133                        <description>Transmit Data Level. This bit field controls the level at which a DMA request is made by the transmit logic. It is equal to the watermark level; that is, the dma_tx_req signal is generated when the number of valid data entries in the transmit FIFO is equal to or below this field value, and TDMAE = 1.
69134
69135                            Reset value: 0x0</description>
69136                        <bitRange>[3:0]</bitRange>
69137                        <access>read-write</access>
69138                    </field>
69139                </fields>
69140            </register>
69141            <register>
69142                <name>IC_DMA_RDLR</name>
69143                <addressOffset>0x00000090</addressOffset>
69144                <description>I2C Receive Data Level Register</description>
69145                <resetValue>0x00000000</resetValue>
69146                <fields>
69147                    <field>
69148                        <name>DMARDL</name>
69149                        <description>Receive Data Level. This bit field controls the level at which a DMA request is made by the receive logic. The watermark level = DMARDL+1; that is, dma_rx_req is generated when the number of valid data entries in the receive FIFO is equal to or more than this field value + 1, and RDMAE =1. For instance, when DMARDL is 0, then dma_rx_req is asserted when 1 or more data entries are present in the receive FIFO.
69150
69151                            Reset value: 0x0</description>
69152                        <bitRange>[3:0]</bitRange>
69153                        <access>read-write</access>
69154                    </field>
69155                </fields>
69156            </register>
69157            <register>
69158                <name>IC_SDA_SETUP</name>
69159                <addressOffset>0x00000094</addressOffset>
69160                <description>I2C SDA Setup Register
69161
69162                    This register controls the amount of time delay (in terms of number of ic_clk clock periods) introduced in the rising edge of SCL - relative to SDA changing - when DW_apb_i2c services a read request in a slave-transmitter operation. The relevant I2C requirement is tSU:DAT (note 4) as detailed in the I2C Bus Specification. This register must be programmed with a value equal to or greater than 2.
69163
69164                    Writes to this register succeed only when IC_ENABLE[0] = 0.
69165
69166                    Note: The length of setup time is calculated using [(IC_SDA_SETUP - 1) * (ic_clk_period)], so if the user requires 10 ic_clk periods of setup time, they should program a value of 11. The IC_SDA_SETUP register is only used by the DW_apb_i2c when operating as a slave transmitter.</description>
69167                <resetValue>0x00000064</resetValue>
69168                <fields>
69169                    <field>
69170                        <name>SDA_SETUP</name>
69171                        <description>SDA Setup. It is recommended that if the required delay is 1000ns, then for an ic_clk frequency of 10 MHz, IC_SDA_SETUP should be programmed to a value of 11. IC_SDA_SETUP must be programmed with a minimum value of 2.</description>
69172                        <bitRange>[7:0]</bitRange>
69173                        <access>read-write</access>
69174                    </field>
69175                </fields>
69176            </register>
69177            <register>
69178                <name>IC_ACK_GENERAL_CALL</name>
69179                <addressOffset>0x00000098</addressOffset>
69180                <description>I2C ACK General Call Register
69181
69182                    The register controls whether DW_apb_i2c responds with a ACK or NACK when it receives an I2C General Call address.
69183
69184                    This register is applicable only when the DW_apb_i2c is in slave mode.</description>
69185                <resetValue>0x00000001</resetValue>
69186                <fields>
69187                    <field>
69188                        <name>ACK_GEN_CALL</name>
69189                        <description>ACK General Call. When set to 1, DW_apb_i2c responds with a ACK (by asserting ic_data_oe) when it receives a General Call. Otherwise, DW_apb_i2c responds with a NACK (by negating ic_data_oe).</description>
69190                        <bitRange>[0:0]</bitRange>
69191                        <access>read-write</access>
69192                        <enumeratedValues>
69193                            <enumeratedValue>
69194                                <name>DISABLED</name>
69195                                <value>0</value>
69196                                <description>Generate NACK for a General Call</description>
69197                            </enumeratedValue>
69198                            <enumeratedValue>
69199                                <name>ENABLED</name>
69200                                <value>1</value>
69201                                <description>Generate ACK for a General Call</description>
69202                            </enumeratedValue>
69203                        </enumeratedValues>
69204                    </field>
69205                </fields>
69206            </register>
69207            <register>
69208                <name>IC_ENABLE_STATUS</name>
69209                <addressOffset>0x0000009c</addressOffset>
69210                <description>I2C Enable Status Register
69211
69212                    The register is used to report the DW_apb_i2c hardware status when the IC_ENABLE[0] register is set from 1 to 0; that is, when DW_apb_i2c is disabled.
69213
69214                    If IC_ENABLE[0] has been set to 1, bits 2:1 are forced to 0, and bit 0 is forced to 1.
69215
69216                    If IC_ENABLE[0] has been set to 0, bits 2:1 is only be valid as soon as bit 0 is read as &#39;0&#39;.
69217
69218                    Note: When IC_ENABLE[0] has been set to 0, a delay occurs for bit 0 to be read as 0 because disabling the DW_apb_i2c depends on I2C bus activities.</description>
69219                <resetValue>0x00000000</resetValue>
69220                <fields>
69221                    <field>
69222                        <name>SLV_RX_DATA_LOST</name>
69223                        <description>Slave Received Data Lost. This bit indicates if a Slave-Receiver operation has been aborted with at least one data byte received from an I2C transfer due to the setting bit 0 of IC_ENABLE from 1 to 0. When read as 1, DW_apb_i2c is deemed to have been actively engaged in an aborted I2C transfer (with matching address) and the data phase of the I2C transfer has been entered, even though a data byte has been responded with a NACK.
69224
69225                            Note:  If the remote I2C master terminates the transfer with a STOP condition before the DW_apb_i2c has a chance to NACK a transfer, and IC_ENABLE[0] has been set to 0, then this bit is also set to 1.
69226
69227                            When read as 0, DW_apb_i2c is deemed to have been disabled without being actively involved in the data phase of a Slave-Receiver transfer.
69228
69229                            Note:  The CPU can safely read this bit when IC_EN (bit 0) is read as 0.
69230
69231                            Reset value: 0x0</description>
69232                        <bitRange>[2:2]</bitRange>
69233                        <access>read-only</access>
69234                        <enumeratedValues>
69235                            <enumeratedValue>
69236                                <name>INACTIVE</name>
69237                                <value>0</value>
69238                                <description>Slave RX Data is not lost</description>
69239                            </enumeratedValue>
69240                            <enumeratedValue>
69241                                <name>ACTIVE</name>
69242                                <value>1</value>
69243                                <description>Slave RX Data is lost</description>
69244                            </enumeratedValue>
69245                        </enumeratedValues>
69246                    </field>
69247                    <field>
69248                        <name>SLV_DISABLED_WHILE_BUSY</name>
69249                        <description>Slave Disabled While Busy (Transmit, Receive). This bit indicates if a potential or active Slave operation has been aborted due to the setting bit 0 of the IC_ENABLE register from 1 to 0. This bit is set when the CPU writes a 0 to the IC_ENABLE register while:
69250
69251                            (a) DW_apb_i2c is receiving the address byte of the Slave-Transmitter operation from a remote master;
69252
69253                            OR,
69254
69255                            (b) address and data bytes of the Slave-Receiver operation from a remote master.
69256
69257                            When read as 1, DW_apb_i2c is deemed to have forced a NACK during any part of an I2C transfer, irrespective of whether the I2C address matches the slave address set in DW_apb_i2c (IC_SAR register) OR if the transfer is completed before IC_ENABLE is set to 0 but has not taken effect.
69258
69259                            Note:  If the remote I2C master terminates the transfer with a STOP condition before the DW_apb_i2c has a chance to NACK a transfer, and IC_ENABLE[0] has been set to 0, then this bit will also be set to 1.
69260
69261                            When read as 0, DW_apb_i2c is deemed to have been disabled when there is master activity, or when the I2C bus is idle.
69262
69263                            Note:  The CPU can safely read this bit when IC_EN (bit 0) is read as 0.
69264
69265                            Reset value: 0x0</description>
69266                        <bitRange>[1:1]</bitRange>
69267                        <access>read-only</access>
69268                        <enumeratedValues>
69269                            <enumeratedValue>
69270                                <name>INACTIVE</name>
69271                                <value>0</value>
69272                                <description>Slave is disabled when it is idle</description>
69273                            </enumeratedValue>
69274                            <enumeratedValue>
69275                                <name>ACTIVE</name>
69276                                <value>1</value>
69277                                <description>Slave is disabled when it is active</description>
69278                            </enumeratedValue>
69279                        </enumeratedValues>
69280                    </field>
69281                    <field>
69282                        <name>IC_EN</name>
69283                        <description>ic_en Status. This bit always reflects the value driven on the output port ic_en. - When read as 1, DW_apb_i2c is deemed to be in an enabled state. - When read as 0, DW_apb_i2c is deemed completely inactive. Note:  The CPU can safely read this bit anytime. When this bit is read as 0, the CPU can safely read SLV_RX_DATA_LOST (bit 2) and SLV_DISABLED_WHILE_BUSY (bit 1).
69284
69285                            Reset value: 0x0</description>
69286                        <bitRange>[0:0]</bitRange>
69287                        <access>read-only</access>
69288                        <enumeratedValues>
69289                            <enumeratedValue>
69290                                <name>DISABLED</name>
69291                                <value>0</value>
69292                                <description>I2C disabled</description>
69293                            </enumeratedValue>
69294                            <enumeratedValue>
69295                                <name>ENABLED</name>
69296                                <value>1</value>
69297                                <description>I2C enabled</description>
69298                            </enumeratedValue>
69299                        </enumeratedValues>
69300                    </field>
69301                </fields>
69302            </register>
69303            <register>
69304                <name>IC_FS_SPKLEN</name>
69305                <addressOffset>0x000000a0</addressOffset>
69306                <description>I2C SS, FS or FM+ spike suppression limit
69307
69308                    This register is used to store the duration, measured in ic_clk cycles, of the longest spike that is filtered out by the spike suppression logic when the component is operating in SS, FS or FM+ modes. The relevant I2C requirement is tSP (table 4) as detailed in the I2C Bus Specification. This register must be programmed with a minimum value of 1.</description>
69309                <resetValue>0x00000007</resetValue>
69310                <fields>
69311                    <field>
69312                        <name>IC_FS_SPKLEN</name>
69313                        <description>This register must be set before any I2C bus transaction can take place to ensure stable operation. This register sets the duration, measured in ic_clk cycles, of the longest spike in the SCL or SDA lines that will be filtered out by the spike suppression logic. This register can be written only when the I2C interface is disabled which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. The minimum valid value is 1; hardware prevents values less than this being written, and if attempted results in 1 being set. or more information, refer to &#39;Spike Suppression&#39;.</description>
69314                        <bitRange>[7:0]</bitRange>
69315                        <access>read-write</access>
69316                    </field>
69317                </fields>
69318            </register>
69319            <register>
69320                <name>IC_CLR_RESTART_DET</name>
69321                <addressOffset>0x000000a8</addressOffset>
69322                <description>Clear RESTART_DET Interrupt Register</description>
69323                <resetValue>0x00000000</resetValue>
69324                <fields>
69325                    <field>
69326                        <name>CLR_RESTART_DET</name>
69327                        <description>Read this register to clear the RESTART_DET interrupt (bit 12) of IC_RAW_INTR_STAT register.
69328
69329                            Reset value: 0x0</description>
69330                        <bitRange>[0:0]</bitRange>
69331                        <access>read-only</access>
69332                    </field>
69333                </fields>
69334            </register>
69335            <register>
69336                <name>IC_COMP_PARAM_1</name>
69337                <addressOffset>0x000000f4</addressOffset>
69338                <description>Component Parameter Register 1
69339
69340                    Note This register is not implemented and therefore reads as 0. If it was implemented it would be a constant read-only register that contains encoded information about the component&#39;s parameter settings. Fields shown below are the settings for those parameters</description>
69341                <resetValue>0x00000000</resetValue>
69342                <fields>
69343                    <field>
69344                        <name>TX_BUFFER_DEPTH</name>
69345                        <description>TX Buffer Depth = 16</description>
69346                        <bitRange>[23:16]</bitRange>
69347                        <access>read-only</access>
69348                    </field>
69349                    <field>
69350                        <name>RX_BUFFER_DEPTH</name>
69351                        <description>RX Buffer Depth = 16</description>
69352                        <bitRange>[15:8]</bitRange>
69353                        <access>read-only</access>
69354                    </field>
69355                    <field>
69356                        <name>ADD_ENCODED_PARAMS</name>
69357                        <description>Encoded parameters not visible</description>
69358                        <bitRange>[7:7]</bitRange>
69359                        <access>read-only</access>
69360                    </field>
69361                    <field>
69362                        <name>HAS_DMA</name>
69363                        <description>DMA handshaking signals are enabled</description>
69364                        <bitRange>[6:6]</bitRange>
69365                        <access>read-only</access>
69366                    </field>
69367                    <field>
69368                        <name>INTR_IO</name>
69369                        <description>COMBINED Interrupt outputs</description>
69370                        <bitRange>[5:5]</bitRange>
69371                        <access>read-only</access>
69372                    </field>
69373                    <field>
69374                        <name>HC_COUNT_VALUES</name>
69375                        <description>Programmable count values for each mode.</description>
69376                        <bitRange>[4:4]</bitRange>
69377                        <access>read-only</access>
69378                    </field>
69379                    <field>
69380                        <name>MAX_SPEED_MODE</name>
69381                        <description>MAX SPEED MODE = FAST MODE</description>
69382                        <bitRange>[3:2]</bitRange>
69383                        <access>read-only</access>
69384                    </field>
69385                    <field>
69386                        <name>APB_DATA_WIDTH</name>
69387                        <description>APB data bus width is 32 bits</description>
69388                        <bitRange>[1:0]</bitRange>
69389                        <access>read-only</access>
69390                    </field>
69391                </fields>
69392            </register>
69393            <register>
69394                <name>IC_COMP_VERSION</name>
69395                <addressOffset>0x000000f8</addressOffset>
69396                <description>I2C Component Version Register</description>
69397                <resetValue>0x3230312a</resetValue>
69398                <fields>
69399                    <field>
69400                        <name>IC_COMP_VERSION</name>
69401                        <bitRange>[31:0]</bitRange>
69402                        <access>read-only</access>
69403                    </field>
69404                </fields>
69405            </register>
69406            <register>
69407                <name>IC_COMP_TYPE</name>
69408                <addressOffset>0x000000fc</addressOffset>
69409                <description>I2C Component Type Register</description>
69410                <resetValue>0x44570140</resetValue>
69411                <fields>
69412                    <field>
69413                        <name>IC_COMP_TYPE</name>
69414                        <description>Designware Component Type number = 0x44_57_01_40. This assigned unique hex value is constant and is derived from the two ASCII letters &#39;DW&#39; followed by a 16-bit unsigned number.</description>
69415                        <bitRange>[31:0]</bitRange>
69416                        <access>read-only</access>
69417                    </field>
69418                </fields>
69419            </register>
69420        </registers>
69421    </peripheral>
69422    <peripheral derivedFrom="I2C0">
69423        <name>I2C1</name>
69424        <baseAddress>0x40098000</baseAddress>
69425        <interrupt>
69426        <name>I2C1_IRQ</name>
69427        <value>37</value>
69428    </interrupt>
69429    </peripheral>
69430    <peripheral>
69431        <name>SPI0</name>
69432        <baseAddress>0x40080000</baseAddress>
69433        <addressBlock>
69434            <offset>0</offset>
69435            <size>4096</size>
69436            <usage>registers</usage>
69437        </addressBlock>
69438        <interrupt>
69439            <name>SPI0_IRQ</name>
69440            <value>31</value>
69441        </interrupt>
69442        <registers>
69443            <register>
69444                <name>SSPCR0</name>
69445                <addressOffset>0x00000000</addressOffset>
69446                <description>Control register 0, SSPCR0 on page 3-4</description>
69447                <resetValue>0x00000000</resetValue>
69448                <fields>
69449                    <field>
69450                        <name>SCR</name>
69451                        <description>Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255.</description>
69452                        <bitRange>[15:8]</bitRange>
69453                        <access>read-write</access>
69454                    </field>
69455                    <field>
69456                        <name>SPH</name>
69457                        <description>SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10.</description>
69458                        <bitRange>[7:7]</bitRange>
69459                        <access>read-write</access>
69460                    </field>
69461                    <field>
69462                        <name>SPO</name>
69463                        <description>SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10.</description>
69464                        <bitRange>[6:6]</bitRange>
69465                        <access>read-write</access>
69466                    </field>
69467                    <field>
69468                        <name>FRF</name>
69469                        <description>Frame format: 00 Motorola SPI frame format. 01 TI synchronous serial frame format. 10 National Microwire frame format. 11 Reserved, undefined operation.</description>
69470                        <bitRange>[5:4]</bitRange>
69471                        <access>read-write</access>
69472                    </field>
69473                    <field>
69474                        <name>DSS</name>
69475                        <description>Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data.</description>
69476                        <bitRange>[3:0]</bitRange>
69477                        <access>read-write</access>
69478                    </field>
69479                </fields>
69480            </register>
69481            <register>
69482                <name>SSPCR1</name>
69483                <addressOffset>0x00000004</addressOffset>
69484                <description>Control register 1, SSPCR1 on page 3-5</description>
69485                <resetValue>0x00000000</resetValue>
69486                <fields>
69487                    <field>
69488                        <name>SOD</name>
69489                        <description>Slave-mode output disable. This bit is relevant only in the slave mode, MS=1. In multiple-slave systems, it is possible for an PrimeCell SSP master to broadcast a message to all slaves in the system while ensuring that only one slave drives data onto its serial output line. In such systems the RXD lines from multiple slaves could be tied together. To operate in such systems, the SOD bit can be set if the PrimeCell SSP slave is not supposed to drive the SSPTXD line: 0 SSP can drive the SSPTXD output in slave mode. 1 SSP must not drive the SSPTXD output in slave mode.</description>
69490                        <bitRange>[3:3]</bitRange>
69491                        <access>read-write</access>
69492                    </field>
69493                    <field>
69494                        <name>MS</name>
69495                        <description>Master or slave mode select. This bit can be modified only when the PrimeCell SSP is disabled, SSE=0: 0 Device configured as master, default. 1 Device configured as slave.</description>
69496                        <bitRange>[2:2]</bitRange>
69497                        <access>read-write</access>
69498                    </field>
69499                    <field>
69500                        <name>SSE</name>
69501                        <description>Synchronous serial port enable: 0 SSP operation disabled. 1 SSP operation enabled.</description>
69502                        <bitRange>[1:1]</bitRange>
69503                        <access>read-write</access>
69504                    </field>
69505                    <field>
69506                        <name>LBM</name>
69507                        <description>Loop back mode: 0 Normal serial port operation enabled. 1 Output of transmit serial shifter is connected to input of receive serial shifter internally.</description>
69508                        <bitRange>[0:0]</bitRange>
69509                        <access>read-write</access>
69510                    </field>
69511                </fields>
69512            </register>
69513            <register>
69514                <name>SSPDR</name>
69515                <addressOffset>0x00000008</addressOffset>
69516                <description>Data register, SSPDR on page 3-6</description>
69517                <resetMask>0x00000000</resetMask>
69518                <fields>
69519                    <field>
69520                        <name>DATA</name>
69521                        <description>Transmit/Receive FIFO: Read Receive FIFO. Write Transmit FIFO. You must right-justify data when the PrimeCell SSP is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by transmit logic. The receive logic automatically right-justifies.</description>
69522                        <bitRange>[15:0]</bitRange>
69523                        <access>read-write</access>
69524                        <readAction>modify</readAction>
69525                    </field>
69526                </fields>
69527            </register>
69528            <register>
69529                <name>SSPSR</name>
69530                <addressOffset>0x0000000c</addressOffset>
69531                <description>Status register, SSPSR on page 3-7</description>
69532                <resetValue>0x00000003</resetValue>
69533                <fields>
69534                    <field>
69535                        <name>BSY</name>
69536                        <description>PrimeCell SSP busy flag, RO: 0 SSP is idle. 1 SSP is currently transmitting and/or receiving a frame or the transmit FIFO is not empty.</description>
69537                        <bitRange>[4:4]</bitRange>
69538                        <access>read-only</access>
69539                    </field>
69540                    <field>
69541                        <name>RFF</name>
69542                        <description>Receive FIFO full, RO: 0 Receive FIFO is not full. 1 Receive FIFO is full.</description>
69543                        <bitRange>[3:3]</bitRange>
69544                        <access>read-only</access>
69545                    </field>
69546                    <field>
69547                        <name>RNE</name>
69548                        <description>Receive FIFO not empty, RO: 0 Receive FIFO is empty. 1 Receive FIFO is not empty.</description>
69549                        <bitRange>[2:2]</bitRange>
69550                        <access>read-only</access>
69551                    </field>
69552                    <field>
69553                        <name>TNF</name>
69554                        <description>Transmit FIFO not full, RO: 0 Transmit FIFO is full. 1 Transmit FIFO is not full.</description>
69555                        <bitRange>[1:1]</bitRange>
69556                        <access>read-only</access>
69557                    </field>
69558                    <field>
69559                        <name>TFE</name>
69560                        <description>Transmit FIFO empty, RO: 0 Transmit FIFO is not empty. 1 Transmit FIFO is empty.</description>
69561                        <bitRange>[0:0]</bitRange>
69562                        <access>read-only</access>
69563                    </field>
69564                </fields>
69565            </register>
69566            <register>
69567                <name>SSPCPSR</name>
69568                <addressOffset>0x00000010</addressOffset>
69569                <description>Clock prescale register, SSPCPSR on page 3-8</description>
69570                <resetValue>0x00000000</resetValue>
69571                <fields>
69572                    <field>
69573                        <name>CPSDVSR</name>
69574                        <description>Clock prescale divisor. Must be an even number from 2-254, depending on the frequency of SSPCLK. The least significant bit always returns zero on reads.</description>
69575                        <bitRange>[7:0]</bitRange>
69576                        <access>read-write</access>
69577                    </field>
69578                </fields>
69579            </register>
69580            <register>
69581                <name>SSPIMSC</name>
69582                <addressOffset>0x00000014</addressOffset>
69583                <description>Interrupt mask set or clear register, SSPIMSC on page 3-9</description>
69584                <resetValue>0x00000000</resetValue>
69585                <fields>
69586                    <field>
69587                        <name>TXIM</name>
69588                        <description>Transmit FIFO interrupt mask: 0 Transmit FIFO half empty or less condition interrupt is masked. 1 Transmit FIFO half empty or less condition interrupt is not masked.</description>
69589                        <bitRange>[3:3]</bitRange>
69590                        <access>read-write</access>
69591                    </field>
69592                    <field>
69593                        <name>RXIM</name>
69594                        <description>Receive FIFO interrupt mask: 0 Receive FIFO half full or less condition interrupt is masked. 1 Receive FIFO half full or less condition interrupt is not masked.</description>
69595                        <bitRange>[2:2]</bitRange>
69596                        <access>read-write</access>
69597                    </field>
69598                    <field>
69599                        <name>RTIM</name>
69600                        <description>Receive timeout interrupt mask: 0 Receive FIFO not empty and no read prior to timeout period interrupt is masked. 1 Receive FIFO not empty and no read prior to timeout period interrupt is not masked.</description>
69601                        <bitRange>[1:1]</bitRange>
69602                        <access>read-write</access>
69603                    </field>
69604                    <field>
69605                        <name>RORIM</name>
69606                        <description>Receive overrun interrupt mask: 0 Receive FIFO written to while full condition interrupt is masked. 1 Receive FIFO written to while full condition interrupt is not masked.</description>
69607                        <bitRange>[0:0]</bitRange>
69608                        <access>read-write</access>
69609                    </field>
69610                </fields>
69611            </register>
69612            <register>
69613                <name>SSPRIS</name>
69614                <addressOffset>0x00000018</addressOffset>
69615                <description>Raw interrupt status register, SSPRIS on page 3-10</description>
69616                <resetValue>0x00000008</resetValue>
69617                <fields>
69618                    <field>
69619                        <name>TXRIS</name>
69620                        <description>Gives the raw interrupt state, prior to masking, of the SSPTXINTR interrupt</description>
69621                        <bitRange>[3:3]</bitRange>
69622                        <access>read-only</access>
69623                    </field>
69624                    <field>
69625                        <name>RXRIS</name>
69626                        <description>Gives the raw interrupt state, prior to masking, of the SSPRXINTR interrupt</description>
69627                        <bitRange>[2:2]</bitRange>
69628                        <access>read-only</access>
69629                    </field>
69630                    <field>
69631                        <name>RTRIS</name>
69632                        <description>Gives the raw interrupt state, prior to masking, of the SSPRTINTR interrupt</description>
69633                        <bitRange>[1:1]</bitRange>
69634                        <access>read-only</access>
69635                    </field>
69636                    <field>
69637                        <name>RORRIS</name>
69638                        <description>Gives the raw interrupt state, prior to masking, of the SSPRORINTR interrupt</description>
69639                        <bitRange>[0:0]</bitRange>
69640                        <access>read-only</access>
69641                    </field>
69642                </fields>
69643            </register>
69644            <register>
69645                <name>SSPMIS</name>
69646                <addressOffset>0x0000001c</addressOffset>
69647                <description>Masked interrupt status register, SSPMIS on page 3-11</description>
69648                <resetValue>0x00000000</resetValue>
69649                <fields>
69650                    <field>
69651                        <name>TXMIS</name>
69652                        <description>Gives the transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt</description>
69653                        <bitRange>[3:3]</bitRange>
69654                        <access>read-only</access>
69655                    </field>
69656                    <field>
69657                        <name>RXMIS</name>
69658                        <description>Gives the receive FIFO masked interrupt state, after masking, of the SSPRXINTR interrupt</description>
69659                        <bitRange>[2:2]</bitRange>
69660                        <access>read-only</access>
69661                    </field>
69662                    <field>
69663                        <name>RTMIS</name>
69664                        <description>Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt</description>
69665                        <bitRange>[1:1]</bitRange>
69666                        <access>read-only</access>
69667                    </field>
69668                    <field>
69669                        <name>RORMIS</name>
69670                        <description>Gives the receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt</description>
69671                        <bitRange>[0:0]</bitRange>
69672                        <access>read-only</access>
69673                    </field>
69674                </fields>
69675            </register>
69676            <register>
69677                <name>SSPICR</name>
69678                <addressOffset>0x00000020</addressOffset>
69679                <description>Interrupt clear register, SSPICR on page 3-11</description>
69680                <resetValue>0x00000000</resetValue>
69681                <fields>
69682                    <field>
69683                        <name>RTIC</name>
69684                        <description>Clears the SSPRTINTR interrupt</description>
69685                        <bitRange>[1:1]</bitRange>
69686                        <access>read-write</access>
69687                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
69688                    </field>
69689                    <field>
69690                        <name>RORIC</name>
69691                        <description>Clears the SSPRORINTR interrupt</description>
69692                        <bitRange>[0:0]</bitRange>
69693                        <access>read-write</access>
69694                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
69695                    </field>
69696                </fields>
69697            </register>
69698            <register>
69699                <name>SSPDMACR</name>
69700                <addressOffset>0x00000024</addressOffset>
69701                <description>DMA control register, SSPDMACR on page 3-12</description>
69702                <resetValue>0x00000000</resetValue>
69703                <fields>
69704                    <field>
69705                        <name>TXDMAE</name>
69706                        <description>Transmit DMA Enable. If this bit is set to 1, DMA for the transmit FIFO is enabled.</description>
69707                        <bitRange>[1:1]</bitRange>
69708                        <access>read-write</access>
69709                    </field>
69710                    <field>
69711                        <name>RXDMAE</name>
69712                        <description>Receive DMA Enable. If this bit is set to 1, DMA for the receive FIFO is enabled.</description>
69713                        <bitRange>[0:0]</bitRange>
69714                        <access>read-write</access>
69715                    </field>
69716                </fields>
69717            </register>
69718            <register>
69719                <name>SSPPERIPHID0</name>
69720                <addressOffset>0x00000fe0</addressOffset>
69721                <description>Peripheral identification registers, SSPPeriphID0-3 on page 3-13</description>
69722                <resetValue>0x00000022</resetValue>
69723                <fields>
69724                    <field>
69725                        <name>PARTNUMBER0</name>
69726                        <description>These bits read back as 0x22</description>
69727                        <bitRange>[7:0]</bitRange>
69728                        <access>read-only</access>
69729                    </field>
69730                </fields>
69731            </register>
69732            <register>
69733                <name>SSPPERIPHID1</name>
69734                <addressOffset>0x00000fe4</addressOffset>
69735                <description>Peripheral identification registers, SSPPeriphID0-3 on page 3-13</description>
69736                <resetValue>0x00000010</resetValue>
69737                <fields>
69738                    <field>
69739                        <name>DESIGNER0</name>
69740                        <description>These bits read back as 0x1</description>
69741                        <bitRange>[7:4]</bitRange>
69742                        <access>read-only</access>
69743                    </field>
69744                    <field>
69745                        <name>PARTNUMBER1</name>
69746                        <description>These bits read back as 0x0</description>
69747                        <bitRange>[3:0]</bitRange>
69748                        <access>read-only</access>
69749                    </field>
69750                </fields>
69751            </register>
69752            <register>
69753                <name>SSPPERIPHID2</name>
69754                <addressOffset>0x00000fe8</addressOffset>
69755                <description>Peripheral identification registers, SSPPeriphID0-3 on page 3-13</description>
69756                <resetValue>0x00000034</resetValue>
69757                <fields>
69758                    <field>
69759                        <name>REVISION</name>
69760                        <description>These bits return the peripheral revision</description>
69761                        <bitRange>[7:4]</bitRange>
69762                        <access>read-only</access>
69763                    </field>
69764                    <field>
69765                        <name>DESIGNER1</name>
69766                        <description>These bits read back as 0x4</description>
69767                        <bitRange>[3:0]</bitRange>
69768                        <access>read-only</access>
69769                    </field>
69770                </fields>
69771            </register>
69772            <register>
69773                <name>SSPPERIPHID3</name>
69774                <addressOffset>0x00000fec</addressOffset>
69775                <description>Peripheral identification registers, SSPPeriphID0-3 on page 3-13</description>
69776                <resetValue>0x00000000</resetValue>
69777                <fields>
69778                    <field>
69779                        <name>CONFIGURATION</name>
69780                        <description>These bits read back as 0x00</description>
69781                        <bitRange>[7:0]</bitRange>
69782                        <access>read-only</access>
69783                    </field>
69784                </fields>
69785            </register>
69786            <register>
69787                <name>SSPPCELLID0</name>
69788                <addressOffset>0x00000ff0</addressOffset>
69789                <description>PrimeCell identification registers, SSPPCellID0-3 on page 3-16</description>
69790                <resetValue>0x0000000d</resetValue>
69791                <fields>
69792                    <field>
69793                        <name>SSPPCELLID0</name>
69794                        <description>These bits read back as 0x0D</description>
69795                        <bitRange>[7:0]</bitRange>
69796                        <access>read-only</access>
69797                    </field>
69798                </fields>
69799            </register>
69800            <register>
69801                <name>SSPPCELLID1</name>
69802                <addressOffset>0x00000ff4</addressOffset>
69803                <description>PrimeCell identification registers, SSPPCellID0-3 on page 3-16</description>
69804                <resetValue>0x000000f0</resetValue>
69805                <fields>
69806                    <field>
69807                        <name>SSPPCELLID1</name>
69808                        <description>These bits read back as 0xF0</description>
69809                        <bitRange>[7:0]</bitRange>
69810                        <access>read-only</access>
69811                    </field>
69812                </fields>
69813            </register>
69814            <register>
69815                <name>SSPPCELLID2</name>
69816                <addressOffset>0x00000ff8</addressOffset>
69817                <description>PrimeCell identification registers, SSPPCellID0-3 on page 3-16</description>
69818                <resetValue>0x00000005</resetValue>
69819                <fields>
69820                    <field>
69821                        <name>SSPPCELLID2</name>
69822                        <description>These bits read back as 0x05</description>
69823                        <bitRange>[7:0]</bitRange>
69824                        <access>read-only</access>
69825                    </field>
69826                </fields>
69827            </register>
69828            <register>
69829                <name>SSPPCELLID3</name>
69830                <addressOffset>0x00000ffc</addressOffset>
69831                <description>PrimeCell identification registers, SSPPCellID0-3 on page 3-16</description>
69832                <resetValue>0x000000b1</resetValue>
69833                <fields>
69834                    <field>
69835                        <name>SSPPCELLID3</name>
69836                        <description>These bits read back as 0xB1</description>
69837                        <bitRange>[7:0]</bitRange>
69838                        <access>read-only</access>
69839                    </field>
69840                </fields>
69841            </register>
69842        </registers>
69843    </peripheral>
69844    <peripheral derivedFrom="SPI0">
69845        <name>SPI1</name>
69846        <baseAddress>0x40088000</baseAddress>
69847        <interrupt>
69848        <name>SPI1_IRQ</name>
69849        <value>32</value>
69850    </interrupt>
69851    </peripheral>
69852    <peripheral>
69853        <name>PIO0</name>
69854        <description>Programmable IO block</description>
69855        <baseAddress>0x50200000</baseAddress>
69856        <addressBlock>
69857            <offset>0</offset>
69858            <size>392</size>
69859            <usage>registers</usage>
69860        </addressBlock>
69861        <interrupt>
69862            <name>PIO0_IRQ_0</name>
69863            <value>15</value>
69864        </interrupt>
69865        <interrupt>
69866            <name>PIO0_IRQ_1</name>
69867            <value>16</value>
69868        </interrupt>
69869        <registers>
69870            <register>
69871                <name>CTRL</name>
69872                <addressOffset>0x00000000</addressOffset>
69873                <description>PIO control register</description>
69874                <resetValue>0x00000000</resetValue>
69875                <fields>
69876                    <field>
69877                        <name>NEXTPREV_CLKDIV_RESTART</name>
69878                        <description>Write 1 to restart the clock dividers of state machines in neighbouring PIO blocks, as specified by NEXT_PIO_MASK and PREV_PIO_MASK in the same write.
69879
69880                            This is equivalent to writing 1 to the corresponding CLKDIV_RESTART bits in those PIOs&#39; CTRL registers.</description>
69881                        <bitRange>[26:26]</bitRange>
69882                        <access>write-only</access>
69883                    </field>
69884                    <field>
69885                        <name>NEXTPREV_SM_DISABLE</name>
69886                        <description>Write 1 to disable state machines in neighbouring PIO blocks, as specified by NEXT_PIO_MASK and PREV_PIO_MASK in the same write.
69887
69888                            This is equivalent to clearing the corresponding SM_ENABLE bits in those PIOs&#39; CTRL registers.</description>
69889                        <bitRange>[25:25]</bitRange>
69890                        <access>write-only</access>
69891                    </field>
69892                    <field>
69893                        <name>NEXTPREV_SM_ENABLE</name>
69894                        <description>Write 1 to enable state machines in neighbouring PIO blocks, as specified by NEXT_PIO_MASK and PREV_PIO_MASK in the same write.
69895
69896                            This is equivalent to setting the corresponding SM_ENABLE bits in those PIOs&#39; CTRL registers.
69897
69898                            If both OTHERS_SM_ENABLE and OTHERS_SM_DISABLE are set, the disable takes precedence.</description>
69899                        <bitRange>[24:24]</bitRange>
69900                        <access>write-only</access>
69901                    </field>
69902                    <field>
69903                        <name>NEXT_PIO_MASK</name>
69904                        <description>A mask of state machines in the neighbouring higher-numbered PIO block in the system (or PIO block 0 if this is the highest-numbered PIO block) to which to apply the operations specified by NEXTPREV_CLKDIV_RESTART, NEXTPREV_SM_ENABLE, and NEXTPREV_SM_DISABLE in the same write.
69905
69906                            This allows state machines in a neighbouring PIO block to be started/stopped/clock-synced exactly simultaneously with a write to this PIO block&#39;s CTRL register.
69907
69908                            Note that in a system with two PIOs, NEXT_PIO_MASK and PREV_PIO_MASK actually indicate the same PIO block. In this case the effects are applied cumulatively (as though the masks were OR&#39;d together).
69909
69910                            Neighbouring PIO blocks are disconnected (status signals tied to 0 and control signals ignored) if one block is accessible to NonSecure code, and one is not.</description>
69911                        <bitRange>[23:20]</bitRange>
69912                        <access>write-only</access>
69913                    </field>
69914                    <field>
69915                        <name>PREV_PIO_MASK</name>
69916                        <description>A mask of state machines in the neighbouring lower-numbered PIO block in the system (or the highest-numbered PIO block if this is PIO block 0) to which to apply the operations specified by OP_CLKDIV_RESTART, OP_ENABLE, OP_DISABLE in the same write.
69917
69918                            This allows state machines in a neighbouring PIO block to be started/stopped/clock-synced exactly simultaneously with a write to this PIO block&#39;s CTRL register.
69919
69920                            Neighbouring PIO blocks are disconnected (status signals tied to 0 and control signals ignored) if one block is accessible to NonSecure code, and one is not.</description>
69921                        <bitRange>[19:16]</bitRange>
69922                        <access>write-only</access>
69923                    </field>
69924                    <field>
69925                        <name>CLKDIV_RESTART</name>
69926                        <description>Restart a state machine&#39;s clock divider from an initial phase of 0. Clock dividers are free-running, so once started, their output (including fractional jitter) is completely determined by the integer/fractional divisor configured in SMx_CLKDIV. This means that, if multiple clock dividers with the same divisor are restarted simultaneously, by writing multiple 1 bits to this field, the execution clocks of those state machines will run in precise lockstep.
69927
69928                            Note that setting/clearing SM_ENABLE does not stop the clock divider from running, so once multiple state machines&#39; clocks are synchronised, it is safe to disable/reenable a state machine, whilst keeping the clock dividers in sync.
69929
69930                            Note also that CLKDIV_RESTART can be written to whilst the state machine is running, and this is useful to resynchronise clock dividers after the divisors (SMx_CLKDIV) have been changed on-the-fly.</description>
69931                        <bitRange>[11:8]</bitRange>
69932                        <access>write-only</access>
69933                    </field>
69934                    <field>
69935                        <name>SM_RESTART</name>
69936                        <description>Write 1 to instantly clear internal SM state which may be otherwise difficult to access and will affect future execution.
69937
69938                            Specifically, the following are cleared: input and output shift counters; the contents of the input shift register; the delay counter; the waiting-on-IRQ state; any stalled instruction written to SMx_INSTR or run by OUT/MOV EXEC; any pin write left asserted due to OUT_STICKY.
69939
69940                            The contents of the output shift register and the X/Y scratch registers are not affected.</description>
69941                        <bitRange>[7:4]</bitRange>
69942                        <access>write-only</access>
69943                    </field>
69944                    <field>
69945                        <name>SM_ENABLE</name>
69946                        <description>Enable/disable each of the four state machines by writing 1/0 to each of these four bits. When disabled, a state machine will cease executing instructions, except those written directly to SMx_INSTR by the system. Multiple bits can be set/cleared at once to run/halt multiple state machines simultaneously.</description>
69947                        <bitRange>[3:0]</bitRange>
69948                        <access>read-write</access>
69949                    </field>
69950                </fields>
69951            </register>
69952            <register>
69953                <name>FSTAT</name>
69954                <addressOffset>0x00000004</addressOffset>
69955                <description>FIFO status register</description>
69956                <resetValue>0x0f000f00</resetValue>
69957                <fields>
69958                    <field>
69959                        <name>TXEMPTY</name>
69960                        <description>State machine TX FIFO is empty</description>
69961                        <bitRange>[27:24]</bitRange>
69962                        <access>read-only</access>
69963                    </field>
69964                    <field>
69965                        <name>TXFULL</name>
69966                        <description>State machine TX FIFO is full</description>
69967                        <bitRange>[19:16]</bitRange>
69968                        <access>read-only</access>
69969                    </field>
69970                    <field>
69971                        <name>RXEMPTY</name>
69972                        <description>State machine RX FIFO is empty</description>
69973                        <bitRange>[11:8]</bitRange>
69974                        <access>read-only</access>
69975                    </field>
69976                    <field>
69977                        <name>RXFULL</name>
69978                        <description>State machine RX FIFO is full</description>
69979                        <bitRange>[3:0]</bitRange>
69980                        <access>read-only</access>
69981                    </field>
69982                </fields>
69983            </register>
69984            <register>
69985                <name>FDEBUG</name>
69986                <addressOffset>0x00000008</addressOffset>
69987                <description>FIFO debug register</description>
69988                <resetValue>0x00000000</resetValue>
69989                <fields>
69990                    <field>
69991                        <name>TXSTALL</name>
69992                        <description>State machine has stalled on empty TX FIFO during a blocking PULL, or an OUT with autopull enabled. Write 1 to clear.</description>
69993                        <bitRange>[27:24]</bitRange>
69994                        <access>read-write</access>
69995                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
69996                    </field>
69997                    <field>
69998                        <name>TXOVER</name>
69999                        <description>TX FIFO overflow (i.e. write-on-full by the system) has occurred. Write 1 to clear. Note that write-on-full does not alter the state or contents of the FIFO in any way, but the data that the system attempted to write is dropped, so if this flag is set, your software has quite likely dropped some data on the floor.</description>
70000                        <bitRange>[19:16]</bitRange>
70001                        <access>read-write</access>
70002                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
70003                    </field>
70004                    <field>
70005                        <name>RXUNDER</name>
70006                        <description>RX FIFO underflow (i.e. read-on-empty by the system) has occurred. Write 1 to clear. Note that read-on-empty does not perturb the state of the FIFO in any way, but the data returned by reading from an empty FIFO is undefined, so this flag generally only becomes set due to some kind of software error.</description>
70007                        <bitRange>[11:8]</bitRange>
70008                        <access>read-write</access>
70009                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
70010                    </field>
70011                    <field>
70012                        <name>RXSTALL</name>
70013                        <description>State machine has stalled on full RX FIFO during a blocking PUSH, or an IN with autopush enabled. This flag is also set when a nonblocking PUSH to a full FIFO took place, in which case the state machine has dropped data. Write 1 to clear.</description>
70014                        <bitRange>[3:0]</bitRange>
70015                        <access>read-write</access>
70016                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
70017                    </field>
70018                </fields>
70019            </register>
70020            <register>
70021                <name>FLEVEL</name>
70022                <addressOffset>0x0000000c</addressOffset>
70023                <description>FIFO levels</description>
70024                <resetValue>0x00000000</resetValue>
70025                <fields>
70026                    <field>
70027                        <name>RX3</name>
70028                        <bitRange>[31:28]</bitRange>
70029                        <access>read-only</access>
70030                    </field>
70031                    <field>
70032                        <name>TX3</name>
70033                        <bitRange>[27:24]</bitRange>
70034                        <access>read-only</access>
70035                    </field>
70036                    <field>
70037                        <name>RX2</name>
70038                        <bitRange>[23:20]</bitRange>
70039                        <access>read-only</access>
70040                    </field>
70041                    <field>
70042                        <name>TX2</name>
70043                        <bitRange>[19:16]</bitRange>
70044                        <access>read-only</access>
70045                    </field>
70046                    <field>
70047                        <name>RX1</name>
70048                        <bitRange>[15:12]</bitRange>
70049                        <access>read-only</access>
70050                    </field>
70051                    <field>
70052                        <name>TX1</name>
70053                        <bitRange>[11:8]</bitRange>
70054                        <access>read-only</access>
70055                    </field>
70056                    <field>
70057                        <name>RX0</name>
70058                        <bitRange>[7:4]</bitRange>
70059                        <access>read-only</access>
70060                    </field>
70061                    <field>
70062                        <name>TX0</name>
70063                        <bitRange>[3:0]</bitRange>
70064                        <access>read-only</access>
70065                    </field>
70066                </fields>
70067            </register>
70068            <register>
70069                <name>TXF0</name>
70070                <addressOffset>0x00000010</addressOffset>
70071                <description>Direct write access to the TX FIFO for this state machine. Each write pushes one word to the FIFO. Attempting to write to a full FIFO has no effect on the FIFO state or contents, and sets the sticky FDEBUG_TXOVER error flag for this FIFO.</description>
70072                <resetValue>0x00000000</resetValue>
70073                <fields>
70074                    <field>
70075                        <name>TXF0</name>
70076                        <bitRange>[31:0]</bitRange>
70077                        <access>write-only</access>
70078                    </field>
70079                </fields>
70080            </register>
70081            <register>
70082                <name>TXF1</name>
70083                <addressOffset>0x00000014</addressOffset>
70084                <description>Direct write access to the TX FIFO for this state machine. Each write pushes one word to the FIFO. Attempting to write to a full FIFO has no effect on the FIFO state or contents, and sets the sticky FDEBUG_TXOVER error flag for this FIFO.</description>
70085                <resetValue>0x00000000</resetValue>
70086                <fields>
70087                    <field>
70088                        <name>TXF1</name>
70089                        <bitRange>[31:0]</bitRange>
70090                        <access>write-only</access>
70091                    </field>
70092                </fields>
70093            </register>
70094            <register>
70095                <name>TXF2</name>
70096                <addressOffset>0x00000018</addressOffset>
70097                <description>Direct write access to the TX FIFO for this state machine. Each write pushes one word to the FIFO. Attempting to write to a full FIFO has no effect on the FIFO state or contents, and sets the sticky FDEBUG_TXOVER error flag for this FIFO.</description>
70098                <resetValue>0x00000000</resetValue>
70099                <fields>
70100                    <field>
70101                        <name>TXF2</name>
70102                        <bitRange>[31:0]</bitRange>
70103                        <access>write-only</access>
70104                    </field>
70105                </fields>
70106            </register>
70107            <register>
70108                <name>TXF3</name>
70109                <addressOffset>0x0000001c</addressOffset>
70110                <description>Direct write access to the TX FIFO for this state machine. Each write pushes one word to the FIFO. Attempting to write to a full FIFO has no effect on the FIFO state or contents, and sets the sticky FDEBUG_TXOVER error flag for this FIFO.</description>
70111                <resetValue>0x00000000</resetValue>
70112                <fields>
70113                    <field>
70114                        <name>TXF3</name>
70115                        <bitRange>[31:0]</bitRange>
70116                        <access>write-only</access>
70117                    </field>
70118                </fields>
70119            </register>
70120            <register>
70121                <name>RXF0</name>
70122                <addressOffset>0x00000020</addressOffset>
70123                <description>Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO. Attempting to read from an empty FIFO has no effect on the FIFO state, and sets the sticky FDEBUG_RXUNDER error flag for this FIFO. The data returned to the system on a read from an empty FIFO is undefined.</description>
70124                <resetMask>0x00000000</resetMask>
70125                <fields>
70126                    <field>
70127                        <name>RXF0</name>
70128                        <bitRange>[31:0]</bitRange>
70129                        <access>read-only</access>
70130                        <readAction>modify</readAction>
70131                    </field>
70132                </fields>
70133            </register>
70134            <register>
70135                <name>RXF1</name>
70136                <addressOffset>0x00000024</addressOffset>
70137                <description>Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO. Attempting to read from an empty FIFO has no effect on the FIFO state, and sets the sticky FDEBUG_RXUNDER error flag for this FIFO. The data returned to the system on a read from an empty FIFO is undefined.</description>
70138                <resetMask>0x00000000</resetMask>
70139                <fields>
70140                    <field>
70141                        <name>RXF1</name>
70142                        <bitRange>[31:0]</bitRange>
70143                        <access>read-only</access>
70144                        <readAction>modify</readAction>
70145                    </field>
70146                </fields>
70147            </register>
70148            <register>
70149                <name>RXF2</name>
70150                <addressOffset>0x00000028</addressOffset>
70151                <description>Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO. Attempting to read from an empty FIFO has no effect on the FIFO state, and sets the sticky FDEBUG_RXUNDER error flag for this FIFO. The data returned to the system on a read from an empty FIFO is undefined.</description>
70152                <resetMask>0x00000000</resetMask>
70153                <fields>
70154                    <field>
70155                        <name>RXF2</name>
70156                        <bitRange>[31:0]</bitRange>
70157                        <access>read-only</access>
70158                        <readAction>modify</readAction>
70159                    </field>
70160                </fields>
70161            </register>
70162            <register>
70163                <name>RXF3</name>
70164                <addressOffset>0x0000002c</addressOffset>
70165                <description>Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO. Attempting to read from an empty FIFO has no effect on the FIFO state, and sets the sticky FDEBUG_RXUNDER error flag for this FIFO. The data returned to the system on a read from an empty FIFO is undefined.</description>
70166                <resetMask>0x00000000</resetMask>
70167                <fields>
70168                    <field>
70169                        <name>RXF3</name>
70170                        <bitRange>[31:0]</bitRange>
70171                        <access>read-only</access>
70172                        <readAction>modify</readAction>
70173                    </field>
70174                </fields>
70175            </register>
70176            <register>
70177                <name>IRQ</name>
70178                <addressOffset>0x00000030</addressOffset>
70179                <description>State machine IRQ flags register. Write 1 to clear. There are eight state machine IRQ flags, which can be set, cleared, and waited on by the state machines. There&#39;s no fixed association between flags and state machines -- any state machine can use any flag.
70180
70181                    Any of the eight flags can be used for timing synchronisation between state machines, using IRQ and WAIT instructions. Any combination of the eight flags can also routed out to either of the two system-level interrupt requests, alongside FIFO status interrupts -- see e.g. IRQ0_INTE.</description>
70182                <resetValue>0x00000000</resetValue>
70183                <fields>
70184                    <field>
70185                        <name>IRQ</name>
70186                        <bitRange>[7:0]</bitRange>
70187                        <access>read-write</access>
70188                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
70189                    </field>
70190                </fields>
70191            </register>
70192            <register>
70193                <name>IRQ_FORCE</name>
70194                <addressOffset>0x00000034</addressOffset>
70195                <description>Writing a 1 to each of these bits will forcibly assert the corresponding IRQ. Note this is different to the INTF register: writing here affects PIO internal state. INTF just asserts the processor-facing IRQ signal for testing ISRs, and is not visible to the state machines.</description>
70196                <resetValue>0x00000000</resetValue>
70197                <fields>
70198                    <field>
70199                        <name>IRQ_FORCE</name>
70200                        <bitRange>[7:0]</bitRange>
70201                        <access>write-only</access>
70202                    </field>
70203                </fields>
70204            </register>
70205            <register>
70206                <name>INPUT_SYNC_BYPASS</name>
70207                <addressOffset>0x00000038</addressOffset>
70208                <description>There is a 2-flipflop synchronizer on each GPIO input, which protects PIO logic from metastabilities. This increases input delay, and for fast synchronous IO (e.g. SPI) these synchronizers may need to be bypassed. Each bit in this register corresponds to one GPIO.
70209                    0 -&gt; input is synchronized (default)
70210                    1 -&gt; synchronizer is bypassed
70211                    If in doubt, leave this register as all zeroes.</description>
70212                <resetValue>0x00000000</resetValue>
70213                <fields>
70214                    <field>
70215                        <name>INPUT_SYNC_BYPASS</name>
70216                        <bitRange>[31:0]</bitRange>
70217                        <access>read-write</access>
70218                    </field>
70219                </fields>
70220            </register>
70221            <register>
70222                <name>DBG_PADOUT</name>
70223                <addressOffset>0x0000003c</addressOffset>
70224                <description>Read to sample the pad output values PIO is currently driving to the GPIOs. On RP2040 there are 30 GPIOs, so the two most significant bits are hardwired to 0.</description>
70225                <resetValue>0x00000000</resetValue>
70226                <fields>
70227                    <field>
70228                        <name>DBG_PADOUT</name>
70229                        <bitRange>[31:0]</bitRange>
70230                        <access>read-only</access>
70231                    </field>
70232                </fields>
70233            </register>
70234            <register>
70235                <name>DBG_PADOE</name>
70236                <addressOffset>0x00000040</addressOffset>
70237                <description>Read to sample the pad output enables (direction) PIO is currently driving to the GPIOs. On RP2040 there are 30 GPIOs, so the two most significant bits are hardwired to 0.</description>
70238                <resetValue>0x00000000</resetValue>
70239                <fields>
70240                    <field>
70241                        <name>DBG_PADOE</name>
70242                        <bitRange>[31:0]</bitRange>
70243                        <access>read-only</access>
70244                    </field>
70245                </fields>
70246            </register>
70247            <register>
70248                <name>DBG_CFGINFO</name>
70249                <addressOffset>0x00000044</addressOffset>
70250                <description>The PIO hardware has some free parameters that may vary between chip products.
70251                    These should be provided in the chip datasheet, but are also exposed here.</description>
70252                <resetValue>0x10000000</resetValue>
70253                <fields>
70254                    <field>
70255                        <name>VERSION</name>
70256                        <description>Version of the core PIO hardware.</description>
70257                        <bitRange>[31:28]</bitRange>
70258                        <access>read-only</access>
70259                        <enumeratedValues>
70260                            <enumeratedValue>
70261                                <name>v0</name>
70262                                <value>0</value>
70263                                <description>Version 0 (RP2040)</description>
70264                            </enumeratedValue>
70265                            <enumeratedValue>
70266                                <name>v1</name>
70267                                <value>1</value>
70268                                <description>Version 1 (RP2350)</description>
70269                            </enumeratedValue>
70270                        </enumeratedValues>
70271                    </field>
70272                    <field>
70273                        <name>IMEM_SIZE</name>
70274                        <description>The size of the instruction memory, measured in units of one instruction</description>
70275                        <bitRange>[21:16]</bitRange>
70276                        <access>read-only</access>
70277                    </field>
70278                    <field>
70279                        <name>SM_COUNT</name>
70280                        <description>The number of state machines this PIO instance is equipped with.</description>
70281                        <bitRange>[11:8]</bitRange>
70282                        <access>read-only</access>
70283                    </field>
70284                    <field>
70285                        <name>FIFO_DEPTH</name>
70286                        <description>The depth of the state machine TX/RX FIFOs, measured in words.
70287                            Joining fifos via SHIFTCTRL_FJOIN gives one FIFO with double
70288                            this depth.</description>
70289                        <bitRange>[5:0]</bitRange>
70290                        <access>read-only</access>
70291                    </field>
70292                </fields>
70293            </register>
70294            <register>
70295                <name>INSTR_MEM0</name>
70296                <addressOffset>0x00000048</addressOffset>
70297                <description>Write-only access to instruction memory location 0</description>
70298                <resetValue>0x00000000</resetValue>
70299                <fields>
70300                    <field>
70301                        <name>INSTR_MEM0</name>
70302                        <bitRange>[15:0]</bitRange>
70303                        <access>write-only</access>
70304                    </field>
70305                </fields>
70306            </register>
70307            <register>
70308                <name>INSTR_MEM1</name>
70309                <addressOffset>0x0000004c</addressOffset>
70310                <description>Write-only access to instruction memory location 1</description>
70311                <resetValue>0x00000000</resetValue>
70312                <fields>
70313                    <field>
70314                        <name>INSTR_MEM1</name>
70315                        <bitRange>[15:0]</bitRange>
70316                        <access>write-only</access>
70317                    </field>
70318                </fields>
70319            </register>
70320            <register>
70321                <name>INSTR_MEM2</name>
70322                <addressOffset>0x00000050</addressOffset>
70323                <description>Write-only access to instruction memory location 2</description>
70324                <resetValue>0x00000000</resetValue>
70325                <fields>
70326                    <field>
70327                        <name>INSTR_MEM2</name>
70328                        <bitRange>[15:0]</bitRange>
70329                        <access>write-only</access>
70330                    </field>
70331                </fields>
70332            </register>
70333            <register>
70334                <name>INSTR_MEM3</name>
70335                <addressOffset>0x00000054</addressOffset>
70336                <description>Write-only access to instruction memory location 3</description>
70337                <resetValue>0x00000000</resetValue>
70338                <fields>
70339                    <field>
70340                        <name>INSTR_MEM3</name>
70341                        <bitRange>[15:0]</bitRange>
70342                        <access>write-only</access>
70343                    </field>
70344                </fields>
70345            </register>
70346            <register>
70347                <name>INSTR_MEM4</name>
70348                <addressOffset>0x00000058</addressOffset>
70349                <description>Write-only access to instruction memory location 4</description>
70350                <resetValue>0x00000000</resetValue>
70351                <fields>
70352                    <field>
70353                        <name>INSTR_MEM4</name>
70354                        <bitRange>[15:0]</bitRange>
70355                        <access>write-only</access>
70356                    </field>
70357                </fields>
70358            </register>
70359            <register>
70360                <name>INSTR_MEM5</name>
70361                <addressOffset>0x0000005c</addressOffset>
70362                <description>Write-only access to instruction memory location 5</description>
70363                <resetValue>0x00000000</resetValue>
70364                <fields>
70365                    <field>
70366                        <name>INSTR_MEM5</name>
70367                        <bitRange>[15:0]</bitRange>
70368                        <access>write-only</access>
70369                    </field>
70370                </fields>
70371            </register>
70372            <register>
70373                <name>INSTR_MEM6</name>
70374                <addressOffset>0x00000060</addressOffset>
70375                <description>Write-only access to instruction memory location 6</description>
70376                <resetValue>0x00000000</resetValue>
70377                <fields>
70378                    <field>
70379                        <name>INSTR_MEM6</name>
70380                        <bitRange>[15:0]</bitRange>
70381                        <access>write-only</access>
70382                    </field>
70383                </fields>
70384            </register>
70385            <register>
70386                <name>INSTR_MEM7</name>
70387                <addressOffset>0x00000064</addressOffset>
70388                <description>Write-only access to instruction memory location 7</description>
70389                <resetValue>0x00000000</resetValue>
70390                <fields>
70391                    <field>
70392                        <name>INSTR_MEM7</name>
70393                        <bitRange>[15:0]</bitRange>
70394                        <access>write-only</access>
70395                    </field>
70396                </fields>
70397            </register>
70398            <register>
70399                <name>INSTR_MEM8</name>
70400                <addressOffset>0x00000068</addressOffset>
70401                <description>Write-only access to instruction memory location 8</description>
70402                <resetValue>0x00000000</resetValue>
70403                <fields>
70404                    <field>
70405                        <name>INSTR_MEM8</name>
70406                        <bitRange>[15:0]</bitRange>
70407                        <access>write-only</access>
70408                    </field>
70409                </fields>
70410            </register>
70411            <register>
70412                <name>INSTR_MEM9</name>
70413                <addressOffset>0x0000006c</addressOffset>
70414                <description>Write-only access to instruction memory location 9</description>
70415                <resetValue>0x00000000</resetValue>
70416                <fields>
70417                    <field>
70418                        <name>INSTR_MEM9</name>
70419                        <bitRange>[15:0]</bitRange>
70420                        <access>write-only</access>
70421                    </field>
70422                </fields>
70423            </register>
70424            <register>
70425                <name>INSTR_MEM10</name>
70426                <addressOffset>0x00000070</addressOffset>
70427                <description>Write-only access to instruction memory location 10</description>
70428                <resetValue>0x00000000</resetValue>
70429                <fields>
70430                    <field>
70431                        <name>INSTR_MEM10</name>
70432                        <bitRange>[15:0]</bitRange>
70433                        <access>write-only</access>
70434                    </field>
70435                </fields>
70436            </register>
70437            <register>
70438                <name>INSTR_MEM11</name>
70439                <addressOffset>0x00000074</addressOffset>
70440                <description>Write-only access to instruction memory location 11</description>
70441                <resetValue>0x00000000</resetValue>
70442                <fields>
70443                    <field>
70444                        <name>INSTR_MEM11</name>
70445                        <bitRange>[15:0]</bitRange>
70446                        <access>write-only</access>
70447                    </field>
70448                </fields>
70449            </register>
70450            <register>
70451                <name>INSTR_MEM12</name>
70452                <addressOffset>0x00000078</addressOffset>
70453                <description>Write-only access to instruction memory location 12</description>
70454                <resetValue>0x00000000</resetValue>
70455                <fields>
70456                    <field>
70457                        <name>INSTR_MEM12</name>
70458                        <bitRange>[15:0]</bitRange>
70459                        <access>write-only</access>
70460                    </field>
70461                </fields>
70462            </register>
70463            <register>
70464                <name>INSTR_MEM13</name>
70465                <addressOffset>0x0000007c</addressOffset>
70466                <description>Write-only access to instruction memory location 13</description>
70467                <resetValue>0x00000000</resetValue>
70468                <fields>
70469                    <field>
70470                        <name>INSTR_MEM13</name>
70471                        <bitRange>[15:0]</bitRange>
70472                        <access>write-only</access>
70473                    </field>
70474                </fields>
70475            </register>
70476            <register>
70477                <name>INSTR_MEM14</name>
70478                <addressOffset>0x00000080</addressOffset>
70479                <description>Write-only access to instruction memory location 14</description>
70480                <resetValue>0x00000000</resetValue>
70481                <fields>
70482                    <field>
70483                        <name>INSTR_MEM14</name>
70484                        <bitRange>[15:0]</bitRange>
70485                        <access>write-only</access>
70486                    </field>
70487                </fields>
70488            </register>
70489            <register>
70490                <name>INSTR_MEM15</name>
70491                <addressOffset>0x00000084</addressOffset>
70492                <description>Write-only access to instruction memory location 15</description>
70493                <resetValue>0x00000000</resetValue>
70494                <fields>
70495                    <field>
70496                        <name>INSTR_MEM15</name>
70497                        <bitRange>[15:0]</bitRange>
70498                        <access>write-only</access>
70499                    </field>
70500                </fields>
70501            </register>
70502            <register>
70503                <name>INSTR_MEM16</name>
70504                <addressOffset>0x00000088</addressOffset>
70505                <description>Write-only access to instruction memory location 16</description>
70506                <resetValue>0x00000000</resetValue>
70507                <fields>
70508                    <field>
70509                        <name>INSTR_MEM16</name>
70510                        <bitRange>[15:0]</bitRange>
70511                        <access>write-only</access>
70512                    </field>
70513                </fields>
70514            </register>
70515            <register>
70516                <name>INSTR_MEM17</name>
70517                <addressOffset>0x0000008c</addressOffset>
70518                <description>Write-only access to instruction memory location 17</description>
70519                <resetValue>0x00000000</resetValue>
70520                <fields>
70521                    <field>
70522                        <name>INSTR_MEM17</name>
70523                        <bitRange>[15:0]</bitRange>
70524                        <access>write-only</access>
70525                    </field>
70526                </fields>
70527            </register>
70528            <register>
70529                <name>INSTR_MEM18</name>
70530                <addressOffset>0x00000090</addressOffset>
70531                <description>Write-only access to instruction memory location 18</description>
70532                <resetValue>0x00000000</resetValue>
70533                <fields>
70534                    <field>
70535                        <name>INSTR_MEM18</name>
70536                        <bitRange>[15:0]</bitRange>
70537                        <access>write-only</access>
70538                    </field>
70539                </fields>
70540            </register>
70541            <register>
70542                <name>INSTR_MEM19</name>
70543                <addressOffset>0x00000094</addressOffset>
70544                <description>Write-only access to instruction memory location 19</description>
70545                <resetValue>0x00000000</resetValue>
70546                <fields>
70547                    <field>
70548                        <name>INSTR_MEM19</name>
70549                        <bitRange>[15:0]</bitRange>
70550                        <access>write-only</access>
70551                    </field>
70552                </fields>
70553            </register>
70554            <register>
70555                <name>INSTR_MEM20</name>
70556                <addressOffset>0x00000098</addressOffset>
70557                <description>Write-only access to instruction memory location 20</description>
70558                <resetValue>0x00000000</resetValue>
70559                <fields>
70560                    <field>
70561                        <name>INSTR_MEM20</name>
70562                        <bitRange>[15:0]</bitRange>
70563                        <access>write-only</access>
70564                    </field>
70565                </fields>
70566            </register>
70567            <register>
70568                <name>INSTR_MEM21</name>
70569                <addressOffset>0x0000009c</addressOffset>
70570                <description>Write-only access to instruction memory location 21</description>
70571                <resetValue>0x00000000</resetValue>
70572                <fields>
70573                    <field>
70574                        <name>INSTR_MEM21</name>
70575                        <bitRange>[15:0]</bitRange>
70576                        <access>write-only</access>
70577                    </field>
70578                </fields>
70579            </register>
70580            <register>
70581                <name>INSTR_MEM22</name>
70582                <addressOffset>0x000000a0</addressOffset>
70583                <description>Write-only access to instruction memory location 22</description>
70584                <resetValue>0x00000000</resetValue>
70585                <fields>
70586                    <field>
70587                        <name>INSTR_MEM22</name>
70588                        <bitRange>[15:0]</bitRange>
70589                        <access>write-only</access>
70590                    </field>
70591                </fields>
70592            </register>
70593            <register>
70594                <name>INSTR_MEM23</name>
70595                <addressOffset>0x000000a4</addressOffset>
70596                <description>Write-only access to instruction memory location 23</description>
70597                <resetValue>0x00000000</resetValue>
70598                <fields>
70599                    <field>
70600                        <name>INSTR_MEM23</name>
70601                        <bitRange>[15:0]</bitRange>
70602                        <access>write-only</access>
70603                    </field>
70604                </fields>
70605            </register>
70606            <register>
70607                <name>INSTR_MEM24</name>
70608                <addressOffset>0x000000a8</addressOffset>
70609                <description>Write-only access to instruction memory location 24</description>
70610                <resetValue>0x00000000</resetValue>
70611                <fields>
70612                    <field>
70613                        <name>INSTR_MEM24</name>
70614                        <bitRange>[15:0]</bitRange>
70615                        <access>write-only</access>
70616                    </field>
70617                </fields>
70618            </register>
70619            <register>
70620                <name>INSTR_MEM25</name>
70621                <addressOffset>0x000000ac</addressOffset>
70622                <description>Write-only access to instruction memory location 25</description>
70623                <resetValue>0x00000000</resetValue>
70624                <fields>
70625                    <field>
70626                        <name>INSTR_MEM25</name>
70627                        <bitRange>[15:0]</bitRange>
70628                        <access>write-only</access>
70629                    </field>
70630                </fields>
70631            </register>
70632            <register>
70633                <name>INSTR_MEM26</name>
70634                <addressOffset>0x000000b0</addressOffset>
70635                <description>Write-only access to instruction memory location 26</description>
70636                <resetValue>0x00000000</resetValue>
70637                <fields>
70638                    <field>
70639                        <name>INSTR_MEM26</name>
70640                        <bitRange>[15:0]</bitRange>
70641                        <access>write-only</access>
70642                    </field>
70643                </fields>
70644            </register>
70645            <register>
70646                <name>INSTR_MEM27</name>
70647                <addressOffset>0x000000b4</addressOffset>
70648                <description>Write-only access to instruction memory location 27</description>
70649                <resetValue>0x00000000</resetValue>
70650                <fields>
70651                    <field>
70652                        <name>INSTR_MEM27</name>
70653                        <bitRange>[15:0]</bitRange>
70654                        <access>write-only</access>
70655                    </field>
70656                </fields>
70657            </register>
70658            <register>
70659                <name>INSTR_MEM28</name>
70660                <addressOffset>0x000000b8</addressOffset>
70661                <description>Write-only access to instruction memory location 28</description>
70662                <resetValue>0x00000000</resetValue>
70663                <fields>
70664                    <field>
70665                        <name>INSTR_MEM28</name>
70666                        <bitRange>[15:0]</bitRange>
70667                        <access>write-only</access>
70668                    </field>
70669                </fields>
70670            </register>
70671            <register>
70672                <name>INSTR_MEM29</name>
70673                <addressOffset>0x000000bc</addressOffset>
70674                <description>Write-only access to instruction memory location 29</description>
70675                <resetValue>0x00000000</resetValue>
70676                <fields>
70677                    <field>
70678                        <name>INSTR_MEM29</name>
70679                        <bitRange>[15:0]</bitRange>
70680                        <access>write-only</access>
70681                    </field>
70682                </fields>
70683            </register>
70684            <register>
70685                <name>INSTR_MEM30</name>
70686                <addressOffset>0x000000c0</addressOffset>
70687                <description>Write-only access to instruction memory location 30</description>
70688                <resetValue>0x00000000</resetValue>
70689                <fields>
70690                    <field>
70691                        <name>INSTR_MEM30</name>
70692                        <bitRange>[15:0]</bitRange>
70693                        <access>write-only</access>
70694                    </field>
70695                </fields>
70696            </register>
70697            <register>
70698                <name>INSTR_MEM31</name>
70699                <addressOffset>0x000000c4</addressOffset>
70700                <description>Write-only access to instruction memory location 31</description>
70701                <resetValue>0x00000000</resetValue>
70702                <fields>
70703                    <field>
70704                        <name>INSTR_MEM31</name>
70705                        <bitRange>[15:0]</bitRange>
70706                        <access>write-only</access>
70707                    </field>
70708                </fields>
70709            </register>
70710            <register>
70711                <name>SM0_CLKDIV</name>
70712                <addressOffset>0x000000c8</addressOffset>
70713                <description>Clock divisor register for state machine 0
70714                    Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)</description>
70715                <resetValue>0x00010000</resetValue>
70716                <fields>
70717                    <field>
70718                        <name>INT</name>
70719                        <description>Effective frequency is sysclk/(int + frac/256).
70720                            Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.</description>
70721                        <bitRange>[31:16]</bitRange>
70722                        <access>read-write</access>
70723                    </field>
70724                    <field>
70725                        <name>FRAC</name>
70726                        <description>Fractional part of clock divisor</description>
70727                        <bitRange>[15:8]</bitRange>
70728                        <access>read-write</access>
70729                    </field>
70730                </fields>
70731            </register>
70732            <register>
70733                <name>SM0_EXECCTRL</name>
70734                <addressOffset>0x000000cc</addressOffset>
70735                <description>Execution/behavioural settings for state machine 0</description>
70736                <resetValue>0x0001f000</resetValue>
70737                <fields>
70738                    <field>
70739                        <name>EXEC_STALLED</name>
70740                        <description>If 1, an instruction written to SMx_INSTR is stalled, and latched by the state machine. Will clear to 0 once this instruction completes.</description>
70741                        <bitRange>[31:31]</bitRange>
70742                        <access>read-only</access>
70743                    </field>
70744                    <field>
70745                        <name>SIDE_EN</name>
70746                        <description>If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.</description>
70747                        <bitRange>[30:30]</bitRange>
70748                        <access>read-write</access>
70749                    </field>
70750                    <field>
70751                        <name>SIDE_PINDIR</name>
70752                        <description>If 1, side-set data is asserted to pin directions, instead of pin values</description>
70753                        <bitRange>[29:29]</bitRange>
70754                        <access>read-write</access>
70755                    </field>
70756                    <field>
70757                        <name>JMP_PIN</name>
70758                        <description>The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.</description>
70759                        <bitRange>[28:24]</bitRange>
70760                        <access>read-write</access>
70761                    </field>
70762                    <field>
70763                        <name>OUT_EN_SEL</name>
70764                        <description>Which data bit to use for inline OUT enable</description>
70765                        <bitRange>[23:19]</bitRange>
70766                        <access>read-write</access>
70767                    </field>
70768                    <field>
70769                        <name>INLINE_OUT_EN</name>
70770                        <description>If 1, use a bit of OUT data as an auxiliary write enable
70771                            When used in conjunction with OUT_STICKY, writes with an enable of 0 will
70772                            deassert the latest pin write. This can create useful masking/override behaviour
70773                            due to the priority ordering of state machine pin writes (SM0 &lt; SM1 &lt; ...)</description>
70774                        <bitRange>[18:18]</bitRange>
70775                        <access>read-write</access>
70776                    </field>
70777                    <field>
70778                        <name>OUT_STICKY</name>
70779                        <description>Continuously assert the most recent OUT/SET to the pins</description>
70780                        <bitRange>[17:17]</bitRange>
70781                        <access>read-write</access>
70782                    </field>
70783                    <field>
70784                        <name>WRAP_TOP</name>
70785                        <description>After reaching this address, execution is wrapped to wrap_bottom.
70786                            If the instruction is a jump, and the jump condition is true, the jump takes priority.</description>
70787                        <bitRange>[16:12]</bitRange>
70788                        <access>read-write</access>
70789                    </field>
70790                    <field>
70791                        <name>WRAP_BOTTOM</name>
70792                        <description>After reaching wrap_top, execution is wrapped to this address.</description>
70793                        <bitRange>[11:7]</bitRange>
70794                        <access>read-write</access>
70795                    </field>
70796                    <field>
70797                        <name>STATUS_SEL</name>
70798                        <description>Comparison used for the MOV x, STATUS instruction.</description>
70799                        <bitRange>[6:5]</bitRange>
70800                        <access>read-write</access>
70801                        <enumeratedValues>
70802                            <enumeratedValue>
70803                                <name>TXLEVEL</name>
70804                                <value>0</value>
70805                                <description>All-ones if TX FIFO level &lt; N, otherwise all-zeroes</description>
70806                            </enumeratedValue>
70807                            <enumeratedValue>
70808                                <name>RXLEVEL</name>
70809                                <value>1</value>
70810                                <description>All-ones if RX FIFO level &lt; N, otherwise all-zeroes</description>
70811                            </enumeratedValue>
70812                            <enumeratedValue>
70813                                <name>IRQ</name>
70814                                <value>2</value>
70815                                <description>All-ones if the indexed IRQ flag is raised, otherwise all-zeroes</description>
70816                            </enumeratedValue>
70817                        </enumeratedValues>
70818                    </field>
70819                    <field>
70820                        <name>STATUS_N</name>
70821                        <description>Comparison level or IRQ index for the MOV x, STATUS instruction.
70822
70823                            If STATUS_SEL is TXLEVEL or RXLEVEL, then values of STATUS_N greater than the current FIFO depth are reserved, and have undefined behaviour.</description>
70824                        <bitRange>[4:0]</bitRange>
70825                        <access>read-write</access>
70826                        <enumeratedValues>
70827                            <enumeratedValue>
70828                                <name>IRQ</name>
70829                                <value>0</value>
70830                                <description>Index 0-7 of an IRQ flag in this PIO block</description>
70831                            </enumeratedValue>
70832                            <enumeratedValue>
70833                                <name>IRQ_PREVPIO</name>
70834                                <value>8</value>
70835                                <description>Index 0-7 of an IRQ flag in the next lower-numbered PIO block</description>
70836                            </enumeratedValue>
70837                            <enumeratedValue>
70838                                <name>IRQ_NEXTPIO</name>
70839                                <value>16</value>
70840                                <description>Index 0-7 of an IRQ flag in the next higher-numbered PIO block</description>
70841                            </enumeratedValue>
70842                        </enumeratedValues>
70843                    </field>
70844                </fields>
70845            </register>
70846            <register>
70847                <name>SM0_SHIFTCTRL</name>
70848                <addressOffset>0x000000d0</addressOffset>
70849                <description>Control behaviour of the input/output shift registers for state machine 0</description>
70850                <resetValue>0x000c0000</resetValue>
70851                <fields>
70852                    <field>
70853                        <name>FJOIN_RX</name>
70854                        <description>When 1, RX FIFO steals the TX FIFO&#39;s storage, and becomes twice as deep.
70855                            TX FIFO is disabled as a result (always reads as both full and empty).
70856                            FIFOs are flushed when this bit is changed.</description>
70857                        <bitRange>[31:31]</bitRange>
70858                        <access>read-write</access>
70859                    </field>
70860                    <field>
70861                        <name>FJOIN_TX</name>
70862                        <description>When 1, TX FIFO steals the RX FIFO&#39;s storage, and becomes twice as deep.
70863                            RX FIFO is disabled as a result (always reads as both full and empty).
70864                            FIFOs are flushed when this bit is changed.</description>
70865                        <bitRange>[30:30]</bitRange>
70866                        <access>read-write</access>
70867                    </field>
70868                    <field>
70869                        <name>PULL_THRESH</name>
70870                        <description>Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
70871                            Write 0 for value of 32.</description>
70872                        <bitRange>[29:25]</bitRange>
70873                        <access>read-write</access>
70874                    </field>
70875                    <field>
70876                        <name>PUSH_THRESH</name>
70877                        <description>Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
70878                            Write 0 for value of 32.</description>
70879                        <bitRange>[24:20]</bitRange>
70880                        <access>read-write</access>
70881                    </field>
70882                    <field>
70883                        <name>OUT_SHIFTDIR</name>
70884                        <description>1 = shift out of output shift register to right. 0 = to left.</description>
70885                        <bitRange>[19:19]</bitRange>
70886                        <access>read-write</access>
70887                    </field>
70888                    <field>
70889                        <name>IN_SHIFTDIR</name>
70890                        <description>1 = shift input shift register to right (data enters from left). 0 = to left.</description>
70891                        <bitRange>[18:18]</bitRange>
70892                        <access>read-write</access>
70893                    </field>
70894                    <field>
70895                        <name>AUTOPULL</name>
70896                        <description>Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.</description>
70897                        <bitRange>[17:17]</bitRange>
70898                        <access>read-write</access>
70899                    </field>
70900                    <field>
70901                        <name>AUTOPUSH</name>
70902                        <description>Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.</description>
70903                        <bitRange>[16:16]</bitRange>
70904                        <access>read-write</access>
70905                    </field>
70906                    <field>
70907                        <name>FJOIN_RX_PUT</name>
70908                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random write access by the state machine (using the `put` instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers).
70909
70910                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
70911
70912                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
70913                        <bitRange>[15:15]</bitRange>
70914                        <access>read-write</access>
70915                    </field>
70916                    <field>
70917                        <name>FJOIN_RX_GET</name>
70918                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random read access by the state machine (using the `get` instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers).
70919
70920                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
70921
70922                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
70923                        <bitRange>[14:14]</bitRange>
70924                        <access>read-write</access>
70925                    </field>
70926                    <field>
70927                        <name>IN_COUNT</name>
70928                        <description>Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction.
70929
70930                            For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking.
70931
70932                            Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.</description>
70933                        <bitRange>[4:0]</bitRange>
70934                        <access>read-write</access>
70935                    </field>
70936                </fields>
70937            </register>
70938            <register>
70939                <name>SM0_ADDR</name>
70940                <addressOffset>0x000000d4</addressOffset>
70941                <description>Current instruction address of state machine 0</description>
70942                <resetValue>0x00000000</resetValue>
70943                <fields>
70944                    <field>
70945                        <name>SM0_ADDR</name>
70946                        <bitRange>[4:0]</bitRange>
70947                        <access>read-only</access>
70948                    </field>
70949                </fields>
70950            </register>
70951            <register>
70952                <name>SM0_INSTR</name>
70953                <addressOffset>0x000000d8</addressOffset>
70954                <description>Read to see the instruction currently addressed by state machine 0&#39;s program counter
70955                    Write to execute an instruction immediately (including jumps) and then resume execution.</description>
70956                <resetMask>0x00000000</resetMask>
70957                <fields>
70958                    <field>
70959                        <name>SM0_INSTR</name>
70960                        <bitRange>[15:0]</bitRange>
70961                        <access>read-write</access>
70962                    </field>
70963                </fields>
70964            </register>
70965            <register>
70966                <name>SM0_PINCTRL</name>
70967                <addressOffset>0x000000dc</addressOffset>
70968                <description>State machine pin control</description>
70969                <resetValue>0x14000000</resetValue>
70970                <fields>
70971                    <field>
70972                        <name>SIDESET_COUNT</name>
70973                        <description>The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).</description>
70974                        <bitRange>[31:29]</bitRange>
70975                        <access>read-write</access>
70976                    </field>
70977                    <field>
70978                        <name>SET_COUNT</name>
70979                        <description>The number of pins asserted by a SET. In the range 0 to 5 inclusive.</description>
70980                        <bitRange>[28:26]</bitRange>
70981                        <access>read-write</access>
70982                    </field>
70983                    <field>
70984                        <name>OUT_COUNT</name>
70985                        <description>The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.</description>
70986                        <bitRange>[25:20]</bitRange>
70987                        <access>read-write</access>
70988                    </field>
70989                    <field>
70990                        <name>IN_BASE</name>
70991                        <description>The pin which is mapped to the least-significant bit of a state machine&#39;s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.</description>
70992                        <bitRange>[19:15]</bitRange>
70993                        <access>read-write</access>
70994                    </field>
70995                    <field>
70996                        <name>SIDESET_BASE</name>
70997                        <description>The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction&#39;s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.</description>
70998                        <bitRange>[14:10]</bitRange>
70999                        <access>read-write</access>
71000                    </field>
71001                    <field>
71002                        <name>SET_BASE</name>
71003                        <description>The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.</description>
71004                        <bitRange>[9:5]</bitRange>
71005                        <access>read-write</access>
71006                    </field>
71007                    <field>
71008                        <name>OUT_BASE</name>
71009                        <description>The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.</description>
71010                        <bitRange>[4:0]</bitRange>
71011                        <access>read-write</access>
71012                    </field>
71013                </fields>
71014            </register>
71015            <register>
71016                <name>SM1_CLKDIV</name>
71017                <addressOffset>0x000000e0</addressOffset>
71018                <description>Clock divisor register for state machine 1
71019                    Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)</description>
71020                <resetValue>0x00010000</resetValue>
71021                <fields>
71022                    <field>
71023                        <name>INT</name>
71024                        <description>Effective frequency is sysclk/(int + frac/256).
71025                            Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.</description>
71026                        <bitRange>[31:16]</bitRange>
71027                        <access>read-write</access>
71028                    </field>
71029                    <field>
71030                        <name>FRAC</name>
71031                        <description>Fractional part of clock divisor</description>
71032                        <bitRange>[15:8]</bitRange>
71033                        <access>read-write</access>
71034                    </field>
71035                </fields>
71036            </register>
71037            <register>
71038                <name>SM1_EXECCTRL</name>
71039                <addressOffset>0x000000e4</addressOffset>
71040                <description>Execution/behavioural settings for state machine 1</description>
71041                <resetValue>0x0001f000</resetValue>
71042                <fields>
71043                    <field>
71044                        <name>EXEC_STALLED</name>
71045                        <description>If 1, an instruction written to SMx_INSTR is stalled, and latched by the state machine. Will clear to 0 once this instruction completes.</description>
71046                        <bitRange>[31:31]</bitRange>
71047                        <access>read-only</access>
71048                    </field>
71049                    <field>
71050                        <name>SIDE_EN</name>
71051                        <description>If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.</description>
71052                        <bitRange>[30:30]</bitRange>
71053                        <access>read-write</access>
71054                    </field>
71055                    <field>
71056                        <name>SIDE_PINDIR</name>
71057                        <description>If 1, side-set data is asserted to pin directions, instead of pin values</description>
71058                        <bitRange>[29:29]</bitRange>
71059                        <access>read-write</access>
71060                    </field>
71061                    <field>
71062                        <name>JMP_PIN</name>
71063                        <description>The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.</description>
71064                        <bitRange>[28:24]</bitRange>
71065                        <access>read-write</access>
71066                    </field>
71067                    <field>
71068                        <name>OUT_EN_SEL</name>
71069                        <description>Which data bit to use for inline OUT enable</description>
71070                        <bitRange>[23:19]</bitRange>
71071                        <access>read-write</access>
71072                    </field>
71073                    <field>
71074                        <name>INLINE_OUT_EN</name>
71075                        <description>If 1, use a bit of OUT data as an auxiliary write enable
71076                            When used in conjunction with OUT_STICKY, writes with an enable of 0 will
71077                            deassert the latest pin write. This can create useful masking/override behaviour
71078                            due to the priority ordering of state machine pin writes (SM0 &lt; SM1 &lt; ...)</description>
71079                        <bitRange>[18:18]</bitRange>
71080                        <access>read-write</access>
71081                    </field>
71082                    <field>
71083                        <name>OUT_STICKY</name>
71084                        <description>Continuously assert the most recent OUT/SET to the pins</description>
71085                        <bitRange>[17:17]</bitRange>
71086                        <access>read-write</access>
71087                    </field>
71088                    <field>
71089                        <name>WRAP_TOP</name>
71090                        <description>After reaching this address, execution is wrapped to wrap_bottom.
71091                            If the instruction is a jump, and the jump condition is true, the jump takes priority.</description>
71092                        <bitRange>[16:12]</bitRange>
71093                        <access>read-write</access>
71094                    </field>
71095                    <field>
71096                        <name>WRAP_BOTTOM</name>
71097                        <description>After reaching wrap_top, execution is wrapped to this address.</description>
71098                        <bitRange>[11:7]</bitRange>
71099                        <access>read-write</access>
71100                    </field>
71101                    <field>
71102                        <name>STATUS_SEL</name>
71103                        <description>Comparison used for the MOV x, STATUS instruction.</description>
71104                        <bitRange>[6:5]</bitRange>
71105                        <access>read-write</access>
71106                        <enumeratedValues>
71107                            <enumeratedValue>
71108                                <name>TXLEVEL</name>
71109                                <value>0</value>
71110                                <description>All-ones if TX FIFO level &lt; N, otherwise all-zeroes</description>
71111                            </enumeratedValue>
71112                            <enumeratedValue>
71113                                <name>RXLEVEL</name>
71114                                <value>1</value>
71115                                <description>All-ones if RX FIFO level &lt; N, otherwise all-zeroes</description>
71116                            </enumeratedValue>
71117                            <enumeratedValue>
71118                                <name>IRQ</name>
71119                                <value>2</value>
71120                                <description>All-ones if the indexed IRQ flag is raised, otherwise all-zeroes</description>
71121                            </enumeratedValue>
71122                        </enumeratedValues>
71123                    </field>
71124                    <field>
71125                        <name>STATUS_N</name>
71126                        <description>Comparison level or IRQ index for the MOV x, STATUS instruction.
71127
71128                            If STATUS_SEL is TXLEVEL or RXLEVEL, then values of STATUS_N greater than the current FIFO depth are reserved, and have undefined behaviour.</description>
71129                        <bitRange>[4:0]</bitRange>
71130                        <access>read-write</access>
71131                        <enumeratedValues>
71132                            <enumeratedValue>
71133                                <name>IRQ</name>
71134                                <value>0</value>
71135                                <description>Index 0-7 of an IRQ flag in this PIO block</description>
71136                            </enumeratedValue>
71137                            <enumeratedValue>
71138                                <name>IRQ_PREVPIO</name>
71139                                <value>8</value>
71140                                <description>Index 0-7 of an IRQ flag in the next lower-numbered PIO block</description>
71141                            </enumeratedValue>
71142                            <enumeratedValue>
71143                                <name>IRQ_NEXTPIO</name>
71144                                <value>16</value>
71145                                <description>Index 0-7 of an IRQ flag in the next higher-numbered PIO block</description>
71146                            </enumeratedValue>
71147                        </enumeratedValues>
71148                    </field>
71149                </fields>
71150            </register>
71151            <register>
71152                <name>SM1_SHIFTCTRL</name>
71153                <addressOffset>0x000000e8</addressOffset>
71154                <description>Control behaviour of the input/output shift registers for state machine 1</description>
71155                <resetValue>0x000c0000</resetValue>
71156                <fields>
71157                    <field>
71158                        <name>FJOIN_RX</name>
71159                        <description>When 1, RX FIFO steals the TX FIFO&#39;s storage, and becomes twice as deep.
71160                            TX FIFO is disabled as a result (always reads as both full and empty).
71161                            FIFOs are flushed when this bit is changed.</description>
71162                        <bitRange>[31:31]</bitRange>
71163                        <access>read-write</access>
71164                    </field>
71165                    <field>
71166                        <name>FJOIN_TX</name>
71167                        <description>When 1, TX FIFO steals the RX FIFO&#39;s storage, and becomes twice as deep.
71168                            RX FIFO is disabled as a result (always reads as both full and empty).
71169                            FIFOs are flushed when this bit is changed.</description>
71170                        <bitRange>[30:30]</bitRange>
71171                        <access>read-write</access>
71172                    </field>
71173                    <field>
71174                        <name>PULL_THRESH</name>
71175                        <description>Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
71176                            Write 0 for value of 32.</description>
71177                        <bitRange>[29:25]</bitRange>
71178                        <access>read-write</access>
71179                    </field>
71180                    <field>
71181                        <name>PUSH_THRESH</name>
71182                        <description>Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
71183                            Write 0 for value of 32.</description>
71184                        <bitRange>[24:20]</bitRange>
71185                        <access>read-write</access>
71186                    </field>
71187                    <field>
71188                        <name>OUT_SHIFTDIR</name>
71189                        <description>1 = shift out of output shift register to right. 0 = to left.</description>
71190                        <bitRange>[19:19]</bitRange>
71191                        <access>read-write</access>
71192                    </field>
71193                    <field>
71194                        <name>IN_SHIFTDIR</name>
71195                        <description>1 = shift input shift register to right (data enters from left). 0 = to left.</description>
71196                        <bitRange>[18:18]</bitRange>
71197                        <access>read-write</access>
71198                    </field>
71199                    <field>
71200                        <name>AUTOPULL</name>
71201                        <description>Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.</description>
71202                        <bitRange>[17:17]</bitRange>
71203                        <access>read-write</access>
71204                    </field>
71205                    <field>
71206                        <name>AUTOPUSH</name>
71207                        <description>Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.</description>
71208                        <bitRange>[16:16]</bitRange>
71209                        <access>read-write</access>
71210                    </field>
71211                    <field>
71212                        <name>FJOIN_RX_PUT</name>
71213                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random write access by the state machine (using the `put` instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers).
71214
71215                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71216
71217                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71218                        <bitRange>[15:15]</bitRange>
71219                        <access>read-write</access>
71220                    </field>
71221                    <field>
71222                        <name>FJOIN_RX_GET</name>
71223                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random read access by the state machine (using the `get` instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers).
71224
71225                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71226
71227                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71228                        <bitRange>[14:14]</bitRange>
71229                        <access>read-write</access>
71230                    </field>
71231                    <field>
71232                        <name>IN_COUNT</name>
71233                        <description>Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction.
71234
71235                            For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking.
71236
71237                            Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.</description>
71238                        <bitRange>[4:0]</bitRange>
71239                        <access>read-write</access>
71240                    </field>
71241                </fields>
71242            </register>
71243            <register>
71244                <name>SM1_ADDR</name>
71245                <addressOffset>0x000000ec</addressOffset>
71246                <description>Current instruction address of state machine 1</description>
71247                <resetValue>0x00000000</resetValue>
71248                <fields>
71249                    <field>
71250                        <name>SM1_ADDR</name>
71251                        <bitRange>[4:0]</bitRange>
71252                        <access>read-only</access>
71253                    </field>
71254                </fields>
71255            </register>
71256            <register>
71257                <name>SM1_INSTR</name>
71258                <addressOffset>0x000000f0</addressOffset>
71259                <description>Read to see the instruction currently addressed by state machine 1&#39;s program counter
71260                    Write to execute an instruction immediately (including jumps) and then resume execution.</description>
71261                <resetMask>0x00000000</resetMask>
71262                <fields>
71263                    <field>
71264                        <name>SM1_INSTR</name>
71265                        <bitRange>[15:0]</bitRange>
71266                        <access>read-write</access>
71267                    </field>
71268                </fields>
71269            </register>
71270            <register>
71271                <name>SM1_PINCTRL</name>
71272                <addressOffset>0x000000f4</addressOffset>
71273                <description>State machine pin control</description>
71274                <resetValue>0x14000000</resetValue>
71275                <fields>
71276                    <field>
71277                        <name>SIDESET_COUNT</name>
71278                        <description>The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).</description>
71279                        <bitRange>[31:29]</bitRange>
71280                        <access>read-write</access>
71281                    </field>
71282                    <field>
71283                        <name>SET_COUNT</name>
71284                        <description>The number of pins asserted by a SET. In the range 0 to 5 inclusive.</description>
71285                        <bitRange>[28:26]</bitRange>
71286                        <access>read-write</access>
71287                    </field>
71288                    <field>
71289                        <name>OUT_COUNT</name>
71290                        <description>The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.</description>
71291                        <bitRange>[25:20]</bitRange>
71292                        <access>read-write</access>
71293                    </field>
71294                    <field>
71295                        <name>IN_BASE</name>
71296                        <description>The pin which is mapped to the least-significant bit of a state machine&#39;s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.</description>
71297                        <bitRange>[19:15]</bitRange>
71298                        <access>read-write</access>
71299                    </field>
71300                    <field>
71301                        <name>SIDESET_BASE</name>
71302                        <description>The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction&#39;s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.</description>
71303                        <bitRange>[14:10]</bitRange>
71304                        <access>read-write</access>
71305                    </field>
71306                    <field>
71307                        <name>SET_BASE</name>
71308                        <description>The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.</description>
71309                        <bitRange>[9:5]</bitRange>
71310                        <access>read-write</access>
71311                    </field>
71312                    <field>
71313                        <name>OUT_BASE</name>
71314                        <description>The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.</description>
71315                        <bitRange>[4:0]</bitRange>
71316                        <access>read-write</access>
71317                    </field>
71318                </fields>
71319            </register>
71320            <register>
71321                <name>SM2_CLKDIV</name>
71322                <addressOffset>0x000000f8</addressOffset>
71323                <description>Clock divisor register for state machine 2
71324                    Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)</description>
71325                <resetValue>0x00010000</resetValue>
71326                <fields>
71327                    <field>
71328                        <name>INT</name>
71329                        <description>Effective frequency is sysclk/(int + frac/256).
71330                            Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.</description>
71331                        <bitRange>[31:16]</bitRange>
71332                        <access>read-write</access>
71333                    </field>
71334                    <field>
71335                        <name>FRAC</name>
71336                        <description>Fractional part of clock divisor</description>
71337                        <bitRange>[15:8]</bitRange>
71338                        <access>read-write</access>
71339                    </field>
71340                </fields>
71341            </register>
71342            <register>
71343                <name>SM2_EXECCTRL</name>
71344                <addressOffset>0x000000fc</addressOffset>
71345                <description>Execution/behavioural settings for state machine 2</description>
71346                <resetValue>0x0001f000</resetValue>
71347                <fields>
71348                    <field>
71349                        <name>EXEC_STALLED</name>
71350                        <description>If 1, an instruction written to SMx_INSTR is stalled, and latched by the state machine. Will clear to 0 once this instruction completes.</description>
71351                        <bitRange>[31:31]</bitRange>
71352                        <access>read-only</access>
71353                    </field>
71354                    <field>
71355                        <name>SIDE_EN</name>
71356                        <description>If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.</description>
71357                        <bitRange>[30:30]</bitRange>
71358                        <access>read-write</access>
71359                    </field>
71360                    <field>
71361                        <name>SIDE_PINDIR</name>
71362                        <description>If 1, side-set data is asserted to pin directions, instead of pin values</description>
71363                        <bitRange>[29:29]</bitRange>
71364                        <access>read-write</access>
71365                    </field>
71366                    <field>
71367                        <name>JMP_PIN</name>
71368                        <description>The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.</description>
71369                        <bitRange>[28:24]</bitRange>
71370                        <access>read-write</access>
71371                    </field>
71372                    <field>
71373                        <name>OUT_EN_SEL</name>
71374                        <description>Which data bit to use for inline OUT enable</description>
71375                        <bitRange>[23:19]</bitRange>
71376                        <access>read-write</access>
71377                    </field>
71378                    <field>
71379                        <name>INLINE_OUT_EN</name>
71380                        <description>If 1, use a bit of OUT data as an auxiliary write enable
71381                            When used in conjunction with OUT_STICKY, writes with an enable of 0 will
71382                            deassert the latest pin write. This can create useful masking/override behaviour
71383                            due to the priority ordering of state machine pin writes (SM0 &lt; SM1 &lt; ...)</description>
71384                        <bitRange>[18:18]</bitRange>
71385                        <access>read-write</access>
71386                    </field>
71387                    <field>
71388                        <name>OUT_STICKY</name>
71389                        <description>Continuously assert the most recent OUT/SET to the pins</description>
71390                        <bitRange>[17:17]</bitRange>
71391                        <access>read-write</access>
71392                    </field>
71393                    <field>
71394                        <name>WRAP_TOP</name>
71395                        <description>After reaching this address, execution is wrapped to wrap_bottom.
71396                            If the instruction is a jump, and the jump condition is true, the jump takes priority.</description>
71397                        <bitRange>[16:12]</bitRange>
71398                        <access>read-write</access>
71399                    </field>
71400                    <field>
71401                        <name>WRAP_BOTTOM</name>
71402                        <description>After reaching wrap_top, execution is wrapped to this address.</description>
71403                        <bitRange>[11:7]</bitRange>
71404                        <access>read-write</access>
71405                    </field>
71406                    <field>
71407                        <name>STATUS_SEL</name>
71408                        <description>Comparison used for the MOV x, STATUS instruction.</description>
71409                        <bitRange>[6:5]</bitRange>
71410                        <access>read-write</access>
71411                        <enumeratedValues>
71412                            <enumeratedValue>
71413                                <name>TXLEVEL</name>
71414                                <value>0</value>
71415                                <description>All-ones if TX FIFO level &lt; N, otherwise all-zeroes</description>
71416                            </enumeratedValue>
71417                            <enumeratedValue>
71418                                <name>RXLEVEL</name>
71419                                <value>1</value>
71420                                <description>All-ones if RX FIFO level &lt; N, otherwise all-zeroes</description>
71421                            </enumeratedValue>
71422                            <enumeratedValue>
71423                                <name>IRQ</name>
71424                                <value>2</value>
71425                                <description>All-ones if the indexed IRQ flag is raised, otherwise all-zeroes</description>
71426                            </enumeratedValue>
71427                        </enumeratedValues>
71428                    </field>
71429                    <field>
71430                        <name>STATUS_N</name>
71431                        <description>Comparison level or IRQ index for the MOV x, STATUS instruction.
71432
71433                            If STATUS_SEL is TXLEVEL or RXLEVEL, then values of STATUS_N greater than the current FIFO depth are reserved, and have undefined behaviour.</description>
71434                        <bitRange>[4:0]</bitRange>
71435                        <access>read-write</access>
71436                        <enumeratedValues>
71437                            <enumeratedValue>
71438                                <name>IRQ</name>
71439                                <value>0</value>
71440                                <description>Index 0-7 of an IRQ flag in this PIO block</description>
71441                            </enumeratedValue>
71442                            <enumeratedValue>
71443                                <name>IRQ_PREVPIO</name>
71444                                <value>8</value>
71445                                <description>Index 0-7 of an IRQ flag in the next lower-numbered PIO block</description>
71446                            </enumeratedValue>
71447                            <enumeratedValue>
71448                                <name>IRQ_NEXTPIO</name>
71449                                <value>16</value>
71450                                <description>Index 0-7 of an IRQ flag in the next higher-numbered PIO block</description>
71451                            </enumeratedValue>
71452                        </enumeratedValues>
71453                    </field>
71454                </fields>
71455            </register>
71456            <register>
71457                <name>SM2_SHIFTCTRL</name>
71458                <addressOffset>0x00000100</addressOffset>
71459                <description>Control behaviour of the input/output shift registers for state machine 2</description>
71460                <resetValue>0x000c0000</resetValue>
71461                <fields>
71462                    <field>
71463                        <name>FJOIN_RX</name>
71464                        <description>When 1, RX FIFO steals the TX FIFO&#39;s storage, and becomes twice as deep.
71465                            TX FIFO is disabled as a result (always reads as both full and empty).
71466                            FIFOs are flushed when this bit is changed.</description>
71467                        <bitRange>[31:31]</bitRange>
71468                        <access>read-write</access>
71469                    </field>
71470                    <field>
71471                        <name>FJOIN_TX</name>
71472                        <description>When 1, TX FIFO steals the RX FIFO&#39;s storage, and becomes twice as deep.
71473                            RX FIFO is disabled as a result (always reads as both full and empty).
71474                            FIFOs are flushed when this bit is changed.</description>
71475                        <bitRange>[30:30]</bitRange>
71476                        <access>read-write</access>
71477                    </field>
71478                    <field>
71479                        <name>PULL_THRESH</name>
71480                        <description>Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
71481                            Write 0 for value of 32.</description>
71482                        <bitRange>[29:25]</bitRange>
71483                        <access>read-write</access>
71484                    </field>
71485                    <field>
71486                        <name>PUSH_THRESH</name>
71487                        <description>Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
71488                            Write 0 for value of 32.</description>
71489                        <bitRange>[24:20]</bitRange>
71490                        <access>read-write</access>
71491                    </field>
71492                    <field>
71493                        <name>OUT_SHIFTDIR</name>
71494                        <description>1 = shift out of output shift register to right. 0 = to left.</description>
71495                        <bitRange>[19:19]</bitRange>
71496                        <access>read-write</access>
71497                    </field>
71498                    <field>
71499                        <name>IN_SHIFTDIR</name>
71500                        <description>1 = shift input shift register to right (data enters from left). 0 = to left.</description>
71501                        <bitRange>[18:18]</bitRange>
71502                        <access>read-write</access>
71503                    </field>
71504                    <field>
71505                        <name>AUTOPULL</name>
71506                        <description>Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.</description>
71507                        <bitRange>[17:17]</bitRange>
71508                        <access>read-write</access>
71509                    </field>
71510                    <field>
71511                        <name>AUTOPUSH</name>
71512                        <description>Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.</description>
71513                        <bitRange>[16:16]</bitRange>
71514                        <access>read-write</access>
71515                    </field>
71516                    <field>
71517                        <name>FJOIN_RX_PUT</name>
71518                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random write access by the state machine (using the `put` instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers).
71519
71520                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71521
71522                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71523                        <bitRange>[15:15]</bitRange>
71524                        <access>read-write</access>
71525                    </field>
71526                    <field>
71527                        <name>FJOIN_RX_GET</name>
71528                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random read access by the state machine (using the `get` instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers).
71529
71530                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71531
71532                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71533                        <bitRange>[14:14]</bitRange>
71534                        <access>read-write</access>
71535                    </field>
71536                    <field>
71537                        <name>IN_COUNT</name>
71538                        <description>Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction.
71539
71540                            For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking.
71541
71542                            Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.</description>
71543                        <bitRange>[4:0]</bitRange>
71544                        <access>read-write</access>
71545                    </field>
71546                </fields>
71547            </register>
71548            <register>
71549                <name>SM2_ADDR</name>
71550                <addressOffset>0x00000104</addressOffset>
71551                <description>Current instruction address of state machine 2</description>
71552                <resetValue>0x00000000</resetValue>
71553                <fields>
71554                    <field>
71555                        <name>SM2_ADDR</name>
71556                        <bitRange>[4:0]</bitRange>
71557                        <access>read-only</access>
71558                    </field>
71559                </fields>
71560            </register>
71561            <register>
71562                <name>SM2_INSTR</name>
71563                <addressOffset>0x00000108</addressOffset>
71564                <description>Read to see the instruction currently addressed by state machine 2&#39;s program counter
71565                    Write to execute an instruction immediately (including jumps) and then resume execution.</description>
71566                <resetMask>0x00000000</resetMask>
71567                <fields>
71568                    <field>
71569                        <name>SM2_INSTR</name>
71570                        <bitRange>[15:0]</bitRange>
71571                        <access>read-write</access>
71572                    </field>
71573                </fields>
71574            </register>
71575            <register>
71576                <name>SM2_PINCTRL</name>
71577                <addressOffset>0x0000010c</addressOffset>
71578                <description>State machine pin control</description>
71579                <resetValue>0x14000000</resetValue>
71580                <fields>
71581                    <field>
71582                        <name>SIDESET_COUNT</name>
71583                        <description>The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).</description>
71584                        <bitRange>[31:29]</bitRange>
71585                        <access>read-write</access>
71586                    </field>
71587                    <field>
71588                        <name>SET_COUNT</name>
71589                        <description>The number of pins asserted by a SET. In the range 0 to 5 inclusive.</description>
71590                        <bitRange>[28:26]</bitRange>
71591                        <access>read-write</access>
71592                    </field>
71593                    <field>
71594                        <name>OUT_COUNT</name>
71595                        <description>The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.</description>
71596                        <bitRange>[25:20]</bitRange>
71597                        <access>read-write</access>
71598                    </field>
71599                    <field>
71600                        <name>IN_BASE</name>
71601                        <description>The pin which is mapped to the least-significant bit of a state machine&#39;s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.</description>
71602                        <bitRange>[19:15]</bitRange>
71603                        <access>read-write</access>
71604                    </field>
71605                    <field>
71606                        <name>SIDESET_BASE</name>
71607                        <description>The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction&#39;s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.</description>
71608                        <bitRange>[14:10]</bitRange>
71609                        <access>read-write</access>
71610                    </field>
71611                    <field>
71612                        <name>SET_BASE</name>
71613                        <description>The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.</description>
71614                        <bitRange>[9:5]</bitRange>
71615                        <access>read-write</access>
71616                    </field>
71617                    <field>
71618                        <name>OUT_BASE</name>
71619                        <description>The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.</description>
71620                        <bitRange>[4:0]</bitRange>
71621                        <access>read-write</access>
71622                    </field>
71623                </fields>
71624            </register>
71625            <register>
71626                <name>SM3_CLKDIV</name>
71627                <addressOffset>0x00000110</addressOffset>
71628                <description>Clock divisor register for state machine 3
71629                    Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)</description>
71630                <resetValue>0x00010000</resetValue>
71631                <fields>
71632                    <field>
71633                        <name>INT</name>
71634                        <description>Effective frequency is sysclk/(int + frac/256).
71635                            Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.</description>
71636                        <bitRange>[31:16]</bitRange>
71637                        <access>read-write</access>
71638                    </field>
71639                    <field>
71640                        <name>FRAC</name>
71641                        <description>Fractional part of clock divisor</description>
71642                        <bitRange>[15:8]</bitRange>
71643                        <access>read-write</access>
71644                    </field>
71645                </fields>
71646            </register>
71647            <register>
71648                <name>SM3_EXECCTRL</name>
71649                <addressOffset>0x00000114</addressOffset>
71650                <description>Execution/behavioural settings for state machine 3</description>
71651                <resetValue>0x0001f000</resetValue>
71652                <fields>
71653                    <field>
71654                        <name>EXEC_STALLED</name>
71655                        <description>If 1, an instruction written to SMx_INSTR is stalled, and latched by the state machine. Will clear to 0 once this instruction completes.</description>
71656                        <bitRange>[31:31]</bitRange>
71657                        <access>read-only</access>
71658                    </field>
71659                    <field>
71660                        <name>SIDE_EN</name>
71661                        <description>If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.</description>
71662                        <bitRange>[30:30]</bitRange>
71663                        <access>read-write</access>
71664                    </field>
71665                    <field>
71666                        <name>SIDE_PINDIR</name>
71667                        <description>If 1, side-set data is asserted to pin directions, instead of pin values</description>
71668                        <bitRange>[29:29]</bitRange>
71669                        <access>read-write</access>
71670                    </field>
71671                    <field>
71672                        <name>JMP_PIN</name>
71673                        <description>The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.</description>
71674                        <bitRange>[28:24]</bitRange>
71675                        <access>read-write</access>
71676                    </field>
71677                    <field>
71678                        <name>OUT_EN_SEL</name>
71679                        <description>Which data bit to use for inline OUT enable</description>
71680                        <bitRange>[23:19]</bitRange>
71681                        <access>read-write</access>
71682                    </field>
71683                    <field>
71684                        <name>INLINE_OUT_EN</name>
71685                        <description>If 1, use a bit of OUT data as an auxiliary write enable
71686                            When used in conjunction with OUT_STICKY, writes with an enable of 0 will
71687                            deassert the latest pin write. This can create useful masking/override behaviour
71688                            due to the priority ordering of state machine pin writes (SM0 &lt; SM1 &lt; ...)</description>
71689                        <bitRange>[18:18]</bitRange>
71690                        <access>read-write</access>
71691                    </field>
71692                    <field>
71693                        <name>OUT_STICKY</name>
71694                        <description>Continuously assert the most recent OUT/SET to the pins</description>
71695                        <bitRange>[17:17]</bitRange>
71696                        <access>read-write</access>
71697                    </field>
71698                    <field>
71699                        <name>WRAP_TOP</name>
71700                        <description>After reaching this address, execution is wrapped to wrap_bottom.
71701                            If the instruction is a jump, and the jump condition is true, the jump takes priority.</description>
71702                        <bitRange>[16:12]</bitRange>
71703                        <access>read-write</access>
71704                    </field>
71705                    <field>
71706                        <name>WRAP_BOTTOM</name>
71707                        <description>After reaching wrap_top, execution is wrapped to this address.</description>
71708                        <bitRange>[11:7]</bitRange>
71709                        <access>read-write</access>
71710                    </field>
71711                    <field>
71712                        <name>STATUS_SEL</name>
71713                        <description>Comparison used for the MOV x, STATUS instruction.</description>
71714                        <bitRange>[6:5]</bitRange>
71715                        <access>read-write</access>
71716                        <enumeratedValues>
71717                            <enumeratedValue>
71718                                <name>TXLEVEL</name>
71719                                <value>0</value>
71720                                <description>All-ones if TX FIFO level &lt; N, otherwise all-zeroes</description>
71721                            </enumeratedValue>
71722                            <enumeratedValue>
71723                                <name>RXLEVEL</name>
71724                                <value>1</value>
71725                                <description>All-ones if RX FIFO level &lt; N, otherwise all-zeroes</description>
71726                            </enumeratedValue>
71727                            <enumeratedValue>
71728                                <name>IRQ</name>
71729                                <value>2</value>
71730                                <description>All-ones if the indexed IRQ flag is raised, otherwise all-zeroes</description>
71731                            </enumeratedValue>
71732                        </enumeratedValues>
71733                    </field>
71734                    <field>
71735                        <name>STATUS_N</name>
71736                        <description>Comparison level or IRQ index for the MOV x, STATUS instruction.
71737
71738                            If STATUS_SEL is TXLEVEL or RXLEVEL, then values of STATUS_N greater than the current FIFO depth are reserved, and have undefined behaviour.</description>
71739                        <bitRange>[4:0]</bitRange>
71740                        <access>read-write</access>
71741                        <enumeratedValues>
71742                            <enumeratedValue>
71743                                <name>IRQ</name>
71744                                <value>0</value>
71745                                <description>Index 0-7 of an IRQ flag in this PIO block</description>
71746                            </enumeratedValue>
71747                            <enumeratedValue>
71748                                <name>IRQ_PREVPIO</name>
71749                                <value>8</value>
71750                                <description>Index 0-7 of an IRQ flag in the next lower-numbered PIO block</description>
71751                            </enumeratedValue>
71752                            <enumeratedValue>
71753                                <name>IRQ_NEXTPIO</name>
71754                                <value>16</value>
71755                                <description>Index 0-7 of an IRQ flag in the next higher-numbered PIO block</description>
71756                            </enumeratedValue>
71757                        </enumeratedValues>
71758                    </field>
71759                </fields>
71760            </register>
71761            <register>
71762                <name>SM3_SHIFTCTRL</name>
71763                <addressOffset>0x00000118</addressOffset>
71764                <description>Control behaviour of the input/output shift registers for state machine 3</description>
71765                <resetValue>0x000c0000</resetValue>
71766                <fields>
71767                    <field>
71768                        <name>FJOIN_RX</name>
71769                        <description>When 1, RX FIFO steals the TX FIFO&#39;s storage, and becomes twice as deep.
71770                            TX FIFO is disabled as a result (always reads as both full and empty).
71771                            FIFOs are flushed when this bit is changed.</description>
71772                        <bitRange>[31:31]</bitRange>
71773                        <access>read-write</access>
71774                    </field>
71775                    <field>
71776                        <name>FJOIN_TX</name>
71777                        <description>When 1, TX FIFO steals the RX FIFO&#39;s storage, and becomes twice as deep.
71778                            RX FIFO is disabled as a result (always reads as both full and empty).
71779                            FIFOs are flushed when this bit is changed.</description>
71780                        <bitRange>[30:30]</bitRange>
71781                        <access>read-write</access>
71782                    </field>
71783                    <field>
71784                        <name>PULL_THRESH</name>
71785                        <description>Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
71786                            Write 0 for value of 32.</description>
71787                        <bitRange>[29:25]</bitRange>
71788                        <access>read-write</access>
71789                    </field>
71790                    <field>
71791                        <name>PUSH_THRESH</name>
71792                        <description>Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
71793                            Write 0 for value of 32.</description>
71794                        <bitRange>[24:20]</bitRange>
71795                        <access>read-write</access>
71796                    </field>
71797                    <field>
71798                        <name>OUT_SHIFTDIR</name>
71799                        <description>1 = shift out of output shift register to right. 0 = to left.</description>
71800                        <bitRange>[19:19]</bitRange>
71801                        <access>read-write</access>
71802                    </field>
71803                    <field>
71804                        <name>IN_SHIFTDIR</name>
71805                        <description>1 = shift input shift register to right (data enters from left). 0 = to left.</description>
71806                        <bitRange>[18:18]</bitRange>
71807                        <access>read-write</access>
71808                    </field>
71809                    <field>
71810                        <name>AUTOPULL</name>
71811                        <description>Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.</description>
71812                        <bitRange>[17:17]</bitRange>
71813                        <access>read-write</access>
71814                    </field>
71815                    <field>
71816                        <name>AUTOPUSH</name>
71817                        <description>Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.</description>
71818                        <bitRange>[16:16]</bitRange>
71819                        <access>read-write</access>
71820                    </field>
71821                    <field>
71822                        <name>FJOIN_RX_PUT</name>
71823                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random write access by the state machine (using the `put` instruction) and, unless FJOIN_RX_GET is also set, random read access by the processor (through the RXFx_PUTGETy registers).
71824
71825                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71826
71827                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71828                        <bitRange>[15:15]</bitRange>
71829                        <access>read-write</access>
71830                    </field>
71831                    <field>
71832                        <name>FJOIN_RX_GET</name>
71833                        <description>If 1, disable this state machine&#39;s RX FIFO, make its storage available for random read access by the state machine (using the `get` instruction) and, unless FJOIN_RX_PUT is also set, random write access by the processor (through the RXFx_PUTGETy registers).
71834
71835                            If FJOIN_RX_PUT and FJOIN_RX_GET are both set, then the RX FIFO&#39;s registers can be randomly read/written by the state machine, but are completely inaccessible to the processor.
71836
71837                            Setting this bit will clear the FJOIN_TX and FJOIN_RX bits.</description>
71838                        <bitRange>[14:14]</bitRange>
71839                        <access>read-write</access>
71840                    </field>
71841                    <field>
71842                        <name>IN_COUNT</name>
71843                        <description>Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction.
71844
71845                            For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking.
71846
71847                            Note this masking is applied in addition to the masking usually performed by the IN instruction. This is mainly useful for the MOV x, PINS instruction, which otherwise has no way of masking pins.</description>
71848                        <bitRange>[4:0]</bitRange>
71849                        <access>read-write</access>
71850                    </field>
71851                </fields>
71852            </register>
71853            <register>
71854                <name>SM3_ADDR</name>
71855                <addressOffset>0x0000011c</addressOffset>
71856                <description>Current instruction address of state machine 3</description>
71857                <resetValue>0x00000000</resetValue>
71858                <fields>
71859                    <field>
71860                        <name>SM3_ADDR</name>
71861                        <bitRange>[4:0]</bitRange>
71862                        <access>read-only</access>
71863                    </field>
71864                </fields>
71865            </register>
71866            <register>
71867                <name>SM3_INSTR</name>
71868                <addressOffset>0x00000120</addressOffset>
71869                <description>Read to see the instruction currently addressed by state machine 3&#39;s program counter
71870                    Write to execute an instruction immediately (including jumps) and then resume execution.</description>
71871                <resetMask>0x00000000</resetMask>
71872                <fields>
71873                    <field>
71874                        <name>SM3_INSTR</name>
71875                        <bitRange>[15:0]</bitRange>
71876                        <access>read-write</access>
71877                    </field>
71878                </fields>
71879            </register>
71880            <register>
71881                <name>SM3_PINCTRL</name>
71882                <addressOffset>0x00000124</addressOffset>
71883                <description>State machine pin control</description>
71884                <resetValue>0x14000000</resetValue>
71885                <fields>
71886                    <field>
71887                        <name>SIDESET_COUNT</name>
71888                        <description>The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).</description>
71889                        <bitRange>[31:29]</bitRange>
71890                        <access>read-write</access>
71891                    </field>
71892                    <field>
71893                        <name>SET_COUNT</name>
71894                        <description>The number of pins asserted by a SET. In the range 0 to 5 inclusive.</description>
71895                        <bitRange>[28:26]</bitRange>
71896                        <access>read-write</access>
71897                    </field>
71898                    <field>
71899                        <name>OUT_COUNT</name>
71900                        <description>The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.</description>
71901                        <bitRange>[25:20]</bitRange>
71902                        <access>read-write</access>
71903                    </field>
71904                    <field>
71905                        <name>IN_BASE</name>
71906                        <description>The pin which is mapped to the least-significant bit of a state machine&#39;s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.</description>
71907                        <bitRange>[19:15]</bitRange>
71908                        <access>read-write</access>
71909                    </field>
71910                    <field>
71911                        <name>SIDESET_BASE</name>
71912                        <description>The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction&#39;s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.</description>
71913                        <bitRange>[14:10]</bitRange>
71914                        <access>read-write</access>
71915                    </field>
71916                    <field>
71917                        <name>SET_BASE</name>
71918                        <description>The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.</description>
71919                        <bitRange>[9:5]</bitRange>
71920                        <access>read-write</access>
71921                    </field>
71922                    <field>
71923                        <name>OUT_BASE</name>
71924                        <description>The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.</description>
71925                        <bitRange>[4:0]</bitRange>
71926                        <access>read-write</access>
71927                    </field>
71928                </fields>
71929            </register>
71930            <register>
71931                <name>RXF0_PUTGET0</name>
71932                <addressOffset>0x00000128</addressOffset>
71933                <description>Direct read/write access to entry 0 of SM0&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71934                <resetValue>0x00000000</resetValue>
71935                <fields>
71936                    <field>
71937                        <name>RXF0_PUTGET0</name>
71938                        <bitRange>[31:0]</bitRange>
71939                        <access>read-write</access>
71940                    </field>
71941                </fields>
71942            </register>
71943            <register>
71944                <name>RXF0_PUTGET1</name>
71945                <addressOffset>0x0000012c</addressOffset>
71946                <description>Direct read/write access to entry 1 of SM0&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71947                <resetValue>0x00000000</resetValue>
71948                <fields>
71949                    <field>
71950                        <name>RXF0_PUTGET1</name>
71951                        <bitRange>[31:0]</bitRange>
71952                        <access>read-write</access>
71953                    </field>
71954                </fields>
71955            </register>
71956            <register>
71957                <name>RXF0_PUTGET2</name>
71958                <addressOffset>0x00000130</addressOffset>
71959                <description>Direct read/write access to entry 2 of SM0&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71960                <resetValue>0x00000000</resetValue>
71961                <fields>
71962                    <field>
71963                        <name>RXF0_PUTGET2</name>
71964                        <bitRange>[31:0]</bitRange>
71965                        <access>read-write</access>
71966                    </field>
71967                </fields>
71968            </register>
71969            <register>
71970                <name>RXF0_PUTGET3</name>
71971                <addressOffset>0x00000134</addressOffset>
71972                <description>Direct read/write access to entry 3 of SM0&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71973                <resetValue>0x00000000</resetValue>
71974                <fields>
71975                    <field>
71976                        <name>RXF0_PUTGET3</name>
71977                        <bitRange>[31:0]</bitRange>
71978                        <access>read-write</access>
71979                    </field>
71980                </fields>
71981            </register>
71982            <register>
71983                <name>RXF1_PUTGET0</name>
71984                <addressOffset>0x00000138</addressOffset>
71985                <description>Direct read/write access to entry 0 of SM1&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71986                <resetValue>0x00000000</resetValue>
71987                <fields>
71988                    <field>
71989                        <name>RXF1_PUTGET0</name>
71990                        <bitRange>[31:0]</bitRange>
71991                        <access>read-write</access>
71992                    </field>
71993                </fields>
71994            </register>
71995            <register>
71996                <name>RXF1_PUTGET1</name>
71997                <addressOffset>0x0000013c</addressOffset>
71998                <description>Direct read/write access to entry 1 of SM1&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
71999                <resetValue>0x00000000</resetValue>
72000                <fields>
72001                    <field>
72002                        <name>RXF1_PUTGET1</name>
72003                        <bitRange>[31:0]</bitRange>
72004                        <access>read-write</access>
72005                    </field>
72006                </fields>
72007            </register>
72008            <register>
72009                <name>RXF1_PUTGET2</name>
72010                <addressOffset>0x00000140</addressOffset>
72011                <description>Direct read/write access to entry 2 of SM1&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72012                <resetValue>0x00000000</resetValue>
72013                <fields>
72014                    <field>
72015                        <name>RXF1_PUTGET2</name>
72016                        <bitRange>[31:0]</bitRange>
72017                        <access>read-write</access>
72018                    </field>
72019                </fields>
72020            </register>
72021            <register>
72022                <name>RXF1_PUTGET3</name>
72023                <addressOffset>0x00000144</addressOffset>
72024                <description>Direct read/write access to entry 3 of SM1&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72025                <resetValue>0x00000000</resetValue>
72026                <fields>
72027                    <field>
72028                        <name>RXF1_PUTGET3</name>
72029                        <bitRange>[31:0]</bitRange>
72030                        <access>read-write</access>
72031                    </field>
72032                </fields>
72033            </register>
72034            <register>
72035                <name>RXF2_PUTGET0</name>
72036                <addressOffset>0x00000148</addressOffset>
72037                <description>Direct read/write access to entry 0 of SM2&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72038                <resetValue>0x00000000</resetValue>
72039                <fields>
72040                    <field>
72041                        <name>RXF2_PUTGET0</name>
72042                        <bitRange>[31:0]</bitRange>
72043                        <access>read-write</access>
72044                    </field>
72045                </fields>
72046            </register>
72047            <register>
72048                <name>RXF2_PUTGET1</name>
72049                <addressOffset>0x0000014c</addressOffset>
72050                <description>Direct read/write access to entry 1 of SM2&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72051                <resetValue>0x00000000</resetValue>
72052                <fields>
72053                    <field>
72054                        <name>RXF2_PUTGET1</name>
72055                        <bitRange>[31:0]</bitRange>
72056                        <access>read-write</access>
72057                    </field>
72058                </fields>
72059            </register>
72060            <register>
72061                <name>RXF2_PUTGET2</name>
72062                <addressOffset>0x00000150</addressOffset>
72063                <description>Direct read/write access to entry 2 of SM2&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72064                <resetValue>0x00000000</resetValue>
72065                <fields>
72066                    <field>
72067                        <name>RXF2_PUTGET2</name>
72068                        <bitRange>[31:0]</bitRange>
72069                        <access>read-write</access>
72070                    </field>
72071                </fields>
72072            </register>
72073            <register>
72074                <name>RXF2_PUTGET3</name>
72075                <addressOffset>0x00000154</addressOffset>
72076                <description>Direct read/write access to entry 3 of SM2&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72077                <resetValue>0x00000000</resetValue>
72078                <fields>
72079                    <field>
72080                        <name>RXF2_PUTGET3</name>
72081                        <bitRange>[31:0]</bitRange>
72082                        <access>read-write</access>
72083                    </field>
72084                </fields>
72085            </register>
72086            <register>
72087                <name>RXF3_PUTGET0</name>
72088                <addressOffset>0x00000158</addressOffset>
72089                <description>Direct read/write access to entry 0 of SM3&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72090                <resetValue>0x00000000</resetValue>
72091                <fields>
72092                    <field>
72093                        <name>RXF3_PUTGET0</name>
72094                        <bitRange>[31:0]</bitRange>
72095                        <access>read-write</access>
72096                    </field>
72097                </fields>
72098            </register>
72099            <register>
72100                <name>RXF3_PUTGET1</name>
72101                <addressOffset>0x0000015c</addressOffset>
72102                <description>Direct read/write access to entry 1 of SM3&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72103                <resetValue>0x00000000</resetValue>
72104                <fields>
72105                    <field>
72106                        <name>RXF3_PUTGET1</name>
72107                        <bitRange>[31:0]</bitRange>
72108                        <access>read-write</access>
72109                    </field>
72110                </fields>
72111            </register>
72112            <register>
72113                <name>RXF3_PUTGET2</name>
72114                <addressOffset>0x00000160</addressOffset>
72115                <description>Direct read/write access to entry 2 of SM3&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72116                <resetValue>0x00000000</resetValue>
72117                <fields>
72118                    <field>
72119                        <name>RXF3_PUTGET2</name>
72120                        <bitRange>[31:0]</bitRange>
72121                        <access>read-write</access>
72122                    </field>
72123                </fields>
72124            </register>
72125            <register>
72126                <name>RXF3_PUTGET3</name>
72127                <addressOffset>0x00000164</addressOffset>
72128                <description>Direct read/write access to entry 3 of SM3&#39;s RX FIFO, if SHIFTCTRL_FJOIN_RX_PUT xor SHIFTCTRL_FJOIN_RX_GET is set.</description>
72129                <resetValue>0x00000000</resetValue>
72130                <fields>
72131                    <field>
72132                        <name>RXF3_PUTGET3</name>
72133                        <bitRange>[31:0]</bitRange>
72134                        <access>read-write</access>
72135                    </field>
72136                </fields>
72137            </register>
72138            <register>
72139                <name>GPIOBASE</name>
72140                <addressOffset>0x00000168</addressOffset>
72141                <description>Relocate GPIO 0 (from PIO&#39;s point of view) in the system GPIO numbering, to access more than 32 GPIOs from PIO.
72142
72143                    Only the values 0 and 16 are supported (only bit 4 is writable).</description>
72144                <resetValue>0x00000000</resetValue>
72145                <fields>
72146                    <field>
72147                        <name>GPIOBASE</name>
72148                        <bitRange>[4:4]</bitRange>
72149                        <access>read-write</access>
72150                    </field>
72151                </fields>
72152            </register>
72153            <register>
72154                <name>INTR</name>
72155                <addressOffset>0x0000016c</addressOffset>
72156                <description>Raw Interrupts</description>
72157                <resetValue>0x00000000</resetValue>
72158                <fields>
72159                    <field>
72160                        <name>SM7</name>
72161                        <bitRange>[15:15]</bitRange>
72162                        <access>read-only</access>
72163                    </field>
72164                    <field>
72165                        <name>SM6</name>
72166                        <bitRange>[14:14]</bitRange>
72167                        <access>read-only</access>
72168                    </field>
72169                    <field>
72170                        <name>SM5</name>
72171                        <bitRange>[13:13]</bitRange>
72172                        <access>read-only</access>
72173                    </field>
72174                    <field>
72175                        <name>SM4</name>
72176                        <bitRange>[12:12]</bitRange>
72177                        <access>read-only</access>
72178                    </field>
72179                    <field>
72180                        <name>SM3</name>
72181                        <bitRange>[11:11]</bitRange>
72182                        <access>read-only</access>
72183                    </field>
72184                    <field>
72185                        <name>SM2</name>
72186                        <bitRange>[10:10]</bitRange>
72187                        <access>read-only</access>
72188                    </field>
72189                    <field>
72190                        <name>SM1</name>
72191                        <bitRange>[9:9]</bitRange>
72192                        <access>read-only</access>
72193                    </field>
72194                    <field>
72195                        <name>SM0</name>
72196                        <bitRange>[8:8]</bitRange>
72197                        <access>read-only</access>
72198                    </field>
72199                    <field>
72200                        <name>SM3_TXNFULL</name>
72201                        <bitRange>[7:7]</bitRange>
72202                        <access>read-only</access>
72203                    </field>
72204                    <field>
72205                        <name>SM2_TXNFULL</name>
72206                        <bitRange>[6:6]</bitRange>
72207                        <access>read-only</access>
72208                    </field>
72209                    <field>
72210                        <name>SM1_TXNFULL</name>
72211                        <bitRange>[5:5]</bitRange>
72212                        <access>read-only</access>
72213                    </field>
72214                    <field>
72215                        <name>SM0_TXNFULL</name>
72216                        <bitRange>[4:4]</bitRange>
72217                        <access>read-only</access>
72218                    </field>
72219                    <field>
72220                        <name>SM3_RXNEMPTY</name>
72221                        <bitRange>[3:3]</bitRange>
72222                        <access>read-only</access>
72223                    </field>
72224                    <field>
72225                        <name>SM2_RXNEMPTY</name>
72226                        <bitRange>[2:2]</bitRange>
72227                        <access>read-only</access>
72228                    </field>
72229                    <field>
72230                        <name>SM1_RXNEMPTY</name>
72231                        <bitRange>[1:1]</bitRange>
72232                        <access>read-only</access>
72233                    </field>
72234                    <field>
72235                        <name>SM0_RXNEMPTY</name>
72236                        <bitRange>[0:0]</bitRange>
72237                        <access>read-only</access>
72238                    </field>
72239                </fields>
72240            </register>
72241            <register>
72242                <name>IRQ0_INTE</name>
72243                <addressOffset>0x00000170</addressOffset>
72244                <description>Interrupt Enable for irq0</description>
72245                <resetValue>0x00000000</resetValue>
72246                <fields>
72247                    <field>
72248                        <name>SM7</name>
72249                        <bitRange>[15:15]</bitRange>
72250                        <access>read-write</access>
72251                    </field>
72252                    <field>
72253                        <name>SM6</name>
72254                        <bitRange>[14:14]</bitRange>
72255                        <access>read-write</access>
72256                    </field>
72257                    <field>
72258                        <name>SM5</name>
72259                        <bitRange>[13:13]</bitRange>
72260                        <access>read-write</access>
72261                    </field>
72262                    <field>
72263                        <name>SM4</name>
72264                        <bitRange>[12:12]</bitRange>
72265                        <access>read-write</access>
72266                    </field>
72267                    <field>
72268                        <name>SM3</name>
72269                        <bitRange>[11:11]</bitRange>
72270                        <access>read-write</access>
72271                    </field>
72272                    <field>
72273                        <name>SM2</name>
72274                        <bitRange>[10:10]</bitRange>
72275                        <access>read-write</access>
72276                    </field>
72277                    <field>
72278                        <name>SM1</name>
72279                        <bitRange>[9:9]</bitRange>
72280                        <access>read-write</access>
72281                    </field>
72282                    <field>
72283                        <name>SM0</name>
72284                        <bitRange>[8:8]</bitRange>
72285                        <access>read-write</access>
72286                    </field>
72287                    <field>
72288                        <name>SM3_TXNFULL</name>
72289                        <bitRange>[7:7]</bitRange>
72290                        <access>read-write</access>
72291                    </field>
72292                    <field>
72293                        <name>SM2_TXNFULL</name>
72294                        <bitRange>[6:6]</bitRange>
72295                        <access>read-write</access>
72296                    </field>
72297                    <field>
72298                        <name>SM1_TXNFULL</name>
72299                        <bitRange>[5:5]</bitRange>
72300                        <access>read-write</access>
72301                    </field>
72302                    <field>
72303                        <name>SM0_TXNFULL</name>
72304                        <bitRange>[4:4]</bitRange>
72305                        <access>read-write</access>
72306                    </field>
72307                    <field>
72308                        <name>SM3_RXNEMPTY</name>
72309                        <bitRange>[3:3]</bitRange>
72310                        <access>read-write</access>
72311                    </field>
72312                    <field>
72313                        <name>SM2_RXNEMPTY</name>
72314                        <bitRange>[2:2]</bitRange>
72315                        <access>read-write</access>
72316                    </field>
72317                    <field>
72318                        <name>SM1_RXNEMPTY</name>
72319                        <bitRange>[1:1]</bitRange>
72320                        <access>read-write</access>
72321                    </field>
72322                    <field>
72323                        <name>SM0_RXNEMPTY</name>
72324                        <bitRange>[0:0]</bitRange>
72325                        <access>read-write</access>
72326                    </field>
72327                </fields>
72328            </register>
72329            <register>
72330                <name>IRQ0_INTF</name>
72331                <addressOffset>0x00000174</addressOffset>
72332                <description>Interrupt Force for irq0</description>
72333                <resetValue>0x00000000</resetValue>
72334                <fields>
72335                    <field>
72336                        <name>SM7</name>
72337                        <bitRange>[15:15]</bitRange>
72338                        <access>read-write</access>
72339                    </field>
72340                    <field>
72341                        <name>SM6</name>
72342                        <bitRange>[14:14]</bitRange>
72343                        <access>read-write</access>
72344                    </field>
72345                    <field>
72346                        <name>SM5</name>
72347                        <bitRange>[13:13]</bitRange>
72348                        <access>read-write</access>
72349                    </field>
72350                    <field>
72351                        <name>SM4</name>
72352                        <bitRange>[12:12]</bitRange>
72353                        <access>read-write</access>
72354                    </field>
72355                    <field>
72356                        <name>SM3</name>
72357                        <bitRange>[11:11]</bitRange>
72358                        <access>read-write</access>
72359                    </field>
72360                    <field>
72361                        <name>SM2</name>
72362                        <bitRange>[10:10]</bitRange>
72363                        <access>read-write</access>
72364                    </field>
72365                    <field>
72366                        <name>SM1</name>
72367                        <bitRange>[9:9]</bitRange>
72368                        <access>read-write</access>
72369                    </field>
72370                    <field>
72371                        <name>SM0</name>
72372                        <bitRange>[8:8]</bitRange>
72373                        <access>read-write</access>
72374                    </field>
72375                    <field>
72376                        <name>SM3_TXNFULL</name>
72377                        <bitRange>[7:7]</bitRange>
72378                        <access>read-write</access>
72379                    </field>
72380                    <field>
72381                        <name>SM2_TXNFULL</name>
72382                        <bitRange>[6:6]</bitRange>
72383                        <access>read-write</access>
72384                    </field>
72385                    <field>
72386                        <name>SM1_TXNFULL</name>
72387                        <bitRange>[5:5]</bitRange>
72388                        <access>read-write</access>
72389                    </field>
72390                    <field>
72391                        <name>SM0_TXNFULL</name>
72392                        <bitRange>[4:4]</bitRange>
72393                        <access>read-write</access>
72394                    </field>
72395                    <field>
72396                        <name>SM3_RXNEMPTY</name>
72397                        <bitRange>[3:3]</bitRange>
72398                        <access>read-write</access>
72399                    </field>
72400                    <field>
72401                        <name>SM2_RXNEMPTY</name>
72402                        <bitRange>[2:2]</bitRange>
72403                        <access>read-write</access>
72404                    </field>
72405                    <field>
72406                        <name>SM1_RXNEMPTY</name>
72407                        <bitRange>[1:1]</bitRange>
72408                        <access>read-write</access>
72409                    </field>
72410                    <field>
72411                        <name>SM0_RXNEMPTY</name>
72412                        <bitRange>[0:0]</bitRange>
72413                        <access>read-write</access>
72414                    </field>
72415                </fields>
72416            </register>
72417            <register>
72418                <name>IRQ0_INTS</name>
72419                <addressOffset>0x00000178</addressOffset>
72420                <description>Interrupt status after masking &amp; forcing for irq0</description>
72421                <resetValue>0x00000000</resetValue>
72422                <fields>
72423                    <field>
72424                        <name>SM7</name>
72425                        <bitRange>[15:15]</bitRange>
72426                        <access>read-only</access>
72427                    </field>
72428                    <field>
72429                        <name>SM6</name>
72430                        <bitRange>[14:14]</bitRange>
72431                        <access>read-only</access>
72432                    </field>
72433                    <field>
72434                        <name>SM5</name>
72435                        <bitRange>[13:13]</bitRange>
72436                        <access>read-only</access>
72437                    </field>
72438                    <field>
72439                        <name>SM4</name>
72440                        <bitRange>[12:12]</bitRange>
72441                        <access>read-only</access>
72442                    </field>
72443                    <field>
72444                        <name>SM3</name>
72445                        <bitRange>[11:11]</bitRange>
72446                        <access>read-only</access>
72447                    </field>
72448                    <field>
72449                        <name>SM2</name>
72450                        <bitRange>[10:10]</bitRange>
72451                        <access>read-only</access>
72452                    </field>
72453                    <field>
72454                        <name>SM1</name>
72455                        <bitRange>[9:9]</bitRange>
72456                        <access>read-only</access>
72457                    </field>
72458                    <field>
72459                        <name>SM0</name>
72460                        <bitRange>[8:8]</bitRange>
72461                        <access>read-only</access>
72462                    </field>
72463                    <field>
72464                        <name>SM3_TXNFULL</name>
72465                        <bitRange>[7:7]</bitRange>
72466                        <access>read-only</access>
72467                    </field>
72468                    <field>
72469                        <name>SM2_TXNFULL</name>
72470                        <bitRange>[6:6]</bitRange>
72471                        <access>read-only</access>
72472                    </field>
72473                    <field>
72474                        <name>SM1_TXNFULL</name>
72475                        <bitRange>[5:5]</bitRange>
72476                        <access>read-only</access>
72477                    </field>
72478                    <field>
72479                        <name>SM0_TXNFULL</name>
72480                        <bitRange>[4:4]</bitRange>
72481                        <access>read-only</access>
72482                    </field>
72483                    <field>
72484                        <name>SM3_RXNEMPTY</name>
72485                        <bitRange>[3:3]</bitRange>
72486                        <access>read-only</access>
72487                    </field>
72488                    <field>
72489                        <name>SM2_RXNEMPTY</name>
72490                        <bitRange>[2:2]</bitRange>
72491                        <access>read-only</access>
72492                    </field>
72493                    <field>
72494                        <name>SM1_RXNEMPTY</name>
72495                        <bitRange>[1:1]</bitRange>
72496                        <access>read-only</access>
72497                    </field>
72498                    <field>
72499                        <name>SM0_RXNEMPTY</name>
72500                        <bitRange>[0:0]</bitRange>
72501                        <access>read-only</access>
72502                    </field>
72503                </fields>
72504            </register>
72505            <register>
72506                <name>IRQ1_INTE</name>
72507                <addressOffset>0x0000017c</addressOffset>
72508                <description>Interrupt Enable for irq1</description>
72509                <resetValue>0x00000000</resetValue>
72510                <fields>
72511                    <field>
72512                        <name>SM7</name>
72513                        <bitRange>[15:15]</bitRange>
72514                        <access>read-write</access>
72515                    </field>
72516                    <field>
72517                        <name>SM6</name>
72518                        <bitRange>[14:14]</bitRange>
72519                        <access>read-write</access>
72520                    </field>
72521                    <field>
72522                        <name>SM5</name>
72523                        <bitRange>[13:13]</bitRange>
72524                        <access>read-write</access>
72525                    </field>
72526                    <field>
72527                        <name>SM4</name>
72528                        <bitRange>[12:12]</bitRange>
72529                        <access>read-write</access>
72530                    </field>
72531                    <field>
72532                        <name>SM3</name>
72533                        <bitRange>[11:11]</bitRange>
72534                        <access>read-write</access>
72535                    </field>
72536                    <field>
72537                        <name>SM2</name>
72538                        <bitRange>[10:10]</bitRange>
72539                        <access>read-write</access>
72540                    </field>
72541                    <field>
72542                        <name>SM1</name>
72543                        <bitRange>[9:9]</bitRange>
72544                        <access>read-write</access>
72545                    </field>
72546                    <field>
72547                        <name>SM0</name>
72548                        <bitRange>[8:8]</bitRange>
72549                        <access>read-write</access>
72550                    </field>
72551                    <field>
72552                        <name>SM3_TXNFULL</name>
72553                        <bitRange>[7:7]</bitRange>
72554                        <access>read-write</access>
72555                    </field>
72556                    <field>
72557                        <name>SM2_TXNFULL</name>
72558                        <bitRange>[6:6]</bitRange>
72559                        <access>read-write</access>
72560                    </field>
72561                    <field>
72562                        <name>SM1_TXNFULL</name>
72563                        <bitRange>[5:5]</bitRange>
72564                        <access>read-write</access>
72565                    </field>
72566                    <field>
72567                        <name>SM0_TXNFULL</name>
72568                        <bitRange>[4:4]</bitRange>
72569                        <access>read-write</access>
72570                    </field>
72571                    <field>
72572                        <name>SM3_RXNEMPTY</name>
72573                        <bitRange>[3:3]</bitRange>
72574                        <access>read-write</access>
72575                    </field>
72576                    <field>
72577                        <name>SM2_RXNEMPTY</name>
72578                        <bitRange>[2:2]</bitRange>
72579                        <access>read-write</access>
72580                    </field>
72581                    <field>
72582                        <name>SM1_RXNEMPTY</name>
72583                        <bitRange>[1:1]</bitRange>
72584                        <access>read-write</access>
72585                    </field>
72586                    <field>
72587                        <name>SM0_RXNEMPTY</name>
72588                        <bitRange>[0:0]</bitRange>
72589                        <access>read-write</access>
72590                    </field>
72591                </fields>
72592            </register>
72593            <register>
72594                <name>IRQ1_INTF</name>
72595                <addressOffset>0x00000180</addressOffset>
72596                <description>Interrupt Force for irq1</description>
72597                <resetValue>0x00000000</resetValue>
72598                <fields>
72599                    <field>
72600                        <name>SM7</name>
72601                        <bitRange>[15:15]</bitRange>
72602                        <access>read-write</access>
72603                    </field>
72604                    <field>
72605                        <name>SM6</name>
72606                        <bitRange>[14:14]</bitRange>
72607                        <access>read-write</access>
72608                    </field>
72609                    <field>
72610                        <name>SM5</name>
72611                        <bitRange>[13:13]</bitRange>
72612                        <access>read-write</access>
72613                    </field>
72614                    <field>
72615                        <name>SM4</name>
72616                        <bitRange>[12:12]</bitRange>
72617                        <access>read-write</access>
72618                    </field>
72619                    <field>
72620                        <name>SM3</name>
72621                        <bitRange>[11:11]</bitRange>
72622                        <access>read-write</access>
72623                    </field>
72624                    <field>
72625                        <name>SM2</name>
72626                        <bitRange>[10:10]</bitRange>
72627                        <access>read-write</access>
72628                    </field>
72629                    <field>
72630                        <name>SM1</name>
72631                        <bitRange>[9:9]</bitRange>
72632                        <access>read-write</access>
72633                    </field>
72634                    <field>
72635                        <name>SM0</name>
72636                        <bitRange>[8:8]</bitRange>
72637                        <access>read-write</access>
72638                    </field>
72639                    <field>
72640                        <name>SM3_TXNFULL</name>
72641                        <bitRange>[7:7]</bitRange>
72642                        <access>read-write</access>
72643                    </field>
72644                    <field>
72645                        <name>SM2_TXNFULL</name>
72646                        <bitRange>[6:6]</bitRange>
72647                        <access>read-write</access>
72648                    </field>
72649                    <field>
72650                        <name>SM1_TXNFULL</name>
72651                        <bitRange>[5:5]</bitRange>
72652                        <access>read-write</access>
72653                    </field>
72654                    <field>
72655                        <name>SM0_TXNFULL</name>
72656                        <bitRange>[4:4]</bitRange>
72657                        <access>read-write</access>
72658                    </field>
72659                    <field>
72660                        <name>SM3_RXNEMPTY</name>
72661                        <bitRange>[3:3]</bitRange>
72662                        <access>read-write</access>
72663                    </field>
72664                    <field>
72665                        <name>SM2_RXNEMPTY</name>
72666                        <bitRange>[2:2]</bitRange>
72667                        <access>read-write</access>
72668                    </field>
72669                    <field>
72670                        <name>SM1_RXNEMPTY</name>
72671                        <bitRange>[1:1]</bitRange>
72672                        <access>read-write</access>
72673                    </field>
72674                    <field>
72675                        <name>SM0_RXNEMPTY</name>
72676                        <bitRange>[0:0]</bitRange>
72677                        <access>read-write</access>
72678                    </field>
72679                </fields>
72680            </register>
72681            <register>
72682                <name>IRQ1_INTS</name>
72683                <addressOffset>0x00000184</addressOffset>
72684                <description>Interrupt status after masking &amp; forcing for irq1</description>
72685                <resetValue>0x00000000</resetValue>
72686                <fields>
72687                    <field>
72688                        <name>SM7</name>
72689                        <bitRange>[15:15]</bitRange>
72690                        <access>read-only</access>
72691                    </field>
72692                    <field>
72693                        <name>SM6</name>
72694                        <bitRange>[14:14]</bitRange>
72695                        <access>read-only</access>
72696                    </field>
72697                    <field>
72698                        <name>SM5</name>
72699                        <bitRange>[13:13]</bitRange>
72700                        <access>read-only</access>
72701                    </field>
72702                    <field>
72703                        <name>SM4</name>
72704                        <bitRange>[12:12]</bitRange>
72705                        <access>read-only</access>
72706                    </field>
72707                    <field>
72708                        <name>SM3</name>
72709                        <bitRange>[11:11]</bitRange>
72710                        <access>read-only</access>
72711                    </field>
72712                    <field>
72713                        <name>SM2</name>
72714                        <bitRange>[10:10]</bitRange>
72715                        <access>read-only</access>
72716                    </field>
72717                    <field>
72718                        <name>SM1</name>
72719                        <bitRange>[9:9]</bitRange>
72720                        <access>read-only</access>
72721                    </field>
72722                    <field>
72723                        <name>SM0</name>
72724                        <bitRange>[8:8]</bitRange>
72725                        <access>read-only</access>
72726                    </field>
72727                    <field>
72728                        <name>SM3_TXNFULL</name>
72729                        <bitRange>[7:7]</bitRange>
72730                        <access>read-only</access>
72731                    </field>
72732                    <field>
72733                        <name>SM2_TXNFULL</name>
72734                        <bitRange>[6:6]</bitRange>
72735                        <access>read-only</access>
72736                    </field>
72737                    <field>
72738                        <name>SM1_TXNFULL</name>
72739                        <bitRange>[5:5]</bitRange>
72740                        <access>read-only</access>
72741                    </field>
72742                    <field>
72743                        <name>SM0_TXNFULL</name>
72744                        <bitRange>[4:4]</bitRange>
72745                        <access>read-only</access>
72746                    </field>
72747                    <field>
72748                        <name>SM3_RXNEMPTY</name>
72749                        <bitRange>[3:3]</bitRange>
72750                        <access>read-only</access>
72751                    </field>
72752                    <field>
72753                        <name>SM2_RXNEMPTY</name>
72754                        <bitRange>[2:2]</bitRange>
72755                        <access>read-only</access>
72756                    </field>
72757                    <field>
72758                        <name>SM1_RXNEMPTY</name>
72759                        <bitRange>[1:1]</bitRange>
72760                        <access>read-only</access>
72761                    </field>
72762                    <field>
72763                        <name>SM0_RXNEMPTY</name>
72764                        <bitRange>[0:0]</bitRange>
72765                        <access>read-only</access>
72766                    </field>
72767                </fields>
72768            </register>
72769        </registers>
72770    </peripheral>
72771    <peripheral derivedFrom="PIO0">
72772        <name>PIO1</name>
72773        <baseAddress>0x50300000</baseAddress>
72774        <interrupt>
72775        <name>PIO1_IRQ_0</name>
72776        <value>17</value>
72777    </interrupt>
72778        <interrupt>
72779        <name>PIO1_IRQ_1</name>
72780        <value>18</value>
72781    </interrupt>
72782    </peripheral>
72783    <peripheral derivedFrom="PIO0">
72784        <name>PIO2</name>
72785        <baseAddress>0x50400000</baseAddress>
72786        <interrupt>
72787        <name>PIO2_IRQ_0</name>
72788        <value>19</value>
72789    </interrupt>
72790        <interrupt>
72791        <name>PIO2_IRQ_1</name>
72792        <value>20</value>
72793    </interrupt>
72794    </peripheral>
72795    <peripheral>
72796        <name>BUSCTRL</name>
72797        <description>Register block for busfabric control signals and performance counters</description>
72798        <baseAddress>0x40068000</baseAddress>
72799        <addressBlock>
72800            <offset>0</offset>
72801            <size>44</size>
72802            <usage>registers</usage>
72803        </addressBlock>
72804        <registers>
72805            <register>
72806                <name>BUS_PRIORITY</name>
72807                <addressOffset>0x00000000</addressOffset>
72808                <description>Set the priority of each master for bus arbitration.</description>
72809                <resetValue>0x00000000</resetValue>
72810                <fields>
72811                    <field>
72812                        <name>DMA_W</name>
72813                        <description>0 - low priority, 1 - high priority</description>
72814                        <bitRange>[12:12]</bitRange>
72815                        <access>read-write</access>
72816                    </field>
72817                    <field>
72818                        <name>DMA_R</name>
72819                        <description>0 - low priority, 1 - high priority</description>
72820                        <bitRange>[8:8]</bitRange>
72821                        <access>read-write</access>
72822                    </field>
72823                    <field>
72824                        <name>PROC1</name>
72825                        <description>0 - low priority, 1 - high priority</description>
72826                        <bitRange>[4:4]</bitRange>
72827                        <access>read-write</access>
72828                    </field>
72829                    <field>
72830                        <name>PROC0</name>
72831                        <description>0 - low priority, 1 - high priority</description>
72832                        <bitRange>[0:0]</bitRange>
72833                        <access>read-write</access>
72834                    </field>
72835                </fields>
72836            </register>
72837            <register>
72838                <name>BUS_PRIORITY_ACK</name>
72839                <addressOffset>0x00000004</addressOffset>
72840                <description>Bus priority acknowledge</description>
72841                <resetValue>0x00000000</resetValue>
72842                <fields>
72843                    <field>
72844                        <name>BUS_PRIORITY_ACK</name>
72845                        <description>Goes to 1 once all arbiters have registered the new global priority levels.
72846                            Arbiters update their local priority when servicing a new nonsequential access.
72847                            In normal circumstances this will happen almost immediately.</description>
72848                        <bitRange>[0:0]</bitRange>
72849                        <access>read-only</access>
72850                    </field>
72851                </fields>
72852            </register>
72853            <register>
72854                <name>PERFCTR_EN</name>
72855                <addressOffset>0x00000008</addressOffset>
72856                <description>Enable the performance counters. If 0, the performance counters do not increment. This can be used to precisely start/stop event sampling around the profiled section of code.
72857
72858                    The performance counters are initially disabled, to save energy.</description>
72859                <resetValue>0x00000000</resetValue>
72860                <fields>
72861                    <field>
72862                        <name>PERFCTR_EN</name>
72863                        <bitRange>[0:0]</bitRange>
72864                        <access>read-write</access>
72865                    </field>
72866                </fields>
72867            </register>
72868            <register>
72869                <name>PERFCTR0</name>
72870                <addressOffset>0x0000000c</addressOffset>
72871                <description>Bus fabric performance counter 0</description>
72872                <resetValue>0x00000000</resetValue>
72873                <fields>
72874                    <field>
72875                        <name>PERFCTR0</name>
72876                        <description>Busfabric saturating performance counter 0
72877                            Count some event signal from the busfabric arbiters, if PERFCTR_EN is set.
72878                            Write any value to clear. Select an event to count using PERFSEL0</description>
72879                        <bitRange>[23:0]</bitRange>
72880                        <access>read-write</access>
72881                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
72882                    </field>
72883                </fields>
72884            </register>
72885            <register>
72886                <name>PERFSEL0</name>
72887                <addressOffset>0x00000010</addressOffset>
72888                <description>Bus fabric performance event select for PERFCTR0</description>
72889                <resetValue>0x0000001f</resetValue>
72890                <fields>
72891                    <field>
72892                        <name>PERFSEL0</name>
72893                        <description>Select an event for PERFCTR0. For each downstream port of the main crossbar, four events are available: ACCESS, an access took place; ACCESS_CONTESTED, an access took place that previously stalled due to contention from other masters; STALL_DOWNSTREAM, count cycles where any master stalled due to a stall on the downstream bus; STALL_UPSTREAM, count cycles where any master stalled for any reason, including contention from other masters.</description>
72894                        <bitRange>[6:0]</bitRange>
72895                        <access>read-write</access>
72896                        <enumeratedValues>
72897                            <enumeratedValue>
72898                                <name>siob_proc1_stall_upstream</name>
72899                                <value>0</value>
72900                            </enumeratedValue>
72901                            <enumeratedValue>
72902                                <name>siob_proc1_stall_downstream</name>
72903                                <value>1</value>
72904                            </enumeratedValue>
72905                            <enumeratedValue>
72906                                <name>siob_proc1_access_contested</name>
72907                                <value>2</value>
72908                            </enumeratedValue>
72909                            <enumeratedValue>
72910                                <name>siob_proc1_access</name>
72911                                <value>3</value>
72912                            </enumeratedValue>
72913                            <enumeratedValue>
72914                                <name>siob_proc0_stall_upstream</name>
72915                                <value>4</value>
72916                            </enumeratedValue>
72917                            <enumeratedValue>
72918                                <name>siob_proc0_stall_downstream</name>
72919                                <value>5</value>
72920                            </enumeratedValue>
72921                            <enumeratedValue>
72922                                <name>siob_proc0_access_contested</name>
72923                                <value>6</value>
72924                            </enumeratedValue>
72925                            <enumeratedValue>
72926                                <name>siob_proc0_access</name>
72927                                <value>7</value>
72928                            </enumeratedValue>
72929                            <enumeratedValue>
72930                                <name>apb_stall_upstream</name>
72931                                <value>8</value>
72932                            </enumeratedValue>
72933                            <enumeratedValue>
72934                                <name>apb_stall_downstream</name>
72935                                <value>9</value>
72936                            </enumeratedValue>
72937                            <enumeratedValue>
72938                                <name>apb_access_contested</name>
72939                                <value>10</value>
72940                            </enumeratedValue>
72941                            <enumeratedValue>
72942                                <name>apb_access</name>
72943                                <value>11</value>
72944                            </enumeratedValue>
72945                            <enumeratedValue>
72946                                <name>fastperi_stall_upstream</name>
72947                                <value>12</value>
72948                            </enumeratedValue>
72949                            <enumeratedValue>
72950                                <name>fastperi_stall_downstream</name>
72951                                <value>13</value>
72952                            </enumeratedValue>
72953                            <enumeratedValue>
72954                                <name>fastperi_access_contested</name>
72955                                <value>14</value>
72956                            </enumeratedValue>
72957                            <enumeratedValue>
72958                                <name>fastperi_access</name>
72959                                <value>15</value>
72960                            </enumeratedValue>
72961                            <enumeratedValue>
72962                                <name>sram9_stall_upstream</name>
72963                                <value>16</value>
72964                            </enumeratedValue>
72965                            <enumeratedValue>
72966                                <name>sram9_stall_downstream</name>
72967                                <value>17</value>
72968                            </enumeratedValue>
72969                            <enumeratedValue>
72970                                <name>sram9_access_contested</name>
72971                                <value>18</value>
72972                            </enumeratedValue>
72973                            <enumeratedValue>
72974                                <name>sram9_access</name>
72975                                <value>19</value>
72976                            </enumeratedValue>
72977                            <enumeratedValue>
72978                                <name>sram8_stall_upstream</name>
72979                                <value>20</value>
72980                            </enumeratedValue>
72981                            <enumeratedValue>
72982                                <name>sram8_stall_downstream</name>
72983                                <value>21</value>
72984                            </enumeratedValue>
72985                            <enumeratedValue>
72986                                <name>sram8_access_contested</name>
72987                                <value>22</value>
72988                            </enumeratedValue>
72989                            <enumeratedValue>
72990                                <name>sram8_access</name>
72991                                <value>23</value>
72992                            </enumeratedValue>
72993                            <enumeratedValue>
72994                                <name>sram7_stall_upstream</name>
72995                                <value>24</value>
72996                            </enumeratedValue>
72997                            <enumeratedValue>
72998                                <name>sram7_stall_downstream</name>
72999                                <value>25</value>
73000                            </enumeratedValue>
73001                            <enumeratedValue>
73002                                <name>sram7_access_contested</name>
73003                                <value>26</value>
73004                            </enumeratedValue>
73005                            <enumeratedValue>
73006                                <name>sram7_access</name>
73007                                <value>27</value>
73008                            </enumeratedValue>
73009                            <enumeratedValue>
73010                                <name>sram6_stall_upstream</name>
73011                                <value>28</value>
73012                            </enumeratedValue>
73013                            <enumeratedValue>
73014                                <name>sram6_stall_downstream</name>
73015                                <value>29</value>
73016                            </enumeratedValue>
73017                            <enumeratedValue>
73018                                <name>sram6_access_contested</name>
73019                                <value>30</value>
73020                            </enumeratedValue>
73021                            <enumeratedValue>
73022                                <name>sram6_access</name>
73023                                <value>31</value>
73024                            </enumeratedValue>
73025                            <enumeratedValue>
73026                                <name>sram5_stall_upstream</name>
73027                                <value>32</value>
73028                            </enumeratedValue>
73029                            <enumeratedValue>
73030                                <name>sram5_stall_downstream</name>
73031                                <value>33</value>
73032                            </enumeratedValue>
73033                            <enumeratedValue>
73034                                <name>sram5_access_contested</name>
73035                                <value>34</value>
73036                            </enumeratedValue>
73037                            <enumeratedValue>
73038                                <name>sram5_access</name>
73039                                <value>35</value>
73040                            </enumeratedValue>
73041                            <enumeratedValue>
73042                                <name>sram4_stall_upstream</name>
73043                                <value>36</value>
73044                            </enumeratedValue>
73045                            <enumeratedValue>
73046                                <name>sram4_stall_downstream</name>
73047                                <value>37</value>
73048                            </enumeratedValue>
73049                            <enumeratedValue>
73050                                <name>sram4_access_contested</name>
73051                                <value>38</value>
73052                            </enumeratedValue>
73053                            <enumeratedValue>
73054                                <name>sram4_access</name>
73055                                <value>39</value>
73056                            </enumeratedValue>
73057                            <enumeratedValue>
73058                                <name>sram3_stall_upstream</name>
73059                                <value>40</value>
73060                            </enumeratedValue>
73061                            <enumeratedValue>
73062                                <name>sram3_stall_downstream</name>
73063                                <value>41</value>
73064                            </enumeratedValue>
73065                            <enumeratedValue>
73066                                <name>sram3_access_contested</name>
73067                                <value>42</value>
73068                            </enumeratedValue>
73069                            <enumeratedValue>
73070                                <name>sram3_access</name>
73071                                <value>43</value>
73072                            </enumeratedValue>
73073                            <enumeratedValue>
73074                                <name>sram2_stall_upstream</name>
73075                                <value>44</value>
73076                            </enumeratedValue>
73077                            <enumeratedValue>
73078                                <name>sram2_stall_downstream</name>
73079                                <value>45</value>
73080                            </enumeratedValue>
73081                            <enumeratedValue>
73082                                <name>sram2_access_contested</name>
73083                                <value>46</value>
73084                            </enumeratedValue>
73085                            <enumeratedValue>
73086                                <name>sram2_access</name>
73087                                <value>47</value>
73088                            </enumeratedValue>
73089                            <enumeratedValue>
73090                                <name>sram1_stall_upstream</name>
73091                                <value>48</value>
73092                            </enumeratedValue>
73093                            <enumeratedValue>
73094                                <name>sram1_stall_downstream</name>
73095                                <value>49</value>
73096                            </enumeratedValue>
73097                            <enumeratedValue>
73098                                <name>sram1_access_contested</name>
73099                                <value>50</value>
73100                            </enumeratedValue>
73101                            <enumeratedValue>
73102                                <name>sram1_access</name>
73103                                <value>51</value>
73104                            </enumeratedValue>
73105                            <enumeratedValue>
73106                                <name>sram0_stall_upstream</name>
73107                                <value>52</value>
73108                            </enumeratedValue>
73109                            <enumeratedValue>
73110                                <name>sram0_stall_downstream</name>
73111                                <value>53</value>
73112                            </enumeratedValue>
73113                            <enumeratedValue>
73114                                <name>sram0_access_contested</name>
73115                                <value>54</value>
73116                            </enumeratedValue>
73117                            <enumeratedValue>
73118                                <name>sram0_access</name>
73119                                <value>55</value>
73120                            </enumeratedValue>
73121                            <enumeratedValue>
73122                                <name>xip_main1_stall_upstream</name>
73123                                <value>56</value>
73124                            </enumeratedValue>
73125                            <enumeratedValue>
73126                                <name>xip_main1_stall_downstream</name>
73127                                <value>57</value>
73128                            </enumeratedValue>
73129                            <enumeratedValue>
73130                                <name>xip_main1_access_contested</name>
73131                                <value>58</value>
73132                            </enumeratedValue>
73133                            <enumeratedValue>
73134                                <name>xip_main1_access</name>
73135                                <value>59</value>
73136                            </enumeratedValue>
73137                            <enumeratedValue>
73138                                <name>xip_main0_stall_upstream</name>
73139                                <value>60</value>
73140                            </enumeratedValue>
73141                            <enumeratedValue>
73142                                <name>xip_main0_stall_downstream</name>
73143                                <value>61</value>
73144                            </enumeratedValue>
73145                            <enumeratedValue>
73146                                <name>xip_main0_access_contested</name>
73147                                <value>62</value>
73148                            </enumeratedValue>
73149                            <enumeratedValue>
73150                                <name>xip_main0_access</name>
73151                                <value>63</value>
73152                            </enumeratedValue>
73153                            <enumeratedValue>
73154                                <name>rom_stall_upstream</name>
73155                                <value>64</value>
73156                            </enumeratedValue>
73157                            <enumeratedValue>
73158                                <name>rom_stall_downstream</name>
73159                                <value>65</value>
73160                            </enumeratedValue>
73161                            <enumeratedValue>
73162                                <name>rom_access_contested</name>
73163                                <value>66</value>
73164                            </enumeratedValue>
73165                            <enumeratedValue>
73166                                <name>rom_access</name>
73167                                <value>67</value>
73168                            </enumeratedValue>
73169                        </enumeratedValues>
73170                    </field>
73171                </fields>
73172            </register>
73173            <register>
73174                <name>PERFCTR1</name>
73175                <addressOffset>0x00000014</addressOffset>
73176                <description>Bus fabric performance counter 1</description>
73177                <resetValue>0x00000000</resetValue>
73178                <fields>
73179                    <field>
73180                        <name>PERFCTR1</name>
73181                        <description>Busfabric saturating performance counter 1
73182                            Count some event signal from the busfabric arbiters, if PERFCTR_EN is set.
73183                            Write any value to clear. Select an event to count using PERFSEL1</description>
73184                        <bitRange>[23:0]</bitRange>
73185                        <access>read-write</access>
73186                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
73187                    </field>
73188                </fields>
73189            </register>
73190            <register>
73191                <name>PERFSEL1</name>
73192                <addressOffset>0x00000018</addressOffset>
73193                <description>Bus fabric performance event select for PERFCTR1</description>
73194                <resetValue>0x0000001f</resetValue>
73195                <fields>
73196                    <field>
73197                        <name>PERFSEL1</name>
73198                        <description>Select an event for PERFCTR1. For each downstream port of the main crossbar, four events are available: ACCESS, an access took place; ACCESS_CONTESTED, an access took place that previously stalled due to contention from other masters; STALL_DOWNSTREAM, count cycles where any master stalled due to a stall on the downstream bus; STALL_UPSTREAM, count cycles where any master stalled for any reason, including contention from other masters.</description>
73199                        <bitRange>[6:0]</bitRange>
73200                        <access>read-write</access>
73201                        <enumeratedValues>
73202                            <enumeratedValue>
73203                                <name>siob_proc1_stall_upstream</name>
73204                                <value>0</value>
73205                            </enumeratedValue>
73206                            <enumeratedValue>
73207                                <name>siob_proc1_stall_downstream</name>
73208                                <value>1</value>
73209                            </enumeratedValue>
73210                            <enumeratedValue>
73211                                <name>siob_proc1_access_contested</name>
73212                                <value>2</value>
73213                            </enumeratedValue>
73214                            <enumeratedValue>
73215                                <name>siob_proc1_access</name>
73216                                <value>3</value>
73217                            </enumeratedValue>
73218                            <enumeratedValue>
73219                                <name>siob_proc0_stall_upstream</name>
73220                                <value>4</value>
73221                            </enumeratedValue>
73222                            <enumeratedValue>
73223                                <name>siob_proc0_stall_downstream</name>
73224                                <value>5</value>
73225                            </enumeratedValue>
73226                            <enumeratedValue>
73227                                <name>siob_proc0_access_contested</name>
73228                                <value>6</value>
73229                            </enumeratedValue>
73230                            <enumeratedValue>
73231                                <name>siob_proc0_access</name>
73232                                <value>7</value>
73233                            </enumeratedValue>
73234                            <enumeratedValue>
73235                                <name>apb_stall_upstream</name>
73236                                <value>8</value>
73237                            </enumeratedValue>
73238                            <enumeratedValue>
73239                                <name>apb_stall_downstream</name>
73240                                <value>9</value>
73241                            </enumeratedValue>
73242                            <enumeratedValue>
73243                                <name>apb_access_contested</name>
73244                                <value>10</value>
73245                            </enumeratedValue>
73246                            <enumeratedValue>
73247                                <name>apb_access</name>
73248                                <value>11</value>
73249                            </enumeratedValue>
73250                            <enumeratedValue>
73251                                <name>fastperi_stall_upstream</name>
73252                                <value>12</value>
73253                            </enumeratedValue>
73254                            <enumeratedValue>
73255                                <name>fastperi_stall_downstream</name>
73256                                <value>13</value>
73257                            </enumeratedValue>
73258                            <enumeratedValue>
73259                                <name>fastperi_access_contested</name>
73260                                <value>14</value>
73261                            </enumeratedValue>
73262                            <enumeratedValue>
73263                                <name>fastperi_access</name>
73264                                <value>15</value>
73265                            </enumeratedValue>
73266                            <enumeratedValue>
73267                                <name>sram9_stall_upstream</name>
73268                                <value>16</value>
73269                            </enumeratedValue>
73270                            <enumeratedValue>
73271                                <name>sram9_stall_downstream</name>
73272                                <value>17</value>
73273                            </enumeratedValue>
73274                            <enumeratedValue>
73275                                <name>sram9_access_contested</name>
73276                                <value>18</value>
73277                            </enumeratedValue>
73278                            <enumeratedValue>
73279                                <name>sram9_access</name>
73280                                <value>19</value>
73281                            </enumeratedValue>
73282                            <enumeratedValue>
73283                                <name>sram8_stall_upstream</name>
73284                                <value>20</value>
73285                            </enumeratedValue>
73286                            <enumeratedValue>
73287                                <name>sram8_stall_downstream</name>
73288                                <value>21</value>
73289                            </enumeratedValue>
73290                            <enumeratedValue>
73291                                <name>sram8_access_contested</name>
73292                                <value>22</value>
73293                            </enumeratedValue>
73294                            <enumeratedValue>
73295                                <name>sram8_access</name>
73296                                <value>23</value>
73297                            </enumeratedValue>
73298                            <enumeratedValue>
73299                                <name>sram7_stall_upstream</name>
73300                                <value>24</value>
73301                            </enumeratedValue>
73302                            <enumeratedValue>
73303                                <name>sram7_stall_downstream</name>
73304                                <value>25</value>
73305                            </enumeratedValue>
73306                            <enumeratedValue>
73307                                <name>sram7_access_contested</name>
73308                                <value>26</value>
73309                            </enumeratedValue>
73310                            <enumeratedValue>
73311                                <name>sram7_access</name>
73312                                <value>27</value>
73313                            </enumeratedValue>
73314                            <enumeratedValue>
73315                                <name>sram6_stall_upstream</name>
73316                                <value>28</value>
73317                            </enumeratedValue>
73318                            <enumeratedValue>
73319                                <name>sram6_stall_downstream</name>
73320                                <value>29</value>
73321                            </enumeratedValue>
73322                            <enumeratedValue>
73323                                <name>sram6_access_contested</name>
73324                                <value>30</value>
73325                            </enumeratedValue>
73326                            <enumeratedValue>
73327                                <name>sram6_access</name>
73328                                <value>31</value>
73329                            </enumeratedValue>
73330                            <enumeratedValue>
73331                                <name>sram5_stall_upstream</name>
73332                                <value>32</value>
73333                            </enumeratedValue>
73334                            <enumeratedValue>
73335                                <name>sram5_stall_downstream</name>
73336                                <value>33</value>
73337                            </enumeratedValue>
73338                            <enumeratedValue>
73339                                <name>sram5_access_contested</name>
73340                                <value>34</value>
73341                            </enumeratedValue>
73342                            <enumeratedValue>
73343                                <name>sram5_access</name>
73344                                <value>35</value>
73345                            </enumeratedValue>
73346                            <enumeratedValue>
73347                                <name>sram4_stall_upstream</name>
73348                                <value>36</value>
73349                            </enumeratedValue>
73350                            <enumeratedValue>
73351                                <name>sram4_stall_downstream</name>
73352                                <value>37</value>
73353                            </enumeratedValue>
73354                            <enumeratedValue>
73355                                <name>sram4_access_contested</name>
73356                                <value>38</value>
73357                            </enumeratedValue>
73358                            <enumeratedValue>
73359                                <name>sram4_access</name>
73360                                <value>39</value>
73361                            </enumeratedValue>
73362                            <enumeratedValue>
73363                                <name>sram3_stall_upstream</name>
73364                                <value>40</value>
73365                            </enumeratedValue>
73366                            <enumeratedValue>
73367                                <name>sram3_stall_downstream</name>
73368                                <value>41</value>
73369                            </enumeratedValue>
73370                            <enumeratedValue>
73371                                <name>sram3_access_contested</name>
73372                                <value>42</value>
73373                            </enumeratedValue>
73374                            <enumeratedValue>
73375                                <name>sram3_access</name>
73376                                <value>43</value>
73377                            </enumeratedValue>
73378                            <enumeratedValue>
73379                                <name>sram2_stall_upstream</name>
73380                                <value>44</value>
73381                            </enumeratedValue>
73382                            <enumeratedValue>
73383                                <name>sram2_stall_downstream</name>
73384                                <value>45</value>
73385                            </enumeratedValue>
73386                            <enumeratedValue>
73387                                <name>sram2_access_contested</name>
73388                                <value>46</value>
73389                            </enumeratedValue>
73390                            <enumeratedValue>
73391                                <name>sram2_access</name>
73392                                <value>47</value>
73393                            </enumeratedValue>
73394                            <enumeratedValue>
73395                                <name>sram1_stall_upstream</name>
73396                                <value>48</value>
73397                            </enumeratedValue>
73398                            <enumeratedValue>
73399                                <name>sram1_stall_downstream</name>
73400                                <value>49</value>
73401                            </enumeratedValue>
73402                            <enumeratedValue>
73403                                <name>sram1_access_contested</name>
73404                                <value>50</value>
73405                            </enumeratedValue>
73406                            <enumeratedValue>
73407                                <name>sram1_access</name>
73408                                <value>51</value>
73409                            </enumeratedValue>
73410                            <enumeratedValue>
73411                                <name>sram0_stall_upstream</name>
73412                                <value>52</value>
73413                            </enumeratedValue>
73414                            <enumeratedValue>
73415                                <name>sram0_stall_downstream</name>
73416                                <value>53</value>
73417                            </enumeratedValue>
73418                            <enumeratedValue>
73419                                <name>sram0_access_contested</name>
73420                                <value>54</value>
73421                            </enumeratedValue>
73422                            <enumeratedValue>
73423                                <name>sram0_access</name>
73424                                <value>55</value>
73425                            </enumeratedValue>
73426                            <enumeratedValue>
73427                                <name>xip_main1_stall_upstream</name>
73428                                <value>56</value>
73429                            </enumeratedValue>
73430                            <enumeratedValue>
73431                                <name>xip_main1_stall_downstream</name>
73432                                <value>57</value>
73433                            </enumeratedValue>
73434                            <enumeratedValue>
73435                                <name>xip_main1_access_contested</name>
73436                                <value>58</value>
73437                            </enumeratedValue>
73438                            <enumeratedValue>
73439                                <name>xip_main1_access</name>
73440                                <value>59</value>
73441                            </enumeratedValue>
73442                            <enumeratedValue>
73443                                <name>xip_main0_stall_upstream</name>
73444                                <value>60</value>
73445                            </enumeratedValue>
73446                            <enumeratedValue>
73447                                <name>xip_main0_stall_downstream</name>
73448                                <value>61</value>
73449                            </enumeratedValue>
73450                            <enumeratedValue>
73451                                <name>xip_main0_access_contested</name>
73452                                <value>62</value>
73453                            </enumeratedValue>
73454                            <enumeratedValue>
73455                                <name>xip_main0_access</name>
73456                                <value>63</value>
73457                            </enumeratedValue>
73458                            <enumeratedValue>
73459                                <name>rom_stall_upstream</name>
73460                                <value>64</value>
73461                            </enumeratedValue>
73462                            <enumeratedValue>
73463                                <name>rom_stall_downstream</name>
73464                                <value>65</value>
73465                            </enumeratedValue>
73466                            <enumeratedValue>
73467                                <name>rom_access_contested</name>
73468                                <value>66</value>
73469                            </enumeratedValue>
73470                            <enumeratedValue>
73471                                <name>rom_access</name>
73472                                <value>67</value>
73473                            </enumeratedValue>
73474                        </enumeratedValues>
73475                    </field>
73476                </fields>
73477            </register>
73478            <register>
73479                <name>PERFCTR2</name>
73480                <addressOffset>0x0000001c</addressOffset>
73481                <description>Bus fabric performance counter 2</description>
73482                <resetValue>0x00000000</resetValue>
73483                <fields>
73484                    <field>
73485                        <name>PERFCTR2</name>
73486                        <description>Busfabric saturating performance counter 2
73487                            Count some event signal from the busfabric arbiters, if PERFCTR_EN is set.
73488                            Write any value to clear. Select an event to count using PERFSEL2</description>
73489                        <bitRange>[23:0]</bitRange>
73490                        <access>read-write</access>
73491                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
73492                    </field>
73493                </fields>
73494            </register>
73495            <register>
73496                <name>PERFSEL2</name>
73497                <addressOffset>0x00000020</addressOffset>
73498                <description>Bus fabric performance event select for PERFCTR2</description>
73499                <resetValue>0x0000001f</resetValue>
73500                <fields>
73501                    <field>
73502                        <name>PERFSEL2</name>
73503                        <description>Select an event for PERFCTR2. For each downstream port of the main crossbar, four events are available: ACCESS, an access took place; ACCESS_CONTESTED, an access took place that previously stalled due to contention from other masters; STALL_DOWNSTREAM, count cycles where any master stalled due to a stall on the downstream bus; STALL_UPSTREAM, count cycles where any master stalled for any reason, including contention from other masters.</description>
73504                        <bitRange>[6:0]</bitRange>
73505                        <access>read-write</access>
73506                        <enumeratedValues>
73507                            <enumeratedValue>
73508                                <name>siob_proc1_stall_upstream</name>
73509                                <value>0</value>
73510                            </enumeratedValue>
73511                            <enumeratedValue>
73512                                <name>siob_proc1_stall_downstream</name>
73513                                <value>1</value>
73514                            </enumeratedValue>
73515                            <enumeratedValue>
73516                                <name>siob_proc1_access_contested</name>
73517                                <value>2</value>
73518                            </enumeratedValue>
73519                            <enumeratedValue>
73520                                <name>siob_proc1_access</name>
73521                                <value>3</value>
73522                            </enumeratedValue>
73523                            <enumeratedValue>
73524                                <name>siob_proc0_stall_upstream</name>
73525                                <value>4</value>
73526                            </enumeratedValue>
73527                            <enumeratedValue>
73528                                <name>siob_proc0_stall_downstream</name>
73529                                <value>5</value>
73530                            </enumeratedValue>
73531                            <enumeratedValue>
73532                                <name>siob_proc0_access_contested</name>
73533                                <value>6</value>
73534                            </enumeratedValue>
73535                            <enumeratedValue>
73536                                <name>siob_proc0_access</name>
73537                                <value>7</value>
73538                            </enumeratedValue>
73539                            <enumeratedValue>
73540                                <name>apb_stall_upstream</name>
73541                                <value>8</value>
73542                            </enumeratedValue>
73543                            <enumeratedValue>
73544                                <name>apb_stall_downstream</name>
73545                                <value>9</value>
73546                            </enumeratedValue>
73547                            <enumeratedValue>
73548                                <name>apb_access_contested</name>
73549                                <value>10</value>
73550                            </enumeratedValue>
73551                            <enumeratedValue>
73552                                <name>apb_access</name>
73553                                <value>11</value>
73554                            </enumeratedValue>
73555                            <enumeratedValue>
73556                                <name>fastperi_stall_upstream</name>
73557                                <value>12</value>
73558                            </enumeratedValue>
73559                            <enumeratedValue>
73560                                <name>fastperi_stall_downstream</name>
73561                                <value>13</value>
73562                            </enumeratedValue>
73563                            <enumeratedValue>
73564                                <name>fastperi_access_contested</name>
73565                                <value>14</value>
73566                            </enumeratedValue>
73567                            <enumeratedValue>
73568                                <name>fastperi_access</name>
73569                                <value>15</value>
73570                            </enumeratedValue>
73571                            <enumeratedValue>
73572                                <name>sram9_stall_upstream</name>
73573                                <value>16</value>
73574                            </enumeratedValue>
73575                            <enumeratedValue>
73576                                <name>sram9_stall_downstream</name>
73577                                <value>17</value>
73578                            </enumeratedValue>
73579                            <enumeratedValue>
73580                                <name>sram9_access_contested</name>
73581                                <value>18</value>
73582                            </enumeratedValue>
73583                            <enumeratedValue>
73584                                <name>sram9_access</name>
73585                                <value>19</value>
73586                            </enumeratedValue>
73587                            <enumeratedValue>
73588                                <name>sram8_stall_upstream</name>
73589                                <value>20</value>
73590                            </enumeratedValue>
73591                            <enumeratedValue>
73592                                <name>sram8_stall_downstream</name>
73593                                <value>21</value>
73594                            </enumeratedValue>
73595                            <enumeratedValue>
73596                                <name>sram8_access_contested</name>
73597                                <value>22</value>
73598                            </enumeratedValue>
73599                            <enumeratedValue>
73600                                <name>sram8_access</name>
73601                                <value>23</value>
73602                            </enumeratedValue>
73603                            <enumeratedValue>
73604                                <name>sram7_stall_upstream</name>
73605                                <value>24</value>
73606                            </enumeratedValue>
73607                            <enumeratedValue>
73608                                <name>sram7_stall_downstream</name>
73609                                <value>25</value>
73610                            </enumeratedValue>
73611                            <enumeratedValue>
73612                                <name>sram7_access_contested</name>
73613                                <value>26</value>
73614                            </enumeratedValue>
73615                            <enumeratedValue>
73616                                <name>sram7_access</name>
73617                                <value>27</value>
73618                            </enumeratedValue>
73619                            <enumeratedValue>
73620                                <name>sram6_stall_upstream</name>
73621                                <value>28</value>
73622                            </enumeratedValue>
73623                            <enumeratedValue>
73624                                <name>sram6_stall_downstream</name>
73625                                <value>29</value>
73626                            </enumeratedValue>
73627                            <enumeratedValue>
73628                                <name>sram6_access_contested</name>
73629                                <value>30</value>
73630                            </enumeratedValue>
73631                            <enumeratedValue>
73632                                <name>sram6_access</name>
73633                                <value>31</value>
73634                            </enumeratedValue>
73635                            <enumeratedValue>
73636                                <name>sram5_stall_upstream</name>
73637                                <value>32</value>
73638                            </enumeratedValue>
73639                            <enumeratedValue>
73640                                <name>sram5_stall_downstream</name>
73641                                <value>33</value>
73642                            </enumeratedValue>
73643                            <enumeratedValue>
73644                                <name>sram5_access_contested</name>
73645                                <value>34</value>
73646                            </enumeratedValue>
73647                            <enumeratedValue>
73648                                <name>sram5_access</name>
73649                                <value>35</value>
73650                            </enumeratedValue>
73651                            <enumeratedValue>
73652                                <name>sram4_stall_upstream</name>
73653                                <value>36</value>
73654                            </enumeratedValue>
73655                            <enumeratedValue>
73656                                <name>sram4_stall_downstream</name>
73657                                <value>37</value>
73658                            </enumeratedValue>
73659                            <enumeratedValue>
73660                                <name>sram4_access_contested</name>
73661                                <value>38</value>
73662                            </enumeratedValue>
73663                            <enumeratedValue>
73664                                <name>sram4_access</name>
73665                                <value>39</value>
73666                            </enumeratedValue>
73667                            <enumeratedValue>
73668                                <name>sram3_stall_upstream</name>
73669                                <value>40</value>
73670                            </enumeratedValue>
73671                            <enumeratedValue>
73672                                <name>sram3_stall_downstream</name>
73673                                <value>41</value>
73674                            </enumeratedValue>
73675                            <enumeratedValue>
73676                                <name>sram3_access_contested</name>
73677                                <value>42</value>
73678                            </enumeratedValue>
73679                            <enumeratedValue>
73680                                <name>sram3_access</name>
73681                                <value>43</value>
73682                            </enumeratedValue>
73683                            <enumeratedValue>
73684                                <name>sram2_stall_upstream</name>
73685                                <value>44</value>
73686                            </enumeratedValue>
73687                            <enumeratedValue>
73688                                <name>sram2_stall_downstream</name>
73689                                <value>45</value>
73690                            </enumeratedValue>
73691                            <enumeratedValue>
73692                                <name>sram2_access_contested</name>
73693                                <value>46</value>
73694                            </enumeratedValue>
73695                            <enumeratedValue>
73696                                <name>sram2_access</name>
73697                                <value>47</value>
73698                            </enumeratedValue>
73699                            <enumeratedValue>
73700                                <name>sram1_stall_upstream</name>
73701                                <value>48</value>
73702                            </enumeratedValue>
73703                            <enumeratedValue>
73704                                <name>sram1_stall_downstream</name>
73705                                <value>49</value>
73706                            </enumeratedValue>
73707                            <enumeratedValue>
73708                                <name>sram1_access_contested</name>
73709                                <value>50</value>
73710                            </enumeratedValue>
73711                            <enumeratedValue>
73712                                <name>sram1_access</name>
73713                                <value>51</value>
73714                            </enumeratedValue>
73715                            <enumeratedValue>
73716                                <name>sram0_stall_upstream</name>
73717                                <value>52</value>
73718                            </enumeratedValue>
73719                            <enumeratedValue>
73720                                <name>sram0_stall_downstream</name>
73721                                <value>53</value>
73722                            </enumeratedValue>
73723                            <enumeratedValue>
73724                                <name>sram0_access_contested</name>
73725                                <value>54</value>
73726                            </enumeratedValue>
73727                            <enumeratedValue>
73728                                <name>sram0_access</name>
73729                                <value>55</value>
73730                            </enumeratedValue>
73731                            <enumeratedValue>
73732                                <name>xip_main1_stall_upstream</name>
73733                                <value>56</value>
73734                            </enumeratedValue>
73735                            <enumeratedValue>
73736                                <name>xip_main1_stall_downstream</name>
73737                                <value>57</value>
73738                            </enumeratedValue>
73739                            <enumeratedValue>
73740                                <name>xip_main1_access_contested</name>
73741                                <value>58</value>
73742                            </enumeratedValue>
73743                            <enumeratedValue>
73744                                <name>xip_main1_access</name>
73745                                <value>59</value>
73746                            </enumeratedValue>
73747                            <enumeratedValue>
73748                                <name>xip_main0_stall_upstream</name>
73749                                <value>60</value>
73750                            </enumeratedValue>
73751                            <enumeratedValue>
73752                                <name>xip_main0_stall_downstream</name>
73753                                <value>61</value>
73754                            </enumeratedValue>
73755                            <enumeratedValue>
73756                                <name>xip_main0_access_contested</name>
73757                                <value>62</value>
73758                            </enumeratedValue>
73759                            <enumeratedValue>
73760                                <name>xip_main0_access</name>
73761                                <value>63</value>
73762                            </enumeratedValue>
73763                            <enumeratedValue>
73764                                <name>rom_stall_upstream</name>
73765                                <value>64</value>
73766                            </enumeratedValue>
73767                            <enumeratedValue>
73768                                <name>rom_stall_downstream</name>
73769                                <value>65</value>
73770                            </enumeratedValue>
73771                            <enumeratedValue>
73772                                <name>rom_access_contested</name>
73773                                <value>66</value>
73774                            </enumeratedValue>
73775                            <enumeratedValue>
73776                                <name>rom_access</name>
73777                                <value>67</value>
73778                            </enumeratedValue>
73779                        </enumeratedValues>
73780                    </field>
73781                </fields>
73782            </register>
73783            <register>
73784                <name>PERFCTR3</name>
73785                <addressOffset>0x00000024</addressOffset>
73786                <description>Bus fabric performance counter 3</description>
73787                <resetValue>0x00000000</resetValue>
73788                <fields>
73789                    <field>
73790                        <name>PERFCTR3</name>
73791                        <description>Busfabric saturating performance counter 3
73792                            Count some event signal from the busfabric arbiters, if PERFCTR_EN is set.
73793                            Write any value to clear. Select an event to count using PERFSEL3</description>
73794                        <bitRange>[23:0]</bitRange>
73795                        <access>read-write</access>
73796                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
73797                    </field>
73798                </fields>
73799            </register>
73800            <register>
73801                <name>PERFSEL3</name>
73802                <addressOffset>0x00000028</addressOffset>
73803                <description>Bus fabric performance event select for PERFCTR3</description>
73804                <resetValue>0x0000001f</resetValue>
73805                <fields>
73806                    <field>
73807                        <name>PERFSEL3</name>
73808                        <description>Select an event for PERFCTR3. For each downstream port of the main crossbar, four events are available: ACCESS, an access took place; ACCESS_CONTESTED, an access took place that previously stalled due to contention from other masters; STALL_DOWNSTREAM, count cycles where any master stalled due to a stall on the downstream bus; STALL_UPSTREAM, count cycles where any master stalled for any reason, including contention from other masters.</description>
73809                        <bitRange>[6:0]</bitRange>
73810                        <access>read-write</access>
73811                        <enumeratedValues>
73812                            <enumeratedValue>
73813                                <name>siob_proc1_stall_upstream</name>
73814                                <value>0</value>
73815                            </enumeratedValue>
73816                            <enumeratedValue>
73817                                <name>siob_proc1_stall_downstream</name>
73818                                <value>1</value>
73819                            </enumeratedValue>
73820                            <enumeratedValue>
73821                                <name>siob_proc1_access_contested</name>
73822                                <value>2</value>
73823                            </enumeratedValue>
73824                            <enumeratedValue>
73825                                <name>siob_proc1_access</name>
73826                                <value>3</value>
73827                            </enumeratedValue>
73828                            <enumeratedValue>
73829                                <name>siob_proc0_stall_upstream</name>
73830                                <value>4</value>
73831                            </enumeratedValue>
73832                            <enumeratedValue>
73833                                <name>siob_proc0_stall_downstream</name>
73834                                <value>5</value>
73835                            </enumeratedValue>
73836                            <enumeratedValue>
73837                                <name>siob_proc0_access_contested</name>
73838                                <value>6</value>
73839                            </enumeratedValue>
73840                            <enumeratedValue>
73841                                <name>siob_proc0_access</name>
73842                                <value>7</value>
73843                            </enumeratedValue>
73844                            <enumeratedValue>
73845                                <name>apb_stall_upstream</name>
73846                                <value>8</value>
73847                            </enumeratedValue>
73848                            <enumeratedValue>
73849                                <name>apb_stall_downstream</name>
73850                                <value>9</value>
73851                            </enumeratedValue>
73852                            <enumeratedValue>
73853                                <name>apb_access_contested</name>
73854                                <value>10</value>
73855                            </enumeratedValue>
73856                            <enumeratedValue>
73857                                <name>apb_access</name>
73858                                <value>11</value>
73859                            </enumeratedValue>
73860                            <enumeratedValue>
73861                                <name>fastperi_stall_upstream</name>
73862                                <value>12</value>
73863                            </enumeratedValue>
73864                            <enumeratedValue>
73865                                <name>fastperi_stall_downstream</name>
73866                                <value>13</value>
73867                            </enumeratedValue>
73868                            <enumeratedValue>
73869                                <name>fastperi_access_contested</name>
73870                                <value>14</value>
73871                            </enumeratedValue>
73872                            <enumeratedValue>
73873                                <name>fastperi_access</name>
73874                                <value>15</value>
73875                            </enumeratedValue>
73876                            <enumeratedValue>
73877                                <name>sram9_stall_upstream</name>
73878                                <value>16</value>
73879                            </enumeratedValue>
73880                            <enumeratedValue>
73881                                <name>sram9_stall_downstream</name>
73882                                <value>17</value>
73883                            </enumeratedValue>
73884                            <enumeratedValue>
73885                                <name>sram9_access_contested</name>
73886                                <value>18</value>
73887                            </enumeratedValue>
73888                            <enumeratedValue>
73889                                <name>sram9_access</name>
73890                                <value>19</value>
73891                            </enumeratedValue>
73892                            <enumeratedValue>
73893                                <name>sram8_stall_upstream</name>
73894                                <value>20</value>
73895                            </enumeratedValue>
73896                            <enumeratedValue>
73897                                <name>sram8_stall_downstream</name>
73898                                <value>21</value>
73899                            </enumeratedValue>
73900                            <enumeratedValue>
73901                                <name>sram8_access_contested</name>
73902                                <value>22</value>
73903                            </enumeratedValue>
73904                            <enumeratedValue>
73905                                <name>sram8_access</name>
73906                                <value>23</value>
73907                            </enumeratedValue>
73908                            <enumeratedValue>
73909                                <name>sram7_stall_upstream</name>
73910                                <value>24</value>
73911                            </enumeratedValue>
73912                            <enumeratedValue>
73913                                <name>sram7_stall_downstream</name>
73914                                <value>25</value>
73915                            </enumeratedValue>
73916                            <enumeratedValue>
73917                                <name>sram7_access_contested</name>
73918                                <value>26</value>
73919                            </enumeratedValue>
73920                            <enumeratedValue>
73921                                <name>sram7_access</name>
73922                                <value>27</value>
73923                            </enumeratedValue>
73924                            <enumeratedValue>
73925                                <name>sram6_stall_upstream</name>
73926                                <value>28</value>
73927                            </enumeratedValue>
73928                            <enumeratedValue>
73929                                <name>sram6_stall_downstream</name>
73930                                <value>29</value>
73931                            </enumeratedValue>
73932                            <enumeratedValue>
73933                                <name>sram6_access_contested</name>
73934                                <value>30</value>
73935                            </enumeratedValue>
73936                            <enumeratedValue>
73937                                <name>sram6_access</name>
73938                                <value>31</value>
73939                            </enumeratedValue>
73940                            <enumeratedValue>
73941                                <name>sram5_stall_upstream</name>
73942                                <value>32</value>
73943                            </enumeratedValue>
73944                            <enumeratedValue>
73945                                <name>sram5_stall_downstream</name>
73946                                <value>33</value>
73947                            </enumeratedValue>
73948                            <enumeratedValue>
73949                                <name>sram5_access_contested</name>
73950                                <value>34</value>
73951                            </enumeratedValue>
73952                            <enumeratedValue>
73953                                <name>sram5_access</name>
73954                                <value>35</value>
73955                            </enumeratedValue>
73956                            <enumeratedValue>
73957                                <name>sram4_stall_upstream</name>
73958                                <value>36</value>
73959                            </enumeratedValue>
73960                            <enumeratedValue>
73961                                <name>sram4_stall_downstream</name>
73962                                <value>37</value>
73963                            </enumeratedValue>
73964                            <enumeratedValue>
73965                                <name>sram4_access_contested</name>
73966                                <value>38</value>
73967                            </enumeratedValue>
73968                            <enumeratedValue>
73969                                <name>sram4_access</name>
73970                                <value>39</value>
73971                            </enumeratedValue>
73972                            <enumeratedValue>
73973                                <name>sram3_stall_upstream</name>
73974                                <value>40</value>
73975                            </enumeratedValue>
73976                            <enumeratedValue>
73977                                <name>sram3_stall_downstream</name>
73978                                <value>41</value>
73979                            </enumeratedValue>
73980                            <enumeratedValue>
73981                                <name>sram3_access_contested</name>
73982                                <value>42</value>
73983                            </enumeratedValue>
73984                            <enumeratedValue>
73985                                <name>sram3_access</name>
73986                                <value>43</value>
73987                            </enumeratedValue>
73988                            <enumeratedValue>
73989                                <name>sram2_stall_upstream</name>
73990                                <value>44</value>
73991                            </enumeratedValue>
73992                            <enumeratedValue>
73993                                <name>sram2_stall_downstream</name>
73994                                <value>45</value>
73995                            </enumeratedValue>
73996                            <enumeratedValue>
73997                                <name>sram2_access_contested</name>
73998                                <value>46</value>
73999                            </enumeratedValue>
74000                            <enumeratedValue>
74001                                <name>sram2_access</name>
74002                                <value>47</value>
74003                            </enumeratedValue>
74004                            <enumeratedValue>
74005                                <name>sram1_stall_upstream</name>
74006                                <value>48</value>
74007                            </enumeratedValue>
74008                            <enumeratedValue>
74009                                <name>sram1_stall_downstream</name>
74010                                <value>49</value>
74011                            </enumeratedValue>
74012                            <enumeratedValue>
74013                                <name>sram1_access_contested</name>
74014                                <value>50</value>
74015                            </enumeratedValue>
74016                            <enumeratedValue>
74017                                <name>sram1_access</name>
74018                                <value>51</value>
74019                            </enumeratedValue>
74020                            <enumeratedValue>
74021                                <name>sram0_stall_upstream</name>
74022                                <value>52</value>
74023                            </enumeratedValue>
74024                            <enumeratedValue>
74025                                <name>sram0_stall_downstream</name>
74026                                <value>53</value>
74027                            </enumeratedValue>
74028                            <enumeratedValue>
74029                                <name>sram0_access_contested</name>
74030                                <value>54</value>
74031                            </enumeratedValue>
74032                            <enumeratedValue>
74033                                <name>sram0_access</name>
74034                                <value>55</value>
74035                            </enumeratedValue>
74036                            <enumeratedValue>
74037                                <name>xip_main1_stall_upstream</name>
74038                                <value>56</value>
74039                            </enumeratedValue>
74040                            <enumeratedValue>
74041                                <name>xip_main1_stall_downstream</name>
74042                                <value>57</value>
74043                            </enumeratedValue>
74044                            <enumeratedValue>
74045                                <name>xip_main1_access_contested</name>
74046                                <value>58</value>
74047                            </enumeratedValue>
74048                            <enumeratedValue>
74049                                <name>xip_main1_access</name>
74050                                <value>59</value>
74051                            </enumeratedValue>
74052                            <enumeratedValue>
74053                                <name>xip_main0_stall_upstream</name>
74054                                <value>60</value>
74055                            </enumeratedValue>
74056                            <enumeratedValue>
74057                                <name>xip_main0_stall_downstream</name>
74058                                <value>61</value>
74059                            </enumeratedValue>
74060                            <enumeratedValue>
74061                                <name>xip_main0_access_contested</name>
74062                                <value>62</value>
74063                            </enumeratedValue>
74064                            <enumeratedValue>
74065                                <name>xip_main0_access</name>
74066                                <value>63</value>
74067                            </enumeratedValue>
74068                            <enumeratedValue>
74069                                <name>rom_stall_upstream</name>
74070                                <value>64</value>
74071                            </enumeratedValue>
74072                            <enumeratedValue>
74073                                <name>rom_stall_downstream</name>
74074                                <value>65</value>
74075                            </enumeratedValue>
74076                            <enumeratedValue>
74077                                <name>rom_access_contested</name>
74078                                <value>66</value>
74079                            </enumeratedValue>
74080                            <enumeratedValue>
74081                                <name>rom_access</name>
74082                                <value>67</value>
74083                            </enumeratedValue>
74084                        </enumeratedValues>
74085                    </field>
74086                </fields>
74087            </register>
74088        </registers>
74089    </peripheral>
74090    <peripheral>
74091        <name>SIO</name>
74092        <description>Single-cycle IO block
74093            Provides core-local and inter-core hardware for the two processors, with single-cycle access.</description>
74094        <baseAddress>0xd0000000</baseAddress>
74095        <addressBlock>
74096            <offset>0</offset>
74097            <size>488</size>
74098            <usage>registers</usage>
74099        </addressBlock>
74100        <interrupt>
74101            <name>SIO_IRQ_FIFO</name>
74102            <value>25</value>
74103        </interrupt>
74104        <interrupt>
74105            <name>SIO_IRQ_BELL</name>
74106            <value>26</value>
74107        </interrupt>
74108        <interrupt>
74109            <name>SIO_IRQ_FIFO_NS</name>
74110            <value>27</value>
74111        </interrupt>
74112        <interrupt>
74113            <name>SIO_IRQ_BELL_NS</name>
74114            <value>28</value>
74115        </interrupt>
74116        <interrupt>
74117            <name>SIO_IRQ_MTIMECMP</name>
74118            <value>29</value>
74119        </interrupt>
74120        <registers>
74121            <register>
74122                <name>CPUID</name>
74123                <addressOffset>0x00000000</addressOffset>
74124                <description>Processor core identifier</description>
74125                <resetMask>0x00000000</resetMask>
74126                <fields>
74127                    <field>
74128                        <name>CPUID</name>
74129                        <description>Value is 0 when read from processor core 0, and 1 when read from processor core 1.</description>
74130                        <bitRange>[31:0]</bitRange>
74131                        <access>read-only</access>
74132                    </field>
74133                </fields>
74134            </register>
74135            <register>
74136                <name>GPIO_IN</name>
74137                <addressOffset>0x00000004</addressOffset>
74138                <description>Input value for GPIO0...31.
74139
74140                    In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) appear as zero.</description>
74141                <resetValue>0x00000000</resetValue>
74142                <fields>
74143                    <field>
74144                        <name>GPIO_IN</name>
74145                        <bitRange>[31:0]</bitRange>
74146                        <access>read-only</access>
74147                    </field>
74148                </fields>
74149            </register>
74150            <register>
74151                <name>GPIO_HI_IN</name>
74152                <addressOffset>0x00000008</addressOffset>
74153                <description>Input value on GPIO32...47, QSPI IOs and USB pins
74154
74155                    In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) appear as zero.</description>
74156                <resetValue>0x00000000</resetValue>
74157                <fields>
74158                    <field>
74159                        <name>QSPI_SD</name>
74160                        <description>Input value on QSPI SD0 (MOSI), SD1 (MISO), SD2 and SD3 pins</description>
74161                        <bitRange>[31:28]</bitRange>
74162                        <access>read-only</access>
74163                    </field>
74164                    <field>
74165                        <name>QSPI_CSN</name>
74166                        <description>Input value on QSPI CSn pin</description>
74167                        <bitRange>[27:27]</bitRange>
74168                        <access>read-only</access>
74169                    </field>
74170                    <field>
74171                        <name>QSPI_SCK</name>
74172                        <description>Input value on QSPI SCK pin</description>
74173                        <bitRange>[26:26]</bitRange>
74174                        <access>read-only</access>
74175                    </field>
74176                    <field>
74177                        <name>USB_DM</name>
74178                        <description>Input value on USB D- pin</description>
74179                        <bitRange>[25:25]</bitRange>
74180                        <access>read-only</access>
74181                    </field>
74182                    <field>
74183                        <name>USB_DP</name>
74184                        <description>Input value on USB D+ pin</description>
74185                        <bitRange>[24:24]</bitRange>
74186                        <access>read-only</access>
74187                    </field>
74188                    <field>
74189                        <name>GPIO</name>
74190                        <description>Input value on GPIO32...47</description>
74191                        <bitRange>[15:0]</bitRange>
74192                        <access>read-only</access>
74193                    </field>
74194                </fields>
74195            </register>
74196            <register>
74197                <name>GPIO_OUT</name>
74198                <addressOffset>0x00000010</addressOffset>
74199                <description>GPIO0...31 output value</description>
74200                <resetValue>0x00000000</resetValue>
74201                <fields>
74202                    <field>
74203                        <name>GPIO_OUT</name>
74204                        <description>Set output level (1/0 -&gt; high/low) for GPIO0...31. Reading back gives the last value written, NOT the input value from the pins.
74205
74206                            If core 0 and core 1 both write to GPIO_OUT simultaneously (or to a SET/CLR/XOR alias), the result is as though the write from core 0 took place first, and the write from core 1 was then applied to that intermediate result.
74207
74208                            In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) ignore writes, and their output status reads back as zero. This is also true for SET/CLR/XOR aliases of this register.</description>
74209                        <bitRange>[31:0]</bitRange>
74210                        <access>read-write</access>
74211                    </field>
74212                </fields>
74213            </register>
74214            <register>
74215                <name>GPIO_HI_OUT</name>
74216                <addressOffset>0x00000014</addressOffset>
74217                <description>Output value for GPIO32...47, QSPI IOs and USB pins.
74218
74219                    Write to set output level (1/0 -&gt; high/low). Reading back gives the last value written, NOT the input value from the pins. If core 0 and core 1 both write to GPIO_HI_OUT simultaneously (or to a SET/CLR/XOR alias), the result is as though the write from core 0 took place first, and the write from core 1 was then applied to that intermediate result.
74220
74221                    In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) ignore writes, and their output status reads back as zero. This is also true for SET/CLR/XOR aliases of this register.</description>
74222                <resetValue>0x00000000</resetValue>
74223                <fields>
74224                    <field>
74225                        <name>QSPI_SD</name>
74226                        <description>Output value for QSPI SD0 (MOSI), SD1 (MISO), SD2 and SD3 pins</description>
74227                        <bitRange>[31:28]</bitRange>
74228                        <access>read-write</access>
74229                    </field>
74230                    <field>
74231                        <name>QSPI_CSN</name>
74232                        <description>Output value for QSPI CSn pin</description>
74233                        <bitRange>[27:27]</bitRange>
74234                        <access>read-write</access>
74235                    </field>
74236                    <field>
74237                        <name>QSPI_SCK</name>
74238                        <description>Output value for QSPI SCK pin</description>
74239                        <bitRange>[26:26]</bitRange>
74240                        <access>read-write</access>
74241                    </field>
74242                    <field>
74243                        <name>USB_DM</name>
74244                        <description>Output value for USB D- pin</description>
74245                        <bitRange>[25:25]</bitRange>
74246                        <access>read-write</access>
74247                    </field>
74248                    <field>
74249                        <name>USB_DP</name>
74250                        <description>Output value for USB D+ pin</description>
74251                        <bitRange>[24:24]</bitRange>
74252                        <access>read-write</access>
74253                    </field>
74254                    <field>
74255                        <name>GPIO</name>
74256                        <description>Output value for GPIO32...47</description>
74257                        <bitRange>[15:0]</bitRange>
74258                        <access>read-write</access>
74259                    </field>
74260                </fields>
74261            </register>
74262            <register>
74263                <name>GPIO_OUT_SET</name>
74264                <addressOffset>0x00000018</addressOffset>
74265                <description>GPIO0...31 output value set</description>
74266                <resetValue>0x00000000</resetValue>
74267                <fields>
74268                    <field>
74269                        <name>GPIO_OUT_SET</name>
74270                        <description>Perform an atomic bit-set on GPIO_OUT, i.e. `GPIO_OUT |= wdata`</description>
74271                        <bitRange>[31:0]</bitRange>
74272                        <access>write-only</access>
74273                    </field>
74274                </fields>
74275            </register>
74276            <register>
74277                <name>GPIO_HI_OUT_SET</name>
74278                <addressOffset>0x0000001c</addressOffset>
74279                <description>Output value set for GPIO32..47, QSPI IOs and USB pins.
74280                    Perform an atomic bit-set on GPIO_HI_OUT, i.e. `GPIO_HI_OUT |= wdata`</description>
74281                <resetValue>0x00000000</resetValue>
74282                <fields>
74283                    <field>
74284                        <name>QSPI_SD</name>
74285                        <bitRange>[31:28]</bitRange>
74286                        <access>write-only</access>
74287                    </field>
74288                    <field>
74289                        <name>QSPI_CSN</name>
74290                        <bitRange>[27:27]</bitRange>
74291                        <access>write-only</access>
74292                    </field>
74293                    <field>
74294                        <name>QSPI_SCK</name>
74295                        <bitRange>[26:26]</bitRange>
74296                        <access>write-only</access>
74297                    </field>
74298                    <field>
74299                        <name>USB_DM</name>
74300                        <bitRange>[25:25]</bitRange>
74301                        <access>write-only</access>
74302                    </field>
74303                    <field>
74304                        <name>USB_DP</name>
74305                        <bitRange>[24:24]</bitRange>
74306                        <access>write-only</access>
74307                    </field>
74308                    <field>
74309                        <name>GPIO</name>
74310                        <bitRange>[15:0]</bitRange>
74311                        <access>write-only</access>
74312                    </field>
74313                </fields>
74314            </register>
74315            <register>
74316                <name>GPIO_OUT_CLR</name>
74317                <addressOffset>0x00000020</addressOffset>
74318                <description>GPIO0...31 output value clear</description>
74319                <resetValue>0x00000000</resetValue>
74320                <fields>
74321                    <field>
74322                        <name>GPIO_OUT_CLR</name>
74323                        <description>Perform an atomic bit-clear on GPIO_OUT, i.e. `GPIO_OUT &amp;= ~wdata`</description>
74324                        <bitRange>[31:0]</bitRange>
74325                        <access>write-only</access>
74326                    </field>
74327                </fields>
74328            </register>
74329            <register>
74330                <name>GPIO_HI_OUT_CLR</name>
74331                <addressOffset>0x00000024</addressOffset>
74332                <description>Output value clear for GPIO32..47, QSPI IOs and USB pins.
74333                    Perform an atomic bit-clear on GPIO_HI_OUT, i.e. `GPIO_HI_OUT &amp;= ~wdata`</description>
74334                <resetValue>0x00000000</resetValue>
74335                <fields>
74336                    <field>
74337                        <name>QSPI_SD</name>
74338                        <bitRange>[31:28]</bitRange>
74339                        <access>write-only</access>
74340                    </field>
74341                    <field>
74342                        <name>QSPI_CSN</name>
74343                        <bitRange>[27:27]</bitRange>
74344                        <access>write-only</access>
74345                    </field>
74346                    <field>
74347                        <name>QSPI_SCK</name>
74348                        <bitRange>[26:26]</bitRange>
74349                        <access>write-only</access>
74350                    </field>
74351                    <field>
74352                        <name>USB_DM</name>
74353                        <bitRange>[25:25]</bitRange>
74354                        <access>write-only</access>
74355                    </field>
74356                    <field>
74357                        <name>USB_DP</name>
74358                        <bitRange>[24:24]</bitRange>
74359                        <access>write-only</access>
74360                    </field>
74361                    <field>
74362                        <name>GPIO</name>
74363                        <bitRange>[15:0]</bitRange>
74364                        <access>write-only</access>
74365                    </field>
74366                </fields>
74367            </register>
74368            <register>
74369                <name>GPIO_OUT_XOR</name>
74370                <addressOffset>0x00000028</addressOffset>
74371                <description>GPIO0...31 output value XOR</description>
74372                <resetValue>0x00000000</resetValue>
74373                <fields>
74374                    <field>
74375                        <name>GPIO_OUT_XOR</name>
74376                        <description>Perform an atomic bitwise XOR on GPIO_OUT, i.e. `GPIO_OUT ^= wdata`</description>
74377                        <bitRange>[31:0]</bitRange>
74378                        <access>write-only</access>
74379                    </field>
74380                </fields>
74381            </register>
74382            <register>
74383                <name>GPIO_HI_OUT_XOR</name>
74384                <addressOffset>0x0000002c</addressOffset>
74385                <description>Output value XOR for GPIO32..47, QSPI IOs and USB pins.
74386                    Perform an atomic bitwise XOR on GPIO_HI_OUT, i.e. `GPIO_HI_OUT ^= wdata`</description>
74387                <resetValue>0x00000000</resetValue>
74388                <fields>
74389                    <field>
74390                        <name>QSPI_SD</name>
74391                        <bitRange>[31:28]</bitRange>
74392                        <access>write-only</access>
74393                    </field>
74394                    <field>
74395                        <name>QSPI_CSN</name>
74396                        <bitRange>[27:27]</bitRange>
74397                        <access>write-only</access>
74398                    </field>
74399                    <field>
74400                        <name>QSPI_SCK</name>
74401                        <bitRange>[26:26]</bitRange>
74402                        <access>write-only</access>
74403                    </field>
74404                    <field>
74405                        <name>USB_DM</name>
74406                        <bitRange>[25:25]</bitRange>
74407                        <access>write-only</access>
74408                    </field>
74409                    <field>
74410                        <name>USB_DP</name>
74411                        <bitRange>[24:24]</bitRange>
74412                        <access>write-only</access>
74413                    </field>
74414                    <field>
74415                        <name>GPIO</name>
74416                        <bitRange>[15:0]</bitRange>
74417                        <access>write-only</access>
74418                    </field>
74419                </fields>
74420            </register>
74421            <register>
74422                <name>GPIO_OE</name>
74423                <addressOffset>0x00000030</addressOffset>
74424                <description>GPIO0...31 output enable</description>
74425                <resetValue>0x00000000</resetValue>
74426                <fields>
74427                    <field>
74428                        <name>GPIO_OE</name>
74429                        <description>Set output enable (1/0 -&gt; output/input) for GPIO0...31. Reading back gives the last value written.
74430
74431                            If core 0 and core 1 both write to GPIO_OE simultaneously (or to a SET/CLR/XOR alias), the result is as though the write from core 0 took place first, and the write from core 1 was then applied to that intermediate result.
74432
74433                            In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) ignore writes, and their output status reads back as zero. This is also true for SET/CLR/XOR aliases of this register.</description>
74434                        <bitRange>[31:0]</bitRange>
74435                        <access>read-write</access>
74436                    </field>
74437                </fields>
74438            </register>
74439            <register>
74440                <name>GPIO_HI_OE</name>
74441                <addressOffset>0x00000034</addressOffset>
74442                <description>Output enable value for GPIO32...47, QSPI IOs and USB pins.
74443
74444                    Write output enable (1/0 -&gt; output/input). Reading back gives the last value written. If core 0 and core 1 both write to GPIO_HI_OE simultaneously (or to a SET/CLR/XOR alias), the result is as though the write from core 0 took place first, and the write from core 1 was then applied to that intermediate result.
74445
74446                    In the Non-secure SIO, Secure-only GPIOs (as per ACCESSCTRL) ignore writes, and their output status reads back as zero. This is also true for SET/CLR/XOR aliases of this register.</description>
74447                <resetValue>0x00000000</resetValue>
74448                <fields>
74449                    <field>
74450                        <name>QSPI_SD</name>
74451                        <description>Output enable value for QSPI SD0 (MOSI), SD1 (MISO), SD2 and SD3 pins</description>
74452                        <bitRange>[31:28]</bitRange>
74453                        <access>read-write</access>
74454                    </field>
74455                    <field>
74456                        <name>QSPI_CSN</name>
74457                        <description>Output enable value for QSPI CSn pin</description>
74458                        <bitRange>[27:27]</bitRange>
74459                        <access>read-write</access>
74460                    </field>
74461                    <field>
74462                        <name>QSPI_SCK</name>
74463                        <description>Output enable value for QSPI SCK pin</description>
74464                        <bitRange>[26:26]</bitRange>
74465                        <access>read-write</access>
74466                    </field>
74467                    <field>
74468                        <name>USB_DM</name>
74469                        <description>Output enable value for USB D- pin</description>
74470                        <bitRange>[25:25]</bitRange>
74471                        <access>read-write</access>
74472                    </field>
74473                    <field>
74474                        <name>USB_DP</name>
74475                        <description>Output enable value for USB D+ pin</description>
74476                        <bitRange>[24:24]</bitRange>
74477                        <access>read-write</access>
74478                    </field>
74479                    <field>
74480                        <name>GPIO</name>
74481                        <description>Output enable value for GPIO32...47</description>
74482                        <bitRange>[15:0]</bitRange>
74483                        <access>read-write</access>
74484                    </field>
74485                </fields>
74486            </register>
74487            <register>
74488                <name>GPIO_OE_SET</name>
74489                <addressOffset>0x00000038</addressOffset>
74490                <description>GPIO0...31 output enable set</description>
74491                <resetValue>0x00000000</resetValue>
74492                <fields>
74493                    <field>
74494                        <name>GPIO_OE_SET</name>
74495                        <description>Perform an atomic bit-set on GPIO_OE, i.e. `GPIO_OE |= wdata`</description>
74496                        <bitRange>[31:0]</bitRange>
74497                        <access>write-only</access>
74498                    </field>
74499                </fields>
74500            </register>
74501            <register>
74502                <name>GPIO_HI_OE_SET</name>
74503                <addressOffset>0x0000003c</addressOffset>
74504                <description>Output enable set for GPIO32...47, QSPI IOs and USB pins.
74505                    Perform an atomic bit-set on GPIO_HI_OE, i.e. `GPIO_HI_OE |= wdata`</description>
74506                <resetValue>0x00000000</resetValue>
74507                <fields>
74508                    <field>
74509                        <name>QSPI_SD</name>
74510                        <bitRange>[31:28]</bitRange>
74511                        <access>write-only</access>
74512                    </field>
74513                    <field>
74514                        <name>QSPI_CSN</name>
74515                        <bitRange>[27:27]</bitRange>
74516                        <access>write-only</access>
74517                    </field>
74518                    <field>
74519                        <name>QSPI_SCK</name>
74520                        <bitRange>[26:26]</bitRange>
74521                        <access>write-only</access>
74522                    </field>
74523                    <field>
74524                        <name>USB_DM</name>
74525                        <bitRange>[25:25]</bitRange>
74526                        <access>write-only</access>
74527                    </field>
74528                    <field>
74529                        <name>USB_DP</name>
74530                        <bitRange>[24:24]</bitRange>
74531                        <access>write-only</access>
74532                    </field>
74533                    <field>
74534                        <name>GPIO</name>
74535                        <bitRange>[15:0]</bitRange>
74536                        <access>write-only</access>
74537                    </field>
74538                </fields>
74539            </register>
74540            <register>
74541                <name>GPIO_OE_CLR</name>
74542                <addressOffset>0x00000040</addressOffset>
74543                <description>GPIO0...31 output enable clear</description>
74544                <resetValue>0x00000000</resetValue>
74545                <fields>
74546                    <field>
74547                        <name>GPIO_OE_CLR</name>
74548                        <description>Perform an atomic bit-clear on GPIO_OE, i.e. `GPIO_OE &amp;= ~wdata`</description>
74549                        <bitRange>[31:0]</bitRange>
74550                        <access>write-only</access>
74551                    </field>
74552                </fields>
74553            </register>
74554            <register>
74555                <name>GPIO_HI_OE_CLR</name>
74556                <addressOffset>0x00000044</addressOffset>
74557                <description>Output enable clear for GPIO32...47, QSPI IOs and USB pins.
74558                    Perform an atomic bit-clear on GPIO_HI_OE, i.e. `GPIO_HI_OE &amp;= ~wdata`</description>
74559                <resetValue>0x00000000</resetValue>
74560                <fields>
74561                    <field>
74562                        <name>QSPI_SD</name>
74563                        <bitRange>[31:28]</bitRange>
74564                        <access>write-only</access>
74565                    </field>
74566                    <field>
74567                        <name>QSPI_CSN</name>
74568                        <bitRange>[27:27]</bitRange>
74569                        <access>write-only</access>
74570                    </field>
74571                    <field>
74572                        <name>QSPI_SCK</name>
74573                        <bitRange>[26:26]</bitRange>
74574                        <access>write-only</access>
74575                    </field>
74576                    <field>
74577                        <name>USB_DM</name>
74578                        <bitRange>[25:25]</bitRange>
74579                        <access>write-only</access>
74580                    </field>
74581                    <field>
74582                        <name>USB_DP</name>
74583                        <bitRange>[24:24]</bitRange>
74584                        <access>write-only</access>
74585                    </field>
74586                    <field>
74587                        <name>GPIO</name>
74588                        <bitRange>[15:0]</bitRange>
74589                        <access>write-only</access>
74590                    </field>
74591                </fields>
74592            </register>
74593            <register>
74594                <name>GPIO_OE_XOR</name>
74595                <addressOffset>0x00000048</addressOffset>
74596                <description>GPIO0...31 output enable XOR</description>
74597                <resetValue>0x00000000</resetValue>
74598                <fields>
74599                    <field>
74600                        <name>GPIO_OE_XOR</name>
74601                        <description>Perform an atomic bitwise XOR on GPIO_OE, i.e. `GPIO_OE ^= wdata`</description>
74602                        <bitRange>[31:0]</bitRange>
74603                        <access>write-only</access>
74604                    </field>
74605                </fields>
74606            </register>
74607            <register>
74608                <name>GPIO_HI_OE_XOR</name>
74609                <addressOffset>0x0000004c</addressOffset>
74610                <description>Output enable XOR for GPIO32...47, QSPI IOs and USB pins.
74611                    Perform an atomic bitwise XOR on GPIO_HI_OE, i.e. `GPIO_HI_OE ^= wdata`</description>
74612                <resetValue>0x00000000</resetValue>
74613                <fields>
74614                    <field>
74615                        <name>QSPI_SD</name>
74616                        <bitRange>[31:28]</bitRange>
74617                        <access>write-only</access>
74618                    </field>
74619                    <field>
74620                        <name>QSPI_CSN</name>
74621                        <bitRange>[27:27]</bitRange>
74622                        <access>write-only</access>
74623                    </field>
74624                    <field>
74625                        <name>QSPI_SCK</name>
74626                        <bitRange>[26:26]</bitRange>
74627                        <access>write-only</access>
74628                    </field>
74629                    <field>
74630                        <name>USB_DM</name>
74631                        <bitRange>[25:25]</bitRange>
74632                        <access>write-only</access>
74633                    </field>
74634                    <field>
74635                        <name>USB_DP</name>
74636                        <bitRange>[24:24]</bitRange>
74637                        <access>write-only</access>
74638                    </field>
74639                    <field>
74640                        <name>GPIO</name>
74641                        <bitRange>[15:0]</bitRange>
74642                        <access>write-only</access>
74643                    </field>
74644                </fields>
74645            </register>
74646            <register>
74647                <name>FIFO_ST</name>
74648                <addressOffset>0x00000050</addressOffset>
74649                <description>Status register for inter-core FIFOs (mailboxes).
74650                    There is one FIFO in the core 0 -&gt; core 1 direction, and one core 1 -&gt; core 0. Both are 32 bits wide and 8 words deep.
74651                    Core 0 can see the read side of the 1-&gt;0 FIFO (RX), and the write side of 0-&gt;1 FIFO (TX).
74652                    Core 1 can see the read side of the 0-&gt;1 FIFO (RX), and the write side of 1-&gt;0 FIFO (TX).
74653                    The SIO IRQ for each core is the logical OR of the VLD, WOF and ROE fields of its FIFO_ST register.</description>
74654                <resetValue>0x00000002</resetValue>
74655                <fields>
74656                    <field>
74657                        <name>ROE</name>
74658                        <description>Sticky flag indicating the RX FIFO was read when empty. This read was ignored by the FIFO.</description>
74659                        <bitRange>[3:3]</bitRange>
74660                        <access>read-write</access>
74661                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
74662                    </field>
74663                    <field>
74664                        <name>WOF</name>
74665                        <description>Sticky flag indicating the TX FIFO was written when full. This write was ignored by the FIFO.</description>
74666                        <bitRange>[2:2]</bitRange>
74667                        <access>read-write</access>
74668                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
74669                    </field>
74670                    <field>
74671                        <name>RDY</name>
74672                        <description>Value is 1 if this core&#39;s TX FIFO is not full (i.e. if FIFO_WR is ready for more data)</description>
74673                        <bitRange>[1:1]</bitRange>
74674                        <access>read-only</access>
74675                    </field>
74676                    <field>
74677                        <name>VLD</name>
74678                        <description>Value is 1 if this core&#39;s RX FIFO is not empty (i.e. if FIFO_RD is valid)</description>
74679                        <bitRange>[0:0]</bitRange>
74680                        <access>read-only</access>
74681                    </field>
74682                </fields>
74683            </register>
74684            <register>
74685                <name>FIFO_WR</name>
74686                <addressOffset>0x00000054</addressOffset>
74687                <description>Write access to this core&#39;s TX FIFO</description>
74688                <resetValue>0x00000000</resetValue>
74689                <fields>
74690                    <field>
74691                        <name>FIFO_WR</name>
74692                        <bitRange>[31:0]</bitRange>
74693                        <access>write-only</access>
74694                    </field>
74695                </fields>
74696            </register>
74697            <register>
74698                <name>FIFO_RD</name>
74699                <addressOffset>0x00000058</addressOffset>
74700                <description>Read access to this core&#39;s RX FIFO</description>
74701                <resetMask>0x00000000</resetMask>
74702                <fields>
74703                    <field>
74704                        <name>FIFO_RD</name>
74705                        <bitRange>[31:0]</bitRange>
74706                        <access>read-only</access>
74707                        <readAction>modify</readAction>
74708                    </field>
74709                </fields>
74710            </register>
74711            <register>
74712                <name>SPINLOCK_ST</name>
74713                <addressOffset>0x0000005c</addressOffset>
74714                <description>Spinlock state
74715                    A bitmap containing the state of all 32 spinlocks (1=locked).
74716                    Mainly intended for debugging.</description>
74717                <resetValue>0x00000000</resetValue>
74718                <fields>
74719                    <field>
74720                        <name>SPINLOCK_ST</name>
74721                        <bitRange>[31:0]</bitRange>
74722                        <access>read-only</access>
74723                    </field>
74724                </fields>
74725            </register>
74726            <register>
74727                <name>INTERP0_ACCUM0</name>
74728                <addressOffset>0x00000080</addressOffset>
74729                <description>Read/write access to accumulator 0</description>
74730                <resetValue>0x00000000</resetValue>
74731                <fields>
74732                    <field>
74733                        <name>INTERP0_ACCUM0</name>
74734                        <bitRange>[31:0]</bitRange>
74735                        <access>read-write</access>
74736                    </field>
74737                </fields>
74738            </register>
74739            <register>
74740                <name>INTERP0_ACCUM1</name>
74741                <addressOffset>0x00000084</addressOffset>
74742                <description>Read/write access to accumulator 1</description>
74743                <resetValue>0x00000000</resetValue>
74744                <fields>
74745                    <field>
74746                        <name>INTERP0_ACCUM1</name>
74747                        <bitRange>[31:0]</bitRange>
74748                        <access>read-write</access>
74749                    </field>
74750                </fields>
74751            </register>
74752            <register>
74753                <name>INTERP0_BASE0</name>
74754                <addressOffset>0x00000088</addressOffset>
74755                <description>Read/write access to BASE0 register.</description>
74756                <resetValue>0x00000000</resetValue>
74757                <fields>
74758                    <field>
74759                        <name>INTERP0_BASE0</name>
74760                        <bitRange>[31:0]</bitRange>
74761                        <access>read-write</access>
74762                    </field>
74763                </fields>
74764            </register>
74765            <register>
74766                <name>INTERP0_BASE1</name>
74767                <addressOffset>0x0000008c</addressOffset>
74768                <description>Read/write access to BASE1 register.</description>
74769                <resetValue>0x00000000</resetValue>
74770                <fields>
74771                    <field>
74772                        <name>INTERP0_BASE1</name>
74773                        <bitRange>[31:0]</bitRange>
74774                        <access>read-write</access>
74775                    </field>
74776                </fields>
74777            </register>
74778            <register>
74779                <name>INTERP0_BASE2</name>
74780                <addressOffset>0x00000090</addressOffset>
74781                <description>Read/write access to BASE2 register.</description>
74782                <resetValue>0x00000000</resetValue>
74783                <fields>
74784                    <field>
74785                        <name>INTERP0_BASE2</name>
74786                        <bitRange>[31:0]</bitRange>
74787                        <access>read-write</access>
74788                    </field>
74789                </fields>
74790            </register>
74791            <register>
74792                <name>INTERP0_POP_LANE0</name>
74793                <addressOffset>0x00000094</addressOffset>
74794                <description>Read LANE0 result, and simultaneously write lane results to both accumulators (POP).</description>
74795                <resetValue>0x00000000</resetValue>
74796                <fields>
74797                    <field>
74798                        <name>INTERP0_POP_LANE0</name>
74799                        <bitRange>[31:0]</bitRange>
74800                        <access>read-only</access>
74801                    </field>
74802                </fields>
74803            </register>
74804            <register>
74805                <name>INTERP0_POP_LANE1</name>
74806                <addressOffset>0x00000098</addressOffset>
74807                <description>Read LANE1 result, and simultaneously write lane results to both accumulators (POP).</description>
74808                <resetValue>0x00000000</resetValue>
74809                <fields>
74810                    <field>
74811                        <name>INTERP0_POP_LANE1</name>
74812                        <bitRange>[31:0]</bitRange>
74813                        <access>read-only</access>
74814                    </field>
74815                </fields>
74816            </register>
74817            <register>
74818                <name>INTERP0_POP_FULL</name>
74819                <addressOffset>0x0000009c</addressOffset>
74820                <description>Read FULL result, and simultaneously write lane results to both accumulators (POP).</description>
74821                <resetValue>0x00000000</resetValue>
74822                <fields>
74823                    <field>
74824                        <name>INTERP0_POP_FULL</name>
74825                        <bitRange>[31:0]</bitRange>
74826                        <access>read-only</access>
74827                    </field>
74828                </fields>
74829            </register>
74830            <register>
74831                <name>INTERP0_PEEK_LANE0</name>
74832                <addressOffset>0x000000a0</addressOffset>
74833                <description>Read LANE0 result, without altering any internal state (PEEK).</description>
74834                <resetValue>0x00000000</resetValue>
74835                <fields>
74836                    <field>
74837                        <name>INTERP0_PEEK_LANE0</name>
74838                        <bitRange>[31:0]</bitRange>
74839                        <access>read-only</access>
74840                    </field>
74841                </fields>
74842            </register>
74843            <register>
74844                <name>INTERP0_PEEK_LANE1</name>
74845                <addressOffset>0x000000a4</addressOffset>
74846                <description>Read LANE1 result, without altering any internal state (PEEK).</description>
74847                <resetValue>0x00000000</resetValue>
74848                <fields>
74849                    <field>
74850                        <name>INTERP0_PEEK_LANE1</name>
74851                        <bitRange>[31:0]</bitRange>
74852                        <access>read-only</access>
74853                    </field>
74854                </fields>
74855            </register>
74856            <register>
74857                <name>INTERP0_PEEK_FULL</name>
74858                <addressOffset>0x000000a8</addressOffset>
74859                <description>Read FULL result, without altering any internal state (PEEK).</description>
74860                <resetValue>0x00000000</resetValue>
74861                <fields>
74862                    <field>
74863                        <name>INTERP0_PEEK_FULL</name>
74864                        <bitRange>[31:0]</bitRange>
74865                        <access>read-only</access>
74866                    </field>
74867                </fields>
74868            </register>
74869            <register>
74870                <name>INTERP0_CTRL_LANE0</name>
74871                <addressOffset>0x000000ac</addressOffset>
74872                <description>Control register for lane 0</description>
74873                <resetValue>0x00000000</resetValue>
74874                <fields>
74875                    <field>
74876                        <name>OVERF</name>
74877                        <description>Set if either OVERF0 or OVERF1 is set.</description>
74878                        <bitRange>[25:25]</bitRange>
74879                        <access>read-only</access>
74880                    </field>
74881                    <field>
74882                        <name>OVERF1</name>
74883                        <description>Indicates if any masked-off MSBs in ACCUM1 are set.</description>
74884                        <bitRange>[24:24]</bitRange>
74885                        <access>read-only</access>
74886                    </field>
74887                    <field>
74888                        <name>OVERF0</name>
74889                        <description>Indicates if any masked-off MSBs in ACCUM0 are set.</description>
74890                        <bitRange>[23:23]</bitRange>
74891                        <access>read-only</access>
74892                    </field>
74893                    <field>
74894                        <name>BLEND</name>
74895                        <description>Only present on INTERP0 on each core. If BLEND mode is enabled:
74896                            - LANE1 result is a linear interpolation between BASE0 and BASE1, controlled
74897                            by the 8 LSBs of lane 1 shift and mask value (a fractional number between
74898                            0 and 255/256ths)
74899                            - LANE0 result does not have BASE0 added (yields only the 8 LSBs of lane 1 shift+mask value)
74900                            - FULL result does not have lane 1 shift+mask value added (BASE2 + lane 0 shift+mask)
74901                            LANE1 SIGNED flag controls whether the interpolation is signed or unsigned.</description>
74902                        <bitRange>[21:21]</bitRange>
74903                        <access>read-write</access>
74904                    </field>
74905                    <field>
74906                        <name>FORCE_MSB</name>
74907                        <description>ORed into bits 29:28 of the lane result presented to the processor on the bus.
74908                            No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
74909                            of pointers into flash or SRAM.</description>
74910                        <bitRange>[20:19]</bitRange>
74911                        <access>read-write</access>
74912                    </field>
74913                    <field>
74914                        <name>ADD_RAW</name>
74915                        <description>If 1, mask + shift is bypassed for LANE0 result. This does not affect FULL result.</description>
74916                        <bitRange>[18:18]</bitRange>
74917                        <access>read-write</access>
74918                    </field>
74919                    <field>
74920                        <name>CROSS_RESULT</name>
74921                        <description>If 1, feed the opposite lane&#39;s result into this lane&#39;s accumulator on POP.</description>
74922                        <bitRange>[17:17]</bitRange>
74923                        <access>read-write</access>
74924                    </field>
74925                    <field>
74926                        <name>CROSS_INPUT</name>
74927                        <description>If 1, feed the opposite lane&#39;s accumulator into this lane&#39;s shift + mask hardware.
74928                            Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)</description>
74929                        <bitRange>[16:16]</bitRange>
74930                        <access>read-write</access>
74931                    </field>
74932                    <field>
74933                        <name>SIGNED</name>
74934                        <description>If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
74935                            before adding to BASE0, and LANE0 PEEK/POP appear extended to 32 bits when read by processor.</description>
74936                        <bitRange>[15:15]</bitRange>
74937                        <access>read-write</access>
74938                    </field>
74939                    <field>
74940                        <name>MASK_MSB</name>
74941                        <description>The most-significant bit allowed to pass by the mask (inclusive)
74942                            Setting MSB &lt; LSB may cause chip to turn inside-out</description>
74943                        <bitRange>[14:10]</bitRange>
74944                        <access>read-write</access>
74945                    </field>
74946                    <field>
74947                        <name>MASK_LSB</name>
74948                        <description>The least-significant bit allowed to pass by the mask (inclusive)</description>
74949                        <bitRange>[9:5]</bitRange>
74950                        <access>read-write</access>
74951                    </field>
74952                    <field>
74953                        <name>SHIFT</name>
74954                        <description>Right-rotate applied to accumulator before masking. By appropriately configuring the masks, left and right shifts can be synthesised.</description>
74955                        <bitRange>[4:0]</bitRange>
74956                        <access>read-write</access>
74957                    </field>
74958                </fields>
74959            </register>
74960            <register>
74961                <name>INTERP0_CTRL_LANE1</name>
74962                <addressOffset>0x000000b0</addressOffset>
74963                <description>Control register for lane 1</description>
74964                <resetValue>0x00000000</resetValue>
74965                <fields>
74966                    <field>
74967                        <name>FORCE_MSB</name>
74968                        <description>ORed into bits 29:28 of the lane result presented to the processor on the bus.
74969                            No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
74970                            of pointers into flash or SRAM.</description>
74971                        <bitRange>[20:19]</bitRange>
74972                        <access>read-write</access>
74973                    </field>
74974                    <field>
74975                        <name>ADD_RAW</name>
74976                        <description>If 1, mask + shift is bypassed for LANE1 result. This does not affect FULL result.</description>
74977                        <bitRange>[18:18]</bitRange>
74978                        <access>read-write</access>
74979                    </field>
74980                    <field>
74981                        <name>CROSS_RESULT</name>
74982                        <description>If 1, feed the opposite lane&#39;s result into this lane&#39;s accumulator on POP.</description>
74983                        <bitRange>[17:17]</bitRange>
74984                        <access>read-write</access>
74985                    </field>
74986                    <field>
74987                        <name>CROSS_INPUT</name>
74988                        <description>If 1, feed the opposite lane&#39;s accumulator into this lane&#39;s shift + mask hardware.
74989                            Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)</description>
74990                        <bitRange>[16:16]</bitRange>
74991                        <access>read-write</access>
74992                    </field>
74993                    <field>
74994                        <name>SIGNED</name>
74995                        <description>If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
74996                            before adding to BASE1, and LANE1 PEEK/POP appear extended to 32 bits when read by processor.</description>
74997                        <bitRange>[15:15]</bitRange>
74998                        <access>read-write</access>
74999                    </field>
75000                    <field>
75001                        <name>MASK_MSB</name>
75002                        <description>The most-significant bit allowed to pass by the mask (inclusive)
75003                            Setting MSB &lt; LSB may cause chip to turn inside-out</description>
75004                        <bitRange>[14:10]</bitRange>
75005                        <access>read-write</access>
75006                    </field>
75007                    <field>
75008                        <name>MASK_LSB</name>
75009                        <description>The least-significant bit allowed to pass by the mask (inclusive)</description>
75010                        <bitRange>[9:5]</bitRange>
75011                        <access>read-write</access>
75012                    </field>
75013                    <field>
75014                        <name>SHIFT</name>
75015                        <description>Right-rotate applied to accumulator before masking. By appropriately configuring the masks, left and right shifts can be synthesised.</description>
75016                        <bitRange>[4:0]</bitRange>
75017                        <access>read-write</access>
75018                    </field>
75019                </fields>
75020            </register>
75021            <register>
75022                <name>INTERP0_ACCUM0_ADD</name>
75023                <addressOffset>0x000000b4</addressOffset>
75024                <description>Values written here are atomically added to ACCUM0
75025                    Reading yields lane 0&#39;s raw shift and mask value (BASE0 not added).</description>
75026                <resetValue>0x00000000</resetValue>
75027                <fields>
75028                    <field>
75029                        <name>INTERP0_ACCUM0_ADD</name>
75030                        <bitRange>[23:0]</bitRange>
75031                        <access>read-write</access>
75032                    </field>
75033                </fields>
75034            </register>
75035            <register>
75036                <name>INTERP0_ACCUM1_ADD</name>
75037                <addressOffset>0x000000b8</addressOffset>
75038                <description>Values written here are atomically added to ACCUM1
75039                    Reading yields lane 1&#39;s raw shift and mask value (BASE1 not added).</description>
75040                <resetValue>0x00000000</resetValue>
75041                <fields>
75042                    <field>
75043                        <name>INTERP0_ACCUM1_ADD</name>
75044                        <bitRange>[23:0]</bitRange>
75045                        <access>read-write</access>
75046                    </field>
75047                </fields>
75048            </register>
75049            <register>
75050                <name>INTERP0_BASE_1AND0</name>
75051                <addressOffset>0x000000bc</addressOffset>
75052                <description>On write, the lower 16 bits go to BASE0, upper bits to BASE1 simultaneously.
75053                    Each half is sign-extended to 32 bits if that lane&#39;s SIGNED flag is set.</description>
75054                <resetValue>0x00000000</resetValue>
75055                <fields>
75056                    <field>
75057                        <name>INTERP0_BASE_1AND0</name>
75058                        <bitRange>[31:0]</bitRange>
75059                        <access>write-only</access>
75060                    </field>
75061                </fields>
75062            </register>
75063            <register>
75064                <name>INTERP1_ACCUM0</name>
75065                <addressOffset>0x000000c0</addressOffset>
75066                <description>Read/write access to accumulator 0</description>
75067                <resetValue>0x00000000</resetValue>
75068                <fields>
75069                    <field>
75070                        <name>INTERP1_ACCUM0</name>
75071                        <bitRange>[31:0]</bitRange>
75072                        <access>read-write</access>
75073                    </field>
75074                </fields>
75075            </register>
75076            <register>
75077                <name>INTERP1_ACCUM1</name>
75078                <addressOffset>0x000000c4</addressOffset>
75079                <description>Read/write access to accumulator 1</description>
75080                <resetValue>0x00000000</resetValue>
75081                <fields>
75082                    <field>
75083                        <name>INTERP1_ACCUM1</name>
75084                        <bitRange>[31:0]</bitRange>
75085                        <access>read-write</access>
75086                    </field>
75087                </fields>
75088            </register>
75089            <register>
75090                <name>INTERP1_BASE0</name>
75091                <addressOffset>0x000000c8</addressOffset>
75092                <description>Read/write access to BASE0 register.</description>
75093                <resetValue>0x00000000</resetValue>
75094                <fields>
75095                    <field>
75096                        <name>INTERP1_BASE0</name>
75097                        <bitRange>[31:0]</bitRange>
75098                        <access>read-write</access>
75099                    </field>
75100                </fields>
75101            </register>
75102            <register>
75103                <name>INTERP1_BASE1</name>
75104                <addressOffset>0x000000cc</addressOffset>
75105                <description>Read/write access to BASE1 register.</description>
75106                <resetValue>0x00000000</resetValue>
75107                <fields>
75108                    <field>
75109                        <name>INTERP1_BASE1</name>
75110                        <bitRange>[31:0]</bitRange>
75111                        <access>read-write</access>
75112                    </field>
75113                </fields>
75114            </register>
75115            <register>
75116                <name>INTERP1_BASE2</name>
75117                <addressOffset>0x000000d0</addressOffset>
75118                <description>Read/write access to BASE2 register.</description>
75119                <resetValue>0x00000000</resetValue>
75120                <fields>
75121                    <field>
75122                        <name>INTERP1_BASE2</name>
75123                        <bitRange>[31:0]</bitRange>
75124                        <access>read-write</access>
75125                    </field>
75126                </fields>
75127            </register>
75128            <register>
75129                <name>INTERP1_POP_LANE0</name>
75130                <addressOffset>0x000000d4</addressOffset>
75131                <description>Read LANE0 result, and simultaneously write lane results to both accumulators (POP).</description>
75132                <resetValue>0x00000000</resetValue>
75133                <fields>
75134                    <field>
75135                        <name>INTERP1_POP_LANE0</name>
75136                        <bitRange>[31:0]</bitRange>
75137                        <access>read-only</access>
75138                    </field>
75139                </fields>
75140            </register>
75141            <register>
75142                <name>INTERP1_POP_LANE1</name>
75143                <addressOffset>0x000000d8</addressOffset>
75144                <description>Read LANE1 result, and simultaneously write lane results to both accumulators (POP).</description>
75145                <resetValue>0x00000000</resetValue>
75146                <fields>
75147                    <field>
75148                        <name>INTERP1_POP_LANE1</name>
75149                        <bitRange>[31:0]</bitRange>
75150                        <access>read-only</access>
75151                    </field>
75152                </fields>
75153            </register>
75154            <register>
75155                <name>INTERP1_POP_FULL</name>
75156                <addressOffset>0x000000dc</addressOffset>
75157                <description>Read FULL result, and simultaneously write lane results to both accumulators (POP).</description>
75158                <resetValue>0x00000000</resetValue>
75159                <fields>
75160                    <field>
75161                        <name>INTERP1_POP_FULL</name>
75162                        <bitRange>[31:0]</bitRange>
75163                        <access>read-only</access>
75164                    </field>
75165                </fields>
75166            </register>
75167            <register>
75168                <name>INTERP1_PEEK_LANE0</name>
75169                <addressOffset>0x000000e0</addressOffset>
75170                <description>Read LANE0 result, without altering any internal state (PEEK).</description>
75171                <resetValue>0x00000000</resetValue>
75172                <fields>
75173                    <field>
75174                        <name>INTERP1_PEEK_LANE0</name>
75175                        <bitRange>[31:0]</bitRange>
75176                        <access>read-only</access>
75177                    </field>
75178                </fields>
75179            </register>
75180            <register>
75181                <name>INTERP1_PEEK_LANE1</name>
75182                <addressOffset>0x000000e4</addressOffset>
75183                <description>Read LANE1 result, without altering any internal state (PEEK).</description>
75184                <resetValue>0x00000000</resetValue>
75185                <fields>
75186                    <field>
75187                        <name>INTERP1_PEEK_LANE1</name>
75188                        <bitRange>[31:0]</bitRange>
75189                        <access>read-only</access>
75190                    </field>
75191                </fields>
75192            </register>
75193            <register>
75194                <name>INTERP1_PEEK_FULL</name>
75195                <addressOffset>0x000000e8</addressOffset>
75196                <description>Read FULL result, without altering any internal state (PEEK).</description>
75197                <resetValue>0x00000000</resetValue>
75198                <fields>
75199                    <field>
75200                        <name>INTERP1_PEEK_FULL</name>
75201                        <bitRange>[31:0]</bitRange>
75202                        <access>read-only</access>
75203                    </field>
75204                </fields>
75205            </register>
75206            <register>
75207                <name>INTERP1_CTRL_LANE0</name>
75208                <addressOffset>0x000000ec</addressOffset>
75209                <description>Control register for lane 0</description>
75210                <resetValue>0x00000000</resetValue>
75211                <fields>
75212                    <field>
75213                        <name>OVERF</name>
75214                        <description>Set if either OVERF0 or OVERF1 is set.</description>
75215                        <bitRange>[25:25]</bitRange>
75216                        <access>read-only</access>
75217                    </field>
75218                    <field>
75219                        <name>OVERF1</name>
75220                        <description>Indicates if any masked-off MSBs in ACCUM1 are set.</description>
75221                        <bitRange>[24:24]</bitRange>
75222                        <access>read-only</access>
75223                    </field>
75224                    <field>
75225                        <name>OVERF0</name>
75226                        <description>Indicates if any masked-off MSBs in ACCUM0 are set.</description>
75227                        <bitRange>[23:23]</bitRange>
75228                        <access>read-only</access>
75229                    </field>
75230                    <field>
75231                        <name>CLAMP</name>
75232                        <description>Only present on INTERP1 on each core. If CLAMP mode is enabled:
75233                            - LANE0 result is shifted and masked ACCUM0, clamped by a lower bound of
75234                            BASE0 and an upper bound of BASE1.
75235                            - Signedness of these comparisons is determined by LANE0_CTRL_SIGNED</description>
75236                        <bitRange>[22:22]</bitRange>
75237                        <access>read-write</access>
75238                    </field>
75239                    <field>
75240                        <name>FORCE_MSB</name>
75241                        <description>ORed into bits 29:28 of the lane result presented to the processor on the bus.
75242                            No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
75243                            of pointers into flash or SRAM.</description>
75244                        <bitRange>[20:19]</bitRange>
75245                        <access>read-write</access>
75246                    </field>
75247                    <field>
75248                        <name>ADD_RAW</name>
75249                        <description>If 1, mask + shift is bypassed for LANE0 result. This does not affect FULL result.</description>
75250                        <bitRange>[18:18]</bitRange>
75251                        <access>read-write</access>
75252                    </field>
75253                    <field>
75254                        <name>CROSS_RESULT</name>
75255                        <description>If 1, feed the opposite lane&#39;s result into this lane&#39;s accumulator on POP.</description>
75256                        <bitRange>[17:17]</bitRange>
75257                        <access>read-write</access>
75258                    </field>
75259                    <field>
75260                        <name>CROSS_INPUT</name>
75261                        <description>If 1, feed the opposite lane&#39;s accumulator into this lane&#39;s shift + mask hardware.
75262                            Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)</description>
75263                        <bitRange>[16:16]</bitRange>
75264                        <access>read-write</access>
75265                    </field>
75266                    <field>
75267                        <name>SIGNED</name>
75268                        <description>If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
75269                            before adding to BASE0, and LANE0 PEEK/POP appear extended to 32 bits when read by processor.</description>
75270                        <bitRange>[15:15]</bitRange>
75271                        <access>read-write</access>
75272                    </field>
75273                    <field>
75274                        <name>MASK_MSB</name>
75275                        <description>The most-significant bit allowed to pass by the mask (inclusive)
75276                            Setting MSB &lt; LSB may cause chip to turn inside-out</description>
75277                        <bitRange>[14:10]</bitRange>
75278                        <access>read-write</access>
75279                    </field>
75280                    <field>
75281                        <name>MASK_LSB</name>
75282                        <description>The least-significant bit allowed to pass by the mask (inclusive)</description>
75283                        <bitRange>[9:5]</bitRange>
75284                        <access>read-write</access>
75285                    </field>
75286                    <field>
75287                        <name>SHIFT</name>
75288                        <description>Right-rotate applied to accumulator before masking. By appropriately configuring the masks, left and right shifts can be synthesised.</description>
75289                        <bitRange>[4:0]</bitRange>
75290                        <access>read-write</access>
75291                    </field>
75292                </fields>
75293            </register>
75294            <register>
75295                <name>INTERP1_CTRL_LANE1</name>
75296                <addressOffset>0x000000f0</addressOffset>
75297                <description>Control register for lane 1</description>
75298                <resetValue>0x00000000</resetValue>
75299                <fields>
75300                    <field>
75301                        <name>FORCE_MSB</name>
75302                        <description>ORed into bits 29:28 of the lane result presented to the processor on the bus.
75303                            No effect on the internal 32-bit datapath. Handy for using a lane to generate sequence
75304                            of pointers into flash or SRAM.</description>
75305                        <bitRange>[20:19]</bitRange>
75306                        <access>read-write</access>
75307                    </field>
75308                    <field>
75309                        <name>ADD_RAW</name>
75310                        <description>If 1, mask + shift is bypassed for LANE1 result. This does not affect FULL result.</description>
75311                        <bitRange>[18:18]</bitRange>
75312                        <access>read-write</access>
75313                    </field>
75314                    <field>
75315                        <name>CROSS_RESULT</name>
75316                        <description>If 1, feed the opposite lane&#39;s result into this lane&#39;s accumulator on POP.</description>
75317                        <bitRange>[17:17]</bitRange>
75318                        <access>read-write</access>
75319                    </field>
75320                    <field>
75321                        <name>CROSS_INPUT</name>
75322                        <description>If 1, feed the opposite lane&#39;s accumulator into this lane&#39;s shift + mask hardware.
75323                            Takes effect even if ADD_RAW is set (the CROSS_INPUT mux is before the shift+mask bypass)</description>
75324                        <bitRange>[16:16]</bitRange>
75325                        <access>read-write</access>
75326                    </field>
75327                    <field>
75328                        <name>SIGNED</name>
75329                        <description>If SIGNED is set, the shifted and masked accumulator value is sign-extended to 32 bits
75330                            before adding to BASE1, and LANE1 PEEK/POP appear extended to 32 bits when read by processor.</description>
75331                        <bitRange>[15:15]</bitRange>
75332                        <access>read-write</access>
75333                    </field>
75334                    <field>
75335                        <name>MASK_MSB</name>
75336                        <description>The most-significant bit allowed to pass by the mask (inclusive)
75337                            Setting MSB &lt; LSB may cause chip to turn inside-out</description>
75338                        <bitRange>[14:10]</bitRange>
75339                        <access>read-write</access>
75340                    </field>
75341                    <field>
75342                        <name>MASK_LSB</name>
75343                        <description>The least-significant bit allowed to pass by the mask (inclusive)</description>
75344                        <bitRange>[9:5]</bitRange>
75345                        <access>read-write</access>
75346                    </field>
75347                    <field>
75348                        <name>SHIFT</name>
75349                        <description>Right-rotate applied to accumulator before masking. By appropriately configuring the masks, left and right shifts can be synthesised.</description>
75350                        <bitRange>[4:0]</bitRange>
75351                        <access>read-write</access>
75352                    </field>
75353                </fields>
75354            </register>
75355            <register>
75356                <name>INTERP1_ACCUM0_ADD</name>
75357                <addressOffset>0x000000f4</addressOffset>
75358                <description>Values written here are atomically added to ACCUM0
75359                    Reading yields lane 0&#39;s raw shift and mask value (BASE0 not added).</description>
75360                <resetValue>0x00000000</resetValue>
75361                <fields>
75362                    <field>
75363                        <name>INTERP1_ACCUM0_ADD</name>
75364                        <bitRange>[23:0]</bitRange>
75365                        <access>read-write</access>
75366                    </field>
75367                </fields>
75368            </register>
75369            <register>
75370                <name>INTERP1_ACCUM1_ADD</name>
75371                <addressOffset>0x000000f8</addressOffset>
75372                <description>Values written here are atomically added to ACCUM1
75373                    Reading yields lane 1&#39;s raw shift and mask value (BASE1 not added).</description>
75374                <resetValue>0x00000000</resetValue>
75375                <fields>
75376                    <field>
75377                        <name>INTERP1_ACCUM1_ADD</name>
75378                        <bitRange>[23:0]</bitRange>
75379                        <access>read-write</access>
75380                    </field>
75381                </fields>
75382            </register>
75383            <register>
75384                <name>INTERP1_BASE_1AND0</name>
75385                <addressOffset>0x000000fc</addressOffset>
75386                <description>On write, the lower 16 bits go to BASE0, upper bits to BASE1 simultaneously.
75387                    Each half is sign-extended to 32 bits if that lane&#39;s SIGNED flag is set.</description>
75388                <resetValue>0x00000000</resetValue>
75389                <fields>
75390                    <field>
75391                        <name>INTERP1_BASE_1AND0</name>
75392                        <bitRange>[31:0]</bitRange>
75393                        <access>write-only</access>
75394                    </field>
75395                </fields>
75396            </register>
75397            <register>
75398                <name>SPINLOCK0</name>
75399                <addressOffset>0x00000100</addressOffset>
75400                <description>Reading from a spinlock address will:
75401                    - Return 0 if lock is already locked
75402                    - Otherwise return nonzero, and simultaneously claim the lock
75403
75404                    Writing (any value) releases the lock.
75405                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75406                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75407                <resetValue>0x00000000</resetValue>
75408                <fields>
75409                    <field>
75410                        <name>SPINLOCK0</name>
75411                        <bitRange>[31:0]</bitRange>
75412                        <access>read-write</access>
75413                        <readAction>modify</readAction>
75414                    </field>
75415                </fields>
75416            </register>
75417            <register>
75418                <name>SPINLOCK1</name>
75419                <addressOffset>0x00000104</addressOffset>
75420                <description>Reading from a spinlock address will:
75421                    - Return 0 if lock is already locked
75422                    - Otherwise return nonzero, and simultaneously claim the lock
75423
75424                    Writing (any value) releases the lock.
75425                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75426                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75427                <resetValue>0x00000000</resetValue>
75428                <fields>
75429                    <field>
75430                        <name>SPINLOCK1</name>
75431                        <bitRange>[31:0]</bitRange>
75432                        <access>read-write</access>
75433                        <readAction>modify</readAction>
75434                    </field>
75435                </fields>
75436            </register>
75437            <register>
75438                <name>SPINLOCK2</name>
75439                <addressOffset>0x00000108</addressOffset>
75440                <description>Reading from a spinlock address will:
75441                    - Return 0 if lock is already locked
75442                    - Otherwise return nonzero, and simultaneously claim the lock
75443
75444                    Writing (any value) releases the lock.
75445                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75446                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75447                <resetValue>0x00000000</resetValue>
75448                <fields>
75449                    <field>
75450                        <name>SPINLOCK2</name>
75451                        <bitRange>[31:0]</bitRange>
75452                        <access>read-write</access>
75453                        <readAction>modify</readAction>
75454                    </field>
75455                </fields>
75456            </register>
75457            <register>
75458                <name>SPINLOCK3</name>
75459                <addressOffset>0x0000010c</addressOffset>
75460                <description>Reading from a spinlock address will:
75461                    - Return 0 if lock is already locked
75462                    - Otherwise return nonzero, and simultaneously claim the lock
75463
75464                    Writing (any value) releases the lock.
75465                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75466                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75467                <resetValue>0x00000000</resetValue>
75468                <fields>
75469                    <field>
75470                        <name>SPINLOCK3</name>
75471                        <bitRange>[31:0]</bitRange>
75472                        <access>read-write</access>
75473                        <readAction>modify</readAction>
75474                    </field>
75475                </fields>
75476            </register>
75477            <register>
75478                <name>SPINLOCK4</name>
75479                <addressOffset>0x00000110</addressOffset>
75480                <description>Reading from a spinlock address will:
75481                    - Return 0 if lock is already locked
75482                    - Otherwise return nonzero, and simultaneously claim the lock
75483
75484                    Writing (any value) releases the lock.
75485                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75486                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75487                <resetValue>0x00000000</resetValue>
75488                <fields>
75489                    <field>
75490                        <name>SPINLOCK4</name>
75491                        <bitRange>[31:0]</bitRange>
75492                        <access>read-write</access>
75493                        <readAction>modify</readAction>
75494                    </field>
75495                </fields>
75496            </register>
75497            <register>
75498                <name>SPINLOCK5</name>
75499                <addressOffset>0x00000114</addressOffset>
75500                <description>Reading from a spinlock address will:
75501                    - Return 0 if lock is already locked
75502                    - Otherwise return nonzero, and simultaneously claim the lock
75503
75504                    Writing (any value) releases the lock.
75505                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75506                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75507                <resetValue>0x00000000</resetValue>
75508                <fields>
75509                    <field>
75510                        <name>SPINLOCK5</name>
75511                        <bitRange>[31:0]</bitRange>
75512                        <access>read-write</access>
75513                        <readAction>modify</readAction>
75514                    </field>
75515                </fields>
75516            </register>
75517            <register>
75518                <name>SPINLOCK6</name>
75519                <addressOffset>0x00000118</addressOffset>
75520                <description>Reading from a spinlock address will:
75521                    - Return 0 if lock is already locked
75522                    - Otherwise return nonzero, and simultaneously claim the lock
75523
75524                    Writing (any value) releases the lock.
75525                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75526                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75527                <resetValue>0x00000000</resetValue>
75528                <fields>
75529                    <field>
75530                        <name>SPINLOCK6</name>
75531                        <bitRange>[31:0]</bitRange>
75532                        <access>read-write</access>
75533                        <readAction>modify</readAction>
75534                    </field>
75535                </fields>
75536            </register>
75537            <register>
75538                <name>SPINLOCK7</name>
75539                <addressOffset>0x0000011c</addressOffset>
75540                <description>Reading from a spinlock address will:
75541                    - Return 0 if lock is already locked
75542                    - Otherwise return nonzero, and simultaneously claim the lock
75543
75544                    Writing (any value) releases the lock.
75545                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75546                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75547                <resetValue>0x00000000</resetValue>
75548                <fields>
75549                    <field>
75550                        <name>SPINLOCK7</name>
75551                        <bitRange>[31:0]</bitRange>
75552                        <access>read-write</access>
75553                        <readAction>modify</readAction>
75554                    </field>
75555                </fields>
75556            </register>
75557            <register>
75558                <name>SPINLOCK8</name>
75559                <addressOffset>0x00000120</addressOffset>
75560                <description>Reading from a spinlock address will:
75561                    - Return 0 if lock is already locked
75562                    - Otherwise return nonzero, and simultaneously claim the lock
75563
75564                    Writing (any value) releases the lock.
75565                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75566                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75567                <resetValue>0x00000000</resetValue>
75568                <fields>
75569                    <field>
75570                        <name>SPINLOCK8</name>
75571                        <bitRange>[31:0]</bitRange>
75572                        <access>read-write</access>
75573                        <readAction>modify</readAction>
75574                    </field>
75575                </fields>
75576            </register>
75577            <register>
75578                <name>SPINLOCK9</name>
75579                <addressOffset>0x00000124</addressOffset>
75580                <description>Reading from a spinlock address will:
75581                    - Return 0 if lock is already locked
75582                    - Otherwise return nonzero, and simultaneously claim the lock
75583
75584                    Writing (any value) releases the lock.
75585                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75586                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75587                <resetValue>0x00000000</resetValue>
75588                <fields>
75589                    <field>
75590                        <name>SPINLOCK9</name>
75591                        <bitRange>[31:0]</bitRange>
75592                        <access>read-write</access>
75593                        <readAction>modify</readAction>
75594                    </field>
75595                </fields>
75596            </register>
75597            <register>
75598                <name>SPINLOCK10</name>
75599                <addressOffset>0x00000128</addressOffset>
75600                <description>Reading from a spinlock address will:
75601                    - Return 0 if lock is already locked
75602                    - Otherwise return nonzero, and simultaneously claim the lock
75603
75604                    Writing (any value) releases the lock.
75605                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75606                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75607                <resetValue>0x00000000</resetValue>
75608                <fields>
75609                    <field>
75610                        <name>SPINLOCK10</name>
75611                        <bitRange>[31:0]</bitRange>
75612                        <access>read-write</access>
75613                        <readAction>modify</readAction>
75614                    </field>
75615                </fields>
75616            </register>
75617            <register>
75618                <name>SPINLOCK11</name>
75619                <addressOffset>0x0000012c</addressOffset>
75620                <description>Reading from a spinlock address will:
75621                    - Return 0 if lock is already locked
75622                    - Otherwise return nonzero, and simultaneously claim the lock
75623
75624                    Writing (any value) releases the lock.
75625                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75626                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75627                <resetValue>0x00000000</resetValue>
75628                <fields>
75629                    <field>
75630                        <name>SPINLOCK11</name>
75631                        <bitRange>[31:0]</bitRange>
75632                        <access>read-write</access>
75633                        <readAction>modify</readAction>
75634                    </field>
75635                </fields>
75636            </register>
75637            <register>
75638                <name>SPINLOCK12</name>
75639                <addressOffset>0x00000130</addressOffset>
75640                <description>Reading from a spinlock address will:
75641                    - Return 0 if lock is already locked
75642                    - Otherwise return nonzero, and simultaneously claim the lock
75643
75644                    Writing (any value) releases the lock.
75645                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75646                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75647                <resetValue>0x00000000</resetValue>
75648                <fields>
75649                    <field>
75650                        <name>SPINLOCK12</name>
75651                        <bitRange>[31:0]</bitRange>
75652                        <access>read-write</access>
75653                        <readAction>modify</readAction>
75654                    </field>
75655                </fields>
75656            </register>
75657            <register>
75658                <name>SPINLOCK13</name>
75659                <addressOffset>0x00000134</addressOffset>
75660                <description>Reading from a spinlock address will:
75661                    - Return 0 if lock is already locked
75662                    - Otherwise return nonzero, and simultaneously claim the lock
75663
75664                    Writing (any value) releases the lock.
75665                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75666                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75667                <resetValue>0x00000000</resetValue>
75668                <fields>
75669                    <field>
75670                        <name>SPINLOCK13</name>
75671                        <bitRange>[31:0]</bitRange>
75672                        <access>read-write</access>
75673                        <readAction>modify</readAction>
75674                    </field>
75675                </fields>
75676            </register>
75677            <register>
75678                <name>SPINLOCK14</name>
75679                <addressOffset>0x00000138</addressOffset>
75680                <description>Reading from a spinlock address will:
75681                    - Return 0 if lock is already locked
75682                    - Otherwise return nonzero, and simultaneously claim the lock
75683
75684                    Writing (any value) releases the lock.
75685                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75686                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75687                <resetValue>0x00000000</resetValue>
75688                <fields>
75689                    <field>
75690                        <name>SPINLOCK14</name>
75691                        <bitRange>[31:0]</bitRange>
75692                        <access>read-write</access>
75693                        <readAction>modify</readAction>
75694                    </field>
75695                </fields>
75696            </register>
75697            <register>
75698                <name>SPINLOCK15</name>
75699                <addressOffset>0x0000013c</addressOffset>
75700                <description>Reading from a spinlock address will:
75701                    - Return 0 if lock is already locked
75702                    - Otherwise return nonzero, and simultaneously claim the lock
75703
75704                    Writing (any value) releases the lock.
75705                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75706                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75707                <resetValue>0x00000000</resetValue>
75708                <fields>
75709                    <field>
75710                        <name>SPINLOCK15</name>
75711                        <bitRange>[31:0]</bitRange>
75712                        <access>read-write</access>
75713                        <readAction>modify</readAction>
75714                    </field>
75715                </fields>
75716            </register>
75717            <register>
75718                <name>SPINLOCK16</name>
75719                <addressOffset>0x00000140</addressOffset>
75720                <description>Reading from a spinlock address will:
75721                    - Return 0 if lock is already locked
75722                    - Otherwise return nonzero, and simultaneously claim the lock
75723
75724                    Writing (any value) releases the lock.
75725                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75726                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75727                <resetValue>0x00000000</resetValue>
75728                <fields>
75729                    <field>
75730                        <name>SPINLOCK16</name>
75731                        <bitRange>[31:0]</bitRange>
75732                        <access>read-write</access>
75733                        <readAction>modify</readAction>
75734                    </field>
75735                </fields>
75736            </register>
75737            <register>
75738                <name>SPINLOCK17</name>
75739                <addressOffset>0x00000144</addressOffset>
75740                <description>Reading from a spinlock address will:
75741                    - Return 0 if lock is already locked
75742                    - Otherwise return nonzero, and simultaneously claim the lock
75743
75744                    Writing (any value) releases the lock.
75745                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75746                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75747                <resetValue>0x00000000</resetValue>
75748                <fields>
75749                    <field>
75750                        <name>SPINLOCK17</name>
75751                        <bitRange>[31:0]</bitRange>
75752                        <access>read-write</access>
75753                        <readAction>modify</readAction>
75754                    </field>
75755                </fields>
75756            </register>
75757            <register>
75758                <name>SPINLOCK18</name>
75759                <addressOffset>0x00000148</addressOffset>
75760                <description>Reading from a spinlock address will:
75761                    - Return 0 if lock is already locked
75762                    - Otherwise return nonzero, and simultaneously claim the lock
75763
75764                    Writing (any value) releases the lock.
75765                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75766                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75767                <resetValue>0x00000000</resetValue>
75768                <fields>
75769                    <field>
75770                        <name>SPINLOCK18</name>
75771                        <bitRange>[31:0]</bitRange>
75772                        <access>read-write</access>
75773                        <readAction>modify</readAction>
75774                    </field>
75775                </fields>
75776            </register>
75777            <register>
75778                <name>SPINLOCK19</name>
75779                <addressOffset>0x0000014c</addressOffset>
75780                <description>Reading from a spinlock address will:
75781                    - Return 0 if lock is already locked
75782                    - Otherwise return nonzero, and simultaneously claim the lock
75783
75784                    Writing (any value) releases the lock.
75785                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75786                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75787                <resetValue>0x00000000</resetValue>
75788                <fields>
75789                    <field>
75790                        <name>SPINLOCK19</name>
75791                        <bitRange>[31:0]</bitRange>
75792                        <access>read-write</access>
75793                        <readAction>modify</readAction>
75794                    </field>
75795                </fields>
75796            </register>
75797            <register>
75798                <name>SPINLOCK20</name>
75799                <addressOffset>0x00000150</addressOffset>
75800                <description>Reading from a spinlock address will:
75801                    - Return 0 if lock is already locked
75802                    - Otherwise return nonzero, and simultaneously claim the lock
75803
75804                    Writing (any value) releases the lock.
75805                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75806                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75807                <resetValue>0x00000000</resetValue>
75808                <fields>
75809                    <field>
75810                        <name>SPINLOCK20</name>
75811                        <bitRange>[31:0]</bitRange>
75812                        <access>read-write</access>
75813                        <readAction>modify</readAction>
75814                    </field>
75815                </fields>
75816            </register>
75817            <register>
75818                <name>SPINLOCK21</name>
75819                <addressOffset>0x00000154</addressOffset>
75820                <description>Reading from a spinlock address will:
75821                    - Return 0 if lock is already locked
75822                    - Otherwise return nonzero, and simultaneously claim the lock
75823
75824                    Writing (any value) releases the lock.
75825                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75826                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75827                <resetValue>0x00000000</resetValue>
75828                <fields>
75829                    <field>
75830                        <name>SPINLOCK21</name>
75831                        <bitRange>[31:0]</bitRange>
75832                        <access>read-write</access>
75833                        <readAction>modify</readAction>
75834                    </field>
75835                </fields>
75836            </register>
75837            <register>
75838                <name>SPINLOCK22</name>
75839                <addressOffset>0x00000158</addressOffset>
75840                <description>Reading from a spinlock address will:
75841                    - Return 0 if lock is already locked
75842                    - Otherwise return nonzero, and simultaneously claim the lock
75843
75844                    Writing (any value) releases the lock.
75845                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75846                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75847                <resetValue>0x00000000</resetValue>
75848                <fields>
75849                    <field>
75850                        <name>SPINLOCK22</name>
75851                        <bitRange>[31:0]</bitRange>
75852                        <access>read-write</access>
75853                        <readAction>modify</readAction>
75854                    </field>
75855                </fields>
75856            </register>
75857            <register>
75858                <name>SPINLOCK23</name>
75859                <addressOffset>0x0000015c</addressOffset>
75860                <description>Reading from a spinlock address will:
75861                    - Return 0 if lock is already locked
75862                    - Otherwise return nonzero, and simultaneously claim the lock
75863
75864                    Writing (any value) releases the lock.
75865                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75866                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75867                <resetValue>0x00000000</resetValue>
75868                <fields>
75869                    <field>
75870                        <name>SPINLOCK23</name>
75871                        <bitRange>[31:0]</bitRange>
75872                        <access>read-write</access>
75873                        <readAction>modify</readAction>
75874                    </field>
75875                </fields>
75876            </register>
75877            <register>
75878                <name>SPINLOCK24</name>
75879                <addressOffset>0x00000160</addressOffset>
75880                <description>Reading from a spinlock address will:
75881                    - Return 0 if lock is already locked
75882                    - Otherwise return nonzero, and simultaneously claim the lock
75883
75884                    Writing (any value) releases the lock.
75885                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75886                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75887                <resetValue>0x00000000</resetValue>
75888                <fields>
75889                    <field>
75890                        <name>SPINLOCK24</name>
75891                        <bitRange>[31:0]</bitRange>
75892                        <access>read-write</access>
75893                        <readAction>modify</readAction>
75894                    </field>
75895                </fields>
75896            </register>
75897            <register>
75898                <name>SPINLOCK25</name>
75899                <addressOffset>0x00000164</addressOffset>
75900                <description>Reading from a spinlock address will:
75901                    - Return 0 if lock is already locked
75902                    - Otherwise return nonzero, and simultaneously claim the lock
75903
75904                    Writing (any value) releases the lock.
75905                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75906                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75907                <resetValue>0x00000000</resetValue>
75908                <fields>
75909                    <field>
75910                        <name>SPINLOCK25</name>
75911                        <bitRange>[31:0]</bitRange>
75912                        <access>read-write</access>
75913                        <readAction>modify</readAction>
75914                    </field>
75915                </fields>
75916            </register>
75917            <register>
75918                <name>SPINLOCK26</name>
75919                <addressOffset>0x00000168</addressOffset>
75920                <description>Reading from a spinlock address will:
75921                    - Return 0 if lock is already locked
75922                    - Otherwise return nonzero, and simultaneously claim the lock
75923
75924                    Writing (any value) releases the lock.
75925                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75926                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75927                <resetValue>0x00000000</resetValue>
75928                <fields>
75929                    <field>
75930                        <name>SPINLOCK26</name>
75931                        <bitRange>[31:0]</bitRange>
75932                        <access>read-write</access>
75933                        <readAction>modify</readAction>
75934                    </field>
75935                </fields>
75936            </register>
75937            <register>
75938                <name>SPINLOCK27</name>
75939                <addressOffset>0x0000016c</addressOffset>
75940                <description>Reading from a spinlock address will:
75941                    - Return 0 if lock is already locked
75942                    - Otherwise return nonzero, and simultaneously claim the lock
75943
75944                    Writing (any value) releases the lock.
75945                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75946                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75947                <resetValue>0x00000000</resetValue>
75948                <fields>
75949                    <field>
75950                        <name>SPINLOCK27</name>
75951                        <bitRange>[31:0]</bitRange>
75952                        <access>read-write</access>
75953                        <readAction>modify</readAction>
75954                    </field>
75955                </fields>
75956            </register>
75957            <register>
75958                <name>SPINLOCK28</name>
75959                <addressOffset>0x00000170</addressOffset>
75960                <description>Reading from a spinlock address will:
75961                    - Return 0 if lock is already locked
75962                    - Otherwise return nonzero, and simultaneously claim the lock
75963
75964                    Writing (any value) releases the lock.
75965                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75966                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75967                <resetValue>0x00000000</resetValue>
75968                <fields>
75969                    <field>
75970                        <name>SPINLOCK28</name>
75971                        <bitRange>[31:0]</bitRange>
75972                        <access>read-write</access>
75973                        <readAction>modify</readAction>
75974                    </field>
75975                </fields>
75976            </register>
75977            <register>
75978                <name>SPINLOCK29</name>
75979                <addressOffset>0x00000174</addressOffset>
75980                <description>Reading from a spinlock address will:
75981                    - Return 0 if lock is already locked
75982                    - Otherwise return nonzero, and simultaneously claim the lock
75983
75984                    Writing (any value) releases the lock.
75985                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
75986                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
75987                <resetValue>0x00000000</resetValue>
75988                <fields>
75989                    <field>
75990                        <name>SPINLOCK29</name>
75991                        <bitRange>[31:0]</bitRange>
75992                        <access>read-write</access>
75993                        <readAction>modify</readAction>
75994                    </field>
75995                </fields>
75996            </register>
75997            <register>
75998                <name>SPINLOCK30</name>
75999                <addressOffset>0x00000178</addressOffset>
76000                <description>Reading from a spinlock address will:
76001                    - Return 0 if lock is already locked
76002                    - Otherwise return nonzero, and simultaneously claim the lock
76003
76004                    Writing (any value) releases the lock.
76005                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
76006                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
76007                <resetValue>0x00000000</resetValue>
76008                <fields>
76009                    <field>
76010                        <name>SPINLOCK30</name>
76011                        <bitRange>[31:0]</bitRange>
76012                        <access>read-write</access>
76013                        <readAction>modify</readAction>
76014                    </field>
76015                </fields>
76016            </register>
76017            <register>
76018                <name>SPINLOCK31</name>
76019                <addressOffset>0x0000017c</addressOffset>
76020                <description>Reading from a spinlock address will:
76021                    - Return 0 if lock is already locked
76022                    - Otherwise return nonzero, and simultaneously claim the lock
76023
76024                    Writing (any value) releases the lock.
76025                    If core 0 and core 1 attempt to claim the same lock simultaneously, core 0 wins.
76026                    The value returned on success is 0x1 &lt;&lt; lock number.</description>
76027                <resetValue>0x00000000</resetValue>
76028                <fields>
76029                    <field>
76030                        <name>SPINLOCK31</name>
76031                        <bitRange>[31:0]</bitRange>
76032                        <access>read-write</access>
76033                        <readAction>modify</readAction>
76034                    </field>
76035                </fields>
76036            </register>
76037            <register>
76038                <name>DOORBELL_OUT_SET</name>
76039                <addressOffset>0x00000180</addressOffset>
76040                <description>Trigger a doorbell interrupt on the opposite core.
76041
76042                    Write 1 to a bit to set the corresponding bit in DOORBELL_IN on the opposite core. This raises the opposite core&#39;s doorbell interrupt.
76043
76044                    Read to get the status of the doorbells currently asserted on the opposite core. This is equivalent to that core reading its own DOORBELL_IN status.</description>
76045                <resetValue>0x00000000</resetValue>
76046                <fields>
76047                    <field>
76048                        <name>DOORBELL_OUT_SET</name>
76049                        <bitRange>[7:0]</bitRange>
76050                        <access>read-write</access>
76051                    </field>
76052                </fields>
76053            </register>
76054            <register>
76055                <name>DOORBELL_OUT_CLR</name>
76056                <addressOffset>0x00000184</addressOffset>
76057                <description>Clear doorbells which have been posted to the opposite core. This register is intended for debugging and initialisation purposes.
76058
76059                    Writing 1 to a bit in DOORBELL_OUT_CLR clears the corresponding bit in DOORBELL_IN on the opposite core. Clearing all bits will cause that core&#39;s doorbell interrupt to deassert. Since the usual order of events is for software to send events using DOORBELL_OUT_SET, and acknowledge incoming events by writing to DOORBELL_IN_CLR, this register should be used with caution to avoid race conditions.
76060
76061                    Reading returns the status of the doorbells currently asserted on the other core, i.e. is equivalent to that core reading its own DOORBELL_IN status.</description>
76062                <resetValue>0x00000000</resetValue>
76063                <fields>
76064                    <field>
76065                        <name>DOORBELL_OUT_CLR</name>
76066                        <bitRange>[7:0]</bitRange>
76067                        <access>read-write</access>
76068                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
76069                    </field>
76070                </fields>
76071            </register>
76072            <register>
76073                <name>DOORBELL_IN_SET</name>
76074                <addressOffset>0x00000188</addressOffset>
76075                <description>Write 1s to trigger doorbell interrupts on this core. Read to get status of doorbells currently asserted on this core.</description>
76076                <resetValue>0x00000000</resetValue>
76077                <fields>
76078                    <field>
76079                        <name>DOORBELL_IN_SET</name>
76080                        <bitRange>[7:0]</bitRange>
76081                        <access>read-write</access>
76082                    </field>
76083                </fields>
76084            </register>
76085            <register>
76086                <name>DOORBELL_IN_CLR</name>
76087                <addressOffset>0x0000018c</addressOffset>
76088                <description>Check and acknowledge doorbells posted to this core. This core&#39;s doorbell interrupt is asserted when any bit in this register is 1.
76089
76090                    Write 1 to each bit to clear that bit. The doorbell interrupt deasserts once all bits are cleared. Read to get status of doorbells currently asserted on this core.</description>
76091                <resetValue>0x00000000</resetValue>
76092                <fields>
76093                    <field>
76094                        <name>DOORBELL_IN_CLR</name>
76095                        <bitRange>[7:0]</bitRange>
76096                        <access>read-write</access>
76097                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
76098                    </field>
76099                </fields>
76100            </register>
76101            <register>
76102                <name>PERI_NONSEC</name>
76103                <addressOffset>0x00000190</addressOffset>
76104                <description>Detach certain core-local peripherals from Secure SIO, and attach them to Non-secure SIO, so that Non-secure software can use them. Attempting to access one of these peripherals from the Secure SIO when it is attached to the Non-secure SIO, or vice versa, will generate a bus error.
76105
76106                    This register is per-core, and is only present on the Secure SIO.
76107
76108                    Most SIO hardware is duplicated across the Secure and Non-secure SIO, so is not listed in this register.</description>
76109                <resetValue>0x00000000</resetValue>
76110                <fields>
76111                    <field>
76112                        <name>TMDS</name>
76113                        <description>IF 1, detach TMDS encoder (of this core) from the Secure SIO, and attach to the Non-secure SIO.</description>
76114                        <bitRange>[5:5]</bitRange>
76115                        <access>read-write</access>
76116                    </field>
76117                    <field>
76118                        <name>INTERP1</name>
76119                        <description>If 1, detach interpolator 1 (of this core) from the Secure SIO, and attach to the Non-secure SIO.</description>
76120                        <bitRange>[1:1]</bitRange>
76121                        <access>read-write</access>
76122                    </field>
76123                    <field>
76124                        <name>INTERP0</name>
76125                        <description>If 1, detach interpolator 0 (of this core) from the Secure SIO, and attach to the Non-secure SIO.</description>
76126                        <bitRange>[0:0]</bitRange>
76127                        <access>read-write</access>
76128                    </field>
76129                </fields>
76130            </register>
76131            <register>
76132                <name>RISCV_SOFTIRQ</name>
76133                <addressOffset>0x000001a0</addressOffset>
76134                <description>Control the assertion of the standard software interrupt (MIP.MSIP) on the RISC-V cores.
76135
76136                    Unlike the RISC-V timer, this interrupt is not routed to a normal system-level interrupt line, so can not be used by the Arm cores.
76137
76138                    It is safe for both cores to write to this register on the same cycle. The set/clear effect is accumulated across both cores, and then applied. If a flag is both set and cleared on the same cycle, only the set takes effect.</description>
76139                <resetValue>0x00000000</resetValue>
76140                <fields>
76141                    <field>
76142                        <name>CORE1_CLR</name>
76143                        <description>Write 1 to atomically clear the core 1 software interrupt flag. Read to get the status of this flag.</description>
76144                        <bitRange>[9:9]</bitRange>
76145                        <access>read-write</access>
76146                    </field>
76147                    <field>
76148                        <name>CORE0_CLR</name>
76149                        <description>Write 1 to atomically clear the core 0 software interrupt flag. Read to get the status of this flag.</description>
76150                        <bitRange>[8:8]</bitRange>
76151                        <access>read-write</access>
76152                    </field>
76153                    <field>
76154                        <name>CORE1_SET</name>
76155                        <description>Write 1 to atomically set the core 1 software interrupt flag. Read to get the status of this flag.</description>
76156                        <bitRange>[1:1]</bitRange>
76157                        <access>read-write</access>
76158                    </field>
76159                    <field>
76160                        <name>CORE0_SET</name>
76161                        <description>Write 1 to atomically set the core 0 software interrupt flag. Read to get the status of this flag.</description>
76162                        <bitRange>[0:0]</bitRange>
76163                        <access>read-write</access>
76164                    </field>
76165                </fields>
76166            </register>
76167            <register>
76168                <name>MTIME_CTRL</name>
76169                <addressOffset>0x000001a4</addressOffset>
76170                <description>Control register for the RISC-V 64-bit Machine-mode timer. This timer is only present in the Secure SIO, so is only accessible to an Arm core in Secure mode or a RISC-V core in Machine mode.
76171
76172                    Note whilst this timer follows the RISC-V privileged specification, it is equally usable by the Arm cores. The interrupts are routed to normal system-level interrupt lines as well as to the MIP.MTIP inputs on the RISC-V cores.</description>
76173                <resetValue>0x0000000d</resetValue>
76174                <fields>
76175                    <field>
76176                        <name>DBGPAUSE_CORE1</name>
76177                        <description>If 1, the timer pauses when core 1 is in the debug halt state.</description>
76178                        <bitRange>[3:3]</bitRange>
76179                        <access>read-write</access>
76180                    </field>
76181                    <field>
76182                        <name>DBGPAUSE_CORE0</name>
76183                        <description>If 1, the timer pauses when core 0 is in the debug halt state.</description>
76184                        <bitRange>[2:2]</bitRange>
76185                        <access>read-write</access>
76186                    </field>
76187                    <field>
76188                        <name>FULLSPEED</name>
76189                        <description>If 1, increment the timer every cycle (i.e. run directly from the system clock), rather than incrementing on the system-level timer tick input.</description>
76190                        <bitRange>[1:1]</bitRange>
76191                        <access>read-write</access>
76192                    </field>
76193                    <field>
76194                        <name>EN</name>
76195                        <description>Timer enable bit. When 0, the timer will not increment automatically.</description>
76196                        <bitRange>[0:0]</bitRange>
76197                        <access>read-write</access>
76198                    </field>
76199                </fields>
76200            </register>
76201            <register>
76202                <name>MTIME</name>
76203                <addressOffset>0x000001b0</addressOffset>
76204                <description>Read/write access to the high half of RISC-V Machine-mode timer. This register is shared between both cores. If both cores write on the same cycle, core 1 takes precedence.</description>
76205                <resetValue>0x00000000</resetValue>
76206                <fields>
76207                    <field>
76208                        <name>MTIME</name>
76209                        <bitRange>[31:0]</bitRange>
76210                        <access>read-write</access>
76211                    </field>
76212                </fields>
76213            </register>
76214            <register>
76215                <name>MTIMEH</name>
76216                <addressOffset>0x000001b4</addressOffset>
76217                <description>Read/write access to the high half of RISC-V Machine-mode timer. This register is shared between both cores. If both cores write on the same cycle, core 1 takes precedence.</description>
76218                <resetValue>0x00000000</resetValue>
76219                <fields>
76220                    <field>
76221                        <name>MTIMEH</name>
76222                        <bitRange>[31:0]</bitRange>
76223                        <access>read-write</access>
76224                    </field>
76225                </fields>
76226            </register>
76227            <register>
76228                <name>MTIMECMP</name>
76229                <addressOffset>0x000001b8</addressOffset>
76230                <description>Low half of RISC-V Machine-mode timer comparator. This register is core-local, i.e., each core gets a copy of this register, with the comparison result routed to its own interrupt line.
76231
76232                    The timer interrupt is asserted whenever MTIME is greater than or equal to MTIMECMP. This comparison is unsigned, and performed on the full 64-bit values.</description>
76233                <resetValue>0xffffffff</resetValue>
76234                <fields>
76235                    <field>
76236                        <name>MTIMECMP</name>
76237                        <bitRange>[31:0]</bitRange>
76238                        <access>read-write</access>
76239                    </field>
76240                </fields>
76241            </register>
76242            <register>
76243                <name>MTIMECMPH</name>
76244                <addressOffset>0x000001bc</addressOffset>
76245                <description>High half of RISC-V Machine-mode timer comparator. This register is core-local.
76246
76247                    The timer interrupt is asserted whenever MTIME is greater than or equal to MTIMECMP. This comparison is unsigned, and performed on the full 64-bit values.</description>
76248                <resetValue>0xffffffff</resetValue>
76249                <fields>
76250                    <field>
76251                        <name>MTIMECMPH</name>
76252                        <bitRange>[31:0]</bitRange>
76253                        <access>read-write</access>
76254                    </field>
76255                </fields>
76256            </register>
76257            <register>
76258                <name>TMDS_CTRL</name>
76259                <addressOffset>0x000001c0</addressOffset>
76260                <description>Control register for TMDS encoder.</description>
76261                <resetValue>0x00000000</resetValue>
76262                <fields>
76263                    <field>
76264                        <name>CLEAR_BALANCE</name>
76265                        <description>Clear the running DC balance state of the TMDS encoders. This bit should be written once at the beginning of each scanline.</description>
76266                        <bitRange>[28:28]</bitRange>
76267                        <access>write-only</access>
76268                    </field>
76269                    <field>
76270                        <name>PIX2_NOSHIFT</name>
76271                        <description>When encoding two pixels&#39;s worth of symbols in one cycle (a read of a PEEK/POP_DOUBLE register), the second encoder sees a shifted version of the colour data register.
76272
76273                            This control disables that shift, so that both encoder layers see the same pixel data. This is used for pixel doubling.</description>
76274                        <bitRange>[27:27]</bitRange>
76275                        <access>read-write</access>
76276                    </field>
76277                    <field>
76278                        <name>PIX_SHIFT</name>
76279                        <description>Shift applied to the colour data register with each read of a POP alias register.
76280
76281                            Reading from the POP_SINGLE register, or reading from the POP_DOUBLE register with PIX2_NOSHIFT set (for pixel doubling), shifts by the indicated amount.
76282
76283                            Reading from a POP_DOUBLE register when PIX2_NOSHIFT is clear will shift by double the indicated amount. (Shift by 32 means no shift.)</description>
76284                        <bitRange>[26:24]</bitRange>
76285                        <access>read-write</access>
76286                        <enumeratedValues>
76287                            <enumeratedValue>
76288                                <name>0</name>
76289                                <value>0</value>
76290                                <description>Do not shift the colour data register.</description>
76291                            </enumeratedValue>
76292                            <enumeratedValue>
76293                                <name>1</name>
76294                                <value>1</value>
76295                                <description>Shift the colour data register by 1 bit</description>
76296                            </enumeratedValue>
76297                            <enumeratedValue>
76298                                <name>2</name>
76299                                <value>2</value>
76300                                <description>Shift the colour data register by 2 bits</description>
76301                            </enumeratedValue>
76302                            <enumeratedValue>
76303                                <name>4</name>
76304                                <value>3</value>
76305                                <description>Shift the colour data register by 4 bits</description>
76306                            </enumeratedValue>
76307                            <enumeratedValue>
76308                                <name>8</name>
76309                                <value>4</value>
76310                                <description>Shift the colour data register by 8 bits</description>
76311                            </enumeratedValue>
76312                            <enumeratedValue>
76313                                <name>16</name>
76314                                <value>5</value>
76315                                <description>Shift the colour data register by 16 bits</description>
76316                            </enumeratedValue>
76317                        </enumeratedValues>
76318                    </field>
76319                    <field>
76320                        <name>INTERLEAVE</name>
76321                        <description>Enable lane interleaving for reads of PEEK_SINGLE/POP_SINGLE.
76322
76323                            When interleaving is disabled, each of the 3 symbols appears as a contiguous 10-bit field, with lane 0 being the least-significant and starting at bit 0 of the register.
76324
76325                            When interleaving is enabled, the symbols are packed into 5 chunks of 3 lanes times 2 bits (30 bits total). Each chunk contains two bits of a TMDS symbol per lane, with lane 0 being the least significant.</description>
76326                        <bitRange>[23:23]</bitRange>
76327                        <access>read-write</access>
76328                    </field>
76329                    <field>
76330                        <name>L2_NBITS</name>
76331                        <description>Number of valid colour MSBs for lane 2 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.</description>
76332                        <bitRange>[20:18]</bitRange>
76333                        <access>read-write</access>
76334                    </field>
76335                    <field>
76336                        <name>L1_NBITS</name>
76337                        <description>Number of valid colour MSBs for lane 1 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.</description>
76338                        <bitRange>[17:15]</bitRange>
76339                        <access>read-write</access>
76340                    </field>
76341                    <field>
76342                        <name>L0_NBITS</name>
76343                        <description>Number of valid colour MSBs for lane 0 (1-8 bits, encoded as 0 through 7). Remaining LSBs are masked to 0 after the rotate.</description>
76344                        <bitRange>[14:12]</bitRange>
76345                        <access>read-write</access>
76346                    </field>
76347                    <field>
76348                        <name>L2_ROT</name>
76349                        <description>Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 2 (red) colour data aligned with the MSB of the 8-bit encoder input.
76350
76351                            For example, for RGB565 (red most significant), red is bits 15:11, so should be right-rotated by 8 bits to align with bits 7:3 of the encoder input.</description>
76352                        <bitRange>[11:8]</bitRange>
76353                        <access>read-write</access>
76354                    </field>
76355                    <field>
76356                        <name>L1_ROT</name>
76357                        <description>Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 1 (green) colour data aligned with the MSB of the 8-bit encoder input.
76358
76359                            For example, for RGB565, green is bits 10:5, so should be right-rotated by 3 bits to align with bits 7:2 of the encoder input.</description>
76360                        <bitRange>[7:4]</bitRange>
76361                        <access>read-write</access>
76362                    </field>
76363                    <field>
76364                        <name>L0_ROT</name>
76365                        <description>Right-rotate the 16 LSBs of the colour accumulator by 0-15 bits, in order to get the MSB of the lane 0 (blue) colour data aligned with the MSB of the 8-bit encoder input.
76366
76367                            For example, for RGB565 (red most significant), blue is bits 4:0, so should be right-rotated by 13 to align with bits 7:3 of the encoder input.</description>
76368                        <bitRange>[3:0]</bitRange>
76369                        <access>read-write</access>
76370                    </field>
76371                </fields>
76372            </register>
76373            <register>
76374                <name>TMDS_WDATA</name>
76375                <addressOffset>0x000001c4</addressOffset>
76376                <description>Write-only access to the TMDS colour data register.</description>
76377                <resetValue>0x00000000</resetValue>
76378                <fields>
76379                    <field>
76380                        <name>TMDS_WDATA</name>
76381                        <bitRange>[31:0]</bitRange>
76382                        <access>write-only</access>
76383                    </field>
76384                </fields>
76385            </register>
76386            <register>
76387                <name>TMDS_PEEK_SINGLE</name>
76388                <addressOffset>0x000001c8</addressOffset>
76389                <description>Get the encoding of one pixel&#39;s worth of colour data, packed into a 32-bit value (3x10-bit symbols).
76390
76391                    The PEEK alias does not shift the colour register when read, but still advances the running DC balance state of each encoder. This is useful for pixel doubling.</description>
76392                <resetValue>0x00000000</resetValue>
76393                <fields>
76394                    <field>
76395                        <name>TMDS_PEEK_SINGLE</name>
76396                        <bitRange>[31:0]</bitRange>
76397                        <access>read-only</access>
76398                        <readAction>modify</readAction>
76399                    </field>
76400                </fields>
76401            </register>
76402            <register>
76403                <name>TMDS_POP_SINGLE</name>
76404                <addressOffset>0x000001cc</addressOffset>
76405                <description>Get the encoding of one pixel&#39;s worth of colour data, packed into a 32-bit value. The packing is 5 chunks of 3 lanes times 2 bits (30 bits total). Each chunk contains two bits of a TMDS symbol per lane. This format is intended for shifting out with the HSTX peripheral on RP2350.
76406
76407                    The POP alias shifts the colour register when read, as well as advancing the running DC balance state of each encoder.</description>
76408                <resetValue>0x00000000</resetValue>
76409                <fields>
76410                    <field>
76411                        <name>TMDS_POP_SINGLE</name>
76412                        <bitRange>[31:0]</bitRange>
76413                        <access>read-only</access>
76414                        <readAction>modify</readAction>
76415                    </field>
76416                </fields>
76417            </register>
76418            <register>
76419                <name>TMDS_PEEK_DOUBLE_L0</name>
76420                <addressOffset>0x000001d0</addressOffset>
76421                <description>Get lane 0 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76422
76423                    The PEEK alias does not shift the colour register when read, but still advances the lane 0 DC balance state. This is useful if all 3 lanes&#39; worth of encode are to be read at once, rather than processing the entire scanline for one lane before moving to the next lane.</description>
76424                <resetValue>0x00000000</resetValue>
76425                <fields>
76426                    <field>
76427                        <name>TMDS_PEEK_DOUBLE_L0</name>
76428                        <bitRange>[31:0]</bitRange>
76429                        <access>read-only</access>
76430                        <readAction>modify</readAction>
76431                    </field>
76432                </fields>
76433            </register>
76434            <register>
76435                <name>TMDS_POP_DOUBLE_L0</name>
76436                <addressOffset>0x000001d4</addressOffset>
76437                <description>Get lane 0 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76438
76439                    The POP alias shifts the colour register when read, according to the values of PIX_SHIFT and PIX2_NOSHIFT.</description>
76440                <resetValue>0x00000000</resetValue>
76441                <fields>
76442                    <field>
76443                        <name>TMDS_POP_DOUBLE_L0</name>
76444                        <bitRange>[31:0]</bitRange>
76445                        <access>read-only</access>
76446                        <readAction>modify</readAction>
76447                    </field>
76448                </fields>
76449            </register>
76450            <register>
76451                <name>TMDS_PEEK_DOUBLE_L1</name>
76452                <addressOffset>0x000001d8</addressOffset>
76453                <description>Get lane 1 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76454
76455                    The PEEK alias does not shift the colour register when read, but still advances the lane 1 DC balance state. This is useful if all 3 lanes&#39; worth of encode are to be read at once, rather than processing the entire scanline for one lane before moving to the next lane.</description>
76456                <resetValue>0x00000000</resetValue>
76457                <fields>
76458                    <field>
76459                        <name>TMDS_PEEK_DOUBLE_L1</name>
76460                        <bitRange>[31:0]</bitRange>
76461                        <access>read-only</access>
76462                        <readAction>modify</readAction>
76463                    </field>
76464                </fields>
76465            </register>
76466            <register>
76467                <name>TMDS_POP_DOUBLE_L1</name>
76468                <addressOffset>0x000001dc</addressOffset>
76469                <description>Get lane 1 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76470
76471                    The POP alias shifts the colour register when read, according to the values of PIX_SHIFT and PIX2_NOSHIFT.</description>
76472                <resetValue>0x00000000</resetValue>
76473                <fields>
76474                    <field>
76475                        <name>TMDS_POP_DOUBLE_L1</name>
76476                        <bitRange>[31:0]</bitRange>
76477                        <access>read-only</access>
76478                        <readAction>modify</readAction>
76479                    </field>
76480                </fields>
76481            </register>
76482            <register>
76483                <name>TMDS_PEEK_DOUBLE_L2</name>
76484                <addressOffset>0x000001e0</addressOffset>
76485                <description>Get lane 2 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76486
76487                    The PEEK alias does not shift the colour register when read, but still advances the lane 2 DC balance state. This is useful if all 3 lanes&#39; worth of encode are to be read at once, rather than processing the entire scanline for one lane before moving to the next lane.</description>
76488                <resetValue>0x00000000</resetValue>
76489                <fields>
76490                    <field>
76491                        <name>TMDS_PEEK_DOUBLE_L2</name>
76492                        <bitRange>[31:0]</bitRange>
76493                        <access>read-only</access>
76494                        <readAction>modify</readAction>
76495                    </field>
76496                </fields>
76497            </register>
76498            <register>
76499                <name>TMDS_POP_DOUBLE_L2</name>
76500                <addressOffset>0x000001e4</addressOffset>
76501                <description>Get lane 2 of the encoding of two pixels&#39; worth of colour data. Two 10-bit TMDS symbols are packed at the bottom of a 32-bit word.
76502
76503                    The POP alias shifts the colour register when read, according to the values of PIX_SHIFT and PIX2_NOSHIFT.</description>
76504                <resetValue>0x00000000</resetValue>
76505                <fields>
76506                    <field>
76507                        <name>TMDS_POP_DOUBLE_L2</name>
76508                        <bitRange>[31:0]</bitRange>
76509                        <access>read-only</access>
76510                        <readAction>modify</readAction>
76511                    </field>
76512                </fields>
76513            </register>
76514        </registers>
76515    </peripheral>
76516    <peripheral derivedFrom="SIO">
76517        <name>SIO_NS</name>
76518        <baseAddress>0xd0020000</baseAddress>
76519    </peripheral>
76520    <peripheral>
76521        <name>BOOTRAM</name>
76522        <description>Additional registers mapped adjacent to the bootram, for use by the bootrom.</description>
76523        <baseAddress>0x400e0000</baseAddress>
76524        <addressBlock>
76525            <offset>0</offset>
76526            <size>2092</size>
76527            <usage>registers</usage>
76528        </addressBlock>
76529        <registers>
76530            <register>
76531                <name>WRITE_ONCE0</name>
76532                <addressOffset>0x00000800</addressOffset>
76533                <description>This registers always ORs writes into its current contents. Once a bit is set, it can only be cleared by a reset.</description>
76534                <resetValue>0x00000000</resetValue>
76535                <fields>
76536                    <field>
76537                        <name>WRITE_ONCE0</name>
76538                        <bitRange>[31:0]</bitRange>
76539                        <access>read-write</access>
76540                    </field>
76541                </fields>
76542            </register>
76543            <register>
76544                <name>WRITE_ONCE1</name>
76545                <addressOffset>0x00000804</addressOffset>
76546                <description>This registers always ORs writes into its current contents. Once a bit is set, it can only be cleared by a reset.</description>
76547                <resetValue>0x00000000</resetValue>
76548                <fields>
76549                    <field>
76550                        <name>WRITE_ONCE1</name>
76551                        <bitRange>[31:0]</bitRange>
76552                        <access>read-write</access>
76553                    </field>
76554                </fields>
76555            </register>
76556            <register>
76557                <name>BOOTLOCK_STAT</name>
76558                <addressOffset>0x00000808</addressOffset>
76559                <description>Bootlock status register. 1=unclaimed, 0=claimed. These locks function identically to the SIO spinlocks, but are reserved for bootrom use.</description>
76560                <resetValue>0x000000ff</resetValue>
76561                <fields>
76562                    <field>
76563                        <name>BOOTLOCK_STAT</name>
76564                        <bitRange>[7:0]</bitRange>
76565                        <access>read-write</access>
76566                    </field>
76567                </fields>
76568            </register>
76569            <register>
76570                <name>BOOTLOCK0</name>
76571                <addressOffset>0x0000080c</addressOffset>
76572                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76573                <resetValue>0x00000000</resetValue>
76574                <fields>
76575                    <field>
76576                        <name>BOOTLOCK0</name>
76577                        <bitRange>[31:0]</bitRange>
76578                        <access>read-write</access>
76579                    </field>
76580                </fields>
76581            </register>
76582            <register>
76583                <name>BOOTLOCK1</name>
76584                <addressOffset>0x00000810</addressOffset>
76585                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76586                <resetValue>0x00000000</resetValue>
76587                <fields>
76588                    <field>
76589                        <name>BOOTLOCK1</name>
76590                        <bitRange>[31:0]</bitRange>
76591                        <access>read-write</access>
76592                    </field>
76593                </fields>
76594            </register>
76595            <register>
76596                <name>BOOTLOCK2</name>
76597                <addressOffset>0x00000814</addressOffset>
76598                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76599                <resetValue>0x00000000</resetValue>
76600                <fields>
76601                    <field>
76602                        <name>BOOTLOCK2</name>
76603                        <bitRange>[31:0]</bitRange>
76604                        <access>read-write</access>
76605                    </field>
76606                </fields>
76607            </register>
76608            <register>
76609                <name>BOOTLOCK3</name>
76610                <addressOffset>0x00000818</addressOffset>
76611                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76612                <resetValue>0x00000000</resetValue>
76613                <fields>
76614                    <field>
76615                        <name>BOOTLOCK3</name>
76616                        <bitRange>[31:0]</bitRange>
76617                        <access>read-write</access>
76618                    </field>
76619                </fields>
76620            </register>
76621            <register>
76622                <name>BOOTLOCK4</name>
76623                <addressOffset>0x0000081c</addressOffset>
76624                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76625                <resetValue>0x00000000</resetValue>
76626                <fields>
76627                    <field>
76628                        <name>BOOTLOCK4</name>
76629                        <bitRange>[31:0]</bitRange>
76630                        <access>read-write</access>
76631                    </field>
76632                </fields>
76633            </register>
76634            <register>
76635                <name>BOOTLOCK5</name>
76636                <addressOffset>0x00000820</addressOffset>
76637                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76638                <resetValue>0x00000000</resetValue>
76639                <fields>
76640                    <field>
76641                        <name>BOOTLOCK5</name>
76642                        <bitRange>[31:0]</bitRange>
76643                        <access>read-write</access>
76644                    </field>
76645                </fields>
76646            </register>
76647            <register>
76648                <name>BOOTLOCK6</name>
76649                <addressOffset>0x00000824</addressOffset>
76650                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76651                <resetValue>0x00000000</resetValue>
76652                <fields>
76653                    <field>
76654                        <name>BOOTLOCK6</name>
76655                        <bitRange>[31:0]</bitRange>
76656                        <access>read-write</access>
76657                    </field>
76658                </fields>
76659            </register>
76660            <register>
76661                <name>BOOTLOCK7</name>
76662                <addressOffset>0x00000828</addressOffset>
76663                <description>Read to claim and check. Write to unclaim. The value returned on successful claim is 1 &lt;&lt; n, and on failed claim is zero.</description>
76664                <resetValue>0x00000000</resetValue>
76665                <fields>
76666                    <field>
76667                        <name>BOOTLOCK7</name>
76668                        <bitRange>[31:0]</bitRange>
76669                        <access>read-write</access>
76670                    </field>
76671                </fields>
76672            </register>
76673        </registers>
76674    </peripheral>
76675    <peripheral>
76676        <name>CORESIGHT_TRACE</name>
76677        <description>Coresight block - RP specific registers</description>
76678        <baseAddress>0x50700000</baseAddress>
76679        <addressBlock>
76680            <offset>0</offset>
76681            <size>8</size>
76682            <usage>registers</usage>
76683        </addressBlock>
76684        <registers>
76685            <register>
76686                <name>CTRL_STATUS</name>
76687                <addressOffset>0x00000000</addressOffset>
76688                <description>Control and status register</description>
76689                <resetValue>0x00000001</resetValue>
76690                <fields>
76691                    <field>
76692                        <name>TRACE_CAPTURE_FIFO_OVERFLOW</name>
76693                        <description>This status flag is set high when trace data has been dropped due to the FIFO being full at the point trace data was sampled. Write 1 to acknowledge and clear the bit.</description>
76694                        <bitRange>[1:1]</bitRange>
76695                        <access>read-write</access>
76696                    </field>
76697                    <field>
76698                        <name>TRACE_CAPTURE_FIFO_FLUSH</name>
76699                        <description>Set to 1 to continuously hold the trace FIFO in a flushed state and prevent overflow.
76700
76701                            Before clearing this flag, configure and start a DMA channel with the correct DREQ for the TRACE_CAPTURE_FIFO register.
76702
76703                            Clear this flag to begin sampling trace data, and set once again once the trace capture buffer is full. You must configure the TPIU in order to generate trace packets to be captured, as well as components like the ETM further upstream to generate the event stream propagated to the TPIU.</description>
76704                        <bitRange>[0:0]</bitRange>
76705                        <access>read-write</access>
76706                    </field>
76707                </fields>
76708            </register>
76709            <register>
76710                <name>TRACE_CAPTURE_FIFO</name>
76711                <addressOffset>0x00000004</addressOffset>
76712                <description>FIFO for trace data captured from the TPIU</description>
76713                <resetValue>0x00000000</resetValue>
76714                <fields>
76715                    <field>
76716                        <name>RDATA</name>
76717                        <description>Read from an 8 x 32-bit FIFO containing trace data captured from the TPIU.
76718
76719                            Hardware pushes to the FIFO on rising edges of clk_sys, when either of the following is true:
76720
76721                            * TPIU TRACECTL output is low (normal trace data)
76722
76723                            * TPIU TRACETCL output is high, and TPIU TRACEDATA0 and TRACEDATA1 are both low (trigger packet)
76724
76725                            These conditions are in accordance with Arm Coresight Architecture Spec v3.0 section D3.3.3: Decoding requirements for Trace Capture Devices
76726
76727                            The data captured into the FIFO is the full 32-bit TRACEDATA bus output by the TPIU. Note that the TPIU is a DDR output at half of clk_sys, therefore this interface can capture the full 32-bit TPIU DDR output bandwidth as it samples once per active edge of the TPIU output clock.</description>
76728                        <bitRange>[31:0]</bitRange>
76729                        <access>read-only</access>
76730                        <readAction>modify</readAction>
76731                    </field>
76732                </fields>
76733            </register>
76734        </registers>
76735    </peripheral>
76736    <peripheral>
76737        <name>USB</name>
76738        <description>USB FS/LS controller device registers</description>
76739        <baseAddress>0x50110000</baseAddress>
76740        <addressBlock>
76741            <offset>0</offset>
76742            <size>280</size>
76743            <usage>registers</usage>
76744        </addressBlock>
76745        <interrupt>
76746            <name>USBCTRL_IRQ</name>
76747            <value>14</value>
76748        </interrupt>
76749        <registers>
76750            <register>
76751                <name>ADDR_ENDP</name>
76752                <addressOffset>0x00000000</addressOffset>
76753                <description>Device address and endpoint control</description>
76754                <resetValue>0x00000000</resetValue>
76755                <fields>
76756                    <field>
76757                        <name>ENDPOINT</name>
76758                        <description>Device endpoint to send data to. Only valid for HOST mode.</description>
76759                        <bitRange>[19:16]</bitRange>
76760                        <access>read-write</access>
76761                    </field>
76762                    <field>
76763                        <name>ADDRESS</name>
76764                        <description>In device mode, the address that the device should respond to. Set in response to a SET_ADDR setup packet from the host. In host mode set to the address of the device to communicate with.</description>
76765                        <bitRange>[6:0]</bitRange>
76766                        <access>read-write</access>
76767                    </field>
76768                </fields>
76769            </register>
76770            <register>
76771                <name>ADDR_ENDP1</name>
76772                <addressOffset>0x00000004</addressOffset>
76773                <description>Interrupt endpoint 1. Only valid for HOST mode.</description>
76774                <resetValue>0x00000000</resetValue>
76775                <fields>
76776                    <field>
76777                        <name>INTEP_PREAMBLE</name>
76778                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76779                        <bitRange>[26:26]</bitRange>
76780                        <access>read-write</access>
76781                    </field>
76782                    <field>
76783                        <name>INTEP_DIR</name>
76784                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76785                        <bitRange>[25:25]</bitRange>
76786                        <access>read-write</access>
76787                    </field>
76788                    <field>
76789                        <name>ENDPOINT</name>
76790                        <description>Endpoint number of the interrupt endpoint</description>
76791                        <bitRange>[19:16]</bitRange>
76792                        <access>read-write</access>
76793                    </field>
76794                    <field>
76795                        <name>ADDRESS</name>
76796                        <description>Device address</description>
76797                        <bitRange>[6:0]</bitRange>
76798                        <access>read-write</access>
76799                    </field>
76800                </fields>
76801            </register>
76802            <register>
76803                <name>ADDR_ENDP2</name>
76804                <addressOffset>0x00000008</addressOffset>
76805                <description>Interrupt endpoint 2. Only valid for HOST mode.</description>
76806                <resetValue>0x00000000</resetValue>
76807                <fields>
76808                    <field>
76809                        <name>INTEP_PREAMBLE</name>
76810                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76811                        <bitRange>[26:26]</bitRange>
76812                        <access>read-write</access>
76813                    </field>
76814                    <field>
76815                        <name>INTEP_DIR</name>
76816                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76817                        <bitRange>[25:25]</bitRange>
76818                        <access>read-write</access>
76819                    </field>
76820                    <field>
76821                        <name>ENDPOINT</name>
76822                        <description>Endpoint number of the interrupt endpoint</description>
76823                        <bitRange>[19:16]</bitRange>
76824                        <access>read-write</access>
76825                    </field>
76826                    <field>
76827                        <name>ADDRESS</name>
76828                        <description>Device address</description>
76829                        <bitRange>[6:0]</bitRange>
76830                        <access>read-write</access>
76831                    </field>
76832                </fields>
76833            </register>
76834            <register>
76835                <name>ADDR_ENDP3</name>
76836                <addressOffset>0x0000000c</addressOffset>
76837                <description>Interrupt endpoint 3. Only valid for HOST mode.</description>
76838                <resetValue>0x00000000</resetValue>
76839                <fields>
76840                    <field>
76841                        <name>INTEP_PREAMBLE</name>
76842                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76843                        <bitRange>[26:26]</bitRange>
76844                        <access>read-write</access>
76845                    </field>
76846                    <field>
76847                        <name>INTEP_DIR</name>
76848                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76849                        <bitRange>[25:25]</bitRange>
76850                        <access>read-write</access>
76851                    </field>
76852                    <field>
76853                        <name>ENDPOINT</name>
76854                        <description>Endpoint number of the interrupt endpoint</description>
76855                        <bitRange>[19:16]</bitRange>
76856                        <access>read-write</access>
76857                    </field>
76858                    <field>
76859                        <name>ADDRESS</name>
76860                        <description>Device address</description>
76861                        <bitRange>[6:0]</bitRange>
76862                        <access>read-write</access>
76863                    </field>
76864                </fields>
76865            </register>
76866            <register>
76867                <name>ADDR_ENDP4</name>
76868                <addressOffset>0x00000010</addressOffset>
76869                <description>Interrupt endpoint 4. Only valid for HOST mode.</description>
76870                <resetValue>0x00000000</resetValue>
76871                <fields>
76872                    <field>
76873                        <name>INTEP_PREAMBLE</name>
76874                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76875                        <bitRange>[26:26]</bitRange>
76876                        <access>read-write</access>
76877                    </field>
76878                    <field>
76879                        <name>INTEP_DIR</name>
76880                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76881                        <bitRange>[25:25]</bitRange>
76882                        <access>read-write</access>
76883                    </field>
76884                    <field>
76885                        <name>ENDPOINT</name>
76886                        <description>Endpoint number of the interrupt endpoint</description>
76887                        <bitRange>[19:16]</bitRange>
76888                        <access>read-write</access>
76889                    </field>
76890                    <field>
76891                        <name>ADDRESS</name>
76892                        <description>Device address</description>
76893                        <bitRange>[6:0]</bitRange>
76894                        <access>read-write</access>
76895                    </field>
76896                </fields>
76897            </register>
76898            <register>
76899                <name>ADDR_ENDP5</name>
76900                <addressOffset>0x00000014</addressOffset>
76901                <description>Interrupt endpoint 5. Only valid for HOST mode.</description>
76902                <resetValue>0x00000000</resetValue>
76903                <fields>
76904                    <field>
76905                        <name>INTEP_PREAMBLE</name>
76906                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76907                        <bitRange>[26:26]</bitRange>
76908                        <access>read-write</access>
76909                    </field>
76910                    <field>
76911                        <name>INTEP_DIR</name>
76912                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76913                        <bitRange>[25:25]</bitRange>
76914                        <access>read-write</access>
76915                    </field>
76916                    <field>
76917                        <name>ENDPOINT</name>
76918                        <description>Endpoint number of the interrupt endpoint</description>
76919                        <bitRange>[19:16]</bitRange>
76920                        <access>read-write</access>
76921                    </field>
76922                    <field>
76923                        <name>ADDRESS</name>
76924                        <description>Device address</description>
76925                        <bitRange>[6:0]</bitRange>
76926                        <access>read-write</access>
76927                    </field>
76928                </fields>
76929            </register>
76930            <register>
76931                <name>ADDR_ENDP6</name>
76932                <addressOffset>0x00000018</addressOffset>
76933                <description>Interrupt endpoint 6. Only valid for HOST mode.</description>
76934                <resetValue>0x00000000</resetValue>
76935                <fields>
76936                    <field>
76937                        <name>INTEP_PREAMBLE</name>
76938                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76939                        <bitRange>[26:26]</bitRange>
76940                        <access>read-write</access>
76941                    </field>
76942                    <field>
76943                        <name>INTEP_DIR</name>
76944                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76945                        <bitRange>[25:25]</bitRange>
76946                        <access>read-write</access>
76947                    </field>
76948                    <field>
76949                        <name>ENDPOINT</name>
76950                        <description>Endpoint number of the interrupt endpoint</description>
76951                        <bitRange>[19:16]</bitRange>
76952                        <access>read-write</access>
76953                    </field>
76954                    <field>
76955                        <name>ADDRESS</name>
76956                        <description>Device address</description>
76957                        <bitRange>[6:0]</bitRange>
76958                        <access>read-write</access>
76959                    </field>
76960                </fields>
76961            </register>
76962            <register>
76963                <name>ADDR_ENDP7</name>
76964                <addressOffset>0x0000001c</addressOffset>
76965                <description>Interrupt endpoint 7. Only valid for HOST mode.</description>
76966                <resetValue>0x00000000</resetValue>
76967                <fields>
76968                    <field>
76969                        <name>INTEP_PREAMBLE</name>
76970                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
76971                        <bitRange>[26:26]</bitRange>
76972                        <access>read-write</access>
76973                    </field>
76974                    <field>
76975                        <name>INTEP_DIR</name>
76976                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
76977                        <bitRange>[25:25]</bitRange>
76978                        <access>read-write</access>
76979                    </field>
76980                    <field>
76981                        <name>ENDPOINT</name>
76982                        <description>Endpoint number of the interrupt endpoint</description>
76983                        <bitRange>[19:16]</bitRange>
76984                        <access>read-write</access>
76985                    </field>
76986                    <field>
76987                        <name>ADDRESS</name>
76988                        <description>Device address</description>
76989                        <bitRange>[6:0]</bitRange>
76990                        <access>read-write</access>
76991                    </field>
76992                </fields>
76993            </register>
76994            <register>
76995                <name>ADDR_ENDP8</name>
76996                <addressOffset>0x00000020</addressOffset>
76997                <description>Interrupt endpoint 8. Only valid for HOST mode.</description>
76998                <resetValue>0x00000000</resetValue>
76999                <fields>
77000                    <field>
77001                        <name>INTEP_PREAMBLE</name>
77002                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77003                        <bitRange>[26:26]</bitRange>
77004                        <access>read-write</access>
77005                    </field>
77006                    <field>
77007                        <name>INTEP_DIR</name>
77008                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77009                        <bitRange>[25:25]</bitRange>
77010                        <access>read-write</access>
77011                    </field>
77012                    <field>
77013                        <name>ENDPOINT</name>
77014                        <description>Endpoint number of the interrupt endpoint</description>
77015                        <bitRange>[19:16]</bitRange>
77016                        <access>read-write</access>
77017                    </field>
77018                    <field>
77019                        <name>ADDRESS</name>
77020                        <description>Device address</description>
77021                        <bitRange>[6:0]</bitRange>
77022                        <access>read-write</access>
77023                    </field>
77024                </fields>
77025            </register>
77026            <register>
77027                <name>ADDR_ENDP9</name>
77028                <addressOffset>0x00000024</addressOffset>
77029                <description>Interrupt endpoint 9. Only valid for HOST mode.</description>
77030                <resetValue>0x00000000</resetValue>
77031                <fields>
77032                    <field>
77033                        <name>INTEP_PREAMBLE</name>
77034                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77035                        <bitRange>[26:26]</bitRange>
77036                        <access>read-write</access>
77037                    </field>
77038                    <field>
77039                        <name>INTEP_DIR</name>
77040                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77041                        <bitRange>[25:25]</bitRange>
77042                        <access>read-write</access>
77043                    </field>
77044                    <field>
77045                        <name>ENDPOINT</name>
77046                        <description>Endpoint number of the interrupt endpoint</description>
77047                        <bitRange>[19:16]</bitRange>
77048                        <access>read-write</access>
77049                    </field>
77050                    <field>
77051                        <name>ADDRESS</name>
77052                        <description>Device address</description>
77053                        <bitRange>[6:0]</bitRange>
77054                        <access>read-write</access>
77055                    </field>
77056                </fields>
77057            </register>
77058            <register>
77059                <name>ADDR_ENDP10</name>
77060                <addressOffset>0x00000028</addressOffset>
77061                <description>Interrupt endpoint 10. Only valid for HOST mode.</description>
77062                <resetValue>0x00000000</resetValue>
77063                <fields>
77064                    <field>
77065                        <name>INTEP_PREAMBLE</name>
77066                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77067                        <bitRange>[26:26]</bitRange>
77068                        <access>read-write</access>
77069                    </field>
77070                    <field>
77071                        <name>INTEP_DIR</name>
77072                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77073                        <bitRange>[25:25]</bitRange>
77074                        <access>read-write</access>
77075                    </field>
77076                    <field>
77077                        <name>ENDPOINT</name>
77078                        <description>Endpoint number of the interrupt endpoint</description>
77079                        <bitRange>[19:16]</bitRange>
77080                        <access>read-write</access>
77081                    </field>
77082                    <field>
77083                        <name>ADDRESS</name>
77084                        <description>Device address</description>
77085                        <bitRange>[6:0]</bitRange>
77086                        <access>read-write</access>
77087                    </field>
77088                </fields>
77089            </register>
77090            <register>
77091                <name>ADDR_ENDP11</name>
77092                <addressOffset>0x0000002c</addressOffset>
77093                <description>Interrupt endpoint 11. Only valid for HOST mode.</description>
77094                <resetValue>0x00000000</resetValue>
77095                <fields>
77096                    <field>
77097                        <name>INTEP_PREAMBLE</name>
77098                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77099                        <bitRange>[26:26]</bitRange>
77100                        <access>read-write</access>
77101                    </field>
77102                    <field>
77103                        <name>INTEP_DIR</name>
77104                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77105                        <bitRange>[25:25]</bitRange>
77106                        <access>read-write</access>
77107                    </field>
77108                    <field>
77109                        <name>ENDPOINT</name>
77110                        <description>Endpoint number of the interrupt endpoint</description>
77111                        <bitRange>[19:16]</bitRange>
77112                        <access>read-write</access>
77113                    </field>
77114                    <field>
77115                        <name>ADDRESS</name>
77116                        <description>Device address</description>
77117                        <bitRange>[6:0]</bitRange>
77118                        <access>read-write</access>
77119                    </field>
77120                </fields>
77121            </register>
77122            <register>
77123                <name>ADDR_ENDP12</name>
77124                <addressOffset>0x00000030</addressOffset>
77125                <description>Interrupt endpoint 12. Only valid for HOST mode.</description>
77126                <resetValue>0x00000000</resetValue>
77127                <fields>
77128                    <field>
77129                        <name>INTEP_PREAMBLE</name>
77130                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77131                        <bitRange>[26:26]</bitRange>
77132                        <access>read-write</access>
77133                    </field>
77134                    <field>
77135                        <name>INTEP_DIR</name>
77136                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77137                        <bitRange>[25:25]</bitRange>
77138                        <access>read-write</access>
77139                    </field>
77140                    <field>
77141                        <name>ENDPOINT</name>
77142                        <description>Endpoint number of the interrupt endpoint</description>
77143                        <bitRange>[19:16]</bitRange>
77144                        <access>read-write</access>
77145                    </field>
77146                    <field>
77147                        <name>ADDRESS</name>
77148                        <description>Device address</description>
77149                        <bitRange>[6:0]</bitRange>
77150                        <access>read-write</access>
77151                    </field>
77152                </fields>
77153            </register>
77154            <register>
77155                <name>ADDR_ENDP13</name>
77156                <addressOffset>0x00000034</addressOffset>
77157                <description>Interrupt endpoint 13. Only valid for HOST mode.</description>
77158                <resetValue>0x00000000</resetValue>
77159                <fields>
77160                    <field>
77161                        <name>INTEP_PREAMBLE</name>
77162                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77163                        <bitRange>[26:26]</bitRange>
77164                        <access>read-write</access>
77165                    </field>
77166                    <field>
77167                        <name>INTEP_DIR</name>
77168                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77169                        <bitRange>[25:25]</bitRange>
77170                        <access>read-write</access>
77171                    </field>
77172                    <field>
77173                        <name>ENDPOINT</name>
77174                        <description>Endpoint number of the interrupt endpoint</description>
77175                        <bitRange>[19:16]</bitRange>
77176                        <access>read-write</access>
77177                    </field>
77178                    <field>
77179                        <name>ADDRESS</name>
77180                        <description>Device address</description>
77181                        <bitRange>[6:0]</bitRange>
77182                        <access>read-write</access>
77183                    </field>
77184                </fields>
77185            </register>
77186            <register>
77187                <name>ADDR_ENDP14</name>
77188                <addressOffset>0x00000038</addressOffset>
77189                <description>Interrupt endpoint 14. Only valid for HOST mode.</description>
77190                <resetValue>0x00000000</resetValue>
77191                <fields>
77192                    <field>
77193                        <name>INTEP_PREAMBLE</name>
77194                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77195                        <bitRange>[26:26]</bitRange>
77196                        <access>read-write</access>
77197                    </field>
77198                    <field>
77199                        <name>INTEP_DIR</name>
77200                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77201                        <bitRange>[25:25]</bitRange>
77202                        <access>read-write</access>
77203                    </field>
77204                    <field>
77205                        <name>ENDPOINT</name>
77206                        <description>Endpoint number of the interrupt endpoint</description>
77207                        <bitRange>[19:16]</bitRange>
77208                        <access>read-write</access>
77209                    </field>
77210                    <field>
77211                        <name>ADDRESS</name>
77212                        <description>Device address</description>
77213                        <bitRange>[6:0]</bitRange>
77214                        <access>read-write</access>
77215                    </field>
77216                </fields>
77217            </register>
77218            <register>
77219                <name>ADDR_ENDP15</name>
77220                <addressOffset>0x0000003c</addressOffset>
77221                <description>Interrupt endpoint 15. Only valid for HOST mode.</description>
77222                <resetValue>0x00000000</resetValue>
77223                <fields>
77224                    <field>
77225                        <name>INTEP_PREAMBLE</name>
77226                        <description>Interrupt EP requires preamble (is a low speed device on a full speed hub)</description>
77227                        <bitRange>[26:26]</bitRange>
77228                        <access>read-write</access>
77229                    </field>
77230                    <field>
77231                        <name>INTEP_DIR</name>
77232                        <description>Direction of the interrupt endpoint. In=0, Out=1</description>
77233                        <bitRange>[25:25]</bitRange>
77234                        <access>read-write</access>
77235                    </field>
77236                    <field>
77237                        <name>ENDPOINT</name>
77238                        <description>Endpoint number of the interrupt endpoint</description>
77239                        <bitRange>[19:16]</bitRange>
77240                        <access>read-write</access>
77241                    </field>
77242                    <field>
77243                        <name>ADDRESS</name>
77244                        <description>Device address</description>
77245                        <bitRange>[6:0]</bitRange>
77246                        <access>read-write</access>
77247                    </field>
77248                </fields>
77249            </register>
77250            <register>
77251                <name>MAIN_CTRL</name>
77252                <addressOffset>0x00000040</addressOffset>
77253                <description>Main control register</description>
77254                <resetValue>0x00000004</resetValue>
77255                <fields>
77256                    <field>
77257                        <name>SIM_TIMING</name>
77258                        <description>Reduced timings for simulation</description>
77259                        <bitRange>[31:31]</bitRange>
77260                        <access>read-write</access>
77261                    </field>
77262                    <field>
77263                        <name>PHY_ISO</name>
77264                        <description>Isolates USB phy after controller power-up
77265                            Remove isolation once software has configured the controller
77266                            Not isolated = 0, Isolated = 1</description>
77267                        <bitRange>[2:2]</bitRange>
77268                        <access>read-write</access>
77269                    </field>
77270                    <field>
77271                        <name>HOST_NDEVICE</name>
77272                        <description>Device mode = 0, Host mode = 1</description>
77273                        <bitRange>[1:1]</bitRange>
77274                        <access>read-write</access>
77275                    </field>
77276                    <field>
77277                        <name>CONTROLLER_EN</name>
77278                        <description>Enable controller</description>
77279                        <bitRange>[0:0]</bitRange>
77280                        <access>read-write</access>
77281                    </field>
77282                </fields>
77283            </register>
77284            <register>
77285                <name>SOF_WR</name>
77286                <addressOffset>0x00000044</addressOffset>
77287                <description>Set the SOF (Start of Frame) frame number in the host controller. The SOF packet is sent every 1ms and the host will increment the frame number by 1 each time.</description>
77288                <resetValue>0x00000000</resetValue>
77289                <fields>
77290                    <field>
77291                        <name>COUNT</name>
77292                        <bitRange>[10:0]</bitRange>
77293                        <access>write-only</access>
77294                    </field>
77295                </fields>
77296            </register>
77297            <register>
77298                <name>SOF_RD</name>
77299                <addressOffset>0x00000048</addressOffset>
77300                <description>Read the last SOF (Start of Frame) frame number seen. In device mode the last SOF received from the host. In host mode the last SOF sent by the host.</description>
77301                <resetValue>0x00000000</resetValue>
77302                <fields>
77303                    <field>
77304                        <name>COUNT</name>
77305                        <bitRange>[10:0]</bitRange>
77306                        <access>read-only</access>
77307                    </field>
77308                </fields>
77309            </register>
77310            <register>
77311                <name>SIE_CTRL</name>
77312                <addressOffset>0x0000004c</addressOffset>
77313                <description>SIE control register</description>
77314                <resetValue>0x00008000</resetValue>
77315                <fields>
77316                    <field>
77317                        <name>EP0_INT_STALL</name>
77318                        <description>Device: Set bit in EP_STATUS_STALL_NAK when EP0 sends a STALL</description>
77319                        <bitRange>[31:31]</bitRange>
77320                        <access>read-write</access>
77321                    </field>
77322                    <field>
77323                        <name>EP0_DOUBLE_BUF</name>
77324                        <description>Device: EP0 single buffered = 0, double buffered = 1</description>
77325                        <bitRange>[30:30]</bitRange>
77326                        <access>read-write</access>
77327                    </field>
77328                    <field>
77329                        <name>EP0_INT_1BUF</name>
77330                        <description>Device: Set bit in BUFF_STATUS for every buffer completed on EP0</description>
77331                        <bitRange>[29:29]</bitRange>
77332                        <access>read-write</access>
77333                    </field>
77334                    <field>
77335                        <name>EP0_INT_2BUF</name>
77336                        <description>Device: Set bit in BUFF_STATUS for every 2 buffers completed on EP0</description>
77337                        <bitRange>[28:28]</bitRange>
77338                        <access>read-write</access>
77339                    </field>
77340                    <field>
77341                        <name>EP0_INT_NAK</name>
77342                        <description>Device: Set bit in EP_STATUS_STALL_NAK when EP0 sends a NAK</description>
77343                        <bitRange>[27:27]</bitRange>
77344                        <access>read-write</access>
77345                    </field>
77346                    <field>
77347                        <name>DIRECT_EN</name>
77348                        <description>Direct bus drive enable</description>
77349                        <bitRange>[26:26]</bitRange>
77350                        <access>read-write</access>
77351                    </field>
77352                    <field>
77353                        <name>DIRECT_DP</name>
77354                        <description>Direct control of DP</description>
77355                        <bitRange>[25:25]</bitRange>
77356                        <access>read-write</access>
77357                    </field>
77358                    <field>
77359                        <name>DIRECT_DM</name>
77360                        <description>Direct control of DM</description>
77361                        <bitRange>[24:24]</bitRange>
77362                        <access>read-write</access>
77363                    </field>
77364                    <field>
77365                        <name>EP0_STOP_ON_SHORT_PACKET</name>
77366                        <description>Device: Stop EP0 on a short packet.</description>
77367                        <bitRange>[19:19]</bitRange>
77368                        <access>read-write</access>
77369                    </field>
77370                    <field>
77371                        <name>TRANSCEIVER_PD</name>
77372                        <description>Power down bus transceiver</description>
77373                        <bitRange>[18:18]</bitRange>
77374                        <access>read-write</access>
77375                    </field>
77376                    <field>
77377                        <name>RPU_OPT</name>
77378                        <description>Device: Pull-up strength (0=1K2, 1=2k3)</description>
77379                        <bitRange>[17:17]</bitRange>
77380                        <access>read-write</access>
77381                    </field>
77382                    <field>
77383                        <name>PULLUP_EN</name>
77384                        <description>Device: Enable pull up resistor</description>
77385                        <bitRange>[16:16]</bitRange>
77386                        <access>read-write</access>
77387                    </field>
77388                    <field>
77389                        <name>PULLDOWN_EN</name>
77390                        <description>Host: Enable pull down resistors</description>
77391                        <bitRange>[15:15]</bitRange>
77392                        <access>read-write</access>
77393                    </field>
77394                    <field>
77395                        <name>RESET_BUS</name>
77396                        <description>Host: Reset bus</description>
77397                        <bitRange>[13:13]</bitRange>
77398                        <access>write-only</access>
77399                    </field>
77400                    <field>
77401                        <name>RESUME</name>
77402                        <description>Device: Remote wakeup. Device can initiate its own resume after suspend.</description>
77403                        <bitRange>[12:12]</bitRange>
77404                        <access>write-only</access>
77405                    </field>
77406                    <field>
77407                        <name>VBUS_EN</name>
77408                        <description>Host: Enable VBUS</description>
77409                        <bitRange>[11:11]</bitRange>
77410                        <access>read-write</access>
77411                    </field>
77412                    <field>
77413                        <name>KEEP_ALIVE_EN</name>
77414                        <description>Host: Enable keep alive packet (for low speed bus)</description>
77415                        <bitRange>[10:10]</bitRange>
77416                        <access>read-write</access>
77417                    </field>
77418                    <field>
77419                        <name>SOF_EN</name>
77420                        <description>Host: Enable SOF generation (for full speed bus)</description>
77421                        <bitRange>[9:9]</bitRange>
77422                        <access>read-write</access>
77423                    </field>
77424                    <field>
77425                        <name>SOF_SYNC</name>
77426                        <description>Host: Delay packet(s) until after SOF</description>
77427                        <bitRange>[8:8]</bitRange>
77428                        <access>read-write</access>
77429                    </field>
77430                    <field>
77431                        <name>PREAMBLE_EN</name>
77432                        <description>Host: Preable enable for LS device on FS hub</description>
77433                        <bitRange>[6:6]</bitRange>
77434                        <access>read-write</access>
77435                    </field>
77436                    <field>
77437                        <name>STOP_TRANS</name>
77438                        <description>Host: Stop transaction</description>
77439                        <bitRange>[4:4]</bitRange>
77440                        <access>write-only</access>
77441                    </field>
77442                    <field>
77443                        <name>RECEIVE_DATA</name>
77444                        <description>Host: Receive transaction (IN to host)</description>
77445                        <bitRange>[3:3]</bitRange>
77446                        <access>read-write</access>
77447                    </field>
77448                    <field>
77449                        <name>SEND_DATA</name>
77450                        <description>Host: Send transaction (OUT from host)</description>
77451                        <bitRange>[2:2]</bitRange>
77452                        <access>read-write</access>
77453                    </field>
77454                    <field>
77455                        <name>SEND_SETUP</name>
77456                        <description>Host: Send Setup packet</description>
77457                        <bitRange>[1:1]</bitRange>
77458                        <access>read-write</access>
77459                    </field>
77460                    <field>
77461                        <name>START_TRANS</name>
77462                        <description>Host: Start transaction</description>
77463                        <bitRange>[0:0]</bitRange>
77464                        <access>write-only</access>
77465                    </field>
77466                </fields>
77467            </register>
77468            <register>
77469                <name>SIE_STATUS</name>
77470                <addressOffset>0x00000050</addressOffset>
77471                <description>SIE status register</description>
77472                <resetValue>0x00000000</resetValue>
77473                <fields>
77474                    <field>
77475                        <name>DATA_SEQ_ERROR</name>
77476                        <description>Data Sequence Error.
77477
77478                            The device can raise a sequence error in the following conditions:
77479
77480                            * A SETUP packet is received followed by a DATA1 packet (data phase should always be DATA0) * An OUT packet is received from the host but doesn&#39;t match the data pid in the buffer control register read from DPSRAM
77481
77482                            The host can raise a data sequence error in the following conditions:
77483
77484                            * An IN packet from the device has the wrong data PID</description>
77485                        <bitRange>[31:31]</bitRange>
77486                        <access>read-write</access>
77487                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77488                    </field>
77489                    <field>
77490                        <name>ACK_REC</name>
77491                        <description>ACK received. Raised by both host and device.</description>
77492                        <bitRange>[30:30]</bitRange>
77493                        <access>read-write</access>
77494                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77495                    </field>
77496                    <field>
77497                        <name>STALL_REC</name>
77498                        <description>Host: STALL received</description>
77499                        <bitRange>[29:29]</bitRange>
77500                        <access>read-write</access>
77501                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77502                    </field>
77503                    <field>
77504                        <name>NAK_REC</name>
77505                        <description>Host: NAK received</description>
77506                        <bitRange>[28:28]</bitRange>
77507                        <access>read-write</access>
77508                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77509                    </field>
77510                    <field>
77511                        <name>RX_TIMEOUT</name>
77512                        <description>RX timeout is raised by both the host and device if an ACK is not received in the maximum time specified by the USB spec.</description>
77513                        <bitRange>[27:27]</bitRange>
77514                        <access>read-write</access>
77515                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77516                    </field>
77517                    <field>
77518                        <name>RX_OVERFLOW</name>
77519                        <description>RX overflow is raised by the Serial RX engine if the incoming data is too fast.</description>
77520                        <bitRange>[26:26]</bitRange>
77521                        <access>read-write</access>
77522                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77523                    </field>
77524                    <field>
77525                        <name>BIT_STUFF_ERROR</name>
77526                        <description>Bit Stuff Error. Raised by the Serial RX engine.</description>
77527                        <bitRange>[25:25]</bitRange>
77528                        <access>read-write</access>
77529                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77530                    </field>
77531                    <field>
77532                        <name>CRC_ERROR</name>
77533                        <description>CRC Error. Raised by the Serial RX engine.</description>
77534                        <bitRange>[24:24]</bitRange>
77535                        <access>read-write</access>
77536                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77537                    </field>
77538                    <field>
77539                        <name>ENDPOINT_ERROR</name>
77540                        <description>An endpoint has encountered an error. Read the ep_rx_error and ep_tx_error registers to find out which endpoint had an error.</description>
77541                        <bitRange>[23:23]</bitRange>
77542                        <access>read-write</access>
77543                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77544                    </field>
77545                    <field>
77546                        <name>BUS_RESET</name>
77547                        <description>Device: bus reset received</description>
77548                        <bitRange>[19:19]</bitRange>
77549                        <access>read-write</access>
77550                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77551                    </field>
77552                    <field>
77553                        <name>TRANS_COMPLETE</name>
77554                        <description>Transaction complete.
77555
77556                            Raised by device if:
77557
77558                            * An IN or OUT packet is sent with the `LAST_BUFF` bit set in the buffer control register
77559
77560                            Raised by host if:
77561
77562                            * A setup packet is sent when no data in or data out transaction follows * An IN packet is received and the `LAST_BUFF` bit is set in the buffer control register * An IN packet is received with zero length * An OUT packet is sent and the `LAST_BUFF` bit is set</description>
77563                        <bitRange>[18:18]</bitRange>
77564                        <access>read-write</access>
77565                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77566                    </field>
77567                    <field>
77568                        <name>SETUP_REC</name>
77569                        <description>Device: Setup packet received</description>
77570                        <bitRange>[17:17]</bitRange>
77571                        <access>read-write</access>
77572                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77573                    </field>
77574                    <field>
77575                        <name>CONNECTED</name>
77576                        <description>Device: connected</description>
77577                        <bitRange>[16:16]</bitRange>
77578                        <access>read-only</access>
77579                    </field>
77580                    <field>
77581                        <name>RX_SHORT_PACKET</name>
77582                        <description>Device or Host has received a short packet. This is when the data received is less than configured in the buffer control register. Device: If using double buffered mode on device the buffer select will not be toggled after writing status back to the buffer control register. This is to prevent any further transactions on that endpoint until the user has reset the buffer control registers. Host: the current transfer will be stopped early.</description>
77583                        <bitRange>[12:12]</bitRange>
77584                        <access>read-write</access>
77585                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77586                    </field>
77587                    <field>
77588                        <name>RESUME</name>
77589                        <description>Host: Device has initiated a remote resume. Device: host has initiated a resume.</description>
77590                        <bitRange>[11:11]</bitRange>
77591                        <access>read-write</access>
77592                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77593                    </field>
77594                    <field>
77595                        <name>VBUS_OVER_CURR</name>
77596                        <description>VBUS over current detected</description>
77597                        <bitRange>[10:10]</bitRange>
77598                        <access>read-only</access>
77599                    </field>
77600                    <field>
77601                        <name>SPEED</name>
77602                        <description>Host: device speed. Disconnected = 00, LS = 01, FS = 10</description>
77603                        <bitRange>[9:8]</bitRange>
77604                        <access>read-only</access>
77605                    </field>
77606                    <field>
77607                        <name>SUSPENDED</name>
77608                        <description>Bus in suspended state. Valid for device. Device will go into suspend if neither Keep Alive / SOF frames are enabled.</description>
77609                        <bitRange>[4:4]</bitRange>
77610                        <access>read-write</access>
77611                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77612                    </field>
77613                    <field>
77614                        <name>LINE_STATE</name>
77615                        <description>USB bus line state</description>
77616                        <bitRange>[3:2]</bitRange>
77617                        <access>read-only</access>
77618                    </field>
77619                    <field>
77620                        <name>VBUS_DETECTED</name>
77621                        <description>Device: VBUS Detected</description>
77622                        <bitRange>[0:0]</bitRange>
77623                        <access>read-only</access>
77624                    </field>
77625                </fields>
77626            </register>
77627            <register>
77628                <name>INT_EP_CTRL</name>
77629                <addressOffset>0x00000054</addressOffset>
77630                <description>interrupt endpoint control register</description>
77631                <resetValue>0x00000000</resetValue>
77632                <fields>
77633                    <field>
77634                        <name>INT_EP_ACTIVE</name>
77635                        <description>Host: Enable interrupt endpoint 1 -&gt; 15</description>
77636                        <bitRange>[15:1]</bitRange>
77637                        <access>read-write</access>
77638                    </field>
77639                </fields>
77640            </register>
77641            <register>
77642                <name>BUFF_STATUS</name>
77643                <addressOffset>0x00000058</addressOffset>
77644                <description>Buffer status register. A bit set here indicates that a buffer has completed on the endpoint (if the buffer interrupt is enabled). It is possible for 2 buffers to be completed, so clearing the buffer status bit may instantly re set it on the next clock cycle.</description>
77645                <resetValue>0x00000000</resetValue>
77646                <fields>
77647                    <field>
77648                        <name>EP15_OUT</name>
77649                        <bitRange>[31:31]</bitRange>
77650                        <access>read-write</access>
77651                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77652                    </field>
77653                    <field>
77654                        <name>EP15_IN</name>
77655                        <bitRange>[30:30]</bitRange>
77656                        <access>read-write</access>
77657                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77658                    </field>
77659                    <field>
77660                        <name>EP14_OUT</name>
77661                        <bitRange>[29:29]</bitRange>
77662                        <access>read-write</access>
77663                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77664                    </field>
77665                    <field>
77666                        <name>EP14_IN</name>
77667                        <bitRange>[28:28]</bitRange>
77668                        <access>read-write</access>
77669                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77670                    </field>
77671                    <field>
77672                        <name>EP13_OUT</name>
77673                        <bitRange>[27:27]</bitRange>
77674                        <access>read-write</access>
77675                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77676                    </field>
77677                    <field>
77678                        <name>EP13_IN</name>
77679                        <bitRange>[26:26]</bitRange>
77680                        <access>read-write</access>
77681                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77682                    </field>
77683                    <field>
77684                        <name>EP12_OUT</name>
77685                        <bitRange>[25:25]</bitRange>
77686                        <access>read-write</access>
77687                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77688                    </field>
77689                    <field>
77690                        <name>EP12_IN</name>
77691                        <bitRange>[24:24]</bitRange>
77692                        <access>read-write</access>
77693                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77694                    </field>
77695                    <field>
77696                        <name>EP11_OUT</name>
77697                        <bitRange>[23:23]</bitRange>
77698                        <access>read-write</access>
77699                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77700                    </field>
77701                    <field>
77702                        <name>EP11_IN</name>
77703                        <bitRange>[22:22]</bitRange>
77704                        <access>read-write</access>
77705                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77706                    </field>
77707                    <field>
77708                        <name>EP10_OUT</name>
77709                        <bitRange>[21:21]</bitRange>
77710                        <access>read-write</access>
77711                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77712                    </field>
77713                    <field>
77714                        <name>EP10_IN</name>
77715                        <bitRange>[20:20]</bitRange>
77716                        <access>read-write</access>
77717                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77718                    </field>
77719                    <field>
77720                        <name>EP9_OUT</name>
77721                        <bitRange>[19:19]</bitRange>
77722                        <access>read-write</access>
77723                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77724                    </field>
77725                    <field>
77726                        <name>EP9_IN</name>
77727                        <bitRange>[18:18]</bitRange>
77728                        <access>read-write</access>
77729                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77730                    </field>
77731                    <field>
77732                        <name>EP8_OUT</name>
77733                        <bitRange>[17:17]</bitRange>
77734                        <access>read-write</access>
77735                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77736                    </field>
77737                    <field>
77738                        <name>EP8_IN</name>
77739                        <bitRange>[16:16]</bitRange>
77740                        <access>read-write</access>
77741                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77742                    </field>
77743                    <field>
77744                        <name>EP7_OUT</name>
77745                        <bitRange>[15:15]</bitRange>
77746                        <access>read-write</access>
77747                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77748                    </field>
77749                    <field>
77750                        <name>EP7_IN</name>
77751                        <bitRange>[14:14]</bitRange>
77752                        <access>read-write</access>
77753                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77754                    </field>
77755                    <field>
77756                        <name>EP6_OUT</name>
77757                        <bitRange>[13:13]</bitRange>
77758                        <access>read-write</access>
77759                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77760                    </field>
77761                    <field>
77762                        <name>EP6_IN</name>
77763                        <bitRange>[12:12]</bitRange>
77764                        <access>read-write</access>
77765                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77766                    </field>
77767                    <field>
77768                        <name>EP5_OUT</name>
77769                        <bitRange>[11:11]</bitRange>
77770                        <access>read-write</access>
77771                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77772                    </field>
77773                    <field>
77774                        <name>EP5_IN</name>
77775                        <bitRange>[10:10]</bitRange>
77776                        <access>read-write</access>
77777                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77778                    </field>
77779                    <field>
77780                        <name>EP4_OUT</name>
77781                        <bitRange>[9:9]</bitRange>
77782                        <access>read-write</access>
77783                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77784                    </field>
77785                    <field>
77786                        <name>EP4_IN</name>
77787                        <bitRange>[8:8]</bitRange>
77788                        <access>read-write</access>
77789                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77790                    </field>
77791                    <field>
77792                        <name>EP3_OUT</name>
77793                        <bitRange>[7:7]</bitRange>
77794                        <access>read-write</access>
77795                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77796                    </field>
77797                    <field>
77798                        <name>EP3_IN</name>
77799                        <bitRange>[6:6]</bitRange>
77800                        <access>read-write</access>
77801                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77802                    </field>
77803                    <field>
77804                        <name>EP2_OUT</name>
77805                        <bitRange>[5:5]</bitRange>
77806                        <access>read-write</access>
77807                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77808                    </field>
77809                    <field>
77810                        <name>EP2_IN</name>
77811                        <bitRange>[4:4]</bitRange>
77812                        <access>read-write</access>
77813                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77814                    </field>
77815                    <field>
77816                        <name>EP1_OUT</name>
77817                        <bitRange>[3:3]</bitRange>
77818                        <access>read-write</access>
77819                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77820                    </field>
77821                    <field>
77822                        <name>EP1_IN</name>
77823                        <bitRange>[2:2]</bitRange>
77824                        <access>read-write</access>
77825                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77826                    </field>
77827                    <field>
77828                        <name>EP0_OUT</name>
77829                        <bitRange>[1:1]</bitRange>
77830                        <access>read-write</access>
77831                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77832                    </field>
77833                    <field>
77834                        <name>EP0_IN</name>
77835                        <bitRange>[0:0]</bitRange>
77836                        <access>read-write</access>
77837                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
77838                    </field>
77839                </fields>
77840            </register>
77841            <register>
77842                <name>BUFF_CPU_SHOULD_HANDLE</name>
77843                <addressOffset>0x0000005c</addressOffset>
77844                <description>Which of the double buffers should be handled. Only valid if using an interrupt per buffer (i.e. not per 2 buffers). Not valid for host interrupt endpoint polling because they are only single buffered.</description>
77845                <resetValue>0x00000000</resetValue>
77846                <fields>
77847                    <field>
77848                        <name>EP15_OUT</name>
77849                        <bitRange>[31:31]</bitRange>
77850                        <access>read-only</access>
77851                    </field>
77852                    <field>
77853                        <name>EP15_IN</name>
77854                        <bitRange>[30:30]</bitRange>
77855                        <access>read-only</access>
77856                    </field>
77857                    <field>
77858                        <name>EP14_OUT</name>
77859                        <bitRange>[29:29]</bitRange>
77860                        <access>read-only</access>
77861                    </field>
77862                    <field>
77863                        <name>EP14_IN</name>
77864                        <bitRange>[28:28]</bitRange>
77865                        <access>read-only</access>
77866                    </field>
77867                    <field>
77868                        <name>EP13_OUT</name>
77869                        <bitRange>[27:27]</bitRange>
77870                        <access>read-only</access>
77871                    </field>
77872                    <field>
77873                        <name>EP13_IN</name>
77874                        <bitRange>[26:26]</bitRange>
77875                        <access>read-only</access>
77876                    </field>
77877                    <field>
77878                        <name>EP12_OUT</name>
77879                        <bitRange>[25:25]</bitRange>
77880                        <access>read-only</access>
77881                    </field>
77882                    <field>
77883                        <name>EP12_IN</name>
77884                        <bitRange>[24:24]</bitRange>
77885                        <access>read-only</access>
77886                    </field>
77887                    <field>
77888                        <name>EP11_OUT</name>
77889                        <bitRange>[23:23]</bitRange>
77890                        <access>read-only</access>
77891                    </field>
77892                    <field>
77893                        <name>EP11_IN</name>
77894                        <bitRange>[22:22]</bitRange>
77895                        <access>read-only</access>
77896                    </field>
77897                    <field>
77898                        <name>EP10_OUT</name>
77899                        <bitRange>[21:21]</bitRange>
77900                        <access>read-only</access>
77901                    </field>
77902                    <field>
77903                        <name>EP10_IN</name>
77904                        <bitRange>[20:20]</bitRange>
77905                        <access>read-only</access>
77906                    </field>
77907                    <field>
77908                        <name>EP9_OUT</name>
77909                        <bitRange>[19:19]</bitRange>
77910                        <access>read-only</access>
77911                    </field>
77912                    <field>
77913                        <name>EP9_IN</name>
77914                        <bitRange>[18:18]</bitRange>
77915                        <access>read-only</access>
77916                    </field>
77917                    <field>
77918                        <name>EP8_OUT</name>
77919                        <bitRange>[17:17]</bitRange>
77920                        <access>read-only</access>
77921                    </field>
77922                    <field>
77923                        <name>EP8_IN</name>
77924                        <bitRange>[16:16]</bitRange>
77925                        <access>read-only</access>
77926                    </field>
77927                    <field>
77928                        <name>EP7_OUT</name>
77929                        <bitRange>[15:15]</bitRange>
77930                        <access>read-only</access>
77931                    </field>
77932                    <field>
77933                        <name>EP7_IN</name>
77934                        <bitRange>[14:14]</bitRange>
77935                        <access>read-only</access>
77936                    </field>
77937                    <field>
77938                        <name>EP6_OUT</name>
77939                        <bitRange>[13:13]</bitRange>
77940                        <access>read-only</access>
77941                    </field>
77942                    <field>
77943                        <name>EP6_IN</name>
77944                        <bitRange>[12:12]</bitRange>
77945                        <access>read-only</access>
77946                    </field>
77947                    <field>
77948                        <name>EP5_OUT</name>
77949                        <bitRange>[11:11]</bitRange>
77950                        <access>read-only</access>
77951                    </field>
77952                    <field>
77953                        <name>EP5_IN</name>
77954                        <bitRange>[10:10]</bitRange>
77955                        <access>read-only</access>
77956                    </field>
77957                    <field>
77958                        <name>EP4_OUT</name>
77959                        <bitRange>[9:9]</bitRange>
77960                        <access>read-only</access>
77961                    </field>
77962                    <field>
77963                        <name>EP4_IN</name>
77964                        <bitRange>[8:8]</bitRange>
77965                        <access>read-only</access>
77966                    </field>
77967                    <field>
77968                        <name>EP3_OUT</name>
77969                        <bitRange>[7:7]</bitRange>
77970                        <access>read-only</access>
77971                    </field>
77972                    <field>
77973                        <name>EP3_IN</name>
77974                        <bitRange>[6:6]</bitRange>
77975                        <access>read-only</access>
77976                    </field>
77977                    <field>
77978                        <name>EP2_OUT</name>
77979                        <bitRange>[5:5]</bitRange>
77980                        <access>read-only</access>
77981                    </field>
77982                    <field>
77983                        <name>EP2_IN</name>
77984                        <bitRange>[4:4]</bitRange>
77985                        <access>read-only</access>
77986                    </field>
77987                    <field>
77988                        <name>EP1_OUT</name>
77989                        <bitRange>[3:3]</bitRange>
77990                        <access>read-only</access>
77991                    </field>
77992                    <field>
77993                        <name>EP1_IN</name>
77994                        <bitRange>[2:2]</bitRange>
77995                        <access>read-only</access>
77996                    </field>
77997                    <field>
77998                        <name>EP0_OUT</name>
77999                        <bitRange>[1:1]</bitRange>
78000                        <access>read-only</access>
78001                    </field>
78002                    <field>
78003                        <name>EP0_IN</name>
78004                        <bitRange>[0:0]</bitRange>
78005                        <access>read-only</access>
78006                    </field>
78007                </fields>
78008            </register>
78009            <register>
78010                <name>EP_ABORT</name>
78011                <addressOffset>0x00000060</addressOffset>
78012                <description>Device only: Can be set to ignore the buffer control register for this endpoint in case you would like to revoke a buffer. A NAK will be sent for every access to the endpoint until this bit is cleared. A corresponding bit in `EP_ABORT_DONE` is set when it is safe to modify the buffer control register.</description>
78013                <resetValue>0x00000000</resetValue>
78014                <fields>
78015                    <field>
78016                        <name>EP15_OUT</name>
78017                        <bitRange>[31:31]</bitRange>
78018                        <access>read-write</access>
78019                    </field>
78020                    <field>
78021                        <name>EP15_IN</name>
78022                        <bitRange>[30:30]</bitRange>
78023                        <access>read-write</access>
78024                    </field>
78025                    <field>
78026                        <name>EP14_OUT</name>
78027                        <bitRange>[29:29]</bitRange>
78028                        <access>read-write</access>
78029                    </field>
78030                    <field>
78031                        <name>EP14_IN</name>
78032                        <bitRange>[28:28]</bitRange>
78033                        <access>read-write</access>
78034                    </field>
78035                    <field>
78036                        <name>EP13_OUT</name>
78037                        <bitRange>[27:27]</bitRange>
78038                        <access>read-write</access>
78039                    </field>
78040                    <field>
78041                        <name>EP13_IN</name>
78042                        <bitRange>[26:26]</bitRange>
78043                        <access>read-write</access>
78044                    </field>
78045                    <field>
78046                        <name>EP12_OUT</name>
78047                        <bitRange>[25:25]</bitRange>
78048                        <access>read-write</access>
78049                    </field>
78050                    <field>
78051                        <name>EP12_IN</name>
78052                        <bitRange>[24:24]</bitRange>
78053                        <access>read-write</access>
78054                    </field>
78055                    <field>
78056                        <name>EP11_OUT</name>
78057                        <bitRange>[23:23]</bitRange>
78058                        <access>read-write</access>
78059                    </field>
78060                    <field>
78061                        <name>EP11_IN</name>
78062                        <bitRange>[22:22]</bitRange>
78063                        <access>read-write</access>
78064                    </field>
78065                    <field>
78066                        <name>EP10_OUT</name>
78067                        <bitRange>[21:21]</bitRange>
78068                        <access>read-write</access>
78069                    </field>
78070                    <field>
78071                        <name>EP10_IN</name>
78072                        <bitRange>[20:20]</bitRange>
78073                        <access>read-write</access>
78074                    </field>
78075                    <field>
78076                        <name>EP9_OUT</name>
78077                        <bitRange>[19:19]</bitRange>
78078                        <access>read-write</access>
78079                    </field>
78080                    <field>
78081                        <name>EP9_IN</name>
78082                        <bitRange>[18:18]</bitRange>
78083                        <access>read-write</access>
78084                    </field>
78085                    <field>
78086                        <name>EP8_OUT</name>
78087                        <bitRange>[17:17]</bitRange>
78088                        <access>read-write</access>
78089                    </field>
78090                    <field>
78091                        <name>EP8_IN</name>
78092                        <bitRange>[16:16]</bitRange>
78093                        <access>read-write</access>
78094                    </field>
78095                    <field>
78096                        <name>EP7_OUT</name>
78097                        <bitRange>[15:15]</bitRange>
78098                        <access>read-write</access>
78099                    </field>
78100                    <field>
78101                        <name>EP7_IN</name>
78102                        <bitRange>[14:14]</bitRange>
78103                        <access>read-write</access>
78104                    </field>
78105                    <field>
78106                        <name>EP6_OUT</name>
78107                        <bitRange>[13:13]</bitRange>
78108                        <access>read-write</access>
78109                    </field>
78110                    <field>
78111                        <name>EP6_IN</name>
78112                        <bitRange>[12:12]</bitRange>
78113                        <access>read-write</access>
78114                    </field>
78115                    <field>
78116                        <name>EP5_OUT</name>
78117                        <bitRange>[11:11]</bitRange>
78118                        <access>read-write</access>
78119                    </field>
78120                    <field>
78121                        <name>EP5_IN</name>
78122                        <bitRange>[10:10]</bitRange>
78123                        <access>read-write</access>
78124                    </field>
78125                    <field>
78126                        <name>EP4_OUT</name>
78127                        <bitRange>[9:9]</bitRange>
78128                        <access>read-write</access>
78129                    </field>
78130                    <field>
78131                        <name>EP4_IN</name>
78132                        <bitRange>[8:8]</bitRange>
78133                        <access>read-write</access>
78134                    </field>
78135                    <field>
78136                        <name>EP3_OUT</name>
78137                        <bitRange>[7:7]</bitRange>
78138                        <access>read-write</access>
78139                    </field>
78140                    <field>
78141                        <name>EP3_IN</name>
78142                        <bitRange>[6:6]</bitRange>
78143                        <access>read-write</access>
78144                    </field>
78145                    <field>
78146                        <name>EP2_OUT</name>
78147                        <bitRange>[5:5]</bitRange>
78148                        <access>read-write</access>
78149                    </field>
78150                    <field>
78151                        <name>EP2_IN</name>
78152                        <bitRange>[4:4]</bitRange>
78153                        <access>read-write</access>
78154                    </field>
78155                    <field>
78156                        <name>EP1_OUT</name>
78157                        <bitRange>[3:3]</bitRange>
78158                        <access>read-write</access>
78159                    </field>
78160                    <field>
78161                        <name>EP1_IN</name>
78162                        <bitRange>[2:2]</bitRange>
78163                        <access>read-write</access>
78164                    </field>
78165                    <field>
78166                        <name>EP0_OUT</name>
78167                        <bitRange>[1:1]</bitRange>
78168                        <access>read-write</access>
78169                    </field>
78170                    <field>
78171                        <name>EP0_IN</name>
78172                        <bitRange>[0:0]</bitRange>
78173                        <access>read-write</access>
78174                    </field>
78175                </fields>
78176            </register>
78177            <register>
78178                <name>EP_ABORT_DONE</name>
78179                <addressOffset>0x00000064</addressOffset>
78180                <description>Device only: Used in conjunction with `EP_ABORT`. Set once an endpoint is idle so the programmer knows it is safe to modify the buffer control register.</description>
78181                <resetValue>0x00000000</resetValue>
78182                <fields>
78183                    <field>
78184                        <name>EP15_OUT</name>
78185                        <bitRange>[31:31]</bitRange>
78186                        <access>read-write</access>
78187                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78188                    </field>
78189                    <field>
78190                        <name>EP15_IN</name>
78191                        <bitRange>[30:30]</bitRange>
78192                        <access>read-write</access>
78193                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78194                    </field>
78195                    <field>
78196                        <name>EP14_OUT</name>
78197                        <bitRange>[29:29]</bitRange>
78198                        <access>read-write</access>
78199                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78200                    </field>
78201                    <field>
78202                        <name>EP14_IN</name>
78203                        <bitRange>[28:28]</bitRange>
78204                        <access>read-write</access>
78205                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78206                    </field>
78207                    <field>
78208                        <name>EP13_OUT</name>
78209                        <bitRange>[27:27]</bitRange>
78210                        <access>read-write</access>
78211                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78212                    </field>
78213                    <field>
78214                        <name>EP13_IN</name>
78215                        <bitRange>[26:26]</bitRange>
78216                        <access>read-write</access>
78217                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78218                    </field>
78219                    <field>
78220                        <name>EP12_OUT</name>
78221                        <bitRange>[25:25]</bitRange>
78222                        <access>read-write</access>
78223                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78224                    </field>
78225                    <field>
78226                        <name>EP12_IN</name>
78227                        <bitRange>[24:24]</bitRange>
78228                        <access>read-write</access>
78229                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78230                    </field>
78231                    <field>
78232                        <name>EP11_OUT</name>
78233                        <bitRange>[23:23]</bitRange>
78234                        <access>read-write</access>
78235                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78236                    </field>
78237                    <field>
78238                        <name>EP11_IN</name>
78239                        <bitRange>[22:22]</bitRange>
78240                        <access>read-write</access>
78241                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78242                    </field>
78243                    <field>
78244                        <name>EP10_OUT</name>
78245                        <bitRange>[21:21]</bitRange>
78246                        <access>read-write</access>
78247                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78248                    </field>
78249                    <field>
78250                        <name>EP10_IN</name>
78251                        <bitRange>[20:20]</bitRange>
78252                        <access>read-write</access>
78253                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78254                    </field>
78255                    <field>
78256                        <name>EP9_OUT</name>
78257                        <bitRange>[19:19]</bitRange>
78258                        <access>read-write</access>
78259                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78260                    </field>
78261                    <field>
78262                        <name>EP9_IN</name>
78263                        <bitRange>[18:18]</bitRange>
78264                        <access>read-write</access>
78265                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78266                    </field>
78267                    <field>
78268                        <name>EP8_OUT</name>
78269                        <bitRange>[17:17]</bitRange>
78270                        <access>read-write</access>
78271                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78272                    </field>
78273                    <field>
78274                        <name>EP8_IN</name>
78275                        <bitRange>[16:16]</bitRange>
78276                        <access>read-write</access>
78277                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78278                    </field>
78279                    <field>
78280                        <name>EP7_OUT</name>
78281                        <bitRange>[15:15]</bitRange>
78282                        <access>read-write</access>
78283                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78284                    </field>
78285                    <field>
78286                        <name>EP7_IN</name>
78287                        <bitRange>[14:14]</bitRange>
78288                        <access>read-write</access>
78289                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78290                    </field>
78291                    <field>
78292                        <name>EP6_OUT</name>
78293                        <bitRange>[13:13]</bitRange>
78294                        <access>read-write</access>
78295                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78296                    </field>
78297                    <field>
78298                        <name>EP6_IN</name>
78299                        <bitRange>[12:12]</bitRange>
78300                        <access>read-write</access>
78301                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78302                    </field>
78303                    <field>
78304                        <name>EP5_OUT</name>
78305                        <bitRange>[11:11]</bitRange>
78306                        <access>read-write</access>
78307                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78308                    </field>
78309                    <field>
78310                        <name>EP5_IN</name>
78311                        <bitRange>[10:10]</bitRange>
78312                        <access>read-write</access>
78313                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78314                    </field>
78315                    <field>
78316                        <name>EP4_OUT</name>
78317                        <bitRange>[9:9]</bitRange>
78318                        <access>read-write</access>
78319                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78320                    </field>
78321                    <field>
78322                        <name>EP4_IN</name>
78323                        <bitRange>[8:8]</bitRange>
78324                        <access>read-write</access>
78325                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78326                    </field>
78327                    <field>
78328                        <name>EP3_OUT</name>
78329                        <bitRange>[7:7]</bitRange>
78330                        <access>read-write</access>
78331                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78332                    </field>
78333                    <field>
78334                        <name>EP3_IN</name>
78335                        <bitRange>[6:6]</bitRange>
78336                        <access>read-write</access>
78337                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78338                    </field>
78339                    <field>
78340                        <name>EP2_OUT</name>
78341                        <bitRange>[5:5]</bitRange>
78342                        <access>read-write</access>
78343                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78344                    </field>
78345                    <field>
78346                        <name>EP2_IN</name>
78347                        <bitRange>[4:4]</bitRange>
78348                        <access>read-write</access>
78349                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78350                    </field>
78351                    <field>
78352                        <name>EP1_OUT</name>
78353                        <bitRange>[3:3]</bitRange>
78354                        <access>read-write</access>
78355                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78356                    </field>
78357                    <field>
78358                        <name>EP1_IN</name>
78359                        <bitRange>[2:2]</bitRange>
78360                        <access>read-write</access>
78361                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78362                    </field>
78363                    <field>
78364                        <name>EP0_OUT</name>
78365                        <bitRange>[1:1]</bitRange>
78366                        <access>read-write</access>
78367                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78368                    </field>
78369                    <field>
78370                        <name>EP0_IN</name>
78371                        <bitRange>[0:0]</bitRange>
78372                        <access>read-write</access>
78373                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78374                    </field>
78375                </fields>
78376            </register>
78377            <register>
78378                <name>EP_STALL_ARM</name>
78379                <addressOffset>0x00000068</addressOffset>
78380                <description>Device: this bit must be set in conjunction with the `STALL` bit in the buffer control register to send a STALL on EP0. The device controller clears these bits when a SETUP packet is received because the USB spec requires that a STALL condition is cleared when a SETUP packet is received.</description>
78381                <resetValue>0x00000000</resetValue>
78382                <fields>
78383                    <field>
78384                        <name>EP0_OUT</name>
78385                        <bitRange>[1:1]</bitRange>
78386                        <access>read-write</access>
78387                    </field>
78388                    <field>
78389                        <name>EP0_IN</name>
78390                        <bitRange>[0:0]</bitRange>
78391                        <access>read-write</access>
78392                    </field>
78393                </fields>
78394            </register>
78395            <register>
78396                <name>NAK_POLL</name>
78397                <addressOffset>0x0000006c</addressOffset>
78398                <description>Used by the host controller. Sets the wait time in microseconds before trying again if the device replies with a NAK.</description>
78399                <resetValue>0x00100010</resetValue>
78400                <fields>
78401                    <field>
78402                        <name>RETRY_COUNT_HI</name>
78403                        <description>Bits 9:6 of nak_retry count</description>
78404                        <bitRange>[31:28]</bitRange>
78405                        <access>read-only</access>
78406                    </field>
78407                    <field>
78408                        <name>EPX_STOPPED_ON_NAK</name>
78409                        <description>EPX polling has stopped because a nak was received</description>
78410                        <bitRange>[27:27]</bitRange>
78411                        <access>read-write</access>
78412                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78413                    </field>
78414                    <field>
78415                        <name>STOP_EPX_ON_NAK</name>
78416                        <description>Stop polling epx when a nak is received</description>
78417                        <bitRange>[26:26]</bitRange>
78418                        <access>read-write</access>
78419                    </field>
78420                    <field>
78421                        <name>DELAY_FS</name>
78422                        <description>NAK polling interval for a full speed device</description>
78423                        <bitRange>[25:16]</bitRange>
78424                        <access>read-write</access>
78425                    </field>
78426                    <field>
78427                        <name>RETRY_COUNT_LO</name>
78428                        <description>Bits 5:0 of nak_retry_count</description>
78429                        <bitRange>[15:10]</bitRange>
78430                        <access>read-only</access>
78431                    </field>
78432                    <field>
78433                        <name>DELAY_LS</name>
78434                        <description>NAK polling interval for a low speed device</description>
78435                        <bitRange>[9:0]</bitRange>
78436                        <access>read-write</access>
78437                    </field>
78438                </fields>
78439            </register>
78440            <register>
78441                <name>EP_STATUS_STALL_NAK</name>
78442                <addressOffset>0x00000070</addressOffset>
78443                <description>Device: bits are set when the `IRQ_ON_NAK` or `IRQ_ON_STALL` bits are set. For EP0 this comes from `SIE_CTRL`. For all other endpoints it comes from the endpoint control register.</description>
78444                <resetValue>0x00000000</resetValue>
78445                <fields>
78446                    <field>
78447                        <name>EP15_OUT</name>
78448                        <bitRange>[31:31]</bitRange>
78449                        <access>read-write</access>
78450                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78451                    </field>
78452                    <field>
78453                        <name>EP15_IN</name>
78454                        <bitRange>[30:30]</bitRange>
78455                        <access>read-write</access>
78456                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78457                    </field>
78458                    <field>
78459                        <name>EP14_OUT</name>
78460                        <bitRange>[29:29]</bitRange>
78461                        <access>read-write</access>
78462                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78463                    </field>
78464                    <field>
78465                        <name>EP14_IN</name>
78466                        <bitRange>[28:28]</bitRange>
78467                        <access>read-write</access>
78468                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78469                    </field>
78470                    <field>
78471                        <name>EP13_OUT</name>
78472                        <bitRange>[27:27]</bitRange>
78473                        <access>read-write</access>
78474                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78475                    </field>
78476                    <field>
78477                        <name>EP13_IN</name>
78478                        <bitRange>[26:26]</bitRange>
78479                        <access>read-write</access>
78480                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78481                    </field>
78482                    <field>
78483                        <name>EP12_OUT</name>
78484                        <bitRange>[25:25]</bitRange>
78485                        <access>read-write</access>
78486                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78487                    </field>
78488                    <field>
78489                        <name>EP12_IN</name>
78490                        <bitRange>[24:24]</bitRange>
78491                        <access>read-write</access>
78492                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78493                    </field>
78494                    <field>
78495                        <name>EP11_OUT</name>
78496                        <bitRange>[23:23]</bitRange>
78497                        <access>read-write</access>
78498                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78499                    </field>
78500                    <field>
78501                        <name>EP11_IN</name>
78502                        <bitRange>[22:22]</bitRange>
78503                        <access>read-write</access>
78504                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78505                    </field>
78506                    <field>
78507                        <name>EP10_OUT</name>
78508                        <bitRange>[21:21]</bitRange>
78509                        <access>read-write</access>
78510                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78511                    </field>
78512                    <field>
78513                        <name>EP10_IN</name>
78514                        <bitRange>[20:20]</bitRange>
78515                        <access>read-write</access>
78516                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78517                    </field>
78518                    <field>
78519                        <name>EP9_OUT</name>
78520                        <bitRange>[19:19]</bitRange>
78521                        <access>read-write</access>
78522                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78523                    </field>
78524                    <field>
78525                        <name>EP9_IN</name>
78526                        <bitRange>[18:18]</bitRange>
78527                        <access>read-write</access>
78528                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78529                    </field>
78530                    <field>
78531                        <name>EP8_OUT</name>
78532                        <bitRange>[17:17]</bitRange>
78533                        <access>read-write</access>
78534                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78535                    </field>
78536                    <field>
78537                        <name>EP8_IN</name>
78538                        <bitRange>[16:16]</bitRange>
78539                        <access>read-write</access>
78540                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78541                    </field>
78542                    <field>
78543                        <name>EP7_OUT</name>
78544                        <bitRange>[15:15]</bitRange>
78545                        <access>read-write</access>
78546                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78547                    </field>
78548                    <field>
78549                        <name>EP7_IN</name>
78550                        <bitRange>[14:14]</bitRange>
78551                        <access>read-write</access>
78552                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78553                    </field>
78554                    <field>
78555                        <name>EP6_OUT</name>
78556                        <bitRange>[13:13]</bitRange>
78557                        <access>read-write</access>
78558                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78559                    </field>
78560                    <field>
78561                        <name>EP6_IN</name>
78562                        <bitRange>[12:12]</bitRange>
78563                        <access>read-write</access>
78564                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78565                    </field>
78566                    <field>
78567                        <name>EP5_OUT</name>
78568                        <bitRange>[11:11]</bitRange>
78569                        <access>read-write</access>
78570                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78571                    </field>
78572                    <field>
78573                        <name>EP5_IN</name>
78574                        <bitRange>[10:10]</bitRange>
78575                        <access>read-write</access>
78576                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78577                    </field>
78578                    <field>
78579                        <name>EP4_OUT</name>
78580                        <bitRange>[9:9]</bitRange>
78581                        <access>read-write</access>
78582                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78583                    </field>
78584                    <field>
78585                        <name>EP4_IN</name>
78586                        <bitRange>[8:8]</bitRange>
78587                        <access>read-write</access>
78588                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78589                    </field>
78590                    <field>
78591                        <name>EP3_OUT</name>
78592                        <bitRange>[7:7]</bitRange>
78593                        <access>read-write</access>
78594                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78595                    </field>
78596                    <field>
78597                        <name>EP3_IN</name>
78598                        <bitRange>[6:6]</bitRange>
78599                        <access>read-write</access>
78600                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78601                    </field>
78602                    <field>
78603                        <name>EP2_OUT</name>
78604                        <bitRange>[5:5]</bitRange>
78605                        <access>read-write</access>
78606                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78607                    </field>
78608                    <field>
78609                        <name>EP2_IN</name>
78610                        <bitRange>[4:4]</bitRange>
78611                        <access>read-write</access>
78612                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78613                    </field>
78614                    <field>
78615                        <name>EP1_OUT</name>
78616                        <bitRange>[3:3]</bitRange>
78617                        <access>read-write</access>
78618                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78619                    </field>
78620                    <field>
78621                        <name>EP1_IN</name>
78622                        <bitRange>[2:2]</bitRange>
78623                        <access>read-write</access>
78624                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78625                    </field>
78626                    <field>
78627                        <name>EP0_OUT</name>
78628                        <bitRange>[1:1]</bitRange>
78629                        <access>read-write</access>
78630                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78631                    </field>
78632                    <field>
78633                        <name>EP0_IN</name>
78634                        <bitRange>[0:0]</bitRange>
78635                        <access>read-write</access>
78636                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
78637                    </field>
78638                </fields>
78639            </register>
78640            <register>
78641                <name>USB_MUXING</name>
78642                <addressOffset>0x00000074</addressOffset>
78643                <description>Where to connect the USB controller. Should be to_phy by default.</description>
78644                <resetValue>0x00000001</resetValue>
78645                <fields>
78646                    <field>
78647                        <name>SWAP_DPDM</name>
78648                        <description>Swap the USB PHY DP and DM pins and all related controls and flip receive differential data. Can be used to switch USB DP/DP on the PCB.
78649                            This is done at a low level so overrides all other controls.</description>
78650                        <bitRange>[31:31]</bitRange>
78651                        <access>read-write</access>
78652                    </field>
78653                    <field>
78654                        <name>USBPHY_AS_GPIO</name>
78655                        <description>Use the usb DP and DM pins as GPIO pins instead of connecting them to the USB controller.</description>
78656                        <bitRange>[4:4]</bitRange>
78657                        <access>read-write</access>
78658                    </field>
78659                    <field>
78660                        <name>SOFTCON</name>
78661                        <bitRange>[3:3]</bitRange>
78662                        <access>read-write</access>
78663                    </field>
78664                    <field>
78665                        <name>TO_DIGITAL_PAD</name>
78666                        <bitRange>[2:2]</bitRange>
78667                        <access>read-write</access>
78668                    </field>
78669                    <field>
78670                        <name>TO_EXTPHY</name>
78671                        <bitRange>[1:1]</bitRange>
78672                        <access>read-write</access>
78673                    </field>
78674                    <field>
78675                        <name>TO_PHY</name>
78676                        <bitRange>[0:0]</bitRange>
78677                        <access>read-write</access>
78678                    </field>
78679                </fields>
78680            </register>
78681            <register>
78682                <name>USB_PWR</name>
78683                <addressOffset>0x00000078</addressOffset>
78684                <description>Overrides for the power signals in the event that the VBUS signals are not hooked up to GPIO. Set the value of the override and then the override enable to switch over to the override value.</description>
78685                <resetValue>0x00000000</resetValue>
78686                <fields>
78687                    <field>
78688                        <name>OVERCURR_DETECT_EN</name>
78689                        <bitRange>[5:5]</bitRange>
78690                        <access>read-write</access>
78691                    </field>
78692                    <field>
78693                        <name>OVERCURR_DETECT</name>
78694                        <bitRange>[4:4]</bitRange>
78695                        <access>read-write</access>
78696                    </field>
78697                    <field>
78698                        <name>VBUS_DETECT_OVERRIDE_EN</name>
78699                        <bitRange>[3:3]</bitRange>
78700                        <access>read-write</access>
78701                    </field>
78702                    <field>
78703                        <name>VBUS_DETECT</name>
78704                        <bitRange>[2:2]</bitRange>
78705                        <access>read-write</access>
78706                    </field>
78707                    <field>
78708                        <name>VBUS_EN_OVERRIDE_EN</name>
78709                        <bitRange>[1:1]</bitRange>
78710                        <access>read-write</access>
78711                    </field>
78712                    <field>
78713                        <name>VBUS_EN</name>
78714                        <bitRange>[0:0]</bitRange>
78715                        <access>read-write</access>
78716                    </field>
78717                </fields>
78718            </register>
78719            <register>
78720                <name>USBPHY_DIRECT</name>
78721                <addressOffset>0x0000007c</addressOffset>
78722                <description>This register allows for direct control of the USB phy. Use in conjunction with usbphy_direct_override register to enable each override bit.</description>
78723                <resetValue>0x00000000</resetValue>
78724                <fields>
78725                    <field>
78726                        <name>RX_DM_OVERRIDE</name>
78727                        <description>Override rx_dm value into controller</description>
78728                        <bitRange>[25:25]</bitRange>
78729                        <access>read-write</access>
78730                    </field>
78731                    <field>
78732                        <name>RX_DP_OVERRIDE</name>
78733                        <description>Override rx_dp value into controller</description>
78734                        <bitRange>[24:24]</bitRange>
78735                        <access>read-write</access>
78736                    </field>
78737                    <field>
78738                        <name>RX_DD_OVERRIDE</name>
78739                        <description>Override rx_dd value into controller</description>
78740                        <bitRange>[23:23]</bitRange>
78741                        <access>read-write</access>
78742                    </field>
78743                    <field>
78744                        <name>DM_OVV</name>
78745                        <description>DM over voltage</description>
78746                        <bitRange>[22:22]</bitRange>
78747                        <access>read-only</access>
78748                    </field>
78749                    <field>
78750                        <name>DP_OVV</name>
78751                        <description>DP over voltage</description>
78752                        <bitRange>[21:21]</bitRange>
78753                        <access>read-only</access>
78754                    </field>
78755                    <field>
78756                        <name>DM_OVCN</name>
78757                        <description>DM overcurrent</description>
78758                        <bitRange>[20:20]</bitRange>
78759                        <access>read-only</access>
78760                    </field>
78761                    <field>
78762                        <name>DP_OVCN</name>
78763                        <description>DP overcurrent</description>
78764                        <bitRange>[19:19]</bitRange>
78765                        <access>read-only</access>
78766                    </field>
78767                    <field>
78768                        <name>RX_DM</name>
78769                        <description>DPM pin state</description>
78770                        <bitRange>[18:18]</bitRange>
78771                        <access>read-only</access>
78772                    </field>
78773                    <field>
78774                        <name>RX_DP</name>
78775                        <description>DPP pin state</description>
78776                        <bitRange>[17:17]</bitRange>
78777                        <access>read-only</access>
78778                    </field>
78779                    <field>
78780                        <name>RX_DD</name>
78781                        <description>Differential RX</description>
78782                        <bitRange>[16:16]</bitRange>
78783                        <access>read-only</access>
78784                    </field>
78785                    <field>
78786                        <name>TX_DIFFMODE</name>
78787                        <description>TX_DIFFMODE=0: Single ended mode
78788                            TX_DIFFMODE=1: Differential drive mode (TX_DM, TX_DM_OE ignored)</description>
78789                        <bitRange>[15:15]</bitRange>
78790                        <access>read-write</access>
78791                    </field>
78792                    <field>
78793                        <name>TX_FSSLEW</name>
78794                        <description>TX_FSSLEW=0: Low speed slew rate
78795                            TX_FSSLEW=1: Full speed slew rate</description>
78796                        <bitRange>[14:14]</bitRange>
78797                        <access>read-write</access>
78798                    </field>
78799                    <field>
78800                        <name>TX_PD</name>
78801                        <description>TX power down override (if override enable is set). 1 = powered down.</description>
78802                        <bitRange>[13:13]</bitRange>
78803                        <access>read-write</access>
78804                    </field>
78805                    <field>
78806                        <name>RX_PD</name>
78807                        <description>RX power down override (if override enable is set). 1 = powered down.</description>
78808                        <bitRange>[12:12]</bitRange>
78809                        <access>read-write</access>
78810                    </field>
78811                    <field>
78812                        <name>TX_DM</name>
78813                        <description>Output data. TX_DIFFMODE=1, Ignored
78814                            TX_DIFFMODE=0, Drives DPM only. TX_DM_OE=1 to enable drive. DPM=TX_DM</description>
78815                        <bitRange>[11:11]</bitRange>
78816                        <access>read-write</access>
78817                    </field>
78818                    <field>
78819                        <name>TX_DP</name>
78820                        <description>Output data. If TX_DIFFMODE=1, Drives DPP/DPM diff pair. TX_DP_OE=1 to enable drive. DPP=TX_DP, DPM=~TX_DP
78821                            If TX_DIFFMODE=0, Drives DPP only. TX_DP_OE=1 to enable drive. DPP=TX_DP</description>
78822                        <bitRange>[10:10]</bitRange>
78823                        <access>read-write</access>
78824                    </field>
78825                    <field>
78826                        <name>TX_DM_OE</name>
78827                        <description>Output enable. If TX_DIFFMODE=1, Ignored.
78828                            If TX_DIFFMODE=0, OE for DPM only. 0 - DPM in Hi-Z state; 1 - DPM driving</description>
78829                        <bitRange>[9:9]</bitRange>
78830                        <access>read-write</access>
78831                    </field>
78832                    <field>
78833                        <name>TX_DP_OE</name>
78834                        <description>Output enable. If TX_DIFFMODE=1, OE for DPP/DPM diff pair. 0 - DPP/DPM in Hi-Z state; 1 - DPP/DPM driving
78835                            If TX_DIFFMODE=0, OE for DPP only. 0 - DPP in Hi-Z state; 1 - DPP driving</description>
78836                        <bitRange>[8:8]</bitRange>
78837                        <access>read-write</access>
78838                    </field>
78839                    <field>
78840                        <name>DM_PULLDN_EN</name>
78841                        <description>DM pull down enable</description>
78842                        <bitRange>[6:6]</bitRange>
78843                        <access>read-write</access>
78844                    </field>
78845                    <field>
78846                        <name>DM_PULLUP_EN</name>
78847                        <description>DM pull up enable</description>
78848                        <bitRange>[5:5]</bitRange>
78849                        <access>read-write</access>
78850                    </field>
78851                    <field>
78852                        <name>DM_PULLUP_HISEL</name>
78853                        <description>Enable the second DM pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2</description>
78854                        <bitRange>[4:4]</bitRange>
78855                        <access>read-write</access>
78856                    </field>
78857                    <field>
78858                        <name>DP_PULLDN_EN</name>
78859                        <description>DP pull down enable</description>
78860                        <bitRange>[2:2]</bitRange>
78861                        <access>read-write</access>
78862                    </field>
78863                    <field>
78864                        <name>DP_PULLUP_EN</name>
78865                        <description>DP pull up enable</description>
78866                        <bitRange>[1:1]</bitRange>
78867                        <access>read-write</access>
78868                    </field>
78869                    <field>
78870                        <name>DP_PULLUP_HISEL</name>
78871                        <description>Enable the second DP pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2</description>
78872                        <bitRange>[0:0]</bitRange>
78873                        <access>read-write</access>
78874                    </field>
78875                </fields>
78876            </register>
78877            <register>
78878                <name>USBPHY_DIRECT_OVERRIDE</name>
78879                <addressOffset>0x00000080</addressOffset>
78880                <description>Override enable for each control in usbphy_direct</description>
78881                <resetValue>0x00000000</resetValue>
78882                <fields>
78883                    <field>
78884                        <name>RX_DM_OVERRIDE_EN</name>
78885                        <bitRange>[18:18]</bitRange>
78886                        <access>read-write</access>
78887                    </field>
78888                    <field>
78889                        <name>RX_DP_OVERRIDE_EN</name>
78890                        <bitRange>[17:17]</bitRange>
78891                        <access>read-write</access>
78892                    </field>
78893                    <field>
78894                        <name>RX_DD_OVERRIDE_EN</name>
78895                        <bitRange>[16:16]</bitRange>
78896                        <access>read-write</access>
78897                    </field>
78898                    <field>
78899                        <name>TX_DIFFMODE_OVERRIDE_EN</name>
78900                        <bitRange>[15:15]</bitRange>
78901                        <access>read-write</access>
78902                    </field>
78903                    <field>
78904                        <name>DM_PULLUP_OVERRIDE_EN</name>
78905                        <bitRange>[12:12]</bitRange>
78906                        <access>read-write</access>
78907                    </field>
78908                    <field>
78909                        <name>TX_FSSLEW_OVERRIDE_EN</name>
78910                        <bitRange>[11:11]</bitRange>
78911                        <access>read-write</access>
78912                    </field>
78913                    <field>
78914                        <name>TX_PD_OVERRIDE_EN</name>
78915                        <bitRange>[10:10]</bitRange>
78916                        <access>read-write</access>
78917                    </field>
78918                    <field>
78919                        <name>RX_PD_OVERRIDE_EN</name>
78920                        <bitRange>[9:9]</bitRange>
78921                        <access>read-write</access>
78922                    </field>
78923                    <field>
78924                        <name>TX_DM_OVERRIDE_EN</name>
78925                        <bitRange>[8:8]</bitRange>
78926                        <access>read-write</access>
78927                    </field>
78928                    <field>
78929                        <name>TX_DP_OVERRIDE_EN</name>
78930                        <bitRange>[7:7]</bitRange>
78931                        <access>read-write</access>
78932                    </field>
78933                    <field>
78934                        <name>TX_DM_OE_OVERRIDE_EN</name>
78935                        <bitRange>[6:6]</bitRange>
78936                        <access>read-write</access>
78937                    </field>
78938                    <field>
78939                        <name>TX_DP_OE_OVERRIDE_EN</name>
78940                        <bitRange>[5:5]</bitRange>
78941                        <access>read-write</access>
78942                    </field>
78943                    <field>
78944                        <name>DM_PULLDN_EN_OVERRIDE_EN</name>
78945                        <bitRange>[4:4]</bitRange>
78946                        <access>read-write</access>
78947                    </field>
78948                    <field>
78949                        <name>DP_PULLDN_EN_OVERRIDE_EN</name>
78950                        <bitRange>[3:3]</bitRange>
78951                        <access>read-write</access>
78952                    </field>
78953                    <field>
78954                        <name>DP_PULLUP_EN_OVERRIDE_EN</name>
78955                        <bitRange>[2:2]</bitRange>
78956                        <access>read-write</access>
78957                    </field>
78958                    <field>
78959                        <name>DM_PULLUP_HISEL_OVERRIDE_EN</name>
78960                        <bitRange>[1:1]</bitRange>
78961                        <access>read-write</access>
78962                    </field>
78963                    <field>
78964                        <name>DP_PULLUP_HISEL_OVERRIDE_EN</name>
78965                        <bitRange>[0:0]</bitRange>
78966                        <access>read-write</access>
78967                    </field>
78968                </fields>
78969            </register>
78970            <register>
78971                <name>USBPHY_TRIM</name>
78972                <addressOffset>0x00000084</addressOffset>
78973                <description>Used to adjust trim values of USB phy pull down resistors.</description>
78974                <resetValue>0x00001f1f</resetValue>
78975                <fields>
78976                    <field>
78977                        <name>DM_PULLDN_TRIM</name>
78978                        <description>Value to drive to USB PHY
78979                            DM pulldown resistor trim control
78980                            Experimental data suggests that the reset value will work, but this register allows adjustment if required</description>
78981                        <bitRange>[12:8]</bitRange>
78982                        <access>read-write</access>
78983                    </field>
78984                    <field>
78985                        <name>DP_PULLDN_TRIM</name>
78986                        <description>Value to drive to USB PHY
78987                            DP pulldown resistor trim control
78988                            Experimental data suggests that the reset value will work, but this register allows adjustment if required</description>
78989                        <bitRange>[4:0]</bitRange>
78990                        <access>read-write</access>
78991                    </field>
78992                </fields>
78993            </register>
78994            <register>
78995                <name>LINESTATE_TUNING</name>
78996                <addressOffset>0x00000088</addressOffset>
78997                <description>Used for debug only.</description>
78998                <resetValue>0x000000f8</resetValue>
78999                <fields>
79000                    <field>
79001                        <name>SPARE_FIX</name>
79002                        <bitRange>[11:8]</bitRange>
79003                        <access>read-write</access>
79004                    </field>
79005                    <field>
79006                        <name>DEV_LS_WAKE_FIX</name>
79007                        <description>Device - exit suspend on any non-idle signalling, not qualified with a 1ms timer</description>
79008                        <bitRange>[7:7]</bitRange>
79009                        <access>read-write</access>
79010                    </field>
79011                    <field>
79012                        <name>DEV_RX_ERR_QUIESCE</name>
79013                        <description>Device - suppress repeated errors until the device FSM is next in the process of decoding an inbound packet.</description>
79014                        <bitRange>[6:6]</bitRange>
79015                        <access>read-write</access>
79016                    </field>
79017                    <field>
79018                        <name>SIE_RX_CHATTER_SE0_FIX</name>
79019                        <description>RX - when recovering from line chatter or bitstuff errors, treat SE0 as the end of chatter as well as
79020                            8 consecutive idle bits.</description>
79021                        <bitRange>[5:5]</bitRange>
79022                        <access>read-write</access>
79023                    </field>
79024                    <field>
79025                        <name>SIE_RX_BITSTUFF_FIX</name>
79026                        <description>RX - when a bitstuff error is signalled by rx_dasm, unconditionally terminate RX decode to
79027                            avoid a hang during certain packet phases.</description>
79028                        <bitRange>[4:4]</bitRange>
79029                        <access>read-write</access>
79030                    </field>
79031                    <field>
79032                        <name>DEV_BUFF_CONTROL_DOUBLE_READ_FIX</name>
79033                        <description>Device - the controller FSM performs two reads of the buffer status memory address to
79034                            avoid sampling metastable data. An enabled buffer is only used if both reads match.</description>
79035                        <bitRange>[3:3]</bitRange>
79036                        <access>read-write</access>
79037                    </field>
79038                    <field>
79039                        <name>MULTI_HUB_FIX</name>
79040                        <description>Host - increase inter-packet and turnaround timeouts to accommodate worst-case hub delays.</description>
79041                        <bitRange>[2:2]</bitRange>
79042                        <access>read-write</access>
79043                    </field>
79044                    <field>
79045                        <name>LINESTATE_DELAY</name>
79046                        <description>Device/Host - add an extra 1-bit debounce of linestate sampling.</description>
79047                        <bitRange>[1:1]</bitRange>
79048                        <access>read-write</access>
79049                    </field>
79050                    <field>
79051                        <name>RCV_DELAY</name>
79052                        <description>Device - register the received data to account for hub bit dribble before EOP. Only affects certain hubs.</description>
79053                        <bitRange>[0:0]</bitRange>
79054                        <access>read-write</access>
79055                    </field>
79056                </fields>
79057            </register>
79058            <register>
79059                <name>INTR</name>
79060                <addressOffset>0x0000008c</addressOffset>
79061                <description>Raw Interrupts</description>
79062                <resetValue>0x00000000</resetValue>
79063                <fields>
79064                    <field>
79065                        <name>EPX_STOPPED_ON_NAK</name>
79066                        <description>Source: NAK_POLL.EPX_STOPPED_ON_NAK</description>
79067                        <bitRange>[23:23]</bitRange>
79068                        <access>read-only</access>
79069                    </field>
79070                    <field>
79071                        <name>DEV_SM_WATCHDOG_FIRED</name>
79072                        <description>Source: DEV_SM_WATCHDOG.FIRED</description>
79073                        <bitRange>[22:22]</bitRange>
79074                        <access>read-only</access>
79075                    </field>
79076                    <field>
79077                        <name>ENDPOINT_ERROR</name>
79078                        <description>Source: SIE_STATUS.ENDPOINT_ERROR</description>
79079                        <bitRange>[21:21]</bitRange>
79080                        <access>read-only</access>
79081                    </field>
79082                    <field>
79083                        <name>RX_SHORT_PACKET</name>
79084                        <description>Source: SIE_STATUS.RX_SHORT_PACKET</description>
79085                        <bitRange>[20:20]</bitRange>
79086                        <access>read-only</access>
79087                    </field>
79088                    <field>
79089                        <name>EP_STALL_NAK</name>
79090                        <description>Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK.</description>
79091                        <bitRange>[19:19]</bitRange>
79092                        <access>read-only</access>
79093                    </field>
79094                    <field>
79095                        <name>ABORT_DONE</name>
79096                        <description>Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE.</description>
79097                        <bitRange>[18:18]</bitRange>
79098                        <access>read-only</access>
79099                    </field>
79100                    <field>
79101                        <name>DEV_SOF</name>
79102                        <description>Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD</description>
79103                        <bitRange>[17:17]</bitRange>
79104                        <access>read-only</access>
79105                    </field>
79106                    <field>
79107                        <name>SETUP_REQ</name>
79108                        <description>Device. Source: SIE_STATUS.SETUP_REC</description>
79109                        <bitRange>[16:16]</bitRange>
79110                        <access>read-only</access>
79111                    </field>
79112                    <field>
79113                        <name>DEV_RESUME_FROM_HOST</name>
79114                        <description>Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME</description>
79115                        <bitRange>[15:15]</bitRange>
79116                        <access>read-only</access>
79117                    </field>
79118                    <field>
79119                        <name>DEV_SUSPEND</name>
79120                        <description>Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED</description>
79121                        <bitRange>[14:14]</bitRange>
79122                        <access>read-only</access>
79123                    </field>
79124                    <field>
79125                        <name>DEV_CONN_DIS</name>
79126                        <description>Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED</description>
79127                        <bitRange>[13:13]</bitRange>
79128                        <access>read-only</access>
79129                    </field>
79130                    <field>
79131                        <name>BUS_RESET</name>
79132                        <description>Source: SIE_STATUS.BUS_RESET</description>
79133                        <bitRange>[12:12]</bitRange>
79134                        <access>read-only</access>
79135                    </field>
79136                    <field>
79137                        <name>VBUS_DETECT</name>
79138                        <description>Source: SIE_STATUS.VBUS_DETECTED</description>
79139                        <bitRange>[11:11]</bitRange>
79140                        <access>read-only</access>
79141                    </field>
79142                    <field>
79143                        <name>STALL</name>
79144                        <description>Source: SIE_STATUS.STALL_REC</description>
79145                        <bitRange>[10:10]</bitRange>
79146                        <access>read-only</access>
79147                    </field>
79148                    <field>
79149                        <name>ERROR_CRC</name>
79150                        <description>Source: SIE_STATUS.CRC_ERROR</description>
79151                        <bitRange>[9:9]</bitRange>
79152                        <access>read-only</access>
79153                    </field>
79154                    <field>
79155                        <name>ERROR_BIT_STUFF</name>
79156                        <description>Source: SIE_STATUS.BIT_STUFF_ERROR</description>
79157                        <bitRange>[8:8]</bitRange>
79158                        <access>read-only</access>
79159                    </field>
79160                    <field>
79161                        <name>ERROR_RX_OVERFLOW</name>
79162                        <description>Source: SIE_STATUS.RX_OVERFLOW</description>
79163                        <bitRange>[7:7]</bitRange>
79164                        <access>read-only</access>
79165                    </field>
79166                    <field>
79167                        <name>ERROR_RX_TIMEOUT</name>
79168                        <description>Source: SIE_STATUS.RX_TIMEOUT</description>
79169                        <bitRange>[6:6]</bitRange>
79170                        <access>read-only</access>
79171                    </field>
79172                    <field>
79173                        <name>ERROR_DATA_SEQ</name>
79174                        <description>Source: SIE_STATUS.DATA_SEQ_ERROR</description>
79175                        <bitRange>[5:5]</bitRange>
79176                        <access>read-only</access>
79177                    </field>
79178                    <field>
79179                        <name>BUFF_STATUS</name>
79180                        <description>Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS.</description>
79181                        <bitRange>[4:4]</bitRange>
79182                        <access>read-only</access>
79183                    </field>
79184                    <field>
79185                        <name>TRANS_COMPLETE</name>
79186                        <description>Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit.</description>
79187                        <bitRange>[3:3]</bitRange>
79188                        <access>read-only</access>
79189                    </field>
79190                    <field>
79191                        <name>HOST_SOF</name>
79192                        <description>Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD</description>
79193                        <bitRange>[2:2]</bitRange>
79194                        <access>read-only</access>
79195                    </field>
79196                    <field>
79197                        <name>HOST_RESUME</name>
79198                        <description>Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME</description>
79199                        <bitRange>[1:1]</bitRange>
79200                        <access>read-only</access>
79201                    </field>
79202                    <field>
79203                        <name>HOST_CONN_DIS</name>
79204                        <description>Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED</description>
79205                        <bitRange>[0:0]</bitRange>
79206                        <access>read-only</access>
79207                    </field>
79208                </fields>
79209            </register>
79210            <register>
79211                <name>INTE</name>
79212                <addressOffset>0x00000090</addressOffset>
79213                <description>Interrupt Enable</description>
79214                <resetValue>0x00000000</resetValue>
79215                <fields>
79216                    <field>
79217                        <name>EPX_STOPPED_ON_NAK</name>
79218                        <description>Source: NAK_POLL.EPX_STOPPED_ON_NAK</description>
79219                        <bitRange>[23:23]</bitRange>
79220                        <access>read-write</access>
79221                    </field>
79222                    <field>
79223                        <name>DEV_SM_WATCHDOG_FIRED</name>
79224                        <description>Source: DEV_SM_WATCHDOG.FIRED</description>
79225                        <bitRange>[22:22]</bitRange>
79226                        <access>read-write</access>
79227                    </field>
79228                    <field>
79229                        <name>ENDPOINT_ERROR</name>
79230                        <description>Source: SIE_STATUS.ENDPOINT_ERROR</description>
79231                        <bitRange>[21:21]</bitRange>
79232                        <access>read-write</access>
79233                    </field>
79234                    <field>
79235                        <name>RX_SHORT_PACKET</name>
79236                        <description>Source: SIE_STATUS.RX_SHORT_PACKET</description>
79237                        <bitRange>[20:20]</bitRange>
79238                        <access>read-write</access>
79239                    </field>
79240                    <field>
79241                        <name>EP_STALL_NAK</name>
79242                        <description>Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK.</description>
79243                        <bitRange>[19:19]</bitRange>
79244                        <access>read-write</access>
79245                    </field>
79246                    <field>
79247                        <name>ABORT_DONE</name>
79248                        <description>Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE.</description>
79249                        <bitRange>[18:18]</bitRange>
79250                        <access>read-write</access>
79251                    </field>
79252                    <field>
79253                        <name>DEV_SOF</name>
79254                        <description>Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD</description>
79255                        <bitRange>[17:17]</bitRange>
79256                        <access>read-write</access>
79257                    </field>
79258                    <field>
79259                        <name>SETUP_REQ</name>
79260                        <description>Device. Source: SIE_STATUS.SETUP_REC</description>
79261                        <bitRange>[16:16]</bitRange>
79262                        <access>read-write</access>
79263                    </field>
79264                    <field>
79265                        <name>DEV_RESUME_FROM_HOST</name>
79266                        <description>Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME</description>
79267                        <bitRange>[15:15]</bitRange>
79268                        <access>read-write</access>
79269                    </field>
79270                    <field>
79271                        <name>DEV_SUSPEND</name>
79272                        <description>Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED</description>
79273                        <bitRange>[14:14]</bitRange>
79274                        <access>read-write</access>
79275                    </field>
79276                    <field>
79277                        <name>DEV_CONN_DIS</name>
79278                        <description>Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED</description>
79279                        <bitRange>[13:13]</bitRange>
79280                        <access>read-write</access>
79281                    </field>
79282                    <field>
79283                        <name>BUS_RESET</name>
79284                        <description>Source: SIE_STATUS.BUS_RESET</description>
79285                        <bitRange>[12:12]</bitRange>
79286                        <access>read-write</access>
79287                    </field>
79288                    <field>
79289                        <name>VBUS_DETECT</name>
79290                        <description>Source: SIE_STATUS.VBUS_DETECTED</description>
79291                        <bitRange>[11:11]</bitRange>
79292                        <access>read-write</access>
79293                    </field>
79294                    <field>
79295                        <name>STALL</name>
79296                        <description>Source: SIE_STATUS.STALL_REC</description>
79297                        <bitRange>[10:10]</bitRange>
79298                        <access>read-write</access>
79299                    </field>
79300                    <field>
79301                        <name>ERROR_CRC</name>
79302                        <description>Source: SIE_STATUS.CRC_ERROR</description>
79303                        <bitRange>[9:9]</bitRange>
79304                        <access>read-write</access>
79305                    </field>
79306                    <field>
79307                        <name>ERROR_BIT_STUFF</name>
79308                        <description>Source: SIE_STATUS.BIT_STUFF_ERROR</description>
79309                        <bitRange>[8:8]</bitRange>
79310                        <access>read-write</access>
79311                    </field>
79312                    <field>
79313                        <name>ERROR_RX_OVERFLOW</name>
79314                        <description>Source: SIE_STATUS.RX_OVERFLOW</description>
79315                        <bitRange>[7:7]</bitRange>
79316                        <access>read-write</access>
79317                    </field>
79318                    <field>
79319                        <name>ERROR_RX_TIMEOUT</name>
79320                        <description>Source: SIE_STATUS.RX_TIMEOUT</description>
79321                        <bitRange>[6:6]</bitRange>
79322                        <access>read-write</access>
79323                    </field>
79324                    <field>
79325                        <name>ERROR_DATA_SEQ</name>
79326                        <description>Source: SIE_STATUS.DATA_SEQ_ERROR</description>
79327                        <bitRange>[5:5]</bitRange>
79328                        <access>read-write</access>
79329                    </field>
79330                    <field>
79331                        <name>BUFF_STATUS</name>
79332                        <description>Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS.</description>
79333                        <bitRange>[4:4]</bitRange>
79334                        <access>read-write</access>
79335                    </field>
79336                    <field>
79337                        <name>TRANS_COMPLETE</name>
79338                        <description>Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit.</description>
79339                        <bitRange>[3:3]</bitRange>
79340                        <access>read-write</access>
79341                    </field>
79342                    <field>
79343                        <name>HOST_SOF</name>
79344                        <description>Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD</description>
79345                        <bitRange>[2:2]</bitRange>
79346                        <access>read-write</access>
79347                    </field>
79348                    <field>
79349                        <name>HOST_RESUME</name>
79350                        <description>Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME</description>
79351                        <bitRange>[1:1]</bitRange>
79352                        <access>read-write</access>
79353                    </field>
79354                    <field>
79355                        <name>HOST_CONN_DIS</name>
79356                        <description>Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED</description>
79357                        <bitRange>[0:0]</bitRange>
79358                        <access>read-write</access>
79359                    </field>
79360                </fields>
79361            </register>
79362            <register>
79363                <name>INTF</name>
79364                <addressOffset>0x00000094</addressOffset>
79365                <description>Interrupt Force</description>
79366                <resetValue>0x00000000</resetValue>
79367                <fields>
79368                    <field>
79369                        <name>EPX_STOPPED_ON_NAK</name>
79370                        <description>Source: NAK_POLL.EPX_STOPPED_ON_NAK</description>
79371                        <bitRange>[23:23]</bitRange>
79372                        <access>read-write</access>
79373                    </field>
79374                    <field>
79375                        <name>DEV_SM_WATCHDOG_FIRED</name>
79376                        <description>Source: DEV_SM_WATCHDOG.FIRED</description>
79377                        <bitRange>[22:22]</bitRange>
79378                        <access>read-write</access>
79379                    </field>
79380                    <field>
79381                        <name>ENDPOINT_ERROR</name>
79382                        <description>Source: SIE_STATUS.ENDPOINT_ERROR</description>
79383                        <bitRange>[21:21]</bitRange>
79384                        <access>read-write</access>
79385                    </field>
79386                    <field>
79387                        <name>RX_SHORT_PACKET</name>
79388                        <description>Source: SIE_STATUS.RX_SHORT_PACKET</description>
79389                        <bitRange>[20:20]</bitRange>
79390                        <access>read-write</access>
79391                    </field>
79392                    <field>
79393                        <name>EP_STALL_NAK</name>
79394                        <description>Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK.</description>
79395                        <bitRange>[19:19]</bitRange>
79396                        <access>read-write</access>
79397                    </field>
79398                    <field>
79399                        <name>ABORT_DONE</name>
79400                        <description>Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE.</description>
79401                        <bitRange>[18:18]</bitRange>
79402                        <access>read-write</access>
79403                    </field>
79404                    <field>
79405                        <name>DEV_SOF</name>
79406                        <description>Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD</description>
79407                        <bitRange>[17:17]</bitRange>
79408                        <access>read-write</access>
79409                    </field>
79410                    <field>
79411                        <name>SETUP_REQ</name>
79412                        <description>Device. Source: SIE_STATUS.SETUP_REC</description>
79413                        <bitRange>[16:16]</bitRange>
79414                        <access>read-write</access>
79415                    </field>
79416                    <field>
79417                        <name>DEV_RESUME_FROM_HOST</name>
79418                        <description>Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME</description>
79419                        <bitRange>[15:15]</bitRange>
79420                        <access>read-write</access>
79421                    </field>
79422                    <field>
79423                        <name>DEV_SUSPEND</name>
79424                        <description>Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED</description>
79425                        <bitRange>[14:14]</bitRange>
79426                        <access>read-write</access>
79427                    </field>
79428                    <field>
79429                        <name>DEV_CONN_DIS</name>
79430                        <description>Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED</description>
79431                        <bitRange>[13:13]</bitRange>
79432                        <access>read-write</access>
79433                    </field>
79434                    <field>
79435                        <name>BUS_RESET</name>
79436                        <description>Source: SIE_STATUS.BUS_RESET</description>
79437                        <bitRange>[12:12]</bitRange>
79438                        <access>read-write</access>
79439                    </field>
79440                    <field>
79441                        <name>VBUS_DETECT</name>
79442                        <description>Source: SIE_STATUS.VBUS_DETECTED</description>
79443                        <bitRange>[11:11]</bitRange>
79444                        <access>read-write</access>
79445                    </field>
79446                    <field>
79447                        <name>STALL</name>
79448                        <description>Source: SIE_STATUS.STALL_REC</description>
79449                        <bitRange>[10:10]</bitRange>
79450                        <access>read-write</access>
79451                    </field>
79452                    <field>
79453                        <name>ERROR_CRC</name>
79454                        <description>Source: SIE_STATUS.CRC_ERROR</description>
79455                        <bitRange>[9:9]</bitRange>
79456                        <access>read-write</access>
79457                    </field>
79458                    <field>
79459                        <name>ERROR_BIT_STUFF</name>
79460                        <description>Source: SIE_STATUS.BIT_STUFF_ERROR</description>
79461                        <bitRange>[8:8]</bitRange>
79462                        <access>read-write</access>
79463                    </field>
79464                    <field>
79465                        <name>ERROR_RX_OVERFLOW</name>
79466                        <description>Source: SIE_STATUS.RX_OVERFLOW</description>
79467                        <bitRange>[7:7]</bitRange>
79468                        <access>read-write</access>
79469                    </field>
79470                    <field>
79471                        <name>ERROR_RX_TIMEOUT</name>
79472                        <description>Source: SIE_STATUS.RX_TIMEOUT</description>
79473                        <bitRange>[6:6]</bitRange>
79474                        <access>read-write</access>
79475                    </field>
79476                    <field>
79477                        <name>ERROR_DATA_SEQ</name>
79478                        <description>Source: SIE_STATUS.DATA_SEQ_ERROR</description>
79479                        <bitRange>[5:5]</bitRange>
79480                        <access>read-write</access>
79481                    </field>
79482                    <field>
79483                        <name>BUFF_STATUS</name>
79484                        <description>Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS.</description>
79485                        <bitRange>[4:4]</bitRange>
79486                        <access>read-write</access>
79487                    </field>
79488                    <field>
79489                        <name>TRANS_COMPLETE</name>
79490                        <description>Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit.</description>
79491                        <bitRange>[3:3]</bitRange>
79492                        <access>read-write</access>
79493                    </field>
79494                    <field>
79495                        <name>HOST_SOF</name>
79496                        <description>Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD</description>
79497                        <bitRange>[2:2]</bitRange>
79498                        <access>read-write</access>
79499                    </field>
79500                    <field>
79501                        <name>HOST_RESUME</name>
79502                        <description>Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME</description>
79503                        <bitRange>[1:1]</bitRange>
79504                        <access>read-write</access>
79505                    </field>
79506                    <field>
79507                        <name>HOST_CONN_DIS</name>
79508                        <description>Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED</description>
79509                        <bitRange>[0:0]</bitRange>
79510                        <access>read-write</access>
79511                    </field>
79512                </fields>
79513            </register>
79514            <register>
79515                <name>INTS</name>
79516                <addressOffset>0x00000098</addressOffset>
79517                <description>Interrupt status after masking &amp; forcing</description>
79518                <resetValue>0x00000000</resetValue>
79519                <fields>
79520                    <field>
79521                        <name>EPX_STOPPED_ON_NAK</name>
79522                        <description>Source: NAK_POLL.EPX_STOPPED_ON_NAK</description>
79523                        <bitRange>[23:23]</bitRange>
79524                        <access>read-only</access>
79525                    </field>
79526                    <field>
79527                        <name>DEV_SM_WATCHDOG_FIRED</name>
79528                        <description>Source: DEV_SM_WATCHDOG.FIRED</description>
79529                        <bitRange>[22:22]</bitRange>
79530                        <access>read-only</access>
79531                    </field>
79532                    <field>
79533                        <name>ENDPOINT_ERROR</name>
79534                        <description>Source: SIE_STATUS.ENDPOINT_ERROR</description>
79535                        <bitRange>[21:21]</bitRange>
79536                        <access>read-only</access>
79537                    </field>
79538                    <field>
79539                        <name>RX_SHORT_PACKET</name>
79540                        <description>Source: SIE_STATUS.RX_SHORT_PACKET</description>
79541                        <bitRange>[20:20]</bitRange>
79542                        <access>read-only</access>
79543                    </field>
79544                    <field>
79545                        <name>EP_STALL_NAK</name>
79546                        <description>Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK.</description>
79547                        <bitRange>[19:19]</bitRange>
79548                        <access>read-only</access>
79549                    </field>
79550                    <field>
79551                        <name>ABORT_DONE</name>
79552                        <description>Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE.</description>
79553                        <bitRange>[18:18]</bitRange>
79554                        <access>read-only</access>
79555                    </field>
79556                    <field>
79557                        <name>DEV_SOF</name>
79558                        <description>Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD</description>
79559                        <bitRange>[17:17]</bitRange>
79560                        <access>read-only</access>
79561                    </field>
79562                    <field>
79563                        <name>SETUP_REQ</name>
79564                        <description>Device. Source: SIE_STATUS.SETUP_REC</description>
79565                        <bitRange>[16:16]</bitRange>
79566                        <access>read-only</access>
79567                    </field>
79568                    <field>
79569                        <name>DEV_RESUME_FROM_HOST</name>
79570                        <description>Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME</description>
79571                        <bitRange>[15:15]</bitRange>
79572                        <access>read-only</access>
79573                    </field>
79574                    <field>
79575                        <name>DEV_SUSPEND</name>
79576                        <description>Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED</description>
79577                        <bitRange>[14:14]</bitRange>
79578                        <access>read-only</access>
79579                    </field>
79580                    <field>
79581                        <name>DEV_CONN_DIS</name>
79582                        <description>Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED</description>
79583                        <bitRange>[13:13]</bitRange>
79584                        <access>read-only</access>
79585                    </field>
79586                    <field>
79587                        <name>BUS_RESET</name>
79588                        <description>Source: SIE_STATUS.BUS_RESET</description>
79589                        <bitRange>[12:12]</bitRange>
79590                        <access>read-only</access>
79591                    </field>
79592                    <field>
79593                        <name>VBUS_DETECT</name>
79594                        <description>Source: SIE_STATUS.VBUS_DETECTED</description>
79595                        <bitRange>[11:11]</bitRange>
79596                        <access>read-only</access>
79597                    </field>
79598                    <field>
79599                        <name>STALL</name>
79600                        <description>Source: SIE_STATUS.STALL_REC</description>
79601                        <bitRange>[10:10]</bitRange>
79602                        <access>read-only</access>
79603                    </field>
79604                    <field>
79605                        <name>ERROR_CRC</name>
79606                        <description>Source: SIE_STATUS.CRC_ERROR</description>
79607                        <bitRange>[9:9]</bitRange>
79608                        <access>read-only</access>
79609                    </field>
79610                    <field>
79611                        <name>ERROR_BIT_STUFF</name>
79612                        <description>Source: SIE_STATUS.BIT_STUFF_ERROR</description>
79613                        <bitRange>[8:8]</bitRange>
79614                        <access>read-only</access>
79615                    </field>
79616                    <field>
79617                        <name>ERROR_RX_OVERFLOW</name>
79618                        <description>Source: SIE_STATUS.RX_OVERFLOW</description>
79619                        <bitRange>[7:7]</bitRange>
79620                        <access>read-only</access>
79621                    </field>
79622                    <field>
79623                        <name>ERROR_RX_TIMEOUT</name>
79624                        <description>Source: SIE_STATUS.RX_TIMEOUT</description>
79625                        <bitRange>[6:6]</bitRange>
79626                        <access>read-only</access>
79627                    </field>
79628                    <field>
79629                        <name>ERROR_DATA_SEQ</name>
79630                        <description>Source: SIE_STATUS.DATA_SEQ_ERROR</description>
79631                        <bitRange>[5:5]</bitRange>
79632                        <access>read-only</access>
79633                    </field>
79634                    <field>
79635                        <name>BUFF_STATUS</name>
79636                        <description>Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS.</description>
79637                        <bitRange>[4:4]</bitRange>
79638                        <access>read-only</access>
79639                    </field>
79640                    <field>
79641                        <name>TRANS_COMPLETE</name>
79642                        <description>Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit.</description>
79643                        <bitRange>[3:3]</bitRange>
79644                        <access>read-only</access>
79645                    </field>
79646                    <field>
79647                        <name>HOST_SOF</name>
79648                        <description>Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD</description>
79649                        <bitRange>[2:2]</bitRange>
79650                        <access>read-only</access>
79651                    </field>
79652                    <field>
79653                        <name>HOST_RESUME</name>
79654                        <description>Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME</description>
79655                        <bitRange>[1:1]</bitRange>
79656                        <access>read-only</access>
79657                    </field>
79658                    <field>
79659                        <name>HOST_CONN_DIS</name>
79660                        <description>Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED</description>
79661                        <bitRange>[0:0]</bitRange>
79662                        <access>read-only</access>
79663                    </field>
79664                </fields>
79665            </register>
79666            <register>
79667                <name>SOF_TIMESTAMP_RAW</name>
79668                <addressOffset>0x00000100</addressOffset>
79669                <description>Device only. Raw value of free-running PHY clock counter @48MHz. Used to calculate time between SOF events.</description>
79670                <resetValue>0x00000000</resetValue>
79671                <fields>
79672                    <field>
79673                        <name>SOF_TIMESTAMP_RAW</name>
79674                        <bitRange>[20:0]</bitRange>
79675                        <access>read-only</access>
79676                    </field>
79677                </fields>
79678            </register>
79679            <register>
79680                <name>SOF_TIMESTAMP_LAST</name>
79681                <addressOffset>0x00000104</addressOffset>
79682                <description>Device only. Value of free-running PHY clock counter @48MHz when last SOF event occurred.</description>
79683                <resetValue>0x00000000</resetValue>
79684                <fields>
79685                    <field>
79686                        <name>SOF_TIMESTAMP_LAST</name>
79687                        <bitRange>[20:0]</bitRange>
79688                        <access>read-only</access>
79689                    </field>
79690                </fields>
79691            </register>
79692            <register>
79693                <name>SM_STATE</name>
79694                <addressOffset>0x00000108</addressOffset>
79695                <resetValue>0x00000000</resetValue>
79696                <fields>
79697                    <field>
79698                        <name>RX_DASM</name>
79699                        <bitRange>[11:8]</bitRange>
79700                        <access>read-only</access>
79701                    </field>
79702                    <field>
79703                        <name>BC_STATE</name>
79704                        <bitRange>[7:5]</bitRange>
79705                        <access>read-only</access>
79706                    </field>
79707                    <field>
79708                        <name>STATE</name>
79709                        <bitRange>[4:0]</bitRange>
79710                        <access>read-only</access>
79711                    </field>
79712                </fields>
79713            </register>
79714            <register>
79715                <name>EP_TX_ERROR</name>
79716                <addressOffset>0x0000010c</addressOffset>
79717                <description>TX error count for each endpoint. Write to each field to reset the counter to 0.</description>
79718                <resetValue>0x00000000</resetValue>
79719                <fields>
79720                    <field>
79721                        <name>EP15</name>
79722                        <bitRange>[31:30]</bitRange>
79723                        <access>read-write</access>
79724                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79725                    </field>
79726                    <field>
79727                        <name>EP14</name>
79728                        <bitRange>[29:28]</bitRange>
79729                        <access>read-write</access>
79730                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79731                    </field>
79732                    <field>
79733                        <name>EP13</name>
79734                        <bitRange>[27:26]</bitRange>
79735                        <access>read-write</access>
79736                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79737                    </field>
79738                    <field>
79739                        <name>EP12</name>
79740                        <bitRange>[25:24]</bitRange>
79741                        <access>read-write</access>
79742                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79743                    </field>
79744                    <field>
79745                        <name>EP11</name>
79746                        <bitRange>[23:22]</bitRange>
79747                        <access>read-write</access>
79748                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79749                    </field>
79750                    <field>
79751                        <name>EP10</name>
79752                        <bitRange>[21:20]</bitRange>
79753                        <access>read-write</access>
79754                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79755                    </field>
79756                    <field>
79757                        <name>EP9</name>
79758                        <bitRange>[19:18]</bitRange>
79759                        <access>read-write</access>
79760                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79761                    </field>
79762                    <field>
79763                        <name>EP8</name>
79764                        <bitRange>[17:16]</bitRange>
79765                        <access>read-write</access>
79766                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79767                    </field>
79768                    <field>
79769                        <name>EP7</name>
79770                        <bitRange>[15:14]</bitRange>
79771                        <access>read-write</access>
79772                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79773                    </field>
79774                    <field>
79775                        <name>EP6</name>
79776                        <bitRange>[13:12]</bitRange>
79777                        <access>read-write</access>
79778                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79779                    </field>
79780                    <field>
79781                        <name>EP5</name>
79782                        <bitRange>[11:10]</bitRange>
79783                        <access>read-write</access>
79784                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79785                    </field>
79786                    <field>
79787                        <name>EP4</name>
79788                        <bitRange>[9:8]</bitRange>
79789                        <access>read-write</access>
79790                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79791                    </field>
79792                    <field>
79793                        <name>EP3</name>
79794                        <bitRange>[7:6]</bitRange>
79795                        <access>read-write</access>
79796                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79797                    </field>
79798                    <field>
79799                        <name>EP2</name>
79800                        <bitRange>[5:4]</bitRange>
79801                        <access>read-write</access>
79802                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79803                    </field>
79804                    <field>
79805                        <name>EP1</name>
79806                        <bitRange>[3:2]</bitRange>
79807                        <access>read-write</access>
79808                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79809                    </field>
79810                    <field>
79811                        <name>EP0</name>
79812                        <bitRange>[1:0]</bitRange>
79813                        <access>read-write</access>
79814                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79815                    </field>
79816                </fields>
79817            </register>
79818            <register>
79819                <name>EP_RX_ERROR</name>
79820                <addressOffset>0x00000110</addressOffset>
79821                <description>RX error count for each endpoint. Write to each field to reset the counter to 0.</description>
79822                <resetValue>0x00000000</resetValue>
79823                <fields>
79824                    <field>
79825                        <name>EP15_SEQ</name>
79826                        <bitRange>[31:31]</bitRange>
79827                        <access>read-write</access>
79828                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79829                    </field>
79830                    <field>
79831                        <name>EP15_TRANSACTION</name>
79832                        <bitRange>[30:30]</bitRange>
79833                        <access>read-write</access>
79834                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79835                    </field>
79836                    <field>
79837                        <name>EP14_SEQ</name>
79838                        <bitRange>[29:29]</bitRange>
79839                        <access>read-write</access>
79840                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79841                    </field>
79842                    <field>
79843                        <name>EP14_TRANSACTION</name>
79844                        <bitRange>[28:28]</bitRange>
79845                        <access>read-write</access>
79846                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79847                    </field>
79848                    <field>
79849                        <name>EP13_SEQ</name>
79850                        <bitRange>[27:27]</bitRange>
79851                        <access>read-write</access>
79852                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79853                    </field>
79854                    <field>
79855                        <name>EP13_TRANSACTION</name>
79856                        <bitRange>[26:26]</bitRange>
79857                        <access>read-write</access>
79858                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79859                    </field>
79860                    <field>
79861                        <name>EP12_SEQ</name>
79862                        <bitRange>[25:25]</bitRange>
79863                        <access>read-write</access>
79864                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79865                    </field>
79866                    <field>
79867                        <name>EP12_TRANSACTION</name>
79868                        <bitRange>[24:24]</bitRange>
79869                        <access>read-write</access>
79870                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79871                    </field>
79872                    <field>
79873                        <name>EP11_SEQ</name>
79874                        <bitRange>[23:23]</bitRange>
79875                        <access>read-write</access>
79876                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79877                    </field>
79878                    <field>
79879                        <name>EP11_TRANSACTION</name>
79880                        <bitRange>[22:22]</bitRange>
79881                        <access>read-write</access>
79882                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79883                    </field>
79884                    <field>
79885                        <name>EP10_SEQ</name>
79886                        <bitRange>[21:21]</bitRange>
79887                        <access>read-write</access>
79888                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79889                    </field>
79890                    <field>
79891                        <name>EP10_TRANSACTION</name>
79892                        <bitRange>[20:20]</bitRange>
79893                        <access>read-write</access>
79894                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79895                    </field>
79896                    <field>
79897                        <name>EP9_SEQ</name>
79898                        <bitRange>[19:19]</bitRange>
79899                        <access>read-write</access>
79900                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79901                    </field>
79902                    <field>
79903                        <name>EP9_TRANSACTION</name>
79904                        <bitRange>[18:18]</bitRange>
79905                        <access>read-write</access>
79906                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79907                    </field>
79908                    <field>
79909                        <name>EP8_SEQ</name>
79910                        <bitRange>[17:17]</bitRange>
79911                        <access>read-write</access>
79912                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79913                    </field>
79914                    <field>
79915                        <name>EP8_TRANSACTION</name>
79916                        <bitRange>[16:16]</bitRange>
79917                        <access>read-write</access>
79918                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79919                    </field>
79920                    <field>
79921                        <name>EP7_SEQ</name>
79922                        <bitRange>[15:15]</bitRange>
79923                        <access>read-write</access>
79924                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79925                    </field>
79926                    <field>
79927                        <name>EP7_TRANSACTION</name>
79928                        <bitRange>[14:14]</bitRange>
79929                        <access>read-write</access>
79930                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79931                    </field>
79932                    <field>
79933                        <name>EP6_SEQ</name>
79934                        <bitRange>[13:13]</bitRange>
79935                        <access>read-write</access>
79936                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79937                    </field>
79938                    <field>
79939                        <name>EP6_TRANSACTION</name>
79940                        <bitRange>[12:12]</bitRange>
79941                        <access>read-write</access>
79942                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79943                    </field>
79944                    <field>
79945                        <name>EP5_SEQ</name>
79946                        <bitRange>[11:11]</bitRange>
79947                        <access>read-write</access>
79948                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79949                    </field>
79950                    <field>
79951                        <name>EP5_TRANSACTION</name>
79952                        <bitRange>[10:10]</bitRange>
79953                        <access>read-write</access>
79954                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79955                    </field>
79956                    <field>
79957                        <name>EP4_SEQ</name>
79958                        <bitRange>[9:9]</bitRange>
79959                        <access>read-write</access>
79960                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79961                    </field>
79962                    <field>
79963                        <name>EP4_TRANSACTION</name>
79964                        <bitRange>[8:8]</bitRange>
79965                        <access>read-write</access>
79966                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79967                    </field>
79968                    <field>
79969                        <name>EP3_SEQ</name>
79970                        <bitRange>[7:7]</bitRange>
79971                        <access>read-write</access>
79972                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79973                    </field>
79974                    <field>
79975                        <name>EP3_TRANSACTION</name>
79976                        <bitRange>[6:6]</bitRange>
79977                        <access>read-write</access>
79978                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79979                    </field>
79980                    <field>
79981                        <name>EP2_SEQ</name>
79982                        <bitRange>[5:5]</bitRange>
79983                        <access>read-write</access>
79984                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79985                    </field>
79986                    <field>
79987                        <name>EP2_TRANSACTION</name>
79988                        <bitRange>[4:4]</bitRange>
79989                        <access>read-write</access>
79990                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79991                    </field>
79992                    <field>
79993                        <name>EP1_SEQ</name>
79994                        <bitRange>[3:3]</bitRange>
79995                        <access>read-write</access>
79996                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
79997                    </field>
79998                    <field>
79999                        <name>EP1_TRANSACTION</name>
80000                        <bitRange>[2:2]</bitRange>
80001                        <access>read-write</access>
80002                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80003                    </field>
80004                    <field>
80005                        <name>EP0_SEQ</name>
80006                        <bitRange>[1:1]</bitRange>
80007                        <access>read-write</access>
80008                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80009                    </field>
80010                    <field>
80011                        <name>EP0_TRANSACTION</name>
80012                        <bitRange>[0:0]</bitRange>
80013                        <access>read-write</access>
80014                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80015                    </field>
80016                </fields>
80017            </register>
80018            <register>
80019                <name>DEV_SM_WATCHDOG</name>
80020                <addressOffset>0x00000114</addressOffset>
80021                <description>Watchdog that forces the device state machine to idle and raises an interrupt if the device stays in a state that isn&#39;t idle for the configured limit. The counter is reset on every state transition.
80022                    Set limit while enable is low and then set the enable.</description>
80023                <resetValue>0x00000000</resetValue>
80024                <fields>
80025                    <field>
80026                        <name>FIRED</name>
80027                        <bitRange>[20:20]</bitRange>
80028                        <access>read-write</access>
80029                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80030                    </field>
80031                    <field>
80032                        <name>RESET</name>
80033                        <description>Set to 1 to forcibly reset the device state machine on watchdog expiry</description>
80034                        <bitRange>[19:19]</bitRange>
80035                        <access>read-write</access>
80036                    </field>
80037                    <field>
80038                        <name>ENABLE</name>
80039                        <bitRange>[18:18]</bitRange>
80040                        <access>read-write</access>
80041                    </field>
80042                    <field>
80043                        <name>LIMIT</name>
80044                        <bitRange>[17:0]</bitRange>
80045                        <access>read-write</access>
80046                    </field>
80047                </fields>
80048            </register>
80049        </registers>
80050    </peripheral>
80051    <peripheral>
80052        <name>TRNG</name>
80053        <description>ARM TrustZone RNG register block</description>
80054        <baseAddress>0x400f0000</baseAddress>
80055        <addressBlock>
80056            <offset>0</offset>
80057            <size>492</size>
80058            <usage>registers</usage>
80059        </addressBlock>
80060        <interrupt>
80061            <name>TRNG_IRQ</name>
80062            <value>39</value>
80063        </interrupt>
80064        <registers>
80065            <register>
80066                <name>RNG_IMR</name>
80067                <addressOffset>0x00000100</addressOffset>
80068                <description>Interrupt masking.</description>
80069                <resetValue>0x0000000f</resetValue>
80070                <fields>
80071                    <field>
80072                        <name>RESERVED</name>
80073                        <description>RESERVED</description>
80074                        <bitRange>[31:4]</bitRange>
80075                        <access>read-only</access>
80076                    </field>
80077                    <field>
80078                        <name>VN_ERR_INT_MASK</name>
80079                        <description>1&#39;b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.</description>
80080                        <bitRange>[3:3]</bitRange>
80081                        <access>read-write</access>
80082                    </field>
80083                    <field>
80084                        <name>CRNGT_ERR_INT_MASK</name>
80085                        <description>1&#39;b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.</description>
80086                        <bitRange>[2:2]</bitRange>
80087                        <access>read-write</access>
80088                    </field>
80089                    <field>
80090                        <name>AUTOCORR_ERR_INT_MASK</name>
80091                        <description>1&#39;b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.</description>
80092                        <bitRange>[1:1]</bitRange>
80093                        <access>read-write</access>
80094                    </field>
80095                    <field>
80096                        <name>EHR_VALID_INT_MASK</name>
80097                        <description>1&#39;b1-mask interrupt, no interrupt will be generated. See RNG_ISR for an explanation on this interrupt.</description>
80098                        <bitRange>[0:0]</bitRange>
80099                        <access>read-write</access>
80100                    </field>
80101                </fields>
80102            </register>
80103            <register>
80104                <name>RNG_ISR</name>
80105                <addressOffset>0x00000104</addressOffset>
80106                <description>RNG status register. If corresponding RNG_IMR bit is unmasked, an interrupt will be generated.</description>
80107                <resetValue>0x00000000</resetValue>
80108                <fields>
80109                    <field>
80110                        <name>RESERVED</name>
80111                        <description>RESERVED</description>
80112                        <bitRange>[31:4]</bitRange>
80113                        <access>read-only</access>
80114                    </field>
80115                    <field>
80116                        <name>VN_ERR</name>
80117                        <description>1&#39;b1 indicates Von Neuman error. Error in von Neuman occurs if 32 consecutive collected bits are identical, ZERO or ONE.</description>
80118                        <bitRange>[3:3]</bitRange>
80119                        <access>read-only</access>
80120                    </field>
80121                    <field>
80122                        <name>CRNGT_ERR</name>
80123                        <description>1&#39;b1 indicates CRNGT in the RNG test failed. Failure occurs when two consecutive blocks of 16 collected bits are equal.</description>
80124                        <bitRange>[2:2]</bitRange>
80125                        <access>read-only</access>
80126                    </field>
80127                    <field>
80128                        <name>AUTOCORR_ERR</name>
80129                        <description>1&#39;b1 indicates Autocorrelation test failed four times in a row. When set, RNG cease from functioning until next reset.</description>
80130                        <bitRange>[1:1]</bitRange>
80131                        <access>read-only</access>
80132                    </field>
80133                    <field>
80134                        <name>EHR_VALID</name>
80135                        <description>1&#39;b1 indicates that 192 bits have been collected in the RNG, and are ready to be read.</description>
80136                        <bitRange>[0:0]</bitRange>
80137                        <access>read-only</access>
80138                    </field>
80139                </fields>
80140            </register>
80141            <register>
80142                <name>RNG_ICR</name>
80143                <addressOffset>0x00000108</addressOffset>
80144                <description>Interrupt/status bit clear Register.</description>
80145                <resetValue>0x00000000</resetValue>
80146                <fields>
80147                    <field>
80148                        <name>RESERVED</name>
80149                        <description>RESERVED</description>
80150                        <bitRange>[31:4]</bitRange>
80151                        <access>read-only</access>
80152                    </field>
80153                    <field>
80154                        <name>VN_ERR</name>
80155                        <description>Write 1&#39;b1 - clear corresponding bit in RNG_ISR.</description>
80156                        <bitRange>[3:3]</bitRange>
80157                        <access>read-write</access>
80158                    </field>
80159                    <field>
80160                        <name>CRNGT_ERR</name>
80161                        <description>Write 1&#39;b1 - clear corresponding bit in RNG_ISR.</description>
80162                        <bitRange>[2:2]</bitRange>
80163                        <access>read-write</access>
80164                    </field>
80165                    <field>
80166                        <name>AUTOCORR_ERR</name>
80167                        <description>Cannot be cleared by SW! Only RNG reset clears this bit.</description>
80168                        <bitRange>[1:1]</bitRange>
80169                        <access>read-write</access>
80170                    </field>
80171                    <field>
80172                        <name>EHR_VALID</name>
80173                        <description>Write 1&#39;b1 - clear corresponding bit in RNG_ISR.</description>
80174                        <bitRange>[0:0]</bitRange>
80175                        <access>read-write</access>
80176                    </field>
80177                </fields>
80178            </register>
80179            <register>
80180                <name>TRNG_CONFIG</name>
80181                <addressOffset>0x0000010c</addressOffset>
80182                <description>Selecting the inverter-chain length.</description>
80183                <resetValue>0x00000000</resetValue>
80184                <fields>
80185                    <field>
80186                        <name>RESERVED</name>
80187                        <description>RESERVED</description>
80188                        <bitRange>[31:2]</bitRange>
80189                        <access>read-only</access>
80190                    </field>
80191                    <field>
80192                        <name>RND_SRC_SEL</name>
80193                        <description>Selects the number of inverters (out of four possible selections) in the ring oscillator (the entropy source).</description>
80194                        <bitRange>[1:0]</bitRange>
80195                        <access>read-write</access>
80196                    </field>
80197                </fields>
80198            </register>
80199            <register>
80200                <name>TRNG_VALID</name>
80201                <addressOffset>0x00000110</addressOffset>
80202                <description>192 bit collection indication.</description>
80203                <resetValue>0x00000000</resetValue>
80204                <fields>
80205                    <field>
80206                        <name>RESERVED</name>
80207                        <description>RESERVED</description>
80208                        <bitRange>[31:1]</bitRange>
80209                        <access>read-only</access>
80210                    </field>
80211                    <field>
80212                        <name>EHR_VALID</name>
80213                        <description>1&#39;b1 indicates that collection of bits in the RNG is completed, and data can be read from EHR_DATA register.</description>
80214                        <bitRange>[0:0]</bitRange>
80215                        <access>read-only</access>
80216                    </field>
80217                </fields>
80218            </register>
80219            <register>
80220                <name>EHR_DATA0</name>
80221                <addressOffset>0x00000114</addressOffset>
80222                <description>RNG collected bits.</description>
80223                <resetValue>0x00000000</resetValue>
80224                <fields>
80225                    <field>
80226                        <name>EHR_DATA0</name>
80227                        <description>Bits [31:0] of Entropy Holding Register (EHR) - RNG output register</description>
80228                        <bitRange>[31:0]</bitRange>
80229                        <access>read-only</access>
80230                    </field>
80231                </fields>
80232            </register>
80233            <register>
80234                <name>EHR_DATA1</name>
80235                <addressOffset>0x00000118</addressOffset>
80236                <description>RNG collected bits.</description>
80237                <resetValue>0x00000000</resetValue>
80238                <fields>
80239                    <field>
80240                        <name>EHR_DATA1</name>
80241                        <description>Bits [63:32] of Entropy Holding Register (EHR) - RNG output register</description>
80242                        <bitRange>[31:0]</bitRange>
80243                        <access>read-only</access>
80244                    </field>
80245                </fields>
80246            </register>
80247            <register>
80248                <name>EHR_DATA2</name>
80249                <addressOffset>0x0000011c</addressOffset>
80250                <description>RNG collected bits.</description>
80251                <resetValue>0x00000000</resetValue>
80252                <fields>
80253                    <field>
80254                        <name>EHR_DATA2</name>
80255                        <description>Bits [95:64] of Entropy Holding Register (EHR) - RNG output register</description>
80256                        <bitRange>[31:0]</bitRange>
80257                        <access>read-only</access>
80258                    </field>
80259                </fields>
80260            </register>
80261            <register>
80262                <name>EHR_DATA3</name>
80263                <addressOffset>0x00000120</addressOffset>
80264                <description>RNG collected bits.</description>
80265                <resetValue>0x00000000</resetValue>
80266                <fields>
80267                    <field>
80268                        <name>EHR_DATA3</name>
80269                        <description>Bits [127:96] of Entropy Holding Register (EHR) - RNG output register</description>
80270                        <bitRange>[31:0]</bitRange>
80271                        <access>read-only</access>
80272                    </field>
80273                </fields>
80274            </register>
80275            <register>
80276                <name>EHR_DATA4</name>
80277                <addressOffset>0x00000124</addressOffset>
80278                <description>RNG collected bits.</description>
80279                <resetValue>0x00000000</resetValue>
80280                <fields>
80281                    <field>
80282                        <name>EHR_DATA4</name>
80283                        <description>Bits [159:128] of Entropy Holding Register (EHR) - RNG output register</description>
80284                        <bitRange>[31:0]</bitRange>
80285                        <access>read-only</access>
80286                    </field>
80287                </fields>
80288            </register>
80289            <register>
80290                <name>EHR_DATA5</name>
80291                <addressOffset>0x00000128</addressOffset>
80292                <description>RNG collected bits.</description>
80293                <resetValue>0x00000000</resetValue>
80294                <fields>
80295                    <field>
80296                        <name>EHR_DATA5</name>
80297                        <description>Bits [191:160] of Entropy Holding Register (EHR) - RNG output register</description>
80298                        <bitRange>[31:0]</bitRange>
80299                        <access>read-only</access>
80300                    </field>
80301                </fields>
80302            </register>
80303            <register>
80304                <name>RND_SOURCE_ENABLE</name>
80305                <addressOffset>0x0000012c</addressOffset>
80306                <description>Enable signal for the random source.</description>
80307                <resetValue>0x00000000</resetValue>
80308                <fields>
80309                    <field>
80310                        <name>RESERVED</name>
80311                        <description>RESERVED</description>
80312                        <bitRange>[31:1]</bitRange>
80313                        <access>read-only</access>
80314                    </field>
80315                    <field>
80316                        <name>RND_SRC_EN</name>
80317                        <description>* 1&#39;b1 - entropy source is enabled. *1&#39;b0 - entropy source is disabled</description>
80318                        <bitRange>[0:0]</bitRange>
80319                        <access>read-write</access>
80320                    </field>
80321                </fields>
80322            </register>
80323            <register>
80324                <name>SAMPLE_CNT1</name>
80325                <addressOffset>0x00000130</addressOffset>
80326                <description>Counts clocks between sampling of random bit.</description>
80327                <resetValue>0x0000ffff</resetValue>
80328                <fields>
80329                    <field>
80330                        <name>SAMPLE_CNTR1</name>
80331                        <description>Sets the number of rng_clk cycles between two consecutive ring oscillator samples. Note! If the Von-Neuman is bypassed, the minimum value for sample counter must not be less then decimal seventeen</description>
80332                        <bitRange>[31:0]</bitRange>
80333                        <access>read-write</access>
80334                    </field>
80335                </fields>
80336            </register>
80337            <register>
80338                <name>AUTOCORR_STATISTIC</name>
80339                <addressOffset>0x00000134</addressOffset>
80340                <description>Statistic about Autocorrelation test activations.</description>
80341                <resetValue>0x00000000</resetValue>
80342                <fields>
80343                    <field>
80344                        <name>RESERVED</name>
80345                        <description>RESERVED</description>
80346                        <bitRange>[31:22]</bitRange>
80347                        <access>read-only</access>
80348                    </field>
80349                    <field>
80350                        <name>AUTOCORR_FAILS</name>
80351                        <description>Count each time an autocorrelation test fails. Any write to the register reset the counter. Stop collecting statistic if one of the counters reached the limit.</description>
80352                        <bitRange>[21:14]</bitRange>
80353                        <access>read-write</access>
80354                    </field>
80355                    <field>
80356                        <name>AUTOCORR_TRYS</name>
80357                        <description>Count each time an autocorrelation test starts. Any write to the register reset the counter. Stop collecting statistic if one of the counters reached the limit.</description>
80358                        <bitRange>[13:0]</bitRange>
80359                        <access>read-write</access>
80360                    </field>
80361                </fields>
80362            </register>
80363            <register>
80364                <name>TRNG_DEBUG_CONTROL</name>
80365                <addressOffset>0x00000138</addressOffset>
80366                <description>Debug register.</description>
80367                <resetValue>0x00000000</resetValue>
80368                <fields>
80369                    <field>
80370                        <name>AUTO_CORRELATE_BYPASS</name>
80371                        <description>When set, the autocorrelation test in the TRNG module is bypassed.</description>
80372                        <bitRange>[3:3]</bitRange>
80373                        <access>read-write</access>
80374                    </field>
80375                    <field>
80376                        <name>TRNG_CRNGT_BYPASS</name>
80377                        <description>When set, the CRNGT test in the RNG is bypassed.</description>
80378                        <bitRange>[2:2]</bitRange>
80379                        <access>read-write</access>
80380                    </field>
80381                    <field>
80382                        <name>VNC_BYPASS</name>
80383                        <description>When set, the Von-Neuman balancer is bypassed (including the 32 consecutive bits test).</description>
80384                        <bitRange>[1:1]</bitRange>
80385                        <access>read-write</access>
80386                    </field>
80387                    <field>
80388                        <name>RESERVED</name>
80389                        <description>N/A</description>
80390                        <bitRange>[0:0]</bitRange>
80391                        <access>read-only</access>
80392                    </field>
80393                </fields>
80394            </register>
80395            <register>
80396                <name>TRNG_SW_RESET</name>
80397                <addressOffset>0x00000140</addressOffset>
80398                <description>Generate internal SW reset within the RNG block.</description>
80399                <resetValue>0x00000000</resetValue>
80400                <fields>
80401                    <field>
80402                        <name>RESERVED</name>
80403                        <description>RESERVED</description>
80404                        <bitRange>[31:1]</bitRange>
80405                        <access>read-only</access>
80406                    </field>
80407                    <field>
80408                        <name>TRNG_SW_RESET</name>
80409                        <description>Writing 1&#39;b1 to this register causes an internal RNG reset.</description>
80410                        <bitRange>[0:0]</bitRange>
80411                        <access>read-write</access>
80412                    </field>
80413                </fields>
80414            </register>
80415            <register>
80416                <name>RNG_DEBUG_EN_INPUT</name>
80417                <addressOffset>0x000001b4</addressOffset>
80418                <description>Enable the RNG debug mode</description>
80419                <resetValue>0x00000000</resetValue>
80420                <fields>
80421                    <field>
80422                        <name>RESERVED</name>
80423                        <description>RESERVED</description>
80424                        <bitRange>[31:1]</bitRange>
80425                        <access>read-only</access>
80426                    </field>
80427                    <field>
80428                        <name>RNG_DEBUG_EN</name>
80429                        <description>* 1&#39;b1 - debug mode is enabled. *1&#39;b0 - debug mode is disabled</description>
80430                        <bitRange>[0:0]</bitRange>
80431                        <access>read-write</access>
80432                    </field>
80433                </fields>
80434            </register>
80435            <register>
80436                <name>TRNG_BUSY</name>
80437                <addressOffset>0x000001b8</addressOffset>
80438                <description>RNG Busy indication.</description>
80439                <resetValue>0x00000000</resetValue>
80440                <fields>
80441                    <field>
80442                        <name>RESERVED</name>
80443                        <description>RESERVED</description>
80444                        <bitRange>[31:1]</bitRange>
80445                        <access>read-only</access>
80446                    </field>
80447                    <field>
80448                        <name>TRNG_BUSY</name>
80449                        <description>Reflects rng_busy status.</description>
80450                        <bitRange>[0:0]</bitRange>
80451                        <access>read-only</access>
80452                    </field>
80453                </fields>
80454            </register>
80455            <register>
80456                <name>RST_BITS_COUNTER</name>
80457                <addressOffset>0x000001bc</addressOffset>
80458                <description>Reset the counter of collected bits in the RNG.</description>
80459                <resetValue>0x00000000</resetValue>
80460                <fields>
80461                    <field>
80462                        <name>RESERVED</name>
80463                        <description>RESERVED</description>
80464                        <bitRange>[31:1]</bitRange>
80465                        <access>read-only</access>
80466                    </field>
80467                    <field>
80468                        <name>RST_BITS_COUNTER</name>
80469                        <description>Writing any value to this address will reset the bits counter and RNG valid registers. RND_SORCE_ENABLE register must be unset in order for the reset to take place.</description>
80470                        <bitRange>[0:0]</bitRange>
80471                        <access>read-write</access>
80472                    </field>
80473                </fields>
80474            </register>
80475            <register>
80476                <name>RNG_VERSION</name>
80477                <addressOffset>0x000001c0</addressOffset>
80478                <description>Displays the version settings of the TRNG.</description>
80479                <resetValue>0x00000000</resetValue>
80480                <fields>
80481                    <field>
80482                        <name>RESERVED</name>
80483                        <description>RESERVED</description>
80484                        <bitRange>[31:8]</bitRange>
80485                        <access>read-only</access>
80486                    </field>
80487                    <field>
80488                        <name>RNG_USE_5_SBOXES</name>
80489                        <description>* 1&#39;b1 - 5 SBOX AES. *1&#39;b0 - 20 SBOX AES</description>
80490                        <bitRange>[7:7]</bitRange>
80491                        <access>read-only</access>
80492                    </field>
80493                    <field>
80494                        <name>RESEEDING_EXISTS</name>
80495                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80496                        <bitRange>[6:6]</bitRange>
80497                        <access>read-only</access>
80498                    </field>
80499                    <field>
80500                        <name>KAT_EXISTS</name>
80501                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80502                        <bitRange>[5:5]</bitRange>
80503                        <access>read-only</access>
80504                    </field>
80505                    <field>
80506                        <name>PRNG_EXISTS</name>
80507                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80508                        <bitRange>[4:4]</bitRange>
80509                        <access>read-only</access>
80510                    </field>
80511                    <field>
80512                        <name>TRNG_TESTS_BYPASS_EN</name>
80513                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80514                        <bitRange>[3:3]</bitRange>
80515                        <access>read-only</access>
80516                    </field>
80517                    <field>
80518                        <name>AUTOCORR_EXISTS</name>
80519                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80520                        <bitRange>[2:2]</bitRange>
80521                        <access>read-only</access>
80522                    </field>
80523                    <field>
80524                        <name>CRNGT_EXISTS</name>
80525                        <description>* 1&#39;b1 - Exists. *1&#39;b0 - Does not exist</description>
80526                        <bitRange>[1:1]</bitRange>
80527                        <access>read-only</access>
80528                    </field>
80529                    <field>
80530                        <name>EHR_WIDTH_192</name>
80531                        <description>* 1&#39;b1 - 192-bit EHR. *1&#39;b0 - 128-bit EHR</description>
80532                        <bitRange>[0:0]</bitRange>
80533                        <access>read-only</access>
80534                    </field>
80535                </fields>
80536            </register>
80537            <register>
80538                <name>RNG_BIST_CNTR_0</name>
80539                <addressOffset>0x000001e0</addressOffset>
80540                <description>Collected BIST results.</description>
80541                <resetValue>0x00000000</resetValue>
80542                <fields>
80543                    <field>
80544                        <name>RESERVED</name>
80545                        <description>RESERVED</description>
80546                        <bitRange>[31:22]</bitRange>
80547                        <access>read-only</access>
80548                    </field>
80549                    <field>
80550                        <name>ROSC_CNTR_VAL</name>
80551                        <description>Reflects the results of RNG BIST counter.</description>
80552                        <bitRange>[21:0]</bitRange>
80553                        <access>read-only</access>
80554                    </field>
80555                </fields>
80556            </register>
80557            <register>
80558                <name>RNG_BIST_CNTR_1</name>
80559                <addressOffset>0x000001e4</addressOffset>
80560                <description>Collected BIST results.</description>
80561                <resetValue>0x00000000</resetValue>
80562                <fields>
80563                    <field>
80564                        <name>RESERVED</name>
80565                        <description>RESERVED</description>
80566                        <bitRange>[31:22]</bitRange>
80567                        <access>read-only</access>
80568                    </field>
80569                    <field>
80570                        <name>ROSC_CNTR_VAL</name>
80571                        <description>Reflects the results of RNG BIST counter.</description>
80572                        <bitRange>[21:0]</bitRange>
80573                        <access>read-only</access>
80574                    </field>
80575                </fields>
80576            </register>
80577            <register>
80578                <name>RNG_BIST_CNTR_2</name>
80579                <addressOffset>0x000001e8</addressOffset>
80580                <description>Collected BIST results.</description>
80581                <resetValue>0x00000000</resetValue>
80582                <fields>
80583                    <field>
80584                        <name>RESERVED</name>
80585                        <description>RESERVED</description>
80586                        <bitRange>[31:22]</bitRange>
80587                        <access>read-only</access>
80588                    </field>
80589                    <field>
80590                        <name>ROSC_CNTR_VAL</name>
80591                        <description>Reflects the results of RNG BIST counter.</description>
80592                        <bitRange>[21:0]</bitRange>
80593                        <access>read-only</access>
80594                    </field>
80595                </fields>
80596            </register>
80597        </registers>
80598    </peripheral>
80599    <peripheral>
80600        <name>GLITCH_DETECTOR</name>
80601        <description>Glitch detector controls</description>
80602        <baseAddress>0x40158000</baseAddress>
80603        <addressBlock>
80604            <offset>0</offset>
80605            <size>24</size>
80606            <usage>registers</usage>
80607        </addressBlock>
80608        <registers>
80609            <register>
80610                <name>ARM</name>
80611                <addressOffset>0x00000000</addressOffset>
80612                <description>Forcibly arm the glitch detectors, if they are not already armed by OTP. When armed, any individual detector trigger will cause a restart of the switched core power domain&#39;s power-on reset state machine.
80613
80614                    Glitch detector triggers are recorded accumulatively in TRIG_STATUS. If the system is reset by a glitch detector trigger, this is recorded in POWMAN_CHIP_RESET.
80615
80616                    This register is Secure read/write only.</description>
80617                <resetValue>0x00005bad</resetValue>
80618                <fields>
80619                    <field>
80620                        <name>ARM</name>
80621                        <bitRange>[15:0]</bitRange>
80622                        <access>read-write</access>
80623                        <enumeratedValues>
80624                            <enumeratedValue>
80625                                <name>no</name>
80626                                <value>23469</value>
80627                                <description>Do not force the glitch detectors to be armed</description>
80628                            </enumeratedValue>
80629                            <enumeratedValue>
80630                                <name>yes</name>
80631                                <value>0</value>
80632                                <description>Force the glitch detectors to be armed. (Any value other than ARM_NO counts as YES)</description>
80633                            </enumeratedValue>
80634                        </enumeratedValues>
80635                    </field>
80636                </fields>
80637            </register>
80638            <register>
80639                <name>DISARM</name>
80640                <addressOffset>0x00000004</addressOffset>
80641                <resetValue>0x00000000</resetValue>
80642                <fields>
80643                    <field>
80644                        <name>DISARM</name>
80645                        <description>Forcibly disarm the glitch detectors, if they are armed by OTP. Ignored if ARM is YES.
80646
80647                            This register is Secure read/write only.</description>
80648                        <bitRange>[15:0]</bitRange>
80649                        <access>read-write</access>
80650                        <enumeratedValues>
80651                            <enumeratedValue>
80652                                <name>no</name>
80653                                <value>0</value>
80654                                <description>Do not disarm the glitch detectors. (Any value other than DISARM_YES counts as NO)</description>
80655                            </enumeratedValue>
80656                            <enumeratedValue>
80657                                <name>yes</name>
80658                                <value>56495</value>
80659                                <description>Disarm the glitch detectors</description>
80660                            </enumeratedValue>
80661                        </enumeratedValues>
80662                    </field>
80663                </fields>
80664            </register>
80665            <register>
80666                <name>SENSITIVITY</name>
80667                <addressOffset>0x00000008</addressOffset>
80668                <description>Adjust the sensitivity of glitch detectors to values other than their OTP-provided defaults.
80669
80670                    This register is Secure read/write only.</description>
80671                <resetValue>0x00000000</resetValue>
80672                <fields>
80673                    <field>
80674                        <name>DEFAULT</name>
80675                        <bitRange>[31:24]</bitRange>
80676                        <access>read-write</access>
80677                        <enumeratedValues>
80678                            <enumeratedValue>
80679                                <name>yes</name>
80680                                <value>0</value>
80681                                <description>Use the default sensitivity configured in OTP for all detectors. (Any value other than DEFAULT_NO counts as YES)</description>
80682                            </enumeratedValue>
80683                            <enumeratedValue>
80684                                <name>no</name>
80685                                <value>222</value>
80686                                <description>Do not use the default sensitivity configured in OTP. Instead use the value from this register.</description>
80687                            </enumeratedValue>
80688                        </enumeratedValues>
80689                    </field>
80690                    <field>
80691                        <name>DET3_INV</name>
80692                        <description>Must be the inverse of DET3, else the default value is used.</description>
80693                        <bitRange>[15:14]</bitRange>
80694                        <access>read-write</access>
80695                    </field>
80696                    <field>
80697                        <name>DET2_INV</name>
80698                        <description>Must be the inverse of DET2, else the default value is used.</description>
80699                        <bitRange>[13:12]</bitRange>
80700                        <access>read-write</access>
80701                    </field>
80702                    <field>
80703                        <name>DET1_INV</name>
80704                        <description>Must be the inverse of DET1, else the default value is used.</description>
80705                        <bitRange>[11:10]</bitRange>
80706                        <access>read-write</access>
80707                    </field>
80708                    <field>
80709                        <name>DET0_INV</name>
80710                        <description>Must be the inverse of DET0, else the default value is used.</description>
80711                        <bitRange>[9:8]</bitRange>
80712                        <access>read-write</access>
80713                    </field>
80714                    <field>
80715                        <name>DET3</name>
80716                        <description>Set sensitivity for detector 3. Higher values are more sensitive.</description>
80717                        <bitRange>[7:6]</bitRange>
80718                        <access>read-write</access>
80719                    </field>
80720                    <field>
80721                        <name>DET2</name>
80722                        <description>Set sensitivity for detector 2. Higher values are more sensitive.</description>
80723                        <bitRange>[5:4]</bitRange>
80724                        <access>read-write</access>
80725                    </field>
80726                    <field>
80727                        <name>DET1</name>
80728                        <description>Set sensitivity for detector 1. Higher values are more sensitive.</description>
80729                        <bitRange>[3:2]</bitRange>
80730                        <access>read-write</access>
80731                    </field>
80732                    <field>
80733                        <name>DET0</name>
80734                        <description>Set sensitivity for detector 0. Higher values are more sensitive.</description>
80735                        <bitRange>[1:0]</bitRange>
80736                        <access>read-write</access>
80737                    </field>
80738                </fields>
80739            </register>
80740            <register>
80741                <name>LOCK</name>
80742                <addressOffset>0x0000000c</addressOffset>
80743                <resetValue>0x00000000</resetValue>
80744                <fields>
80745                    <field>
80746                        <name>LOCK</name>
80747                        <description>Write any nonzero value to disable writes to ARM, DISARM, SENSITIVITY and LOCK. This register is Secure read/write only.</description>
80748                        <bitRange>[7:0]</bitRange>
80749                        <access>read-write</access>
80750                    </field>
80751                </fields>
80752            </register>
80753            <register>
80754                <name>TRIG_STATUS</name>
80755                <addressOffset>0x00000010</addressOffset>
80756                <description>Set when a detector output triggers. Write-1-clear.
80757
80758                    (May immediately return high if the detector remains in a failed state. Detectors can only be cleared by a full reset of the switched core power domain.)
80759
80760                    This register is Secure read/write only.</description>
80761                <resetValue>0x00000000</resetValue>
80762                <fields>
80763                    <field>
80764                        <name>DET3</name>
80765                        <bitRange>[3:3]</bitRange>
80766                        <access>read-write</access>
80767                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80768                    </field>
80769                    <field>
80770                        <name>DET2</name>
80771                        <bitRange>[2:2]</bitRange>
80772                        <access>read-write</access>
80773                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80774                    </field>
80775                    <field>
80776                        <name>DET1</name>
80777                        <bitRange>[1:1]</bitRange>
80778                        <access>read-write</access>
80779                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80780                    </field>
80781                    <field>
80782                        <name>DET0</name>
80783                        <bitRange>[0:0]</bitRange>
80784                        <access>read-write</access>
80785                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
80786                    </field>
80787                </fields>
80788            </register>
80789            <register>
80790                <name>TRIG_FORCE</name>
80791                <addressOffset>0x00000014</addressOffset>
80792                <description>Simulate the firing of one or more detectors. Writing ones to this register will set the matching bits in STATUS_TRIG.
80793
80794                    If the glitch detectors are currently armed, writing ones will also immediately reset the switched core power domain, and set the reset reason latches in POWMAN_CHIP_RESET to indicate a glitch detector resets.
80795
80796                    This register is Secure read/write only.</description>
80797                <resetValue>0x00000000</resetValue>
80798                <fields>
80799                    <field>
80800                        <name>TRIG_FORCE</name>
80801                        <bitRange>[3:0]</bitRange>
80802                        <access>write-only</access>
80803                    </field>
80804                </fields>
80805            </register>
80806        </registers>
80807    </peripheral>
80808    <peripheral>
80809        <name>OTP</name>
80810        <description>SNPS OTP control IF (SBPI and RPi wrapper control)</description>
80811        <baseAddress>0x40120000</baseAddress>
80812        <addressBlock>
80813            <offset>0</offset>
80814            <size>372</size>
80815            <usage>registers</usage>
80816        </addressBlock>
80817        <interrupt>
80818            <name>OTP_IRQ</name>
80819            <value>38</value>
80820        </interrupt>
80821        <registers>
80822            <register>
80823                <name>SW_LOCK0</name>
80824                <addressOffset>0x00000000</addressOffset>
80825                <description>Software lock register for page 0.
80826
80827                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
80828                <resetValue>0x00000000</resetValue>
80829                <fields>
80830                    <field>
80831                        <name>NSEC</name>
80832                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
80833                        <bitRange>[3:2]</bitRange>
80834                        <access>read-write</access>
80835                        <enumeratedValues>
80836                            <enumeratedValue>
80837                                <name>read_write</name>
80838                                <value>0</value>
80839                            </enumeratedValue>
80840                            <enumeratedValue>
80841                                <name>read_only</name>
80842                                <value>1</value>
80843                            </enumeratedValue>
80844                            <enumeratedValue>
80845                                <name>inaccessible</name>
80846                                <value>3</value>
80847                            </enumeratedValue>
80848                        </enumeratedValues>
80849                    </field>
80850                    <field>
80851                        <name>SEC</name>
80852                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
80853                        <bitRange>[1:0]</bitRange>
80854                        <access>read-write</access>
80855                        <enumeratedValues>
80856                            <enumeratedValue>
80857                                <name>read_write</name>
80858                                <value>0</value>
80859                            </enumeratedValue>
80860                            <enumeratedValue>
80861                                <name>read_only</name>
80862                                <value>1</value>
80863                            </enumeratedValue>
80864                            <enumeratedValue>
80865                                <name>inaccessible</name>
80866                                <value>3</value>
80867                            </enumeratedValue>
80868                        </enumeratedValues>
80869                    </field>
80870                </fields>
80871            </register>
80872            <register>
80873                <name>SW_LOCK1</name>
80874                <addressOffset>0x00000004</addressOffset>
80875                <description>Software lock register for page 1.
80876
80877                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
80878                <resetValue>0x00000000</resetValue>
80879                <fields>
80880                    <field>
80881                        <name>NSEC</name>
80882                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
80883                        <bitRange>[3:2]</bitRange>
80884                        <access>read-write</access>
80885                        <enumeratedValues>
80886                            <enumeratedValue>
80887                                <name>read_write</name>
80888                                <value>0</value>
80889                            </enumeratedValue>
80890                            <enumeratedValue>
80891                                <name>read_only</name>
80892                                <value>1</value>
80893                            </enumeratedValue>
80894                            <enumeratedValue>
80895                                <name>inaccessible</name>
80896                                <value>3</value>
80897                            </enumeratedValue>
80898                        </enumeratedValues>
80899                    </field>
80900                    <field>
80901                        <name>SEC</name>
80902                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
80903                        <bitRange>[1:0]</bitRange>
80904                        <access>read-write</access>
80905                        <enumeratedValues>
80906                            <enumeratedValue>
80907                                <name>read_write</name>
80908                                <value>0</value>
80909                            </enumeratedValue>
80910                            <enumeratedValue>
80911                                <name>read_only</name>
80912                                <value>1</value>
80913                            </enumeratedValue>
80914                            <enumeratedValue>
80915                                <name>inaccessible</name>
80916                                <value>3</value>
80917                            </enumeratedValue>
80918                        </enumeratedValues>
80919                    </field>
80920                </fields>
80921            </register>
80922            <register>
80923                <name>SW_LOCK2</name>
80924                <addressOffset>0x00000008</addressOffset>
80925                <description>Software lock register for page 2.
80926
80927                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
80928                <resetValue>0x00000000</resetValue>
80929                <fields>
80930                    <field>
80931                        <name>NSEC</name>
80932                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
80933                        <bitRange>[3:2]</bitRange>
80934                        <access>read-write</access>
80935                        <enumeratedValues>
80936                            <enumeratedValue>
80937                                <name>read_write</name>
80938                                <value>0</value>
80939                            </enumeratedValue>
80940                            <enumeratedValue>
80941                                <name>read_only</name>
80942                                <value>1</value>
80943                            </enumeratedValue>
80944                            <enumeratedValue>
80945                                <name>inaccessible</name>
80946                                <value>3</value>
80947                            </enumeratedValue>
80948                        </enumeratedValues>
80949                    </field>
80950                    <field>
80951                        <name>SEC</name>
80952                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
80953                        <bitRange>[1:0]</bitRange>
80954                        <access>read-write</access>
80955                        <enumeratedValues>
80956                            <enumeratedValue>
80957                                <name>read_write</name>
80958                                <value>0</value>
80959                            </enumeratedValue>
80960                            <enumeratedValue>
80961                                <name>read_only</name>
80962                                <value>1</value>
80963                            </enumeratedValue>
80964                            <enumeratedValue>
80965                                <name>inaccessible</name>
80966                                <value>3</value>
80967                            </enumeratedValue>
80968                        </enumeratedValues>
80969                    </field>
80970                </fields>
80971            </register>
80972            <register>
80973                <name>SW_LOCK3</name>
80974                <addressOffset>0x0000000c</addressOffset>
80975                <description>Software lock register for page 3.
80976
80977                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
80978                <resetValue>0x00000000</resetValue>
80979                <fields>
80980                    <field>
80981                        <name>NSEC</name>
80982                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
80983                        <bitRange>[3:2]</bitRange>
80984                        <access>read-write</access>
80985                        <enumeratedValues>
80986                            <enumeratedValue>
80987                                <name>read_write</name>
80988                                <value>0</value>
80989                            </enumeratedValue>
80990                            <enumeratedValue>
80991                                <name>read_only</name>
80992                                <value>1</value>
80993                            </enumeratedValue>
80994                            <enumeratedValue>
80995                                <name>inaccessible</name>
80996                                <value>3</value>
80997                            </enumeratedValue>
80998                        </enumeratedValues>
80999                    </field>
81000                    <field>
81001                        <name>SEC</name>
81002                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81003                        <bitRange>[1:0]</bitRange>
81004                        <access>read-write</access>
81005                        <enumeratedValues>
81006                            <enumeratedValue>
81007                                <name>read_write</name>
81008                                <value>0</value>
81009                            </enumeratedValue>
81010                            <enumeratedValue>
81011                                <name>read_only</name>
81012                                <value>1</value>
81013                            </enumeratedValue>
81014                            <enumeratedValue>
81015                                <name>inaccessible</name>
81016                                <value>3</value>
81017                            </enumeratedValue>
81018                        </enumeratedValues>
81019                    </field>
81020                </fields>
81021            </register>
81022            <register>
81023                <name>SW_LOCK4</name>
81024                <addressOffset>0x00000010</addressOffset>
81025                <description>Software lock register for page 4.
81026
81027                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81028                <resetValue>0x00000000</resetValue>
81029                <fields>
81030                    <field>
81031                        <name>NSEC</name>
81032                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81033                        <bitRange>[3:2]</bitRange>
81034                        <access>read-write</access>
81035                        <enumeratedValues>
81036                            <enumeratedValue>
81037                                <name>read_write</name>
81038                                <value>0</value>
81039                            </enumeratedValue>
81040                            <enumeratedValue>
81041                                <name>read_only</name>
81042                                <value>1</value>
81043                            </enumeratedValue>
81044                            <enumeratedValue>
81045                                <name>inaccessible</name>
81046                                <value>3</value>
81047                            </enumeratedValue>
81048                        </enumeratedValues>
81049                    </field>
81050                    <field>
81051                        <name>SEC</name>
81052                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81053                        <bitRange>[1:0]</bitRange>
81054                        <access>read-write</access>
81055                        <enumeratedValues>
81056                            <enumeratedValue>
81057                                <name>read_write</name>
81058                                <value>0</value>
81059                            </enumeratedValue>
81060                            <enumeratedValue>
81061                                <name>read_only</name>
81062                                <value>1</value>
81063                            </enumeratedValue>
81064                            <enumeratedValue>
81065                                <name>inaccessible</name>
81066                                <value>3</value>
81067                            </enumeratedValue>
81068                        </enumeratedValues>
81069                    </field>
81070                </fields>
81071            </register>
81072            <register>
81073                <name>SW_LOCK5</name>
81074                <addressOffset>0x00000014</addressOffset>
81075                <description>Software lock register for page 5.
81076
81077                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81078                <resetValue>0x00000000</resetValue>
81079                <fields>
81080                    <field>
81081                        <name>NSEC</name>
81082                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81083                        <bitRange>[3:2]</bitRange>
81084                        <access>read-write</access>
81085                        <enumeratedValues>
81086                            <enumeratedValue>
81087                                <name>read_write</name>
81088                                <value>0</value>
81089                            </enumeratedValue>
81090                            <enumeratedValue>
81091                                <name>read_only</name>
81092                                <value>1</value>
81093                            </enumeratedValue>
81094                            <enumeratedValue>
81095                                <name>inaccessible</name>
81096                                <value>3</value>
81097                            </enumeratedValue>
81098                        </enumeratedValues>
81099                    </field>
81100                    <field>
81101                        <name>SEC</name>
81102                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81103                        <bitRange>[1:0]</bitRange>
81104                        <access>read-write</access>
81105                        <enumeratedValues>
81106                            <enumeratedValue>
81107                                <name>read_write</name>
81108                                <value>0</value>
81109                            </enumeratedValue>
81110                            <enumeratedValue>
81111                                <name>read_only</name>
81112                                <value>1</value>
81113                            </enumeratedValue>
81114                            <enumeratedValue>
81115                                <name>inaccessible</name>
81116                                <value>3</value>
81117                            </enumeratedValue>
81118                        </enumeratedValues>
81119                    </field>
81120                </fields>
81121            </register>
81122            <register>
81123                <name>SW_LOCK6</name>
81124                <addressOffset>0x00000018</addressOffset>
81125                <description>Software lock register for page 6.
81126
81127                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81128                <resetValue>0x00000000</resetValue>
81129                <fields>
81130                    <field>
81131                        <name>NSEC</name>
81132                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81133                        <bitRange>[3:2]</bitRange>
81134                        <access>read-write</access>
81135                        <enumeratedValues>
81136                            <enumeratedValue>
81137                                <name>read_write</name>
81138                                <value>0</value>
81139                            </enumeratedValue>
81140                            <enumeratedValue>
81141                                <name>read_only</name>
81142                                <value>1</value>
81143                            </enumeratedValue>
81144                            <enumeratedValue>
81145                                <name>inaccessible</name>
81146                                <value>3</value>
81147                            </enumeratedValue>
81148                        </enumeratedValues>
81149                    </field>
81150                    <field>
81151                        <name>SEC</name>
81152                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81153                        <bitRange>[1:0]</bitRange>
81154                        <access>read-write</access>
81155                        <enumeratedValues>
81156                            <enumeratedValue>
81157                                <name>read_write</name>
81158                                <value>0</value>
81159                            </enumeratedValue>
81160                            <enumeratedValue>
81161                                <name>read_only</name>
81162                                <value>1</value>
81163                            </enumeratedValue>
81164                            <enumeratedValue>
81165                                <name>inaccessible</name>
81166                                <value>3</value>
81167                            </enumeratedValue>
81168                        </enumeratedValues>
81169                    </field>
81170                </fields>
81171            </register>
81172            <register>
81173                <name>SW_LOCK7</name>
81174                <addressOffset>0x0000001c</addressOffset>
81175                <description>Software lock register for page 7.
81176
81177                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81178                <resetValue>0x00000000</resetValue>
81179                <fields>
81180                    <field>
81181                        <name>NSEC</name>
81182                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81183                        <bitRange>[3:2]</bitRange>
81184                        <access>read-write</access>
81185                        <enumeratedValues>
81186                            <enumeratedValue>
81187                                <name>read_write</name>
81188                                <value>0</value>
81189                            </enumeratedValue>
81190                            <enumeratedValue>
81191                                <name>read_only</name>
81192                                <value>1</value>
81193                            </enumeratedValue>
81194                            <enumeratedValue>
81195                                <name>inaccessible</name>
81196                                <value>3</value>
81197                            </enumeratedValue>
81198                        </enumeratedValues>
81199                    </field>
81200                    <field>
81201                        <name>SEC</name>
81202                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81203                        <bitRange>[1:0]</bitRange>
81204                        <access>read-write</access>
81205                        <enumeratedValues>
81206                            <enumeratedValue>
81207                                <name>read_write</name>
81208                                <value>0</value>
81209                            </enumeratedValue>
81210                            <enumeratedValue>
81211                                <name>read_only</name>
81212                                <value>1</value>
81213                            </enumeratedValue>
81214                            <enumeratedValue>
81215                                <name>inaccessible</name>
81216                                <value>3</value>
81217                            </enumeratedValue>
81218                        </enumeratedValues>
81219                    </field>
81220                </fields>
81221            </register>
81222            <register>
81223                <name>SW_LOCK8</name>
81224                <addressOffset>0x00000020</addressOffset>
81225                <description>Software lock register for page 8.
81226
81227                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81228                <resetValue>0x00000000</resetValue>
81229                <fields>
81230                    <field>
81231                        <name>NSEC</name>
81232                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81233                        <bitRange>[3:2]</bitRange>
81234                        <access>read-write</access>
81235                        <enumeratedValues>
81236                            <enumeratedValue>
81237                                <name>read_write</name>
81238                                <value>0</value>
81239                            </enumeratedValue>
81240                            <enumeratedValue>
81241                                <name>read_only</name>
81242                                <value>1</value>
81243                            </enumeratedValue>
81244                            <enumeratedValue>
81245                                <name>inaccessible</name>
81246                                <value>3</value>
81247                            </enumeratedValue>
81248                        </enumeratedValues>
81249                    </field>
81250                    <field>
81251                        <name>SEC</name>
81252                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81253                        <bitRange>[1:0]</bitRange>
81254                        <access>read-write</access>
81255                        <enumeratedValues>
81256                            <enumeratedValue>
81257                                <name>read_write</name>
81258                                <value>0</value>
81259                            </enumeratedValue>
81260                            <enumeratedValue>
81261                                <name>read_only</name>
81262                                <value>1</value>
81263                            </enumeratedValue>
81264                            <enumeratedValue>
81265                                <name>inaccessible</name>
81266                                <value>3</value>
81267                            </enumeratedValue>
81268                        </enumeratedValues>
81269                    </field>
81270                </fields>
81271            </register>
81272            <register>
81273                <name>SW_LOCK9</name>
81274                <addressOffset>0x00000024</addressOffset>
81275                <description>Software lock register for page 9.
81276
81277                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81278                <resetValue>0x00000000</resetValue>
81279                <fields>
81280                    <field>
81281                        <name>NSEC</name>
81282                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81283                        <bitRange>[3:2]</bitRange>
81284                        <access>read-write</access>
81285                        <enumeratedValues>
81286                            <enumeratedValue>
81287                                <name>read_write</name>
81288                                <value>0</value>
81289                            </enumeratedValue>
81290                            <enumeratedValue>
81291                                <name>read_only</name>
81292                                <value>1</value>
81293                            </enumeratedValue>
81294                            <enumeratedValue>
81295                                <name>inaccessible</name>
81296                                <value>3</value>
81297                            </enumeratedValue>
81298                        </enumeratedValues>
81299                    </field>
81300                    <field>
81301                        <name>SEC</name>
81302                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81303                        <bitRange>[1:0]</bitRange>
81304                        <access>read-write</access>
81305                        <enumeratedValues>
81306                            <enumeratedValue>
81307                                <name>read_write</name>
81308                                <value>0</value>
81309                            </enumeratedValue>
81310                            <enumeratedValue>
81311                                <name>read_only</name>
81312                                <value>1</value>
81313                            </enumeratedValue>
81314                            <enumeratedValue>
81315                                <name>inaccessible</name>
81316                                <value>3</value>
81317                            </enumeratedValue>
81318                        </enumeratedValues>
81319                    </field>
81320                </fields>
81321            </register>
81322            <register>
81323                <name>SW_LOCK10</name>
81324                <addressOffset>0x00000028</addressOffset>
81325                <description>Software lock register for page 10.
81326
81327                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81328                <resetValue>0x00000000</resetValue>
81329                <fields>
81330                    <field>
81331                        <name>NSEC</name>
81332                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81333                        <bitRange>[3:2]</bitRange>
81334                        <access>read-write</access>
81335                        <enumeratedValues>
81336                            <enumeratedValue>
81337                                <name>read_write</name>
81338                                <value>0</value>
81339                            </enumeratedValue>
81340                            <enumeratedValue>
81341                                <name>read_only</name>
81342                                <value>1</value>
81343                            </enumeratedValue>
81344                            <enumeratedValue>
81345                                <name>inaccessible</name>
81346                                <value>3</value>
81347                            </enumeratedValue>
81348                        </enumeratedValues>
81349                    </field>
81350                    <field>
81351                        <name>SEC</name>
81352                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81353                        <bitRange>[1:0]</bitRange>
81354                        <access>read-write</access>
81355                        <enumeratedValues>
81356                            <enumeratedValue>
81357                                <name>read_write</name>
81358                                <value>0</value>
81359                            </enumeratedValue>
81360                            <enumeratedValue>
81361                                <name>read_only</name>
81362                                <value>1</value>
81363                            </enumeratedValue>
81364                            <enumeratedValue>
81365                                <name>inaccessible</name>
81366                                <value>3</value>
81367                            </enumeratedValue>
81368                        </enumeratedValues>
81369                    </field>
81370                </fields>
81371            </register>
81372            <register>
81373                <name>SW_LOCK11</name>
81374                <addressOffset>0x0000002c</addressOffset>
81375                <description>Software lock register for page 11.
81376
81377                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81378                <resetValue>0x00000000</resetValue>
81379                <fields>
81380                    <field>
81381                        <name>NSEC</name>
81382                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81383                        <bitRange>[3:2]</bitRange>
81384                        <access>read-write</access>
81385                        <enumeratedValues>
81386                            <enumeratedValue>
81387                                <name>read_write</name>
81388                                <value>0</value>
81389                            </enumeratedValue>
81390                            <enumeratedValue>
81391                                <name>read_only</name>
81392                                <value>1</value>
81393                            </enumeratedValue>
81394                            <enumeratedValue>
81395                                <name>inaccessible</name>
81396                                <value>3</value>
81397                            </enumeratedValue>
81398                        </enumeratedValues>
81399                    </field>
81400                    <field>
81401                        <name>SEC</name>
81402                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81403                        <bitRange>[1:0]</bitRange>
81404                        <access>read-write</access>
81405                        <enumeratedValues>
81406                            <enumeratedValue>
81407                                <name>read_write</name>
81408                                <value>0</value>
81409                            </enumeratedValue>
81410                            <enumeratedValue>
81411                                <name>read_only</name>
81412                                <value>1</value>
81413                            </enumeratedValue>
81414                            <enumeratedValue>
81415                                <name>inaccessible</name>
81416                                <value>3</value>
81417                            </enumeratedValue>
81418                        </enumeratedValues>
81419                    </field>
81420                </fields>
81421            </register>
81422            <register>
81423                <name>SW_LOCK12</name>
81424                <addressOffset>0x00000030</addressOffset>
81425                <description>Software lock register for page 12.
81426
81427                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81428                <resetValue>0x00000000</resetValue>
81429                <fields>
81430                    <field>
81431                        <name>NSEC</name>
81432                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81433                        <bitRange>[3:2]</bitRange>
81434                        <access>read-write</access>
81435                        <enumeratedValues>
81436                            <enumeratedValue>
81437                                <name>read_write</name>
81438                                <value>0</value>
81439                            </enumeratedValue>
81440                            <enumeratedValue>
81441                                <name>read_only</name>
81442                                <value>1</value>
81443                            </enumeratedValue>
81444                            <enumeratedValue>
81445                                <name>inaccessible</name>
81446                                <value>3</value>
81447                            </enumeratedValue>
81448                        </enumeratedValues>
81449                    </field>
81450                    <field>
81451                        <name>SEC</name>
81452                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81453                        <bitRange>[1:0]</bitRange>
81454                        <access>read-write</access>
81455                        <enumeratedValues>
81456                            <enumeratedValue>
81457                                <name>read_write</name>
81458                                <value>0</value>
81459                            </enumeratedValue>
81460                            <enumeratedValue>
81461                                <name>read_only</name>
81462                                <value>1</value>
81463                            </enumeratedValue>
81464                            <enumeratedValue>
81465                                <name>inaccessible</name>
81466                                <value>3</value>
81467                            </enumeratedValue>
81468                        </enumeratedValues>
81469                    </field>
81470                </fields>
81471            </register>
81472            <register>
81473                <name>SW_LOCK13</name>
81474                <addressOffset>0x00000034</addressOffset>
81475                <description>Software lock register for page 13.
81476
81477                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81478                <resetValue>0x00000000</resetValue>
81479                <fields>
81480                    <field>
81481                        <name>NSEC</name>
81482                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81483                        <bitRange>[3:2]</bitRange>
81484                        <access>read-write</access>
81485                        <enumeratedValues>
81486                            <enumeratedValue>
81487                                <name>read_write</name>
81488                                <value>0</value>
81489                            </enumeratedValue>
81490                            <enumeratedValue>
81491                                <name>read_only</name>
81492                                <value>1</value>
81493                            </enumeratedValue>
81494                            <enumeratedValue>
81495                                <name>inaccessible</name>
81496                                <value>3</value>
81497                            </enumeratedValue>
81498                        </enumeratedValues>
81499                    </field>
81500                    <field>
81501                        <name>SEC</name>
81502                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81503                        <bitRange>[1:0]</bitRange>
81504                        <access>read-write</access>
81505                        <enumeratedValues>
81506                            <enumeratedValue>
81507                                <name>read_write</name>
81508                                <value>0</value>
81509                            </enumeratedValue>
81510                            <enumeratedValue>
81511                                <name>read_only</name>
81512                                <value>1</value>
81513                            </enumeratedValue>
81514                            <enumeratedValue>
81515                                <name>inaccessible</name>
81516                                <value>3</value>
81517                            </enumeratedValue>
81518                        </enumeratedValues>
81519                    </field>
81520                </fields>
81521            </register>
81522            <register>
81523                <name>SW_LOCK14</name>
81524                <addressOffset>0x00000038</addressOffset>
81525                <description>Software lock register for page 14.
81526
81527                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81528                <resetValue>0x00000000</resetValue>
81529                <fields>
81530                    <field>
81531                        <name>NSEC</name>
81532                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81533                        <bitRange>[3:2]</bitRange>
81534                        <access>read-write</access>
81535                        <enumeratedValues>
81536                            <enumeratedValue>
81537                                <name>read_write</name>
81538                                <value>0</value>
81539                            </enumeratedValue>
81540                            <enumeratedValue>
81541                                <name>read_only</name>
81542                                <value>1</value>
81543                            </enumeratedValue>
81544                            <enumeratedValue>
81545                                <name>inaccessible</name>
81546                                <value>3</value>
81547                            </enumeratedValue>
81548                        </enumeratedValues>
81549                    </field>
81550                    <field>
81551                        <name>SEC</name>
81552                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81553                        <bitRange>[1:0]</bitRange>
81554                        <access>read-write</access>
81555                        <enumeratedValues>
81556                            <enumeratedValue>
81557                                <name>read_write</name>
81558                                <value>0</value>
81559                            </enumeratedValue>
81560                            <enumeratedValue>
81561                                <name>read_only</name>
81562                                <value>1</value>
81563                            </enumeratedValue>
81564                            <enumeratedValue>
81565                                <name>inaccessible</name>
81566                                <value>3</value>
81567                            </enumeratedValue>
81568                        </enumeratedValues>
81569                    </field>
81570                </fields>
81571            </register>
81572            <register>
81573                <name>SW_LOCK15</name>
81574                <addressOffset>0x0000003c</addressOffset>
81575                <description>Software lock register for page 15.
81576
81577                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81578                <resetValue>0x00000000</resetValue>
81579                <fields>
81580                    <field>
81581                        <name>NSEC</name>
81582                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81583                        <bitRange>[3:2]</bitRange>
81584                        <access>read-write</access>
81585                        <enumeratedValues>
81586                            <enumeratedValue>
81587                                <name>read_write</name>
81588                                <value>0</value>
81589                            </enumeratedValue>
81590                            <enumeratedValue>
81591                                <name>read_only</name>
81592                                <value>1</value>
81593                            </enumeratedValue>
81594                            <enumeratedValue>
81595                                <name>inaccessible</name>
81596                                <value>3</value>
81597                            </enumeratedValue>
81598                        </enumeratedValues>
81599                    </field>
81600                    <field>
81601                        <name>SEC</name>
81602                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81603                        <bitRange>[1:0]</bitRange>
81604                        <access>read-write</access>
81605                        <enumeratedValues>
81606                            <enumeratedValue>
81607                                <name>read_write</name>
81608                                <value>0</value>
81609                            </enumeratedValue>
81610                            <enumeratedValue>
81611                                <name>read_only</name>
81612                                <value>1</value>
81613                            </enumeratedValue>
81614                            <enumeratedValue>
81615                                <name>inaccessible</name>
81616                                <value>3</value>
81617                            </enumeratedValue>
81618                        </enumeratedValues>
81619                    </field>
81620                </fields>
81621            </register>
81622            <register>
81623                <name>SW_LOCK16</name>
81624                <addressOffset>0x00000040</addressOffset>
81625                <description>Software lock register for page 16.
81626
81627                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81628                <resetValue>0x00000000</resetValue>
81629                <fields>
81630                    <field>
81631                        <name>NSEC</name>
81632                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81633                        <bitRange>[3:2]</bitRange>
81634                        <access>read-write</access>
81635                        <enumeratedValues>
81636                            <enumeratedValue>
81637                                <name>read_write</name>
81638                                <value>0</value>
81639                            </enumeratedValue>
81640                            <enumeratedValue>
81641                                <name>read_only</name>
81642                                <value>1</value>
81643                            </enumeratedValue>
81644                            <enumeratedValue>
81645                                <name>inaccessible</name>
81646                                <value>3</value>
81647                            </enumeratedValue>
81648                        </enumeratedValues>
81649                    </field>
81650                    <field>
81651                        <name>SEC</name>
81652                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81653                        <bitRange>[1:0]</bitRange>
81654                        <access>read-write</access>
81655                        <enumeratedValues>
81656                            <enumeratedValue>
81657                                <name>read_write</name>
81658                                <value>0</value>
81659                            </enumeratedValue>
81660                            <enumeratedValue>
81661                                <name>read_only</name>
81662                                <value>1</value>
81663                            </enumeratedValue>
81664                            <enumeratedValue>
81665                                <name>inaccessible</name>
81666                                <value>3</value>
81667                            </enumeratedValue>
81668                        </enumeratedValues>
81669                    </field>
81670                </fields>
81671            </register>
81672            <register>
81673                <name>SW_LOCK17</name>
81674                <addressOffset>0x00000044</addressOffset>
81675                <description>Software lock register for page 17.
81676
81677                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81678                <resetValue>0x00000000</resetValue>
81679                <fields>
81680                    <field>
81681                        <name>NSEC</name>
81682                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81683                        <bitRange>[3:2]</bitRange>
81684                        <access>read-write</access>
81685                        <enumeratedValues>
81686                            <enumeratedValue>
81687                                <name>read_write</name>
81688                                <value>0</value>
81689                            </enumeratedValue>
81690                            <enumeratedValue>
81691                                <name>read_only</name>
81692                                <value>1</value>
81693                            </enumeratedValue>
81694                            <enumeratedValue>
81695                                <name>inaccessible</name>
81696                                <value>3</value>
81697                            </enumeratedValue>
81698                        </enumeratedValues>
81699                    </field>
81700                    <field>
81701                        <name>SEC</name>
81702                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81703                        <bitRange>[1:0]</bitRange>
81704                        <access>read-write</access>
81705                        <enumeratedValues>
81706                            <enumeratedValue>
81707                                <name>read_write</name>
81708                                <value>0</value>
81709                            </enumeratedValue>
81710                            <enumeratedValue>
81711                                <name>read_only</name>
81712                                <value>1</value>
81713                            </enumeratedValue>
81714                            <enumeratedValue>
81715                                <name>inaccessible</name>
81716                                <value>3</value>
81717                            </enumeratedValue>
81718                        </enumeratedValues>
81719                    </field>
81720                </fields>
81721            </register>
81722            <register>
81723                <name>SW_LOCK18</name>
81724                <addressOffset>0x00000048</addressOffset>
81725                <description>Software lock register for page 18.
81726
81727                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81728                <resetValue>0x00000000</resetValue>
81729                <fields>
81730                    <field>
81731                        <name>NSEC</name>
81732                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81733                        <bitRange>[3:2]</bitRange>
81734                        <access>read-write</access>
81735                        <enumeratedValues>
81736                            <enumeratedValue>
81737                                <name>read_write</name>
81738                                <value>0</value>
81739                            </enumeratedValue>
81740                            <enumeratedValue>
81741                                <name>read_only</name>
81742                                <value>1</value>
81743                            </enumeratedValue>
81744                            <enumeratedValue>
81745                                <name>inaccessible</name>
81746                                <value>3</value>
81747                            </enumeratedValue>
81748                        </enumeratedValues>
81749                    </field>
81750                    <field>
81751                        <name>SEC</name>
81752                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81753                        <bitRange>[1:0]</bitRange>
81754                        <access>read-write</access>
81755                        <enumeratedValues>
81756                            <enumeratedValue>
81757                                <name>read_write</name>
81758                                <value>0</value>
81759                            </enumeratedValue>
81760                            <enumeratedValue>
81761                                <name>read_only</name>
81762                                <value>1</value>
81763                            </enumeratedValue>
81764                            <enumeratedValue>
81765                                <name>inaccessible</name>
81766                                <value>3</value>
81767                            </enumeratedValue>
81768                        </enumeratedValues>
81769                    </field>
81770                </fields>
81771            </register>
81772            <register>
81773                <name>SW_LOCK19</name>
81774                <addressOffset>0x0000004c</addressOffset>
81775                <description>Software lock register for page 19.
81776
81777                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81778                <resetValue>0x00000000</resetValue>
81779                <fields>
81780                    <field>
81781                        <name>NSEC</name>
81782                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81783                        <bitRange>[3:2]</bitRange>
81784                        <access>read-write</access>
81785                        <enumeratedValues>
81786                            <enumeratedValue>
81787                                <name>read_write</name>
81788                                <value>0</value>
81789                            </enumeratedValue>
81790                            <enumeratedValue>
81791                                <name>read_only</name>
81792                                <value>1</value>
81793                            </enumeratedValue>
81794                            <enumeratedValue>
81795                                <name>inaccessible</name>
81796                                <value>3</value>
81797                            </enumeratedValue>
81798                        </enumeratedValues>
81799                    </field>
81800                    <field>
81801                        <name>SEC</name>
81802                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81803                        <bitRange>[1:0]</bitRange>
81804                        <access>read-write</access>
81805                        <enumeratedValues>
81806                            <enumeratedValue>
81807                                <name>read_write</name>
81808                                <value>0</value>
81809                            </enumeratedValue>
81810                            <enumeratedValue>
81811                                <name>read_only</name>
81812                                <value>1</value>
81813                            </enumeratedValue>
81814                            <enumeratedValue>
81815                                <name>inaccessible</name>
81816                                <value>3</value>
81817                            </enumeratedValue>
81818                        </enumeratedValues>
81819                    </field>
81820                </fields>
81821            </register>
81822            <register>
81823                <name>SW_LOCK20</name>
81824                <addressOffset>0x00000050</addressOffset>
81825                <description>Software lock register for page 20.
81826
81827                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81828                <resetValue>0x00000000</resetValue>
81829                <fields>
81830                    <field>
81831                        <name>NSEC</name>
81832                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81833                        <bitRange>[3:2]</bitRange>
81834                        <access>read-write</access>
81835                        <enumeratedValues>
81836                            <enumeratedValue>
81837                                <name>read_write</name>
81838                                <value>0</value>
81839                            </enumeratedValue>
81840                            <enumeratedValue>
81841                                <name>read_only</name>
81842                                <value>1</value>
81843                            </enumeratedValue>
81844                            <enumeratedValue>
81845                                <name>inaccessible</name>
81846                                <value>3</value>
81847                            </enumeratedValue>
81848                        </enumeratedValues>
81849                    </field>
81850                    <field>
81851                        <name>SEC</name>
81852                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81853                        <bitRange>[1:0]</bitRange>
81854                        <access>read-write</access>
81855                        <enumeratedValues>
81856                            <enumeratedValue>
81857                                <name>read_write</name>
81858                                <value>0</value>
81859                            </enumeratedValue>
81860                            <enumeratedValue>
81861                                <name>read_only</name>
81862                                <value>1</value>
81863                            </enumeratedValue>
81864                            <enumeratedValue>
81865                                <name>inaccessible</name>
81866                                <value>3</value>
81867                            </enumeratedValue>
81868                        </enumeratedValues>
81869                    </field>
81870                </fields>
81871            </register>
81872            <register>
81873                <name>SW_LOCK21</name>
81874                <addressOffset>0x00000054</addressOffset>
81875                <description>Software lock register for page 21.
81876
81877                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81878                <resetValue>0x00000000</resetValue>
81879                <fields>
81880                    <field>
81881                        <name>NSEC</name>
81882                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81883                        <bitRange>[3:2]</bitRange>
81884                        <access>read-write</access>
81885                        <enumeratedValues>
81886                            <enumeratedValue>
81887                                <name>read_write</name>
81888                                <value>0</value>
81889                            </enumeratedValue>
81890                            <enumeratedValue>
81891                                <name>read_only</name>
81892                                <value>1</value>
81893                            </enumeratedValue>
81894                            <enumeratedValue>
81895                                <name>inaccessible</name>
81896                                <value>3</value>
81897                            </enumeratedValue>
81898                        </enumeratedValues>
81899                    </field>
81900                    <field>
81901                        <name>SEC</name>
81902                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81903                        <bitRange>[1:0]</bitRange>
81904                        <access>read-write</access>
81905                        <enumeratedValues>
81906                            <enumeratedValue>
81907                                <name>read_write</name>
81908                                <value>0</value>
81909                            </enumeratedValue>
81910                            <enumeratedValue>
81911                                <name>read_only</name>
81912                                <value>1</value>
81913                            </enumeratedValue>
81914                            <enumeratedValue>
81915                                <name>inaccessible</name>
81916                                <value>3</value>
81917                            </enumeratedValue>
81918                        </enumeratedValues>
81919                    </field>
81920                </fields>
81921            </register>
81922            <register>
81923                <name>SW_LOCK22</name>
81924                <addressOffset>0x00000058</addressOffset>
81925                <description>Software lock register for page 22.
81926
81927                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81928                <resetValue>0x00000000</resetValue>
81929                <fields>
81930                    <field>
81931                        <name>NSEC</name>
81932                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81933                        <bitRange>[3:2]</bitRange>
81934                        <access>read-write</access>
81935                        <enumeratedValues>
81936                            <enumeratedValue>
81937                                <name>read_write</name>
81938                                <value>0</value>
81939                            </enumeratedValue>
81940                            <enumeratedValue>
81941                                <name>read_only</name>
81942                                <value>1</value>
81943                            </enumeratedValue>
81944                            <enumeratedValue>
81945                                <name>inaccessible</name>
81946                                <value>3</value>
81947                            </enumeratedValue>
81948                        </enumeratedValues>
81949                    </field>
81950                    <field>
81951                        <name>SEC</name>
81952                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
81953                        <bitRange>[1:0]</bitRange>
81954                        <access>read-write</access>
81955                        <enumeratedValues>
81956                            <enumeratedValue>
81957                                <name>read_write</name>
81958                                <value>0</value>
81959                            </enumeratedValue>
81960                            <enumeratedValue>
81961                                <name>read_only</name>
81962                                <value>1</value>
81963                            </enumeratedValue>
81964                            <enumeratedValue>
81965                                <name>inaccessible</name>
81966                                <value>3</value>
81967                            </enumeratedValue>
81968                        </enumeratedValues>
81969                    </field>
81970                </fields>
81971            </register>
81972            <register>
81973                <name>SW_LOCK23</name>
81974                <addressOffset>0x0000005c</addressOffset>
81975                <description>Software lock register for page 23.
81976
81977                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
81978                <resetValue>0x00000000</resetValue>
81979                <fields>
81980                    <field>
81981                        <name>NSEC</name>
81982                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
81983                        <bitRange>[3:2]</bitRange>
81984                        <access>read-write</access>
81985                        <enumeratedValues>
81986                            <enumeratedValue>
81987                                <name>read_write</name>
81988                                <value>0</value>
81989                            </enumeratedValue>
81990                            <enumeratedValue>
81991                                <name>read_only</name>
81992                                <value>1</value>
81993                            </enumeratedValue>
81994                            <enumeratedValue>
81995                                <name>inaccessible</name>
81996                                <value>3</value>
81997                            </enumeratedValue>
81998                        </enumeratedValues>
81999                    </field>
82000                    <field>
82001                        <name>SEC</name>
82002                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82003                        <bitRange>[1:0]</bitRange>
82004                        <access>read-write</access>
82005                        <enumeratedValues>
82006                            <enumeratedValue>
82007                                <name>read_write</name>
82008                                <value>0</value>
82009                            </enumeratedValue>
82010                            <enumeratedValue>
82011                                <name>read_only</name>
82012                                <value>1</value>
82013                            </enumeratedValue>
82014                            <enumeratedValue>
82015                                <name>inaccessible</name>
82016                                <value>3</value>
82017                            </enumeratedValue>
82018                        </enumeratedValues>
82019                    </field>
82020                </fields>
82021            </register>
82022            <register>
82023                <name>SW_LOCK24</name>
82024                <addressOffset>0x00000060</addressOffset>
82025                <description>Software lock register for page 24.
82026
82027                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82028                <resetValue>0x00000000</resetValue>
82029                <fields>
82030                    <field>
82031                        <name>NSEC</name>
82032                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82033                        <bitRange>[3:2]</bitRange>
82034                        <access>read-write</access>
82035                        <enumeratedValues>
82036                            <enumeratedValue>
82037                                <name>read_write</name>
82038                                <value>0</value>
82039                            </enumeratedValue>
82040                            <enumeratedValue>
82041                                <name>read_only</name>
82042                                <value>1</value>
82043                            </enumeratedValue>
82044                            <enumeratedValue>
82045                                <name>inaccessible</name>
82046                                <value>3</value>
82047                            </enumeratedValue>
82048                        </enumeratedValues>
82049                    </field>
82050                    <field>
82051                        <name>SEC</name>
82052                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82053                        <bitRange>[1:0]</bitRange>
82054                        <access>read-write</access>
82055                        <enumeratedValues>
82056                            <enumeratedValue>
82057                                <name>read_write</name>
82058                                <value>0</value>
82059                            </enumeratedValue>
82060                            <enumeratedValue>
82061                                <name>read_only</name>
82062                                <value>1</value>
82063                            </enumeratedValue>
82064                            <enumeratedValue>
82065                                <name>inaccessible</name>
82066                                <value>3</value>
82067                            </enumeratedValue>
82068                        </enumeratedValues>
82069                    </field>
82070                </fields>
82071            </register>
82072            <register>
82073                <name>SW_LOCK25</name>
82074                <addressOffset>0x00000064</addressOffset>
82075                <description>Software lock register for page 25.
82076
82077                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82078                <resetValue>0x00000000</resetValue>
82079                <fields>
82080                    <field>
82081                        <name>NSEC</name>
82082                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82083                        <bitRange>[3:2]</bitRange>
82084                        <access>read-write</access>
82085                        <enumeratedValues>
82086                            <enumeratedValue>
82087                                <name>read_write</name>
82088                                <value>0</value>
82089                            </enumeratedValue>
82090                            <enumeratedValue>
82091                                <name>read_only</name>
82092                                <value>1</value>
82093                            </enumeratedValue>
82094                            <enumeratedValue>
82095                                <name>inaccessible</name>
82096                                <value>3</value>
82097                            </enumeratedValue>
82098                        </enumeratedValues>
82099                    </field>
82100                    <field>
82101                        <name>SEC</name>
82102                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82103                        <bitRange>[1:0]</bitRange>
82104                        <access>read-write</access>
82105                        <enumeratedValues>
82106                            <enumeratedValue>
82107                                <name>read_write</name>
82108                                <value>0</value>
82109                            </enumeratedValue>
82110                            <enumeratedValue>
82111                                <name>read_only</name>
82112                                <value>1</value>
82113                            </enumeratedValue>
82114                            <enumeratedValue>
82115                                <name>inaccessible</name>
82116                                <value>3</value>
82117                            </enumeratedValue>
82118                        </enumeratedValues>
82119                    </field>
82120                </fields>
82121            </register>
82122            <register>
82123                <name>SW_LOCK26</name>
82124                <addressOffset>0x00000068</addressOffset>
82125                <description>Software lock register for page 26.
82126
82127                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82128                <resetValue>0x00000000</resetValue>
82129                <fields>
82130                    <field>
82131                        <name>NSEC</name>
82132                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82133                        <bitRange>[3:2]</bitRange>
82134                        <access>read-write</access>
82135                        <enumeratedValues>
82136                            <enumeratedValue>
82137                                <name>read_write</name>
82138                                <value>0</value>
82139                            </enumeratedValue>
82140                            <enumeratedValue>
82141                                <name>read_only</name>
82142                                <value>1</value>
82143                            </enumeratedValue>
82144                            <enumeratedValue>
82145                                <name>inaccessible</name>
82146                                <value>3</value>
82147                            </enumeratedValue>
82148                        </enumeratedValues>
82149                    </field>
82150                    <field>
82151                        <name>SEC</name>
82152                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82153                        <bitRange>[1:0]</bitRange>
82154                        <access>read-write</access>
82155                        <enumeratedValues>
82156                            <enumeratedValue>
82157                                <name>read_write</name>
82158                                <value>0</value>
82159                            </enumeratedValue>
82160                            <enumeratedValue>
82161                                <name>read_only</name>
82162                                <value>1</value>
82163                            </enumeratedValue>
82164                            <enumeratedValue>
82165                                <name>inaccessible</name>
82166                                <value>3</value>
82167                            </enumeratedValue>
82168                        </enumeratedValues>
82169                    </field>
82170                </fields>
82171            </register>
82172            <register>
82173                <name>SW_LOCK27</name>
82174                <addressOffset>0x0000006c</addressOffset>
82175                <description>Software lock register for page 27.
82176
82177                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82178                <resetValue>0x00000000</resetValue>
82179                <fields>
82180                    <field>
82181                        <name>NSEC</name>
82182                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82183                        <bitRange>[3:2]</bitRange>
82184                        <access>read-write</access>
82185                        <enumeratedValues>
82186                            <enumeratedValue>
82187                                <name>read_write</name>
82188                                <value>0</value>
82189                            </enumeratedValue>
82190                            <enumeratedValue>
82191                                <name>read_only</name>
82192                                <value>1</value>
82193                            </enumeratedValue>
82194                            <enumeratedValue>
82195                                <name>inaccessible</name>
82196                                <value>3</value>
82197                            </enumeratedValue>
82198                        </enumeratedValues>
82199                    </field>
82200                    <field>
82201                        <name>SEC</name>
82202                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82203                        <bitRange>[1:0]</bitRange>
82204                        <access>read-write</access>
82205                        <enumeratedValues>
82206                            <enumeratedValue>
82207                                <name>read_write</name>
82208                                <value>0</value>
82209                            </enumeratedValue>
82210                            <enumeratedValue>
82211                                <name>read_only</name>
82212                                <value>1</value>
82213                            </enumeratedValue>
82214                            <enumeratedValue>
82215                                <name>inaccessible</name>
82216                                <value>3</value>
82217                            </enumeratedValue>
82218                        </enumeratedValues>
82219                    </field>
82220                </fields>
82221            </register>
82222            <register>
82223                <name>SW_LOCK28</name>
82224                <addressOffset>0x00000070</addressOffset>
82225                <description>Software lock register for page 28.
82226
82227                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82228                <resetValue>0x00000000</resetValue>
82229                <fields>
82230                    <field>
82231                        <name>NSEC</name>
82232                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82233                        <bitRange>[3:2]</bitRange>
82234                        <access>read-write</access>
82235                        <enumeratedValues>
82236                            <enumeratedValue>
82237                                <name>read_write</name>
82238                                <value>0</value>
82239                            </enumeratedValue>
82240                            <enumeratedValue>
82241                                <name>read_only</name>
82242                                <value>1</value>
82243                            </enumeratedValue>
82244                            <enumeratedValue>
82245                                <name>inaccessible</name>
82246                                <value>3</value>
82247                            </enumeratedValue>
82248                        </enumeratedValues>
82249                    </field>
82250                    <field>
82251                        <name>SEC</name>
82252                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82253                        <bitRange>[1:0]</bitRange>
82254                        <access>read-write</access>
82255                        <enumeratedValues>
82256                            <enumeratedValue>
82257                                <name>read_write</name>
82258                                <value>0</value>
82259                            </enumeratedValue>
82260                            <enumeratedValue>
82261                                <name>read_only</name>
82262                                <value>1</value>
82263                            </enumeratedValue>
82264                            <enumeratedValue>
82265                                <name>inaccessible</name>
82266                                <value>3</value>
82267                            </enumeratedValue>
82268                        </enumeratedValues>
82269                    </field>
82270                </fields>
82271            </register>
82272            <register>
82273                <name>SW_LOCK29</name>
82274                <addressOffset>0x00000074</addressOffset>
82275                <description>Software lock register for page 29.
82276
82277                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82278                <resetValue>0x00000000</resetValue>
82279                <fields>
82280                    <field>
82281                        <name>NSEC</name>
82282                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82283                        <bitRange>[3:2]</bitRange>
82284                        <access>read-write</access>
82285                        <enumeratedValues>
82286                            <enumeratedValue>
82287                                <name>read_write</name>
82288                                <value>0</value>
82289                            </enumeratedValue>
82290                            <enumeratedValue>
82291                                <name>read_only</name>
82292                                <value>1</value>
82293                            </enumeratedValue>
82294                            <enumeratedValue>
82295                                <name>inaccessible</name>
82296                                <value>3</value>
82297                            </enumeratedValue>
82298                        </enumeratedValues>
82299                    </field>
82300                    <field>
82301                        <name>SEC</name>
82302                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82303                        <bitRange>[1:0]</bitRange>
82304                        <access>read-write</access>
82305                        <enumeratedValues>
82306                            <enumeratedValue>
82307                                <name>read_write</name>
82308                                <value>0</value>
82309                            </enumeratedValue>
82310                            <enumeratedValue>
82311                                <name>read_only</name>
82312                                <value>1</value>
82313                            </enumeratedValue>
82314                            <enumeratedValue>
82315                                <name>inaccessible</name>
82316                                <value>3</value>
82317                            </enumeratedValue>
82318                        </enumeratedValues>
82319                    </field>
82320                </fields>
82321            </register>
82322            <register>
82323                <name>SW_LOCK30</name>
82324                <addressOffset>0x00000078</addressOffset>
82325                <description>Software lock register for page 30.
82326
82327                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82328                <resetValue>0x00000000</resetValue>
82329                <fields>
82330                    <field>
82331                        <name>NSEC</name>
82332                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82333                        <bitRange>[3:2]</bitRange>
82334                        <access>read-write</access>
82335                        <enumeratedValues>
82336                            <enumeratedValue>
82337                                <name>read_write</name>
82338                                <value>0</value>
82339                            </enumeratedValue>
82340                            <enumeratedValue>
82341                                <name>read_only</name>
82342                                <value>1</value>
82343                            </enumeratedValue>
82344                            <enumeratedValue>
82345                                <name>inaccessible</name>
82346                                <value>3</value>
82347                            </enumeratedValue>
82348                        </enumeratedValues>
82349                    </field>
82350                    <field>
82351                        <name>SEC</name>
82352                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82353                        <bitRange>[1:0]</bitRange>
82354                        <access>read-write</access>
82355                        <enumeratedValues>
82356                            <enumeratedValue>
82357                                <name>read_write</name>
82358                                <value>0</value>
82359                            </enumeratedValue>
82360                            <enumeratedValue>
82361                                <name>read_only</name>
82362                                <value>1</value>
82363                            </enumeratedValue>
82364                            <enumeratedValue>
82365                                <name>inaccessible</name>
82366                                <value>3</value>
82367                            </enumeratedValue>
82368                        </enumeratedValues>
82369                    </field>
82370                </fields>
82371            </register>
82372            <register>
82373                <name>SW_LOCK31</name>
82374                <addressOffset>0x0000007c</addressOffset>
82375                <description>Software lock register for page 31.
82376
82377                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82378                <resetValue>0x00000000</resetValue>
82379                <fields>
82380                    <field>
82381                        <name>NSEC</name>
82382                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82383                        <bitRange>[3:2]</bitRange>
82384                        <access>read-write</access>
82385                        <enumeratedValues>
82386                            <enumeratedValue>
82387                                <name>read_write</name>
82388                                <value>0</value>
82389                            </enumeratedValue>
82390                            <enumeratedValue>
82391                                <name>read_only</name>
82392                                <value>1</value>
82393                            </enumeratedValue>
82394                            <enumeratedValue>
82395                                <name>inaccessible</name>
82396                                <value>3</value>
82397                            </enumeratedValue>
82398                        </enumeratedValues>
82399                    </field>
82400                    <field>
82401                        <name>SEC</name>
82402                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82403                        <bitRange>[1:0]</bitRange>
82404                        <access>read-write</access>
82405                        <enumeratedValues>
82406                            <enumeratedValue>
82407                                <name>read_write</name>
82408                                <value>0</value>
82409                            </enumeratedValue>
82410                            <enumeratedValue>
82411                                <name>read_only</name>
82412                                <value>1</value>
82413                            </enumeratedValue>
82414                            <enumeratedValue>
82415                                <name>inaccessible</name>
82416                                <value>3</value>
82417                            </enumeratedValue>
82418                        </enumeratedValues>
82419                    </field>
82420                </fields>
82421            </register>
82422            <register>
82423                <name>SW_LOCK32</name>
82424                <addressOffset>0x00000080</addressOffset>
82425                <description>Software lock register for page 32.
82426
82427                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82428                <resetValue>0x00000000</resetValue>
82429                <fields>
82430                    <field>
82431                        <name>NSEC</name>
82432                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82433                        <bitRange>[3:2]</bitRange>
82434                        <access>read-write</access>
82435                        <enumeratedValues>
82436                            <enumeratedValue>
82437                                <name>read_write</name>
82438                                <value>0</value>
82439                            </enumeratedValue>
82440                            <enumeratedValue>
82441                                <name>read_only</name>
82442                                <value>1</value>
82443                            </enumeratedValue>
82444                            <enumeratedValue>
82445                                <name>inaccessible</name>
82446                                <value>3</value>
82447                            </enumeratedValue>
82448                        </enumeratedValues>
82449                    </field>
82450                    <field>
82451                        <name>SEC</name>
82452                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82453                        <bitRange>[1:0]</bitRange>
82454                        <access>read-write</access>
82455                        <enumeratedValues>
82456                            <enumeratedValue>
82457                                <name>read_write</name>
82458                                <value>0</value>
82459                            </enumeratedValue>
82460                            <enumeratedValue>
82461                                <name>read_only</name>
82462                                <value>1</value>
82463                            </enumeratedValue>
82464                            <enumeratedValue>
82465                                <name>inaccessible</name>
82466                                <value>3</value>
82467                            </enumeratedValue>
82468                        </enumeratedValues>
82469                    </field>
82470                </fields>
82471            </register>
82472            <register>
82473                <name>SW_LOCK33</name>
82474                <addressOffset>0x00000084</addressOffset>
82475                <description>Software lock register for page 33.
82476
82477                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82478                <resetValue>0x00000000</resetValue>
82479                <fields>
82480                    <field>
82481                        <name>NSEC</name>
82482                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82483                        <bitRange>[3:2]</bitRange>
82484                        <access>read-write</access>
82485                        <enumeratedValues>
82486                            <enumeratedValue>
82487                                <name>read_write</name>
82488                                <value>0</value>
82489                            </enumeratedValue>
82490                            <enumeratedValue>
82491                                <name>read_only</name>
82492                                <value>1</value>
82493                            </enumeratedValue>
82494                            <enumeratedValue>
82495                                <name>inaccessible</name>
82496                                <value>3</value>
82497                            </enumeratedValue>
82498                        </enumeratedValues>
82499                    </field>
82500                    <field>
82501                        <name>SEC</name>
82502                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82503                        <bitRange>[1:0]</bitRange>
82504                        <access>read-write</access>
82505                        <enumeratedValues>
82506                            <enumeratedValue>
82507                                <name>read_write</name>
82508                                <value>0</value>
82509                            </enumeratedValue>
82510                            <enumeratedValue>
82511                                <name>read_only</name>
82512                                <value>1</value>
82513                            </enumeratedValue>
82514                            <enumeratedValue>
82515                                <name>inaccessible</name>
82516                                <value>3</value>
82517                            </enumeratedValue>
82518                        </enumeratedValues>
82519                    </field>
82520                </fields>
82521            </register>
82522            <register>
82523                <name>SW_LOCK34</name>
82524                <addressOffset>0x00000088</addressOffset>
82525                <description>Software lock register for page 34.
82526
82527                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82528                <resetValue>0x00000000</resetValue>
82529                <fields>
82530                    <field>
82531                        <name>NSEC</name>
82532                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82533                        <bitRange>[3:2]</bitRange>
82534                        <access>read-write</access>
82535                        <enumeratedValues>
82536                            <enumeratedValue>
82537                                <name>read_write</name>
82538                                <value>0</value>
82539                            </enumeratedValue>
82540                            <enumeratedValue>
82541                                <name>read_only</name>
82542                                <value>1</value>
82543                            </enumeratedValue>
82544                            <enumeratedValue>
82545                                <name>inaccessible</name>
82546                                <value>3</value>
82547                            </enumeratedValue>
82548                        </enumeratedValues>
82549                    </field>
82550                    <field>
82551                        <name>SEC</name>
82552                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82553                        <bitRange>[1:0]</bitRange>
82554                        <access>read-write</access>
82555                        <enumeratedValues>
82556                            <enumeratedValue>
82557                                <name>read_write</name>
82558                                <value>0</value>
82559                            </enumeratedValue>
82560                            <enumeratedValue>
82561                                <name>read_only</name>
82562                                <value>1</value>
82563                            </enumeratedValue>
82564                            <enumeratedValue>
82565                                <name>inaccessible</name>
82566                                <value>3</value>
82567                            </enumeratedValue>
82568                        </enumeratedValues>
82569                    </field>
82570                </fields>
82571            </register>
82572            <register>
82573                <name>SW_LOCK35</name>
82574                <addressOffset>0x0000008c</addressOffset>
82575                <description>Software lock register for page 35.
82576
82577                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82578                <resetValue>0x00000000</resetValue>
82579                <fields>
82580                    <field>
82581                        <name>NSEC</name>
82582                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82583                        <bitRange>[3:2]</bitRange>
82584                        <access>read-write</access>
82585                        <enumeratedValues>
82586                            <enumeratedValue>
82587                                <name>read_write</name>
82588                                <value>0</value>
82589                            </enumeratedValue>
82590                            <enumeratedValue>
82591                                <name>read_only</name>
82592                                <value>1</value>
82593                            </enumeratedValue>
82594                            <enumeratedValue>
82595                                <name>inaccessible</name>
82596                                <value>3</value>
82597                            </enumeratedValue>
82598                        </enumeratedValues>
82599                    </field>
82600                    <field>
82601                        <name>SEC</name>
82602                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82603                        <bitRange>[1:0]</bitRange>
82604                        <access>read-write</access>
82605                        <enumeratedValues>
82606                            <enumeratedValue>
82607                                <name>read_write</name>
82608                                <value>0</value>
82609                            </enumeratedValue>
82610                            <enumeratedValue>
82611                                <name>read_only</name>
82612                                <value>1</value>
82613                            </enumeratedValue>
82614                            <enumeratedValue>
82615                                <name>inaccessible</name>
82616                                <value>3</value>
82617                            </enumeratedValue>
82618                        </enumeratedValues>
82619                    </field>
82620                </fields>
82621            </register>
82622            <register>
82623                <name>SW_LOCK36</name>
82624                <addressOffset>0x00000090</addressOffset>
82625                <description>Software lock register for page 36.
82626
82627                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82628                <resetValue>0x00000000</resetValue>
82629                <fields>
82630                    <field>
82631                        <name>NSEC</name>
82632                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82633                        <bitRange>[3:2]</bitRange>
82634                        <access>read-write</access>
82635                        <enumeratedValues>
82636                            <enumeratedValue>
82637                                <name>read_write</name>
82638                                <value>0</value>
82639                            </enumeratedValue>
82640                            <enumeratedValue>
82641                                <name>read_only</name>
82642                                <value>1</value>
82643                            </enumeratedValue>
82644                            <enumeratedValue>
82645                                <name>inaccessible</name>
82646                                <value>3</value>
82647                            </enumeratedValue>
82648                        </enumeratedValues>
82649                    </field>
82650                    <field>
82651                        <name>SEC</name>
82652                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82653                        <bitRange>[1:0]</bitRange>
82654                        <access>read-write</access>
82655                        <enumeratedValues>
82656                            <enumeratedValue>
82657                                <name>read_write</name>
82658                                <value>0</value>
82659                            </enumeratedValue>
82660                            <enumeratedValue>
82661                                <name>read_only</name>
82662                                <value>1</value>
82663                            </enumeratedValue>
82664                            <enumeratedValue>
82665                                <name>inaccessible</name>
82666                                <value>3</value>
82667                            </enumeratedValue>
82668                        </enumeratedValues>
82669                    </field>
82670                </fields>
82671            </register>
82672            <register>
82673                <name>SW_LOCK37</name>
82674                <addressOffset>0x00000094</addressOffset>
82675                <description>Software lock register for page 37.
82676
82677                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82678                <resetValue>0x00000000</resetValue>
82679                <fields>
82680                    <field>
82681                        <name>NSEC</name>
82682                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82683                        <bitRange>[3:2]</bitRange>
82684                        <access>read-write</access>
82685                        <enumeratedValues>
82686                            <enumeratedValue>
82687                                <name>read_write</name>
82688                                <value>0</value>
82689                            </enumeratedValue>
82690                            <enumeratedValue>
82691                                <name>read_only</name>
82692                                <value>1</value>
82693                            </enumeratedValue>
82694                            <enumeratedValue>
82695                                <name>inaccessible</name>
82696                                <value>3</value>
82697                            </enumeratedValue>
82698                        </enumeratedValues>
82699                    </field>
82700                    <field>
82701                        <name>SEC</name>
82702                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82703                        <bitRange>[1:0]</bitRange>
82704                        <access>read-write</access>
82705                        <enumeratedValues>
82706                            <enumeratedValue>
82707                                <name>read_write</name>
82708                                <value>0</value>
82709                            </enumeratedValue>
82710                            <enumeratedValue>
82711                                <name>read_only</name>
82712                                <value>1</value>
82713                            </enumeratedValue>
82714                            <enumeratedValue>
82715                                <name>inaccessible</name>
82716                                <value>3</value>
82717                            </enumeratedValue>
82718                        </enumeratedValues>
82719                    </field>
82720                </fields>
82721            </register>
82722            <register>
82723                <name>SW_LOCK38</name>
82724                <addressOffset>0x00000098</addressOffset>
82725                <description>Software lock register for page 38.
82726
82727                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82728                <resetValue>0x00000000</resetValue>
82729                <fields>
82730                    <field>
82731                        <name>NSEC</name>
82732                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82733                        <bitRange>[3:2]</bitRange>
82734                        <access>read-write</access>
82735                        <enumeratedValues>
82736                            <enumeratedValue>
82737                                <name>read_write</name>
82738                                <value>0</value>
82739                            </enumeratedValue>
82740                            <enumeratedValue>
82741                                <name>read_only</name>
82742                                <value>1</value>
82743                            </enumeratedValue>
82744                            <enumeratedValue>
82745                                <name>inaccessible</name>
82746                                <value>3</value>
82747                            </enumeratedValue>
82748                        </enumeratedValues>
82749                    </field>
82750                    <field>
82751                        <name>SEC</name>
82752                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82753                        <bitRange>[1:0]</bitRange>
82754                        <access>read-write</access>
82755                        <enumeratedValues>
82756                            <enumeratedValue>
82757                                <name>read_write</name>
82758                                <value>0</value>
82759                            </enumeratedValue>
82760                            <enumeratedValue>
82761                                <name>read_only</name>
82762                                <value>1</value>
82763                            </enumeratedValue>
82764                            <enumeratedValue>
82765                                <name>inaccessible</name>
82766                                <value>3</value>
82767                            </enumeratedValue>
82768                        </enumeratedValues>
82769                    </field>
82770                </fields>
82771            </register>
82772            <register>
82773                <name>SW_LOCK39</name>
82774                <addressOffset>0x0000009c</addressOffset>
82775                <description>Software lock register for page 39.
82776
82777                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82778                <resetValue>0x00000000</resetValue>
82779                <fields>
82780                    <field>
82781                        <name>NSEC</name>
82782                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82783                        <bitRange>[3:2]</bitRange>
82784                        <access>read-write</access>
82785                        <enumeratedValues>
82786                            <enumeratedValue>
82787                                <name>read_write</name>
82788                                <value>0</value>
82789                            </enumeratedValue>
82790                            <enumeratedValue>
82791                                <name>read_only</name>
82792                                <value>1</value>
82793                            </enumeratedValue>
82794                            <enumeratedValue>
82795                                <name>inaccessible</name>
82796                                <value>3</value>
82797                            </enumeratedValue>
82798                        </enumeratedValues>
82799                    </field>
82800                    <field>
82801                        <name>SEC</name>
82802                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82803                        <bitRange>[1:0]</bitRange>
82804                        <access>read-write</access>
82805                        <enumeratedValues>
82806                            <enumeratedValue>
82807                                <name>read_write</name>
82808                                <value>0</value>
82809                            </enumeratedValue>
82810                            <enumeratedValue>
82811                                <name>read_only</name>
82812                                <value>1</value>
82813                            </enumeratedValue>
82814                            <enumeratedValue>
82815                                <name>inaccessible</name>
82816                                <value>3</value>
82817                            </enumeratedValue>
82818                        </enumeratedValues>
82819                    </field>
82820                </fields>
82821            </register>
82822            <register>
82823                <name>SW_LOCK40</name>
82824                <addressOffset>0x000000a0</addressOffset>
82825                <description>Software lock register for page 40.
82826
82827                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82828                <resetValue>0x00000000</resetValue>
82829                <fields>
82830                    <field>
82831                        <name>NSEC</name>
82832                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82833                        <bitRange>[3:2]</bitRange>
82834                        <access>read-write</access>
82835                        <enumeratedValues>
82836                            <enumeratedValue>
82837                                <name>read_write</name>
82838                                <value>0</value>
82839                            </enumeratedValue>
82840                            <enumeratedValue>
82841                                <name>read_only</name>
82842                                <value>1</value>
82843                            </enumeratedValue>
82844                            <enumeratedValue>
82845                                <name>inaccessible</name>
82846                                <value>3</value>
82847                            </enumeratedValue>
82848                        </enumeratedValues>
82849                    </field>
82850                    <field>
82851                        <name>SEC</name>
82852                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82853                        <bitRange>[1:0]</bitRange>
82854                        <access>read-write</access>
82855                        <enumeratedValues>
82856                            <enumeratedValue>
82857                                <name>read_write</name>
82858                                <value>0</value>
82859                            </enumeratedValue>
82860                            <enumeratedValue>
82861                                <name>read_only</name>
82862                                <value>1</value>
82863                            </enumeratedValue>
82864                            <enumeratedValue>
82865                                <name>inaccessible</name>
82866                                <value>3</value>
82867                            </enumeratedValue>
82868                        </enumeratedValues>
82869                    </field>
82870                </fields>
82871            </register>
82872            <register>
82873                <name>SW_LOCK41</name>
82874                <addressOffset>0x000000a4</addressOffset>
82875                <description>Software lock register for page 41.
82876
82877                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82878                <resetValue>0x00000000</resetValue>
82879                <fields>
82880                    <field>
82881                        <name>NSEC</name>
82882                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82883                        <bitRange>[3:2]</bitRange>
82884                        <access>read-write</access>
82885                        <enumeratedValues>
82886                            <enumeratedValue>
82887                                <name>read_write</name>
82888                                <value>0</value>
82889                            </enumeratedValue>
82890                            <enumeratedValue>
82891                                <name>read_only</name>
82892                                <value>1</value>
82893                            </enumeratedValue>
82894                            <enumeratedValue>
82895                                <name>inaccessible</name>
82896                                <value>3</value>
82897                            </enumeratedValue>
82898                        </enumeratedValues>
82899                    </field>
82900                    <field>
82901                        <name>SEC</name>
82902                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82903                        <bitRange>[1:0]</bitRange>
82904                        <access>read-write</access>
82905                        <enumeratedValues>
82906                            <enumeratedValue>
82907                                <name>read_write</name>
82908                                <value>0</value>
82909                            </enumeratedValue>
82910                            <enumeratedValue>
82911                                <name>read_only</name>
82912                                <value>1</value>
82913                            </enumeratedValue>
82914                            <enumeratedValue>
82915                                <name>inaccessible</name>
82916                                <value>3</value>
82917                            </enumeratedValue>
82918                        </enumeratedValues>
82919                    </field>
82920                </fields>
82921            </register>
82922            <register>
82923                <name>SW_LOCK42</name>
82924                <addressOffset>0x000000a8</addressOffset>
82925                <description>Software lock register for page 42.
82926
82927                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82928                <resetValue>0x00000000</resetValue>
82929                <fields>
82930                    <field>
82931                        <name>NSEC</name>
82932                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82933                        <bitRange>[3:2]</bitRange>
82934                        <access>read-write</access>
82935                        <enumeratedValues>
82936                            <enumeratedValue>
82937                                <name>read_write</name>
82938                                <value>0</value>
82939                            </enumeratedValue>
82940                            <enumeratedValue>
82941                                <name>read_only</name>
82942                                <value>1</value>
82943                            </enumeratedValue>
82944                            <enumeratedValue>
82945                                <name>inaccessible</name>
82946                                <value>3</value>
82947                            </enumeratedValue>
82948                        </enumeratedValues>
82949                    </field>
82950                    <field>
82951                        <name>SEC</name>
82952                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
82953                        <bitRange>[1:0]</bitRange>
82954                        <access>read-write</access>
82955                        <enumeratedValues>
82956                            <enumeratedValue>
82957                                <name>read_write</name>
82958                                <value>0</value>
82959                            </enumeratedValue>
82960                            <enumeratedValue>
82961                                <name>read_only</name>
82962                                <value>1</value>
82963                            </enumeratedValue>
82964                            <enumeratedValue>
82965                                <name>inaccessible</name>
82966                                <value>3</value>
82967                            </enumeratedValue>
82968                        </enumeratedValues>
82969                    </field>
82970                </fields>
82971            </register>
82972            <register>
82973                <name>SW_LOCK43</name>
82974                <addressOffset>0x000000ac</addressOffset>
82975                <description>Software lock register for page 43.
82976
82977                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
82978                <resetValue>0x00000000</resetValue>
82979                <fields>
82980                    <field>
82981                        <name>NSEC</name>
82982                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
82983                        <bitRange>[3:2]</bitRange>
82984                        <access>read-write</access>
82985                        <enumeratedValues>
82986                            <enumeratedValue>
82987                                <name>read_write</name>
82988                                <value>0</value>
82989                            </enumeratedValue>
82990                            <enumeratedValue>
82991                                <name>read_only</name>
82992                                <value>1</value>
82993                            </enumeratedValue>
82994                            <enumeratedValue>
82995                                <name>inaccessible</name>
82996                                <value>3</value>
82997                            </enumeratedValue>
82998                        </enumeratedValues>
82999                    </field>
83000                    <field>
83001                        <name>SEC</name>
83002                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83003                        <bitRange>[1:0]</bitRange>
83004                        <access>read-write</access>
83005                        <enumeratedValues>
83006                            <enumeratedValue>
83007                                <name>read_write</name>
83008                                <value>0</value>
83009                            </enumeratedValue>
83010                            <enumeratedValue>
83011                                <name>read_only</name>
83012                                <value>1</value>
83013                            </enumeratedValue>
83014                            <enumeratedValue>
83015                                <name>inaccessible</name>
83016                                <value>3</value>
83017                            </enumeratedValue>
83018                        </enumeratedValues>
83019                    </field>
83020                </fields>
83021            </register>
83022            <register>
83023                <name>SW_LOCK44</name>
83024                <addressOffset>0x000000b0</addressOffset>
83025                <description>Software lock register for page 44.
83026
83027                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83028                <resetValue>0x00000000</resetValue>
83029                <fields>
83030                    <field>
83031                        <name>NSEC</name>
83032                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83033                        <bitRange>[3:2]</bitRange>
83034                        <access>read-write</access>
83035                        <enumeratedValues>
83036                            <enumeratedValue>
83037                                <name>read_write</name>
83038                                <value>0</value>
83039                            </enumeratedValue>
83040                            <enumeratedValue>
83041                                <name>read_only</name>
83042                                <value>1</value>
83043                            </enumeratedValue>
83044                            <enumeratedValue>
83045                                <name>inaccessible</name>
83046                                <value>3</value>
83047                            </enumeratedValue>
83048                        </enumeratedValues>
83049                    </field>
83050                    <field>
83051                        <name>SEC</name>
83052                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83053                        <bitRange>[1:0]</bitRange>
83054                        <access>read-write</access>
83055                        <enumeratedValues>
83056                            <enumeratedValue>
83057                                <name>read_write</name>
83058                                <value>0</value>
83059                            </enumeratedValue>
83060                            <enumeratedValue>
83061                                <name>read_only</name>
83062                                <value>1</value>
83063                            </enumeratedValue>
83064                            <enumeratedValue>
83065                                <name>inaccessible</name>
83066                                <value>3</value>
83067                            </enumeratedValue>
83068                        </enumeratedValues>
83069                    </field>
83070                </fields>
83071            </register>
83072            <register>
83073                <name>SW_LOCK45</name>
83074                <addressOffset>0x000000b4</addressOffset>
83075                <description>Software lock register for page 45.
83076
83077                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83078                <resetValue>0x00000000</resetValue>
83079                <fields>
83080                    <field>
83081                        <name>NSEC</name>
83082                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83083                        <bitRange>[3:2]</bitRange>
83084                        <access>read-write</access>
83085                        <enumeratedValues>
83086                            <enumeratedValue>
83087                                <name>read_write</name>
83088                                <value>0</value>
83089                            </enumeratedValue>
83090                            <enumeratedValue>
83091                                <name>read_only</name>
83092                                <value>1</value>
83093                            </enumeratedValue>
83094                            <enumeratedValue>
83095                                <name>inaccessible</name>
83096                                <value>3</value>
83097                            </enumeratedValue>
83098                        </enumeratedValues>
83099                    </field>
83100                    <field>
83101                        <name>SEC</name>
83102                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83103                        <bitRange>[1:0]</bitRange>
83104                        <access>read-write</access>
83105                        <enumeratedValues>
83106                            <enumeratedValue>
83107                                <name>read_write</name>
83108                                <value>0</value>
83109                            </enumeratedValue>
83110                            <enumeratedValue>
83111                                <name>read_only</name>
83112                                <value>1</value>
83113                            </enumeratedValue>
83114                            <enumeratedValue>
83115                                <name>inaccessible</name>
83116                                <value>3</value>
83117                            </enumeratedValue>
83118                        </enumeratedValues>
83119                    </field>
83120                </fields>
83121            </register>
83122            <register>
83123                <name>SW_LOCK46</name>
83124                <addressOffset>0x000000b8</addressOffset>
83125                <description>Software lock register for page 46.
83126
83127                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83128                <resetValue>0x00000000</resetValue>
83129                <fields>
83130                    <field>
83131                        <name>NSEC</name>
83132                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83133                        <bitRange>[3:2]</bitRange>
83134                        <access>read-write</access>
83135                        <enumeratedValues>
83136                            <enumeratedValue>
83137                                <name>read_write</name>
83138                                <value>0</value>
83139                            </enumeratedValue>
83140                            <enumeratedValue>
83141                                <name>read_only</name>
83142                                <value>1</value>
83143                            </enumeratedValue>
83144                            <enumeratedValue>
83145                                <name>inaccessible</name>
83146                                <value>3</value>
83147                            </enumeratedValue>
83148                        </enumeratedValues>
83149                    </field>
83150                    <field>
83151                        <name>SEC</name>
83152                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83153                        <bitRange>[1:0]</bitRange>
83154                        <access>read-write</access>
83155                        <enumeratedValues>
83156                            <enumeratedValue>
83157                                <name>read_write</name>
83158                                <value>0</value>
83159                            </enumeratedValue>
83160                            <enumeratedValue>
83161                                <name>read_only</name>
83162                                <value>1</value>
83163                            </enumeratedValue>
83164                            <enumeratedValue>
83165                                <name>inaccessible</name>
83166                                <value>3</value>
83167                            </enumeratedValue>
83168                        </enumeratedValues>
83169                    </field>
83170                </fields>
83171            </register>
83172            <register>
83173                <name>SW_LOCK47</name>
83174                <addressOffset>0x000000bc</addressOffset>
83175                <description>Software lock register for page 47.
83176
83177                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83178                <resetValue>0x00000000</resetValue>
83179                <fields>
83180                    <field>
83181                        <name>NSEC</name>
83182                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83183                        <bitRange>[3:2]</bitRange>
83184                        <access>read-write</access>
83185                        <enumeratedValues>
83186                            <enumeratedValue>
83187                                <name>read_write</name>
83188                                <value>0</value>
83189                            </enumeratedValue>
83190                            <enumeratedValue>
83191                                <name>read_only</name>
83192                                <value>1</value>
83193                            </enumeratedValue>
83194                            <enumeratedValue>
83195                                <name>inaccessible</name>
83196                                <value>3</value>
83197                            </enumeratedValue>
83198                        </enumeratedValues>
83199                    </field>
83200                    <field>
83201                        <name>SEC</name>
83202                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83203                        <bitRange>[1:0]</bitRange>
83204                        <access>read-write</access>
83205                        <enumeratedValues>
83206                            <enumeratedValue>
83207                                <name>read_write</name>
83208                                <value>0</value>
83209                            </enumeratedValue>
83210                            <enumeratedValue>
83211                                <name>read_only</name>
83212                                <value>1</value>
83213                            </enumeratedValue>
83214                            <enumeratedValue>
83215                                <name>inaccessible</name>
83216                                <value>3</value>
83217                            </enumeratedValue>
83218                        </enumeratedValues>
83219                    </field>
83220                </fields>
83221            </register>
83222            <register>
83223                <name>SW_LOCK48</name>
83224                <addressOffset>0x000000c0</addressOffset>
83225                <description>Software lock register for page 48.
83226
83227                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83228                <resetValue>0x00000000</resetValue>
83229                <fields>
83230                    <field>
83231                        <name>NSEC</name>
83232                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83233                        <bitRange>[3:2]</bitRange>
83234                        <access>read-write</access>
83235                        <enumeratedValues>
83236                            <enumeratedValue>
83237                                <name>read_write</name>
83238                                <value>0</value>
83239                            </enumeratedValue>
83240                            <enumeratedValue>
83241                                <name>read_only</name>
83242                                <value>1</value>
83243                            </enumeratedValue>
83244                            <enumeratedValue>
83245                                <name>inaccessible</name>
83246                                <value>3</value>
83247                            </enumeratedValue>
83248                        </enumeratedValues>
83249                    </field>
83250                    <field>
83251                        <name>SEC</name>
83252                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83253                        <bitRange>[1:0]</bitRange>
83254                        <access>read-write</access>
83255                        <enumeratedValues>
83256                            <enumeratedValue>
83257                                <name>read_write</name>
83258                                <value>0</value>
83259                            </enumeratedValue>
83260                            <enumeratedValue>
83261                                <name>read_only</name>
83262                                <value>1</value>
83263                            </enumeratedValue>
83264                            <enumeratedValue>
83265                                <name>inaccessible</name>
83266                                <value>3</value>
83267                            </enumeratedValue>
83268                        </enumeratedValues>
83269                    </field>
83270                </fields>
83271            </register>
83272            <register>
83273                <name>SW_LOCK49</name>
83274                <addressOffset>0x000000c4</addressOffset>
83275                <description>Software lock register for page 49.
83276
83277                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83278                <resetValue>0x00000000</resetValue>
83279                <fields>
83280                    <field>
83281                        <name>NSEC</name>
83282                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83283                        <bitRange>[3:2]</bitRange>
83284                        <access>read-write</access>
83285                        <enumeratedValues>
83286                            <enumeratedValue>
83287                                <name>read_write</name>
83288                                <value>0</value>
83289                            </enumeratedValue>
83290                            <enumeratedValue>
83291                                <name>read_only</name>
83292                                <value>1</value>
83293                            </enumeratedValue>
83294                            <enumeratedValue>
83295                                <name>inaccessible</name>
83296                                <value>3</value>
83297                            </enumeratedValue>
83298                        </enumeratedValues>
83299                    </field>
83300                    <field>
83301                        <name>SEC</name>
83302                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83303                        <bitRange>[1:0]</bitRange>
83304                        <access>read-write</access>
83305                        <enumeratedValues>
83306                            <enumeratedValue>
83307                                <name>read_write</name>
83308                                <value>0</value>
83309                            </enumeratedValue>
83310                            <enumeratedValue>
83311                                <name>read_only</name>
83312                                <value>1</value>
83313                            </enumeratedValue>
83314                            <enumeratedValue>
83315                                <name>inaccessible</name>
83316                                <value>3</value>
83317                            </enumeratedValue>
83318                        </enumeratedValues>
83319                    </field>
83320                </fields>
83321            </register>
83322            <register>
83323                <name>SW_LOCK50</name>
83324                <addressOffset>0x000000c8</addressOffset>
83325                <description>Software lock register for page 50.
83326
83327                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83328                <resetValue>0x00000000</resetValue>
83329                <fields>
83330                    <field>
83331                        <name>NSEC</name>
83332                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83333                        <bitRange>[3:2]</bitRange>
83334                        <access>read-write</access>
83335                        <enumeratedValues>
83336                            <enumeratedValue>
83337                                <name>read_write</name>
83338                                <value>0</value>
83339                            </enumeratedValue>
83340                            <enumeratedValue>
83341                                <name>read_only</name>
83342                                <value>1</value>
83343                            </enumeratedValue>
83344                            <enumeratedValue>
83345                                <name>inaccessible</name>
83346                                <value>3</value>
83347                            </enumeratedValue>
83348                        </enumeratedValues>
83349                    </field>
83350                    <field>
83351                        <name>SEC</name>
83352                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83353                        <bitRange>[1:0]</bitRange>
83354                        <access>read-write</access>
83355                        <enumeratedValues>
83356                            <enumeratedValue>
83357                                <name>read_write</name>
83358                                <value>0</value>
83359                            </enumeratedValue>
83360                            <enumeratedValue>
83361                                <name>read_only</name>
83362                                <value>1</value>
83363                            </enumeratedValue>
83364                            <enumeratedValue>
83365                                <name>inaccessible</name>
83366                                <value>3</value>
83367                            </enumeratedValue>
83368                        </enumeratedValues>
83369                    </field>
83370                </fields>
83371            </register>
83372            <register>
83373                <name>SW_LOCK51</name>
83374                <addressOffset>0x000000cc</addressOffset>
83375                <description>Software lock register for page 51.
83376
83377                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83378                <resetValue>0x00000000</resetValue>
83379                <fields>
83380                    <field>
83381                        <name>NSEC</name>
83382                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83383                        <bitRange>[3:2]</bitRange>
83384                        <access>read-write</access>
83385                        <enumeratedValues>
83386                            <enumeratedValue>
83387                                <name>read_write</name>
83388                                <value>0</value>
83389                            </enumeratedValue>
83390                            <enumeratedValue>
83391                                <name>read_only</name>
83392                                <value>1</value>
83393                            </enumeratedValue>
83394                            <enumeratedValue>
83395                                <name>inaccessible</name>
83396                                <value>3</value>
83397                            </enumeratedValue>
83398                        </enumeratedValues>
83399                    </field>
83400                    <field>
83401                        <name>SEC</name>
83402                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83403                        <bitRange>[1:0]</bitRange>
83404                        <access>read-write</access>
83405                        <enumeratedValues>
83406                            <enumeratedValue>
83407                                <name>read_write</name>
83408                                <value>0</value>
83409                            </enumeratedValue>
83410                            <enumeratedValue>
83411                                <name>read_only</name>
83412                                <value>1</value>
83413                            </enumeratedValue>
83414                            <enumeratedValue>
83415                                <name>inaccessible</name>
83416                                <value>3</value>
83417                            </enumeratedValue>
83418                        </enumeratedValues>
83419                    </field>
83420                </fields>
83421            </register>
83422            <register>
83423                <name>SW_LOCK52</name>
83424                <addressOffset>0x000000d0</addressOffset>
83425                <description>Software lock register for page 52.
83426
83427                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83428                <resetValue>0x00000000</resetValue>
83429                <fields>
83430                    <field>
83431                        <name>NSEC</name>
83432                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83433                        <bitRange>[3:2]</bitRange>
83434                        <access>read-write</access>
83435                        <enumeratedValues>
83436                            <enumeratedValue>
83437                                <name>read_write</name>
83438                                <value>0</value>
83439                            </enumeratedValue>
83440                            <enumeratedValue>
83441                                <name>read_only</name>
83442                                <value>1</value>
83443                            </enumeratedValue>
83444                            <enumeratedValue>
83445                                <name>inaccessible</name>
83446                                <value>3</value>
83447                            </enumeratedValue>
83448                        </enumeratedValues>
83449                    </field>
83450                    <field>
83451                        <name>SEC</name>
83452                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83453                        <bitRange>[1:0]</bitRange>
83454                        <access>read-write</access>
83455                        <enumeratedValues>
83456                            <enumeratedValue>
83457                                <name>read_write</name>
83458                                <value>0</value>
83459                            </enumeratedValue>
83460                            <enumeratedValue>
83461                                <name>read_only</name>
83462                                <value>1</value>
83463                            </enumeratedValue>
83464                            <enumeratedValue>
83465                                <name>inaccessible</name>
83466                                <value>3</value>
83467                            </enumeratedValue>
83468                        </enumeratedValues>
83469                    </field>
83470                </fields>
83471            </register>
83472            <register>
83473                <name>SW_LOCK53</name>
83474                <addressOffset>0x000000d4</addressOffset>
83475                <description>Software lock register for page 53.
83476
83477                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83478                <resetValue>0x00000000</resetValue>
83479                <fields>
83480                    <field>
83481                        <name>NSEC</name>
83482                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83483                        <bitRange>[3:2]</bitRange>
83484                        <access>read-write</access>
83485                        <enumeratedValues>
83486                            <enumeratedValue>
83487                                <name>read_write</name>
83488                                <value>0</value>
83489                            </enumeratedValue>
83490                            <enumeratedValue>
83491                                <name>read_only</name>
83492                                <value>1</value>
83493                            </enumeratedValue>
83494                            <enumeratedValue>
83495                                <name>inaccessible</name>
83496                                <value>3</value>
83497                            </enumeratedValue>
83498                        </enumeratedValues>
83499                    </field>
83500                    <field>
83501                        <name>SEC</name>
83502                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83503                        <bitRange>[1:0]</bitRange>
83504                        <access>read-write</access>
83505                        <enumeratedValues>
83506                            <enumeratedValue>
83507                                <name>read_write</name>
83508                                <value>0</value>
83509                            </enumeratedValue>
83510                            <enumeratedValue>
83511                                <name>read_only</name>
83512                                <value>1</value>
83513                            </enumeratedValue>
83514                            <enumeratedValue>
83515                                <name>inaccessible</name>
83516                                <value>3</value>
83517                            </enumeratedValue>
83518                        </enumeratedValues>
83519                    </field>
83520                </fields>
83521            </register>
83522            <register>
83523                <name>SW_LOCK54</name>
83524                <addressOffset>0x000000d8</addressOffset>
83525                <description>Software lock register for page 54.
83526
83527                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83528                <resetValue>0x00000000</resetValue>
83529                <fields>
83530                    <field>
83531                        <name>NSEC</name>
83532                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83533                        <bitRange>[3:2]</bitRange>
83534                        <access>read-write</access>
83535                        <enumeratedValues>
83536                            <enumeratedValue>
83537                                <name>read_write</name>
83538                                <value>0</value>
83539                            </enumeratedValue>
83540                            <enumeratedValue>
83541                                <name>read_only</name>
83542                                <value>1</value>
83543                            </enumeratedValue>
83544                            <enumeratedValue>
83545                                <name>inaccessible</name>
83546                                <value>3</value>
83547                            </enumeratedValue>
83548                        </enumeratedValues>
83549                    </field>
83550                    <field>
83551                        <name>SEC</name>
83552                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83553                        <bitRange>[1:0]</bitRange>
83554                        <access>read-write</access>
83555                        <enumeratedValues>
83556                            <enumeratedValue>
83557                                <name>read_write</name>
83558                                <value>0</value>
83559                            </enumeratedValue>
83560                            <enumeratedValue>
83561                                <name>read_only</name>
83562                                <value>1</value>
83563                            </enumeratedValue>
83564                            <enumeratedValue>
83565                                <name>inaccessible</name>
83566                                <value>3</value>
83567                            </enumeratedValue>
83568                        </enumeratedValues>
83569                    </field>
83570                </fields>
83571            </register>
83572            <register>
83573                <name>SW_LOCK55</name>
83574                <addressOffset>0x000000dc</addressOffset>
83575                <description>Software lock register for page 55.
83576
83577                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83578                <resetValue>0x00000000</resetValue>
83579                <fields>
83580                    <field>
83581                        <name>NSEC</name>
83582                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83583                        <bitRange>[3:2]</bitRange>
83584                        <access>read-write</access>
83585                        <enumeratedValues>
83586                            <enumeratedValue>
83587                                <name>read_write</name>
83588                                <value>0</value>
83589                            </enumeratedValue>
83590                            <enumeratedValue>
83591                                <name>read_only</name>
83592                                <value>1</value>
83593                            </enumeratedValue>
83594                            <enumeratedValue>
83595                                <name>inaccessible</name>
83596                                <value>3</value>
83597                            </enumeratedValue>
83598                        </enumeratedValues>
83599                    </field>
83600                    <field>
83601                        <name>SEC</name>
83602                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83603                        <bitRange>[1:0]</bitRange>
83604                        <access>read-write</access>
83605                        <enumeratedValues>
83606                            <enumeratedValue>
83607                                <name>read_write</name>
83608                                <value>0</value>
83609                            </enumeratedValue>
83610                            <enumeratedValue>
83611                                <name>read_only</name>
83612                                <value>1</value>
83613                            </enumeratedValue>
83614                            <enumeratedValue>
83615                                <name>inaccessible</name>
83616                                <value>3</value>
83617                            </enumeratedValue>
83618                        </enumeratedValues>
83619                    </field>
83620                </fields>
83621            </register>
83622            <register>
83623                <name>SW_LOCK56</name>
83624                <addressOffset>0x000000e0</addressOffset>
83625                <description>Software lock register for page 56.
83626
83627                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83628                <resetValue>0x00000000</resetValue>
83629                <fields>
83630                    <field>
83631                        <name>NSEC</name>
83632                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83633                        <bitRange>[3:2]</bitRange>
83634                        <access>read-write</access>
83635                        <enumeratedValues>
83636                            <enumeratedValue>
83637                                <name>read_write</name>
83638                                <value>0</value>
83639                            </enumeratedValue>
83640                            <enumeratedValue>
83641                                <name>read_only</name>
83642                                <value>1</value>
83643                            </enumeratedValue>
83644                            <enumeratedValue>
83645                                <name>inaccessible</name>
83646                                <value>3</value>
83647                            </enumeratedValue>
83648                        </enumeratedValues>
83649                    </field>
83650                    <field>
83651                        <name>SEC</name>
83652                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83653                        <bitRange>[1:0]</bitRange>
83654                        <access>read-write</access>
83655                        <enumeratedValues>
83656                            <enumeratedValue>
83657                                <name>read_write</name>
83658                                <value>0</value>
83659                            </enumeratedValue>
83660                            <enumeratedValue>
83661                                <name>read_only</name>
83662                                <value>1</value>
83663                            </enumeratedValue>
83664                            <enumeratedValue>
83665                                <name>inaccessible</name>
83666                                <value>3</value>
83667                            </enumeratedValue>
83668                        </enumeratedValues>
83669                    </field>
83670                </fields>
83671            </register>
83672            <register>
83673                <name>SW_LOCK57</name>
83674                <addressOffset>0x000000e4</addressOffset>
83675                <description>Software lock register for page 57.
83676
83677                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83678                <resetValue>0x00000000</resetValue>
83679                <fields>
83680                    <field>
83681                        <name>NSEC</name>
83682                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83683                        <bitRange>[3:2]</bitRange>
83684                        <access>read-write</access>
83685                        <enumeratedValues>
83686                            <enumeratedValue>
83687                                <name>read_write</name>
83688                                <value>0</value>
83689                            </enumeratedValue>
83690                            <enumeratedValue>
83691                                <name>read_only</name>
83692                                <value>1</value>
83693                            </enumeratedValue>
83694                            <enumeratedValue>
83695                                <name>inaccessible</name>
83696                                <value>3</value>
83697                            </enumeratedValue>
83698                        </enumeratedValues>
83699                    </field>
83700                    <field>
83701                        <name>SEC</name>
83702                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83703                        <bitRange>[1:0]</bitRange>
83704                        <access>read-write</access>
83705                        <enumeratedValues>
83706                            <enumeratedValue>
83707                                <name>read_write</name>
83708                                <value>0</value>
83709                            </enumeratedValue>
83710                            <enumeratedValue>
83711                                <name>read_only</name>
83712                                <value>1</value>
83713                            </enumeratedValue>
83714                            <enumeratedValue>
83715                                <name>inaccessible</name>
83716                                <value>3</value>
83717                            </enumeratedValue>
83718                        </enumeratedValues>
83719                    </field>
83720                </fields>
83721            </register>
83722            <register>
83723                <name>SW_LOCK58</name>
83724                <addressOffset>0x000000e8</addressOffset>
83725                <description>Software lock register for page 58.
83726
83727                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83728                <resetValue>0x00000000</resetValue>
83729                <fields>
83730                    <field>
83731                        <name>NSEC</name>
83732                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83733                        <bitRange>[3:2]</bitRange>
83734                        <access>read-write</access>
83735                        <enumeratedValues>
83736                            <enumeratedValue>
83737                                <name>read_write</name>
83738                                <value>0</value>
83739                            </enumeratedValue>
83740                            <enumeratedValue>
83741                                <name>read_only</name>
83742                                <value>1</value>
83743                            </enumeratedValue>
83744                            <enumeratedValue>
83745                                <name>inaccessible</name>
83746                                <value>3</value>
83747                            </enumeratedValue>
83748                        </enumeratedValues>
83749                    </field>
83750                    <field>
83751                        <name>SEC</name>
83752                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83753                        <bitRange>[1:0]</bitRange>
83754                        <access>read-write</access>
83755                        <enumeratedValues>
83756                            <enumeratedValue>
83757                                <name>read_write</name>
83758                                <value>0</value>
83759                            </enumeratedValue>
83760                            <enumeratedValue>
83761                                <name>read_only</name>
83762                                <value>1</value>
83763                            </enumeratedValue>
83764                            <enumeratedValue>
83765                                <name>inaccessible</name>
83766                                <value>3</value>
83767                            </enumeratedValue>
83768                        </enumeratedValues>
83769                    </field>
83770                </fields>
83771            </register>
83772            <register>
83773                <name>SW_LOCK59</name>
83774                <addressOffset>0x000000ec</addressOffset>
83775                <description>Software lock register for page 59.
83776
83777                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83778                <resetValue>0x00000000</resetValue>
83779                <fields>
83780                    <field>
83781                        <name>NSEC</name>
83782                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83783                        <bitRange>[3:2]</bitRange>
83784                        <access>read-write</access>
83785                        <enumeratedValues>
83786                            <enumeratedValue>
83787                                <name>read_write</name>
83788                                <value>0</value>
83789                            </enumeratedValue>
83790                            <enumeratedValue>
83791                                <name>read_only</name>
83792                                <value>1</value>
83793                            </enumeratedValue>
83794                            <enumeratedValue>
83795                                <name>inaccessible</name>
83796                                <value>3</value>
83797                            </enumeratedValue>
83798                        </enumeratedValues>
83799                    </field>
83800                    <field>
83801                        <name>SEC</name>
83802                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83803                        <bitRange>[1:0]</bitRange>
83804                        <access>read-write</access>
83805                        <enumeratedValues>
83806                            <enumeratedValue>
83807                                <name>read_write</name>
83808                                <value>0</value>
83809                            </enumeratedValue>
83810                            <enumeratedValue>
83811                                <name>read_only</name>
83812                                <value>1</value>
83813                            </enumeratedValue>
83814                            <enumeratedValue>
83815                                <name>inaccessible</name>
83816                                <value>3</value>
83817                            </enumeratedValue>
83818                        </enumeratedValues>
83819                    </field>
83820                </fields>
83821            </register>
83822            <register>
83823                <name>SW_LOCK60</name>
83824                <addressOffset>0x000000f0</addressOffset>
83825                <description>Software lock register for page 60.
83826
83827                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83828                <resetValue>0x00000000</resetValue>
83829                <fields>
83830                    <field>
83831                        <name>NSEC</name>
83832                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83833                        <bitRange>[3:2]</bitRange>
83834                        <access>read-write</access>
83835                        <enumeratedValues>
83836                            <enumeratedValue>
83837                                <name>read_write</name>
83838                                <value>0</value>
83839                            </enumeratedValue>
83840                            <enumeratedValue>
83841                                <name>read_only</name>
83842                                <value>1</value>
83843                            </enumeratedValue>
83844                            <enumeratedValue>
83845                                <name>inaccessible</name>
83846                                <value>3</value>
83847                            </enumeratedValue>
83848                        </enumeratedValues>
83849                    </field>
83850                    <field>
83851                        <name>SEC</name>
83852                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83853                        <bitRange>[1:0]</bitRange>
83854                        <access>read-write</access>
83855                        <enumeratedValues>
83856                            <enumeratedValue>
83857                                <name>read_write</name>
83858                                <value>0</value>
83859                            </enumeratedValue>
83860                            <enumeratedValue>
83861                                <name>read_only</name>
83862                                <value>1</value>
83863                            </enumeratedValue>
83864                            <enumeratedValue>
83865                                <name>inaccessible</name>
83866                                <value>3</value>
83867                            </enumeratedValue>
83868                        </enumeratedValues>
83869                    </field>
83870                </fields>
83871            </register>
83872            <register>
83873                <name>SW_LOCK61</name>
83874                <addressOffset>0x000000f4</addressOffset>
83875                <description>Software lock register for page 61.
83876
83877                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83878                <resetValue>0x00000000</resetValue>
83879                <fields>
83880                    <field>
83881                        <name>NSEC</name>
83882                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83883                        <bitRange>[3:2]</bitRange>
83884                        <access>read-write</access>
83885                        <enumeratedValues>
83886                            <enumeratedValue>
83887                                <name>read_write</name>
83888                                <value>0</value>
83889                            </enumeratedValue>
83890                            <enumeratedValue>
83891                                <name>read_only</name>
83892                                <value>1</value>
83893                            </enumeratedValue>
83894                            <enumeratedValue>
83895                                <name>inaccessible</name>
83896                                <value>3</value>
83897                            </enumeratedValue>
83898                        </enumeratedValues>
83899                    </field>
83900                    <field>
83901                        <name>SEC</name>
83902                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83903                        <bitRange>[1:0]</bitRange>
83904                        <access>read-write</access>
83905                        <enumeratedValues>
83906                            <enumeratedValue>
83907                                <name>read_write</name>
83908                                <value>0</value>
83909                            </enumeratedValue>
83910                            <enumeratedValue>
83911                                <name>read_only</name>
83912                                <value>1</value>
83913                            </enumeratedValue>
83914                            <enumeratedValue>
83915                                <name>inaccessible</name>
83916                                <value>3</value>
83917                            </enumeratedValue>
83918                        </enumeratedValues>
83919                    </field>
83920                </fields>
83921            </register>
83922            <register>
83923                <name>SW_LOCK62</name>
83924                <addressOffset>0x000000f8</addressOffset>
83925                <description>Software lock register for page 62.
83926
83927                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83928                <resetValue>0x00000000</resetValue>
83929                <fields>
83930                    <field>
83931                        <name>NSEC</name>
83932                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83933                        <bitRange>[3:2]</bitRange>
83934                        <access>read-write</access>
83935                        <enumeratedValues>
83936                            <enumeratedValue>
83937                                <name>read_write</name>
83938                                <value>0</value>
83939                            </enumeratedValue>
83940                            <enumeratedValue>
83941                                <name>read_only</name>
83942                                <value>1</value>
83943                            </enumeratedValue>
83944                            <enumeratedValue>
83945                                <name>inaccessible</name>
83946                                <value>3</value>
83947                            </enumeratedValue>
83948                        </enumeratedValues>
83949                    </field>
83950                    <field>
83951                        <name>SEC</name>
83952                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
83953                        <bitRange>[1:0]</bitRange>
83954                        <access>read-write</access>
83955                        <enumeratedValues>
83956                            <enumeratedValue>
83957                                <name>read_write</name>
83958                                <value>0</value>
83959                            </enumeratedValue>
83960                            <enumeratedValue>
83961                                <name>read_only</name>
83962                                <value>1</value>
83963                            </enumeratedValue>
83964                            <enumeratedValue>
83965                                <name>inaccessible</name>
83966                                <value>3</value>
83967                            </enumeratedValue>
83968                        </enumeratedValues>
83969                    </field>
83970                </fields>
83971            </register>
83972            <register>
83973                <name>SW_LOCK63</name>
83974                <addressOffset>0x000000fc</addressOffset>
83975                <description>Software lock register for page 63.
83976
83977                    Locks are initialised from the OTP lock pages at reset. This register can be written to further advance the lock state of each page (until next reset), and read to check the current lock state of a page.</description>
83978                <resetValue>0x00000000</resetValue>
83979                <fields>
83980                    <field>
83981                        <name>NSEC</name>
83982                        <description>Non-secure lock status. Writes are OR&#39;d with the current value.</description>
83983                        <bitRange>[3:2]</bitRange>
83984                        <access>read-write</access>
83985                        <enumeratedValues>
83986                            <enumeratedValue>
83987                                <name>read_write</name>
83988                                <value>0</value>
83989                            </enumeratedValue>
83990                            <enumeratedValue>
83991                                <name>read_only</name>
83992                                <value>1</value>
83993                            </enumeratedValue>
83994                            <enumeratedValue>
83995                                <name>inaccessible</name>
83996                                <value>3</value>
83997                            </enumeratedValue>
83998                        </enumeratedValues>
83999                    </field>
84000                    <field>
84001                        <name>SEC</name>
84002                        <description>Secure lock status. Writes are OR&#39;d with the current value. This field is read-only to Non-secure code.</description>
84003                        <bitRange>[1:0]</bitRange>
84004                        <access>read-write</access>
84005                        <enumeratedValues>
84006                            <enumeratedValue>
84007                                <name>read_write</name>
84008                                <value>0</value>
84009                            </enumeratedValue>
84010                            <enumeratedValue>
84011                                <name>read_only</name>
84012                                <value>1</value>
84013                            </enumeratedValue>
84014                            <enumeratedValue>
84015                                <name>inaccessible</name>
84016                                <value>3</value>
84017                            </enumeratedValue>
84018                        </enumeratedValues>
84019                    </field>
84020                </fields>
84021            </register>
84022            <register>
84023                <name>SBPI_INSTR</name>
84024                <addressOffset>0x00000100</addressOffset>
84025                <description>Dispatch instructions to the SBPI interface, used for programming the OTP fuses.</description>
84026                <resetValue>0x00000000</resetValue>
84027                <fields>
84028                    <field>
84029                        <name>EXEC</name>
84030                        <description>Execute instruction</description>
84031                        <bitRange>[30:30]</bitRange>
84032                        <access>write-only</access>
84033                    </field>
84034                    <field>
84035                        <name>IS_WR</name>
84036                        <description>Payload type is write</description>
84037                        <bitRange>[29:29]</bitRange>
84038                        <access>read-write</access>
84039                    </field>
84040                    <field>
84041                        <name>HAS_PAYLOAD</name>
84042                        <description>Instruction has payload (data to be written or to be read)</description>
84043                        <bitRange>[28:28]</bitRange>
84044                        <access>read-write</access>
84045                    </field>
84046                    <field>
84047                        <name>PAYLOAD_SIZE_M1</name>
84048                        <description>Instruction payload size in bytes minus 1</description>
84049                        <bitRange>[27:24]</bitRange>
84050                        <access>read-write</access>
84051                    </field>
84052                    <field>
84053                        <name>TARGET</name>
84054                        <description>Instruction target, it can be PMC (0x3a) or DAP (0x02)</description>
84055                        <bitRange>[23:16]</bitRange>
84056                        <access>read-write</access>
84057                    </field>
84058                    <field>
84059                        <name>CMD</name>
84060                        <bitRange>[15:8]</bitRange>
84061                        <access>read-write</access>
84062                    </field>
84063                    <field>
84064                        <name>SHORT_WDATA</name>
84065                        <description>wdata to be used only when payload_size_m1=0</description>
84066                        <bitRange>[7:0]</bitRange>
84067                        <access>read-write</access>
84068                    </field>
84069                </fields>
84070            </register>
84071            <register>
84072                <name>SBPI_WDATA_0</name>
84073                <addressOffset>0x00000104</addressOffset>
84074                <description>SBPI write payload bytes 3..0</description>
84075                <resetValue>0x00000000</resetValue>
84076                <fields>
84077                    <field>
84078                        <name>SBPI_WDATA_0</name>
84079                        <bitRange>[31:0]</bitRange>
84080                        <access>read-write</access>
84081                    </field>
84082                </fields>
84083            </register>
84084            <register>
84085                <name>SBPI_WDATA_1</name>
84086                <addressOffset>0x00000108</addressOffset>
84087                <description>SBPI write payload bytes 7..4</description>
84088                <resetValue>0x00000000</resetValue>
84089                <fields>
84090                    <field>
84091                        <name>SBPI_WDATA_1</name>
84092                        <bitRange>[31:0]</bitRange>
84093                        <access>read-write</access>
84094                    </field>
84095                </fields>
84096            </register>
84097            <register>
84098                <name>SBPI_WDATA_2</name>
84099                <addressOffset>0x0000010c</addressOffset>
84100                <description>SBPI write payload bytes 11..8</description>
84101                <resetValue>0x00000000</resetValue>
84102                <fields>
84103                    <field>
84104                        <name>SBPI_WDATA_2</name>
84105                        <bitRange>[31:0]</bitRange>
84106                        <access>read-write</access>
84107                    </field>
84108                </fields>
84109            </register>
84110            <register>
84111                <name>SBPI_WDATA_3</name>
84112                <addressOffset>0x00000110</addressOffset>
84113                <description>SBPI write payload bytes 15..12</description>
84114                <resetValue>0x00000000</resetValue>
84115                <fields>
84116                    <field>
84117                        <name>SBPI_WDATA_3</name>
84118                        <bitRange>[31:0]</bitRange>
84119                        <access>read-write</access>
84120                    </field>
84121                </fields>
84122            </register>
84123            <register>
84124                <name>SBPI_RDATA_0</name>
84125                <addressOffset>0x00000114</addressOffset>
84126                <description>Read payload bytes 3..0. Once read, the data in the register will automatically clear to 0.</description>
84127                <resetValue>0x00000000</resetValue>
84128                <fields>
84129                    <field>
84130                        <name>SBPI_RDATA_0</name>
84131                        <bitRange>[31:0]</bitRange>
84132                        <access>read-only</access>
84133                        <readAction>modify</readAction>
84134                    </field>
84135                </fields>
84136            </register>
84137            <register>
84138                <name>SBPI_RDATA_1</name>
84139                <addressOffset>0x00000118</addressOffset>
84140                <description>Read payload bytes 7..4. Once read, the data in the register will automatically clear to 0.</description>
84141                <resetValue>0x00000000</resetValue>
84142                <fields>
84143                    <field>
84144                        <name>SBPI_RDATA_1</name>
84145                        <bitRange>[31:0]</bitRange>
84146                        <access>read-only</access>
84147                        <readAction>modify</readAction>
84148                    </field>
84149                </fields>
84150            </register>
84151            <register>
84152                <name>SBPI_RDATA_2</name>
84153                <addressOffset>0x0000011c</addressOffset>
84154                <description>Read payload bytes 11..8. Once read, the data in the register will automatically clear to 0.</description>
84155                <resetValue>0x00000000</resetValue>
84156                <fields>
84157                    <field>
84158                        <name>SBPI_RDATA_2</name>
84159                        <bitRange>[31:0]</bitRange>
84160                        <access>read-only</access>
84161                        <readAction>modify</readAction>
84162                    </field>
84163                </fields>
84164            </register>
84165            <register>
84166                <name>SBPI_RDATA_3</name>
84167                <addressOffset>0x00000120</addressOffset>
84168                <description>Read payload bytes 15..12. Once read, the data in the register will automatically clear to 0.</description>
84169                <resetValue>0x00000000</resetValue>
84170                <fields>
84171                    <field>
84172                        <name>SBPI_RDATA_3</name>
84173                        <bitRange>[31:0]</bitRange>
84174                        <access>read-only</access>
84175                        <readAction>modify</readAction>
84176                    </field>
84177                </fields>
84178            </register>
84179            <register>
84180                <name>SBPI_STATUS</name>
84181                <addressOffset>0x00000124</addressOffset>
84182                <resetValue>0x00000000</resetValue>
84183                <fields>
84184                    <field>
84185                        <name>MISO</name>
84186                        <description>SBPI MISO (master in - slave out): response from SBPI</description>
84187                        <bitRange>[23:16]</bitRange>
84188                        <access>read-only</access>
84189                    </field>
84190                    <field>
84191                        <name>FLAG</name>
84192                        <description>SBPI flag</description>
84193                        <bitRange>[12:12]</bitRange>
84194                        <access>read-only</access>
84195                    </field>
84196                    <field>
84197                        <name>INSTR_MISS</name>
84198                        <description>Last instruction missed (dropped), as the previous has not finished running</description>
84199                        <bitRange>[8:8]</bitRange>
84200                        <access>read-write</access>
84201                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84202                    </field>
84203                    <field>
84204                        <name>INSTR_DONE</name>
84205                        <description>Last instruction done</description>
84206                        <bitRange>[4:4]</bitRange>
84207                        <access>read-write</access>
84208                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84209                    </field>
84210                    <field>
84211                        <name>RDATA_VLD</name>
84212                        <description>Read command has returned data</description>
84213                        <bitRange>[0:0]</bitRange>
84214                        <access>read-write</access>
84215                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84216                    </field>
84217                </fields>
84218            </register>
84219            <register>
84220                <name>USR</name>
84221                <addressOffset>0x00000128</addressOffset>
84222                <description>Controls for APB data read interface (USER interface)</description>
84223                <resetValue>0x00000001</resetValue>
84224                <fields>
84225                    <field>
84226                        <name>PD</name>
84227                        <description>Power-down; 1 disables current reference. Must be 0 to read data from the OTP.</description>
84228                        <bitRange>[4:4]</bitRange>
84229                        <access>read-write</access>
84230                    </field>
84231                    <field>
84232                        <name>DCTRL</name>
84233                        <description>1 enables USER interface; 0 disables USER interface (enables SBPI).
84234
84235                            This bit must be cleared before performing any SBPI access, such as when programming the OTP. The APB data read interface (USER interface) will be inaccessible during this time, and will return a bus error if any read is attempted.</description>
84236                        <bitRange>[0:0]</bitRange>
84237                        <access>read-write</access>
84238                    </field>
84239                </fields>
84240            </register>
84241            <register>
84242                <name>DBG</name>
84243                <addressOffset>0x0000012c</addressOffset>
84244                <description>Debug for OTP power-on state machine</description>
84245                <resetValue>0x00000000</resetValue>
84246                <fields>
84247                    <field>
84248                        <name>CUSTOMER_RMA_FLAG</name>
84249                        <description>The chip is in RMA mode</description>
84250                        <bitRange>[12:12]</bitRange>
84251                        <access>read-only</access>
84252                    </field>
84253                    <field>
84254                        <name>PSM_STATE</name>
84255                        <description>Monitor the PSM FSM&#39;s state</description>
84256                        <bitRange>[7:4]</bitRange>
84257                        <access>read-only</access>
84258                    </field>
84259                    <field>
84260                        <name>ROSC_UP</name>
84261                        <description>Ring oscillator is up and running</description>
84262                        <bitRange>[3:3]</bitRange>
84263                        <access>read-only</access>
84264                    </field>
84265                    <field>
84266                        <name>ROSC_UP_SEEN</name>
84267                        <description>Ring oscillator was seen up and running</description>
84268                        <bitRange>[2:2]</bitRange>
84269                        <access>read-write</access>
84270                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84271                    </field>
84272                    <field>
84273                        <name>BOOT_DONE</name>
84274                        <description>PSM boot done status flag</description>
84275                        <bitRange>[1:1]</bitRange>
84276                        <access>read-only</access>
84277                    </field>
84278                    <field>
84279                        <name>PSM_DONE</name>
84280                        <description>PSM done status flag</description>
84281                        <bitRange>[0:0]</bitRange>
84282                        <access>read-only</access>
84283                    </field>
84284                </fields>
84285            </register>
84286            <register>
84287                <name>BIST</name>
84288                <addressOffset>0x00000134</addressOffset>
84289                <description>During BIST, count address locations that have at least one leaky bit</description>
84290                <resetValue>0x0fff0000</resetValue>
84291                <fields>
84292                    <field>
84293                        <name>CNT_FAIL</name>
84294                        <description>Flag if the count of address locations with at least one leaky bit exceeds cnt_max</description>
84295                        <bitRange>[30:30]</bitRange>
84296                        <access>read-only</access>
84297                    </field>
84298                    <field>
84299                        <name>CNT_CLR</name>
84300                        <description>Clear counter before use</description>
84301                        <bitRange>[29:29]</bitRange>
84302                        <access>write-only</access>
84303                    </field>
84304                    <field>
84305                        <name>CNT_ENA</name>
84306                        <description>Enable the counter before the BIST function is initiated</description>
84307                        <bitRange>[28:28]</bitRange>
84308                        <access>read-write</access>
84309                    </field>
84310                    <field>
84311                        <name>CNT_MAX</name>
84312                        <description>The cnt_fail flag will be set if the number of leaky locations exceeds this number</description>
84313                        <bitRange>[27:16]</bitRange>
84314                        <access>read-write</access>
84315                    </field>
84316                    <field>
84317                        <name>CNT</name>
84318                        <description>Number of locations that have at least one leaky bit. Note: This count is true only if the BIST was initiated without the fix option.</description>
84319                        <bitRange>[12:0]</bitRange>
84320                        <access>read-only</access>
84321                    </field>
84322                </fields>
84323            </register>
84324            <register>
84325                <name>CRT_KEY_W0</name>
84326                <addressOffset>0x00000138</addressOffset>
84327                <description>Word 0 (bits 31..0) of the key. Write only, read returns 0x0</description>
84328                <resetValue>0x00000000</resetValue>
84329                <fields>
84330                    <field>
84331                        <name>CRT_KEY_W0</name>
84332                        <bitRange>[31:0]</bitRange>
84333                        <access>write-only</access>
84334                    </field>
84335                </fields>
84336            </register>
84337            <register>
84338                <name>CRT_KEY_W1</name>
84339                <addressOffset>0x0000013c</addressOffset>
84340                <description>Word 1 (bits 63..32) of the key. Write only, read returns 0x0</description>
84341                <resetValue>0x00000000</resetValue>
84342                <fields>
84343                    <field>
84344                        <name>CRT_KEY_W1</name>
84345                        <bitRange>[31:0]</bitRange>
84346                        <access>write-only</access>
84347                    </field>
84348                </fields>
84349            </register>
84350            <register>
84351                <name>CRT_KEY_W2</name>
84352                <addressOffset>0x00000140</addressOffset>
84353                <description>Word 2 (bits 95..64) of the key. Write only, read returns 0x0</description>
84354                <resetValue>0x00000000</resetValue>
84355                <fields>
84356                    <field>
84357                        <name>CRT_KEY_W2</name>
84358                        <bitRange>[31:0]</bitRange>
84359                        <access>write-only</access>
84360                    </field>
84361                </fields>
84362            </register>
84363            <register>
84364                <name>CRT_KEY_W3</name>
84365                <addressOffset>0x00000144</addressOffset>
84366                <description>Word 3 (bits 127..96) of the key. Write only, read returns 0x0</description>
84367                <resetValue>0x00000000</resetValue>
84368                <fields>
84369                    <field>
84370                        <name>CRT_KEY_W3</name>
84371                        <bitRange>[31:0]</bitRange>
84372                        <access>write-only</access>
84373                    </field>
84374                </fields>
84375            </register>
84376            <register>
84377                <name>CRITICAL</name>
84378                <addressOffset>0x00000148</addressOffset>
84379                <description>Quickly check values of critical flags read during boot up</description>
84380                <resetValue>0x00000000</resetValue>
84381                <fields>
84382                    <field>
84383                        <name>RISCV_DISABLE</name>
84384                        <bitRange>[17:17]</bitRange>
84385                        <access>read-only</access>
84386                    </field>
84387                    <field>
84388                        <name>ARM_DISABLE</name>
84389                        <bitRange>[16:16]</bitRange>
84390                        <access>read-only</access>
84391                    </field>
84392                    <field>
84393                        <name>GLITCH_DETECTOR_SENS</name>
84394                        <bitRange>[6:5]</bitRange>
84395                        <access>read-only</access>
84396                    </field>
84397                    <field>
84398                        <name>GLITCH_DETECTOR_ENABLE</name>
84399                        <bitRange>[4:4]</bitRange>
84400                        <access>read-only</access>
84401                    </field>
84402                    <field>
84403                        <name>DEFAULT_ARCHSEL</name>
84404                        <bitRange>[3:3]</bitRange>
84405                        <access>read-only</access>
84406                    </field>
84407                    <field>
84408                        <name>DEBUG_DISABLE</name>
84409                        <bitRange>[2:2]</bitRange>
84410                        <access>read-only</access>
84411                    </field>
84412                    <field>
84413                        <name>SECURE_DEBUG_DISABLE</name>
84414                        <bitRange>[1:1]</bitRange>
84415                        <access>read-only</access>
84416                    </field>
84417                    <field>
84418                        <name>SECURE_BOOT_ENABLE</name>
84419                        <bitRange>[0:0]</bitRange>
84420                        <access>read-only</access>
84421                    </field>
84422                </fields>
84423            </register>
84424            <register>
84425                <name>KEY_VALID</name>
84426                <addressOffset>0x0000014c</addressOffset>
84427                <description>Which keys were valid (enrolled) at boot time</description>
84428                <resetValue>0x00000000</resetValue>
84429                <fields>
84430                    <field>
84431                        <name>KEY_VALID</name>
84432                        <bitRange>[7:0]</bitRange>
84433                        <access>read-only</access>
84434                    </field>
84435                </fields>
84436            </register>
84437            <register>
84438                <name>DEBUGEN</name>
84439                <addressOffset>0x00000150</addressOffset>
84440                <description>Enable a debug feature that has been disabled. Debug features are disabled if one of the relevant critical boot flags is set in OTP (DEBUG_DISABLE or SECURE_DEBUG_DISABLE), OR if a debug key is marked valid in OTP, and the matching key value has not been supplied over SWD.
84441
84442                    Specifically:
84443
84444                    - The DEBUG_DISABLE flag disables all debug features. This can be fully overridden by setting all bits of this register.
84445
84446                    - The SECURE_DEBUG_DISABLE flag disables secure processor debug. This can be fully overridden by setting the PROC0_SECURE and PROC1_SECURE bits of this register.
84447
84448                    - If a single debug key has been registered, and no matching key value has been supplied over SWD, then all debug features are disabled. This can be fully overridden by setting all bits of this register.
84449
84450                    - If both debug keys have been registered, and the Non-secure key&#39;s value (key 6) has been supplied over SWD, secure processor debug is disabled. This can be fully overridden by setting the PROC0_SECURE and PROC1_SECURE bits of this register.
84451
84452                    - If both debug keys have been registered, and the Secure key&#39;s value (key 5) has been supplied over SWD, then no debug features are disabled by the key mechanism. However, note that in this case debug features may still be disabled by the critical boot flags.</description>
84453                <resetValue>0x00000000</resetValue>
84454                <fields>
84455                    <field>
84456                        <name>MISC</name>
84457                        <description>Enable other debug components. Specifically, the CTI, and the APB-AP used to access the RISC-V Debug Module.
84458
84459                            These components are disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.</description>
84460                        <bitRange>[8:8]</bitRange>
84461                        <access>read-write</access>
84462                    </field>
84463                    <field>
84464                        <name>PROC1_SECURE</name>
84465                        <description>Permit core 1&#39;s Mem-AP to generate Secure accesses, assuming it is enabled at all. Also enable secure debug of core 1 (SPIDEN and SPNIDEN).
84466
84467                            Secure debug of core 1 is disabled by default if the secure debug disable critical flag is set, or if at least one debug key has been enrolled and the most secure of these enrolled key values not yet provided over SWD.</description>
84468                        <bitRange>[3:3]</bitRange>
84469                        <access>read-write</access>
84470                    </field>
84471                    <field>
84472                        <name>PROC1</name>
84473                        <description>Enable core 1&#39;s Mem-AP if it is currently disabled.
84474
84475                            The Mem-AP is disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.</description>
84476                        <bitRange>[2:2]</bitRange>
84477                        <access>read-write</access>
84478                    </field>
84479                    <field>
84480                        <name>PROC0_SECURE</name>
84481                        <description>Permit core 0&#39;s Mem-AP to generate Secure accesses, assuming it is enabled at all. Also enable secure debug of core 0 (SPIDEN and SPNIDEN).
84482
84483                            Secure debug of core 0 is disabled by default if the secure debug disable critical flag is set, or if at least one debug key has been enrolled and the most secure of these enrolled key values not yet provided over SWD.
84484
84485                            Note also that core Mem-APs are unconditionally disabled when a core is switched to RISC-V mode (by setting the ARCHSEL bit and performing a warm reset of the core).</description>
84486                        <bitRange>[1:1]</bitRange>
84487                        <access>read-write</access>
84488                    </field>
84489                    <field>
84490                        <name>PROC0</name>
84491                        <description>Enable core 0&#39;s Mem-AP if it is currently disabled.
84492
84493                            The Mem-AP is disabled by default if either of the debug disable critical flags is set, or if at least one debug key has been enrolled and the least secure of these enrolled key values has not been provided over SWD.
84494
84495                            Note also that core Mem-APs are unconditionally disabled when a core is switched to RISC-V mode (by setting the ARCHSEL bit and performing a warm reset of the core).</description>
84496                        <bitRange>[0:0]</bitRange>
84497                        <access>read-write</access>
84498                    </field>
84499                </fields>
84500            </register>
84501            <register>
84502                <name>DEBUGEN_LOCK</name>
84503                <addressOffset>0x00000154</addressOffset>
84504                <description>Write 1s to lock corresponding bits in DEBUGEN. This register is reset by the processor cold reset.</description>
84505                <resetValue>0x00000000</resetValue>
84506                <fields>
84507                    <field>
84508                        <name>MISC</name>
84509                        <description>Write 1 to lock the MISC bit of DEBUGEN. Can&#39;t be cleared once set.</description>
84510                        <bitRange>[8:8]</bitRange>
84511                        <access>read-write</access>
84512                    </field>
84513                    <field>
84514                        <name>PROC1_SECURE</name>
84515                        <description>Write 1 to lock the PROC1_SECURE bit of DEBUGEN. Can&#39;t be cleared once set.</description>
84516                        <bitRange>[3:3]</bitRange>
84517                        <access>read-write</access>
84518                    </field>
84519                    <field>
84520                        <name>PROC1</name>
84521                        <description>Write 1 to lock the PROC1 bit of DEBUGEN. Can&#39;t be cleared once set.</description>
84522                        <bitRange>[2:2]</bitRange>
84523                        <access>read-write</access>
84524                    </field>
84525                    <field>
84526                        <name>PROC0_SECURE</name>
84527                        <description>Write 1 to lock the PROC0_SECURE bit of DEBUGEN. Can&#39;t be cleared once set.</description>
84528                        <bitRange>[1:1]</bitRange>
84529                        <access>read-write</access>
84530                    </field>
84531                    <field>
84532                        <name>PROC0</name>
84533                        <description>Write 1 to lock the PROC0 bit of DEBUGEN. Can&#39;t be cleared once set.</description>
84534                        <bitRange>[0:0]</bitRange>
84535                        <access>read-write</access>
84536                    </field>
84537                </fields>
84538            </register>
84539            <register>
84540                <name>ARCHSEL</name>
84541                <addressOffset>0x00000158</addressOffset>
84542                <description>Architecture select (Arm/RISC-V). The default and allowable values of this register are constrained by the critical boot flags.
84543
84544                    This register is reset by the earliest reset in the switched core power domain (before a processor cold reset).
84545
84546                    Cores sample their architecture select signal on a warm reset. The source of the warm reset could be the system power-up state machine, the watchdog timer, Arm SYSRESETREQ or from RISC-V hartresetreq.
84547
84548                    Note that when an Arm core is deselected, its cold reset domain is also held in reset, since in particular the SYSRESETREQ bit becomes inaccessible once the core is deselected. Note also the RISC-V cores do not have a cold reset domain, since their corresponding controls are located in the Debug Module.</description>
84549                <resetValue>0x00000000</resetValue>
84550                <fields>
84551                    <field>
84552                        <name>CORE1</name>
84553                        <description>Select architecture for core 1.</description>
84554                        <bitRange>[1:1]</bitRange>
84555                        <access>read-write</access>
84556                        <enumeratedValues>
84557                            <enumeratedValue>
84558                                <name>arm</name>
84559                                <value>0</value>
84560                                <description>Switch core 1 to Arm (Cortex-M33)</description>
84561                            </enumeratedValue>
84562                            <enumeratedValue>
84563                                <name>riscv</name>
84564                                <value>1</value>
84565                                <description>Switch core 1 to RISC-V (Hazard3)</description>
84566                            </enumeratedValue>
84567                        </enumeratedValues>
84568                    </field>
84569                    <field>
84570                        <name>CORE0</name>
84571                        <description>Select architecture for core 0.</description>
84572                        <bitRange>[0:0]</bitRange>
84573                        <access>read-write</access>
84574                        <enumeratedValues>
84575                            <enumeratedValue>
84576                                <name>arm</name>
84577                                <value>0</value>
84578                                <description>Switch core 0 to Arm (Cortex-M33)</description>
84579                            </enumeratedValue>
84580                            <enumeratedValue>
84581                                <name>riscv</name>
84582                                <value>1</value>
84583                                <description>Switch core 0 to RISC-V (Hazard3)</description>
84584                            </enumeratedValue>
84585                        </enumeratedValues>
84586                    </field>
84587                </fields>
84588            </register>
84589            <register>
84590                <name>ARCHSEL_STATUS</name>
84591                <addressOffset>0x0000015c</addressOffset>
84592                <description>Get the current architecture select state of each core. Cores sample the current value of the ARCHSEL register when their warm reset is released, at which point the corresponding bit in this register will also update.</description>
84593                <resetValue>0x00000000</resetValue>
84594                <fields>
84595                    <field>
84596                        <name>CORE1</name>
84597                        <description>Current architecture for core 0. Updated on processor warm reset.</description>
84598                        <bitRange>[1:1]</bitRange>
84599                        <access>read-only</access>
84600                        <enumeratedValues>
84601                            <enumeratedValue>
84602                                <name>arm</name>
84603                                <value>0</value>
84604                                <description>Core 1 is currently Arm (Cortex-M33)</description>
84605                            </enumeratedValue>
84606                            <enumeratedValue>
84607                                <name>riscv</name>
84608                                <value>1</value>
84609                                <description>Core 1 is currently RISC-V (Hazard3)</description>
84610                            </enumeratedValue>
84611                        </enumeratedValues>
84612                    </field>
84613                    <field>
84614                        <name>CORE0</name>
84615                        <description>Current architecture for core 0. Updated on processor warm reset.</description>
84616                        <bitRange>[0:0]</bitRange>
84617                        <access>read-only</access>
84618                        <enumeratedValues>
84619                            <enumeratedValue>
84620                                <name>arm</name>
84621                                <value>0</value>
84622                                <description>Core 0 is currently Arm (Cortex-M33)</description>
84623                            </enumeratedValue>
84624                            <enumeratedValue>
84625                                <name>riscv</name>
84626                                <value>1</value>
84627                                <description>Core 0 is currently RISC-V (Hazard3)</description>
84628                            </enumeratedValue>
84629                        </enumeratedValues>
84630                    </field>
84631                </fields>
84632            </register>
84633            <register>
84634                <name>BOOTDIS</name>
84635                <addressOffset>0x00000160</addressOffset>
84636                <description>Tell the bootrom to ignore scratch register boot vectors (both power manager and watchdog) on the next power up.
84637
84638                    If an early boot stage has soft-locked some OTP pages in order to protect their contents from later stages, there is a risk that Secure code running at a later stage can unlock the pages by performing a watchdog reset that resets the OTP.
84639
84640                    This register can be used to ensure that the bootloader runs as normal on the next power up, preventing Secure code at a later stage from accessing OTP in its unlocked state.
84641
84642                    Should be used in conjunction with the power manager BOOTDIS register.</description>
84643                <resetValue>0x00000000</resetValue>
84644                <fields>
84645                    <field>
84646                        <name>NEXT</name>
84647                        <description>This flag always ORs writes into its current contents. It can be set but not cleared by software.
84648
84649                            The BOOTDIS_NEXT bit is OR&#39;d into the BOOTDIS_NOW bit when the core is powered down. Simultaneously, the BOOTDIS_NEXT bit is cleared. Setting this bit means that the boot scratch registers will be ignored following the next core power down.
84650
84651                            This flag should be set by an early boot stage that has soft-locked OTP pages, to prevent later stages from unlocking it via watchdog reset.</description>
84652                        <bitRange>[1:1]</bitRange>
84653                        <access>read-write</access>
84654                    </field>
84655                    <field>
84656                        <name>NOW</name>
84657                        <description>When the core is powered down, the current value of BOOTDIS_NEXT is OR&#39;d into BOOTDIS_NOW, and BOOTDIS_NEXT is cleared.
84658
84659                            The bootrom checks this flag before reading the boot scratch registers. If it is set, the bootrom clears it, and ignores the BOOT registers. This prevents Secure software from diverting the boot path before a bootloader has had the chance to soft lock OTP pages containing sensitive data.</description>
84660                        <bitRange>[0:0]</bitRange>
84661                        <access>read-write</access>
84662                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84663                    </field>
84664                </fields>
84665            </register>
84666            <register>
84667                <name>INTR</name>
84668                <addressOffset>0x00000164</addressOffset>
84669                <description>Raw Interrupts</description>
84670                <resetValue>0x00000000</resetValue>
84671                <fields>
84672                    <field>
84673                        <name>APB_RD_NSEC_FAIL</name>
84674                        <bitRange>[4:4]</bitRange>
84675                        <access>read-write</access>
84676                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84677                    </field>
84678                    <field>
84679                        <name>APB_RD_SEC_FAIL</name>
84680                        <bitRange>[3:3]</bitRange>
84681                        <access>read-write</access>
84682                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84683                    </field>
84684                    <field>
84685                        <name>APB_DCTRL_FAIL</name>
84686                        <bitRange>[2:2]</bitRange>
84687                        <access>read-write</access>
84688                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84689                    </field>
84690                    <field>
84691                        <name>SBPI_WR_FAIL</name>
84692                        <bitRange>[1:1]</bitRange>
84693                        <access>read-write</access>
84694                        <modifiedWriteValues>oneToClear</modifiedWriteValues>
84695                    </field>
84696                    <field>
84697                        <name>SBPI_FLAG_N</name>
84698                        <bitRange>[0:0]</bitRange>
84699                        <access>read-only</access>
84700                    </field>
84701                </fields>
84702            </register>
84703            <register>
84704                <name>INTE</name>
84705                <addressOffset>0x00000168</addressOffset>
84706                <description>Interrupt Enable</description>
84707                <resetValue>0x00000000</resetValue>
84708                <fields>
84709                    <field>
84710                        <name>APB_RD_NSEC_FAIL</name>
84711                        <bitRange>[4:4]</bitRange>
84712                        <access>read-write</access>
84713                    </field>
84714                    <field>
84715                        <name>APB_RD_SEC_FAIL</name>
84716                        <bitRange>[3:3]</bitRange>
84717                        <access>read-write</access>
84718                    </field>
84719                    <field>
84720                        <name>APB_DCTRL_FAIL</name>
84721                        <bitRange>[2:2]</bitRange>
84722                        <access>read-write</access>
84723                    </field>
84724                    <field>
84725                        <name>SBPI_WR_FAIL</name>
84726                        <bitRange>[1:1]</bitRange>
84727                        <access>read-write</access>
84728                    </field>
84729                    <field>
84730                        <name>SBPI_FLAG_N</name>
84731                        <bitRange>[0:0]</bitRange>
84732                        <access>read-write</access>
84733                    </field>
84734                </fields>
84735            </register>
84736            <register>
84737                <name>INTF</name>
84738                <addressOffset>0x0000016c</addressOffset>
84739                <description>Interrupt Force</description>
84740                <resetValue>0x00000000</resetValue>
84741                <fields>
84742                    <field>
84743                        <name>APB_RD_NSEC_FAIL</name>
84744                        <bitRange>[4:4]</bitRange>
84745                        <access>read-write</access>
84746                    </field>
84747                    <field>
84748                        <name>APB_RD_SEC_FAIL</name>
84749                        <bitRange>[3:3]</bitRange>
84750                        <access>read-write</access>
84751                    </field>
84752                    <field>
84753                        <name>APB_DCTRL_FAIL</name>
84754                        <bitRange>[2:2]</bitRange>
84755                        <access>read-write</access>
84756                    </field>
84757                    <field>
84758                        <name>SBPI_WR_FAIL</name>
84759                        <bitRange>[1:1]</bitRange>
84760                        <access>read-write</access>
84761                    </field>
84762                    <field>
84763                        <name>SBPI_FLAG_N</name>
84764                        <bitRange>[0:0]</bitRange>
84765                        <access>read-write</access>
84766                    </field>
84767                </fields>
84768            </register>
84769            <register>
84770                <name>INTS</name>
84771                <addressOffset>0x00000170</addressOffset>
84772                <description>Interrupt status after masking &amp; forcing</description>
84773                <resetValue>0x00000000</resetValue>
84774                <fields>
84775                    <field>
84776                        <name>APB_RD_NSEC_FAIL</name>
84777                        <bitRange>[4:4]</bitRange>
84778                        <access>read-only</access>
84779                    </field>
84780                    <field>
84781                        <name>APB_RD_SEC_FAIL</name>
84782                        <bitRange>[3:3]</bitRange>
84783                        <access>read-only</access>
84784                    </field>
84785                    <field>
84786                        <name>APB_DCTRL_FAIL</name>
84787                        <bitRange>[2:2]</bitRange>
84788                        <access>read-only</access>
84789                    </field>
84790                    <field>
84791                        <name>SBPI_WR_FAIL</name>
84792                        <bitRange>[1:1]</bitRange>
84793                        <access>read-only</access>
84794                    </field>
84795                    <field>
84796                        <name>SBPI_FLAG_N</name>
84797                        <bitRange>[0:0]</bitRange>
84798                        <access>read-only</access>
84799                    </field>
84800                </fields>
84801            </register>
84802        </registers>
84803    </peripheral>
84804    <peripheral>
84805        <name>OTP_DATA</name>
84806        <description>Predefined OTP data layout for RP2350</description>
84807        <baseAddress>0x40130000</baseAddress>
84808        <addressBlock>
84809            <offset>0</offset>
84810            <size>7920</size>
84811            <usage>registers</usage>
84812        </addressBlock>
84813        <registers>
84814            <register>
84815                <name>CHIPID0</name>
84816                <addressOffset>0x0000</addressOffset>
84817                <description>Bits 15:0 of public device ID. (ECC)
84818
84819                    The CHIPID0..3 rows contain a 64-bit random identifier for this chip, which can be read from the USB bootloader PICOBOOT interface or from the get_sys_info ROM API.
84820
84821                    The number of random bits makes the occurrence of twins exceedingly unlikely: for example, a fleet of a hundred million devices has a 99.97% probability of no twinned IDs. This is estimated to be lower than the occurrence of process errors in the assignment of sequential random IDs, and for practical purposes CHIPID may be treated as unique.</description>
84822                <size>16</size>
84823                <resetMask>0x0000</resetMask>
84824                <fields>
84825                    <field>
84826                        <name>CHIPID0</name>
84827                        <bitRange>[15:0]</bitRange>
84828                        <access>read-only</access>
84829                    </field>
84830                </fields>
84831            </register>
84832            <register>
84833                <name>CHIPID1</name>
84834                <addressOffset>0x0002</addressOffset>
84835                <description>Bits 31:16 of public device ID (ECC)</description>
84836                <size>16</size>
84837                <resetMask>0x0000</resetMask>
84838                <fields>
84839                    <field>
84840                        <name>CHIPID1</name>
84841                        <bitRange>[15:0]</bitRange>
84842                        <access>read-only</access>
84843                    </field>
84844                </fields>
84845            </register>
84846            <register>
84847                <name>CHIPID2</name>
84848                <addressOffset>0x0004</addressOffset>
84849                <description>Bits 47:32 of public device ID (ECC)</description>
84850                <size>16</size>
84851                <resetMask>0x0000</resetMask>
84852                <fields>
84853                    <field>
84854                        <name>CHIPID2</name>
84855                        <bitRange>[15:0]</bitRange>
84856                        <access>read-only</access>
84857                    </field>
84858                </fields>
84859            </register>
84860            <register>
84861                <name>CHIPID3</name>
84862                <addressOffset>0x0006</addressOffset>
84863                <description>Bits 63:48 of public device ID (ECC)</description>
84864                <size>16</size>
84865                <resetMask>0x0000</resetMask>
84866                <fields>
84867                    <field>
84868                        <name>CHIPID3</name>
84869                        <bitRange>[15:0]</bitRange>
84870                        <access>read-only</access>
84871                    </field>
84872                </fields>
84873            </register>
84874            <register>
84875                <name>RANDID0</name>
84876                <addressOffset>0x0008</addressOffset>
84877                <description>Bits 15:0 of private per-device random number (ECC)
84878
84879                    The RANDID0..7 rows form a 128-bit random number generated during device test.
84880
84881                    This ID is not exposed through the USB PICOBOOT GET_INFO command or the ROM `get_sys_info()` API. However note that the USB PICOBOOT OTP access point can read the entirety of page 0, so this value is not meaningfully private unless the USB PICOBOOT interface is disabled via the DISABLE_BOOTSEL_USB_PICOBOOT_IFC flag in BOOT_FLAGS0.</description>
84882                <size>16</size>
84883                <resetMask>0x0000</resetMask>
84884                <fields>
84885                    <field>
84886                        <name>RANDID0</name>
84887                        <bitRange>[15:0]</bitRange>
84888                        <access>read-only</access>
84889                    </field>
84890                </fields>
84891            </register>
84892            <register>
84893                <name>RANDID1</name>
84894                <addressOffset>0x000a</addressOffset>
84895                <description>Bits 31:16 of private per-device random number (ECC)</description>
84896                <size>16</size>
84897                <resetMask>0x0000</resetMask>
84898                <fields>
84899                    <field>
84900                        <name>RANDID1</name>
84901                        <bitRange>[15:0]</bitRange>
84902                        <access>read-only</access>
84903                    </field>
84904                </fields>
84905            </register>
84906            <register>
84907                <name>RANDID2</name>
84908                <addressOffset>0x000c</addressOffset>
84909                <description>Bits 47:32 of private per-device random number (ECC)</description>
84910                <size>16</size>
84911                <resetMask>0x0000</resetMask>
84912                <fields>
84913                    <field>
84914                        <name>RANDID2</name>
84915                        <bitRange>[15:0]</bitRange>
84916                        <access>read-only</access>
84917                    </field>
84918                </fields>
84919            </register>
84920            <register>
84921                <name>RANDID3</name>
84922                <addressOffset>0x000e</addressOffset>
84923                <description>Bits 63:48 of private per-device random number (ECC)</description>
84924                <size>16</size>
84925                <resetMask>0x0000</resetMask>
84926                <fields>
84927                    <field>
84928                        <name>RANDID3</name>
84929                        <bitRange>[15:0]</bitRange>
84930                        <access>read-only</access>
84931                    </field>
84932                </fields>
84933            </register>
84934            <register>
84935                <name>RANDID4</name>
84936                <addressOffset>0x0010</addressOffset>
84937                <description>Bits 79:64 of private per-device random number (ECC)</description>
84938                <size>16</size>
84939                <resetMask>0x0000</resetMask>
84940                <fields>
84941                    <field>
84942                        <name>RANDID4</name>
84943                        <bitRange>[15:0]</bitRange>
84944                        <access>read-only</access>
84945                    </field>
84946                </fields>
84947            </register>
84948            <register>
84949                <name>RANDID5</name>
84950                <addressOffset>0x0012</addressOffset>
84951                <description>Bits 95:80 of private per-device random number (ECC)</description>
84952                <size>16</size>
84953                <resetMask>0x0000</resetMask>
84954                <fields>
84955                    <field>
84956                        <name>RANDID5</name>
84957                        <bitRange>[15:0]</bitRange>
84958                        <access>read-only</access>
84959                    </field>
84960                </fields>
84961            </register>
84962            <register>
84963                <name>RANDID6</name>
84964                <addressOffset>0x0014</addressOffset>
84965                <description>Bits 111:96 of private per-device random number (ECC)</description>
84966                <size>16</size>
84967                <resetMask>0x0000</resetMask>
84968                <fields>
84969                    <field>
84970                        <name>RANDID6</name>
84971                        <bitRange>[15:0]</bitRange>
84972                        <access>read-only</access>
84973                    </field>
84974                </fields>
84975            </register>
84976            <register>
84977                <name>RANDID7</name>
84978                <addressOffset>0x0016</addressOffset>
84979                <description>Bits 127:112 of private per-device random number (ECC)</description>
84980                <size>16</size>
84981                <resetMask>0x0000</resetMask>
84982                <fields>
84983                    <field>
84984                        <name>RANDID7</name>
84985                        <bitRange>[15:0]</bitRange>
84986                        <access>read-only</access>
84987                    </field>
84988                </fields>
84989            </register>
84990            <register>
84991                <name>ROSC_CALIB</name>
84992                <addressOffset>0x0020</addressOffset>
84993                <description>Ring oscillator frequency in kHz, measured during manufacturing (ECC)
84994
84995                    This is measured at 1.1 V, at room temperature, with the ROSC configuration registers in their reset state.</description>
84996                <size>16</size>
84997                <resetMask>0x0000</resetMask>
84998                <fields>
84999                    <field>
85000                        <name>ROSC_CALIB</name>
85001                        <bitRange>[15:0]</bitRange>
85002                        <access>read-only</access>
85003                    </field>
85004                </fields>
85005            </register>
85006            <register>
85007                <name>LPOSC_CALIB</name>
85008                <addressOffset>0x0022</addressOffset>
85009                <description>Low-power oscillator frequency in Hz, measured during manufacturing (ECC)
85010
85011                    This is measured at 1.1V, at room temperature, with the LPOSC trim register in its reset state.</description>
85012                <size>16</size>
85013                <resetMask>0x0000</resetMask>
85014                <fields>
85015                    <field>
85016                        <name>LPOSC_CALIB</name>
85017                        <bitRange>[15:0]</bitRange>
85018                        <access>read-only</access>
85019                    </field>
85020                </fields>
85021            </register>
85022            <register>
85023                <name>NUM_GPIOS</name>
85024                <addressOffset>0x0030</addressOffset>
85025                <description>The number of main user GPIOs (bank 0). Should read 48 in the QFN80 package, and 30 in the QFN60 package. (ECC)</description>
85026                <size>16</size>
85027                <resetMask>0x0000</resetMask>
85028                <fields>
85029                    <field>
85030                        <name>NUM_GPIOS</name>
85031                        <bitRange>[7:0]</bitRange>
85032                        <access>read-only</access>
85033                    </field>
85034                </fields>
85035            </register>
85036            <register>
85037                <name>INFO_CRC0</name>
85038                <addressOffset>0x006c</addressOffset>
85039                <description>Lower 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (polynomial 0x4c11db7, input reflected, output reflected, seed all-ones, final XOR all-ones) (ECC)</description>
85040                <size>16</size>
85041                <resetMask>0x0000</resetMask>
85042                <fields>
85043                    <field>
85044                        <name>INFO_CRC0</name>
85045                        <bitRange>[15:0]</bitRange>
85046                        <access>read-only</access>
85047                    </field>
85048                </fields>
85049            </register>
85050            <register>
85051                <name>INFO_CRC1</name>
85052                <addressOffset>0x006e</addressOffset>
85053                <description>Upper 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (ECC)</description>
85054                <size>16</size>
85055                <resetMask>0x0000</resetMask>
85056                <fields>
85057                    <field>
85058                        <name>INFO_CRC1</name>
85059                        <bitRange>[15:0]</bitRange>
85060                        <access>read-only</access>
85061                    </field>
85062                </fields>
85063            </register>
85064            <register>
85065                <name>FLASH_DEVINFO</name>
85066                <addressOffset>0x00a8</addressOffset>
85067                <description>Stores information about external flash device(s). (ECC)
85068
85069                    Assumed to be valid if BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is set.</description>
85070                <size>16</size>
85071                <resetValue>0x0000</resetValue>
85072                <fields>
85073                    <field>
85074                        <name>CS1_SIZE</name>
85075                        <description>The size of the flash/PSRAM device on chip select 1 (addressable at 0x11000000 through 0x11ffffff).
85076
85077                            A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB &lt;&lt; CS1_SIZE. For example, four megabytes is encoded with a CS1_SIZE value of 10, and 16 megabytes is encoded with a CS1_SIZE value of 12.
85078
85079                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of zero is used.</description>
85080                        <bitRange>[15:12]</bitRange>
85081                        <access>read-only</access>
85082                        <enumeratedValues>
85083                            <enumeratedValue>
85084                                <name>NONE</name>
85085                                <value>0</value>
85086                            </enumeratedValue>
85087                            <enumeratedValue>
85088                                <name>8K</name>
85089                                <value>1</value>
85090                            </enumeratedValue>
85091                            <enumeratedValue>
85092                                <name>16K</name>
85093                                <value>2</value>
85094                            </enumeratedValue>
85095                            <enumeratedValue>
85096                                <name>32K</name>
85097                                <value>3</value>
85098                            </enumeratedValue>
85099                            <enumeratedValue>
85100                                <name>64k</name>
85101                                <value>4</value>
85102                            </enumeratedValue>
85103                            <enumeratedValue>
85104                                <name>128K</name>
85105                                <value>5</value>
85106                            </enumeratedValue>
85107                            <enumeratedValue>
85108                                <name>256K</name>
85109                                <value>6</value>
85110                            </enumeratedValue>
85111                            <enumeratedValue>
85112                                <name>512K</name>
85113                                <value>7</value>
85114                            </enumeratedValue>
85115                            <enumeratedValue>
85116                                <name>1M</name>
85117                                <value>8</value>
85118                            </enumeratedValue>
85119                            <enumeratedValue>
85120                                <name>2M</name>
85121                                <value>9</value>
85122                            </enumeratedValue>
85123                            <enumeratedValue>
85124                                <name>4M</name>
85125                                <value>10</value>
85126                            </enumeratedValue>
85127                            <enumeratedValue>
85128                                <name>8M</name>
85129                                <value>11</value>
85130                            </enumeratedValue>
85131                            <enumeratedValue>
85132                                <name>16M</name>
85133                                <value>12</value>
85134                            </enumeratedValue>
85135                        </enumeratedValues>
85136                    </field>
85137                    <field>
85138                        <name>CS0_SIZE</name>
85139                        <description>The size of the flash/PSRAM device on chip select 0 (addressable at 0x10000000 through 0x10ffffff).
85140
85141                            A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB &lt;&lt; CS0_SIZE. For example, four megabytes is encoded with a CS0_SIZE value of 10, and 16 megabytes is encoded with a CS0_SIZE value of 12.
85142
85143                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of 12 (16 MiB) is used.</description>
85144                        <bitRange>[11:8]</bitRange>
85145                        <access>read-only</access>
85146                        <enumeratedValues>
85147                            <enumeratedValue>
85148                                <name>NONE</name>
85149                                <value>0</value>
85150                            </enumeratedValue>
85151                            <enumeratedValue>
85152                                <name>8K</name>
85153                                <value>1</value>
85154                            </enumeratedValue>
85155                            <enumeratedValue>
85156                                <name>16K</name>
85157                                <value>2</value>
85158                            </enumeratedValue>
85159                            <enumeratedValue>
85160                                <name>32K</name>
85161                                <value>3</value>
85162                            </enumeratedValue>
85163                            <enumeratedValue>
85164                                <name>64k</name>
85165                                <value>4</value>
85166                            </enumeratedValue>
85167                            <enumeratedValue>
85168                                <name>128K</name>
85169                                <value>5</value>
85170                            </enumeratedValue>
85171                            <enumeratedValue>
85172                                <name>256K</name>
85173                                <value>6</value>
85174                            </enumeratedValue>
85175                            <enumeratedValue>
85176                                <name>512K</name>
85177                                <value>7</value>
85178                            </enumeratedValue>
85179                            <enumeratedValue>
85180                                <name>1M</name>
85181                                <value>8</value>
85182                            </enumeratedValue>
85183                            <enumeratedValue>
85184                                <name>2M</name>
85185                                <value>9</value>
85186                            </enumeratedValue>
85187                            <enumeratedValue>
85188                                <name>4M</name>
85189                                <value>10</value>
85190                            </enumeratedValue>
85191                            <enumeratedValue>
85192                                <name>8M</name>
85193                                <value>11</value>
85194                            </enumeratedValue>
85195                            <enumeratedValue>
85196                                <name>16M</name>
85197                                <value>12</value>
85198                            </enumeratedValue>
85199                        </enumeratedValues>
85200                    </field>
85201                    <field>
85202                        <name>D8H_ERASE_SUPPORTED</name>
85203                        <description>If true, all attached devices are assumed to support (or ignore, in the case of PSRAM) a block erase command with a command prefix of D8h, an erase size of 64 kiB, and a 24-bit address. Almost all 25-series flash devices support this command.
85204
85205                            If set, the bootrom will use the D8h erase command where it is able, to accelerate bulk erase operations. This makes flash programming faster.
85206
85207                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, this field defaults to false.</description>
85208                        <bitRange>[7:7]</bitRange>
85209                        <access>read-only</access>
85210                    </field>
85211                    <field>
85212                        <name>CS1_GPIO</name>
85213                        <description>Indicate a GPIO number to be used for the secondary flash chip select (CS1), which selects the external QSPI device mapped at system addresses 0x11000000 through 0x11ffffff. There is no such configuration for CS0, as the primary chip select has a dedicated pin.
85214
85215                            On RP2350 the permissible GPIO numbers are 0, 8, 19 and 47.
85216
85217                            Ignored if CS1_size is zero. If CS1_SIZE is nonzero, the bootrom will automatically configure this GPIO as a second chip select upon entering the flash boot path, or entering any other path that may use the QSPI flash interface, such as BOOTSEL mode (nsboot).</description>
85218                        <bitRange>[5:0]</bitRange>
85219                        <access>read-only</access>
85220                    </field>
85221                </fields>
85222            </register>
85223            <register>
85224                <name>FLASH_PARTITION_SLOT_SIZE</name>
85225                <addressOffset>0x00aa</addressOffset>
85226                <description>Gap between partition table slot 0 and slot 1 at the start of flash (the default size is 4096 bytes) (ECC) Enabled by the OVERRIDE_FLASH_PARTITION_SLOT_SIZE bit in BOOT_FLAGS, the size is 4096 * (value + 1)</description>
85227                <size>16</size>
85228                <resetMask>0x0000</resetMask>
85229                <fields>
85230                    <field>
85231                        <name>FLASH_PARTITION_SLOT_SIZE</name>
85232                        <bitRange>[15:0]</bitRange>
85233                        <access>read-only</access>
85234                    </field>
85235                </fields>
85236            </register>
85237            <register>
85238                <name>BOOTSEL_LED_CFG</name>
85239                <addressOffset>0x00ac</addressOffset>
85240                <description>Pin configuration for LED status, used by USB bootloader. (ECC)
85241                    Must be valid if BOOT_FLAGS0_ENABLE_BOOTSEL_LED is set.</description>
85242                <size>16</size>
85243                <resetValue>0x0000</resetValue>
85244                <fields>
85245                    <field>
85246                        <name>ACTIVELOW</name>
85247                        <description>LED is active-low. (Default: active-high.)</description>
85248                        <bitRange>[8:8]</bitRange>
85249                        <access>read-only</access>
85250                    </field>
85251                    <field>
85252                        <name>PIN</name>
85253                        <description>GPIO index to use for bootloader activity LED.</description>
85254                        <bitRange>[5:0]</bitRange>
85255                        <access>read-only</access>
85256                    </field>
85257                </fields>
85258            </register>
85259            <register>
85260                <name>BOOTSEL_PLL_CFG</name>
85261                <addressOffset>0x00ae</addressOffset>
85262                <description>Optional PLL configuration for BOOTSEL mode. (ECC)
85263
85264                    This should be configured to produce an exact 48 MHz based on the crystal oscillator frequency. User mode software may also use this value to calculate the expected crystal frequency based on an assumed 48 MHz PLL output.
85265
85266                    If no configuration is given, the crystal is assumed to be 12 MHz.
85267
85268                    The PLL frequency can be calculated as:
85269
85270                    PLL out = (XOSC frequency / (REFDIV+1)) x FBDIV / (POSTDIV1 x POSTDIV2)
85271
85272                    Conversely the crystal frequency can be calculated as:
85273
85274                    XOSC frequency = 48 MHz x (REFDIV+1) x (POSTDIV1 x POSTDIV2) / FBDIV
85275
85276                    (Note the  +1 on REFDIV is because the value stored in this OTP location is the actual divisor value minus one.)
85277
85278                    Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_XOSC_CFG are both correctly programmed.</description>
85279                <size>16</size>
85280                <resetValue>0x0000</resetValue>
85281                <fields>
85282                    <field>
85283                        <name>REFDIV</name>
85284                        <description>PLL reference divisor, minus one.
85285
85286                            Programming a value of 0 means a reference divisor of 1. Programming a value of 1 means a reference divisor of 2 (for exceptionally fast XIN inputs)</description>
85287                        <bitRange>[15:15]</bitRange>
85288                        <access>read-only</access>
85289                    </field>
85290                    <field>
85291                        <name>POSTDIV2</name>
85292                        <description>PLL post-divide 2 divisor, in the range 1..7 inclusive.</description>
85293                        <bitRange>[14:12]</bitRange>
85294                        <access>read-only</access>
85295                    </field>
85296                    <field>
85297                        <name>POSTDIV1</name>
85298                        <description>PLL post-divide 1 divisor, in the range 1..7 inclusive.</description>
85299                        <bitRange>[11:9]</bitRange>
85300                        <access>read-only</access>
85301                    </field>
85302                    <field>
85303                        <name>FBDIV</name>
85304                        <description>PLL feedback divisor, in the range 16..320 inclusive.</description>
85305                        <bitRange>[8:0]</bitRange>
85306                        <access>read-only</access>
85307                    </field>
85308                </fields>
85309            </register>
85310            <register>
85311                <name>BOOTSEL_XOSC_CFG</name>
85312                <addressOffset>0x00b0</addressOffset>
85313                <description>Non-default crystal oscillator configuration for the USB bootloader. (ECC)
85314
85315                    These values may also be used by user code configuring the crystal oscillator.
85316
85317                    Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_PLL_CFG are both correctly programmed.</description>
85318                <size>16</size>
85319                <resetValue>0x0000</resetValue>
85320                <fields>
85321                    <field>
85322                        <name>RANGE</name>
85323                        <description>Value of the XOSC_CTRL_FREQ_RANGE register.</description>
85324                        <bitRange>[15:14]</bitRange>
85325                        <access>read-only</access>
85326                        <enumeratedValues>
85327                            <enumeratedValue>
85328                                <name>1_15MHZ</name>
85329                                <value>0</value>
85330                            </enumeratedValue>
85331                            <enumeratedValue>
85332                                <name>10_30MHZ</name>
85333                                <value>1</value>
85334                            </enumeratedValue>
85335                            <enumeratedValue>
85336                                <name>25_60MHZ</name>
85337                                <value>2</value>
85338                            </enumeratedValue>
85339                            <enumeratedValue>
85340                                <name>40_100MHZ</name>
85341                                <value>3</value>
85342                            </enumeratedValue>
85343                        </enumeratedValues>
85344                    </field>
85345                    <field>
85346                        <name>STARTUP</name>
85347                        <description>Value of the XOSC_STARTUP register</description>
85348                        <bitRange>[13:0]</bitRange>
85349                        <access>read-only</access>
85350                    </field>
85351                </fields>
85352            </register>
85353            <register>
85354                <name>USB_WHITE_LABEL_ADDR</name>
85355                <addressOffset>0x00b8</addressOffset>
85356                <description>Row index of the USB_WHITE_LABEL structure within OTP (ECC)
85357
85358                    The table has 16 rows, each of which are also ECC and marked valid by the corresponding valid bit in USB_BOOT_FLAGS (ECC).
85359
85360                    The entries are either _VALUEs where the 16 bit value is used as is, or _STRDEFs which acts as a pointers to a string value.
85361
85362                    The value stored in a _STRDEF is two separate bytes: The low seven bits of the first (LSB) byte indicates the number of characters in the string, and the top bit of the first (LSB) byte if set to indicate that each character in the string is two bytes (Unicode) versus one byte if unset. The second (MSB) byte represents the location of the string data, and is encoded as the number of rows from this USB_WHITE_LABEL_ADDR; i.e. the row of the start of the string is USB_WHITE_LABEL_ADDR value + msb_byte.
85363
85364                    In each case, the corresponding valid bit enables replacing the default value for the corresponding item provided by the boot rom.
85365
85366                    Note that Unicode _STRDEFs are only supported for USB_DEVICE_PRODUCT_STRDEF, USB_DEVICE_SERIAL_NUMBER_STRDEF and USB_DEVICE_MANUFACTURER_STRDEF. Unicode values will be ignored if specified for other fields, and non-unicode values for these three items will be converted to Unicode characters by setting the upper 8 bits to zero.
85367
85368                    Note that if the USB_WHITE_LABEL structure or the corresponding strings are not readable by BOOTSEL mode based on OTP permissions, or if alignment requirements are not met, then the corresponding default values are used.
85369
85370                    The index values indicate where each field is located (row USB_WHITE_LABEL_ADDR value + index):</description>
85371                <size>16</size>
85372                <resetMask>0x0000</resetMask>
85373                <fields>
85374                    <field>
85375                        <name>USB_WHITE_LABEL_ADDR</name>
85376                        <bitRange>[15:0]</bitRange>
85377                        <access>read-only</access>
85378                        <enumeratedValues>
85379                            <enumeratedValue>
85380                                <name>INDEX_USB_DEVICE_VID_VALUE</name>
85381                                <value>0</value>
85382                            </enumeratedValue>
85383                            <enumeratedValue>
85384                                <name>INDEX_USB_DEVICE_PID_VALUE</name>
85385                                <value>1</value>
85386                            </enumeratedValue>
85387                            <enumeratedValue>
85388                                <name>INDEX_USB_DEVICE_BCD_DEVICE_VALUE</name>
85389                                <value>2</value>
85390                            </enumeratedValue>
85391                            <enumeratedValue>
85392                                <name>INDEX_USB_DEVICE_LANG_ID_VALUE</name>
85393                                <value>3</value>
85394                            </enumeratedValue>
85395                            <enumeratedValue>
85396                                <name>INDEX_USB_DEVICE_MANUFACTURER_STRDEF</name>
85397                                <value>4</value>
85398                            </enumeratedValue>
85399                            <enumeratedValue>
85400                                <name>INDEX_USB_DEVICE_PRODUCT_STRDEF</name>
85401                                <value>5</value>
85402                            </enumeratedValue>
85403                            <enumeratedValue>
85404                                <name>INDEX_USB_DEVICE_SERIAL_NUMBER_STRDEF</name>
85405                                <value>6</value>
85406                            </enumeratedValue>
85407                            <enumeratedValue>
85408                                <name>INDEX_USB_CONFIG_ATTRIBUTES_MAX_POWER_VALUES</name>
85409                                <value>7</value>
85410                            </enumeratedValue>
85411                            <enumeratedValue>
85412                                <name>INDEX_VOLUME_LABEL_STRDEF</name>
85413                                <value>8</value>
85414                            </enumeratedValue>
85415                            <enumeratedValue>
85416                                <name>INDEX_SCSI_INQUIRY_VENDOR_STRDEF</name>
85417                                <value>9</value>
85418                            </enumeratedValue>
85419                            <enumeratedValue>
85420                                <name>INDEX_SCSI_INQUIRY_PRODUCT_STRDEF</name>
85421                                <value>10</value>
85422                            </enumeratedValue>
85423                            <enumeratedValue>
85424                                <name>INDEX_SCSI_INQUIRY_VERSION_STRDEF</name>
85425                                <value>11</value>
85426                            </enumeratedValue>
85427                            <enumeratedValue>
85428                                <name>INDEX_INDEX_HTM_REDIRECT_URL_STRDEF</name>
85429                                <value>12</value>
85430                            </enumeratedValue>
85431                            <enumeratedValue>
85432                                <name>INDEX_INDEX_HTM_REDIRECT_NAME_STRDEF</name>
85433                                <value>13</value>
85434                            </enumeratedValue>
85435                            <enumeratedValue>
85436                                <name>INDEX_INFO_UF2_TXT_MODEL_STRDEF</name>
85437                                <value>14</value>
85438                            </enumeratedValue>
85439                            <enumeratedValue>
85440                                <name>INDEX_INFO_UF2_TXT_BOARD_ID_STRDEF</name>
85441                                <value>15</value>
85442                            </enumeratedValue>
85443                        </enumeratedValues>
85444                    </field>
85445                </fields>
85446            </register>
85447            <register>
85448                <name>OTPBOOT_SRC</name>
85449                <addressOffset>0x00bc</addressOffset>
85450                <description>OTP start row for the OTP boot image. (ECC)
85451
85452                    If OTP boot is enabled, the bootrom will load from this location into SRAM and then directly enter the loaded image. Note that the image must be signed if SECURE_BOOT_ENABLE is set. The image itself is assumed to be ECC-protected.
85453
85454                    This must be an even number. Equivalently, the OTP boot image must start at a word-aligned location in the ECC read data address window.</description>
85455                <size>16</size>
85456                <resetMask>0x0000</resetMask>
85457                <fields>
85458                    <field>
85459                        <name>OTPBOOT_SRC</name>
85460                        <bitRange>[15:0]</bitRange>
85461                        <access>read-only</access>
85462                    </field>
85463                </fields>
85464            </register>
85465            <register>
85466                <name>OTPBOOT_LEN</name>
85467                <addressOffset>0x00be</addressOffset>
85468                <description>Length in rows of the OTP boot image. (ECC)
85469
85470                    OTPBOOT_LEN must be even. The total image size must be a multiple of 4 bytes (32 bits).</description>
85471                <size>16</size>
85472                <resetMask>0x0000</resetMask>
85473                <fields>
85474                    <field>
85475                        <name>OTPBOOT_LEN</name>
85476                        <bitRange>[15:0]</bitRange>
85477                        <access>read-only</access>
85478                    </field>
85479                </fields>
85480            </register>
85481            <register>
85482                <name>OTPBOOT_DST0</name>
85483                <addressOffset>0x00c0</addressOffset>
85484                <description>Bits 15:0 of the OTP boot image load destination (and entry point). (ECC)
85485
85486                    This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.</description>
85487                <size>16</size>
85488                <resetMask>0x0000</resetMask>
85489                <fields>
85490                    <field>
85491                        <name>OTPBOOT_DST0</name>
85492                        <bitRange>[15:0]</bitRange>
85493                        <access>read-only</access>
85494                    </field>
85495                </fields>
85496            </register>
85497            <register>
85498                <name>OTPBOOT_DST1</name>
85499                <addressOffset>0x00c2</addressOffset>
85500                <description>Bits 31:16 of the OTP boot image load destination (and entry point). (ECC)
85501
85502                    This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.</description>
85503                <size>16</size>
85504                <resetMask>0x0000</resetMask>
85505                <fields>
85506                    <field>
85507                        <name>OTPBOOT_DST1</name>
85508                        <bitRange>[15:0]</bitRange>
85509                        <access>read-only</access>
85510                    </field>
85511                </fields>
85512            </register>
85513            <register>
85514                <name>BOOTKEY0_0</name>
85515                <addressOffset>0x0100</addressOffset>
85516                <description>Bits 15:0 of SHA-256 hash of boot key 0 (ECC)</description>
85517                <size>16</size>
85518                <resetMask>0x0000</resetMask>
85519                <fields>
85520                    <field>
85521                        <name>BOOTKEY0_0</name>
85522                        <bitRange>[15:0]</bitRange>
85523                        <access>read-only</access>
85524                    </field>
85525                </fields>
85526            </register>
85527            <register>
85528                <name>BOOTKEY0_1</name>
85529                <addressOffset>0x0102</addressOffset>
85530                <description>Bits 31:16 of SHA-256 hash of boot key 0 (ECC)</description>
85531                <size>16</size>
85532                <resetMask>0x0000</resetMask>
85533                <fields>
85534                    <field>
85535                        <name>BOOTKEY0_1</name>
85536                        <bitRange>[15:0]</bitRange>
85537                        <access>read-only</access>
85538                    </field>
85539                </fields>
85540            </register>
85541            <register>
85542                <name>BOOTKEY0_2</name>
85543                <addressOffset>0x0104</addressOffset>
85544                <description>Bits 47:32 of SHA-256 hash of boot key 0 (ECC)</description>
85545                <size>16</size>
85546                <resetMask>0x0000</resetMask>
85547                <fields>
85548                    <field>
85549                        <name>BOOTKEY0_2</name>
85550                        <bitRange>[15:0]</bitRange>
85551                        <access>read-only</access>
85552                    </field>
85553                </fields>
85554            </register>
85555            <register>
85556                <name>BOOTKEY0_3</name>
85557                <addressOffset>0x0106</addressOffset>
85558                <description>Bits 63:48 of SHA-256 hash of boot key 0 (ECC)</description>
85559                <size>16</size>
85560                <resetMask>0x0000</resetMask>
85561                <fields>
85562                    <field>
85563                        <name>BOOTKEY0_3</name>
85564                        <bitRange>[15:0]</bitRange>
85565                        <access>read-only</access>
85566                    </field>
85567                </fields>
85568            </register>
85569            <register>
85570                <name>BOOTKEY0_4</name>
85571                <addressOffset>0x0108</addressOffset>
85572                <description>Bits 79:64 of SHA-256 hash of boot key 0 (ECC)</description>
85573                <size>16</size>
85574                <resetMask>0x0000</resetMask>
85575                <fields>
85576                    <field>
85577                        <name>BOOTKEY0_4</name>
85578                        <bitRange>[15:0]</bitRange>
85579                        <access>read-only</access>
85580                    </field>
85581                </fields>
85582            </register>
85583            <register>
85584                <name>BOOTKEY0_5</name>
85585                <addressOffset>0x010a</addressOffset>
85586                <description>Bits 95:80 of SHA-256 hash of boot key 0 (ECC)</description>
85587                <size>16</size>
85588                <resetMask>0x0000</resetMask>
85589                <fields>
85590                    <field>
85591                        <name>BOOTKEY0_5</name>
85592                        <bitRange>[15:0]</bitRange>
85593                        <access>read-only</access>
85594                    </field>
85595                </fields>
85596            </register>
85597            <register>
85598                <name>BOOTKEY0_6</name>
85599                <addressOffset>0x010c</addressOffset>
85600                <description>Bits 111:96 of SHA-256 hash of boot key 0 (ECC)</description>
85601                <size>16</size>
85602                <resetMask>0x0000</resetMask>
85603                <fields>
85604                    <field>
85605                        <name>BOOTKEY0_6</name>
85606                        <bitRange>[15:0]</bitRange>
85607                        <access>read-only</access>
85608                    </field>
85609                </fields>
85610            </register>
85611            <register>
85612                <name>BOOTKEY0_7</name>
85613                <addressOffset>0x010e</addressOffset>
85614                <description>Bits 127:112 of SHA-256 hash of boot key 0 (ECC)</description>
85615                <size>16</size>
85616                <resetMask>0x0000</resetMask>
85617                <fields>
85618                    <field>
85619                        <name>BOOTKEY0_7</name>
85620                        <bitRange>[15:0]</bitRange>
85621                        <access>read-only</access>
85622                    </field>
85623                </fields>
85624            </register>
85625            <register>
85626                <name>BOOTKEY0_8</name>
85627                <addressOffset>0x0110</addressOffset>
85628                <description>Bits 143:128 of SHA-256 hash of boot key 0 (ECC)</description>
85629                <size>16</size>
85630                <resetMask>0x0000</resetMask>
85631                <fields>
85632                    <field>
85633                        <name>BOOTKEY0_8</name>
85634                        <bitRange>[15:0]</bitRange>
85635                        <access>read-only</access>
85636                    </field>
85637                </fields>
85638            </register>
85639            <register>
85640                <name>BOOTKEY0_9</name>
85641                <addressOffset>0x0112</addressOffset>
85642                <description>Bits 159:144 of SHA-256 hash of boot key 0 (ECC)</description>
85643                <size>16</size>
85644                <resetMask>0x0000</resetMask>
85645                <fields>
85646                    <field>
85647                        <name>BOOTKEY0_9</name>
85648                        <bitRange>[15:0]</bitRange>
85649                        <access>read-only</access>
85650                    </field>
85651                </fields>
85652            </register>
85653            <register>
85654                <name>BOOTKEY0_10</name>
85655                <addressOffset>0x0114</addressOffset>
85656                <description>Bits 175:160 of SHA-256 hash of boot key 0 (ECC)</description>
85657                <size>16</size>
85658                <resetMask>0x0000</resetMask>
85659                <fields>
85660                    <field>
85661                        <name>BOOTKEY0_10</name>
85662                        <bitRange>[15:0]</bitRange>
85663                        <access>read-only</access>
85664                    </field>
85665                </fields>
85666            </register>
85667            <register>
85668                <name>BOOTKEY0_11</name>
85669                <addressOffset>0x0116</addressOffset>
85670                <description>Bits 191:176 of SHA-256 hash of boot key 0 (ECC)</description>
85671                <size>16</size>
85672                <resetMask>0x0000</resetMask>
85673                <fields>
85674                    <field>
85675                        <name>BOOTKEY0_11</name>
85676                        <bitRange>[15:0]</bitRange>
85677                        <access>read-only</access>
85678                    </field>
85679                </fields>
85680            </register>
85681            <register>
85682                <name>BOOTKEY0_12</name>
85683                <addressOffset>0x0118</addressOffset>
85684                <description>Bits 207:192 of SHA-256 hash of boot key 0 (ECC)</description>
85685                <size>16</size>
85686                <resetMask>0x0000</resetMask>
85687                <fields>
85688                    <field>
85689                        <name>BOOTKEY0_12</name>
85690                        <bitRange>[15:0]</bitRange>
85691                        <access>read-only</access>
85692                    </field>
85693                </fields>
85694            </register>
85695            <register>
85696                <name>BOOTKEY0_13</name>
85697                <addressOffset>0x011a</addressOffset>
85698                <description>Bits 223:208 of SHA-256 hash of boot key 0 (ECC)</description>
85699                <size>16</size>
85700                <resetMask>0x0000</resetMask>
85701                <fields>
85702                    <field>
85703                        <name>BOOTKEY0_13</name>
85704                        <bitRange>[15:0]</bitRange>
85705                        <access>read-only</access>
85706                    </field>
85707                </fields>
85708            </register>
85709            <register>
85710                <name>BOOTKEY0_14</name>
85711                <addressOffset>0x011c</addressOffset>
85712                <description>Bits 239:224 of SHA-256 hash of boot key 0 (ECC)</description>
85713                <size>16</size>
85714                <resetMask>0x0000</resetMask>
85715                <fields>
85716                    <field>
85717                        <name>BOOTKEY0_14</name>
85718                        <bitRange>[15:0]</bitRange>
85719                        <access>read-only</access>
85720                    </field>
85721                </fields>
85722            </register>
85723            <register>
85724                <name>BOOTKEY0_15</name>
85725                <addressOffset>0x011e</addressOffset>
85726                <description>Bits 255:240 of SHA-256 hash of boot key 0 (ECC)</description>
85727                <size>16</size>
85728                <resetMask>0x0000</resetMask>
85729                <fields>
85730                    <field>
85731                        <name>BOOTKEY0_15</name>
85732                        <bitRange>[15:0]</bitRange>
85733                        <access>read-only</access>
85734                    </field>
85735                </fields>
85736            </register>
85737            <register>
85738                <name>BOOTKEY1_0</name>
85739                <addressOffset>0x0120</addressOffset>
85740                <description>Bits 15:0 of SHA-256 hash of boot key 1 (ECC)</description>
85741                <size>16</size>
85742                <resetMask>0x0000</resetMask>
85743                <fields>
85744                    <field>
85745                        <name>BOOTKEY1_0</name>
85746                        <bitRange>[15:0]</bitRange>
85747                        <access>read-only</access>
85748                    </field>
85749                </fields>
85750            </register>
85751            <register>
85752                <name>BOOTKEY1_1</name>
85753                <addressOffset>0x0122</addressOffset>
85754                <description>Bits 31:16 of SHA-256 hash of boot key 1 (ECC)</description>
85755                <size>16</size>
85756                <resetMask>0x0000</resetMask>
85757                <fields>
85758                    <field>
85759                        <name>BOOTKEY1_1</name>
85760                        <bitRange>[15:0]</bitRange>
85761                        <access>read-only</access>
85762                    </field>
85763                </fields>
85764            </register>
85765            <register>
85766                <name>BOOTKEY1_2</name>
85767                <addressOffset>0x0124</addressOffset>
85768                <description>Bits 47:32 of SHA-256 hash of boot key 1 (ECC)</description>
85769                <size>16</size>
85770                <resetMask>0x0000</resetMask>
85771                <fields>
85772                    <field>
85773                        <name>BOOTKEY1_2</name>
85774                        <bitRange>[15:0]</bitRange>
85775                        <access>read-only</access>
85776                    </field>
85777                </fields>
85778            </register>
85779            <register>
85780                <name>BOOTKEY1_3</name>
85781                <addressOffset>0x0126</addressOffset>
85782                <description>Bits 63:48 of SHA-256 hash of boot key 1 (ECC)</description>
85783                <size>16</size>
85784                <resetMask>0x0000</resetMask>
85785                <fields>
85786                    <field>
85787                        <name>BOOTKEY1_3</name>
85788                        <bitRange>[15:0]</bitRange>
85789                        <access>read-only</access>
85790                    </field>
85791                </fields>
85792            </register>
85793            <register>
85794                <name>BOOTKEY1_4</name>
85795                <addressOffset>0x0128</addressOffset>
85796                <description>Bits 79:64 of SHA-256 hash of boot key 1 (ECC)</description>
85797                <size>16</size>
85798                <resetMask>0x0000</resetMask>
85799                <fields>
85800                    <field>
85801                        <name>BOOTKEY1_4</name>
85802                        <bitRange>[15:0]</bitRange>
85803                        <access>read-only</access>
85804                    </field>
85805                </fields>
85806            </register>
85807            <register>
85808                <name>BOOTKEY1_5</name>
85809                <addressOffset>0x012a</addressOffset>
85810                <description>Bits 95:80 of SHA-256 hash of boot key 1 (ECC)</description>
85811                <size>16</size>
85812                <resetMask>0x0000</resetMask>
85813                <fields>
85814                    <field>
85815                        <name>BOOTKEY1_5</name>
85816                        <bitRange>[15:0]</bitRange>
85817                        <access>read-only</access>
85818                    </field>
85819                </fields>
85820            </register>
85821            <register>
85822                <name>BOOTKEY1_6</name>
85823                <addressOffset>0x012c</addressOffset>
85824                <description>Bits 111:96 of SHA-256 hash of boot key 1 (ECC)</description>
85825                <size>16</size>
85826                <resetMask>0x0000</resetMask>
85827                <fields>
85828                    <field>
85829                        <name>BOOTKEY1_6</name>
85830                        <bitRange>[15:0]</bitRange>
85831                        <access>read-only</access>
85832                    </field>
85833                </fields>
85834            </register>
85835            <register>
85836                <name>BOOTKEY1_7</name>
85837                <addressOffset>0x012e</addressOffset>
85838                <description>Bits 127:112 of SHA-256 hash of boot key 1 (ECC)</description>
85839                <size>16</size>
85840                <resetMask>0x0000</resetMask>
85841                <fields>
85842                    <field>
85843                        <name>BOOTKEY1_7</name>
85844                        <bitRange>[15:0]</bitRange>
85845                        <access>read-only</access>
85846                    </field>
85847                </fields>
85848            </register>
85849            <register>
85850                <name>BOOTKEY1_8</name>
85851                <addressOffset>0x0130</addressOffset>
85852                <description>Bits 143:128 of SHA-256 hash of boot key 1 (ECC)</description>
85853                <size>16</size>
85854                <resetMask>0x0000</resetMask>
85855                <fields>
85856                    <field>
85857                        <name>BOOTKEY1_8</name>
85858                        <bitRange>[15:0]</bitRange>
85859                        <access>read-only</access>
85860                    </field>
85861                </fields>
85862            </register>
85863            <register>
85864                <name>BOOTKEY1_9</name>
85865                <addressOffset>0x0132</addressOffset>
85866                <description>Bits 159:144 of SHA-256 hash of boot key 1 (ECC)</description>
85867                <size>16</size>
85868                <resetMask>0x0000</resetMask>
85869                <fields>
85870                    <field>
85871                        <name>BOOTKEY1_9</name>
85872                        <bitRange>[15:0]</bitRange>
85873                        <access>read-only</access>
85874                    </field>
85875                </fields>
85876            </register>
85877            <register>
85878                <name>BOOTKEY1_10</name>
85879                <addressOffset>0x0134</addressOffset>
85880                <description>Bits 175:160 of SHA-256 hash of boot key 1 (ECC)</description>
85881                <size>16</size>
85882                <resetMask>0x0000</resetMask>
85883                <fields>
85884                    <field>
85885                        <name>BOOTKEY1_10</name>
85886                        <bitRange>[15:0]</bitRange>
85887                        <access>read-only</access>
85888                    </field>
85889                </fields>
85890            </register>
85891            <register>
85892                <name>BOOTKEY1_11</name>
85893                <addressOffset>0x0136</addressOffset>
85894                <description>Bits 191:176 of SHA-256 hash of boot key 1 (ECC)</description>
85895                <size>16</size>
85896                <resetMask>0x0000</resetMask>
85897                <fields>
85898                    <field>
85899                        <name>BOOTKEY1_11</name>
85900                        <bitRange>[15:0]</bitRange>
85901                        <access>read-only</access>
85902                    </field>
85903                </fields>
85904            </register>
85905            <register>
85906                <name>BOOTKEY1_12</name>
85907                <addressOffset>0x0138</addressOffset>
85908                <description>Bits 207:192 of SHA-256 hash of boot key 1 (ECC)</description>
85909                <size>16</size>
85910                <resetMask>0x0000</resetMask>
85911                <fields>
85912                    <field>
85913                        <name>BOOTKEY1_12</name>
85914                        <bitRange>[15:0]</bitRange>
85915                        <access>read-only</access>
85916                    </field>
85917                </fields>
85918            </register>
85919            <register>
85920                <name>BOOTKEY1_13</name>
85921                <addressOffset>0x013a</addressOffset>
85922                <description>Bits 223:208 of SHA-256 hash of boot key 1 (ECC)</description>
85923                <size>16</size>
85924                <resetMask>0x0000</resetMask>
85925                <fields>
85926                    <field>
85927                        <name>BOOTKEY1_13</name>
85928                        <bitRange>[15:0]</bitRange>
85929                        <access>read-only</access>
85930                    </field>
85931                </fields>
85932            </register>
85933            <register>
85934                <name>BOOTKEY1_14</name>
85935                <addressOffset>0x013c</addressOffset>
85936                <description>Bits 239:224 of SHA-256 hash of boot key 1 (ECC)</description>
85937                <size>16</size>
85938                <resetMask>0x0000</resetMask>
85939                <fields>
85940                    <field>
85941                        <name>BOOTKEY1_14</name>
85942                        <bitRange>[15:0]</bitRange>
85943                        <access>read-only</access>
85944                    </field>
85945                </fields>
85946            </register>
85947            <register>
85948                <name>BOOTKEY1_15</name>
85949                <addressOffset>0x013e</addressOffset>
85950                <description>Bits 255:240 of SHA-256 hash of boot key 1 (ECC)</description>
85951                <size>16</size>
85952                <resetMask>0x0000</resetMask>
85953                <fields>
85954                    <field>
85955                        <name>BOOTKEY1_15</name>
85956                        <bitRange>[15:0]</bitRange>
85957                        <access>read-only</access>
85958                    </field>
85959                </fields>
85960            </register>
85961            <register>
85962                <name>BOOTKEY2_0</name>
85963                <addressOffset>0x0140</addressOffset>
85964                <description>Bits 15:0 of SHA-256 hash of boot key 2 (ECC)</description>
85965                <size>16</size>
85966                <resetMask>0x0000</resetMask>
85967                <fields>
85968                    <field>
85969                        <name>BOOTKEY2_0</name>
85970                        <bitRange>[15:0]</bitRange>
85971                        <access>read-only</access>
85972                    </field>
85973                </fields>
85974            </register>
85975            <register>
85976                <name>BOOTKEY2_1</name>
85977                <addressOffset>0x0142</addressOffset>
85978                <description>Bits 31:16 of SHA-256 hash of boot key 2 (ECC)</description>
85979                <size>16</size>
85980                <resetMask>0x0000</resetMask>
85981                <fields>
85982                    <field>
85983                        <name>BOOTKEY2_1</name>
85984                        <bitRange>[15:0]</bitRange>
85985                        <access>read-only</access>
85986                    </field>
85987                </fields>
85988            </register>
85989            <register>
85990                <name>BOOTKEY2_2</name>
85991                <addressOffset>0x0144</addressOffset>
85992                <description>Bits 47:32 of SHA-256 hash of boot key 2 (ECC)</description>
85993                <size>16</size>
85994                <resetMask>0x0000</resetMask>
85995                <fields>
85996                    <field>
85997                        <name>BOOTKEY2_2</name>
85998                        <bitRange>[15:0]</bitRange>
85999                        <access>read-only</access>
86000                    </field>
86001                </fields>
86002            </register>
86003            <register>
86004                <name>BOOTKEY2_3</name>
86005                <addressOffset>0x0146</addressOffset>
86006                <description>Bits 63:48 of SHA-256 hash of boot key 2 (ECC)</description>
86007                <size>16</size>
86008                <resetMask>0x0000</resetMask>
86009                <fields>
86010                    <field>
86011                        <name>BOOTKEY2_3</name>
86012                        <bitRange>[15:0]</bitRange>
86013                        <access>read-only</access>
86014                    </field>
86015                </fields>
86016            </register>
86017            <register>
86018                <name>BOOTKEY2_4</name>
86019                <addressOffset>0x0148</addressOffset>
86020                <description>Bits 79:64 of SHA-256 hash of boot key 2 (ECC)</description>
86021                <size>16</size>
86022                <resetMask>0x0000</resetMask>
86023                <fields>
86024                    <field>
86025                        <name>BOOTKEY2_4</name>
86026                        <bitRange>[15:0]</bitRange>
86027                        <access>read-only</access>
86028                    </field>
86029                </fields>
86030            </register>
86031            <register>
86032                <name>BOOTKEY2_5</name>
86033                <addressOffset>0x014a</addressOffset>
86034                <description>Bits 95:80 of SHA-256 hash of boot key 2 (ECC)</description>
86035                <size>16</size>
86036                <resetMask>0x0000</resetMask>
86037                <fields>
86038                    <field>
86039                        <name>BOOTKEY2_5</name>
86040                        <bitRange>[15:0]</bitRange>
86041                        <access>read-only</access>
86042                    </field>
86043                </fields>
86044            </register>
86045            <register>
86046                <name>BOOTKEY2_6</name>
86047                <addressOffset>0x014c</addressOffset>
86048                <description>Bits 111:96 of SHA-256 hash of boot key 2 (ECC)</description>
86049                <size>16</size>
86050                <resetMask>0x0000</resetMask>
86051                <fields>
86052                    <field>
86053                        <name>BOOTKEY2_6</name>
86054                        <bitRange>[15:0]</bitRange>
86055                        <access>read-only</access>
86056                    </field>
86057                </fields>
86058            </register>
86059            <register>
86060                <name>BOOTKEY2_7</name>
86061                <addressOffset>0x014e</addressOffset>
86062                <description>Bits 127:112 of SHA-256 hash of boot key 2 (ECC)</description>
86063                <size>16</size>
86064                <resetMask>0x0000</resetMask>
86065                <fields>
86066                    <field>
86067                        <name>BOOTKEY2_7</name>
86068                        <bitRange>[15:0]</bitRange>
86069                        <access>read-only</access>
86070                    </field>
86071                </fields>
86072            </register>
86073            <register>
86074                <name>BOOTKEY2_8</name>
86075                <addressOffset>0x0150</addressOffset>
86076                <description>Bits 143:128 of SHA-256 hash of boot key 2 (ECC)</description>
86077                <size>16</size>
86078                <resetMask>0x0000</resetMask>
86079                <fields>
86080                    <field>
86081                        <name>BOOTKEY2_8</name>
86082                        <bitRange>[15:0]</bitRange>
86083                        <access>read-only</access>
86084                    </field>
86085                </fields>
86086            </register>
86087            <register>
86088                <name>BOOTKEY2_9</name>
86089                <addressOffset>0x0152</addressOffset>
86090                <description>Bits 159:144 of SHA-256 hash of boot key 2 (ECC)</description>
86091                <size>16</size>
86092                <resetMask>0x0000</resetMask>
86093                <fields>
86094                    <field>
86095                        <name>BOOTKEY2_9</name>
86096                        <bitRange>[15:0]</bitRange>
86097                        <access>read-only</access>
86098                    </field>
86099                </fields>
86100            </register>
86101            <register>
86102                <name>BOOTKEY2_10</name>
86103                <addressOffset>0x0154</addressOffset>
86104                <description>Bits 175:160 of SHA-256 hash of boot key 2 (ECC)</description>
86105                <size>16</size>
86106                <resetMask>0x0000</resetMask>
86107                <fields>
86108                    <field>
86109                        <name>BOOTKEY2_10</name>
86110                        <bitRange>[15:0]</bitRange>
86111                        <access>read-only</access>
86112                    </field>
86113                </fields>
86114            </register>
86115            <register>
86116                <name>BOOTKEY2_11</name>
86117                <addressOffset>0x0156</addressOffset>
86118                <description>Bits 191:176 of SHA-256 hash of boot key 2 (ECC)</description>
86119                <size>16</size>
86120                <resetMask>0x0000</resetMask>
86121                <fields>
86122                    <field>
86123                        <name>BOOTKEY2_11</name>
86124                        <bitRange>[15:0]</bitRange>
86125                        <access>read-only</access>
86126                    </field>
86127                </fields>
86128            </register>
86129            <register>
86130                <name>BOOTKEY2_12</name>
86131                <addressOffset>0x0158</addressOffset>
86132                <description>Bits 207:192 of SHA-256 hash of boot key 2 (ECC)</description>
86133                <size>16</size>
86134                <resetMask>0x0000</resetMask>
86135                <fields>
86136                    <field>
86137                        <name>BOOTKEY2_12</name>
86138                        <bitRange>[15:0]</bitRange>
86139                        <access>read-only</access>
86140                    </field>
86141                </fields>
86142            </register>
86143            <register>
86144                <name>BOOTKEY2_13</name>
86145                <addressOffset>0x015a</addressOffset>
86146                <description>Bits 223:208 of SHA-256 hash of boot key 2 (ECC)</description>
86147                <size>16</size>
86148                <resetMask>0x0000</resetMask>
86149                <fields>
86150                    <field>
86151                        <name>BOOTKEY2_13</name>
86152                        <bitRange>[15:0]</bitRange>
86153                        <access>read-only</access>
86154                    </field>
86155                </fields>
86156            </register>
86157            <register>
86158                <name>BOOTKEY2_14</name>
86159                <addressOffset>0x015c</addressOffset>
86160                <description>Bits 239:224 of SHA-256 hash of boot key 2 (ECC)</description>
86161                <size>16</size>
86162                <resetMask>0x0000</resetMask>
86163                <fields>
86164                    <field>
86165                        <name>BOOTKEY2_14</name>
86166                        <bitRange>[15:0]</bitRange>
86167                        <access>read-only</access>
86168                    </field>
86169                </fields>
86170            </register>
86171            <register>
86172                <name>BOOTKEY2_15</name>
86173                <addressOffset>0x015e</addressOffset>
86174                <description>Bits 255:240 of SHA-256 hash of boot key 2 (ECC)</description>
86175                <size>16</size>
86176                <resetMask>0x0000</resetMask>
86177                <fields>
86178                    <field>
86179                        <name>BOOTKEY2_15</name>
86180                        <bitRange>[15:0]</bitRange>
86181                        <access>read-only</access>
86182                    </field>
86183                </fields>
86184            </register>
86185            <register>
86186                <name>BOOTKEY3_0</name>
86187                <addressOffset>0x0160</addressOffset>
86188                <description>Bits 15:0 of SHA-256 hash of boot key 3 (ECC)</description>
86189                <size>16</size>
86190                <resetMask>0x0000</resetMask>
86191                <fields>
86192                    <field>
86193                        <name>BOOTKEY3_0</name>
86194                        <bitRange>[15:0]</bitRange>
86195                        <access>read-only</access>
86196                    </field>
86197                </fields>
86198            </register>
86199            <register>
86200                <name>BOOTKEY3_1</name>
86201                <addressOffset>0x0162</addressOffset>
86202                <description>Bits 31:16 of SHA-256 hash of boot key 3 (ECC)</description>
86203                <size>16</size>
86204                <resetMask>0x0000</resetMask>
86205                <fields>
86206                    <field>
86207                        <name>BOOTKEY3_1</name>
86208                        <bitRange>[15:0]</bitRange>
86209                        <access>read-only</access>
86210                    </field>
86211                </fields>
86212            </register>
86213            <register>
86214                <name>BOOTKEY3_2</name>
86215                <addressOffset>0x0164</addressOffset>
86216                <description>Bits 47:32 of SHA-256 hash of boot key 3 (ECC)</description>
86217                <size>16</size>
86218                <resetMask>0x0000</resetMask>
86219                <fields>
86220                    <field>
86221                        <name>BOOTKEY3_2</name>
86222                        <bitRange>[15:0]</bitRange>
86223                        <access>read-only</access>
86224                    </field>
86225                </fields>
86226            </register>
86227            <register>
86228                <name>BOOTKEY3_3</name>
86229                <addressOffset>0x0166</addressOffset>
86230                <description>Bits 63:48 of SHA-256 hash of boot key 3 (ECC)</description>
86231                <size>16</size>
86232                <resetMask>0x0000</resetMask>
86233                <fields>
86234                    <field>
86235                        <name>BOOTKEY3_3</name>
86236                        <bitRange>[15:0]</bitRange>
86237                        <access>read-only</access>
86238                    </field>
86239                </fields>
86240            </register>
86241            <register>
86242                <name>BOOTKEY3_4</name>
86243                <addressOffset>0x0168</addressOffset>
86244                <description>Bits 79:64 of SHA-256 hash of boot key 3 (ECC)</description>
86245                <size>16</size>
86246                <resetMask>0x0000</resetMask>
86247                <fields>
86248                    <field>
86249                        <name>BOOTKEY3_4</name>
86250                        <bitRange>[15:0]</bitRange>
86251                        <access>read-only</access>
86252                    </field>
86253                </fields>
86254            </register>
86255            <register>
86256                <name>BOOTKEY3_5</name>
86257                <addressOffset>0x016a</addressOffset>
86258                <description>Bits 95:80 of SHA-256 hash of boot key 3 (ECC)</description>
86259                <size>16</size>
86260                <resetMask>0x0000</resetMask>
86261                <fields>
86262                    <field>
86263                        <name>BOOTKEY3_5</name>
86264                        <bitRange>[15:0]</bitRange>
86265                        <access>read-only</access>
86266                    </field>
86267                </fields>
86268            </register>
86269            <register>
86270                <name>BOOTKEY3_6</name>
86271                <addressOffset>0x016c</addressOffset>
86272                <description>Bits 111:96 of SHA-256 hash of boot key 3 (ECC)</description>
86273                <size>16</size>
86274                <resetMask>0x0000</resetMask>
86275                <fields>
86276                    <field>
86277                        <name>BOOTKEY3_6</name>
86278                        <bitRange>[15:0]</bitRange>
86279                        <access>read-only</access>
86280                    </field>
86281                </fields>
86282            </register>
86283            <register>
86284                <name>BOOTKEY3_7</name>
86285                <addressOffset>0x016e</addressOffset>
86286                <description>Bits 127:112 of SHA-256 hash of boot key 3 (ECC)</description>
86287                <size>16</size>
86288                <resetMask>0x0000</resetMask>
86289                <fields>
86290                    <field>
86291                        <name>BOOTKEY3_7</name>
86292                        <bitRange>[15:0]</bitRange>
86293                        <access>read-only</access>
86294                    </field>
86295                </fields>
86296            </register>
86297            <register>
86298                <name>BOOTKEY3_8</name>
86299                <addressOffset>0x0170</addressOffset>
86300                <description>Bits 143:128 of SHA-256 hash of boot key 3 (ECC)</description>
86301                <size>16</size>
86302                <resetMask>0x0000</resetMask>
86303                <fields>
86304                    <field>
86305                        <name>BOOTKEY3_8</name>
86306                        <bitRange>[15:0]</bitRange>
86307                        <access>read-only</access>
86308                    </field>
86309                </fields>
86310            </register>
86311            <register>
86312                <name>BOOTKEY3_9</name>
86313                <addressOffset>0x0172</addressOffset>
86314                <description>Bits 159:144 of SHA-256 hash of boot key 3 (ECC)</description>
86315                <size>16</size>
86316                <resetMask>0x0000</resetMask>
86317                <fields>
86318                    <field>
86319                        <name>BOOTKEY3_9</name>
86320                        <bitRange>[15:0]</bitRange>
86321                        <access>read-only</access>
86322                    </field>
86323                </fields>
86324            </register>
86325            <register>
86326                <name>BOOTKEY3_10</name>
86327                <addressOffset>0x0174</addressOffset>
86328                <description>Bits 175:160 of SHA-256 hash of boot key 3 (ECC)</description>
86329                <size>16</size>
86330                <resetMask>0x0000</resetMask>
86331                <fields>
86332                    <field>
86333                        <name>BOOTKEY3_10</name>
86334                        <bitRange>[15:0]</bitRange>
86335                        <access>read-only</access>
86336                    </field>
86337                </fields>
86338            </register>
86339            <register>
86340                <name>BOOTKEY3_11</name>
86341                <addressOffset>0x0176</addressOffset>
86342                <description>Bits 191:176 of SHA-256 hash of boot key 3 (ECC)</description>
86343                <size>16</size>
86344                <resetMask>0x0000</resetMask>
86345                <fields>
86346                    <field>
86347                        <name>BOOTKEY3_11</name>
86348                        <bitRange>[15:0]</bitRange>
86349                        <access>read-only</access>
86350                    </field>
86351                </fields>
86352            </register>
86353            <register>
86354                <name>BOOTKEY3_12</name>
86355                <addressOffset>0x0178</addressOffset>
86356                <description>Bits 207:192 of SHA-256 hash of boot key 3 (ECC)</description>
86357                <size>16</size>
86358                <resetMask>0x0000</resetMask>
86359                <fields>
86360                    <field>
86361                        <name>BOOTKEY3_12</name>
86362                        <bitRange>[15:0]</bitRange>
86363                        <access>read-only</access>
86364                    </field>
86365                </fields>
86366            </register>
86367            <register>
86368                <name>BOOTKEY3_13</name>
86369                <addressOffset>0x017a</addressOffset>
86370                <description>Bits 223:208 of SHA-256 hash of boot key 3 (ECC)</description>
86371                <size>16</size>
86372                <resetMask>0x0000</resetMask>
86373                <fields>
86374                    <field>
86375                        <name>BOOTKEY3_13</name>
86376                        <bitRange>[15:0]</bitRange>
86377                        <access>read-only</access>
86378                    </field>
86379                </fields>
86380            </register>
86381            <register>
86382                <name>BOOTKEY3_14</name>
86383                <addressOffset>0x017c</addressOffset>
86384                <description>Bits 239:224 of SHA-256 hash of boot key 3 (ECC)</description>
86385                <size>16</size>
86386                <resetMask>0x0000</resetMask>
86387                <fields>
86388                    <field>
86389                        <name>BOOTKEY3_14</name>
86390                        <bitRange>[15:0]</bitRange>
86391                        <access>read-only</access>
86392                    </field>
86393                </fields>
86394            </register>
86395            <register>
86396                <name>BOOTKEY3_15</name>
86397                <addressOffset>0x017e</addressOffset>
86398                <description>Bits 255:240 of SHA-256 hash of boot key 3 (ECC)</description>
86399                <size>16</size>
86400                <resetMask>0x0000</resetMask>
86401                <fields>
86402                    <field>
86403                        <name>BOOTKEY3_15</name>
86404                        <bitRange>[15:0]</bitRange>
86405                        <access>read-only</access>
86406                    </field>
86407                </fields>
86408            </register>
86409            <register>
86410                <name>KEY1_0</name>
86411                <addressOffset>0x1e90</addressOffset>
86412                <description>Bits 15:0 of OTP access key 1 (ECC)</description>
86413                <size>16</size>
86414                <resetMask>0x0000</resetMask>
86415                <fields>
86416                    <field>
86417                        <name>KEY1_0</name>
86418                        <bitRange>[15:0]</bitRange>
86419                        <access>read-only</access>
86420                    </field>
86421                </fields>
86422            </register>
86423            <register>
86424                <name>KEY1_1</name>
86425                <addressOffset>0x1e92</addressOffset>
86426                <description>Bits 31:16 of OTP access key 1 (ECC)</description>
86427                <size>16</size>
86428                <resetMask>0x0000</resetMask>
86429                <fields>
86430                    <field>
86431                        <name>KEY1_1</name>
86432                        <bitRange>[15:0]</bitRange>
86433                        <access>read-only</access>
86434                    </field>
86435                </fields>
86436            </register>
86437            <register>
86438                <name>KEY1_2</name>
86439                <addressOffset>0x1e94</addressOffset>
86440                <description>Bits 47:32 of OTP access key 1 (ECC)</description>
86441                <size>16</size>
86442                <resetMask>0x0000</resetMask>
86443                <fields>
86444                    <field>
86445                        <name>KEY1_2</name>
86446                        <bitRange>[15:0]</bitRange>
86447                        <access>read-only</access>
86448                    </field>
86449                </fields>
86450            </register>
86451            <register>
86452                <name>KEY1_3</name>
86453                <addressOffset>0x1e96</addressOffset>
86454                <description>Bits 63:48 of OTP access key 1 (ECC)</description>
86455                <size>16</size>
86456                <resetMask>0x0000</resetMask>
86457                <fields>
86458                    <field>
86459                        <name>KEY1_3</name>
86460                        <bitRange>[15:0]</bitRange>
86461                        <access>read-only</access>
86462                    </field>
86463                </fields>
86464            </register>
86465            <register>
86466                <name>KEY1_4</name>
86467                <addressOffset>0x1e98</addressOffset>
86468                <description>Bits 79:64 of OTP access key 1 (ECC)</description>
86469                <size>16</size>
86470                <resetMask>0x0000</resetMask>
86471                <fields>
86472                    <field>
86473                        <name>KEY1_4</name>
86474                        <bitRange>[15:0]</bitRange>
86475                        <access>read-only</access>
86476                    </field>
86477                </fields>
86478            </register>
86479            <register>
86480                <name>KEY1_5</name>
86481                <addressOffset>0x1e9a</addressOffset>
86482                <description>Bits 95:80 of OTP access key 1 (ECC)</description>
86483                <size>16</size>
86484                <resetMask>0x0000</resetMask>
86485                <fields>
86486                    <field>
86487                        <name>KEY1_5</name>
86488                        <bitRange>[15:0]</bitRange>
86489                        <access>read-only</access>
86490                    </field>
86491                </fields>
86492            </register>
86493            <register>
86494                <name>KEY1_6</name>
86495                <addressOffset>0x1e9c</addressOffset>
86496                <description>Bits 111:96 of OTP access key 1 (ECC)</description>
86497                <size>16</size>
86498                <resetMask>0x0000</resetMask>
86499                <fields>
86500                    <field>
86501                        <name>KEY1_6</name>
86502                        <bitRange>[15:0]</bitRange>
86503                        <access>read-only</access>
86504                    </field>
86505                </fields>
86506            </register>
86507            <register>
86508                <name>KEY1_7</name>
86509                <addressOffset>0x1e9e</addressOffset>
86510                <description>Bits 127:112 of OTP access key 1 (ECC)</description>
86511                <size>16</size>
86512                <resetMask>0x0000</resetMask>
86513                <fields>
86514                    <field>
86515                        <name>KEY1_7</name>
86516                        <bitRange>[15:0]</bitRange>
86517                        <access>read-only</access>
86518                    </field>
86519                </fields>
86520            </register>
86521            <register>
86522                <name>KEY2_0</name>
86523                <addressOffset>0x1ea0</addressOffset>
86524                <description>Bits 15:0 of OTP access key 2 (ECC)</description>
86525                <size>16</size>
86526                <resetMask>0x0000</resetMask>
86527                <fields>
86528                    <field>
86529                        <name>KEY2_0</name>
86530                        <bitRange>[15:0]</bitRange>
86531                        <access>read-only</access>
86532                    </field>
86533                </fields>
86534            </register>
86535            <register>
86536                <name>KEY2_1</name>
86537                <addressOffset>0x1ea2</addressOffset>
86538                <description>Bits 31:16 of OTP access key 2 (ECC)</description>
86539                <size>16</size>
86540                <resetMask>0x0000</resetMask>
86541                <fields>
86542                    <field>
86543                        <name>KEY2_1</name>
86544                        <bitRange>[15:0]</bitRange>
86545                        <access>read-only</access>
86546                    </field>
86547                </fields>
86548            </register>
86549            <register>
86550                <name>KEY2_2</name>
86551                <addressOffset>0x1ea4</addressOffset>
86552                <description>Bits 47:32 of OTP access key 2 (ECC)</description>
86553                <size>16</size>
86554                <resetMask>0x0000</resetMask>
86555                <fields>
86556                    <field>
86557                        <name>KEY2_2</name>
86558                        <bitRange>[15:0]</bitRange>
86559                        <access>read-only</access>
86560                    </field>
86561                </fields>
86562            </register>
86563            <register>
86564                <name>KEY2_3</name>
86565                <addressOffset>0x1ea6</addressOffset>
86566                <description>Bits 63:48 of OTP access key 2 (ECC)</description>
86567                <size>16</size>
86568                <resetMask>0x0000</resetMask>
86569                <fields>
86570                    <field>
86571                        <name>KEY2_3</name>
86572                        <bitRange>[15:0]</bitRange>
86573                        <access>read-only</access>
86574                    </field>
86575                </fields>
86576            </register>
86577            <register>
86578                <name>KEY2_4</name>
86579                <addressOffset>0x1ea8</addressOffset>
86580                <description>Bits 79:64 of OTP access key 2 (ECC)</description>
86581                <size>16</size>
86582                <resetMask>0x0000</resetMask>
86583                <fields>
86584                    <field>
86585                        <name>KEY2_4</name>
86586                        <bitRange>[15:0]</bitRange>
86587                        <access>read-only</access>
86588                    </field>
86589                </fields>
86590            </register>
86591            <register>
86592                <name>KEY2_5</name>
86593                <addressOffset>0x1eaa</addressOffset>
86594                <description>Bits 95:80 of OTP access key 2 (ECC)</description>
86595                <size>16</size>
86596                <resetMask>0x0000</resetMask>
86597                <fields>
86598                    <field>
86599                        <name>KEY2_5</name>
86600                        <bitRange>[15:0]</bitRange>
86601                        <access>read-only</access>
86602                    </field>
86603                </fields>
86604            </register>
86605            <register>
86606                <name>KEY2_6</name>
86607                <addressOffset>0x1eac</addressOffset>
86608                <description>Bits 111:96 of OTP access key 2 (ECC)</description>
86609                <size>16</size>
86610                <resetMask>0x0000</resetMask>
86611                <fields>
86612                    <field>
86613                        <name>KEY2_6</name>
86614                        <bitRange>[15:0]</bitRange>
86615                        <access>read-only</access>
86616                    </field>
86617                </fields>
86618            </register>
86619            <register>
86620                <name>KEY2_7</name>
86621                <addressOffset>0x1eae</addressOffset>
86622                <description>Bits 127:112 of OTP access key 2 (ECC)</description>
86623                <size>16</size>
86624                <resetMask>0x0000</resetMask>
86625                <fields>
86626                    <field>
86627                        <name>KEY2_7</name>
86628                        <bitRange>[15:0]</bitRange>
86629                        <access>read-only</access>
86630                    </field>
86631                </fields>
86632            </register>
86633            <register>
86634                <name>KEY3_0</name>
86635                <addressOffset>0x1eb0</addressOffset>
86636                <description>Bits 15:0 of OTP access key 3 (ECC)</description>
86637                <size>16</size>
86638                <resetMask>0x0000</resetMask>
86639                <fields>
86640                    <field>
86641                        <name>KEY3_0</name>
86642                        <bitRange>[15:0]</bitRange>
86643                        <access>read-only</access>
86644                    </field>
86645                </fields>
86646            </register>
86647            <register>
86648                <name>KEY3_1</name>
86649                <addressOffset>0x1eb2</addressOffset>
86650                <description>Bits 31:16 of OTP access key 3 (ECC)</description>
86651                <size>16</size>
86652                <resetMask>0x0000</resetMask>
86653                <fields>
86654                    <field>
86655                        <name>KEY3_1</name>
86656                        <bitRange>[15:0]</bitRange>
86657                        <access>read-only</access>
86658                    </field>
86659                </fields>
86660            </register>
86661            <register>
86662                <name>KEY3_2</name>
86663                <addressOffset>0x1eb4</addressOffset>
86664                <description>Bits 47:32 of OTP access key 3 (ECC)</description>
86665                <size>16</size>
86666                <resetMask>0x0000</resetMask>
86667                <fields>
86668                    <field>
86669                        <name>KEY3_2</name>
86670                        <bitRange>[15:0]</bitRange>
86671                        <access>read-only</access>
86672                    </field>
86673                </fields>
86674            </register>
86675            <register>
86676                <name>KEY3_3</name>
86677                <addressOffset>0x1eb6</addressOffset>
86678                <description>Bits 63:48 of OTP access key 3 (ECC)</description>
86679                <size>16</size>
86680                <resetMask>0x0000</resetMask>
86681                <fields>
86682                    <field>
86683                        <name>KEY3_3</name>
86684                        <bitRange>[15:0]</bitRange>
86685                        <access>read-only</access>
86686                    </field>
86687                </fields>
86688            </register>
86689            <register>
86690                <name>KEY3_4</name>
86691                <addressOffset>0x1eb8</addressOffset>
86692                <description>Bits 79:64 of OTP access key 3 (ECC)</description>
86693                <size>16</size>
86694                <resetMask>0x0000</resetMask>
86695                <fields>
86696                    <field>
86697                        <name>KEY3_4</name>
86698                        <bitRange>[15:0]</bitRange>
86699                        <access>read-only</access>
86700                    </field>
86701                </fields>
86702            </register>
86703            <register>
86704                <name>KEY3_5</name>
86705                <addressOffset>0x1eba</addressOffset>
86706                <description>Bits 95:80 of OTP access key 3 (ECC)</description>
86707                <size>16</size>
86708                <resetMask>0x0000</resetMask>
86709                <fields>
86710                    <field>
86711                        <name>KEY3_5</name>
86712                        <bitRange>[15:0]</bitRange>
86713                        <access>read-only</access>
86714                    </field>
86715                </fields>
86716            </register>
86717            <register>
86718                <name>KEY3_6</name>
86719                <addressOffset>0x1ebc</addressOffset>
86720                <description>Bits 111:96 of OTP access key 3 (ECC)</description>
86721                <size>16</size>
86722                <resetMask>0x0000</resetMask>
86723                <fields>
86724                    <field>
86725                        <name>KEY3_6</name>
86726                        <bitRange>[15:0]</bitRange>
86727                        <access>read-only</access>
86728                    </field>
86729                </fields>
86730            </register>
86731            <register>
86732                <name>KEY3_7</name>
86733                <addressOffset>0x1ebe</addressOffset>
86734                <description>Bits 127:112 of OTP access key 3 (ECC)</description>
86735                <size>16</size>
86736                <resetMask>0x0000</resetMask>
86737                <fields>
86738                    <field>
86739                        <name>KEY3_7</name>
86740                        <bitRange>[15:0]</bitRange>
86741                        <access>read-only</access>
86742                    </field>
86743                </fields>
86744            </register>
86745            <register>
86746                <name>KEY4_0</name>
86747                <addressOffset>0x1ec0</addressOffset>
86748                <description>Bits 15:0 of OTP access key 4 (ECC)</description>
86749                <size>16</size>
86750                <resetMask>0x0000</resetMask>
86751                <fields>
86752                    <field>
86753                        <name>KEY4_0</name>
86754                        <bitRange>[15:0]</bitRange>
86755                        <access>read-only</access>
86756                    </field>
86757                </fields>
86758            </register>
86759            <register>
86760                <name>KEY4_1</name>
86761                <addressOffset>0x1ec2</addressOffset>
86762                <description>Bits 31:16 of OTP access key 4 (ECC)</description>
86763                <size>16</size>
86764                <resetMask>0x0000</resetMask>
86765                <fields>
86766                    <field>
86767                        <name>KEY4_1</name>
86768                        <bitRange>[15:0]</bitRange>
86769                        <access>read-only</access>
86770                    </field>
86771                </fields>
86772            </register>
86773            <register>
86774                <name>KEY4_2</name>
86775                <addressOffset>0x1ec4</addressOffset>
86776                <description>Bits 47:32 of OTP access key 4 (ECC)</description>
86777                <size>16</size>
86778                <resetMask>0x0000</resetMask>
86779                <fields>
86780                    <field>
86781                        <name>KEY4_2</name>
86782                        <bitRange>[15:0]</bitRange>
86783                        <access>read-only</access>
86784                    </field>
86785                </fields>
86786            </register>
86787            <register>
86788                <name>KEY4_3</name>
86789                <addressOffset>0x1ec6</addressOffset>
86790                <description>Bits 63:48 of OTP access key 4 (ECC)</description>
86791                <size>16</size>
86792                <resetMask>0x0000</resetMask>
86793                <fields>
86794                    <field>
86795                        <name>KEY4_3</name>
86796                        <bitRange>[15:0]</bitRange>
86797                        <access>read-only</access>
86798                    </field>
86799                </fields>
86800            </register>
86801            <register>
86802                <name>KEY4_4</name>
86803                <addressOffset>0x1ec8</addressOffset>
86804                <description>Bits 79:64 of OTP access key 4 (ECC)</description>
86805                <size>16</size>
86806                <resetMask>0x0000</resetMask>
86807                <fields>
86808                    <field>
86809                        <name>KEY4_4</name>
86810                        <bitRange>[15:0]</bitRange>
86811                        <access>read-only</access>
86812                    </field>
86813                </fields>
86814            </register>
86815            <register>
86816                <name>KEY4_5</name>
86817                <addressOffset>0x1eca</addressOffset>
86818                <description>Bits 95:80 of OTP access key 4 (ECC)</description>
86819                <size>16</size>
86820                <resetMask>0x0000</resetMask>
86821                <fields>
86822                    <field>
86823                        <name>KEY4_5</name>
86824                        <bitRange>[15:0]</bitRange>
86825                        <access>read-only</access>
86826                    </field>
86827                </fields>
86828            </register>
86829            <register>
86830                <name>KEY4_6</name>
86831                <addressOffset>0x1ecc</addressOffset>
86832                <description>Bits 111:96 of OTP access key 4 (ECC)</description>
86833                <size>16</size>
86834                <resetMask>0x0000</resetMask>
86835                <fields>
86836                    <field>
86837                        <name>KEY4_6</name>
86838                        <bitRange>[15:0]</bitRange>
86839                        <access>read-only</access>
86840                    </field>
86841                </fields>
86842            </register>
86843            <register>
86844                <name>KEY4_7</name>
86845                <addressOffset>0x1ece</addressOffset>
86846                <description>Bits 127:112 of OTP access key 4 (ECC)</description>
86847                <size>16</size>
86848                <resetMask>0x0000</resetMask>
86849                <fields>
86850                    <field>
86851                        <name>KEY4_7</name>
86852                        <bitRange>[15:0]</bitRange>
86853                        <access>read-only</access>
86854                    </field>
86855                </fields>
86856            </register>
86857            <register>
86858                <name>KEY5_0</name>
86859                <addressOffset>0x1ed0</addressOffset>
86860                <description>Bits 15:0 of OTP access key 5 (ECC)</description>
86861                <size>16</size>
86862                <resetMask>0x0000</resetMask>
86863                <fields>
86864                    <field>
86865                        <name>KEY5_0</name>
86866                        <bitRange>[15:0]</bitRange>
86867                        <access>read-only</access>
86868                    </field>
86869                </fields>
86870            </register>
86871            <register>
86872                <name>KEY5_1</name>
86873                <addressOffset>0x1ed2</addressOffset>
86874                <description>Bits 31:16 of OTP access key 5 (ECC)</description>
86875                <size>16</size>
86876                <resetMask>0x0000</resetMask>
86877                <fields>
86878                    <field>
86879                        <name>KEY5_1</name>
86880                        <bitRange>[15:0]</bitRange>
86881                        <access>read-only</access>
86882                    </field>
86883                </fields>
86884            </register>
86885            <register>
86886                <name>KEY5_2</name>
86887                <addressOffset>0x1ed4</addressOffset>
86888                <description>Bits 47:32 of OTP access key 5 (ECC)</description>
86889                <size>16</size>
86890                <resetMask>0x0000</resetMask>
86891                <fields>
86892                    <field>
86893                        <name>KEY5_2</name>
86894                        <bitRange>[15:0]</bitRange>
86895                        <access>read-only</access>
86896                    </field>
86897                </fields>
86898            </register>
86899            <register>
86900                <name>KEY5_3</name>
86901                <addressOffset>0x1ed6</addressOffset>
86902                <description>Bits 63:48 of OTP access key 5 (ECC)</description>
86903                <size>16</size>
86904                <resetMask>0x0000</resetMask>
86905                <fields>
86906                    <field>
86907                        <name>KEY5_3</name>
86908                        <bitRange>[15:0]</bitRange>
86909                        <access>read-only</access>
86910                    </field>
86911                </fields>
86912            </register>
86913            <register>
86914                <name>KEY5_4</name>
86915                <addressOffset>0x1ed8</addressOffset>
86916                <description>Bits 79:64 of OTP access key 5 (ECC)</description>
86917                <size>16</size>
86918                <resetMask>0x0000</resetMask>
86919                <fields>
86920                    <field>
86921                        <name>KEY5_4</name>
86922                        <bitRange>[15:0]</bitRange>
86923                        <access>read-only</access>
86924                    </field>
86925                </fields>
86926            </register>
86927            <register>
86928                <name>KEY5_5</name>
86929                <addressOffset>0x1eda</addressOffset>
86930                <description>Bits 95:80 of OTP access key 5 (ECC)</description>
86931                <size>16</size>
86932                <resetMask>0x0000</resetMask>
86933                <fields>
86934                    <field>
86935                        <name>KEY5_5</name>
86936                        <bitRange>[15:0]</bitRange>
86937                        <access>read-only</access>
86938                    </field>
86939                </fields>
86940            </register>
86941            <register>
86942                <name>KEY5_6</name>
86943                <addressOffset>0x1edc</addressOffset>
86944                <description>Bits 111:96 of OTP access key 5 (ECC)</description>
86945                <size>16</size>
86946                <resetMask>0x0000</resetMask>
86947                <fields>
86948                    <field>
86949                        <name>KEY5_6</name>
86950                        <bitRange>[15:0]</bitRange>
86951                        <access>read-only</access>
86952                    </field>
86953                </fields>
86954            </register>
86955            <register>
86956                <name>KEY5_7</name>
86957                <addressOffset>0x1ede</addressOffset>
86958                <description>Bits 127:112 of OTP access key 5 (ECC)</description>
86959                <size>16</size>
86960                <resetMask>0x0000</resetMask>
86961                <fields>
86962                    <field>
86963                        <name>KEY5_7</name>
86964                        <bitRange>[15:0]</bitRange>
86965                        <access>read-only</access>
86966                    </field>
86967                </fields>
86968            </register>
86969            <register>
86970                <name>KEY6_0</name>
86971                <addressOffset>0x1ee0</addressOffset>
86972                <description>Bits 15:0 of OTP access key 6 (ECC)</description>
86973                <size>16</size>
86974                <resetMask>0x0000</resetMask>
86975                <fields>
86976                    <field>
86977                        <name>KEY6_0</name>
86978                        <bitRange>[15:0]</bitRange>
86979                        <access>read-only</access>
86980                    </field>
86981                </fields>
86982            </register>
86983            <register>
86984                <name>KEY6_1</name>
86985                <addressOffset>0x1ee2</addressOffset>
86986                <description>Bits 31:16 of OTP access key 6 (ECC)</description>
86987                <size>16</size>
86988                <resetMask>0x0000</resetMask>
86989                <fields>
86990                    <field>
86991                        <name>KEY6_1</name>
86992                        <bitRange>[15:0]</bitRange>
86993                        <access>read-only</access>
86994                    </field>
86995                </fields>
86996            </register>
86997            <register>
86998                <name>KEY6_2</name>
86999                <addressOffset>0x1ee4</addressOffset>
87000                <description>Bits 47:32 of OTP access key 6 (ECC)</description>
87001                <size>16</size>
87002                <resetMask>0x0000</resetMask>
87003                <fields>
87004                    <field>
87005                        <name>KEY6_2</name>
87006                        <bitRange>[15:0]</bitRange>
87007                        <access>read-only</access>
87008                    </field>
87009                </fields>
87010            </register>
87011            <register>
87012                <name>KEY6_3</name>
87013                <addressOffset>0x1ee6</addressOffset>
87014                <description>Bits 63:48 of OTP access key 6 (ECC)</description>
87015                <size>16</size>
87016                <resetMask>0x0000</resetMask>
87017                <fields>
87018                    <field>
87019                        <name>KEY6_3</name>
87020                        <bitRange>[15:0]</bitRange>
87021                        <access>read-only</access>
87022                    </field>
87023                </fields>
87024            </register>
87025            <register>
87026                <name>KEY6_4</name>
87027                <addressOffset>0x1ee8</addressOffset>
87028                <description>Bits 79:64 of OTP access key 6 (ECC)</description>
87029                <size>16</size>
87030                <resetMask>0x0000</resetMask>
87031                <fields>
87032                    <field>
87033                        <name>KEY6_4</name>
87034                        <bitRange>[15:0]</bitRange>
87035                        <access>read-only</access>
87036                    </field>
87037                </fields>
87038            </register>
87039            <register>
87040                <name>KEY6_5</name>
87041                <addressOffset>0x1eea</addressOffset>
87042                <description>Bits 95:80 of OTP access key 6 (ECC)</description>
87043                <size>16</size>
87044                <resetMask>0x0000</resetMask>
87045                <fields>
87046                    <field>
87047                        <name>KEY6_5</name>
87048                        <bitRange>[15:0]</bitRange>
87049                        <access>read-only</access>
87050                    </field>
87051                </fields>
87052            </register>
87053            <register>
87054                <name>KEY6_6</name>
87055                <addressOffset>0x1eec</addressOffset>
87056                <description>Bits 111:96 of OTP access key 6 (ECC)</description>
87057                <size>16</size>
87058                <resetMask>0x0000</resetMask>
87059                <fields>
87060                    <field>
87061                        <name>KEY6_6</name>
87062                        <bitRange>[15:0]</bitRange>
87063                        <access>read-only</access>
87064                    </field>
87065                </fields>
87066            </register>
87067            <register>
87068                <name>KEY6_7</name>
87069                <addressOffset>0x1eee</addressOffset>
87070                <description>Bits 127:112 of OTP access key 6 (ECC)</description>
87071                <size>16</size>
87072                <resetMask>0x0000</resetMask>
87073                <fields>
87074                    <field>
87075                        <name>KEY6_7</name>
87076                        <bitRange>[15:0]</bitRange>
87077                        <access>read-only</access>
87078                    </field>
87079                </fields>
87080            </register>
87081        </registers>
87082    </peripheral>
87083    <peripheral>
87084        <name>OTP_DATA_RAW</name>
87085        <description>Predefined OTP data layout for RP2350</description>
87086        <baseAddress>0x40134000</baseAddress>
87087        <addressBlock>
87088            <offset>0</offset>
87089            <size>16384</size>
87090            <usage>registers</usage>
87091        </addressBlock>
87092        <registers>
87093            <register>
87094                <name>CHIPID0</name>
87095                <addressOffset>0x00000000</addressOffset>
87096                <description>Bits 15:0 of public device ID. (ECC)
87097
87098                    The CHIPID0..3 rows contain a 64-bit random identifier for this chip, which can be read from the USB bootloader PICOBOOT interface or from the get_sys_info ROM API.
87099
87100                    The number of random bits makes the occurrence of twins exceedingly unlikely: for example, a fleet of a hundred million devices has a 99.97% probability of no twinned IDs. This is estimated to be lower than the occurrence of process errors in the assignment of sequential random IDs, and for practical purposes CHIPID may be treated as unique.</description>
87101                <resetMask>0x00000000</resetMask>
87102                <fields>
87103                    <field>
87104                        <name>CHIPID0</name>
87105                        <bitRange>[15:0]</bitRange>
87106                        <access>read-only</access>
87107                    </field>
87108                </fields>
87109            </register>
87110            <register>
87111                <name>CHIPID1</name>
87112                <addressOffset>0x00000004</addressOffset>
87113                <description>Bits 31:16 of public device ID (ECC)</description>
87114                <resetMask>0x00000000</resetMask>
87115                <fields>
87116                    <field>
87117                        <name>CHIPID1</name>
87118                        <bitRange>[15:0]</bitRange>
87119                        <access>read-only</access>
87120                    </field>
87121                </fields>
87122            </register>
87123            <register>
87124                <name>CHIPID2</name>
87125                <addressOffset>0x00000008</addressOffset>
87126                <description>Bits 47:32 of public device ID (ECC)</description>
87127                <resetMask>0x00000000</resetMask>
87128                <fields>
87129                    <field>
87130                        <name>CHIPID2</name>
87131                        <bitRange>[15:0]</bitRange>
87132                        <access>read-only</access>
87133                    </field>
87134                </fields>
87135            </register>
87136            <register>
87137                <name>CHIPID3</name>
87138                <addressOffset>0x0000000c</addressOffset>
87139                <description>Bits 63:48 of public device ID (ECC)</description>
87140                <resetMask>0x00000000</resetMask>
87141                <fields>
87142                    <field>
87143                        <name>CHIPID3</name>
87144                        <bitRange>[15:0]</bitRange>
87145                        <access>read-only</access>
87146                    </field>
87147                </fields>
87148            </register>
87149            <register>
87150                <name>RANDID0</name>
87151                <addressOffset>0x00000010</addressOffset>
87152                <description>Bits 15:0 of private per-device random number (ECC)
87153
87154                    The RANDID0..7 rows form a 128-bit random number generated during device test.
87155
87156                    This ID is not exposed through the USB PICOBOOT GET_INFO command or the ROM `get_sys_info()` API. However note that the USB PICOBOOT OTP access point can read the entirety of page 0, so this value is not meaningfully private unless the USB PICOBOOT interface is disabled via the DISABLE_BOOTSEL_USB_PICOBOOT_IFC flag in BOOT_FLAGS0.</description>
87157                <resetMask>0x00000000</resetMask>
87158                <fields>
87159                    <field>
87160                        <name>RANDID0</name>
87161                        <bitRange>[15:0]</bitRange>
87162                        <access>read-only</access>
87163                    </field>
87164                </fields>
87165            </register>
87166            <register>
87167                <name>RANDID1</name>
87168                <addressOffset>0x00000014</addressOffset>
87169                <description>Bits 31:16 of private per-device random number (ECC)</description>
87170                <resetMask>0x00000000</resetMask>
87171                <fields>
87172                    <field>
87173                        <name>RANDID1</name>
87174                        <bitRange>[15:0]</bitRange>
87175                        <access>read-only</access>
87176                    </field>
87177                </fields>
87178            </register>
87179            <register>
87180                <name>RANDID2</name>
87181                <addressOffset>0x00000018</addressOffset>
87182                <description>Bits 47:32 of private per-device random number (ECC)</description>
87183                <resetMask>0x00000000</resetMask>
87184                <fields>
87185                    <field>
87186                        <name>RANDID2</name>
87187                        <bitRange>[15:0]</bitRange>
87188                        <access>read-only</access>
87189                    </field>
87190                </fields>
87191            </register>
87192            <register>
87193                <name>RANDID3</name>
87194                <addressOffset>0x0000001c</addressOffset>
87195                <description>Bits 63:48 of private per-device random number (ECC)</description>
87196                <resetMask>0x00000000</resetMask>
87197                <fields>
87198                    <field>
87199                        <name>RANDID3</name>
87200                        <bitRange>[15:0]</bitRange>
87201                        <access>read-only</access>
87202                    </field>
87203                </fields>
87204            </register>
87205            <register>
87206                <name>RANDID4</name>
87207                <addressOffset>0x00000020</addressOffset>
87208                <description>Bits 79:64 of private per-device random number (ECC)</description>
87209                <resetMask>0x00000000</resetMask>
87210                <fields>
87211                    <field>
87212                        <name>RANDID4</name>
87213                        <bitRange>[15:0]</bitRange>
87214                        <access>read-only</access>
87215                    </field>
87216                </fields>
87217            </register>
87218            <register>
87219                <name>RANDID5</name>
87220                <addressOffset>0x00000024</addressOffset>
87221                <description>Bits 95:80 of private per-device random number (ECC)</description>
87222                <resetMask>0x00000000</resetMask>
87223                <fields>
87224                    <field>
87225                        <name>RANDID5</name>
87226                        <bitRange>[15:0]</bitRange>
87227                        <access>read-only</access>
87228                    </field>
87229                </fields>
87230            </register>
87231            <register>
87232                <name>RANDID6</name>
87233                <addressOffset>0x00000028</addressOffset>
87234                <description>Bits 111:96 of private per-device random number (ECC)</description>
87235                <resetMask>0x00000000</resetMask>
87236                <fields>
87237                    <field>
87238                        <name>RANDID6</name>
87239                        <bitRange>[15:0]</bitRange>
87240                        <access>read-only</access>
87241                    </field>
87242                </fields>
87243            </register>
87244            <register>
87245                <name>RANDID7</name>
87246                <addressOffset>0x0000002c</addressOffset>
87247                <description>Bits 127:112 of private per-device random number (ECC)</description>
87248                <resetMask>0x00000000</resetMask>
87249                <fields>
87250                    <field>
87251                        <name>RANDID7</name>
87252                        <bitRange>[15:0]</bitRange>
87253                        <access>read-only</access>
87254                    </field>
87255                </fields>
87256            </register>
87257            <register>
87258                <name>ROSC_CALIB</name>
87259                <addressOffset>0x00000040</addressOffset>
87260                <description>Ring oscillator frequency in kHz, measured during manufacturing (ECC)
87261
87262                    This is measured at 1.1 V, at room temperature, with the ROSC configuration registers in their reset state.</description>
87263                <resetMask>0x00000000</resetMask>
87264                <fields>
87265                    <field>
87266                        <name>ROSC_CALIB</name>
87267                        <bitRange>[15:0]</bitRange>
87268                        <access>read-only</access>
87269                    </field>
87270                </fields>
87271            </register>
87272            <register>
87273                <name>LPOSC_CALIB</name>
87274                <addressOffset>0x00000044</addressOffset>
87275                <description>Low-power oscillator frequency in Hz, measured during manufacturing (ECC)
87276
87277                    This is measured at 1.1V, at room temperature, with the LPOSC trim register in its reset state.</description>
87278                <resetMask>0x00000000</resetMask>
87279                <fields>
87280                    <field>
87281                        <name>LPOSC_CALIB</name>
87282                        <bitRange>[15:0]</bitRange>
87283                        <access>read-only</access>
87284                    </field>
87285                </fields>
87286            </register>
87287            <register>
87288                <name>NUM_GPIOS</name>
87289                <addressOffset>0x00000060</addressOffset>
87290                <description>The number of main user GPIOs (bank 0). Should read 48 in the QFN80 package, and 30 in the QFN60 package. (ECC)</description>
87291                <resetMask>0x00000000</resetMask>
87292                <fields>
87293                    <field>
87294                        <name>NUM_GPIOS</name>
87295                        <bitRange>[7:0]</bitRange>
87296                        <access>read-only</access>
87297                    </field>
87298                </fields>
87299            </register>
87300            <register>
87301                <name>INFO_CRC0</name>
87302                <addressOffset>0x000000d8</addressOffset>
87303                <description>Lower 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (polynomial 0x4c11db7, input reflected, output reflected, seed all-ones, final XOR all-ones) (ECC)</description>
87304                <resetMask>0x00000000</resetMask>
87305                <fields>
87306                    <field>
87307                        <name>INFO_CRC0</name>
87308                        <bitRange>[15:0]</bitRange>
87309                        <access>read-only</access>
87310                    </field>
87311                </fields>
87312            </register>
87313            <register>
87314                <name>INFO_CRC1</name>
87315                <addressOffset>0x000000dc</addressOffset>
87316                <description>Upper 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (ECC)</description>
87317                <resetMask>0x00000000</resetMask>
87318                <fields>
87319                    <field>
87320                        <name>INFO_CRC1</name>
87321                        <bitRange>[15:0]</bitRange>
87322                        <access>read-only</access>
87323                    </field>
87324                </fields>
87325            </register>
87326            <register>
87327                <name>CRIT0</name>
87328                <addressOffset>0x000000e0</addressOffset>
87329                <description>Page 0 critical boot flags (RBIT-8)</description>
87330                <resetValue>0x00000000</resetValue>
87331                <fields>
87332                    <field>
87333                        <name>RISCV_DISABLE</name>
87334                        <description>Permanently disable RISC-V processors (Hazard3)</description>
87335                        <bitRange>[1:1]</bitRange>
87336                        <access>read-only</access>
87337                    </field>
87338                    <field>
87339                        <name>ARM_DISABLE</name>
87340                        <description>Permanently disable ARM processors (Cortex-M33)</description>
87341                        <bitRange>[0:0]</bitRange>
87342                        <access>read-only</access>
87343                    </field>
87344                </fields>
87345            </register>
87346            <register>
87347                <name>CRIT0_R1</name>
87348                <addressOffset>0x000000e4</addressOffset>
87349                <description>Redundant copy of CRIT0</description>
87350                <resetMask>0x00000000</resetMask>
87351                <fields>
87352                    <field>
87353                        <name>CRIT0_R1</name>
87354                        <bitRange>[23:0]</bitRange>
87355                        <access>read-only</access>
87356                    </field>
87357                </fields>
87358            </register>
87359            <register>
87360                <name>CRIT0_R2</name>
87361                <addressOffset>0x000000e8</addressOffset>
87362                <description>Redundant copy of CRIT0</description>
87363                <resetMask>0x00000000</resetMask>
87364                <fields>
87365                    <field>
87366                        <name>CRIT0_R2</name>
87367                        <bitRange>[23:0]</bitRange>
87368                        <access>read-only</access>
87369                    </field>
87370                </fields>
87371            </register>
87372            <register>
87373                <name>CRIT0_R3</name>
87374                <addressOffset>0x000000ec</addressOffset>
87375                <description>Redundant copy of CRIT0</description>
87376                <resetMask>0x00000000</resetMask>
87377                <fields>
87378                    <field>
87379                        <name>CRIT0_R3</name>
87380                        <bitRange>[23:0]</bitRange>
87381                        <access>read-only</access>
87382                    </field>
87383                </fields>
87384            </register>
87385            <register>
87386                <name>CRIT0_R4</name>
87387                <addressOffset>0x000000f0</addressOffset>
87388                <description>Redundant copy of CRIT0</description>
87389                <resetMask>0x00000000</resetMask>
87390                <fields>
87391                    <field>
87392                        <name>CRIT0_R4</name>
87393                        <bitRange>[23:0]</bitRange>
87394                        <access>read-only</access>
87395                    </field>
87396                </fields>
87397            </register>
87398            <register>
87399                <name>CRIT0_R5</name>
87400                <addressOffset>0x000000f4</addressOffset>
87401                <description>Redundant copy of CRIT0</description>
87402                <resetMask>0x00000000</resetMask>
87403                <fields>
87404                    <field>
87405                        <name>CRIT0_R5</name>
87406                        <bitRange>[23:0]</bitRange>
87407                        <access>read-only</access>
87408                    </field>
87409                </fields>
87410            </register>
87411            <register>
87412                <name>CRIT0_R6</name>
87413                <addressOffset>0x000000f8</addressOffset>
87414                <description>Redundant copy of CRIT0</description>
87415                <resetMask>0x00000000</resetMask>
87416                <fields>
87417                    <field>
87418                        <name>CRIT0_R6</name>
87419                        <bitRange>[23:0]</bitRange>
87420                        <access>read-only</access>
87421                    </field>
87422                </fields>
87423            </register>
87424            <register>
87425                <name>CRIT0_R7</name>
87426                <addressOffset>0x000000fc</addressOffset>
87427                <description>Redundant copy of CRIT0</description>
87428                <resetMask>0x00000000</resetMask>
87429                <fields>
87430                    <field>
87431                        <name>CRIT0_R7</name>
87432                        <bitRange>[23:0]</bitRange>
87433                        <access>read-only</access>
87434                    </field>
87435                </fields>
87436            </register>
87437            <register>
87438                <name>CRIT1</name>
87439                <addressOffset>0x00000100</addressOffset>
87440                <description>Page 1 critical boot flags (RBIT-8)</description>
87441                <resetValue>0x00000000</resetValue>
87442                <fields>
87443                    <field>
87444                        <name>GLITCH_DETECTOR_SENS</name>
87445                        <description>Increase the sensitivity of the glitch detectors from their default.</description>
87446                        <bitRange>[6:5]</bitRange>
87447                        <access>read-only</access>
87448                    </field>
87449                    <field>
87450                        <name>GLITCH_DETECTOR_ENABLE</name>
87451                        <description>Arm the glitch detectors to reset the system if an abnormal clock/power event is observed.</description>
87452                        <bitRange>[4:4]</bitRange>
87453                        <access>read-only</access>
87454                    </field>
87455                    <field>
87456                        <name>BOOT_ARCH</name>
87457                        <description>Set the default boot architecture, 0=ARM 1=RISC-V. Ignored if ARM_DISABLE, RISCV_DISABLE or SECURE_BOOT_ENABLE is set.</description>
87458                        <bitRange>[3:3]</bitRange>
87459                        <access>read-only</access>
87460                    </field>
87461                    <field>
87462                        <name>DEBUG_DISABLE</name>
87463                        <description>Disable all debug access</description>
87464                        <bitRange>[2:2]</bitRange>
87465                        <access>read-only</access>
87466                    </field>
87467                    <field>
87468                        <name>SECURE_DEBUG_DISABLE</name>
87469                        <description>Disable Secure debug access</description>
87470                        <bitRange>[1:1]</bitRange>
87471                        <access>read-only</access>
87472                    </field>
87473                    <field>
87474                        <name>SECURE_BOOT_ENABLE</name>
87475                        <description>Enable boot signature enforcement, and permanently disable the RISC-V cores.</description>
87476                        <bitRange>[0:0]</bitRange>
87477                        <access>read-only</access>
87478                    </field>
87479                </fields>
87480            </register>
87481            <register>
87482                <name>CRIT1_R1</name>
87483                <addressOffset>0x00000104</addressOffset>
87484                <description>Redundant copy of CRIT1</description>
87485                <resetMask>0x00000000</resetMask>
87486                <fields>
87487                    <field>
87488                        <name>CRIT1_R1</name>
87489                        <bitRange>[23:0]</bitRange>
87490                        <access>read-only</access>
87491                    </field>
87492                </fields>
87493            </register>
87494            <register>
87495                <name>CRIT1_R2</name>
87496                <addressOffset>0x00000108</addressOffset>
87497                <description>Redundant copy of CRIT1</description>
87498                <resetMask>0x00000000</resetMask>
87499                <fields>
87500                    <field>
87501                        <name>CRIT1_R2</name>
87502                        <bitRange>[23:0]</bitRange>
87503                        <access>read-only</access>
87504                    </field>
87505                </fields>
87506            </register>
87507            <register>
87508                <name>CRIT1_R3</name>
87509                <addressOffset>0x0000010c</addressOffset>
87510                <description>Redundant copy of CRIT1</description>
87511                <resetMask>0x00000000</resetMask>
87512                <fields>
87513                    <field>
87514                        <name>CRIT1_R3</name>
87515                        <bitRange>[23:0]</bitRange>
87516                        <access>read-only</access>
87517                    </field>
87518                </fields>
87519            </register>
87520            <register>
87521                <name>CRIT1_R4</name>
87522                <addressOffset>0x00000110</addressOffset>
87523                <description>Redundant copy of CRIT1</description>
87524                <resetMask>0x00000000</resetMask>
87525                <fields>
87526                    <field>
87527                        <name>CRIT1_R4</name>
87528                        <bitRange>[23:0]</bitRange>
87529                        <access>read-only</access>
87530                    </field>
87531                </fields>
87532            </register>
87533            <register>
87534                <name>CRIT1_R5</name>
87535                <addressOffset>0x00000114</addressOffset>
87536                <description>Redundant copy of CRIT1</description>
87537                <resetMask>0x00000000</resetMask>
87538                <fields>
87539                    <field>
87540                        <name>CRIT1_R5</name>
87541                        <bitRange>[23:0]</bitRange>
87542                        <access>read-only</access>
87543                    </field>
87544                </fields>
87545            </register>
87546            <register>
87547                <name>CRIT1_R6</name>
87548                <addressOffset>0x00000118</addressOffset>
87549                <description>Redundant copy of CRIT1</description>
87550                <resetMask>0x00000000</resetMask>
87551                <fields>
87552                    <field>
87553                        <name>CRIT1_R6</name>
87554                        <bitRange>[23:0]</bitRange>
87555                        <access>read-only</access>
87556                    </field>
87557                </fields>
87558            </register>
87559            <register>
87560                <name>CRIT1_R7</name>
87561                <addressOffset>0x0000011c</addressOffset>
87562                <description>Redundant copy of CRIT1</description>
87563                <resetMask>0x00000000</resetMask>
87564                <fields>
87565                    <field>
87566                        <name>CRIT1_R7</name>
87567                        <bitRange>[23:0]</bitRange>
87568                        <access>read-only</access>
87569                    </field>
87570                </fields>
87571            </register>
87572            <register>
87573                <name>BOOT_FLAGS0</name>
87574                <addressOffset>0x00000120</addressOffset>
87575                <description>Disable/Enable boot paths/features in the RP2350 mask ROM. Disables always supersede enables. Enables are provided where there are other configurations in OTP that must be valid. (RBIT-3)</description>
87576                <resetValue>0x00000000</resetValue>
87577                <fields>
87578                    <field>
87579                        <name>DISABLE_SRAM_WINDOW_BOOT</name>
87580                        <bitRange>[21:21]</bitRange>
87581                        <access>read-only</access>
87582                    </field>
87583                    <field>
87584                        <name>DISABLE_XIP_ACCESS_ON_SRAM_ENTRY</name>
87585                        <description>Disable all access to XIP after entering an SRAM binary.
87586
87587                            Note that this will cause bootrom APIs that access XIP to fail, including APIs that interact with the partition table.</description>
87588                        <bitRange>[20:20]</bitRange>
87589                        <access>read-only</access>
87590                    </field>
87591                    <field>
87592                        <name>DISABLE_BOOTSEL_UART_BOOT</name>
87593                        <bitRange>[19:19]</bitRange>
87594                        <access>read-only</access>
87595                    </field>
87596                    <field>
87597                        <name>DISABLE_BOOTSEL_USB_PICOBOOT_IFC</name>
87598                        <bitRange>[18:18]</bitRange>
87599                        <access>read-only</access>
87600                    </field>
87601                    <field>
87602                        <name>DISABLE_BOOTSEL_USB_MSD_IFC</name>
87603                        <bitRange>[17:17]</bitRange>
87604                        <access>read-only</access>
87605                    </field>
87606                    <field>
87607                        <name>DISABLE_WATCHDOG_SCRATCH</name>
87608                        <bitRange>[16:16]</bitRange>
87609                        <access>read-only</access>
87610                    </field>
87611                    <field>
87612                        <name>DISABLE_POWER_SCRATCH</name>
87613                        <bitRange>[15:15]</bitRange>
87614                        <access>read-only</access>
87615                    </field>
87616                    <field>
87617                        <name>ENABLE_OTP_BOOT</name>
87618                        <description>Enable OTP boot. A number of OTP rows specified by OTPBOOT_LEN will be loaded, starting from OTPBOOT_SRC, into the SRAM location specified by OTPBOOT_DST1 and OTPBOOT_DST0.
87619
87620                            The loaded program image is stored with ECC, 16 bits per row, and must contain a valid IMAGE_DEF. Do not set this bit without first programming an image into OTP and configuring OTPBOOT_LEN, OTPBOOT_SRC, OTPBOOT_DST0 and OTPBOOT_DST1.
87621
87622                            Note that OTPBOOT_LEN and OTPBOOT_SRC must be even numbers of OTP rows. Equivalently, the image must be a multiple of 32 bits in size, and must start at a 32-bit-aligned address in the ECC read data address window.</description>
87623                        <bitRange>[14:14]</bitRange>
87624                        <access>read-only</access>
87625                    </field>
87626                    <field>
87627                        <name>DISABLE_OTP_BOOT</name>
87628                        <description>Takes precedence over ENABLE_OTP_BOOT.</description>
87629                        <bitRange>[13:13]</bitRange>
87630                        <access>read-only</access>
87631                    </field>
87632                    <field>
87633                        <name>DISABLE_FLASH_BOOT</name>
87634                        <bitRange>[12:12]</bitRange>
87635                        <access>read-only</access>
87636                    </field>
87637                    <field>
87638                        <name>ROLLBACK_REQUIRED</name>
87639                        <description>Require binaries to have a rollback version. Set automatically the first time a binary with a rollback version is booted.</description>
87640                        <bitRange>[11:11]</bitRange>
87641                        <access>read-only</access>
87642                    </field>
87643                    <field>
87644                        <name>HASHED_PARTITION_TABLE</name>
87645                        <description>Require a partition table to be hashed (if not signed)</description>
87646                        <bitRange>[10:10]</bitRange>
87647                        <access>read-only</access>
87648                    </field>
87649                    <field>
87650                        <name>SECURE_PARTITION_TABLE</name>
87651                        <description>Require a partition table to be signed</description>
87652                        <bitRange>[9:9]</bitRange>
87653                        <access>read-only</access>
87654                    </field>
87655                    <field>
87656                        <name>DISABLE_AUTO_SWITCH_ARCH</name>
87657                        <description>Disable auto-switch of CPU architecture on boot when the (only) binary to be booted is for the other Arm/RISC-V architecture and both architectures are enabled</description>
87658                        <bitRange>[8:8]</bitRange>
87659                        <access>read-only</access>
87660                    </field>
87661                    <field>
87662                        <name>SINGLE_FLASH_BINARY</name>
87663                        <description>Restrict flash boot path to use of a single binary at the start of flash</description>
87664                        <bitRange>[7:7]</bitRange>
87665                        <access>read-only</access>
87666                    </field>
87667                    <field>
87668                        <name>OVERRIDE_FLASH_PARTITION_SLOT_SIZE</name>
87669                        <description>Override the limit for default flash metadata scanning.
87670
87671                            The value is specified in FLASH_PARTITION_SLOT_SIZE. Make sure FLASH_PARTITION_SLOT_SIZE is valid before setting this bit</description>
87672                        <bitRange>[6:6]</bitRange>
87673                        <access>read-only</access>
87674                    </field>
87675                    <field>
87676                        <name>FLASH_DEVINFO_ENABLE</name>
87677                        <description>Mark FLASH_DEVINFO as containing valid, ECC&#39;d data which describes external flash devices.</description>
87678                        <bitRange>[5:5]</bitRange>
87679                        <access>read-only</access>
87680                    </field>
87681                    <field>
87682                        <name>FAST_SIGCHECK_ROSC_DIV</name>
87683                        <description>Enable quartering of ROSC divisor during signature check, to reduce secure boot time</description>
87684                        <bitRange>[4:4]</bitRange>
87685                        <access>read-only</access>
87686                    </field>
87687                    <field>
87688                        <name>FLASH_IO_VOLTAGE_1V8</name>
87689                        <description>If 1, configure the QSPI pads for 1.8 V operation when accessing flash for the first time from the bootrom, using the VOLTAGE_SELECT register for the QSPI pads bank. This slightly improves the input timing of the pads at low voltages, but does not affect their output characteristics.
87690
87691                            If 0, leave VOLTAGE_SELECT in its reset state (suitable for operation at and above 2.5 V)</description>
87692                        <bitRange>[3:3]</bitRange>
87693                        <access>read-only</access>
87694                    </field>
87695                    <field>
87696                        <name>ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG</name>
87697                        <description>Enable loading of the non-default XOSC and PLL configuration before entering BOOTSEL mode.
87698
87699                            Ensure that BOOTSEL_XOSC_CFG and BOOTSEL_PLL_CFG are correctly programmed before setting this bit.
87700
87701                            If this bit is set, user software may use the contents of BOOTSEL_PLL_CFG to calculated the expected XOSC frequency based on the fixed USB boot frequency of 48 MHz.</description>
87702                        <bitRange>[2:2]</bitRange>
87703                        <access>read-only</access>
87704                    </field>
87705                    <field>
87706                        <name>ENABLE_BOOTSEL_LED</name>
87707                        <description>Enable bootloader activity LED. If set, bootsel_led_cfg is assumed to be valid</description>
87708                        <bitRange>[1:1]</bitRange>
87709                        <access>read-only</access>
87710                    </field>
87711                    <field>
87712                        <name>DISABLE_BOOTSEL_EXEC2</name>
87713                        <bitRange>[0:0]</bitRange>
87714                        <access>read-only</access>
87715                    </field>
87716                </fields>
87717            </register>
87718            <register>
87719                <name>BOOT_FLAGS0_R1</name>
87720                <addressOffset>0x00000124</addressOffset>
87721                <description>Redundant copy of BOOT_FLAGS0</description>
87722                <resetMask>0x00000000</resetMask>
87723                <fields>
87724                    <field>
87725                        <name>BOOT_FLAGS0_R1</name>
87726                        <bitRange>[23:0]</bitRange>
87727                        <access>read-only</access>
87728                    </field>
87729                </fields>
87730            </register>
87731            <register>
87732                <name>BOOT_FLAGS0_R2</name>
87733                <addressOffset>0x00000128</addressOffset>
87734                <description>Redundant copy of BOOT_FLAGS0</description>
87735                <resetMask>0x00000000</resetMask>
87736                <fields>
87737                    <field>
87738                        <name>BOOT_FLAGS0_R2</name>
87739                        <bitRange>[23:0]</bitRange>
87740                        <access>read-only</access>
87741                    </field>
87742                </fields>
87743            </register>
87744            <register>
87745                <name>BOOT_FLAGS1</name>
87746                <addressOffset>0x0000012c</addressOffset>
87747                <description>Disable/Enable boot paths/features in the RP2350 mask ROM. Disables always supersede enables. Enables are provided where there are other configurations in OTP that must be valid. (RBIT-3)</description>
87748                <resetValue>0x00000000</resetValue>
87749                <fields>
87750                    <field>
87751                        <name>DOUBLE_TAP</name>
87752                        <description>Enable entering BOOTSEL mode via double-tap of the RUN/RSTn pin. Adds a significant delay to boot time, as configured by DOUBLE_TAP_DELAY.
87753
87754                            This functions by waiting at startup (i.e. following a reset) to see if a second reset is applied soon afterward. The second reset is detected by the bootrom with help of the POWMAN_CHIP_RESET_DOUBLE_TAP flag, which is not reset by the external reset pin, and the bootrom enters BOOTSEL mode (NSBOOT) to await further instruction over USB or UART.</description>
87755                        <bitRange>[19:19]</bitRange>
87756                        <access>read-only</access>
87757                    </field>
87758                    <field>
87759                        <name>DOUBLE_TAP_DELAY</name>
87760                        <description>Adjust how long to wait for a second reset when double tap BOOTSEL mode is enabled via DOUBLE_TAP. The minimum is 50 milliseconds, and each unit of this field adds an additional 50 milliseconds.
87761
87762                            For example, settings this field to its maximum value of 7 will cause the chip to wait for 400 milliseconds at boot to check for a second reset which requests entry to BOOTSEL mode.
87763
87764                            200 milliseconds (DOUBLE_TAP_DELAY=3) is a good intermediate value.</description>
87765                        <bitRange>[18:16]</bitRange>
87766                        <access>read-only</access>
87767                    </field>
87768                    <field>
87769                        <name>KEY_INVALID</name>
87770                        <description>Mark a boot key as invalid, or prevent it from ever becoming valid. The bootrom will ignore any boot key marked as invalid during secure boot signature checks.
87771
87772                            Each bit in this field corresponds to one of the four 256-bit boot key hashes that may be stored in page 2 of the OTP.
87773
87774                            When provisioning boot keys, it&#39;s recommended to mark any boot key slots you don&#39;t intend to use as KEY_INVALID, so that spurious keys can not be installed at a later time.</description>
87775                        <bitRange>[11:8]</bitRange>
87776                        <access>read-only</access>
87777                    </field>
87778                    <field>
87779                        <name>KEY_VALID</name>
87780                        <description>Mark each of the possible boot keys as valid. The bootrom will check signatures against all valid boot keys, and ignore invalid boot keys.
87781
87782                            Each bit in this field corresponds to one of the four 256-bit boot key hashes that may be stored in page 2 of the OTP.
87783
87784                            A KEY_VALID bit is ignored if the corresponding KEY_INVALID bit is set. Boot keys are considered valid only when KEY_VALID is set and KEY_INVALID is clear.
87785
87786                            Do not mark a boot key as KEY_VALID if it does not contain a valid SHA-256 hash of your secp256k1 public key. Verify keys after programming, before setting the KEY_VALID bits -- a boot key with uncorrectable ECC faults will render your device unbootable if secure boot is enabled.
87787
87788                            Do not enable secure boot without first installing a valid key. This will render your device unbootable.</description>
87789                        <bitRange>[3:0]</bitRange>
87790                        <access>read-only</access>
87791                    </field>
87792                </fields>
87793            </register>
87794            <register>
87795                <name>BOOT_FLAGS1_R1</name>
87796                <addressOffset>0x00000130</addressOffset>
87797                <description>Redundant copy of BOOT_FLAGS1</description>
87798                <resetMask>0x00000000</resetMask>
87799                <fields>
87800                    <field>
87801                        <name>BOOT_FLAGS1_R1</name>
87802                        <bitRange>[23:0]</bitRange>
87803                        <access>read-only</access>
87804                    </field>
87805                </fields>
87806            </register>
87807            <register>
87808                <name>BOOT_FLAGS1_R2</name>
87809                <addressOffset>0x00000134</addressOffset>
87810                <description>Redundant copy of BOOT_FLAGS1</description>
87811                <resetMask>0x00000000</resetMask>
87812                <fields>
87813                    <field>
87814                        <name>BOOT_FLAGS1_R2</name>
87815                        <bitRange>[23:0]</bitRange>
87816                        <access>read-only</access>
87817                    </field>
87818                </fields>
87819            </register>
87820            <register>
87821                <name>DEFAULT_BOOT_VERSION0</name>
87822                <addressOffset>0x00000138</addressOffset>
87823                <description>Default boot version thermometer counter, bits 23:0 (RBIT-3)</description>
87824                <resetMask>0x00000000</resetMask>
87825                <fields>
87826                    <field>
87827                        <name>DEFAULT_BOOT_VERSION0</name>
87828                        <bitRange>[23:0]</bitRange>
87829                        <access>read-only</access>
87830                    </field>
87831                </fields>
87832            </register>
87833            <register>
87834                <name>DEFAULT_BOOT_VERSION0_R1</name>
87835                <addressOffset>0x0000013c</addressOffset>
87836                <description>Redundant copy of DEFAULT_BOOT_VERSION0</description>
87837                <resetMask>0x00000000</resetMask>
87838                <fields>
87839                    <field>
87840                        <name>DEFAULT_BOOT_VERSION0_R1</name>
87841                        <bitRange>[23:0]</bitRange>
87842                        <access>read-only</access>
87843                    </field>
87844                </fields>
87845            </register>
87846            <register>
87847                <name>DEFAULT_BOOT_VERSION0_R2</name>
87848                <addressOffset>0x00000140</addressOffset>
87849                <description>Redundant copy of DEFAULT_BOOT_VERSION0</description>
87850                <resetMask>0x00000000</resetMask>
87851                <fields>
87852                    <field>
87853                        <name>DEFAULT_BOOT_VERSION0_R2</name>
87854                        <bitRange>[23:0]</bitRange>
87855                        <access>read-only</access>
87856                    </field>
87857                </fields>
87858            </register>
87859            <register>
87860                <name>DEFAULT_BOOT_VERSION1</name>
87861                <addressOffset>0x00000144</addressOffset>
87862                <description>Default boot version thermometer counter, bits 47:24 (RBIT-3)</description>
87863                <resetMask>0x00000000</resetMask>
87864                <fields>
87865                    <field>
87866                        <name>DEFAULT_BOOT_VERSION1</name>
87867                        <bitRange>[23:0]</bitRange>
87868                        <access>read-only</access>
87869                    </field>
87870                </fields>
87871            </register>
87872            <register>
87873                <name>DEFAULT_BOOT_VERSION1_R1</name>
87874                <addressOffset>0x00000148</addressOffset>
87875                <description>Redundant copy of DEFAULT_BOOT_VERSION1</description>
87876                <resetMask>0x00000000</resetMask>
87877                <fields>
87878                    <field>
87879                        <name>DEFAULT_BOOT_VERSION1_R1</name>
87880                        <bitRange>[23:0]</bitRange>
87881                        <access>read-only</access>
87882                    </field>
87883                </fields>
87884            </register>
87885            <register>
87886                <name>DEFAULT_BOOT_VERSION1_R2</name>
87887                <addressOffset>0x0000014c</addressOffset>
87888                <description>Redundant copy of DEFAULT_BOOT_VERSION1</description>
87889                <resetMask>0x00000000</resetMask>
87890                <fields>
87891                    <field>
87892                        <name>DEFAULT_BOOT_VERSION1_R2</name>
87893                        <bitRange>[23:0]</bitRange>
87894                        <access>read-only</access>
87895                    </field>
87896                </fields>
87897            </register>
87898            <register>
87899                <name>FLASH_DEVINFO</name>
87900                <addressOffset>0x00000150</addressOffset>
87901                <description>Stores information about external flash device(s). (ECC)
87902
87903                    Assumed to be valid if BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is set.</description>
87904                <resetValue>0x00000000</resetValue>
87905                <fields>
87906                    <field>
87907                        <name>CS1_SIZE</name>
87908                        <description>The size of the flash/PSRAM device on chip select 1 (addressable at 0x11000000 through 0x11ffffff).
87909
87910                            A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB &lt;&lt; CS1_SIZE. For example, four megabytes is encoded with a CS1_SIZE value of 10, and 16 megabytes is encoded with a CS1_SIZE value of 12.
87911
87912                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of zero is used.</description>
87913                        <bitRange>[15:12]</bitRange>
87914                        <access>read-only</access>
87915                        <enumeratedValues>
87916                            <enumeratedValue>
87917                                <name>NONE</name>
87918                                <value>0</value>
87919                            </enumeratedValue>
87920                            <enumeratedValue>
87921                                <name>8K</name>
87922                                <value>1</value>
87923                            </enumeratedValue>
87924                            <enumeratedValue>
87925                                <name>16K</name>
87926                                <value>2</value>
87927                            </enumeratedValue>
87928                            <enumeratedValue>
87929                                <name>32K</name>
87930                                <value>3</value>
87931                            </enumeratedValue>
87932                            <enumeratedValue>
87933                                <name>64k</name>
87934                                <value>4</value>
87935                            </enumeratedValue>
87936                            <enumeratedValue>
87937                                <name>128K</name>
87938                                <value>5</value>
87939                            </enumeratedValue>
87940                            <enumeratedValue>
87941                                <name>256K</name>
87942                                <value>6</value>
87943                            </enumeratedValue>
87944                            <enumeratedValue>
87945                                <name>512K</name>
87946                                <value>7</value>
87947                            </enumeratedValue>
87948                            <enumeratedValue>
87949                                <name>1M</name>
87950                                <value>8</value>
87951                            </enumeratedValue>
87952                            <enumeratedValue>
87953                                <name>2M</name>
87954                                <value>9</value>
87955                            </enumeratedValue>
87956                            <enumeratedValue>
87957                                <name>4M</name>
87958                                <value>10</value>
87959                            </enumeratedValue>
87960                            <enumeratedValue>
87961                                <name>8M</name>
87962                                <value>11</value>
87963                            </enumeratedValue>
87964                            <enumeratedValue>
87965                                <name>16M</name>
87966                                <value>12</value>
87967                            </enumeratedValue>
87968                        </enumeratedValues>
87969                    </field>
87970                    <field>
87971                        <name>CS0_SIZE</name>
87972                        <description>The size of the flash/PSRAM device on chip select 0 (addressable at 0x10000000 through 0x10ffffff).
87973
87974                            A value of zero is decoded as a size of zero (no device). Nonzero values are decoded as 4kiB &lt;&lt; CS0_SIZE. For example, four megabytes is encoded with a CS0_SIZE value of 10, and 16 megabytes is encoded with a CS0_SIZE value of 12.
87975
87976                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, a default of 12 (16 MiB) is used.</description>
87977                        <bitRange>[11:8]</bitRange>
87978                        <access>read-only</access>
87979                        <enumeratedValues>
87980                            <enumeratedValue>
87981                                <name>NONE</name>
87982                                <value>0</value>
87983                            </enumeratedValue>
87984                            <enumeratedValue>
87985                                <name>8K</name>
87986                                <value>1</value>
87987                            </enumeratedValue>
87988                            <enumeratedValue>
87989                                <name>16K</name>
87990                                <value>2</value>
87991                            </enumeratedValue>
87992                            <enumeratedValue>
87993                                <name>32K</name>
87994                                <value>3</value>
87995                            </enumeratedValue>
87996                            <enumeratedValue>
87997                                <name>64k</name>
87998                                <value>4</value>
87999                            </enumeratedValue>
88000                            <enumeratedValue>
88001                                <name>128K</name>
88002                                <value>5</value>
88003                            </enumeratedValue>
88004                            <enumeratedValue>
88005                                <name>256K</name>
88006                                <value>6</value>
88007                            </enumeratedValue>
88008                            <enumeratedValue>
88009                                <name>512K</name>
88010                                <value>7</value>
88011                            </enumeratedValue>
88012                            <enumeratedValue>
88013                                <name>1M</name>
88014                                <value>8</value>
88015                            </enumeratedValue>
88016                            <enumeratedValue>
88017                                <name>2M</name>
88018                                <value>9</value>
88019                            </enumeratedValue>
88020                            <enumeratedValue>
88021                                <name>4M</name>
88022                                <value>10</value>
88023                            </enumeratedValue>
88024                            <enumeratedValue>
88025                                <name>8M</name>
88026                                <value>11</value>
88027                            </enumeratedValue>
88028                            <enumeratedValue>
88029                                <name>16M</name>
88030                                <value>12</value>
88031                            </enumeratedValue>
88032                        </enumeratedValues>
88033                    </field>
88034                    <field>
88035                        <name>D8H_ERASE_SUPPORTED</name>
88036                        <description>If true, all attached devices are assumed to support (or ignore, in the case of PSRAM) a block erase command with a command prefix of D8h, an erase size of 64 kiB, and a 24-bit address. Almost all 25-series flash devices support this command.
88037
88038                            If set, the bootrom will use the D8h erase command where it is able, to accelerate bulk erase operations. This makes flash programming faster.
88039
88040                            When BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is not set, this field defaults to false.</description>
88041                        <bitRange>[7:7]</bitRange>
88042                        <access>read-only</access>
88043                    </field>
88044                    <field>
88045                        <name>CS1_GPIO</name>
88046                        <description>Indicate a GPIO number to be used for the secondary flash chip select (CS1), which selects the external QSPI device mapped at system addresses 0x11000000 through 0x11ffffff. There is no such configuration for CS0, as the primary chip select has a dedicated pin.
88047
88048                            On RP2350 the permissible GPIO numbers are 0, 8, 19 and 47.
88049
88050                            Ignored if CS1_size is zero. If CS1_SIZE is nonzero, the bootrom will automatically configure this GPIO as a second chip select upon entering the flash boot path, or entering any other path that may use the QSPI flash interface, such as BOOTSEL mode (nsboot).</description>
88051                        <bitRange>[5:0]</bitRange>
88052                        <access>read-only</access>
88053                    </field>
88054                </fields>
88055            </register>
88056            <register>
88057                <name>FLASH_PARTITION_SLOT_SIZE</name>
88058                <addressOffset>0x00000154</addressOffset>
88059                <description>Gap between partition table slot 0 and slot 1 at the start of flash (the default size is 4096 bytes) (ECC) Enabled by the OVERRIDE_FLASH_PARTITION_SLOT_SIZE bit in BOOT_FLAGS, the size is 4096 * (value + 1)</description>
88060                <resetMask>0x00000000</resetMask>
88061                <fields>
88062                    <field>
88063                        <name>FLASH_PARTITION_SLOT_SIZE</name>
88064                        <bitRange>[15:0]</bitRange>
88065                        <access>read-only</access>
88066                    </field>
88067                </fields>
88068            </register>
88069            <register>
88070                <name>BOOTSEL_LED_CFG</name>
88071                <addressOffset>0x00000158</addressOffset>
88072                <description>Pin configuration for LED status, used by USB bootloader. (ECC)
88073                    Must be valid if BOOT_FLAGS0_ENABLE_BOOTSEL_LED is set.</description>
88074                <resetValue>0x00000000</resetValue>
88075                <fields>
88076                    <field>
88077                        <name>ACTIVELOW</name>
88078                        <description>LED is active-low. (Default: active-high.)</description>
88079                        <bitRange>[8:8]</bitRange>
88080                        <access>read-only</access>
88081                    </field>
88082                    <field>
88083                        <name>PIN</name>
88084                        <description>GPIO index to use for bootloader activity LED.</description>
88085                        <bitRange>[5:0]</bitRange>
88086                        <access>read-only</access>
88087                    </field>
88088                </fields>
88089            </register>
88090            <register>
88091                <name>BOOTSEL_PLL_CFG</name>
88092                <addressOffset>0x0000015c</addressOffset>
88093                <description>Optional PLL configuration for BOOTSEL mode. (ECC)
88094
88095                    This should be configured to produce an exact 48 MHz based on the crystal oscillator frequency. User mode software may also use this value to calculate the expected crystal frequency based on an assumed 48 MHz PLL output.
88096
88097                    If no configuration is given, the crystal is assumed to be 12 MHz.
88098
88099                    The PLL frequency can be calculated as:
88100
88101                    PLL out = (XOSC frequency / (REFDIV+1)) x FBDIV / (POSTDIV1 x POSTDIV2)
88102
88103                    Conversely the crystal frequency can be calculated as:
88104
88105                    XOSC frequency = 48 MHz x (REFDIV+1) x (POSTDIV1 x POSTDIV2) / FBDIV
88106
88107                    (Note the  +1 on REFDIV is because the value stored in this OTP location is the actual divisor value minus one.)
88108
88109                    Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_XOSC_CFG are both correctly programmed.</description>
88110                <resetValue>0x00000000</resetValue>
88111                <fields>
88112                    <field>
88113                        <name>REFDIV</name>
88114                        <description>PLL reference divisor, minus one.
88115
88116                            Programming a value of 0 means a reference divisor of 1. Programming a value of 1 means a reference divisor of 2 (for exceptionally fast XIN inputs)</description>
88117                        <bitRange>[15:15]</bitRange>
88118                        <access>read-only</access>
88119                    </field>
88120                    <field>
88121                        <name>POSTDIV2</name>
88122                        <description>PLL post-divide 2 divisor, in the range 1..7 inclusive.</description>
88123                        <bitRange>[14:12]</bitRange>
88124                        <access>read-only</access>
88125                    </field>
88126                    <field>
88127                        <name>POSTDIV1</name>
88128                        <description>PLL post-divide 1 divisor, in the range 1..7 inclusive.</description>
88129                        <bitRange>[11:9]</bitRange>
88130                        <access>read-only</access>
88131                    </field>
88132                    <field>
88133                        <name>FBDIV</name>
88134                        <description>PLL feedback divisor, in the range 16..320 inclusive.</description>
88135                        <bitRange>[8:0]</bitRange>
88136                        <access>read-only</access>
88137                    </field>
88138                </fields>
88139            </register>
88140            <register>
88141                <name>BOOTSEL_XOSC_CFG</name>
88142                <addressOffset>0x00000160</addressOffset>
88143                <description>Non-default crystal oscillator configuration for the USB bootloader. (ECC)
88144
88145                    These values may also be used by user code configuring the crystal oscillator.
88146
88147                    Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_PLL_CFG are both correctly programmed.</description>
88148                <resetValue>0x00000000</resetValue>
88149                <fields>
88150                    <field>
88151                        <name>RANGE</name>
88152                        <description>Value of the XOSC_CTRL_FREQ_RANGE register.</description>
88153                        <bitRange>[15:14]</bitRange>
88154                        <access>read-only</access>
88155                        <enumeratedValues>
88156                            <enumeratedValue>
88157                                <name>1_15MHZ</name>
88158                                <value>0</value>
88159                            </enumeratedValue>
88160                            <enumeratedValue>
88161                                <name>10_30MHZ</name>
88162                                <value>1</value>
88163                            </enumeratedValue>
88164                            <enumeratedValue>
88165                                <name>25_60MHZ</name>
88166                                <value>2</value>
88167                            </enumeratedValue>
88168                            <enumeratedValue>
88169                                <name>40_100MHZ</name>
88170                                <value>3</value>
88171                            </enumeratedValue>
88172                        </enumeratedValues>
88173                    </field>
88174                    <field>
88175                        <name>STARTUP</name>
88176                        <description>Value of the XOSC_STARTUP register</description>
88177                        <bitRange>[13:0]</bitRange>
88178                        <access>read-only</access>
88179                    </field>
88180                </fields>
88181            </register>
88182            <register>
88183                <name>USB_BOOT_FLAGS</name>
88184                <addressOffset>0x00000164</addressOffset>
88185                <description>USB boot specific feature flags (RBIT-3)</description>
88186                <resetValue>0x00000000</resetValue>
88187                <fields>
88188                    <field>
88189                        <name>DP_DM_SWAP</name>
88190                        <description>Swap DM/DP during USB boot, to support board layouts with mirrored USB routing (deliberate or accidental).</description>
88191                        <bitRange>[23:23]</bitRange>
88192                        <access>read-only</access>
88193                    </field>
88194                    <field>
88195                        <name>WHITE_LABEL_ADDR_VALID</name>
88196                        <description>valid flag for INFO_UF2_TXT_BOARD_ID_STRDEF entry of the USB_WHITE_LABEL struct (index 15)</description>
88197                        <bitRange>[22:22]</bitRange>
88198                        <access>read-only</access>
88199                    </field>
88200                    <field>
88201                        <name>WL_INFO_UF2_TXT_BOARD_ID_STRDEF_VALID</name>
88202                        <description>valid flag for the USB_WHITE_LABEL_ADDR field</description>
88203                        <bitRange>[15:15]</bitRange>
88204                        <access>read-only</access>
88205                    </field>
88206                    <field>
88207                        <name>WL_INFO_UF2_TXT_MODEL_STRDEF_VALID</name>
88208                        <description>valid flag for INFO_UF2_TXT_MODEL_STRDEF entry of the USB_WHITE_LABEL struct (index 14)</description>
88209                        <bitRange>[14:14]</bitRange>
88210                        <access>read-only</access>
88211                    </field>
88212                    <field>
88213                        <name>WL_INDEX_HTM_REDIRECT_NAME_STRDEF_VALID</name>
88214                        <description>valid flag for INDEX_HTM_REDIRECT_NAME_STRDEF entry of the USB_WHITE_LABEL struct (index 13)</description>
88215                        <bitRange>[13:13]</bitRange>
88216                        <access>read-only</access>
88217                    </field>
88218                    <field>
88219                        <name>WL_INDEX_HTM_REDIRECT_URL_STRDEF_VALID</name>
88220                        <description>valid flag for INDEX_HTM_REDIRECT_URL_STRDEF entry of the USB_WHITE_LABEL struct (index 12)</description>
88221                        <bitRange>[12:12]</bitRange>
88222                        <access>read-only</access>
88223                    </field>
88224                    <field>
88225                        <name>WL_SCSI_INQUIRY_VERSION_STRDEF_VALID</name>
88226                        <description>valid flag for SCSI_INQUIRY_VERSION_STRDEF entry of the USB_WHITE_LABEL struct (index 11)</description>
88227                        <bitRange>[11:11]</bitRange>
88228                        <access>read-only</access>
88229                    </field>
88230                    <field>
88231                        <name>WL_SCSI_INQUIRY_PRODUCT_STRDEF_VALID</name>
88232                        <description>valid flag for SCSI_INQUIRY_PRODUCT_STRDEF entry of the USB_WHITE_LABEL struct (index 10)</description>
88233                        <bitRange>[10:10]</bitRange>
88234                        <access>read-only</access>
88235                    </field>
88236                    <field>
88237                        <name>WL_SCSI_INQUIRY_VENDOR_STRDEF_VALID</name>
88238                        <description>valid flag for SCSI_INQUIRY_VENDOR_STRDEF entry of the USB_WHITE_LABEL struct (index 9)</description>
88239                        <bitRange>[9:9]</bitRange>
88240                        <access>read-only</access>
88241                    </field>
88242                    <field>
88243                        <name>WL_VOLUME_LABEL_STRDEF_VALID</name>
88244                        <description>valid flag for VOLUME_LABEL_STRDEF entry of the USB_WHITE_LABEL struct (index 8)</description>
88245                        <bitRange>[8:8]</bitRange>
88246                        <access>read-only</access>
88247                    </field>
88248                    <field>
88249                        <name>WL_USB_CONFIG_ATTRIBUTES_MAX_POWER_VALUES_VALID</name>
88250                        <description>valid flag for USB_CONFIG_ATTRIBUTES_MAX_POWER_VALUES entry of the USB_WHITE_LABEL struct (index 7)</description>
88251                        <bitRange>[7:7]</bitRange>
88252                        <access>read-only</access>
88253                    </field>
88254                    <field>
88255                        <name>WL_USB_DEVICE_SERIAL_NUMBER_STRDEF_VALID</name>
88256                        <description>valid flag for USB_DEVICE_SERIAL_NUMBER_STRDEF entry of the USB_WHITE_LABEL struct (index 6)</description>
88257                        <bitRange>[6:6]</bitRange>
88258                        <access>read-only</access>
88259                    </field>
88260                    <field>
88261                        <name>WL_USB_DEVICE_PRODUCT_STRDEF_VALID</name>
88262                        <description>valid flag for USB_DEVICE_PRODUCT_STRDEF entry of the USB_WHITE_LABEL struct (index 5)</description>
88263                        <bitRange>[5:5]</bitRange>
88264                        <access>read-only</access>
88265                    </field>
88266                    <field>
88267                        <name>WL_USB_DEVICE_MANUFACTURER_STRDEF_VALID</name>
88268                        <description>valid flag for USB_DEVICE_MANUFACTURER_STRDEF entry of the USB_WHITE_LABEL struct (index 4)</description>
88269                        <bitRange>[4:4]</bitRange>
88270                        <access>read-only</access>
88271                    </field>
88272                    <field>
88273                        <name>WL_USB_DEVICE_LANG_ID_VALUE_VALID</name>
88274                        <description>valid flag for USB_DEVICE_LANG_ID_VALUE entry of the USB_WHITE_LABEL struct (index 3)</description>
88275                        <bitRange>[3:3]</bitRange>
88276                        <access>read-only</access>
88277                    </field>
88278                    <field>
88279                        <name>WL_USB_DEVICE_SERIAL_NUMBER_VALUE_VALID</name>
88280                        <description>valid flag for USB_DEVICE_BCD_DEVICEVALUE entry of the USB_WHITE_LABEL struct (index 2)</description>
88281                        <bitRange>[2:2]</bitRange>
88282                        <access>read-only</access>
88283                    </field>
88284                    <field>
88285                        <name>WL_USB_DEVICE_PID_VALUE_VALID</name>
88286                        <description>valid flag for USB_DEVICE_PID_VALUE entry of the USB_WHITE_LABEL struct (index 1)</description>
88287                        <bitRange>[1:1]</bitRange>
88288                        <access>read-only</access>
88289                    </field>
88290                    <field>
88291                        <name>WL_USB_DEVICE_VID_VALUE_VALID</name>
88292                        <description>valid flag for USB_DEVICE_VID_VALUE entry of the USB_WHITE_LABEL struct (index 0)</description>
88293                        <bitRange>[0:0]</bitRange>
88294                        <access>read-only</access>
88295                    </field>
88296                </fields>
88297            </register>
88298            <register>
88299                <name>USB_BOOT_FLAGS_R1</name>
88300                <addressOffset>0x00000168</addressOffset>
88301                <description>Redundant copy of USB_BOOT_FLAGS</description>
88302                <resetMask>0x00000000</resetMask>
88303                <fields>
88304                    <field>
88305                        <name>USB_BOOT_FLAGS_R1</name>
88306                        <bitRange>[23:0]</bitRange>
88307                        <access>read-only</access>
88308                    </field>
88309                </fields>
88310            </register>
88311            <register>
88312                <name>USB_BOOT_FLAGS_R2</name>
88313                <addressOffset>0x0000016c</addressOffset>
88314                <description>Redundant copy of USB_BOOT_FLAGS</description>
88315                <resetMask>0x00000000</resetMask>
88316                <fields>
88317                    <field>
88318                        <name>USB_BOOT_FLAGS_R2</name>
88319                        <bitRange>[23:0]</bitRange>
88320                        <access>read-only</access>
88321                    </field>
88322                </fields>
88323            </register>
88324            <register>
88325                <name>USB_WHITE_LABEL_ADDR</name>
88326                <addressOffset>0x00000170</addressOffset>
88327                <description>Row index of the USB_WHITE_LABEL structure within OTP (ECC)
88328
88329                    The table has 16 rows, each of which are also ECC and marked valid by the corresponding valid bit in USB_BOOT_FLAGS (ECC).
88330
88331                    The entries are either _VALUEs where the 16 bit value is used as is, or _STRDEFs which acts as a pointers to a string value.
88332
88333                    The value stored in a _STRDEF is two separate bytes: The low seven bits of the first (LSB) byte indicates the number of characters in the string, and the top bit of the first (LSB) byte if set to indicate that each character in the string is two bytes (Unicode) versus one byte if unset. The second (MSB) byte represents the location of the string data, and is encoded as the number of rows from this USB_WHITE_LABEL_ADDR; i.e. the row of the start of the string is USB_WHITE_LABEL_ADDR value + msb_byte.
88334
88335                    In each case, the corresponding valid bit enables replacing the default value for the corresponding item provided by the boot rom.
88336
88337                    Note that Unicode _STRDEFs are only supported for USB_DEVICE_PRODUCT_STRDEF, USB_DEVICE_SERIAL_NUMBER_STRDEF and USB_DEVICE_MANUFACTURER_STRDEF. Unicode values will be ignored if specified for other fields, and non-unicode values for these three items will be converted to Unicode characters by setting the upper 8 bits to zero.
88338
88339                    Note that if the USB_WHITE_LABEL structure or the corresponding strings are not readable by BOOTSEL mode based on OTP permissions, or if alignment requirements are not met, then the corresponding default values are used.
88340
88341                    The index values indicate where each field is located (row USB_WHITE_LABEL_ADDR value + index):</description>
88342                <resetMask>0x00000000</resetMask>
88343                <fields>
88344                    <field>
88345                        <name>USB_WHITE_LABEL_ADDR</name>
88346                        <bitRange>[15:0]</bitRange>
88347                        <access>read-only</access>
88348                        <enumeratedValues>
88349                            <enumeratedValue>
88350                                <name>INDEX_USB_DEVICE_VID_VALUE</name>
88351                                <value>0</value>
88352                            </enumeratedValue>
88353                            <enumeratedValue>
88354                                <name>INDEX_USB_DEVICE_PID_VALUE</name>
88355                                <value>1</value>
88356                            </enumeratedValue>
88357                            <enumeratedValue>
88358                                <name>INDEX_USB_DEVICE_BCD_DEVICE_VALUE</name>
88359                                <value>2</value>
88360                            </enumeratedValue>
88361                            <enumeratedValue>
88362                                <name>INDEX_USB_DEVICE_LANG_ID_VALUE</name>
88363                                <value>3</value>
88364                            </enumeratedValue>
88365                            <enumeratedValue>
88366                                <name>INDEX_USB_DEVICE_MANUFACTURER_STRDEF</name>
88367                                <value>4</value>
88368                            </enumeratedValue>
88369                            <enumeratedValue>
88370                                <name>INDEX_USB_DEVICE_PRODUCT_STRDEF</name>
88371                                <value>5</value>
88372                            </enumeratedValue>
88373                            <enumeratedValue>
88374                                <name>INDEX_USB_DEVICE_SERIAL_NUMBER_STRDEF</name>
88375                                <value>6</value>
88376                            </enumeratedValue>
88377                            <enumeratedValue>
88378                                <name>INDEX_USB_CONFIG_ATTRIBUTES_MAX_POWER_VALUES</name>
88379                                <value>7</value>
88380                            </enumeratedValue>
88381                            <enumeratedValue>
88382                                <name>INDEX_VOLUME_LABEL_STRDEF</name>
88383                                <value>8</value>
88384                            </enumeratedValue>
88385                            <enumeratedValue>
88386                                <name>INDEX_SCSI_INQUIRY_VENDOR_STRDEF</name>
88387                                <value>9</value>
88388                            </enumeratedValue>
88389                            <enumeratedValue>
88390                                <name>INDEX_SCSI_INQUIRY_PRODUCT_STRDEF</name>
88391                                <value>10</value>
88392                            </enumeratedValue>
88393                            <enumeratedValue>
88394                                <name>INDEX_SCSI_INQUIRY_VERSION_STRDEF</name>
88395                                <value>11</value>
88396                            </enumeratedValue>
88397                            <enumeratedValue>
88398                                <name>INDEX_INDEX_HTM_REDIRECT_URL_STRDEF</name>
88399                                <value>12</value>
88400                            </enumeratedValue>
88401                            <enumeratedValue>
88402                                <name>INDEX_INDEX_HTM_REDIRECT_NAME_STRDEF</name>
88403                                <value>13</value>
88404                            </enumeratedValue>
88405                            <enumeratedValue>
88406                                <name>INDEX_INFO_UF2_TXT_MODEL_STRDEF</name>
88407                                <value>14</value>
88408                            </enumeratedValue>
88409                            <enumeratedValue>
88410                                <name>INDEX_INFO_UF2_TXT_BOARD_ID_STRDEF</name>
88411                                <value>15</value>
88412                            </enumeratedValue>
88413                        </enumeratedValues>
88414                    </field>
88415                </fields>
88416            </register>
88417            <register>
88418                <name>OTPBOOT_SRC</name>
88419                <addressOffset>0x00000178</addressOffset>
88420                <description>OTP start row for the OTP boot image. (ECC)
88421
88422                    If OTP boot is enabled, the bootrom will load from this location into SRAM and then directly enter the loaded image. Note that the image must be signed if SECURE_BOOT_ENABLE is set. The image itself is assumed to be ECC-protected.
88423
88424                    This must be an even number. Equivalently, the OTP boot image must start at a word-aligned location in the ECC read data address window.</description>
88425                <resetMask>0x00000000</resetMask>
88426                <fields>
88427                    <field>
88428                        <name>OTPBOOT_SRC</name>
88429                        <bitRange>[15:0]</bitRange>
88430                        <access>read-only</access>
88431                    </field>
88432                </fields>
88433            </register>
88434            <register>
88435                <name>OTPBOOT_LEN</name>
88436                <addressOffset>0x0000017c</addressOffset>
88437                <description>Length in rows of the OTP boot image. (ECC)
88438
88439                    OTPBOOT_LEN must be even. The total image size must be a multiple of 4 bytes (32 bits).</description>
88440                <resetMask>0x00000000</resetMask>
88441                <fields>
88442                    <field>
88443                        <name>OTPBOOT_LEN</name>
88444                        <bitRange>[15:0]</bitRange>
88445                        <access>read-only</access>
88446                    </field>
88447                </fields>
88448            </register>
88449            <register>
88450                <name>OTPBOOT_DST0</name>
88451                <addressOffset>0x00000180</addressOffset>
88452                <description>Bits 15:0 of the OTP boot image load destination (and entry point). (ECC)
88453
88454                    This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.</description>
88455                <resetMask>0x00000000</resetMask>
88456                <fields>
88457                    <field>
88458                        <name>OTPBOOT_DST0</name>
88459                        <bitRange>[15:0]</bitRange>
88460                        <access>read-only</access>
88461                    </field>
88462                </fields>
88463            </register>
88464            <register>
88465                <name>OTPBOOT_DST1</name>
88466                <addressOffset>0x00000184</addressOffset>
88467                <description>Bits 31:16 of the OTP boot image load destination (and entry point). (ECC)
88468
88469                    This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.</description>
88470                <resetMask>0x00000000</resetMask>
88471                <fields>
88472                    <field>
88473                        <name>OTPBOOT_DST1</name>
88474                        <bitRange>[15:0]</bitRange>
88475                        <access>read-only</access>
88476                    </field>
88477                </fields>
88478            </register>
88479            <register>
88480                <name>BOOTKEY0_0</name>
88481                <addressOffset>0x00000200</addressOffset>
88482                <description>Bits 15:0 of SHA-256 hash of boot key 0 (ECC)</description>
88483                <resetMask>0x00000000</resetMask>
88484                <fields>
88485                    <field>
88486                        <name>BOOTKEY0_0</name>
88487                        <bitRange>[15:0]</bitRange>
88488                        <access>read-only</access>
88489                    </field>
88490                </fields>
88491            </register>
88492            <register>
88493                <name>BOOTKEY0_1</name>
88494                <addressOffset>0x00000204</addressOffset>
88495                <description>Bits 31:16 of SHA-256 hash of boot key 0 (ECC)</description>
88496                <resetMask>0x00000000</resetMask>
88497                <fields>
88498                    <field>
88499                        <name>BOOTKEY0_1</name>
88500                        <bitRange>[15:0]</bitRange>
88501                        <access>read-only</access>
88502                    </field>
88503                </fields>
88504            </register>
88505            <register>
88506                <name>BOOTKEY0_2</name>
88507                <addressOffset>0x00000208</addressOffset>
88508                <description>Bits 47:32 of SHA-256 hash of boot key 0 (ECC)</description>
88509                <resetMask>0x00000000</resetMask>
88510                <fields>
88511                    <field>
88512                        <name>BOOTKEY0_2</name>
88513                        <bitRange>[15:0]</bitRange>
88514                        <access>read-only</access>
88515                    </field>
88516                </fields>
88517            </register>
88518            <register>
88519                <name>BOOTKEY0_3</name>
88520                <addressOffset>0x0000020c</addressOffset>
88521                <description>Bits 63:48 of SHA-256 hash of boot key 0 (ECC)</description>
88522                <resetMask>0x00000000</resetMask>
88523                <fields>
88524                    <field>
88525                        <name>BOOTKEY0_3</name>
88526                        <bitRange>[15:0]</bitRange>
88527                        <access>read-only</access>
88528                    </field>
88529                </fields>
88530            </register>
88531            <register>
88532                <name>BOOTKEY0_4</name>
88533                <addressOffset>0x00000210</addressOffset>
88534                <description>Bits 79:64 of SHA-256 hash of boot key 0 (ECC)</description>
88535                <resetMask>0x00000000</resetMask>
88536                <fields>
88537                    <field>
88538                        <name>BOOTKEY0_4</name>
88539                        <bitRange>[15:0]</bitRange>
88540                        <access>read-only</access>
88541                    </field>
88542                </fields>
88543            </register>
88544            <register>
88545                <name>BOOTKEY0_5</name>
88546                <addressOffset>0x00000214</addressOffset>
88547                <description>Bits 95:80 of SHA-256 hash of boot key 0 (ECC)</description>
88548                <resetMask>0x00000000</resetMask>
88549                <fields>
88550                    <field>
88551                        <name>BOOTKEY0_5</name>
88552                        <bitRange>[15:0]</bitRange>
88553                        <access>read-only</access>
88554                    </field>
88555                </fields>
88556            </register>
88557            <register>
88558                <name>BOOTKEY0_6</name>
88559                <addressOffset>0x00000218</addressOffset>
88560                <description>Bits 111:96 of SHA-256 hash of boot key 0 (ECC)</description>
88561                <resetMask>0x00000000</resetMask>
88562                <fields>
88563                    <field>
88564                        <name>BOOTKEY0_6</name>
88565                        <bitRange>[15:0]</bitRange>
88566                        <access>read-only</access>
88567                    </field>
88568                </fields>
88569            </register>
88570            <register>
88571                <name>BOOTKEY0_7</name>
88572                <addressOffset>0x0000021c</addressOffset>
88573                <description>Bits 127:112 of SHA-256 hash of boot key 0 (ECC)</description>
88574                <resetMask>0x00000000</resetMask>
88575                <fields>
88576                    <field>
88577                        <name>BOOTKEY0_7</name>
88578                        <bitRange>[15:0]</bitRange>
88579                        <access>read-only</access>
88580                    </field>
88581                </fields>
88582            </register>
88583            <register>
88584                <name>BOOTKEY0_8</name>
88585                <addressOffset>0x00000220</addressOffset>
88586                <description>Bits 143:128 of SHA-256 hash of boot key 0 (ECC)</description>
88587                <resetMask>0x00000000</resetMask>
88588                <fields>
88589                    <field>
88590                        <name>BOOTKEY0_8</name>
88591                        <bitRange>[15:0]</bitRange>
88592                        <access>read-only</access>
88593                    </field>
88594                </fields>
88595            </register>
88596            <register>
88597                <name>BOOTKEY0_9</name>
88598                <addressOffset>0x00000224</addressOffset>
88599                <description>Bits 159:144 of SHA-256 hash of boot key 0 (ECC)</description>
88600                <resetMask>0x00000000</resetMask>
88601                <fields>
88602                    <field>
88603                        <name>BOOTKEY0_9</name>
88604                        <bitRange>[15:0]</bitRange>
88605                        <access>read-only</access>
88606                    </field>
88607                </fields>
88608            </register>
88609            <register>
88610                <name>BOOTKEY0_10</name>
88611                <addressOffset>0x00000228</addressOffset>
88612                <description>Bits 175:160 of SHA-256 hash of boot key 0 (ECC)</description>
88613                <resetMask>0x00000000</resetMask>
88614                <fields>
88615                    <field>
88616                        <name>BOOTKEY0_10</name>
88617                        <bitRange>[15:0]</bitRange>
88618                        <access>read-only</access>
88619                    </field>
88620                </fields>
88621            </register>
88622            <register>
88623                <name>BOOTKEY0_11</name>
88624                <addressOffset>0x0000022c</addressOffset>
88625                <description>Bits 191:176 of SHA-256 hash of boot key 0 (ECC)</description>
88626                <resetMask>0x00000000</resetMask>
88627                <fields>
88628                    <field>
88629                        <name>BOOTKEY0_11</name>
88630                        <bitRange>[15:0]</bitRange>
88631                        <access>read-only</access>
88632                    </field>
88633                </fields>
88634            </register>
88635            <register>
88636                <name>BOOTKEY0_12</name>
88637                <addressOffset>0x00000230</addressOffset>
88638                <description>Bits 207:192 of SHA-256 hash of boot key 0 (ECC)</description>
88639                <resetMask>0x00000000</resetMask>
88640                <fields>
88641                    <field>
88642                        <name>BOOTKEY0_12</name>
88643                        <bitRange>[15:0]</bitRange>
88644                        <access>read-only</access>
88645                    </field>
88646                </fields>
88647            </register>
88648            <register>
88649                <name>BOOTKEY0_13</name>
88650                <addressOffset>0x00000234</addressOffset>
88651                <description>Bits 223:208 of SHA-256 hash of boot key 0 (ECC)</description>
88652                <resetMask>0x00000000</resetMask>
88653                <fields>
88654                    <field>
88655                        <name>BOOTKEY0_13</name>
88656                        <bitRange>[15:0]</bitRange>
88657                        <access>read-only</access>
88658                    </field>
88659                </fields>
88660            </register>
88661            <register>
88662                <name>BOOTKEY0_14</name>
88663                <addressOffset>0x00000238</addressOffset>
88664                <description>Bits 239:224 of SHA-256 hash of boot key 0 (ECC)</description>
88665                <resetMask>0x00000000</resetMask>
88666                <fields>
88667                    <field>
88668                        <name>BOOTKEY0_14</name>
88669                        <bitRange>[15:0]</bitRange>
88670                        <access>read-only</access>
88671                    </field>
88672                </fields>
88673            </register>
88674            <register>
88675                <name>BOOTKEY0_15</name>
88676                <addressOffset>0x0000023c</addressOffset>
88677                <description>Bits 255:240 of SHA-256 hash of boot key 0 (ECC)</description>
88678                <resetMask>0x00000000</resetMask>
88679                <fields>
88680                    <field>
88681                        <name>BOOTKEY0_15</name>
88682                        <bitRange>[15:0]</bitRange>
88683                        <access>read-only</access>
88684                    </field>
88685                </fields>
88686            </register>
88687            <register>
88688                <name>BOOTKEY1_0</name>
88689                <addressOffset>0x00000240</addressOffset>
88690                <description>Bits 15:0 of SHA-256 hash of boot key 1 (ECC)</description>
88691                <resetMask>0x00000000</resetMask>
88692                <fields>
88693                    <field>
88694                        <name>BOOTKEY1_0</name>
88695                        <bitRange>[15:0]</bitRange>
88696                        <access>read-only</access>
88697                    </field>
88698                </fields>
88699            </register>
88700            <register>
88701                <name>BOOTKEY1_1</name>
88702                <addressOffset>0x00000244</addressOffset>
88703                <description>Bits 31:16 of SHA-256 hash of boot key 1 (ECC)</description>
88704                <resetMask>0x00000000</resetMask>
88705                <fields>
88706                    <field>
88707                        <name>BOOTKEY1_1</name>
88708                        <bitRange>[15:0]</bitRange>
88709                        <access>read-only</access>
88710                    </field>
88711                </fields>
88712            </register>
88713            <register>
88714                <name>BOOTKEY1_2</name>
88715                <addressOffset>0x00000248</addressOffset>
88716                <description>Bits 47:32 of SHA-256 hash of boot key 1 (ECC)</description>
88717                <resetMask>0x00000000</resetMask>
88718                <fields>
88719                    <field>
88720                        <name>BOOTKEY1_2</name>
88721                        <bitRange>[15:0]</bitRange>
88722                        <access>read-only</access>
88723                    </field>
88724                </fields>
88725            </register>
88726            <register>
88727                <name>BOOTKEY1_3</name>
88728                <addressOffset>0x0000024c</addressOffset>
88729                <description>Bits 63:48 of SHA-256 hash of boot key 1 (ECC)</description>
88730                <resetMask>0x00000000</resetMask>
88731                <fields>
88732                    <field>
88733                        <name>BOOTKEY1_3</name>
88734                        <bitRange>[15:0]</bitRange>
88735                        <access>read-only</access>
88736                    </field>
88737                </fields>
88738            </register>
88739            <register>
88740                <name>BOOTKEY1_4</name>
88741                <addressOffset>0x00000250</addressOffset>
88742                <description>Bits 79:64 of SHA-256 hash of boot key 1 (ECC)</description>
88743                <resetMask>0x00000000</resetMask>
88744                <fields>
88745                    <field>
88746                        <name>BOOTKEY1_4</name>
88747                        <bitRange>[15:0]</bitRange>
88748                        <access>read-only</access>
88749                    </field>
88750                </fields>
88751            </register>
88752            <register>
88753                <name>BOOTKEY1_5</name>
88754                <addressOffset>0x00000254</addressOffset>
88755                <description>Bits 95:80 of SHA-256 hash of boot key 1 (ECC)</description>
88756                <resetMask>0x00000000</resetMask>
88757                <fields>
88758                    <field>
88759                        <name>BOOTKEY1_5</name>
88760                        <bitRange>[15:0]</bitRange>
88761                        <access>read-only</access>
88762                    </field>
88763                </fields>
88764            </register>
88765            <register>
88766                <name>BOOTKEY1_6</name>
88767                <addressOffset>0x00000258</addressOffset>
88768                <description>Bits 111:96 of SHA-256 hash of boot key 1 (ECC)</description>
88769                <resetMask>0x00000000</resetMask>
88770                <fields>
88771                    <field>
88772                        <name>BOOTKEY1_6</name>
88773                        <bitRange>[15:0]</bitRange>
88774                        <access>read-only</access>
88775                    </field>
88776                </fields>
88777            </register>
88778            <register>
88779                <name>BOOTKEY1_7</name>
88780                <addressOffset>0x0000025c</addressOffset>
88781                <description>Bits 127:112 of SHA-256 hash of boot key 1 (ECC)</description>
88782                <resetMask>0x00000000</resetMask>
88783                <fields>
88784                    <field>
88785                        <name>BOOTKEY1_7</name>
88786                        <bitRange>[15:0]</bitRange>
88787                        <access>read-only</access>
88788                    </field>
88789                </fields>
88790            </register>
88791            <register>
88792                <name>BOOTKEY1_8</name>
88793                <addressOffset>0x00000260</addressOffset>
88794                <description>Bits 143:128 of SHA-256 hash of boot key 1 (ECC)</description>
88795                <resetMask>0x00000000</resetMask>
88796                <fields>
88797                    <field>
88798                        <name>BOOTKEY1_8</name>
88799                        <bitRange>[15:0]</bitRange>
88800                        <access>read-only</access>
88801                    </field>
88802                </fields>
88803            </register>
88804            <register>
88805                <name>BOOTKEY1_9</name>
88806                <addressOffset>0x00000264</addressOffset>
88807                <description>Bits 159:144 of SHA-256 hash of boot key 1 (ECC)</description>
88808                <resetMask>0x00000000</resetMask>
88809                <fields>
88810                    <field>
88811                        <name>BOOTKEY1_9</name>
88812                        <bitRange>[15:0]</bitRange>
88813                        <access>read-only</access>
88814                    </field>
88815                </fields>
88816            </register>
88817            <register>
88818                <name>BOOTKEY1_10</name>
88819                <addressOffset>0x00000268</addressOffset>
88820                <description>Bits 175:160 of SHA-256 hash of boot key 1 (ECC)</description>
88821                <resetMask>0x00000000</resetMask>
88822                <fields>
88823                    <field>
88824                        <name>BOOTKEY1_10</name>
88825                        <bitRange>[15:0]</bitRange>
88826                        <access>read-only</access>
88827                    </field>
88828                </fields>
88829            </register>
88830            <register>
88831                <name>BOOTKEY1_11</name>
88832                <addressOffset>0x0000026c</addressOffset>
88833                <description>Bits 191:176 of SHA-256 hash of boot key 1 (ECC)</description>
88834                <resetMask>0x00000000</resetMask>
88835                <fields>
88836                    <field>
88837                        <name>BOOTKEY1_11</name>
88838                        <bitRange>[15:0]</bitRange>
88839                        <access>read-only</access>
88840                    </field>
88841                </fields>
88842            </register>
88843            <register>
88844                <name>BOOTKEY1_12</name>
88845                <addressOffset>0x00000270</addressOffset>
88846                <description>Bits 207:192 of SHA-256 hash of boot key 1 (ECC)</description>
88847                <resetMask>0x00000000</resetMask>
88848                <fields>
88849                    <field>
88850                        <name>BOOTKEY1_12</name>
88851                        <bitRange>[15:0]</bitRange>
88852                        <access>read-only</access>
88853                    </field>
88854                </fields>
88855            </register>
88856            <register>
88857                <name>BOOTKEY1_13</name>
88858                <addressOffset>0x00000274</addressOffset>
88859                <description>Bits 223:208 of SHA-256 hash of boot key 1 (ECC)</description>
88860                <resetMask>0x00000000</resetMask>
88861                <fields>
88862                    <field>
88863                        <name>BOOTKEY1_13</name>
88864                        <bitRange>[15:0]</bitRange>
88865                        <access>read-only</access>
88866                    </field>
88867                </fields>
88868            </register>
88869            <register>
88870                <name>BOOTKEY1_14</name>
88871                <addressOffset>0x00000278</addressOffset>
88872                <description>Bits 239:224 of SHA-256 hash of boot key 1 (ECC)</description>
88873                <resetMask>0x00000000</resetMask>
88874                <fields>
88875                    <field>
88876                        <name>BOOTKEY1_14</name>
88877                        <bitRange>[15:0]</bitRange>
88878                        <access>read-only</access>
88879                    </field>
88880                </fields>
88881            </register>
88882            <register>
88883                <name>BOOTKEY1_15</name>
88884                <addressOffset>0x0000027c</addressOffset>
88885                <description>Bits 255:240 of SHA-256 hash of boot key 1 (ECC)</description>
88886                <resetMask>0x00000000</resetMask>
88887                <fields>
88888                    <field>
88889                        <name>BOOTKEY1_15</name>
88890                        <bitRange>[15:0]</bitRange>
88891                        <access>read-only</access>
88892                    </field>
88893                </fields>
88894            </register>
88895            <register>
88896                <name>BOOTKEY2_0</name>
88897                <addressOffset>0x00000280</addressOffset>
88898                <description>Bits 15:0 of SHA-256 hash of boot key 2 (ECC)</description>
88899                <resetMask>0x00000000</resetMask>
88900                <fields>
88901                    <field>
88902                        <name>BOOTKEY2_0</name>
88903                        <bitRange>[15:0]</bitRange>
88904                        <access>read-only</access>
88905                    </field>
88906                </fields>
88907            </register>
88908            <register>
88909                <name>BOOTKEY2_1</name>
88910                <addressOffset>0x00000284</addressOffset>
88911                <description>Bits 31:16 of SHA-256 hash of boot key 2 (ECC)</description>
88912                <resetMask>0x00000000</resetMask>
88913                <fields>
88914                    <field>
88915                        <name>BOOTKEY2_1</name>
88916                        <bitRange>[15:0]</bitRange>
88917                        <access>read-only</access>
88918                    </field>
88919                </fields>
88920            </register>
88921            <register>
88922                <name>BOOTKEY2_2</name>
88923                <addressOffset>0x00000288</addressOffset>
88924                <description>Bits 47:32 of SHA-256 hash of boot key 2 (ECC)</description>
88925                <resetMask>0x00000000</resetMask>
88926                <fields>
88927                    <field>
88928                        <name>BOOTKEY2_2</name>
88929                        <bitRange>[15:0]</bitRange>
88930                        <access>read-only</access>
88931                    </field>
88932                </fields>
88933            </register>
88934            <register>
88935                <name>BOOTKEY2_3</name>
88936                <addressOffset>0x0000028c</addressOffset>
88937                <description>Bits 63:48 of SHA-256 hash of boot key 2 (ECC)</description>
88938                <resetMask>0x00000000</resetMask>
88939                <fields>
88940                    <field>
88941                        <name>BOOTKEY2_3</name>
88942                        <bitRange>[15:0]</bitRange>
88943                        <access>read-only</access>
88944                    </field>
88945                </fields>
88946            </register>
88947            <register>
88948                <name>BOOTKEY2_4</name>
88949                <addressOffset>0x00000290</addressOffset>
88950                <description>Bits 79:64 of SHA-256 hash of boot key 2 (ECC)</description>
88951                <resetMask>0x00000000</resetMask>
88952                <fields>
88953                    <field>
88954                        <name>BOOTKEY2_4</name>
88955                        <bitRange>[15:0]</bitRange>
88956                        <access>read-only</access>
88957                    </field>
88958                </fields>
88959            </register>
88960            <register>
88961                <name>BOOTKEY2_5</name>
88962                <addressOffset>0x00000294</addressOffset>
88963                <description>Bits 95:80 of SHA-256 hash of boot key 2 (ECC)</description>
88964                <resetMask>0x00000000</resetMask>
88965                <fields>
88966                    <field>
88967                        <name>BOOTKEY2_5</name>
88968                        <bitRange>[15:0]</bitRange>
88969                        <access>read-only</access>
88970                    </field>
88971                </fields>
88972            </register>
88973            <register>
88974                <name>BOOTKEY2_6</name>
88975                <addressOffset>0x00000298</addressOffset>
88976                <description>Bits 111:96 of SHA-256 hash of boot key 2 (ECC)</description>
88977                <resetMask>0x00000000</resetMask>
88978                <fields>
88979                    <field>
88980                        <name>BOOTKEY2_6</name>
88981                        <bitRange>[15:0]</bitRange>
88982                        <access>read-only</access>
88983                    </field>
88984                </fields>
88985            </register>
88986            <register>
88987                <name>BOOTKEY2_7</name>
88988                <addressOffset>0x0000029c</addressOffset>
88989                <description>Bits 127:112 of SHA-256 hash of boot key 2 (ECC)</description>
88990                <resetMask>0x00000000</resetMask>
88991                <fields>
88992                    <field>
88993                        <name>BOOTKEY2_7</name>
88994                        <bitRange>[15:0]</bitRange>
88995                        <access>read-only</access>
88996                    </field>
88997                </fields>
88998            </register>
88999            <register>
89000                <name>BOOTKEY2_8</name>
89001                <addressOffset>0x000002a0</addressOffset>
89002                <description>Bits 143:128 of SHA-256 hash of boot key 2 (ECC)</description>
89003                <resetMask>0x00000000</resetMask>
89004                <fields>
89005                    <field>
89006                        <name>BOOTKEY2_8</name>
89007                        <bitRange>[15:0]</bitRange>
89008                        <access>read-only</access>
89009                    </field>
89010                </fields>
89011            </register>
89012            <register>
89013                <name>BOOTKEY2_9</name>
89014                <addressOffset>0x000002a4</addressOffset>
89015                <description>Bits 159:144 of SHA-256 hash of boot key 2 (ECC)</description>
89016                <resetMask>0x00000000</resetMask>
89017                <fields>
89018                    <field>
89019                        <name>BOOTKEY2_9</name>
89020                        <bitRange>[15:0]</bitRange>
89021                        <access>read-only</access>
89022                    </field>
89023                </fields>
89024            </register>
89025            <register>
89026                <name>BOOTKEY2_10</name>
89027                <addressOffset>0x000002a8</addressOffset>
89028                <description>Bits 175:160 of SHA-256 hash of boot key 2 (ECC)</description>
89029                <resetMask>0x00000000</resetMask>
89030                <fields>
89031                    <field>
89032                        <name>BOOTKEY2_10</name>
89033                        <bitRange>[15:0]</bitRange>
89034                        <access>read-only</access>
89035                    </field>
89036                </fields>
89037            </register>
89038            <register>
89039                <name>BOOTKEY2_11</name>
89040                <addressOffset>0x000002ac</addressOffset>
89041                <description>Bits 191:176 of SHA-256 hash of boot key 2 (ECC)</description>
89042                <resetMask>0x00000000</resetMask>
89043                <fields>
89044                    <field>
89045                        <name>BOOTKEY2_11</name>
89046                        <bitRange>[15:0]</bitRange>
89047                        <access>read-only</access>
89048                    </field>
89049                </fields>
89050            </register>
89051            <register>
89052                <name>BOOTKEY2_12</name>
89053                <addressOffset>0x000002b0</addressOffset>
89054                <description>Bits 207:192 of SHA-256 hash of boot key 2 (ECC)</description>
89055                <resetMask>0x00000000</resetMask>
89056                <fields>
89057                    <field>
89058                        <name>BOOTKEY2_12</name>
89059                        <bitRange>[15:0]</bitRange>
89060                        <access>read-only</access>
89061                    </field>
89062                </fields>
89063            </register>
89064            <register>
89065                <name>BOOTKEY2_13</name>
89066                <addressOffset>0x000002b4</addressOffset>
89067                <description>Bits 223:208 of SHA-256 hash of boot key 2 (ECC)</description>
89068                <resetMask>0x00000000</resetMask>
89069                <fields>
89070                    <field>
89071                        <name>BOOTKEY2_13</name>
89072                        <bitRange>[15:0]</bitRange>
89073                        <access>read-only</access>
89074                    </field>
89075                </fields>
89076            </register>
89077            <register>
89078                <name>BOOTKEY2_14</name>
89079                <addressOffset>0x000002b8</addressOffset>
89080                <description>Bits 239:224 of SHA-256 hash of boot key 2 (ECC)</description>
89081                <resetMask>0x00000000</resetMask>
89082                <fields>
89083                    <field>
89084                        <name>BOOTKEY2_14</name>
89085                        <bitRange>[15:0]</bitRange>
89086                        <access>read-only</access>
89087                    </field>
89088                </fields>
89089            </register>
89090            <register>
89091                <name>BOOTKEY2_15</name>
89092                <addressOffset>0x000002bc</addressOffset>
89093                <description>Bits 255:240 of SHA-256 hash of boot key 2 (ECC)</description>
89094                <resetMask>0x00000000</resetMask>
89095                <fields>
89096                    <field>
89097                        <name>BOOTKEY2_15</name>
89098                        <bitRange>[15:0]</bitRange>
89099                        <access>read-only</access>
89100                    </field>
89101                </fields>
89102            </register>
89103            <register>
89104                <name>BOOTKEY3_0</name>
89105                <addressOffset>0x000002c0</addressOffset>
89106                <description>Bits 15:0 of SHA-256 hash of boot key 3 (ECC)</description>
89107                <resetMask>0x00000000</resetMask>
89108                <fields>
89109                    <field>
89110                        <name>BOOTKEY3_0</name>
89111                        <bitRange>[15:0]</bitRange>
89112                        <access>read-only</access>
89113                    </field>
89114                </fields>
89115            </register>
89116            <register>
89117                <name>BOOTKEY3_1</name>
89118                <addressOffset>0x000002c4</addressOffset>
89119                <description>Bits 31:16 of SHA-256 hash of boot key 3 (ECC)</description>
89120                <resetMask>0x00000000</resetMask>
89121                <fields>
89122                    <field>
89123                        <name>BOOTKEY3_1</name>
89124                        <bitRange>[15:0]</bitRange>
89125                        <access>read-only</access>
89126                    </field>
89127                </fields>
89128            </register>
89129            <register>
89130                <name>BOOTKEY3_2</name>
89131                <addressOffset>0x000002c8</addressOffset>
89132                <description>Bits 47:32 of SHA-256 hash of boot key 3 (ECC)</description>
89133                <resetMask>0x00000000</resetMask>
89134                <fields>
89135                    <field>
89136                        <name>BOOTKEY3_2</name>
89137                        <bitRange>[15:0]</bitRange>
89138                        <access>read-only</access>
89139                    </field>
89140                </fields>
89141            </register>
89142            <register>
89143                <name>BOOTKEY3_3</name>
89144                <addressOffset>0x000002cc</addressOffset>
89145                <description>Bits 63:48 of SHA-256 hash of boot key 3 (ECC)</description>
89146                <resetMask>0x00000000</resetMask>
89147                <fields>
89148                    <field>
89149                        <name>BOOTKEY3_3</name>
89150                        <bitRange>[15:0]</bitRange>
89151                        <access>read-only</access>
89152                    </field>
89153                </fields>
89154            </register>
89155            <register>
89156                <name>BOOTKEY3_4</name>
89157                <addressOffset>0x000002d0</addressOffset>
89158                <description>Bits 79:64 of SHA-256 hash of boot key 3 (ECC)</description>
89159                <resetMask>0x00000000</resetMask>
89160                <fields>
89161                    <field>
89162                        <name>BOOTKEY3_4</name>
89163                        <bitRange>[15:0]</bitRange>
89164                        <access>read-only</access>
89165                    </field>
89166                </fields>
89167            </register>
89168            <register>
89169                <name>BOOTKEY3_5</name>
89170                <addressOffset>0x000002d4</addressOffset>
89171                <description>Bits 95:80 of SHA-256 hash of boot key 3 (ECC)</description>
89172                <resetMask>0x00000000</resetMask>
89173                <fields>
89174                    <field>
89175                        <name>BOOTKEY3_5</name>
89176                        <bitRange>[15:0]</bitRange>
89177                        <access>read-only</access>
89178                    </field>
89179                </fields>
89180            </register>
89181            <register>
89182                <name>BOOTKEY3_6</name>
89183                <addressOffset>0x000002d8</addressOffset>
89184                <description>Bits 111:96 of SHA-256 hash of boot key 3 (ECC)</description>
89185                <resetMask>0x00000000</resetMask>
89186                <fields>
89187                    <field>
89188                        <name>BOOTKEY3_6</name>
89189                        <bitRange>[15:0]</bitRange>
89190                        <access>read-only</access>
89191                    </field>
89192                </fields>
89193            </register>
89194            <register>
89195                <name>BOOTKEY3_7</name>
89196                <addressOffset>0x000002dc</addressOffset>
89197                <description>Bits 127:112 of SHA-256 hash of boot key 3 (ECC)</description>
89198                <resetMask>0x00000000</resetMask>
89199                <fields>
89200                    <field>
89201                        <name>BOOTKEY3_7</name>
89202                        <bitRange>[15:0]</bitRange>
89203                        <access>read-only</access>
89204                    </field>
89205                </fields>
89206            </register>
89207            <register>
89208                <name>BOOTKEY3_8</name>
89209                <addressOffset>0x000002e0</addressOffset>
89210                <description>Bits 143:128 of SHA-256 hash of boot key 3 (ECC)</description>
89211                <resetMask>0x00000000</resetMask>
89212                <fields>
89213                    <field>
89214                        <name>BOOTKEY3_8</name>
89215                        <bitRange>[15:0]</bitRange>
89216                        <access>read-only</access>
89217                    </field>
89218                </fields>
89219            </register>
89220            <register>
89221                <name>BOOTKEY3_9</name>
89222                <addressOffset>0x000002e4</addressOffset>
89223                <description>Bits 159:144 of SHA-256 hash of boot key 3 (ECC)</description>
89224                <resetMask>0x00000000</resetMask>
89225                <fields>
89226                    <field>
89227                        <name>BOOTKEY3_9</name>
89228                        <bitRange>[15:0]</bitRange>
89229                        <access>read-only</access>
89230                    </field>
89231                </fields>
89232            </register>
89233            <register>
89234                <name>BOOTKEY3_10</name>
89235                <addressOffset>0x000002e8</addressOffset>
89236                <description>Bits 175:160 of SHA-256 hash of boot key 3 (ECC)</description>
89237                <resetMask>0x00000000</resetMask>
89238                <fields>
89239                    <field>
89240                        <name>BOOTKEY3_10</name>
89241                        <bitRange>[15:0]</bitRange>
89242                        <access>read-only</access>
89243                    </field>
89244                </fields>
89245            </register>
89246            <register>
89247                <name>BOOTKEY3_11</name>
89248                <addressOffset>0x000002ec</addressOffset>
89249                <description>Bits 191:176 of SHA-256 hash of boot key 3 (ECC)</description>
89250                <resetMask>0x00000000</resetMask>
89251                <fields>
89252                    <field>
89253                        <name>BOOTKEY3_11</name>
89254                        <bitRange>[15:0]</bitRange>
89255                        <access>read-only</access>
89256                    </field>
89257                </fields>
89258            </register>
89259            <register>
89260                <name>BOOTKEY3_12</name>
89261                <addressOffset>0x000002f0</addressOffset>
89262                <description>Bits 207:192 of SHA-256 hash of boot key 3 (ECC)</description>
89263                <resetMask>0x00000000</resetMask>
89264                <fields>
89265                    <field>
89266                        <name>BOOTKEY3_12</name>
89267                        <bitRange>[15:0]</bitRange>
89268                        <access>read-only</access>
89269                    </field>
89270                </fields>
89271            </register>
89272            <register>
89273                <name>BOOTKEY3_13</name>
89274                <addressOffset>0x000002f4</addressOffset>
89275                <description>Bits 223:208 of SHA-256 hash of boot key 3 (ECC)</description>
89276                <resetMask>0x00000000</resetMask>
89277                <fields>
89278                    <field>
89279                        <name>BOOTKEY3_13</name>
89280                        <bitRange>[15:0]</bitRange>
89281                        <access>read-only</access>
89282                    </field>
89283                </fields>
89284            </register>
89285            <register>
89286                <name>BOOTKEY3_14</name>
89287                <addressOffset>0x000002f8</addressOffset>
89288                <description>Bits 239:224 of SHA-256 hash of boot key 3 (ECC)</description>
89289                <resetMask>0x00000000</resetMask>
89290                <fields>
89291                    <field>
89292                        <name>BOOTKEY3_14</name>
89293                        <bitRange>[15:0]</bitRange>
89294                        <access>read-only</access>
89295                    </field>
89296                </fields>
89297            </register>
89298            <register>
89299                <name>BOOTKEY3_15</name>
89300                <addressOffset>0x000002fc</addressOffset>
89301                <description>Bits 255:240 of SHA-256 hash of boot key 3 (ECC)</description>
89302                <resetMask>0x00000000</resetMask>
89303                <fields>
89304                    <field>
89305                        <name>BOOTKEY3_15</name>
89306                        <bitRange>[15:0]</bitRange>
89307                        <access>read-only</access>
89308                    </field>
89309                </fields>
89310            </register>
89311            <register>
89312                <name>KEY1_0</name>
89313                <addressOffset>0x00003d20</addressOffset>
89314                <description>Bits 15:0 of OTP access key 1 (ECC)</description>
89315                <resetMask>0x00000000</resetMask>
89316                <fields>
89317                    <field>
89318                        <name>KEY1_0</name>
89319                        <bitRange>[15:0]</bitRange>
89320                        <access>read-only</access>
89321                    </field>
89322                </fields>
89323            </register>
89324            <register>
89325                <name>KEY1_1</name>
89326                <addressOffset>0x00003d24</addressOffset>
89327                <description>Bits 31:16 of OTP access key 1 (ECC)</description>
89328                <resetMask>0x00000000</resetMask>
89329                <fields>
89330                    <field>
89331                        <name>KEY1_1</name>
89332                        <bitRange>[15:0]</bitRange>
89333                        <access>read-only</access>
89334                    </field>
89335                </fields>
89336            </register>
89337            <register>
89338                <name>KEY1_2</name>
89339                <addressOffset>0x00003d28</addressOffset>
89340                <description>Bits 47:32 of OTP access key 1 (ECC)</description>
89341                <resetMask>0x00000000</resetMask>
89342                <fields>
89343                    <field>
89344                        <name>KEY1_2</name>
89345                        <bitRange>[15:0]</bitRange>
89346                        <access>read-only</access>
89347                    </field>
89348                </fields>
89349            </register>
89350            <register>
89351                <name>KEY1_3</name>
89352                <addressOffset>0x00003d2c</addressOffset>
89353                <description>Bits 63:48 of OTP access key 1 (ECC)</description>
89354                <resetMask>0x00000000</resetMask>
89355                <fields>
89356                    <field>
89357                        <name>KEY1_3</name>
89358                        <bitRange>[15:0]</bitRange>
89359                        <access>read-only</access>
89360                    </field>
89361                </fields>
89362            </register>
89363            <register>
89364                <name>KEY1_4</name>
89365                <addressOffset>0x00003d30</addressOffset>
89366                <description>Bits 79:64 of OTP access key 1 (ECC)</description>
89367                <resetMask>0x00000000</resetMask>
89368                <fields>
89369                    <field>
89370                        <name>KEY1_4</name>
89371                        <bitRange>[15:0]</bitRange>
89372                        <access>read-only</access>
89373                    </field>
89374                </fields>
89375            </register>
89376            <register>
89377                <name>KEY1_5</name>
89378                <addressOffset>0x00003d34</addressOffset>
89379                <description>Bits 95:80 of OTP access key 1 (ECC)</description>
89380                <resetMask>0x00000000</resetMask>
89381                <fields>
89382                    <field>
89383                        <name>KEY1_5</name>
89384                        <bitRange>[15:0]</bitRange>
89385                        <access>read-only</access>
89386                    </field>
89387                </fields>
89388            </register>
89389            <register>
89390                <name>KEY1_6</name>
89391                <addressOffset>0x00003d38</addressOffset>
89392                <description>Bits 111:96 of OTP access key 1 (ECC)</description>
89393                <resetMask>0x00000000</resetMask>
89394                <fields>
89395                    <field>
89396                        <name>KEY1_6</name>
89397                        <bitRange>[15:0]</bitRange>
89398                        <access>read-only</access>
89399                    </field>
89400                </fields>
89401            </register>
89402            <register>
89403                <name>KEY1_7</name>
89404                <addressOffset>0x00003d3c</addressOffset>
89405                <description>Bits 127:112 of OTP access key 1 (ECC)</description>
89406                <resetMask>0x00000000</resetMask>
89407                <fields>
89408                    <field>
89409                        <name>KEY1_7</name>
89410                        <bitRange>[15:0]</bitRange>
89411                        <access>read-only</access>
89412                    </field>
89413                </fields>
89414            </register>
89415            <register>
89416                <name>KEY2_0</name>
89417                <addressOffset>0x00003d40</addressOffset>
89418                <description>Bits 15:0 of OTP access key 2 (ECC)</description>
89419                <resetMask>0x00000000</resetMask>
89420                <fields>
89421                    <field>
89422                        <name>KEY2_0</name>
89423                        <bitRange>[15:0]</bitRange>
89424                        <access>read-only</access>
89425                    </field>
89426                </fields>
89427            </register>
89428            <register>
89429                <name>KEY2_1</name>
89430                <addressOffset>0x00003d44</addressOffset>
89431                <description>Bits 31:16 of OTP access key 2 (ECC)</description>
89432                <resetMask>0x00000000</resetMask>
89433                <fields>
89434                    <field>
89435                        <name>KEY2_1</name>
89436                        <bitRange>[15:0]</bitRange>
89437                        <access>read-only</access>
89438                    </field>
89439                </fields>
89440            </register>
89441            <register>
89442                <name>KEY2_2</name>
89443                <addressOffset>0x00003d48</addressOffset>
89444                <description>Bits 47:32 of OTP access key 2 (ECC)</description>
89445                <resetMask>0x00000000</resetMask>
89446                <fields>
89447                    <field>
89448                        <name>KEY2_2</name>
89449                        <bitRange>[15:0]</bitRange>
89450                        <access>read-only</access>
89451                    </field>
89452                </fields>
89453            </register>
89454            <register>
89455                <name>KEY2_3</name>
89456                <addressOffset>0x00003d4c</addressOffset>
89457                <description>Bits 63:48 of OTP access key 2 (ECC)</description>
89458                <resetMask>0x00000000</resetMask>
89459                <fields>
89460                    <field>
89461                        <name>KEY2_3</name>
89462                        <bitRange>[15:0]</bitRange>
89463                        <access>read-only</access>
89464                    </field>
89465                </fields>
89466            </register>
89467            <register>
89468                <name>KEY2_4</name>
89469                <addressOffset>0x00003d50</addressOffset>
89470                <description>Bits 79:64 of OTP access key 2 (ECC)</description>
89471                <resetMask>0x00000000</resetMask>
89472                <fields>
89473                    <field>
89474                        <name>KEY2_4</name>
89475                        <bitRange>[15:0]</bitRange>
89476                        <access>read-only</access>
89477                    </field>
89478                </fields>
89479            </register>
89480            <register>
89481                <name>KEY2_5</name>
89482                <addressOffset>0x00003d54</addressOffset>
89483                <description>Bits 95:80 of OTP access key 2 (ECC)</description>
89484                <resetMask>0x00000000</resetMask>
89485                <fields>
89486                    <field>
89487                        <name>KEY2_5</name>
89488                        <bitRange>[15:0]</bitRange>
89489                        <access>read-only</access>
89490                    </field>
89491                </fields>
89492            </register>
89493            <register>
89494                <name>KEY2_6</name>
89495                <addressOffset>0x00003d58</addressOffset>
89496                <description>Bits 111:96 of OTP access key 2 (ECC)</description>
89497                <resetMask>0x00000000</resetMask>
89498                <fields>
89499                    <field>
89500                        <name>KEY2_6</name>
89501                        <bitRange>[15:0]</bitRange>
89502                        <access>read-only</access>
89503                    </field>
89504                </fields>
89505            </register>
89506            <register>
89507                <name>KEY2_7</name>
89508                <addressOffset>0x00003d5c</addressOffset>
89509                <description>Bits 127:112 of OTP access key 2 (ECC)</description>
89510                <resetMask>0x00000000</resetMask>
89511                <fields>
89512                    <field>
89513                        <name>KEY2_7</name>
89514                        <bitRange>[15:0]</bitRange>
89515                        <access>read-only</access>
89516                    </field>
89517                </fields>
89518            </register>
89519            <register>
89520                <name>KEY3_0</name>
89521                <addressOffset>0x00003d60</addressOffset>
89522                <description>Bits 15:0 of OTP access key 3 (ECC)</description>
89523                <resetMask>0x00000000</resetMask>
89524                <fields>
89525                    <field>
89526                        <name>KEY3_0</name>
89527                        <bitRange>[15:0]</bitRange>
89528                        <access>read-only</access>
89529                    </field>
89530                </fields>
89531            </register>
89532            <register>
89533                <name>KEY3_1</name>
89534                <addressOffset>0x00003d64</addressOffset>
89535                <description>Bits 31:16 of OTP access key 3 (ECC)</description>
89536                <resetMask>0x00000000</resetMask>
89537                <fields>
89538                    <field>
89539                        <name>KEY3_1</name>
89540                        <bitRange>[15:0]</bitRange>
89541                        <access>read-only</access>
89542                    </field>
89543                </fields>
89544            </register>
89545            <register>
89546                <name>KEY3_2</name>
89547                <addressOffset>0x00003d68</addressOffset>
89548                <description>Bits 47:32 of OTP access key 3 (ECC)</description>
89549                <resetMask>0x00000000</resetMask>
89550                <fields>
89551                    <field>
89552                        <name>KEY3_2</name>
89553                        <bitRange>[15:0]</bitRange>
89554                        <access>read-only</access>
89555                    </field>
89556                </fields>
89557            </register>
89558            <register>
89559                <name>KEY3_3</name>
89560                <addressOffset>0x00003d6c</addressOffset>
89561                <description>Bits 63:48 of OTP access key 3 (ECC)</description>
89562                <resetMask>0x00000000</resetMask>
89563                <fields>
89564                    <field>
89565                        <name>KEY3_3</name>
89566                        <bitRange>[15:0]</bitRange>
89567                        <access>read-only</access>
89568                    </field>
89569                </fields>
89570            </register>
89571            <register>
89572                <name>KEY3_4</name>
89573                <addressOffset>0x00003d70</addressOffset>
89574                <description>Bits 79:64 of OTP access key 3 (ECC)</description>
89575                <resetMask>0x00000000</resetMask>
89576                <fields>
89577                    <field>
89578                        <name>KEY3_4</name>
89579                        <bitRange>[15:0]</bitRange>
89580                        <access>read-only</access>
89581                    </field>
89582                </fields>
89583            </register>
89584            <register>
89585                <name>KEY3_5</name>
89586                <addressOffset>0x00003d74</addressOffset>
89587                <description>Bits 95:80 of OTP access key 3 (ECC)</description>
89588                <resetMask>0x00000000</resetMask>
89589                <fields>
89590                    <field>
89591                        <name>KEY3_5</name>
89592                        <bitRange>[15:0]</bitRange>
89593                        <access>read-only</access>
89594                    </field>
89595                </fields>
89596            </register>
89597            <register>
89598                <name>KEY3_6</name>
89599                <addressOffset>0x00003d78</addressOffset>
89600                <description>Bits 111:96 of OTP access key 3 (ECC)</description>
89601                <resetMask>0x00000000</resetMask>
89602                <fields>
89603                    <field>
89604                        <name>KEY3_6</name>
89605                        <bitRange>[15:0]</bitRange>
89606                        <access>read-only</access>
89607                    </field>
89608                </fields>
89609            </register>
89610            <register>
89611                <name>KEY3_7</name>
89612                <addressOffset>0x00003d7c</addressOffset>
89613                <description>Bits 127:112 of OTP access key 3 (ECC)</description>
89614                <resetMask>0x00000000</resetMask>
89615                <fields>
89616                    <field>
89617                        <name>KEY3_7</name>
89618                        <bitRange>[15:0]</bitRange>
89619                        <access>read-only</access>
89620                    </field>
89621                </fields>
89622            </register>
89623            <register>
89624                <name>KEY4_0</name>
89625                <addressOffset>0x00003d80</addressOffset>
89626                <description>Bits 15:0 of OTP access key 4 (ECC)</description>
89627                <resetMask>0x00000000</resetMask>
89628                <fields>
89629                    <field>
89630                        <name>KEY4_0</name>
89631                        <bitRange>[15:0]</bitRange>
89632                        <access>read-only</access>
89633                    </field>
89634                </fields>
89635            </register>
89636            <register>
89637                <name>KEY4_1</name>
89638                <addressOffset>0x00003d84</addressOffset>
89639                <description>Bits 31:16 of OTP access key 4 (ECC)</description>
89640                <resetMask>0x00000000</resetMask>
89641                <fields>
89642                    <field>
89643                        <name>KEY4_1</name>
89644                        <bitRange>[15:0]</bitRange>
89645                        <access>read-only</access>
89646                    </field>
89647                </fields>
89648            </register>
89649            <register>
89650                <name>KEY4_2</name>
89651                <addressOffset>0x00003d88</addressOffset>
89652                <description>Bits 47:32 of OTP access key 4 (ECC)</description>
89653                <resetMask>0x00000000</resetMask>
89654                <fields>
89655                    <field>
89656                        <name>KEY4_2</name>
89657                        <bitRange>[15:0]</bitRange>
89658                        <access>read-only</access>
89659                    </field>
89660                </fields>
89661            </register>
89662            <register>
89663                <name>KEY4_3</name>
89664                <addressOffset>0x00003d8c</addressOffset>
89665                <description>Bits 63:48 of OTP access key 4 (ECC)</description>
89666                <resetMask>0x00000000</resetMask>
89667                <fields>
89668                    <field>
89669                        <name>KEY4_3</name>
89670                        <bitRange>[15:0]</bitRange>
89671                        <access>read-only</access>
89672                    </field>
89673                </fields>
89674            </register>
89675            <register>
89676                <name>KEY4_4</name>
89677                <addressOffset>0x00003d90</addressOffset>
89678                <description>Bits 79:64 of OTP access key 4 (ECC)</description>
89679                <resetMask>0x00000000</resetMask>
89680                <fields>
89681                    <field>
89682                        <name>KEY4_4</name>
89683                        <bitRange>[15:0]</bitRange>
89684                        <access>read-only</access>
89685                    </field>
89686                </fields>
89687            </register>
89688            <register>
89689                <name>KEY4_5</name>
89690                <addressOffset>0x00003d94</addressOffset>
89691                <description>Bits 95:80 of OTP access key 4 (ECC)</description>
89692                <resetMask>0x00000000</resetMask>
89693                <fields>
89694                    <field>
89695                        <name>KEY4_5</name>
89696                        <bitRange>[15:0]</bitRange>
89697                        <access>read-only</access>
89698                    </field>
89699                </fields>
89700            </register>
89701            <register>
89702                <name>KEY4_6</name>
89703                <addressOffset>0x00003d98</addressOffset>
89704                <description>Bits 111:96 of OTP access key 4 (ECC)</description>
89705                <resetMask>0x00000000</resetMask>
89706                <fields>
89707                    <field>
89708                        <name>KEY4_6</name>
89709                        <bitRange>[15:0]</bitRange>
89710                        <access>read-only</access>
89711                    </field>
89712                </fields>
89713            </register>
89714            <register>
89715                <name>KEY4_7</name>
89716                <addressOffset>0x00003d9c</addressOffset>
89717                <description>Bits 127:112 of OTP access key 4 (ECC)</description>
89718                <resetMask>0x00000000</resetMask>
89719                <fields>
89720                    <field>
89721                        <name>KEY4_7</name>
89722                        <bitRange>[15:0]</bitRange>
89723                        <access>read-only</access>
89724                    </field>
89725                </fields>
89726            </register>
89727            <register>
89728                <name>KEY5_0</name>
89729                <addressOffset>0x00003da0</addressOffset>
89730                <description>Bits 15:0 of OTP access key 5 (ECC)</description>
89731                <resetMask>0x00000000</resetMask>
89732                <fields>
89733                    <field>
89734                        <name>KEY5_0</name>
89735                        <bitRange>[15:0]</bitRange>
89736                        <access>read-only</access>
89737                    </field>
89738                </fields>
89739            </register>
89740            <register>
89741                <name>KEY5_1</name>
89742                <addressOffset>0x00003da4</addressOffset>
89743                <description>Bits 31:16 of OTP access key 5 (ECC)</description>
89744                <resetMask>0x00000000</resetMask>
89745                <fields>
89746                    <field>
89747                        <name>KEY5_1</name>
89748                        <bitRange>[15:0]</bitRange>
89749                        <access>read-only</access>
89750                    </field>
89751                </fields>
89752            </register>
89753            <register>
89754                <name>KEY5_2</name>
89755                <addressOffset>0x00003da8</addressOffset>
89756                <description>Bits 47:32 of OTP access key 5 (ECC)</description>
89757                <resetMask>0x00000000</resetMask>
89758                <fields>
89759                    <field>
89760                        <name>KEY5_2</name>
89761                        <bitRange>[15:0]</bitRange>
89762                        <access>read-only</access>
89763                    </field>
89764                </fields>
89765            </register>
89766            <register>
89767                <name>KEY5_3</name>
89768                <addressOffset>0x00003dac</addressOffset>
89769                <description>Bits 63:48 of OTP access key 5 (ECC)</description>
89770                <resetMask>0x00000000</resetMask>
89771                <fields>
89772                    <field>
89773                        <name>KEY5_3</name>
89774                        <bitRange>[15:0]</bitRange>
89775                        <access>read-only</access>
89776                    </field>
89777                </fields>
89778            </register>
89779            <register>
89780                <name>KEY5_4</name>
89781                <addressOffset>0x00003db0</addressOffset>
89782                <description>Bits 79:64 of OTP access key 5 (ECC)</description>
89783                <resetMask>0x00000000</resetMask>
89784                <fields>
89785                    <field>
89786                        <name>KEY5_4</name>
89787                        <bitRange>[15:0]</bitRange>
89788                        <access>read-only</access>
89789                    </field>
89790                </fields>
89791            </register>
89792            <register>
89793                <name>KEY5_5</name>
89794                <addressOffset>0x00003db4</addressOffset>
89795                <description>Bits 95:80 of OTP access key 5 (ECC)</description>
89796                <resetMask>0x00000000</resetMask>
89797                <fields>
89798                    <field>
89799                        <name>KEY5_5</name>
89800                        <bitRange>[15:0]</bitRange>
89801                        <access>read-only</access>
89802                    </field>
89803                </fields>
89804            </register>
89805            <register>
89806                <name>KEY5_6</name>
89807                <addressOffset>0x00003db8</addressOffset>
89808                <description>Bits 111:96 of OTP access key 5 (ECC)</description>
89809                <resetMask>0x00000000</resetMask>
89810                <fields>
89811                    <field>
89812                        <name>KEY5_6</name>
89813                        <bitRange>[15:0]</bitRange>
89814                        <access>read-only</access>
89815                    </field>
89816                </fields>
89817            </register>
89818            <register>
89819                <name>KEY5_7</name>
89820                <addressOffset>0x00003dbc</addressOffset>
89821                <description>Bits 127:112 of OTP access key 5 (ECC)</description>
89822                <resetMask>0x00000000</resetMask>
89823                <fields>
89824                    <field>
89825                        <name>KEY5_7</name>
89826                        <bitRange>[15:0]</bitRange>
89827                        <access>read-only</access>
89828                    </field>
89829                </fields>
89830            </register>
89831            <register>
89832                <name>KEY6_0</name>
89833                <addressOffset>0x00003dc0</addressOffset>
89834                <description>Bits 15:0 of OTP access key 6 (ECC)</description>
89835                <resetMask>0x00000000</resetMask>
89836                <fields>
89837                    <field>
89838                        <name>KEY6_0</name>
89839                        <bitRange>[15:0]</bitRange>
89840                        <access>read-only</access>
89841                    </field>
89842                </fields>
89843            </register>
89844            <register>
89845                <name>KEY6_1</name>
89846                <addressOffset>0x00003dc4</addressOffset>
89847                <description>Bits 31:16 of OTP access key 6 (ECC)</description>
89848                <resetMask>0x00000000</resetMask>
89849                <fields>
89850                    <field>
89851                        <name>KEY6_1</name>
89852                        <bitRange>[15:0]</bitRange>
89853                        <access>read-only</access>
89854                    </field>
89855                </fields>
89856            </register>
89857            <register>
89858                <name>KEY6_2</name>
89859                <addressOffset>0x00003dc8</addressOffset>
89860                <description>Bits 47:32 of OTP access key 6 (ECC)</description>
89861                <resetMask>0x00000000</resetMask>
89862                <fields>
89863                    <field>
89864                        <name>KEY6_2</name>
89865                        <bitRange>[15:0]</bitRange>
89866                        <access>read-only</access>
89867                    </field>
89868                </fields>
89869            </register>
89870            <register>
89871                <name>KEY6_3</name>
89872                <addressOffset>0x00003dcc</addressOffset>
89873                <description>Bits 63:48 of OTP access key 6 (ECC)</description>
89874                <resetMask>0x00000000</resetMask>
89875                <fields>
89876                    <field>
89877                        <name>KEY6_3</name>
89878                        <bitRange>[15:0]</bitRange>
89879                        <access>read-only</access>
89880                    </field>
89881                </fields>
89882            </register>
89883            <register>
89884                <name>KEY6_4</name>
89885                <addressOffset>0x00003dd0</addressOffset>
89886                <description>Bits 79:64 of OTP access key 6 (ECC)</description>
89887                <resetMask>0x00000000</resetMask>
89888                <fields>
89889                    <field>
89890                        <name>KEY6_4</name>
89891                        <bitRange>[15:0]</bitRange>
89892                        <access>read-only</access>
89893                    </field>
89894                </fields>
89895            </register>
89896            <register>
89897                <name>KEY6_5</name>
89898                <addressOffset>0x00003dd4</addressOffset>
89899                <description>Bits 95:80 of OTP access key 6 (ECC)</description>
89900                <resetMask>0x00000000</resetMask>
89901                <fields>
89902                    <field>
89903                        <name>KEY6_5</name>
89904                        <bitRange>[15:0]</bitRange>
89905                        <access>read-only</access>
89906                    </field>
89907                </fields>
89908            </register>
89909            <register>
89910                <name>KEY6_6</name>
89911                <addressOffset>0x00003dd8</addressOffset>
89912                <description>Bits 111:96 of OTP access key 6 (ECC)</description>
89913                <resetMask>0x00000000</resetMask>
89914                <fields>
89915                    <field>
89916                        <name>KEY6_6</name>
89917                        <bitRange>[15:0]</bitRange>
89918                        <access>read-only</access>
89919                    </field>
89920                </fields>
89921            </register>
89922            <register>
89923                <name>KEY6_7</name>
89924                <addressOffset>0x00003ddc</addressOffset>
89925                <description>Bits 127:112 of OTP access key 6 (ECC)</description>
89926                <resetMask>0x00000000</resetMask>
89927                <fields>
89928                    <field>
89929                        <name>KEY6_7</name>
89930                        <bitRange>[15:0]</bitRange>
89931                        <access>read-only</access>
89932                    </field>
89933                </fields>
89934            </register>
89935            <register>
89936                <name>KEY1_VALID</name>
89937                <addressOffset>0x00003de4</addressOffset>
89938                <description>Valid flag for key 1. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
89939                <resetValue>0x00000000</resetValue>
89940                <fields>
89941                    <field>
89942                        <name>VALID_R2</name>
89943                        <description>Redundant copy of VALID, with 3-way majority vote</description>
89944                        <bitRange>[16:16]</bitRange>
89945                        <access>read-only</access>
89946                    </field>
89947                    <field>
89948                        <name>VALID_R1</name>
89949                        <description>Redundant copy of VALID, with 3-way majority vote</description>
89950                        <bitRange>[8:8]</bitRange>
89951                        <access>read-only</access>
89952                    </field>
89953                    <field>
89954                        <name>VALID</name>
89955                        <bitRange>[0:0]</bitRange>
89956                        <access>read-only</access>
89957                    </field>
89958                </fields>
89959            </register>
89960            <register>
89961                <name>KEY2_VALID</name>
89962                <addressOffset>0x00003de8</addressOffset>
89963                <description>Valid flag for key 2. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
89964                <resetValue>0x00000000</resetValue>
89965                <fields>
89966                    <field>
89967                        <name>VALID_R2</name>
89968                        <description>Redundant copy of VALID, with 3-way majority vote</description>
89969                        <bitRange>[16:16]</bitRange>
89970                        <access>read-only</access>
89971                    </field>
89972                    <field>
89973                        <name>VALID_R1</name>
89974                        <description>Redundant copy of VALID, with 3-way majority vote</description>
89975                        <bitRange>[8:8]</bitRange>
89976                        <access>read-only</access>
89977                    </field>
89978                    <field>
89979                        <name>VALID</name>
89980                        <bitRange>[0:0]</bitRange>
89981                        <access>read-only</access>
89982                    </field>
89983                </fields>
89984            </register>
89985            <register>
89986                <name>KEY3_VALID</name>
89987                <addressOffset>0x00003dec</addressOffset>
89988                <description>Valid flag for key 3. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
89989                <resetValue>0x00000000</resetValue>
89990                <fields>
89991                    <field>
89992                        <name>VALID_R2</name>
89993                        <description>Redundant copy of VALID, with 3-way majority vote</description>
89994                        <bitRange>[16:16]</bitRange>
89995                        <access>read-only</access>
89996                    </field>
89997                    <field>
89998                        <name>VALID_R1</name>
89999                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90000                        <bitRange>[8:8]</bitRange>
90001                        <access>read-only</access>
90002                    </field>
90003                    <field>
90004                        <name>VALID</name>
90005                        <bitRange>[0:0]</bitRange>
90006                        <access>read-only</access>
90007                    </field>
90008                </fields>
90009            </register>
90010            <register>
90011                <name>KEY4_VALID</name>
90012                <addressOffset>0x00003df0</addressOffset>
90013                <description>Valid flag for key 4. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
90014                <resetValue>0x00000000</resetValue>
90015                <fields>
90016                    <field>
90017                        <name>VALID_R2</name>
90018                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90019                        <bitRange>[16:16]</bitRange>
90020                        <access>read-only</access>
90021                    </field>
90022                    <field>
90023                        <name>VALID_R1</name>
90024                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90025                        <bitRange>[8:8]</bitRange>
90026                        <access>read-only</access>
90027                    </field>
90028                    <field>
90029                        <name>VALID</name>
90030                        <bitRange>[0:0]</bitRange>
90031                        <access>read-only</access>
90032                    </field>
90033                </fields>
90034            </register>
90035            <register>
90036                <name>KEY5_VALID</name>
90037                <addressOffset>0x00003df4</addressOffset>
90038                <description>Valid flag for key 5. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
90039                <resetValue>0x00000000</resetValue>
90040                <fields>
90041                    <field>
90042                        <name>VALID_R2</name>
90043                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90044                        <bitRange>[16:16]</bitRange>
90045                        <access>read-only</access>
90046                    </field>
90047                    <field>
90048                        <name>VALID_R1</name>
90049                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90050                        <bitRange>[8:8]</bitRange>
90051                        <access>read-only</access>
90052                    </field>
90053                    <field>
90054                        <name>VALID</name>
90055                        <bitRange>[0:0]</bitRange>
90056                        <access>read-only</access>
90057                    </field>
90058                </fields>
90059            </register>
90060            <register>
90061                <name>KEY6_VALID</name>
90062                <addressOffset>0x00003df8</addressOffset>
90063                <description>Valid flag for key 6. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.</description>
90064                <resetValue>0x00000000</resetValue>
90065                <fields>
90066                    <field>
90067                        <name>VALID_R2</name>
90068                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90069                        <bitRange>[16:16]</bitRange>
90070                        <access>read-only</access>
90071                    </field>
90072                    <field>
90073                        <name>VALID_R1</name>
90074                        <description>Redundant copy of VALID, with 3-way majority vote</description>
90075                        <bitRange>[8:8]</bitRange>
90076                        <access>read-only</access>
90077                    </field>
90078                    <field>
90079                        <name>VALID</name>
90080                        <bitRange>[0:0]</bitRange>
90081                        <access>read-only</access>
90082                    </field>
90083                </fields>
90084            </register>
90085            <register>
90086                <name>PAGE0_LOCK0</name>
90087                <addressOffset>0x00003e00</addressOffset>
90088                <description>Lock configuration LSBs for page 0 (rows 0x0 through 0x3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90089
90090                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90091                <resetValue>0x00000000</resetValue>
90092                <fields>
90093                    <field>
90094                        <name>R2</name>
90095                        <description>Redundant copy of bits 7:0</description>
90096                        <bitRange>[23:16]</bitRange>
90097                        <access>read-only</access>
90098                    </field>
90099                    <field>
90100                        <name>R1</name>
90101                        <description>Redundant copy of bits 7:0</description>
90102                        <bitRange>[15:8]</bitRange>
90103                        <access>read-only</access>
90104                    </field>
90105                    <field>
90106                        <name>NO_KEY_STATE</name>
90107                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90108                        <bitRange>[6:6]</bitRange>
90109                        <access>read-only</access>
90110                        <enumeratedValues>
90111                            <enumeratedValue>
90112                                <name>read_only</name>
90113                                <value>0</value>
90114                            </enumeratedValue>
90115                            <enumeratedValue>
90116                                <name>inaccessible</name>
90117                                <value>1</value>
90118                            </enumeratedValue>
90119                        </enumeratedValues>
90120                    </field>
90121                    <field>
90122                        <name>KEY_R</name>
90123                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90124                        <bitRange>[5:3]</bitRange>
90125                        <access>read-only</access>
90126                    </field>
90127                    <field>
90128                        <name>KEY_W</name>
90129                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90130                        <bitRange>[2:0]</bitRange>
90131                        <access>read-only</access>
90132                    </field>
90133                </fields>
90134            </register>
90135            <register>
90136                <name>PAGE0_LOCK1</name>
90137                <addressOffset>0x00003e04</addressOffset>
90138                <description>Lock configuration MSBs for page 0 (rows 0x0 through 0x3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90139
90140                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90141                <resetValue>0x00000000</resetValue>
90142                <fields>
90143                    <field>
90144                        <name>R2</name>
90145                        <description>Redundant copy of bits 7:0</description>
90146                        <bitRange>[23:16]</bitRange>
90147                        <access>read-only</access>
90148                    </field>
90149                    <field>
90150                        <name>R1</name>
90151                        <description>Redundant copy of bits 7:0</description>
90152                        <bitRange>[15:8]</bitRange>
90153                        <access>read-only</access>
90154                    </field>
90155                    <field>
90156                        <name>LOCK_BL</name>
90157                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90158                        <bitRange>[5:4]</bitRange>
90159                        <access>read-only</access>
90160                        <enumeratedValues>
90161                            <enumeratedValue>
90162                                <name>read_write</name>
90163                                <value>0</value>
90164                                <description>Bootloader permits user reads and writes to this page</description>
90165                            </enumeratedValue>
90166                            <enumeratedValue>
90167                                <name>read_only</name>
90168                                <value>1</value>
90169                                <description>Bootloader permits user reads of this page</description>
90170                            </enumeratedValue>
90171                            <enumeratedValue>
90172                                <name>reserved</name>
90173                                <value>2</value>
90174                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90175                            </enumeratedValue>
90176                            <enumeratedValue>
90177                                <name>inaccessible</name>
90178                                <value>3</value>
90179                                <description>Bootloader does not permit user access to this page</description>
90180                            </enumeratedValue>
90181                        </enumeratedValues>
90182                    </field>
90183                    <field>
90184                        <name>LOCK_NS</name>
90185                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90186
90187                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90188                        <bitRange>[3:2]</bitRange>
90189                        <access>read-only</access>
90190                        <enumeratedValues>
90191                            <enumeratedValue>
90192                                <name>read_write</name>
90193                                <value>0</value>
90194                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90195                            </enumeratedValue>
90196                            <enumeratedValue>
90197                                <name>read_only</name>
90198                                <value>1</value>
90199                                <description>Page can be read by Non-secure software</description>
90200                            </enumeratedValue>
90201                            <enumeratedValue>
90202                                <name>reserved</name>
90203                                <value>2</value>
90204                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90205                            </enumeratedValue>
90206                            <enumeratedValue>
90207                                <name>inaccessible</name>
90208                                <value>3</value>
90209                                <description>Page can not be accessed by Non-secure software.</description>
90210                            </enumeratedValue>
90211                        </enumeratedValues>
90212                    </field>
90213                    <field>
90214                        <name>LOCK_S</name>
90215                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
90216                        <bitRange>[1:0]</bitRange>
90217                        <access>read-only</access>
90218                        <enumeratedValues>
90219                            <enumeratedValue>
90220                                <name>read_write</name>
90221                                <value>0</value>
90222                                <description>Page is fully accessible by Secure software.</description>
90223                            </enumeratedValue>
90224                            <enumeratedValue>
90225                                <name>read_only</name>
90226                                <value>1</value>
90227                                <description>Page can be read by Secure software, but can not be written.</description>
90228                            </enumeratedValue>
90229                            <enumeratedValue>
90230                                <name>reserved</name>
90231                                <value>2</value>
90232                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90233                            </enumeratedValue>
90234                            <enumeratedValue>
90235                                <name>inaccessible</name>
90236                                <value>3</value>
90237                                <description>Page can not be accessed by Secure software.</description>
90238                            </enumeratedValue>
90239                        </enumeratedValues>
90240                    </field>
90241                </fields>
90242            </register>
90243            <register>
90244                <name>PAGE1_LOCK0</name>
90245                <addressOffset>0x00003e08</addressOffset>
90246                <description>Lock configuration LSBs for page 1 (rows 0x40 through 0x7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90247
90248                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90249                <resetValue>0x00000000</resetValue>
90250                <fields>
90251                    <field>
90252                        <name>R2</name>
90253                        <description>Redundant copy of bits 7:0</description>
90254                        <bitRange>[23:16]</bitRange>
90255                        <access>read-only</access>
90256                    </field>
90257                    <field>
90258                        <name>R1</name>
90259                        <description>Redundant copy of bits 7:0</description>
90260                        <bitRange>[15:8]</bitRange>
90261                        <access>read-only</access>
90262                    </field>
90263                    <field>
90264                        <name>NO_KEY_STATE</name>
90265                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90266                        <bitRange>[6:6]</bitRange>
90267                        <access>read-only</access>
90268                        <enumeratedValues>
90269                            <enumeratedValue>
90270                                <name>read_only</name>
90271                                <value>0</value>
90272                            </enumeratedValue>
90273                            <enumeratedValue>
90274                                <name>inaccessible</name>
90275                                <value>1</value>
90276                            </enumeratedValue>
90277                        </enumeratedValues>
90278                    </field>
90279                    <field>
90280                        <name>KEY_R</name>
90281                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90282                        <bitRange>[5:3]</bitRange>
90283                        <access>read-only</access>
90284                    </field>
90285                    <field>
90286                        <name>KEY_W</name>
90287                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90288                        <bitRange>[2:0]</bitRange>
90289                        <access>read-only</access>
90290                    </field>
90291                </fields>
90292            </register>
90293            <register>
90294                <name>PAGE1_LOCK1</name>
90295                <addressOffset>0x00003e0c</addressOffset>
90296                <description>Lock configuration MSBs for page 1 (rows 0x40 through 0x7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90297
90298                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90299                <resetValue>0x00000000</resetValue>
90300                <fields>
90301                    <field>
90302                        <name>R2</name>
90303                        <description>Redundant copy of bits 7:0</description>
90304                        <bitRange>[23:16]</bitRange>
90305                        <access>read-only</access>
90306                    </field>
90307                    <field>
90308                        <name>R1</name>
90309                        <description>Redundant copy of bits 7:0</description>
90310                        <bitRange>[15:8]</bitRange>
90311                        <access>read-only</access>
90312                    </field>
90313                    <field>
90314                        <name>LOCK_BL</name>
90315                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90316                        <bitRange>[5:4]</bitRange>
90317                        <access>read-only</access>
90318                        <enumeratedValues>
90319                            <enumeratedValue>
90320                                <name>read_write</name>
90321                                <value>0</value>
90322                                <description>Bootloader permits user reads and writes to this page</description>
90323                            </enumeratedValue>
90324                            <enumeratedValue>
90325                                <name>read_only</name>
90326                                <value>1</value>
90327                                <description>Bootloader permits user reads of this page</description>
90328                            </enumeratedValue>
90329                            <enumeratedValue>
90330                                <name>reserved</name>
90331                                <value>2</value>
90332                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90333                            </enumeratedValue>
90334                            <enumeratedValue>
90335                                <name>inaccessible</name>
90336                                <value>3</value>
90337                                <description>Bootloader does not permit user access to this page</description>
90338                            </enumeratedValue>
90339                        </enumeratedValues>
90340                    </field>
90341                    <field>
90342                        <name>LOCK_NS</name>
90343                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90344
90345                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90346                        <bitRange>[3:2]</bitRange>
90347                        <access>read-only</access>
90348                        <enumeratedValues>
90349                            <enumeratedValue>
90350                                <name>read_write</name>
90351                                <value>0</value>
90352                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90353                            </enumeratedValue>
90354                            <enumeratedValue>
90355                                <name>read_only</name>
90356                                <value>1</value>
90357                                <description>Page can be read by Non-secure software</description>
90358                            </enumeratedValue>
90359                            <enumeratedValue>
90360                                <name>reserved</name>
90361                                <value>2</value>
90362                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90363                            </enumeratedValue>
90364                            <enumeratedValue>
90365                                <name>inaccessible</name>
90366                                <value>3</value>
90367                                <description>Page can not be accessed by Non-secure software.</description>
90368                            </enumeratedValue>
90369                        </enumeratedValues>
90370                    </field>
90371                    <field>
90372                        <name>LOCK_S</name>
90373                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
90374                        <bitRange>[1:0]</bitRange>
90375                        <access>read-only</access>
90376                        <enumeratedValues>
90377                            <enumeratedValue>
90378                                <name>read_write</name>
90379                                <value>0</value>
90380                                <description>Page is fully accessible by Secure software.</description>
90381                            </enumeratedValue>
90382                            <enumeratedValue>
90383                                <name>read_only</name>
90384                                <value>1</value>
90385                                <description>Page can be read by Secure software, but can not be written.</description>
90386                            </enumeratedValue>
90387                            <enumeratedValue>
90388                                <name>reserved</name>
90389                                <value>2</value>
90390                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90391                            </enumeratedValue>
90392                            <enumeratedValue>
90393                                <name>inaccessible</name>
90394                                <value>3</value>
90395                                <description>Page can not be accessed by Secure software.</description>
90396                            </enumeratedValue>
90397                        </enumeratedValues>
90398                    </field>
90399                </fields>
90400            </register>
90401            <register>
90402                <name>PAGE2_LOCK0</name>
90403                <addressOffset>0x00003e10</addressOffset>
90404                <description>Lock configuration LSBs for page 2 (rows 0x80 through 0xbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90405
90406                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90407                <resetValue>0x00000000</resetValue>
90408                <fields>
90409                    <field>
90410                        <name>R2</name>
90411                        <description>Redundant copy of bits 7:0</description>
90412                        <bitRange>[23:16]</bitRange>
90413                        <access>read-only</access>
90414                    </field>
90415                    <field>
90416                        <name>R1</name>
90417                        <description>Redundant copy of bits 7:0</description>
90418                        <bitRange>[15:8]</bitRange>
90419                        <access>read-only</access>
90420                    </field>
90421                    <field>
90422                        <name>NO_KEY_STATE</name>
90423                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90424                        <bitRange>[6:6]</bitRange>
90425                        <access>read-only</access>
90426                        <enumeratedValues>
90427                            <enumeratedValue>
90428                                <name>read_only</name>
90429                                <value>0</value>
90430                            </enumeratedValue>
90431                            <enumeratedValue>
90432                                <name>inaccessible</name>
90433                                <value>1</value>
90434                            </enumeratedValue>
90435                        </enumeratedValues>
90436                    </field>
90437                    <field>
90438                        <name>KEY_R</name>
90439                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90440                        <bitRange>[5:3]</bitRange>
90441                        <access>read-only</access>
90442                    </field>
90443                    <field>
90444                        <name>KEY_W</name>
90445                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90446                        <bitRange>[2:0]</bitRange>
90447                        <access>read-only</access>
90448                    </field>
90449                </fields>
90450            </register>
90451            <register>
90452                <name>PAGE2_LOCK1</name>
90453                <addressOffset>0x00003e14</addressOffset>
90454                <description>Lock configuration MSBs for page 2 (rows 0x80 through 0xbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90455
90456                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90457                <resetValue>0x00000000</resetValue>
90458                <fields>
90459                    <field>
90460                        <name>R2</name>
90461                        <description>Redundant copy of bits 7:0</description>
90462                        <bitRange>[23:16]</bitRange>
90463                        <access>read-only</access>
90464                    </field>
90465                    <field>
90466                        <name>R1</name>
90467                        <description>Redundant copy of bits 7:0</description>
90468                        <bitRange>[15:8]</bitRange>
90469                        <access>read-only</access>
90470                    </field>
90471                    <field>
90472                        <name>LOCK_BL</name>
90473                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90474                        <bitRange>[5:4]</bitRange>
90475                        <access>read-only</access>
90476                        <enumeratedValues>
90477                            <enumeratedValue>
90478                                <name>read_write</name>
90479                                <value>0</value>
90480                                <description>Bootloader permits user reads and writes to this page</description>
90481                            </enumeratedValue>
90482                            <enumeratedValue>
90483                                <name>read_only</name>
90484                                <value>1</value>
90485                                <description>Bootloader permits user reads of this page</description>
90486                            </enumeratedValue>
90487                            <enumeratedValue>
90488                                <name>reserved</name>
90489                                <value>2</value>
90490                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90491                            </enumeratedValue>
90492                            <enumeratedValue>
90493                                <name>inaccessible</name>
90494                                <value>3</value>
90495                                <description>Bootloader does not permit user access to this page</description>
90496                            </enumeratedValue>
90497                        </enumeratedValues>
90498                    </field>
90499                    <field>
90500                        <name>LOCK_NS</name>
90501                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90502
90503                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90504                        <bitRange>[3:2]</bitRange>
90505                        <access>read-only</access>
90506                        <enumeratedValues>
90507                            <enumeratedValue>
90508                                <name>read_write</name>
90509                                <value>0</value>
90510                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90511                            </enumeratedValue>
90512                            <enumeratedValue>
90513                                <name>read_only</name>
90514                                <value>1</value>
90515                                <description>Page can be read by Non-secure software</description>
90516                            </enumeratedValue>
90517                            <enumeratedValue>
90518                                <name>reserved</name>
90519                                <value>2</value>
90520                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90521                            </enumeratedValue>
90522                            <enumeratedValue>
90523                                <name>inaccessible</name>
90524                                <value>3</value>
90525                                <description>Page can not be accessed by Non-secure software.</description>
90526                            </enumeratedValue>
90527                        </enumeratedValues>
90528                    </field>
90529                    <field>
90530                        <name>LOCK_S</name>
90531                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
90532                        <bitRange>[1:0]</bitRange>
90533                        <access>read-only</access>
90534                        <enumeratedValues>
90535                            <enumeratedValue>
90536                                <name>read_write</name>
90537                                <value>0</value>
90538                                <description>Page is fully accessible by Secure software.</description>
90539                            </enumeratedValue>
90540                            <enumeratedValue>
90541                                <name>read_only</name>
90542                                <value>1</value>
90543                                <description>Page can be read by Secure software, but can not be written.</description>
90544                            </enumeratedValue>
90545                            <enumeratedValue>
90546                                <name>reserved</name>
90547                                <value>2</value>
90548                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90549                            </enumeratedValue>
90550                            <enumeratedValue>
90551                                <name>inaccessible</name>
90552                                <value>3</value>
90553                                <description>Page can not be accessed by Secure software.</description>
90554                            </enumeratedValue>
90555                        </enumeratedValues>
90556                    </field>
90557                </fields>
90558            </register>
90559            <register>
90560                <name>PAGE3_LOCK0</name>
90561                <addressOffset>0x00003e18</addressOffset>
90562                <description>Lock configuration LSBs for page 3 (rows 0xc0 through 0xff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90563
90564                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90565                <resetValue>0x00000000</resetValue>
90566                <fields>
90567                    <field>
90568                        <name>R2</name>
90569                        <description>Redundant copy of bits 7:0</description>
90570                        <bitRange>[23:16]</bitRange>
90571                        <access>read-only</access>
90572                    </field>
90573                    <field>
90574                        <name>R1</name>
90575                        <description>Redundant copy of bits 7:0</description>
90576                        <bitRange>[15:8]</bitRange>
90577                        <access>read-only</access>
90578                    </field>
90579                    <field>
90580                        <name>NO_KEY_STATE</name>
90581                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90582                        <bitRange>[6:6]</bitRange>
90583                        <access>read-only</access>
90584                        <enumeratedValues>
90585                            <enumeratedValue>
90586                                <name>read_only</name>
90587                                <value>0</value>
90588                            </enumeratedValue>
90589                            <enumeratedValue>
90590                                <name>inaccessible</name>
90591                                <value>1</value>
90592                            </enumeratedValue>
90593                        </enumeratedValues>
90594                    </field>
90595                    <field>
90596                        <name>KEY_R</name>
90597                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90598                        <bitRange>[5:3]</bitRange>
90599                        <access>read-only</access>
90600                    </field>
90601                    <field>
90602                        <name>KEY_W</name>
90603                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90604                        <bitRange>[2:0]</bitRange>
90605                        <access>read-only</access>
90606                    </field>
90607                </fields>
90608            </register>
90609            <register>
90610                <name>PAGE3_LOCK1</name>
90611                <addressOffset>0x00003e1c</addressOffset>
90612                <description>Lock configuration MSBs for page 3 (rows 0xc0 through 0xff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90613
90614                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90615                <resetValue>0x00000000</resetValue>
90616                <fields>
90617                    <field>
90618                        <name>R2</name>
90619                        <description>Redundant copy of bits 7:0</description>
90620                        <bitRange>[23:16]</bitRange>
90621                        <access>read-only</access>
90622                    </field>
90623                    <field>
90624                        <name>R1</name>
90625                        <description>Redundant copy of bits 7:0</description>
90626                        <bitRange>[15:8]</bitRange>
90627                        <access>read-only</access>
90628                    </field>
90629                    <field>
90630                        <name>LOCK_BL</name>
90631                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90632                        <bitRange>[5:4]</bitRange>
90633                        <access>read-only</access>
90634                        <enumeratedValues>
90635                            <enumeratedValue>
90636                                <name>read_write</name>
90637                                <value>0</value>
90638                                <description>Bootloader permits user reads and writes to this page</description>
90639                            </enumeratedValue>
90640                            <enumeratedValue>
90641                                <name>read_only</name>
90642                                <value>1</value>
90643                                <description>Bootloader permits user reads of this page</description>
90644                            </enumeratedValue>
90645                            <enumeratedValue>
90646                                <name>reserved</name>
90647                                <value>2</value>
90648                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90649                            </enumeratedValue>
90650                            <enumeratedValue>
90651                                <name>inaccessible</name>
90652                                <value>3</value>
90653                                <description>Bootloader does not permit user access to this page</description>
90654                            </enumeratedValue>
90655                        </enumeratedValues>
90656                    </field>
90657                    <field>
90658                        <name>LOCK_NS</name>
90659                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90660
90661                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90662                        <bitRange>[3:2]</bitRange>
90663                        <access>read-only</access>
90664                        <enumeratedValues>
90665                            <enumeratedValue>
90666                                <name>read_write</name>
90667                                <value>0</value>
90668                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90669                            </enumeratedValue>
90670                            <enumeratedValue>
90671                                <name>read_only</name>
90672                                <value>1</value>
90673                                <description>Page can be read by Non-secure software</description>
90674                            </enumeratedValue>
90675                            <enumeratedValue>
90676                                <name>reserved</name>
90677                                <value>2</value>
90678                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90679                            </enumeratedValue>
90680                            <enumeratedValue>
90681                                <name>inaccessible</name>
90682                                <value>3</value>
90683                                <description>Page can not be accessed by Non-secure software.</description>
90684                            </enumeratedValue>
90685                        </enumeratedValues>
90686                    </field>
90687                    <field>
90688                        <name>LOCK_S</name>
90689                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
90690                        <bitRange>[1:0]</bitRange>
90691                        <access>read-only</access>
90692                        <enumeratedValues>
90693                            <enumeratedValue>
90694                                <name>read_write</name>
90695                                <value>0</value>
90696                                <description>Page is fully accessible by Secure software.</description>
90697                            </enumeratedValue>
90698                            <enumeratedValue>
90699                                <name>read_only</name>
90700                                <value>1</value>
90701                                <description>Page can be read by Secure software, but can not be written.</description>
90702                            </enumeratedValue>
90703                            <enumeratedValue>
90704                                <name>reserved</name>
90705                                <value>2</value>
90706                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90707                            </enumeratedValue>
90708                            <enumeratedValue>
90709                                <name>inaccessible</name>
90710                                <value>3</value>
90711                                <description>Page can not be accessed by Secure software.</description>
90712                            </enumeratedValue>
90713                        </enumeratedValues>
90714                    </field>
90715                </fields>
90716            </register>
90717            <register>
90718                <name>PAGE4_LOCK0</name>
90719                <addressOffset>0x00003e20</addressOffset>
90720                <description>Lock configuration LSBs for page 4 (rows 0x100 through 0x13f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90721
90722                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90723                <resetValue>0x00000000</resetValue>
90724                <fields>
90725                    <field>
90726                        <name>R2</name>
90727                        <description>Redundant copy of bits 7:0</description>
90728                        <bitRange>[23:16]</bitRange>
90729                        <access>read-only</access>
90730                    </field>
90731                    <field>
90732                        <name>R1</name>
90733                        <description>Redundant copy of bits 7:0</description>
90734                        <bitRange>[15:8]</bitRange>
90735                        <access>read-only</access>
90736                    </field>
90737                    <field>
90738                        <name>NO_KEY_STATE</name>
90739                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90740                        <bitRange>[6:6]</bitRange>
90741                        <access>read-only</access>
90742                        <enumeratedValues>
90743                            <enumeratedValue>
90744                                <name>read_only</name>
90745                                <value>0</value>
90746                            </enumeratedValue>
90747                            <enumeratedValue>
90748                                <name>inaccessible</name>
90749                                <value>1</value>
90750                            </enumeratedValue>
90751                        </enumeratedValues>
90752                    </field>
90753                    <field>
90754                        <name>KEY_R</name>
90755                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90756                        <bitRange>[5:3]</bitRange>
90757                        <access>read-only</access>
90758                    </field>
90759                    <field>
90760                        <name>KEY_W</name>
90761                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90762                        <bitRange>[2:0]</bitRange>
90763                        <access>read-only</access>
90764                    </field>
90765                </fields>
90766            </register>
90767            <register>
90768                <name>PAGE4_LOCK1</name>
90769                <addressOffset>0x00003e24</addressOffset>
90770                <description>Lock configuration MSBs for page 4 (rows 0x100 through 0x13f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90771
90772                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90773                <resetValue>0x00000000</resetValue>
90774                <fields>
90775                    <field>
90776                        <name>R2</name>
90777                        <description>Redundant copy of bits 7:0</description>
90778                        <bitRange>[23:16]</bitRange>
90779                        <access>read-only</access>
90780                    </field>
90781                    <field>
90782                        <name>R1</name>
90783                        <description>Redundant copy of bits 7:0</description>
90784                        <bitRange>[15:8]</bitRange>
90785                        <access>read-only</access>
90786                    </field>
90787                    <field>
90788                        <name>LOCK_BL</name>
90789                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90790                        <bitRange>[5:4]</bitRange>
90791                        <access>read-only</access>
90792                        <enumeratedValues>
90793                            <enumeratedValue>
90794                                <name>read_write</name>
90795                                <value>0</value>
90796                                <description>Bootloader permits user reads and writes to this page</description>
90797                            </enumeratedValue>
90798                            <enumeratedValue>
90799                                <name>read_only</name>
90800                                <value>1</value>
90801                                <description>Bootloader permits user reads of this page</description>
90802                            </enumeratedValue>
90803                            <enumeratedValue>
90804                                <name>reserved</name>
90805                                <value>2</value>
90806                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90807                            </enumeratedValue>
90808                            <enumeratedValue>
90809                                <name>inaccessible</name>
90810                                <value>3</value>
90811                                <description>Bootloader does not permit user access to this page</description>
90812                            </enumeratedValue>
90813                        </enumeratedValues>
90814                    </field>
90815                    <field>
90816                        <name>LOCK_NS</name>
90817                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90818
90819                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90820                        <bitRange>[3:2]</bitRange>
90821                        <access>read-only</access>
90822                        <enumeratedValues>
90823                            <enumeratedValue>
90824                                <name>read_write</name>
90825                                <value>0</value>
90826                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90827                            </enumeratedValue>
90828                            <enumeratedValue>
90829                                <name>read_only</name>
90830                                <value>1</value>
90831                                <description>Page can be read by Non-secure software</description>
90832                            </enumeratedValue>
90833                            <enumeratedValue>
90834                                <name>reserved</name>
90835                                <value>2</value>
90836                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90837                            </enumeratedValue>
90838                            <enumeratedValue>
90839                                <name>inaccessible</name>
90840                                <value>3</value>
90841                                <description>Page can not be accessed by Non-secure software.</description>
90842                            </enumeratedValue>
90843                        </enumeratedValues>
90844                    </field>
90845                    <field>
90846                        <name>LOCK_S</name>
90847                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
90848                        <bitRange>[1:0]</bitRange>
90849                        <access>read-only</access>
90850                        <enumeratedValues>
90851                            <enumeratedValue>
90852                                <name>read_write</name>
90853                                <value>0</value>
90854                                <description>Page is fully accessible by Secure software.</description>
90855                            </enumeratedValue>
90856                            <enumeratedValue>
90857                                <name>read_only</name>
90858                                <value>1</value>
90859                                <description>Page can be read by Secure software, but can not be written.</description>
90860                            </enumeratedValue>
90861                            <enumeratedValue>
90862                                <name>reserved</name>
90863                                <value>2</value>
90864                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90865                            </enumeratedValue>
90866                            <enumeratedValue>
90867                                <name>inaccessible</name>
90868                                <value>3</value>
90869                                <description>Page can not be accessed by Secure software.</description>
90870                            </enumeratedValue>
90871                        </enumeratedValues>
90872                    </field>
90873                </fields>
90874            </register>
90875            <register>
90876                <name>PAGE5_LOCK0</name>
90877                <addressOffset>0x00003e28</addressOffset>
90878                <description>Lock configuration LSBs for page 5 (rows 0x140 through 0x17f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90879
90880                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90881                <resetValue>0x00000000</resetValue>
90882                <fields>
90883                    <field>
90884                        <name>R2</name>
90885                        <description>Redundant copy of bits 7:0</description>
90886                        <bitRange>[23:16]</bitRange>
90887                        <access>read-only</access>
90888                    </field>
90889                    <field>
90890                        <name>R1</name>
90891                        <description>Redundant copy of bits 7:0</description>
90892                        <bitRange>[15:8]</bitRange>
90893                        <access>read-only</access>
90894                    </field>
90895                    <field>
90896                        <name>NO_KEY_STATE</name>
90897                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
90898                        <bitRange>[6:6]</bitRange>
90899                        <access>read-only</access>
90900                        <enumeratedValues>
90901                            <enumeratedValue>
90902                                <name>read_only</name>
90903                                <value>0</value>
90904                            </enumeratedValue>
90905                            <enumeratedValue>
90906                                <name>inaccessible</name>
90907                                <value>1</value>
90908                            </enumeratedValue>
90909                        </enumeratedValues>
90910                    </field>
90911                    <field>
90912                        <name>KEY_R</name>
90913                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
90914                        <bitRange>[5:3]</bitRange>
90915                        <access>read-only</access>
90916                    </field>
90917                    <field>
90918                        <name>KEY_W</name>
90919                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
90920                        <bitRange>[2:0]</bitRange>
90921                        <access>read-only</access>
90922                    </field>
90923                </fields>
90924            </register>
90925            <register>
90926                <name>PAGE5_LOCK1</name>
90927                <addressOffset>0x00003e2c</addressOffset>
90928                <description>Lock configuration MSBs for page 5 (rows 0x140 through 0x17f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
90929
90930                    This OTP location is always readable, and is write-protected by its own permissions.</description>
90931                <resetValue>0x00000000</resetValue>
90932                <fields>
90933                    <field>
90934                        <name>R2</name>
90935                        <description>Redundant copy of bits 7:0</description>
90936                        <bitRange>[23:16]</bitRange>
90937                        <access>read-only</access>
90938                    </field>
90939                    <field>
90940                        <name>R1</name>
90941                        <description>Redundant copy of bits 7:0</description>
90942                        <bitRange>[15:8]</bitRange>
90943                        <access>read-only</access>
90944                    </field>
90945                    <field>
90946                        <name>LOCK_BL</name>
90947                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
90948                        <bitRange>[5:4]</bitRange>
90949                        <access>read-only</access>
90950                        <enumeratedValues>
90951                            <enumeratedValue>
90952                                <name>read_write</name>
90953                                <value>0</value>
90954                                <description>Bootloader permits user reads and writes to this page</description>
90955                            </enumeratedValue>
90956                            <enumeratedValue>
90957                                <name>read_only</name>
90958                                <value>1</value>
90959                                <description>Bootloader permits user reads of this page</description>
90960                            </enumeratedValue>
90961                            <enumeratedValue>
90962                                <name>reserved</name>
90963                                <value>2</value>
90964                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
90965                            </enumeratedValue>
90966                            <enumeratedValue>
90967                                <name>inaccessible</name>
90968                                <value>3</value>
90969                                <description>Bootloader does not permit user access to this page</description>
90970                            </enumeratedValue>
90971                        </enumeratedValues>
90972                    </field>
90973                    <field>
90974                        <name>LOCK_NS</name>
90975                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
90976
90977                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
90978                        <bitRange>[3:2]</bitRange>
90979                        <access>read-only</access>
90980                        <enumeratedValues>
90981                            <enumeratedValue>
90982                                <name>read_write</name>
90983                                <value>0</value>
90984                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
90985                            </enumeratedValue>
90986                            <enumeratedValue>
90987                                <name>read_only</name>
90988                                <value>1</value>
90989                                <description>Page can be read by Non-secure software</description>
90990                            </enumeratedValue>
90991                            <enumeratedValue>
90992                                <name>reserved</name>
90993                                <value>2</value>
90994                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
90995                            </enumeratedValue>
90996                            <enumeratedValue>
90997                                <name>inaccessible</name>
90998                                <value>3</value>
90999                                <description>Page can not be accessed by Non-secure software.</description>
91000                            </enumeratedValue>
91001                        </enumeratedValues>
91002                    </field>
91003                    <field>
91004                        <name>LOCK_S</name>
91005                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91006                        <bitRange>[1:0]</bitRange>
91007                        <access>read-only</access>
91008                        <enumeratedValues>
91009                            <enumeratedValue>
91010                                <name>read_write</name>
91011                                <value>0</value>
91012                                <description>Page is fully accessible by Secure software.</description>
91013                            </enumeratedValue>
91014                            <enumeratedValue>
91015                                <name>read_only</name>
91016                                <value>1</value>
91017                                <description>Page can be read by Secure software, but can not be written.</description>
91018                            </enumeratedValue>
91019                            <enumeratedValue>
91020                                <name>reserved</name>
91021                                <value>2</value>
91022                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91023                            </enumeratedValue>
91024                            <enumeratedValue>
91025                                <name>inaccessible</name>
91026                                <value>3</value>
91027                                <description>Page can not be accessed by Secure software.</description>
91028                            </enumeratedValue>
91029                        </enumeratedValues>
91030                    </field>
91031                </fields>
91032            </register>
91033            <register>
91034                <name>PAGE6_LOCK0</name>
91035                <addressOffset>0x00003e30</addressOffset>
91036                <description>Lock configuration LSBs for page 6 (rows 0x180 through 0x1bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91037
91038                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91039                <resetValue>0x00000000</resetValue>
91040                <fields>
91041                    <field>
91042                        <name>R2</name>
91043                        <description>Redundant copy of bits 7:0</description>
91044                        <bitRange>[23:16]</bitRange>
91045                        <access>read-only</access>
91046                    </field>
91047                    <field>
91048                        <name>R1</name>
91049                        <description>Redundant copy of bits 7:0</description>
91050                        <bitRange>[15:8]</bitRange>
91051                        <access>read-only</access>
91052                    </field>
91053                    <field>
91054                        <name>NO_KEY_STATE</name>
91055                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91056                        <bitRange>[6:6]</bitRange>
91057                        <access>read-only</access>
91058                        <enumeratedValues>
91059                            <enumeratedValue>
91060                                <name>read_only</name>
91061                                <value>0</value>
91062                            </enumeratedValue>
91063                            <enumeratedValue>
91064                                <name>inaccessible</name>
91065                                <value>1</value>
91066                            </enumeratedValue>
91067                        </enumeratedValues>
91068                    </field>
91069                    <field>
91070                        <name>KEY_R</name>
91071                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91072                        <bitRange>[5:3]</bitRange>
91073                        <access>read-only</access>
91074                    </field>
91075                    <field>
91076                        <name>KEY_W</name>
91077                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91078                        <bitRange>[2:0]</bitRange>
91079                        <access>read-only</access>
91080                    </field>
91081                </fields>
91082            </register>
91083            <register>
91084                <name>PAGE6_LOCK1</name>
91085                <addressOffset>0x00003e34</addressOffset>
91086                <description>Lock configuration MSBs for page 6 (rows 0x180 through 0x1bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91087
91088                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91089                <resetValue>0x00000000</resetValue>
91090                <fields>
91091                    <field>
91092                        <name>R2</name>
91093                        <description>Redundant copy of bits 7:0</description>
91094                        <bitRange>[23:16]</bitRange>
91095                        <access>read-only</access>
91096                    </field>
91097                    <field>
91098                        <name>R1</name>
91099                        <description>Redundant copy of bits 7:0</description>
91100                        <bitRange>[15:8]</bitRange>
91101                        <access>read-only</access>
91102                    </field>
91103                    <field>
91104                        <name>LOCK_BL</name>
91105                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91106                        <bitRange>[5:4]</bitRange>
91107                        <access>read-only</access>
91108                        <enumeratedValues>
91109                            <enumeratedValue>
91110                                <name>read_write</name>
91111                                <value>0</value>
91112                                <description>Bootloader permits user reads and writes to this page</description>
91113                            </enumeratedValue>
91114                            <enumeratedValue>
91115                                <name>read_only</name>
91116                                <value>1</value>
91117                                <description>Bootloader permits user reads of this page</description>
91118                            </enumeratedValue>
91119                            <enumeratedValue>
91120                                <name>reserved</name>
91121                                <value>2</value>
91122                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91123                            </enumeratedValue>
91124                            <enumeratedValue>
91125                                <name>inaccessible</name>
91126                                <value>3</value>
91127                                <description>Bootloader does not permit user access to this page</description>
91128                            </enumeratedValue>
91129                        </enumeratedValues>
91130                    </field>
91131                    <field>
91132                        <name>LOCK_NS</name>
91133                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91134
91135                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91136                        <bitRange>[3:2]</bitRange>
91137                        <access>read-only</access>
91138                        <enumeratedValues>
91139                            <enumeratedValue>
91140                                <name>read_write</name>
91141                                <value>0</value>
91142                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91143                            </enumeratedValue>
91144                            <enumeratedValue>
91145                                <name>read_only</name>
91146                                <value>1</value>
91147                                <description>Page can be read by Non-secure software</description>
91148                            </enumeratedValue>
91149                            <enumeratedValue>
91150                                <name>reserved</name>
91151                                <value>2</value>
91152                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91153                            </enumeratedValue>
91154                            <enumeratedValue>
91155                                <name>inaccessible</name>
91156                                <value>3</value>
91157                                <description>Page can not be accessed by Non-secure software.</description>
91158                            </enumeratedValue>
91159                        </enumeratedValues>
91160                    </field>
91161                    <field>
91162                        <name>LOCK_S</name>
91163                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91164                        <bitRange>[1:0]</bitRange>
91165                        <access>read-only</access>
91166                        <enumeratedValues>
91167                            <enumeratedValue>
91168                                <name>read_write</name>
91169                                <value>0</value>
91170                                <description>Page is fully accessible by Secure software.</description>
91171                            </enumeratedValue>
91172                            <enumeratedValue>
91173                                <name>read_only</name>
91174                                <value>1</value>
91175                                <description>Page can be read by Secure software, but can not be written.</description>
91176                            </enumeratedValue>
91177                            <enumeratedValue>
91178                                <name>reserved</name>
91179                                <value>2</value>
91180                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91181                            </enumeratedValue>
91182                            <enumeratedValue>
91183                                <name>inaccessible</name>
91184                                <value>3</value>
91185                                <description>Page can not be accessed by Secure software.</description>
91186                            </enumeratedValue>
91187                        </enumeratedValues>
91188                    </field>
91189                </fields>
91190            </register>
91191            <register>
91192                <name>PAGE7_LOCK0</name>
91193                <addressOffset>0x00003e38</addressOffset>
91194                <description>Lock configuration LSBs for page 7 (rows 0x1c0 through 0x1ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91195
91196                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91197                <resetValue>0x00000000</resetValue>
91198                <fields>
91199                    <field>
91200                        <name>R2</name>
91201                        <description>Redundant copy of bits 7:0</description>
91202                        <bitRange>[23:16]</bitRange>
91203                        <access>read-only</access>
91204                    </field>
91205                    <field>
91206                        <name>R1</name>
91207                        <description>Redundant copy of bits 7:0</description>
91208                        <bitRange>[15:8]</bitRange>
91209                        <access>read-only</access>
91210                    </field>
91211                    <field>
91212                        <name>NO_KEY_STATE</name>
91213                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91214                        <bitRange>[6:6]</bitRange>
91215                        <access>read-only</access>
91216                        <enumeratedValues>
91217                            <enumeratedValue>
91218                                <name>read_only</name>
91219                                <value>0</value>
91220                            </enumeratedValue>
91221                            <enumeratedValue>
91222                                <name>inaccessible</name>
91223                                <value>1</value>
91224                            </enumeratedValue>
91225                        </enumeratedValues>
91226                    </field>
91227                    <field>
91228                        <name>KEY_R</name>
91229                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91230                        <bitRange>[5:3]</bitRange>
91231                        <access>read-only</access>
91232                    </field>
91233                    <field>
91234                        <name>KEY_W</name>
91235                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91236                        <bitRange>[2:0]</bitRange>
91237                        <access>read-only</access>
91238                    </field>
91239                </fields>
91240            </register>
91241            <register>
91242                <name>PAGE7_LOCK1</name>
91243                <addressOffset>0x00003e3c</addressOffset>
91244                <description>Lock configuration MSBs for page 7 (rows 0x1c0 through 0x1ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91245
91246                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91247                <resetValue>0x00000000</resetValue>
91248                <fields>
91249                    <field>
91250                        <name>R2</name>
91251                        <description>Redundant copy of bits 7:0</description>
91252                        <bitRange>[23:16]</bitRange>
91253                        <access>read-only</access>
91254                    </field>
91255                    <field>
91256                        <name>R1</name>
91257                        <description>Redundant copy of bits 7:0</description>
91258                        <bitRange>[15:8]</bitRange>
91259                        <access>read-only</access>
91260                    </field>
91261                    <field>
91262                        <name>LOCK_BL</name>
91263                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91264                        <bitRange>[5:4]</bitRange>
91265                        <access>read-only</access>
91266                        <enumeratedValues>
91267                            <enumeratedValue>
91268                                <name>read_write</name>
91269                                <value>0</value>
91270                                <description>Bootloader permits user reads and writes to this page</description>
91271                            </enumeratedValue>
91272                            <enumeratedValue>
91273                                <name>read_only</name>
91274                                <value>1</value>
91275                                <description>Bootloader permits user reads of this page</description>
91276                            </enumeratedValue>
91277                            <enumeratedValue>
91278                                <name>reserved</name>
91279                                <value>2</value>
91280                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91281                            </enumeratedValue>
91282                            <enumeratedValue>
91283                                <name>inaccessible</name>
91284                                <value>3</value>
91285                                <description>Bootloader does not permit user access to this page</description>
91286                            </enumeratedValue>
91287                        </enumeratedValues>
91288                    </field>
91289                    <field>
91290                        <name>LOCK_NS</name>
91291                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91292
91293                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91294                        <bitRange>[3:2]</bitRange>
91295                        <access>read-only</access>
91296                        <enumeratedValues>
91297                            <enumeratedValue>
91298                                <name>read_write</name>
91299                                <value>0</value>
91300                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91301                            </enumeratedValue>
91302                            <enumeratedValue>
91303                                <name>read_only</name>
91304                                <value>1</value>
91305                                <description>Page can be read by Non-secure software</description>
91306                            </enumeratedValue>
91307                            <enumeratedValue>
91308                                <name>reserved</name>
91309                                <value>2</value>
91310                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91311                            </enumeratedValue>
91312                            <enumeratedValue>
91313                                <name>inaccessible</name>
91314                                <value>3</value>
91315                                <description>Page can not be accessed by Non-secure software.</description>
91316                            </enumeratedValue>
91317                        </enumeratedValues>
91318                    </field>
91319                    <field>
91320                        <name>LOCK_S</name>
91321                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91322                        <bitRange>[1:0]</bitRange>
91323                        <access>read-only</access>
91324                        <enumeratedValues>
91325                            <enumeratedValue>
91326                                <name>read_write</name>
91327                                <value>0</value>
91328                                <description>Page is fully accessible by Secure software.</description>
91329                            </enumeratedValue>
91330                            <enumeratedValue>
91331                                <name>read_only</name>
91332                                <value>1</value>
91333                                <description>Page can be read by Secure software, but can not be written.</description>
91334                            </enumeratedValue>
91335                            <enumeratedValue>
91336                                <name>reserved</name>
91337                                <value>2</value>
91338                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91339                            </enumeratedValue>
91340                            <enumeratedValue>
91341                                <name>inaccessible</name>
91342                                <value>3</value>
91343                                <description>Page can not be accessed by Secure software.</description>
91344                            </enumeratedValue>
91345                        </enumeratedValues>
91346                    </field>
91347                </fields>
91348            </register>
91349            <register>
91350                <name>PAGE8_LOCK0</name>
91351                <addressOffset>0x00003e40</addressOffset>
91352                <description>Lock configuration LSBs for page 8 (rows 0x200 through 0x23f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91353
91354                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91355                <resetValue>0x00000000</resetValue>
91356                <fields>
91357                    <field>
91358                        <name>R2</name>
91359                        <description>Redundant copy of bits 7:0</description>
91360                        <bitRange>[23:16]</bitRange>
91361                        <access>read-only</access>
91362                    </field>
91363                    <field>
91364                        <name>R1</name>
91365                        <description>Redundant copy of bits 7:0</description>
91366                        <bitRange>[15:8]</bitRange>
91367                        <access>read-only</access>
91368                    </field>
91369                    <field>
91370                        <name>NO_KEY_STATE</name>
91371                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91372                        <bitRange>[6:6]</bitRange>
91373                        <access>read-only</access>
91374                        <enumeratedValues>
91375                            <enumeratedValue>
91376                                <name>read_only</name>
91377                                <value>0</value>
91378                            </enumeratedValue>
91379                            <enumeratedValue>
91380                                <name>inaccessible</name>
91381                                <value>1</value>
91382                            </enumeratedValue>
91383                        </enumeratedValues>
91384                    </field>
91385                    <field>
91386                        <name>KEY_R</name>
91387                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91388                        <bitRange>[5:3]</bitRange>
91389                        <access>read-only</access>
91390                    </field>
91391                    <field>
91392                        <name>KEY_W</name>
91393                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91394                        <bitRange>[2:0]</bitRange>
91395                        <access>read-only</access>
91396                    </field>
91397                </fields>
91398            </register>
91399            <register>
91400                <name>PAGE8_LOCK1</name>
91401                <addressOffset>0x00003e44</addressOffset>
91402                <description>Lock configuration MSBs for page 8 (rows 0x200 through 0x23f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91403
91404                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91405                <resetValue>0x00000000</resetValue>
91406                <fields>
91407                    <field>
91408                        <name>R2</name>
91409                        <description>Redundant copy of bits 7:0</description>
91410                        <bitRange>[23:16]</bitRange>
91411                        <access>read-only</access>
91412                    </field>
91413                    <field>
91414                        <name>R1</name>
91415                        <description>Redundant copy of bits 7:0</description>
91416                        <bitRange>[15:8]</bitRange>
91417                        <access>read-only</access>
91418                    </field>
91419                    <field>
91420                        <name>LOCK_BL</name>
91421                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91422                        <bitRange>[5:4]</bitRange>
91423                        <access>read-only</access>
91424                        <enumeratedValues>
91425                            <enumeratedValue>
91426                                <name>read_write</name>
91427                                <value>0</value>
91428                                <description>Bootloader permits user reads and writes to this page</description>
91429                            </enumeratedValue>
91430                            <enumeratedValue>
91431                                <name>read_only</name>
91432                                <value>1</value>
91433                                <description>Bootloader permits user reads of this page</description>
91434                            </enumeratedValue>
91435                            <enumeratedValue>
91436                                <name>reserved</name>
91437                                <value>2</value>
91438                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91439                            </enumeratedValue>
91440                            <enumeratedValue>
91441                                <name>inaccessible</name>
91442                                <value>3</value>
91443                                <description>Bootloader does not permit user access to this page</description>
91444                            </enumeratedValue>
91445                        </enumeratedValues>
91446                    </field>
91447                    <field>
91448                        <name>LOCK_NS</name>
91449                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91450
91451                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91452                        <bitRange>[3:2]</bitRange>
91453                        <access>read-only</access>
91454                        <enumeratedValues>
91455                            <enumeratedValue>
91456                                <name>read_write</name>
91457                                <value>0</value>
91458                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91459                            </enumeratedValue>
91460                            <enumeratedValue>
91461                                <name>read_only</name>
91462                                <value>1</value>
91463                                <description>Page can be read by Non-secure software</description>
91464                            </enumeratedValue>
91465                            <enumeratedValue>
91466                                <name>reserved</name>
91467                                <value>2</value>
91468                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91469                            </enumeratedValue>
91470                            <enumeratedValue>
91471                                <name>inaccessible</name>
91472                                <value>3</value>
91473                                <description>Page can not be accessed by Non-secure software.</description>
91474                            </enumeratedValue>
91475                        </enumeratedValues>
91476                    </field>
91477                    <field>
91478                        <name>LOCK_S</name>
91479                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91480                        <bitRange>[1:0]</bitRange>
91481                        <access>read-only</access>
91482                        <enumeratedValues>
91483                            <enumeratedValue>
91484                                <name>read_write</name>
91485                                <value>0</value>
91486                                <description>Page is fully accessible by Secure software.</description>
91487                            </enumeratedValue>
91488                            <enumeratedValue>
91489                                <name>read_only</name>
91490                                <value>1</value>
91491                                <description>Page can be read by Secure software, but can not be written.</description>
91492                            </enumeratedValue>
91493                            <enumeratedValue>
91494                                <name>reserved</name>
91495                                <value>2</value>
91496                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91497                            </enumeratedValue>
91498                            <enumeratedValue>
91499                                <name>inaccessible</name>
91500                                <value>3</value>
91501                                <description>Page can not be accessed by Secure software.</description>
91502                            </enumeratedValue>
91503                        </enumeratedValues>
91504                    </field>
91505                </fields>
91506            </register>
91507            <register>
91508                <name>PAGE9_LOCK0</name>
91509                <addressOffset>0x00003e48</addressOffset>
91510                <description>Lock configuration LSBs for page 9 (rows 0x240 through 0x27f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91511
91512                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91513                <resetValue>0x00000000</resetValue>
91514                <fields>
91515                    <field>
91516                        <name>R2</name>
91517                        <description>Redundant copy of bits 7:0</description>
91518                        <bitRange>[23:16]</bitRange>
91519                        <access>read-only</access>
91520                    </field>
91521                    <field>
91522                        <name>R1</name>
91523                        <description>Redundant copy of bits 7:0</description>
91524                        <bitRange>[15:8]</bitRange>
91525                        <access>read-only</access>
91526                    </field>
91527                    <field>
91528                        <name>NO_KEY_STATE</name>
91529                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91530                        <bitRange>[6:6]</bitRange>
91531                        <access>read-only</access>
91532                        <enumeratedValues>
91533                            <enumeratedValue>
91534                                <name>read_only</name>
91535                                <value>0</value>
91536                            </enumeratedValue>
91537                            <enumeratedValue>
91538                                <name>inaccessible</name>
91539                                <value>1</value>
91540                            </enumeratedValue>
91541                        </enumeratedValues>
91542                    </field>
91543                    <field>
91544                        <name>KEY_R</name>
91545                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91546                        <bitRange>[5:3]</bitRange>
91547                        <access>read-only</access>
91548                    </field>
91549                    <field>
91550                        <name>KEY_W</name>
91551                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91552                        <bitRange>[2:0]</bitRange>
91553                        <access>read-only</access>
91554                    </field>
91555                </fields>
91556            </register>
91557            <register>
91558                <name>PAGE9_LOCK1</name>
91559                <addressOffset>0x00003e4c</addressOffset>
91560                <description>Lock configuration MSBs for page 9 (rows 0x240 through 0x27f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91561
91562                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91563                <resetValue>0x00000000</resetValue>
91564                <fields>
91565                    <field>
91566                        <name>R2</name>
91567                        <description>Redundant copy of bits 7:0</description>
91568                        <bitRange>[23:16]</bitRange>
91569                        <access>read-only</access>
91570                    </field>
91571                    <field>
91572                        <name>R1</name>
91573                        <description>Redundant copy of bits 7:0</description>
91574                        <bitRange>[15:8]</bitRange>
91575                        <access>read-only</access>
91576                    </field>
91577                    <field>
91578                        <name>LOCK_BL</name>
91579                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91580                        <bitRange>[5:4]</bitRange>
91581                        <access>read-only</access>
91582                        <enumeratedValues>
91583                            <enumeratedValue>
91584                                <name>read_write</name>
91585                                <value>0</value>
91586                                <description>Bootloader permits user reads and writes to this page</description>
91587                            </enumeratedValue>
91588                            <enumeratedValue>
91589                                <name>read_only</name>
91590                                <value>1</value>
91591                                <description>Bootloader permits user reads of this page</description>
91592                            </enumeratedValue>
91593                            <enumeratedValue>
91594                                <name>reserved</name>
91595                                <value>2</value>
91596                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91597                            </enumeratedValue>
91598                            <enumeratedValue>
91599                                <name>inaccessible</name>
91600                                <value>3</value>
91601                                <description>Bootloader does not permit user access to this page</description>
91602                            </enumeratedValue>
91603                        </enumeratedValues>
91604                    </field>
91605                    <field>
91606                        <name>LOCK_NS</name>
91607                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91608
91609                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91610                        <bitRange>[3:2]</bitRange>
91611                        <access>read-only</access>
91612                        <enumeratedValues>
91613                            <enumeratedValue>
91614                                <name>read_write</name>
91615                                <value>0</value>
91616                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91617                            </enumeratedValue>
91618                            <enumeratedValue>
91619                                <name>read_only</name>
91620                                <value>1</value>
91621                                <description>Page can be read by Non-secure software</description>
91622                            </enumeratedValue>
91623                            <enumeratedValue>
91624                                <name>reserved</name>
91625                                <value>2</value>
91626                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91627                            </enumeratedValue>
91628                            <enumeratedValue>
91629                                <name>inaccessible</name>
91630                                <value>3</value>
91631                                <description>Page can not be accessed by Non-secure software.</description>
91632                            </enumeratedValue>
91633                        </enumeratedValues>
91634                    </field>
91635                    <field>
91636                        <name>LOCK_S</name>
91637                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91638                        <bitRange>[1:0]</bitRange>
91639                        <access>read-only</access>
91640                        <enumeratedValues>
91641                            <enumeratedValue>
91642                                <name>read_write</name>
91643                                <value>0</value>
91644                                <description>Page is fully accessible by Secure software.</description>
91645                            </enumeratedValue>
91646                            <enumeratedValue>
91647                                <name>read_only</name>
91648                                <value>1</value>
91649                                <description>Page can be read by Secure software, but can not be written.</description>
91650                            </enumeratedValue>
91651                            <enumeratedValue>
91652                                <name>reserved</name>
91653                                <value>2</value>
91654                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91655                            </enumeratedValue>
91656                            <enumeratedValue>
91657                                <name>inaccessible</name>
91658                                <value>3</value>
91659                                <description>Page can not be accessed by Secure software.</description>
91660                            </enumeratedValue>
91661                        </enumeratedValues>
91662                    </field>
91663                </fields>
91664            </register>
91665            <register>
91666                <name>PAGE10_LOCK0</name>
91667                <addressOffset>0x00003e50</addressOffset>
91668                <description>Lock configuration LSBs for page 10 (rows 0x280 through 0x2bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91669
91670                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91671                <resetValue>0x00000000</resetValue>
91672                <fields>
91673                    <field>
91674                        <name>R2</name>
91675                        <description>Redundant copy of bits 7:0</description>
91676                        <bitRange>[23:16]</bitRange>
91677                        <access>read-only</access>
91678                    </field>
91679                    <field>
91680                        <name>R1</name>
91681                        <description>Redundant copy of bits 7:0</description>
91682                        <bitRange>[15:8]</bitRange>
91683                        <access>read-only</access>
91684                    </field>
91685                    <field>
91686                        <name>NO_KEY_STATE</name>
91687                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91688                        <bitRange>[6:6]</bitRange>
91689                        <access>read-only</access>
91690                        <enumeratedValues>
91691                            <enumeratedValue>
91692                                <name>read_only</name>
91693                                <value>0</value>
91694                            </enumeratedValue>
91695                            <enumeratedValue>
91696                                <name>inaccessible</name>
91697                                <value>1</value>
91698                            </enumeratedValue>
91699                        </enumeratedValues>
91700                    </field>
91701                    <field>
91702                        <name>KEY_R</name>
91703                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91704                        <bitRange>[5:3]</bitRange>
91705                        <access>read-only</access>
91706                    </field>
91707                    <field>
91708                        <name>KEY_W</name>
91709                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91710                        <bitRange>[2:0]</bitRange>
91711                        <access>read-only</access>
91712                    </field>
91713                </fields>
91714            </register>
91715            <register>
91716                <name>PAGE10_LOCK1</name>
91717                <addressOffset>0x00003e54</addressOffset>
91718                <description>Lock configuration MSBs for page 10 (rows 0x280 through 0x2bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91719
91720                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91721                <resetValue>0x00000000</resetValue>
91722                <fields>
91723                    <field>
91724                        <name>R2</name>
91725                        <description>Redundant copy of bits 7:0</description>
91726                        <bitRange>[23:16]</bitRange>
91727                        <access>read-only</access>
91728                    </field>
91729                    <field>
91730                        <name>R1</name>
91731                        <description>Redundant copy of bits 7:0</description>
91732                        <bitRange>[15:8]</bitRange>
91733                        <access>read-only</access>
91734                    </field>
91735                    <field>
91736                        <name>LOCK_BL</name>
91737                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91738                        <bitRange>[5:4]</bitRange>
91739                        <access>read-only</access>
91740                        <enumeratedValues>
91741                            <enumeratedValue>
91742                                <name>read_write</name>
91743                                <value>0</value>
91744                                <description>Bootloader permits user reads and writes to this page</description>
91745                            </enumeratedValue>
91746                            <enumeratedValue>
91747                                <name>read_only</name>
91748                                <value>1</value>
91749                                <description>Bootloader permits user reads of this page</description>
91750                            </enumeratedValue>
91751                            <enumeratedValue>
91752                                <name>reserved</name>
91753                                <value>2</value>
91754                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91755                            </enumeratedValue>
91756                            <enumeratedValue>
91757                                <name>inaccessible</name>
91758                                <value>3</value>
91759                                <description>Bootloader does not permit user access to this page</description>
91760                            </enumeratedValue>
91761                        </enumeratedValues>
91762                    </field>
91763                    <field>
91764                        <name>LOCK_NS</name>
91765                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91766
91767                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91768                        <bitRange>[3:2]</bitRange>
91769                        <access>read-only</access>
91770                        <enumeratedValues>
91771                            <enumeratedValue>
91772                                <name>read_write</name>
91773                                <value>0</value>
91774                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91775                            </enumeratedValue>
91776                            <enumeratedValue>
91777                                <name>read_only</name>
91778                                <value>1</value>
91779                                <description>Page can be read by Non-secure software</description>
91780                            </enumeratedValue>
91781                            <enumeratedValue>
91782                                <name>reserved</name>
91783                                <value>2</value>
91784                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91785                            </enumeratedValue>
91786                            <enumeratedValue>
91787                                <name>inaccessible</name>
91788                                <value>3</value>
91789                                <description>Page can not be accessed by Non-secure software.</description>
91790                            </enumeratedValue>
91791                        </enumeratedValues>
91792                    </field>
91793                    <field>
91794                        <name>LOCK_S</name>
91795                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91796                        <bitRange>[1:0]</bitRange>
91797                        <access>read-only</access>
91798                        <enumeratedValues>
91799                            <enumeratedValue>
91800                                <name>read_write</name>
91801                                <value>0</value>
91802                                <description>Page is fully accessible by Secure software.</description>
91803                            </enumeratedValue>
91804                            <enumeratedValue>
91805                                <name>read_only</name>
91806                                <value>1</value>
91807                                <description>Page can be read by Secure software, but can not be written.</description>
91808                            </enumeratedValue>
91809                            <enumeratedValue>
91810                                <name>reserved</name>
91811                                <value>2</value>
91812                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91813                            </enumeratedValue>
91814                            <enumeratedValue>
91815                                <name>inaccessible</name>
91816                                <value>3</value>
91817                                <description>Page can not be accessed by Secure software.</description>
91818                            </enumeratedValue>
91819                        </enumeratedValues>
91820                    </field>
91821                </fields>
91822            </register>
91823            <register>
91824                <name>PAGE11_LOCK0</name>
91825                <addressOffset>0x00003e58</addressOffset>
91826                <description>Lock configuration LSBs for page 11 (rows 0x2c0 through 0x2ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91827
91828                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91829                <resetValue>0x00000000</resetValue>
91830                <fields>
91831                    <field>
91832                        <name>R2</name>
91833                        <description>Redundant copy of bits 7:0</description>
91834                        <bitRange>[23:16]</bitRange>
91835                        <access>read-only</access>
91836                    </field>
91837                    <field>
91838                        <name>R1</name>
91839                        <description>Redundant copy of bits 7:0</description>
91840                        <bitRange>[15:8]</bitRange>
91841                        <access>read-only</access>
91842                    </field>
91843                    <field>
91844                        <name>NO_KEY_STATE</name>
91845                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
91846                        <bitRange>[6:6]</bitRange>
91847                        <access>read-only</access>
91848                        <enumeratedValues>
91849                            <enumeratedValue>
91850                                <name>read_only</name>
91851                                <value>0</value>
91852                            </enumeratedValue>
91853                            <enumeratedValue>
91854                                <name>inaccessible</name>
91855                                <value>1</value>
91856                            </enumeratedValue>
91857                        </enumeratedValues>
91858                    </field>
91859                    <field>
91860                        <name>KEY_R</name>
91861                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
91862                        <bitRange>[5:3]</bitRange>
91863                        <access>read-only</access>
91864                    </field>
91865                    <field>
91866                        <name>KEY_W</name>
91867                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
91868                        <bitRange>[2:0]</bitRange>
91869                        <access>read-only</access>
91870                    </field>
91871                </fields>
91872            </register>
91873            <register>
91874                <name>PAGE11_LOCK1</name>
91875                <addressOffset>0x00003e5c</addressOffset>
91876                <description>Lock configuration MSBs for page 11 (rows 0x2c0 through 0x2ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91877
91878                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91879                <resetValue>0x00000000</resetValue>
91880                <fields>
91881                    <field>
91882                        <name>R2</name>
91883                        <description>Redundant copy of bits 7:0</description>
91884                        <bitRange>[23:16]</bitRange>
91885                        <access>read-only</access>
91886                    </field>
91887                    <field>
91888                        <name>R1</name>
91889                        <description>Redundant copy of bits 7:0</description>
91890                        <bitRange>[15:8]</bitRange>
91891                        <access>read-only</access>
91892                    </field>
91893                    <field>
91894                        <name>LOCK_BL</name>
91895                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
91896                        <bitRange>[5:4]</bitRange>
91897                        <access>read-only</access>
91898                        <enumeratedValues>
91899                            <enumeratedValue>
91900                                <name>read_write</name>
91901                                <value>0</value>
91902                                <description>Bootloader permits user reads and writes to this page</description>
91903                            </enumeratedValue>
91904                            <enumeratedValue>
91905                                <name>read_only</name>
91906                                <value>1</value>
91907                                <description>Bootloader permits user reads of this page</description>
91908                            </enumeratedValue>
91909                            <enumeratedValue>
91910                                <name>reserved</name>
91911                                <value>2</value>
91912                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
91913                            </enumeratedValue>
91914                            <enumeratedValue>
91915                                <name>inaccessible</name>
91916                                <value>3</value>
91917                                <description>Bootloader does not permit user access to this page</description>
91918                            </enumeratedValue>
91919                        </enumeratedValues>
91920                    </field>
91921                    <field>
91922                        <name>LOCK_NS</name>
91923                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
91924
91925                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
91926                        <bitRange>[3:2]</bitRange>
91927                        <access>read-only</access>
91928                        <enumeratedValues>
91929                            <enumeratedValue>
91930                                <name>read_write</name>
91931                                <value>0</value>
91932                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
91933                            </enumeratedValue>
91934                            <enumeratedValue>
91935                                <name>read_only</name>
91936                                <value>1</value>
91937                                <description>Page can be read by Non-secure software</description>
91938                            </enumeratedValue>
91939                            <enumeratedValue>
91940                                <name>reserved</name>
91941                                <value>2</value>
91942                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91943                            </enumeratedValue>
91944                            <enumeratedValue>
91945                                <name>inaccessible</name>
91946                                <value>3</value>
91947                                <description>Page can not be accessed by Non-secure software.</description>
91948                            </enumeratedValue>
91949                        </enumeratedValues>
91950                    </field>
91951                    <field>
91952                        <name>LOCK_S</name>
91953                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
91954                        <bitRange>[1:0]</bitRange>
91955                        <access>read-only</access>
91956                        <enumeratedValues>
91957                            <enumeratedValue>
91958                                <name>read_write</name>
91959                                <value>0</value>
91960                                <description>Page is fully accessible by Secure software.</description>
91961                            </enumeratedValue>
91962                            <enumeratedValue>
91963                                <name>read_only</name>
91964                                <value>1</value>
91965                                <description>Page can be read by Secure software, but can not be written.</description>
91966                            </enumeratedValue>
91967                            <enumeratedValue>
91968                                <name>reserved</name>
91969                                <value>2</value>
91970                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
91971                            </enumeratedValue>
91972                            <enumeratedValue>
91973                                <name>inaccessible</name>
91974                                <value>3</value>
91975                                <description>Page can not be accessed by Secure software.</description>
91976                            </enumeratedValue>
91977                        </enumeratedValues>
91978                    </field>
91979                </fields>
91980            </register>
91981            <register>
91982                <name>PAGE12_LOCK0</name>
91983                <addressOffset>0x00003e60</addressOffset>
91984                <description>Lock configuration LSBs for page 12 (rows 0x300 through 0x33f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
91985
91986                    This OTP location is always readable, and is write-protected by its own permissions.</description>
91987                <resetValue>0x00000000</resetValue>
91988                <fields>
91989                    <field>
91990                        <name>R2</name>
91991                        <description>Redundant copy of bits 7:0</description>
91992                        <bitRange>[23:16]</bitRange>
91993                        <access>read-only</access>
91994                    </field>
91995                    <field>
91996                        <name>R1</name>
91997                        <description>Redundant copy of bits 7:0</description>
91998                        <bitRange>[15:8]</bitRange>
91999                        <access>read-only</access>
92000                    </field>
92001                    <field>
92002                        <name>NO_KEY_STATE</name>
92003                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92004                        <bitRange>[6:6]</bitRange>
92005                        <access>read-only</access>
92006                        <enumeratedValues>
92007                            <enumeratedValue>
92008                                <name>read_only</name>
92009                                <value>0</value>
92010                            </enumeratedValue>
92011                            <enumeratedValue>
92012                                <name>inaccessible</name>
92013                                <value>1</value>
92014                            </enumeratedValue>
92015                        </enumeratedValues>
92016                    </field>
92017                    <field>
92018                        <name>KEY_R</name>
92019                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92020                        <bitRange>[5:3]</bitRange>
92021                        <access>read-only</access>
92022                    </field>
92023                    <field>
92024                        <name>KEY_W</name>
92025                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92026                        <bitRange>[2:0]</bitRange>
92027                        <access>read-only</access>
92028                    </field>
92029                </fields>
92030            </register>
92031            <register>
92032                <name>PAGE12_LOCK1</name>
92033                <addressOffset>0x00003e64</addressOffset>
92034                <description>Lock configuration MSBs for page 12 (rows 0x300 through 0x33f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92035
92036                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92037                <resetValue>0x00000000</resetValue>
92038                <fields>
92039                    <field>
92040                        <name>R2</name>
92041                        <description>Redundant copy of bits 7:0</description>
92042                        <bitRange>[23:16]</bitRange>
92043                        <access>read-only</access>
92044                    </field>
92045                    <field>
92046                        <name>R1</name>
92047                        <description>Redundant copy of bits 7:0</description>
92048                        <bitRange>[15:8]</bitRange>
92049                        <access>read-only</access>
92050                    </field>
92051                    <field>
92052                        <name>LOCK_BL</name>
92053                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92054                        <bitRange>[5:4]</bitRange>
92055                        <access>read-only</access>
92056                        <enumeratedValues>
92057                            <enumeratedValue>
92058                                <name>read_write</name>
92059                                <value>0</value>
92060                                <description>Bootloader permits user reads and writes to this page</description>
92061                            </enumeratedValue>
92062                            <enumeratedValue>
92063                                <name>read_only</name>
92064                                <value>1</value>
92065                                <description>Bootloader permits user reads of this page</description>
92066                            </enumeratedValue>
92067                            <enumeratedValue>
92068                                <name>reserved</name>
92069                                <value>2</value>
92070                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92071                            </enumeratedValue>
92072                            <enumeratedValue>
92073                                <name>inaccessible</name>
92074                                <value>3</value>
92075                                <description>Bootloader does not permit user access to this page</description>
92076                            </enumeratedValue>
92077                        </enumeratedValues>
92078                    </field>
92079                    <field>
92080                        <name>LOCK_NS</name>
92081                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92082
92083                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92084                        <bitRange>[3:2]</bitRange>
92085                        <access>read-only</access>
92086                        <enumeratedValues>
92087                            <enumeratedValue>
92088                                <name>read_write</name>
92089                                <value>0</value>
92090                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92091                            </enumeratedValue>
92092                            <enumeratedValue>
92093                                <name>read_only</name>
92094                                <value>1</value>
92095                                <description>Page can be read by Non-secure software</description>
92096                            </enumeratedValue>
92097                            <enumeratedValue>
92098                                <name>reserved</name>
92099                                <value>2</value>
92100                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92101                            </enumeratedValue>
92102                            <enumeratedValue>
92103                                <name>inaccessible</name>
92104                                <value>3</value>
92105                                <description>Page can not be accessed by Non-secure software.</description>
92106                            </enumeratedValue>
92107                        </enumeratedValues>
92108                    </field>
92109                    <field>
92110                        <name>LOCK_S</name>
92111                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92112                        <bitRange>[1:0]</bitRange>
92113                        <access>read-only</access>
92114                        <enumeratedValues>
92115                            <enumeratedValue>
92116                                <name>read_write</name>
92117                                <value>0</value>
92118                                <description>Page is fully accessible by Secure software.</description>
92119                            </enumeratedValue>
92120                            <enumeratedValue>
92121                                <name>read_only</name>
92122                                <value>1</value>
92123                                <description>Page can be read by Secure software, but can not be written.</description>
92124                            </enumeratedValue>
92125                            <enumeratedValue>
92126                                <name>reserved</name>
92127                                <value>2</value>
92128                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92129                            </enumeratedValue>
92130                            <enumeratedValue>
92131                                <name>inaccessible</name>
92132                                <value>3</value>
92133                                <description>Page can not be accessed by Secure software.</description>
92134                            </enumeratedValue>
92135                        </enumeratedValues>
92136                    </field>
92137                </fields>
92138            </register>
92139            <register>
92140                <name>PAGE13_LOCK0</name>
92141                <addressOffset>0x00003e68</addressOffset>
92142                <description>Lock configuration LSBs for page 13 (rows 0x340 through 0x37f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92143
92144                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92145                <resetValue>0x00000000</resetValue>
92146                <fields>
92147                    <field>
92148                        <name>R2</name>
92149                        <description>Redundant copy of bits 7:0</description>
92150                        <bitRange>[23:16]</bitRange>
92151                        <access>read-only</access>
92152                    </field>
92153                    <field>
92154                        <name>R1</name>
92155                        <description>Redundant copy of bits 7:0</description>
92156                        <bitRange>[15:8]</bitRange>
92157                        <access>read-only</access>
92158                    </field>
92159                    <field>
92160                        <name>NO_KEY_STATE</name>
92161                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92162                        <bitRange>[6:6]</bitRange>
92163                        <access>read-only</access>
92164                        <enumeratedValues>
92165                            <enumeratedValue>
92166                                <name>read_only</name>
92167                                <value>0</value>
92168                            </enumeratedValue>
92169                            <enumeratedValue>
92170                                <name>inaccessible</name>
92171                                <value>1</value>
92172                            </enumeratedValue>
92173                        </enumeratedValues>
92174                    </field>
92175                    <field>
92176                        <name>KEY_R</name>
92177                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92178                        <bitRange>[5:3]</bitRange>
92179                        <access>read-only</access>
92180                    </field>
92181                    <field>
92182                        <name>KEY_W</name>
92183                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92184                        <bitRange>[2:0]</bitRange>
92185                        <access>read-only</access>
92186                    </field>
92187                </fields>
92188            </register>
92189            <register>
92190                <name>PAGE13_LOCK1</name>
92191                <addressOffset>0x00003e6c</addressOffset>
92192                <description>Lock configuration MSBs for page 13 (rows 0x340 through 0x37f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92193
92194                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92195                <resetValue>0x00000000</resetValue>
92196                <fields>
92197                    <field>
92198                        <name>R2</name>
92199                        <description>Redundant copy of bits 7:0</description>
92200                        <bitRange>[23:16]</bitRange>
92201                        <access>read-only</access>
92202                    </field>
92203                    <field>
92204                        <name>R1</name>
92205                        <description>Redundant copy of bits 7:0</description>
92206                        <bitRange>[15:8]</bitRange>
92207                        <access>read-only</access>
92208                    </field>
92209                    <field>
92210                        <name>LOCK_BL</name>
92211                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92212                        <bitRange>[5:4]</bitRange>
92213                        <access>read-only</access>
92214                        <enumeratedValues>
92215                            <enumeratedValue>
92216                                <name>read_write</name>
92217                                <value>0</value>
92218                                <description>Bootloader permits user reads and writes to this page</description>
92219                            </enumeratedValue>
92220                            <enumeratedValue>
92221                                <name>read_only</name>
92222                                <value>1</value>
92223                                <description>Bootloader permits user reads of this page</description>
92224                            </enumeratedValue>
92225                            <enumeratedValue>
92226                                <name>reserved</name>
92227                                <value>2</value>
92228                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92229                            </enumeratedValue>
92230                            <enumeratedValue>
92231                                <name>inaccessible</name>
92232                                <value>3</value>
92233                                <description>Bootloader does not permit user access to this page</description>
92234                            </enumeratedValue>
92235                        </enumeratedValues>
92236                    </field>
92237                    <field>
92238                        <name>LOCK_NS</name>
92239                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92240
92241                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92242                        <bitRange>[3:2]</bitRange>
92243                        <access>read-only</access>
92244                        <enumeratedValues>
92245                            <enumeratedValue>
92246                                <name>read_write</name>
92247                                <value>0</value>
92248                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92249                            </enumeratedValue>
92250                            <enumeratedValue>
92251                                <name>read_only</name>
92252                                <value>1</value>
92253                                <description>Page can be read by Non-secure software</description>
92254                            </enumeratedValue>
92255                            <enumeratedValue>
92256                                <name>reserved</name>
92257                                <value>2</value>
92258                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92259                            </enumeratedValue>
92260                            <enumeratedValue>
92261                                <name>inaccessible</name>
92262                                <value>3</value>
92263                                <description>Page can not be accessed by Non-secure software.</description>
92264                            </enumeratedValue>
92265                        </enumeratedValues>
92266                    </field>
92267                    <field>
92268                        <name>LOCK_S</name>
92269                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92270                        <bitRange>[1:0]</bitRange>
92271                        <access>read-only</access>
92272                        <enumeratedValues>
92273                            <enumeratedValue>
92274                                <name>read_write</name>
92275                                <value>0</value>
92276                                <description>Page is fully accessible by Secure software.</description>
92277                            </enumeratedValue>
92278                            <enumeratedValue>
92279                                <name>read_only</name>
92280                                <value>1</value>
92281                                <description>Page can be read by Secure software, but can not be written.</description>
92282                            </enumeratedValue>
92283                            <enumeratedValue>
92284                                <name>reserved</name>
92285                                <value>2</value>
92286                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92287                            </enumeratedValue>
92288                            <enumeratedValue>
92289                                <name>inaccessible</name>
92290                                <value>3</value>
92291                                <description>Page can not be accessed by Secure software.</description>
92292                            </enumeratedValue>
92293                        </enumeratedValues>
92294                    </field>
92295                </fields>
92296            </register>
92297            <register>
92298                <name>PAGE14_LOCK0</name>
92299                <addressOffset>0x00003e70</addressOffset>
92300                <description>Lock configuration LSBs for page 14 (rows 0x380 through 0x3bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92301
92302                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92303                <resetValue>0x00000000</resetValue>
92304                <fields>
92305                    <field>
92306                        <name>R2</name>
92307                        <description>Redundant copy of bits 7:0</description>
92308                        <bitRange>[23:16]</bitRange>
92309                        <access>read-only</access>
92310                    </field>
92311                    <field>
92312                        <name>R1</name>
92313                        <description>Redundant copy of bits 7:0</description>
92314                        <bitRange>[15:8]</bitRange>
92315                        <access>read-only</access>
92316                    </field>
92317                    <field>
92318                        <name>NO_KEY_STATE</name>
92319                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92320                        <bitRange>[6:6]</bitRange>
92321                        <access>read-only</access>
92322                        <enumeratedValues>
92323                            <enumeratedValue>
92324                                <name>read_only</name>
92325                                <value>0</value>
92326                            </enumeratedValue>
92327                            <enumeratedValue>
92328                                <name>inaccessible</name>
92329                                <value>1</value>
92330                            </enumeratedValue>
92331                        </enumeratedValues>
92332                    </field>
92333                    <field>
92334                        <name>KEY_R</name>
92335                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92336                        <bitRange>[5:3]</bitRange>
92337                        <access>read-only</access>
92338                    </field>
92339                    <field>
92340                        <name>KEY_W</name>
92341                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92342                        <bitRange>[2:0]</bitRange>
92343                        <access>read-only</access>
92344                    </field>
92345                </fields>
92346            </register>
92347            <register>
92348                <name>PAGE14_LOCK1</name>
92349                <addressOffset>0x00003e74</addressOffset>
92350                <description>Lock configuration MSBs for page 14 (rows 0x380 through 0x3bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92351
92352                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92353                <resetValue>0x00000000</resetValue>
92354                <fields>
92355                    <field>
92356                        <name>R2</name>
92357                        <description>Redundant copy of bits 7:0</description>
92358                        <bitRange>[23:16]</bitRange>
92359                        <access>read-only</access>
92360                    </field>
92361                    <field>
92362                        <name>R1</name>
92363                        <description>Redundant copy of bits 7:0</description>
92364                        <bitRange>[15:8]</bitRange>
92365                        <access>read-only</access>
92366                    </field>
92367                    <field>
92368                        <name>LOCK_BL</name>
92369                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92370                        <bitRange>[5:4]</bitRange>
92371                        <access>read-only</access>
92372                        <enumeratedValues>
92373                            <enumeratedValue>
92374                                <name>read_write</name>
92375                                <value>0</value>
92376                                <description>Bootloader permits user reads and writes to this page</description>
92377                            </enumeratedValue>
92378                            <enumeratedValue>
92379                                <name>read_only</name>
92380                                <value>1</value>
92381                                <description>Bootloader permits user reads of this page</description>
92382                            </enumeratedValue>
92383                            <enumeratedValue>
92384                                <name>reserved</name>
92385                                <value>2</value>
92386                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92387                            </enumeratedValue>
92388                            <enumeratedValue>
92389                                <name>inaccessible</name>
92390                                <value>3</value>
92391                                <description>Bootloader does not permit user access to this page</description>
92392                            </enumeratedValue>
92393                        </enumeratedValues>
92394                    </field>
92395                    <field>
92396                        <name>LOCK_NS</name>
92397                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92398
92399                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92400                        <bitRange>[3:2]</bitRange>
92401                        <access>read-only</access>
92402                        <enumeratedValues>
92403                            <enumeratedValue>
92404                                <name>read_write</name>
92405                                <value>0</value>
92406                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92407                            </enumeratedValue>
92408                            <enumeratedValue>
92409                                <name>read_only</name>
92410                                <value>1</value>
92411                                <description>Page can be read by Non-secure software</description>
92412                            </enumeratedValue>
92413                            <enumeratedValue>
92414                                <name>reserved</name>
92415                                <value>2</value>
92416                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92417                            </enumeratedValue>
92418                            <enumeratedValue>
92419                                <name>inaccessible</name>
92420                                <value>3</value>
92421                                <description>Page can not be accessed by Non-secure software.</description>
92422                            </enumeratedValue>
92423                        </enumeratedValues>
92424                    </field>
92425                    <field>
92426                        <name>LOCK_S</name>
92427                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92428                        <bitRange>[1:0]</bitRange>
92429                        <access>read-only</access>
92430                        <enumeratedValues>
92431                            <enumeratedValue>
92432                                <name>read_write</name>
92433                                <value>0</value>
92434                                <description>Page is fully accessible by Secure software.</description>
92435                            </enumeratedValue>
92436                            <enumeratedValue>
92437                                <name>read_only</name>
92438                                <value>1</value>
92439                                <description>Page can be read by Secure software, but can not be written.</description>
92440                            </enumeratedValue>
92441                            <enumeratedValue>
92442                                <name>reserved</name>
92443                                <value>2</value>
92444                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92445                            </enumeratedValue>
92446                            <enumeratedValue>
92447                                <name>inaccessible</name>
92448                                <value>3</value>
92449                                <description>Page can not be accessed by Secure software.</description>
92450                            </enumeratedValue>
92451                        </enumeratedValues>
92452                    </field>
92453                </fields>
92454            </register>
92455            <register>
92456                <name>PAGE15_LOCK0</name>
92457                <addressOffset>0x00003e78</addressOffset>
92458                <description>Lock configuration LSBs for page 15 (rows 0x3c0 through 0x3ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92459
92460                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92461                <resetValue>0x00000000</resetValue>
92462                <fields>
92463                    <field>
92464                        <name>R2</name>
92465                        <description>Redundant copy of bits 7:0</description>
92466                        <bitRange>[23:16]</bitRange>
92467                        <access>read-only</access>
92468                    </field>
92469                    <field>
92470                        <name>R1</name>
92471                        <description>Redundant copy of bits 7:0</description>
92472                        <bitRange>[15:8]</bitRange>
92473                        <access>read-only</access>
92474                    </field>
92475                    <field>
92476                        <name>NO_KEY_STATE</name>
92477                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92478                        <bitRange>[6:6]</bitRange>
92479                        <access>read-only</access>
92480                        <enumeratedValues>
92481                            <enumeratedValue>
92482                                <name>read_only</name>
92483                                <value>0</value>
92484                            </enumeratedValue>
92485                            <enumeratedValue>
92486                                <name>inaccessible</name>
92487                                <value>1</value>
92488                            </enumeratedValue>
92489                        </enumeratedValues>
92490                    </field>
92491                    <field>
92492                        <name>KEY_R</name>
92493                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92494                        <bitRange>[5:3]</bitRange>
92495                        <access>read-only</access>
92496                    </field>
92497                    <field>
92498                        <name>KEY_W</name>
92499                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92500                        <bitRange>[2:0]</bitRange>
92501                        <access>read-only</access>
92502                    </field>
92503                </fields>
92504            </register>
92505            <register>
92506                <name>PAGE15_LOCK1</name>
92507                <addressOffset>0x00003e7c</addressOffset>
92508                <description>Lock configuration MSBs for page 15 (rows 0x3c0 through 0x3ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92509
92510                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92511                <resetValue>0x00000000</resetValue>
92512                <fields>
92513                    <field>
92514                        <name>R2</name>
92515                        <description>Redundant copy of bits 7:0</description>
92516                        <bitRange>[23:16]</bitRange>
92517                        <access>read-only</access>
92518                    </field>
92519                    <field>
92520                        <name>R1</name>
92521                        <description>Redundant copy of bits 7:0</description>
92522                        <bitRange>[15:8]</bitRange>
92523                        <access>read-only</access>
92524                    </field>
92525                    <field>
92526                        <name>LOCK_BL</name>
92527                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92528                        <bitRange>[5:4]</bitRange>
92529                        <access>read-only</access>
92530                        <enumeratedValues>
92531                            <enumeratedValue>
92532                                <name>read_write</name>
92533                                <value>0</value>
92534                                <description>Bootloader permits user reads and writes to this page</description>
92535                            </enumeratedValue>
92536                            <enumeratedValue>
92537                                <name>read_only</name>
92538                                <value>1</value>
92539                                <description>Bootloader permits user reads of this page</description>
92540                            </enumeratedValue>
92541                            <enumeratedValue>
92542                                <name>reserved</name>
92543                                <value>2</value>
92544                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92545                            </enumeratedValue>
92546                            <enumeratedValue>
92547                                <name>inaccessible</name>
92548                                <value>3</value>
92549                                <description>Bootloader does not permit user access to this page</description>
92550                            </enumeratedValue>
92551                        </enumeratedValues>
92552                    </field>
92553                    <field>
92554                        <name>LOCK_NS</name>
92555                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92556
92557                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92558                        <bitRange>[3:2]</bitRange>
92559                        <access>read-only</access>
92560                        <enumeratedValues>
92561                            <enumeratedValue>
92562                                <name>read_write</name>
92563                                <value>0</value>
92564                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92565                            </enumeratedValue>
92566                            <enumeratedValue>
92567                                <name>read_only</name>
92568                                <value>1</value>
92569                                <description>Page can be read by Non-secure software</description>
92570                            </enumeratedValue>
92571                            <enumeratedValue>
92572                                <name>reserved</name>
92573                                <value>2</value>
92574                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92575                            </enumeratedValue>
92576                            <enumeratedValue>
92577                                <name>inaccessible</name>
92578                                <value>3</value>
92579                                <description>Page can not be accessed by Non-secure software.</description>
92580                            </enumeratedValue>
92581                        </enumeratedValues>
92582                    </field>
92583                    <field>
92584                        <name>LOCK_S</name>
92585                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92586                        <bitRange>[1:0]</bitRange>
92587                        <access>read-only</access>
92588                        <enumeratedValues>
92589                            <enumeratedValue>
92590                                <name>read_write</name>
92591                                <value>0</value>
92592                                <description>Page is fully accessible by Secure software.</description>
92593                            </enumeratedValue>
92594                            <enumeratedValue>
92595                                <name>read_only</name>
92596                                <value>1</value>
92597                                <description>Page can be read by Secure software, but can not be written.</description>
92598                            </enumeratedValue>
92599                            <enumeratedValue>
92600                                <name>reserved</name>
92601                                <value>2</value>
92602                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92603                            </enumeratedValue>
92604                            <enumeratedValue>
92605                                <name>inaccessible</name>
92606                                <value>3</value>
92607                                <description>Page can not be accessed by Secure software.</description>
92608                            </enumeratedValue>
92609                        </enumeratedValues>
92610                    </field>
92611                </fields>
92612            </register>
92613            <register>
92614                <name>PAGE16_LOCK0</name>
92615                <addressOffset>0x00003e80</addressOffset>
92616                <description>Lock configuration LSBs for page 16 (rows 0x400 through 0x43f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92617
92618                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92619                <resetValue>0x00000000</resetValue>
92620                <fields>
92621                    <field>
92622                        <name>R2</name>
92623                        <description>Redundant copy of bits 7:0</description>
92624                        <bitRange>[23:16]</bitRange>
92625                        <access>read-only</access>
92626                    </field>
92627                    <field>
92628                        <name>R1</name>
92629                        <description>Redundant copy of bits 7:0</description>
92630                        <bitRange>[15:8]</bitRange>
92631                        <access>read-only</access>
92632                    </field>
92633                    <field>
92634                        <name>NO_KEY_STATE</name>
92635                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92636                        <bitRange>[6:6]</bitRange>
92637                        <access>read-only</access>
92638                        <enumeratedValues>
92639                            <enumeratedValue>
92640                                <name>read_only</name>
92641                                <value>0</value>
92642                            </enumeratedValue>
92643                            <enumeratedValue>
92644                                <name>inaccessible</name>
92645                                <value>1</value>
92646                            </enumeratedValue>
92647                        </enumeratedValues>
92648                    </field>
92649                    <field>
92650                        <name>KEY_R</name>
92651                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92652                        <bitRange>[5:3]</bitRange>
92653                        <access>read-only</access>
92654                    </field>
92655                    <field>
92656                        <name>KEY_W</name>
92657                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92658                        <bitRange>[2:0]</bitRange>
92659                        <access>read-only</access>
92660                    </field>
92661                </fields>
92662            </register>
92663            <register>
92664                <name>PAGE16_LOCK1</name>
92665                <addressOffset>0x00003e84</addressOffset>
92666                <description>Lock configuration MSBs for page 16 (rows 0x400 through 0x43f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92667
92668                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92669                <resetValue>0x00000000</resetValue>
92670                <fields>
92671                    <field>
92672                        <name>R2</name>
92673                        <description>Redundant copy of bits 7:0</description>
92674                        <bitRange>[23:16]</bitRange>
92675                        <access>read-only</access>
92676                    </field>
92677                    <field>
92678                        <name>R1</name>
92679                        <description>Redundant copy of bits 7:0</description>
92680                        <bitRange>[15:8]</bitRange>
92681                        <access>read-only</access>
92682                    </field>
92683                    <field>
92684                        <name>LOCK_BL</name>
92685                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92686                        <bitRange>[5:4]</bitRange>
92687                        <access>read-only</access>
92688                        <enumeratedValues>
92689                            <enumeratedValue>
92690                                <name>read_write</name>
92691                                <value>0</value>
92692                                <description>Bootloader permits user reads and writes to this page</description>
92693                            </enumeratedValue>
92694                            <enumeratedValue>
92695                                <name>read_only</name>
92696                                <value>1</value>
92697                                <description>Bootloader permits user reads of this page</description>
92698                            </enumeratedValue>
92699                            <enumeratedValue>
92700                                <name>reserved</name>
92701                                <value>2</value>
92702                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92703                            </enumeratedValue>
92704                            <enumeratedValue>
92705                                <name>inaccessible</name>
92706                                <value>3</value>
92707                                <description>Bootloader does not permit user access to this page</description>
92708                            </enumeratedValue>
92709                        </enumeratedValues>
92710                    </field>
92711                    <field>
92712                        <name>LOCK_NS</name>
92713                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92714
92715                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92716                        <bitRange>[3:2]</bitRange>
92717                        <access>read-only</access>
92718                        <enumeratedValues>
92719                            <enumeratedValue>
92720                                <name>read_write</name>
92721                                <value>0</value>
92722                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92723                            </enumeratedValue>
92724                            <enumeratedValue>
92725                                <name>read_only</name>
92726                                <value>1</value>
92727                                <description>Page can be read by Non-secure software</description>
92728                            </enumeratedValue>
92729                            <enumeratedValue>
92730                                <name>reserved</name>
92731                                <value>2</value>
92732                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92733                            </enumeratedValue>
92734                            <enumeratedValue>
92735                                <name>inaccessible</name>
92736                                <value>3</value>
92737                                <description>Page can not be accessed by Non-secure software.</description>
92738                            </enumeratedValue>
92739                        </enumeratedValues>
92740                    </field>
92741                    <field>
92742                        <name>LOCK_S</name>
92743                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92744                        <bitRange>[1:0]</bitRange>
92745                        <access>read-only</access>
92746                        <enumeratedValues>
92747                            <enumeratedValue>
92748                                <name>read_write</name>
92749                                <value>0</value>
92750                                <description>Page is fully accessible by Secure software.</description>
92751                            </enumeratedValue>
92752                            <enumeratedValue>
92753                                <name>read_only</name>
92754                                <value>1</value>
92755                                <description>Page can be read by Secure software, but can not be written.</description>
92756                            </enumeratedValue>
92757                            <enumeratedValue>
92758                                <name>reserved</name>
92759                                <value>2</value>
92760                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92761                            </enumeratedValue>
92762                            <enumeratedValue>
92763                                <name>inaccessible</name>
92764                                <value>3</value>
92765                                <description>Page can not be accessed by Secure software.</description>
92766                            </enumeratedValue>
92767                        </enumeratedValues>
92768                    </field>
92769                </fields>
92770            </register>
92771            <register>
92772                <name>PAGE17_LOCK0</name>
92773                <addressOffset>0x00003e88</addressOffset>
92774                <description>Lock configuration LSBs for page 17 (rows 0x440 through 0x47f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92775
92776                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92777                <resetValue>0x00000000</resetValue>
92778                <fields>
92779                    <field>
92780                        <name>R2</name>
92781                        <description>Redundant copy of bits 7:0</description>
92782                        <bitRange>[23:16]</bitRange>
92783                        <access>read-only</access>
92784                    </field>
92785                    <field>
92786                        <name>R1</name>
92787                        <description>Redundant copy of bits 7:0</description>
92788                        <bitRange>[15:8]</bitRange>
92789                        <access>read-only</access>
92790                    </field>
92791                    <field>
92792                        <name>NO_KEY_STATE</name>
92793                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92794                        <bitRange>[6:6]</bitRange>
92795                        <access>read-only</access>
92796                        <enumeratedValues>
92797                            <enumeratedValue>
92798                                <name>read_only</name>
92799                                <value>0</value>
92800                            </enumeratedValue>
92801                            <enumeratedValue>
92802                                <name>inaccessible</name>
92803                                <value>1</value>
92804                            </enumeratedValue>
92805                        </enumeratedValues>
92806                    </field>
92807                    <field>
92808                        <name>KEY_R</name>
92809                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92810                        <bitRange>[5:3]</bitRange>
92811                        <access>read-only</access>
92812                    </field>
92813                    <field>
92814                        <name>KEY_W</name>
92815                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92816                        <bitRange>[2:0]</bitRange>
92817                        <access>read-only</access>
92818                    </field>
92819                </fields>
92820            </register>
92821            <register>
92822                <name>PAGE17_LOCK1</name>
92823                <addressOffset>0x00003e8c</addressOffset>
92824                <description>Lock configuration MSBs for page 17 (rows 0x440 through 0x47f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92825
92826                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92827                <resetValue>0x00000000</resetValue>
92828                <fields>
92829                    <field>
92830                        <name>R2</name>
92831                        <description>Redundant copy of bits 7:0</description>
92832                        <bitRange>[23:16]</bitRange>
92833                        <access>read-only</access>
92834                    </field>
92835                    <field>
92836                        <name>R1</name>
92837                        <description>Redundant copy of bits 7:0</description>
92838                        <bitRange>[15:8]</bitRange>
92839                        <access>read-only</access>
92840                    </field>
92841                    <field>
92842                        <name>LOCK_BL</name>
92843                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
92844                        <bitRange>[5:4]</bitRange>
92845                        <access>read-only</access>
92846                        <enumeratedValues>
92847                            <enumeratedValue>
92848                                <name>read_write</name>
92849                                <value>0</value>
92850                                <description>Bootloader permits user reads and writes to this page</description>
92851                            </enumeratedValue>
92852                            <enumeratedValue>
92853                                <name>read_only</name>
92854                                <value>1</value>
92855                                <description>Bootloader permits user reads of this page</description>
92856                            </enumeratedValue>
92857                            <enumeratedValue>
92858                                <name>reserved</name>
92859                                <value>2</value>
92860                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
92861                            </enumeratedValue>
92862                            <enumeratedValue>
92863                                <name>inaccessible</name>
92864                                <value>3</value>
92865                                <description>Bootloader does not permit user access to this page</description>
92866                            </enumeratedValue>
92867                        </enumeratedValues>
92868                    </field>
92869                    <field>
92870                        <name>LOCK_NS</name>
92871                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
92872
92873                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
92874                        <bitRange>[3:2]</bitRange>
92875                        <access>read-only</access>
92876                        <enumeratedValues>
92877                            <enumeratedValue>
92878                                <name>read_write</name>
92879                                <value>0</value>
92880                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
92881                            </enumeratedValue>
92882                            <enumeratedValue>
92883                                <name>read_only</name>
92884                                <value>1</value>
92885                                <description>Page can be read by Non-secure software</description>
92886                            </enumeratedValue>
92887                            <enumeratedValue>
92888                                <name>reserved</name>
92889                                <value>2</value>
92890                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92891                            </enumeratedValue>
92892                            <enumeratedValue>
92893                                <name>inaccessible</name>
92894                                <value>3</value>
92895                                <description>Page can not be accessed by Non-secure software.</description>
92896                            </enumeratedValue>
92897                        </enumeratedValues>
92898                    </field>
92899                    <field>
92900                        <name>LOCK_S</name>
92901                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
92902                        <bitRange>[1:0]</bitRange>
92903                        <access>read-only</access>
92904                        <enumeratedValues>
92905                            <enumeratedValue>
92906                                <name>read_write</name>
92907                                <value>0</value>
92908                                <description>Page is fully accessible by Secure software.</description>
92909                            </enumeratedValue>
92910                            <enumeratedValue>
92911                                <name>read_only</name>
92912                                <value>1</value>
92913                                <description>Page can be read by Secure software, but can not be written.</description>
92914                            </enumeratedValue>
92915                            <enumeratedValue>
92916                                <name>reserved</name>
92917                                <value>2</value>
92918                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
92919                            </enumeratedValue>
92920                            <enumeratedValue>
92921                                <name>inaccessible</name>
92922                                <value>3</value>
92923                                <description>Page can not be accessed by Secure software.</description>
92924                            </enumeratedValue>
92925                        </enumeratedValues>
92926                    </field>
92927                </fields>
92928            </register>
92929            <register>
92930                <name>PAGE18_LOCK0</name>
92931                <addressOffset>0x00003e90</addressOffset>
92932                <description>Lock configuration LSBs for page 18 (rows 0x480 through 0x4bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92933
92934                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92935                <resetValue>0x00000000</resetValue>
92936                <fields>
92937                    <field>
92938                        <name>R2</name>
92939                        <description>Redundant copy of bits 7:0</description>
92940                        <bitRange>[23:16]</bitRange>
92941                        <access>read-only</access>
92942                    </field>
92943                    <field>
92944                        <name>R1</name>
92945                        <description>Redundant copy of bits 7:0</description>
92946                        <bitRange>[15:8]</bitRange>
92947                        <access>read-only</access>
92948                    </field>
92949                    <field>
92950                        <name>NO_KEY_STATE</name>
92951                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
92952                        <bitRange>[6:6]</bitRange>
92953                        <access>read-only</access>
92954                        <enumeratedValues>
92955                            <enumeratedValue>
92956                                <name>read_only</name>
92957                                <value>0</value>
92958                            </enumeratedValue>
92959                            <enumeratedValue>
92960                                <name>inaccessible</name>
92961                                <value>1</value>
92962                            </enumeratedValue>
92963                        </enumeratedValues>
92964                    </field>
92965                    <field>
92966                        <name>KEY_R</name>
92967                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
92968                        <bitRange>[5:3]</bitRange>
92969                        <access>read-only</access>
92970                    </field>
92971                    <field>
92972                        <name>KEY_W</name>
92973                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
92974                        <bitRange>[2:0]</bitRange>
92975                        <access>read-only</access>
92976                    </field>
92977                </fields>
92978            </register>
92979            <register>
92980                <name>PAGE18_LOCK1</name>
92981                <addressOffset>0x00003e94</addressOffset>
92982                <description>Lock configuration MSBs for page 18 (rows 0x480 through 0x4bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
92983
92984                    This OTP location is always readable, and is write-protected by its own permissions.</description>
92985                <resetValue>0x00000000</resetValue>
92986                <fields>
92987                    <field>
92988                        <name>R2</name>
92989                        <description>Redundant copy of bits 7:0</description>
92990                        <bitRange>[23:16]</bitRange>
92991                        <access>read-only</access>
92992                    </field>
92993                    <field>
92994                        <name>R1</name>
92995                        <description>Redundant copy of bits 7:0</description>
92996                        <bitRange>[15:8]</bitRange>
92997                        <access>read-only</access>
92998                    </field>
92999                    <field>
93000                        <name>LOCK_BL</name>
93001                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93002                        <bitRange>[5:4]</bitRange>
93003                        <access>read-only</access>
93004                        <enumeratedValues>
93005                            <enumeratedValue>
93006                                <name>read_write</name>
93007                                <value>0</value>
93008                                <description>Bootloader permits user reads and writes to this page</description>
93009                            </enumeratedValue>
93010                            <enumeratedValue>
93011                                <name>read_only</name>
93012                                <value>1</value>
93013                                <description>Bootloader permits user reads of this page</description>
93014                            </enumeratedValue>
93015                            <enumeratedValue>
93016                                <name>reserved</name>
93017                                <value>2</value>
93018                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93019                            </enumeratedValue>
93020                            <enumeratedValue>
93021                                <name>inaccessible</name>
93022                                <value>3</value>
93023                                <description>Bootloader does not permit user access to this page</description>
93024                            </enumeratedValue>
93025                        </enumeratedValues>
93026                    </field>
93027                    <field>
93028                        <name>LOCK_NS</name>
93029                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93030
93031                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93032                        <bitRange>[3:2]</bitRange>
93033                        <access>read-only</access>
93034                        <enumeratedValues>
93035                            <enumeratedValue>
93036                                <name>read_write</name>
93037                                <value>0</value>
93038                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93039                            </enumeratedValue>
93040                            <enumeratedValue>
93041                                <name>read_only</name>
93042                                <value>1</value>
93043                                <description>Page can be read by Non-secure software</description>
93044                            </enumeratedValue>
93045                            <enumeratedValue>
93046                                <name>reserved</name>
93047                                <value>2</value>
93048                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93049                            </enumeratedValue>
93050                            <enumeratedValue>
93051                                <name>inaccessible</name>
93052                                <value>3</value>
93053                                <description>Page can not be accessed by Non-secure software.</description>
93054                            </enumeratedValue>
93055                        </enumeratedValues>
93056                    </field>
93057                    <field>
93058                        <name>LOCK_S</name>
93059                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93060                        <bitRange>[1:0]</bitRange>
93061                        <access>read-only</access>
93062                        <enumeratedValues>
93063                            <enumeratedValue>
93064                                <name>read_write</name>
93065                                <value>0</value>
93066                                <description>Page is fully accessible by Secure software.</description>
93067                            </enumeratedValue>
93068                            <enumeratedValue>
93069                                <name>read_only</name>
93070                                <value>1</value>
93071                                <description>Page can be read by Secure software, but can not be written.</description>
93072                            </enumeratedValue>
93073                            <enumeratedValue>
93074                                <name>reserved</name>
93075                                <value>2</value>
93076                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93077                            </enumeratedValue>
93078                            <enumeratedValue>
93079                                <name>inaccessible</name>
93080                                <value>3</value>
93081                                <description>Page can not be accessed by Secure software.</description>
93082                            </enumeratedValue>
93083                        </enumeratedValues>
93084                    </field>
93085                </fields>
93086            </register>
93087            <register>
93088                <name>PAGE19_LOCK0</name>
93089                <addressOffset>0x00003e98</addressOffset>
93090                <description>Lock configuration LSBs for page 19 (rows 0x4c0 through 0x4ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93091
93092                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93093                <resetValue>0x00000000</resetValue>
93094                <fields>
93095                    <field>
93096                        <name>R2</name>
93097                        <description>Redundant copy of bits 7:0</description>
93098                        <bitRange>[23:16]</bitRange>
93099                        <access>read-only</access>
93100                    </field>
93101                    <field>
93102                        <name>R1</name>
93103                        <description>Redundant copy of bits 7:0</description>
93104                        <bitRange>[15:8]</bitRange>
93105                        <access>read-only</access>
93106                    </field>
93107                    <field>
93108                        <name>NO_KEY_STATE</name>
93109                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93110                        <bitRange>[6:6]</bitRange>
93111                        <access>read-only</access>
93112                        <enumeratedValues>
93113                            <enumeratedValue>
93114                                <name>read_only</name>
93115                                <value>0</value>
93116                            </enumeratedValue>
93117                            <enumeratedValue>
93118                                <name>inaccessible</name>
93119                                <value>1</value>
93120                            </enumeratedValue>
93121                        </enumeratedValues>
93122                    </field>
93123                    <field>
93124                        <name>KEY_R</name>
93125                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93126                        <bitRange>[5:3]</bitRange>
93127                        <access>read-only</access>
93128                    </field>
93129                    <field>
93130                        <name>KEY_W</name>
93131                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93132                        <bitRange>[2:0]</bitRange>
93133                        <access>read-only</access>
93134                    </field>
93135                </fields>
93136            </register>
93137            <register>
93138                <name>PAGE19_LOCK1</name>
93139                <addressOffset>0x00003e9c</addressOffset>
93140                <description>Lock configuration MSBs for page 19 (rows 0x4c0 through 0x4ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93141
93142                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93143                <resetValue>0x00000000</resetValue>
93144                <fields>
93145                    <field>
93146                        <name>R2</name>
93147                        <description>Redundant copy of bits 7:0</description>
93148                        <bitRange>[23:16]</bitRange>
93149                        <access>read-only</access>
93150                    </field>
93151                    <field>
93152                        <name>R1</name>
93153                        <description>Redundant copy of bits 7:0</description>
93154                        <bitRange>[15:8]</bitRange>
93155                        <access>read-only</access>
93156                    </field>
93157                    <field>
93158                        <name>LOCK_BL</name>
93159                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93160                        <bitRange>[5:4]</bitRange>
93161                        <access>read-only</access>
93162                        <enumeratedValues>
93163                            <enumeratedValue>
93164                                <name>read_write</name>
93165                                <value>0</value>
93166                                <description>Bootloader permits user reads and writes to this page</description>
93167                            </enumeratedValue>
93168                            <enumeratedValue>
93169                                <name>read_only</name>
93170                                <value>1</value>
93171                                <description>Bootloader permits user reads of this page</description>
93172                            </enumeratedValue>
93173                            <enumeratedValue>
93174                                <name>reserved</name>
93175                                <value>2</value>
93176                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93177                            </enumeratedValue>
93178                            <enumeratedValue>
93179                                <name>inaccessible</name>
93180                                <value>3</value>
93181                                <description>Bootloader does not permit user access to this page</description>
93182                            </enumeratedValue>
93183                        </enumeratedValues>
93184                    </field>
93185                    <field>
93186                        <name>LOCK_NS</name>
93187                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93188
93189                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93190                        <bitRange>[3:2]</bitRange>
93191                        <access>read-only</access>
93192                        <enumeratedValues>
93193                            <enumeratedValue>
93194                                <name>read_write</name>
93195                                <value>0</value>
93196                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93197                            </enumeratedValue>
93198                            <enumeratedValue>
93199                                <name>read_only</name>
93200                                <value>1</value>
93201                                <description>Page can be read by Non-secure software</description>
93202                            </enumeratedValue>
93203                            <enumeratedValue>
93204                                <name>reserved</name>
93205                                <value>2</value>
93206                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93207                            </enumeratedValue>
93208                            <enumeratedValue>
93209                                <name>inaccessible</name>
93210                                <value>3</value>
93211                                <description>Page can not be accessed by Non-secure software.</description>
93212                            </enumeratedValue>
93213                        </enumeratedValues>
93214                    </field>
93215                    <field>
93216                        <name>LOCK_S</name>
93217                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93218                        <bitRange>[1:0]</bitRange>
93219                        <access>read-only</access>
93220                        <enumeratedValues>
93221                            <enumeratedValue>
93222                                <name>read_write</name>
93223                                <value>0</value>
93224                                <description>Page is fully accessible by Secure software.</description>
93225                            </enumeratedValue>
93226                            <enumeratedValue>
93227                                <name>read_only</name>
93228                                <value>1</value>
93229                                <description>Page can be read by Secure software, but can not be written.</description>
93230                            </enumeratedValue>
93231                            <enumeratedValue>
93232                                <name>reserved</name>
93233                                <value>2</value>
93234                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93235                            </enumeratedValue>
93236                            <enumeratedValue>
93237                                <name>inaccessible</name>
93238                                <value>3</value>
93239                                <description>Page can not be accessed by Secure software.</description>
93240                            </enumeratedValue>
93241                        </enumeratedValues>
93242                    </field>
93243                </fields>
93244            </register>
93245            <register>
93246                <name>PAGE20_LOCK0</name>
93247                <addressOffset>0x00003ea0</addressOffset>
93248                <description>Lock configuration LSBs for page 20 (rows 0x500 through 0x53f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93249
93250                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93251                <resetValue>0x00000000</resetValue>
93252                <fields>
93253                    <field>
93254                        <name>R2</name>
93255                        <description>Redundant copy of bits 7:0</description>
93256                        <bitRange>[23:16]</bitRange>
93257                        <access>read-only</access>
93258                    </field>
93259                    <field>
93260                        <name>R1</name>
93261                        <description>Redundant copy of bits 7:0</description>
93262                        <bitRange>[15:8]</bitRange>
93263                        <access>read-only</access>
93264                    </field>
93265                    <field>
93266                        <name>NO_KEY_STATE</name>
93267                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93268                        <bitRange>[6:6]</bitRange>
93269                        <access>read-only</access>
93270                        <enumeratedValues>
93271                            <enumeratedValue>
93272                                <name>read_only</name>
93273                                <value>0</value>
93274                            </enumeratedValue>
93275                            <enumeratedValue>
93276                                <name>inaccessible</name>
93277                                <value>1</value>
93278                            </enumeratedValue>
93279                        </enumeratedValues>
93280                    </field>
93281                    <field>
93282                        <name>KEY_R</name>
93283                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93284                        <bitRange>[5:3]</bitRange>
93285                        <access>read-only</access>
93286                    </field>
93287                    <field>
93288                        <name>KEY_W</name>
93289                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93290                        <bitRange>[2:0]</bitRange>
93291                        <access>read-only</access>
93292                    </field>
93293                </fields>
93294            </register>
93295            <register>
93296                <name>PAGE20_LOCK1</name>
93297                <addressOffset>0x00003ea4</addressOffset>
93298                <description>Lock configuration MSBs for page 20 (rows 0x500 through 0x53f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93299
93300                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93301                <resetValue>0x00000000</resetValue>
93302                <fields>
93303                    <field>
93304                        <name>R2</name>
93305                        <description>Redundant copy of bits 7:0</description>
93306                        <bitRange>[23:16]</bitRange>
93307                        <access>read-only</access>
93308                    </field>
93309                    <field>
93310                        <name>R1</name>
93311                        <description>Redundant copy of bits 7:0</description>
93312                        <bitRange>[15:8]</bitRange>
93313                        <access>read-only</access>
93314                    </field>
93315                    <field>
93316                        <name>LOCK_BL</name>
93317                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93318                        <bitRange>[5:4]</bitRange>
93319                        <access>read-only</access>
93320                        <enumeratedValues>
93321                            <enumeratedValue>
93322                                <name>read_write</name>
93323                                <value>0</value>
93324                                <description>Bootloader permits user reads and writes to this page</description>
93325                            </enumeratedValue>
93326                            <enumeratedValue>
93327                                <name>read_only</name>
93328                                <value>1</value>
93329                                <description>Bootloader permits user reads of this page</description>
93330                            </enumeratedValue>
93331                            <enumeratedValue>
93332                                <name>reserved</name>
93333                                <value>2</value>
93334                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93335                            </enumeratedValue>
93336                            <enumeratedValue>
93337                                <name>inaccessible</name>
93338                                <value>3</value>
93339                                <description>Bootloader does not permit user access to this page</description>
93340                            </enumeratedValue>
93341                        </enumeratedValues>
93342                    </field>
93343                    <field>
93344                        <name>LOCK_NS</name>
93345                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93346
93347                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93348                        <bitRange>[3:2]</bitRange>
93349                        <access>read-only</access>
93350                        <enumeratedValues>
93351                            <enumeratedValue>
93352                                <name>read_write</name>
93353                                <value>0</value>
93354                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93355                            </enumeratedValue>
93356                            <enumeratedValue>
93357                                <name>read_only</name>
93358                                <value>1</value>
93359                                <description>Page can be read by Non-secure software</description>
93360                            </enumeratedValue>
93361                            <enumeratedValue>
93362                                <name>reserved</name>
93363                                <value>2</value>
93364                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93365                            </enumeratedValue>
93366                            <enumeratedValue>
93367                                <name>inaccessible</name>
93368                                <value>3</value>
93369                                <description>Page can not be accessed by Non-secure software.</description>
93370                            </enumeratedValue>
93371                        </enumeratedValues>
93372                    </field>
93373                    <field>
93374                        <name>LOCK_S</name>
93375                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93376                        <bitRange>[1:0]</bitRange>
93377                        <access>read-only</access>
93378                        <enumeratedValues>
93379                            <enumeratedValue>
93380                                <name>read_write</name>
93381                                <value>0</value>
93382                                <description>Page is fully accessible by Secure software.</description>
93383                            </enumeratedValue>
93384                            <enumeratedValue>
93385                                <name>read_only</name>
93386                                <value>1</value>
93387                                <description>Page can be read by Secure software, but can not be written.</description>
93388                            </enumeratedValue>
93389                            <enumeratedValue>
93390                                <name>reserved</name>
93391                                <value>2</value>
93392                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93393                            </enumeratedValue>
93394                            <enumeratedValue>
93395                                <name>inaccessible</name>
93396                                <value>3</value>
93397                                <description>Page can not be accessed by Secure software.</description>
93398                            </enumeratedValue>
93399                        </enumeratedValues>
93400                    </field>
93401                </fields>
93402            </register>
93403            <register>
93404                <name>PAGE21_LOCK0</name>
93405                <addressOffset>0x00003ea8</addressOffset>
93406                <description>Lock configuration LSBs for page 21 (rows 0x540 through 0x57f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93407
93408                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93409                <resetValue>0x00000000</resetValue>
93410                <fields>
93411                    <field>
93412                        <name>R2</name>
93413                        <description>Redundant copy of bits 7:0</description>
93414                        <bitRange>[23:16]</bitRange>
93415                        <access>read-only</access>
93416                    </field>
93417                    <field>
93418                        <name>R1</name>
93419                        <description>Redundant copy of bits 7:0</description>
93420                        <bitRange>[15:8]</bitRange>
93421                        <access>read-only</access>
93422                    </field>
93423                    <field>
93424                        <name>NO_KEY_STATE</name>
93425                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93426                        <bitRange>[6:6]</bitRange>
93427                        <access>read-only</access>
93428                        <enumeratedValues>
93429                            <enumeratedValue>
93430                                <name>read_only</name>
93431                                <value>0</value>
93432                            </enumeratedValue>
93433                            <enumeratedValue>
93434                                <name>inaccessible</name>
93435                                <value>1</value>
93436                            </enumeratedValue>
93437                        </enumeratedValues>
93438                    </field>
93439                    <field>
93440                        <name>KEY_R</name>
93441                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93442                        <bitRange>[5:3]</bitRange>
93443                        <access>read-only</access>
93444                    </field>
93445                    <field>
93446                        <name>KEY_W</name>
93447                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93448                        <bitRange>[2:0]</bitRange>
93449                        <access>read-only</access>
93450                    </field>
93451                </fields>
93452            </register>
93453            <register>
93454                <name>PAGE21_LOCK1</name>
93455                <addressOffset>0x00003eac</addressOffset>
93456                <description>Lock configuration MSBs for page 21 (rows 0x540 through 0x57f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93457
93458                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93459                <resetValue>0x00000000</resetValue>
93460                <fields>
93461                    <field>
93462                        <name>R2</name>
93463                        <description>Redundant copy of bits 7:0</description>
93464                        <bitRange>[23:16]</bitRange>
93465                        <access>read-only</access>
93466                    </field>
93467                    <field>
93468                        <name>R1</name>
93469                        <description>Redundant copy of bits 7:0</description>
93470                        <bitRange>[15:8]</bitRange>
93471                        <access>read-only</access>
93472                    </field>
93473                    <field>
93474                        <name>LOCK_BL</name>
93475                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93476                        <bitRange>[5:4]</bitRange>
93477                        <access>read-only</access>
93478                        <enumeratedValues>
93479                            <enumeratedValue>
93480                                <name>read_write</name>
93481                                <value>0</value>
93482                                <description>Bootloader permits user reads and writes to this page</description>
93483                            </enumeratedValue>
93484                            <enumeratedValue>
93485                                <name>read_only</name>
93486                                <value>1</value>
93487                                <description>Bootloader permits user reads of this page</description>
93488                            </enumeratedValue>
93489                            <enumeratedValue>
93490                                <name>reserved</name>
93491                                <value>2</value>
93492                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93493                            </enumeratedValue>
93494                            <enumeratedValue>
93495                                <name>inaccessible</name>
93496                                <value>3</value>
93497                                <description>Bootloader does not permit user access to this page</description>
93498                            </enumeratedValue>
93499                        </enumeratedValues>
93500                    </field>
93501                    <field>
93502                        <name>LOCK_NS</name>
93503                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93504
93505                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93506                        <bitRange>[3:2]</bitRange>
93507                        <access>read-only</access>
93508                        <enumeratedValues>
93509                            <enumeratedValue>
93510                                <name>read_write</name>
93511                                <value>0</value>
93512                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93513                            </enumeratedValue>
93514                            <enumeratedValue>
93515                                <name>read_only</name>
93516                                <value>1</value>
93517                                <description>Page can be read by Non-secure software</description>
93518                            </enumeratedValue>
93519                            <enumeratedValue>
93520                                <name>reserved</name>
93521                                <value>2</value>
93522                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93523                            </enumeratedValue>
93524                            <enumeratedValue>
93525                                <name>inaccessible</name>
93526                                <value>3</value>
93527                                <description>Page can not be accessed by Non-secure software.</description>
93528                            </enumeratedValue>
93529                        </enumeratedValues>
93530                    </field>
93531                    <field>
93532                        <name>LOCK_S</name>
93533                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93534                        <bitRange>[1:0]</bitRange>
93535                        <access>read-only</access>
93536                        <enumeratedValues>
93537                            <enumeratedValue>
93538                                <name>read_write</name>
93539                                <value>0</value>
93540                                <description>Page is fully accessible by Secure software.</description>
93541                            </enumeratedValue>
93542                            <enumeratedValue>
93543                                <name>read_only</name>
93544                                <value>1</value>
93545                                <description>Page can be read by Secure software, but can not be written.</description>
93546                            </enumeratedValue>
93547                            <enumeratedValue>
93548                                <name>reserved</name>
93549                                <value>2</value>
93550                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93551                            </enumeratedValue>
93552                            <enumeratedValue>
93553                                <name>inaccessible</name>
93554                                <value>3</value>
93555                                <description>Page can not be accessed by Secure software.</description>
93556                            </enumeratedValue>
93557                        </enumeratedValues>
93558                    </field>
93559                </fields>
93560            </register>
93561            <register>
93562                <name>PAGE22_LOCK0</name>
93563                <addressOffset>0x00003eb0</addressOffset>
93564                <description>Lock configuration LSBs for page 22 (rows 0x580 through 0x5bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93565
93566                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93567                <resetValue>0x00000000</resetValue>
93568                <fields>
93569                    <field>
93570                        <name>R2</name>
93571                        <description>Redundant copy of bits 7:0</description>
93572                        <bitRange>[23:16]</bitRange>
93573                        <access>read-only</access>
93574                    </field>
93575                    <field>
93576                        <name>R1</name>
93577                        <description>Redundant copy of bits 7:0</description>
93578                        <bitRange>[15:8]</bitRange>
93579                        <access>read-only</access>
93580                    </field>
93581                    <field>
93582                        <name>NO_KEY_STATE</name>
93583                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93584                        <bitRange>[6:6]</bitRange>
93585                        <access>read-only</access>
93586                        <enumeratedValues>
93587                            <enumeratedValue>
93588                                <name>read_only</name>
93589                                <value>0</value>
93590                            </enumeratedValue>
93591                            <enumeratedValue>
93592                                <name>inaccessible</name>
93593                                <value>1</value>
93594                            </enumeratedValue>
93595                        </enumeratedValues>
93596                    </field>
93597                    <field>
93598                        <name>KEY_R</name>
93599                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93600                        <bitRange>[5:3]</bitRange>
93601                        <access>read-only</access>
93602                    </field>
93603                    <field>
93604                        <name>KEY_W</name>
93605                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93606                        <bitRange>[2:0]</bitRange>
93607                        <access>read-only</access>
93608                    </field>
93609                </fields>
93610            </register>
93611            <register>
93612                <name>PAGE22_LOCK1</name>
93613                <addressOffset>0x00003eb4</addressOffset>
93614                <description>Lock configuration MSBs for page 22 (rows 0x580 through 0x5bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93615
93616                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93617                <resetValue>0x00000000</resetValue>
93618                <fields>
93619                    <field>
93620                        <name>R2</name>
93621                        <description>Redundant copy of bits 7:0</description>
93622                        <bitRange>[23:16]</bitRange>
93623                        <access>read-only</access>
93624                    </field>
93625                    <field>
93626                        <name>R1</name>
93627                        <description>Redundant copy of bits 7:0</description>
93628                        <bitRange>[15:8]</bitRange>
93629                        <access>read-only</access>
93630                    </field>
93631                    <field>
93632                        <name>LOCK_BL</name>
93633                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93634                        <bitRange>[5:4]</bitRange>
93635                        <access>read-only</access>
93636                        <enumeratedValues>
93637                            <enumeratedValue>
93638                                <name>read_write</name>
93639                                <value>0</value>
93640                                <description>Bootloader permits user reads and writes to this page</description>
93641                            </enumeratedValue>
93642                            <enumeratedValue>
93643                                <name>read_only</name>
93644                                <value>1</value>
93645                                <description>Bootloader permits user reads of this page</description>
93646                            </enumeratedValue>
93647                            <enumeratedValue>
93648                                <name>reserved</name>
93649                                <value>2</value>
93650                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93651                            </enumeratedValue>
93652                            <enumeratedValue>
93653                                <name>inaccessible</name>
93654                                <value>3</value>
93655                                <description>Bootloader does not permit user access to this page</description>
93656                            </enumeratedValue>
93657                        </enumeratedValues>
93658                    </field>
93659                    <field>
93660                        <name>LOCK_NS</name>
93661                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93662
93663                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93664                        <bitRange>[3:2]</bitRange>
93665                        <access>read-only</access>
93666                        <enumeratedValues>
93667                            <enumeratedValue>
93668                                <name>read_write</name>
93669                                <value>0</value>
93670                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93671                            </enumeratedValue>
93672                            <enumeratedValue>
93673                                <name>read_only</name>
93674                                <value>1</value>
93675                                <description>Page can be read by Non-secure software</description>
93676                            </enumeratedValue>
93677                            <enumeratedValue>
93678                                <name>reserved</name>
93679                                <value>2</value>
93680                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93681                            </enumeratedValue>
93682                            <enumeratedValue>
93683                                <name>inaccessible</name>
93684                                <value>3</value>
93685                                <description>Page can not be accessed by Non-secure software.</description>
93686                            </enumeratedValue>
93687                        </enumeratedValues>
93688                    </field>
93689                    <field>
93690                        <name>LOCK_S</name>
93691                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93692                        <bitRange>[1:0]</bitRange>
93693                        <access>read-only</access>
93694                        <enumeratedValues>
93695                            <enumeratedValue>
93696                                <name>read_write</name>
93697                                <value>0</value>
93698                                <description>Page is fully accessible by Secure software.</description>
93699                            </enumeratedValue>
93700                            <enumeratedValue>
93701                                <name>read_only</name>
93702                                <value>1</value>
93703                                <description>Page can be read by Secure software, but can not be written.</description>
93704                            </enumeratedValue>
93705                            <enumeratedValue>
93706                                <name>reserved</name>
93707                                <value>2</value>
93708                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93709                            </enumeratedValue>
93710                            <enumeratedValue>
93711                                <name>inaccessible</name>
93712                                <value>3</value>
93713                                <description>Page can not be accessed by Secure software.</description>
93714                            </enumeratedValue>
93715                        </enumeratedValues>
93716                    </field>
93717                </fields>
93718            </register>
93719            <register>
93720                <name>PAGE23_LOCK0</name>
93721                <addressOffset>0x00003eb8</addressOffset>
93722                <description>Lock configuration LSBs for page 23 (rows 0x5c0 through 0x5ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93723
93724                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93725                <resetValue>0x00000000</resetValue>
93726                <fields>
93727                    <field>
93728                        <name>R2</name>
93729                        <description>Redundant copy of bits 7:0</description>
93730                        <bitRange>[23:16]</bitRange>
93731                        <access>read-only</access>
93732                    </field>
93733                    <field>
93734                        <name>R1</name>
93735                        <description>Redundant copy of bits 7:0</description>
93736                        <bitRange>[15:8]</bitRange>
93737                        <access>read-only</access>
93738                    </field>
93739                    <field>
93740                        <name>NO_KEY_STATE</name>
93741                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93742                        <bitRange>[6:6]</bitRange>
93743                        <access>read-only</access>
93744                        <enumeratedValues>
93745                            <enumeratedValue>
93746                                <name>read_only</name>
93747                                <value>0</value>
93748                            </enumeratedValue>
93749                            <enumeratedValue>
93750                                <name>inaccessible</name>
93751                                <value>1</value>
93752                            </enumeratedValue>
93753                        </enumeratedValues>
93754                    </field>
93755                    <field>
93756                        <name>KEY_R</name>
93757                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93758                        <bitRange>[5:3]</bitRange>
93759                        <access>read-only</access>
93760                    </field>
93761                    <field>
93762                        <name>KEY_W</name>
93763                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93764                        <bitRange>[2:0]</bitRange>
93765                        <access>read-only</access>
93766                    </field>
93767                </fields>
93768            </register>
93769            <register>
93770                <name>PAGE23_LOCK1</name>
93771                <addressOffset>0x00003ebc</addressOffset>
93772                <description>Lock configuration MSBs for page 23 (rows 0x5c0 through 0x5ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93773
93774                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93775                <resetValue>0x00000000</resetValue>
93776                <fields>
93777                    <field>
93778                        <name>R2</name>
93779                        <description>Redundant copy of bits 7:0</description>
93780                        <bitRange>[23:16]</bitRange>
93781                        <access>read-only</access>
93782                    </field>
93783                    <field>
93784                        <name>R1</name>
93785                        <description>Redundant copy of bits 7:0</description>
93786                        <bitRange>[15:8]</bitRange>
93787                        <access>read-only</access>
93788                    </field>
93789                    <field>
93790                        <name>LOCK_BL</name>
93791                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93792                        <bitRange>[5:4]</bitRange>
93793                        <access>read-only</access>
93794                        <enumeratedValues>
93795                            <enumeratedValue>
93796                                <name>read_write</name>
93797                                <value>0</value>
93798                                <description>Bootloader permits user reads and writes to this page</description>
93799                            </enumeratedValue>
93800                            <enumeratedValue>
93801                                <name>read_only</name>
93802                                <value>1</value>
93803                                <description>Bootloader permits user reads of this page</description>
93804                            </enumeratedValue>
93805                            <enumeratedValue>
93806                                <name>reserved</name>
93807                                <value>2</value>
93808                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93809                            </enumeratedValue>
93810                            <enumeratedValue>
93811                                <name>inaccessible</name>
93812                                <value>3</value>
93813                                <description>Bootloader does not permit user access to this page</description>
93814                            </enumeratedValue>
93815                        </enumeratedValues>
93816                    </field>
93817                    <field>
93818                        <name>LOCK_NS</name>
93819                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93820
93821                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93822                        <bitRange>[3:2]</bitRange>
93823                        <access>read-only</access>
93824                        <enumeratedValues>
93825                            <enumeratedValue>
93826                                <name>read_write</name>
93827                                <value>0</value>
93828                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93829                            </enumeratedValue>
93830                            <enumeratedValue>
93831                                <name>read_only</name>
93832                                <value>1</value>
93833                                <description>Page can be read by Non-secure software</description>
93834                            </enumeratedValue>
93835                            <enumeratedValue>
93836                                <name>reserved</name>
93837                                <value>2</value>
93838                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93839                            </enumeratedValue>
93840                            <enumeratedValue>
93841                                <name>inaccessible</name>
93842                                <value>3</value>
93843                                <description>Page can not be accessed by Non-secure software.</description>
93844                            </enumeratedValue>
93845                        </enumeratedValues>
93846                    </field>
93847                    <field>
93848                        <name>LOCK_S</name>
93849                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
93850                        <bitRange>[1:0]</bitRange>
93851                        <access>read-only</access>
93852                        <enumeratedValues>
93853                            <enumeratedValue>
93854                                <name>read_write</name>
93855                                <value>0</value>
93856                                <description>Page is fully accessible by Secure software.</description>
93857                            </enumeratedValue>
93858                            <enumeratedValue>
93859                                <name>read_only</name>
93860                                <value>1</value>
93861                                <description>Page can be read by Secure software, but can not be written.</description>
93862                            </enumeratedValue>
93863                            <enumeratedValue>
93864                                <name>reserved</name>
93865                                <value>2</value>
93866                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93867                            </enumeratedValue>
93868                            <enumeratedValue>
93869                                <name>inaccessible</name>
93870                                <value>3</value>
93871                                <description>Page can not be accessed by Secure software.</description>
93872                            </enumeratedValue>
93873                        </enumeratedValues>
93874                    </field>
93875                </fields>
93876            </register>
93877            <register>
93878                <name>PAGE24_LOCK0</name>
93879                <addressOffset>0x00003ec0</addressOffset>
93880                <description>Lock configuration LSBs for page 24 (rows 0x600 through 0x63f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93881
93882                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93883                <resetValue>0x00000000</resetValue>
93884                <fields>
93885                    <field>
93886                        <name>R2</name>
93887                        <description>Redundant copy of bits 7:0</description>
93888                        <bitRange>[23:16]</bitRange>
93889                        <access>read-only</access>
93890                    </field>
93891                    <field>
93892                        <name>R1</name>
93893                        <description>Redundant copy of bits 7:0</description>
93894                        <bitRange>[15:8]</bitRange>
93895                        <access>read-only</access>
93896                    </field>
93897                    <field>
93898                        <name>NO_KEY_STATE</name>
93899                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
93900                        <bitRange>[6:6]</bitRange>
93901                        <access>read-only</access>
93902                        <enumeratedValues>
93903                            <enumeratedValue>
93904                                <name>read_only</name>
93905                                <value>0</value>
93906                            </enumeratedValue>
93907                            <enumeratedValue>
93908                                <name>inaccessible</name>
93909                                <value>1</value>
93910                            </enumeratedValue>
93911                        </enumeratedValues>
93912                    </field>
93913                    <field>
93914                        <name>KEY_R</name>
93915                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
93916                        <bitRange>[5:3]</bitRange>
93917                        <access>read-only</access>
93918                    </field>
93919                    <field>
93920                        <name>KEY_W</name>
93921                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
93922                        <bitRange>[2:0]</bitRange>
93923                        <access>read-only</access>
93924                    </field>
93925                </fields>
93926            </register>
93927            <register>
93928                <name>PAGE24_LOCK1</name>
93929                <addressOffset>0x00003ec4</addressOffset>
93930                <description>Lock configuration MSBs for page 24 (rows 0x600 through 0x63f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
93931
93932                    This OTP location is always readable, and is write-protected by its own permissions.</description>
93933                <resetValue>0x00000000</resetValue>
93934                <fields>
93935                    <field>
93936                        <name>R2</name>
93937                        <description>Redundant copy of bits 7:0</description>
93938                        <bitRange>[23:16]</bitRange>
93939                        <access>read-only</access>
93940                    </field>
93941                    <field>
93942                        <name>R1</name>
93943                        <description>Redundant copy of bits 7:0</description>
93944                        <bitRange>[15:8]</bitRange>
93945                        <access>read-only</access>
93946                    </field>
93947                    <field>
93948                        <name>LOCK_BL</name>
93949                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
93950                        <bitRange>[5:4]</bitRange>
93951                        <access>read-only</access>
93952                        <enumeratedValues>
93953                            <enumeratedValue>
93954                                <name>read_write</name>
93955                                <value>0</value>
93956                                <description>Bootloader permits user reads and writes to this page</description>
93957                            </enumeratedValue>
93958                            <enumeratedValue>
93959                                <name>read_only</name>
93960                                <value>1</value>
93961                                <description>Bootloader permits user reads of this page</description>
93962                            </enumeratedValue>
93963                            <enumeratedValue>
93964                                <name>reserved</name>
93965                                <value>2</value>
93966                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
93967                            </enumeratedValue>
93968                            <enumeratedValue>
93969                                <name>inaccessible</name>
93970                                <value>3</value>
93971                                <description>Bootloader does not permit user access to this page</description>
93972                            </enumeratedValue>
93973                        </enumeratedValues>
93974                    </field>
93975                    <field>
93976                        <name>LOCK_NS</name>
93977                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
93978
93979                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
93980                        <bitRange>[3:2]</bitRange>
93981                        <access>read-only</access>
93982                        <enumeratedValues>
93983                            <enumeratedValue>
93984                                <name>read_write</name>
93985                                <value>0</value>
93986                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
93987                            </enumeratedValue>
93988                            <enumeratedValue>
93989                                <name>read_only</name>
93990                                <value>1</value>
93991                                <description>Page can be read by Non-secure software</description>
93992                            </enumeratedValue>
93993                            <enumeratedValue>
93994                                <name>reserved</name>
93995                                <value>2</value>
93996                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
93997                            </enumeratedValue>
93998                            <enumeratedValue>
93999                                <name>inaccessible</name>
94000                                <value>3</value>
94001                                <description>Page can not be accessed by Non-secure software.</description>
94002                            </enumeratedValue>
94003                        </enumeratedValues>
94004                    </field>
94005                    <field>
94006                        <name>LOCK_S</name>
94007                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94008                        <bitRange>[1:0]</bitRange>
94009                        <access>read-only</access>
94010                        <enumeratedValues>
94011                            <enumeratedValue>
94012                                <name>read_write</name>
94013                                <value>0</value>
94014                                <description>Page is fully accessible by Secure software.</description>
94015                            </enumeratedValue>
94016                            <enumeratedValue>
94017                                <name>read_only</name>
94018                                <value>1</value>
94019                                <description>Page can be read by Secure software, but can not be written.</description>
94020                            </enumeratedValue>
94021                            <enumeratedValue>
94022                                <name>reserved</name>
94023                                <value>2</value>
94024                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94025                            </enumeratedValue>
94026                            <enumeratedValue>
94027                                <name>inaccessible</name>
94028                                <value>3</value>
94029                                <description>Page can not be accessed by Secure software.</description>
94030                            </enumeratedValue>
94031                        </enumeratedValues>
94032                    </field>
94033                </fields>
94034            </register>
94035            <register>
94036                <name>PAGE25_LOCK0</name>
94037                <addressOffset>0x00003ec8</addressOffset>
94038                <description>Lock configuration LSBs for page 25 (rows 0x640 through 0x67f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94039
94040                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94041                <resetValue>0x00000000</resetValue>
94042                <fields>
94043                    <field>
94044                        <name>R2</name>
94045                        <description>Redundant copy of bits 7:0</description>
94046                        <bitRange>[23:16]</bitRange>
94047                        <access>read-only</access>
94048                    </field>
94049                    <field>
94050                        <name>R1</name>
94051                        <description>Redundant copy of bits 7:0</description>
94052                        <bitRange>[15:8]</bitRange>
94053                        <access>read-only</access>
94054                    </field>
94055                    <field>
94056                        <name>NO_KEY_STATE</name>
94057                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94058                        <bitRange>[6:6]</bitRange>
94059                        <access>read-only</access>
94060                        <enumeratedValues>
94061                            <enumeratedValue>
94062                                <name>read_only</name>
94063                                <value>0</value>
94064                            </enumeratedValue>
94065                            <enumeratedValue>
94066                                <name>inaccessible</name>
94067                                <value>1</value>
94068                            </enumeratedValue>
94069                        </enumeratedValues>
94070                    </field>
94071                    <field>
94072                        <name>KEY_R</name>
94073                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94074                        <bitRange>[5:3]</bitRange>
94075                        <access>read-only</access>
94076                    </field>
94077                    <field>
94078                        <name>KEY_W</name>
94079                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94080                        <bitRange>[2:0]</bitRange>
94081                        <access>read-only</access>
94082                    </field>
94083                </fields>
94084            </register>
94085            <register>
94086                <name>PAGE25_LOCK1</name>
94087                <addressOffset>0x00003ecc</addressOffset>
94088                <description>Lock configuration MSBs for page 25 (rows 0x640 through 0x67f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94089
94090                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94091                <resetValue>0x00000000</resetValue>
94092                <fields>
94093                    <field>
94094                        <name>R2</name>
94095                        <description>Redundant copy of bits 7:0</description>
94096                        <bitRange>[23:16]</bitRange>
94097                        <access>read-only</access>
94098                    </field>
94099                    <field>
94100                        <name>R1</name>
94101                        <description>Redundant copy of bits 7:0</description>
94102                        <bitRange>[15:8]</bitRange>
94103                        <access>read-only</access>
94104                    </field>
94105                    <field>
94106                        <name>LOCK_BL</name>
94107                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94108                        <bitRange>[5:4]</bitRange>
94109                        <access>read-only</access>
94110                        <enumeratedValues>
94111                            <enumeratedValue>
94112                                <name>read_write</name>
94113                                <value>0</value>
94114                                <description>Bootloader permits user reads and writes to this page</description>
94115                            </enumeratedValue>
94116                            <enumeratedValue>
94117                                <name>read_only</name>
94118                                <value>1</value>
94119                                <description>Bootloader permits user reads of this page</description>
94120                            </enumeratedValue>
94121                            <enumeratedValue>
94122                                <name>reserved</name>
94123                                <value>2</value>
94124                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94125                            </enumeratedValue>
94126                            <enumeratedValue>
94127                                <name>inaccessible</name>
94128                                <value>3</value>
94129                                <description>Bootloader does not permit user access to this page</description>
94130                            </enumeratedValue>
94131                        </enumeratedValues>
94132                    </field>
94133                    <field>
94134                        <name>LOCK_NS</name>
94135                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94136
94137                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94138                        <bitRange>[3:2]</bitRange>
94139                        <access>read-only</access>
94140                        <enumeratedValues>
94141                            <enumeratedValue>
94142                                <name>read_write</name>
94143                                <value>0</value>
94144                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94145                            </enumeratedValue>
94146                            <enumeratedValue>
94147                                <name>read_only</name>
94148                                <value>1</value>
94149                                <description>Page can be read by Non-secure software</description>
94150                            </enumeratedValue>
94151                            <enumeratedValue>
94152                                <name>reserved</name>
94153                                <value>2</value>
94154                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94155                            </enumeratedValue>
94156                            <enumeratedValue>
94157                                <name>inaccessible</name>
94158                                <value>3</value>
94159                                <description>Page can not be accessed by Non-secure software.</description>
94160                            </enumeratedValue>
94161                        </enumeratedValues>
94162                    </field>
94163                    <field>
94164                        <name>LOCK_S</name>
94165                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94166                        <bitRange>[1:0]</bitRange>
94167                        <access>read-only</access>
94168                        <enumeratedValues>
94169                            <enumeratedValue>
94170                                <name>read_write</name>
94171                                <value>0</value>
94172                                <description>Page is fully accessible by Secure software.</description>
94173                            </enumeratedValue>
94174                            <enumeratedValue>
94175                                <name>read_only</name>
94176                                <value>1</value>
94177                                <description>Page can be read by Secure software, but can not be written.</description>
94178                            </enumeratedValue>
94179                            <enumeratedValue>
94180                                <name>reserved</name>
94181                                <value>2</value>
94182                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94183                            </enumeratedValue>
94184                            <enumeratedValue>
94185                                <name>inaccessible</name>
94186                                <value>3</value>
94187                                <description>Page can not be accessed by Secure software.</description>
94188                            </enumeratedValue>
94189                        </enumeratedValues>
94190                    </field>
94191                </fields>
94192            </register>
94193            <register>
94194                <name>PAGE26_LOCK0</name>
94195                <addressOffset>0x00003ed0</addressOffset>
94196                <description>Lock configuration LSBs for page 26 (rows 0x680 through 0x6bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94197
94198                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94199                <resetValue>0x00000000</resetValue>
94200                <fields>
94201                    <field>
94202                        <name>R2</name>
94203                        <description>Redundant copy of bits 7:0</description>
94204                        <bitRange>[23:16]</bitRange>
94205                        <access>read-only</access>
94206                    </field>
94207                    <field>
94208                        <name>R1</name>
94209                        <description>Redundant copy of bits 7:0</description>
94210                        <bitRange>[15:8]</bitRange>
94211                        <access>read-only</access>
94212                    </field>
94213                    <field>
94214                        <name>NO_KEY_STATE</name>
94215                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94216                        <bitRange>[6:6]</bitRange>
94217                        <access>read-only</access>
94218                        <enumeratedValues>
94219                            <enumeratedValue>
94220                                <name>read_only</name>
94221                                <value>0</value>
94222                            </enumeratedValue>
94223                            <enumeratedValue>
94224                                <name>inaccessible</name>
94225                                <value>1</value>
94226                            </enumeratedValue>
94227                        </enumeratedValues>
94228                    </field>
94229                    <field>
94230                        <name>KEY_R</name>
94231                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94232                        <bitRange>[5:3]</bitRange>
94233                        <access>read-only</access>
94234                    </field>
94235                    <field>
94236                        <name>KEY_W</name>
94237                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94238                        <bitRange>[2:0]</bitRange>
94239                        <access>read-only</access>
94240                    </field>
94241                </fields>
94242            </register>
94243            <register>
94244                <name>PAGE26_LOCK1</name>
94245                <addressOffset>0x00003ed4</addressOffset>
94246                <description>Lock configuration MSBs for page 26 (rows 0x680 through 0x6bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94247
94248                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94249                <resetValue>0x00000000</resetValue>
94250                <fields>
94251                    <field>
94252                        <name>R2</name>
94253                        <description>Redundant copy of bits 7:0</description>
94254                        <bitRange>[23:16]</bitRange>
94255                        <access>read-only</access>
94256                    </field>
94257                    <field>
94258                        <name>R1</name>
94259                        <description>Redundant copy of bits 7:0</description>
94260                        <bitRange>[15:8]</bitRange>
94261                        <access>read-only</access>
94262                    </field>
94263                    <field>
94264                        <name>LOCK_BL</name>
94265                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94266                        <bitRange>[5:4]</bitRange>
94267                        <access>read-only</access>
94268                        <enumeratedValues>
94269                            <enumeratedValue>
94270                                <name>read_write</name>
94271                                <value>0</value>
94272                                <description>Bootloader permits user reads and writes to this page</description>
94273                            </enumeratedValue>
94274                            <enumeratedValue>
94275                                <name>read_only</name>
94276                                <value>1</value>
94277                                <description>Bootloader permits user reads of this page</description>
94278                            </enumeratedValue>
94279                            <enumeratedValue>
94280                                <name>reserved</name>
94281                                <value>2</value>
94282                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94283                            </enumeratedValue>
94284                            <enumeratedValue>
94285                                <name>inaccessible</name>
94286                                <value>3</value>
94287                                <description>Bootloader does not permit user access to this page</description>
94288                            </enumeratedValue>
94289                        </enumeratedValues>
94290                    </field>
94291                    <field>
94292                        <name>LOCK_NS</name>
94293                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94294
94295                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94296                        <bitRange>[3:2]</bitRange>
94297                        <access>read-only</access>
94298                        <enumeratedValues>
94299                            <enumeratedValue>
94300                                <name>read_write</name>
94301                                <value>0</value>
94302                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94303                            </enumeratedValue>
94304                            <enumeratedValue>
94305                                <name>read_only</name>
94306                                <value>1</value>
94307                                <description>Page can be read by Non-secure software</description>
94308                            </enumeratedValue>
94309                            <enumeratedValue>
94310                                <name>reserved</name>
94311                                <value>2</value>
94312                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94313                            </enumeratedValue>
94314                            <enumeratedValue>
94315                                <name>inaccessible</name>
94316                                <value>3</value>
94317                                <description>Page can not be accessed by Non-secure software.</description>
94318                            </enumeratedValue>
94319                        </enumeratedValues>
94320                    </field>
94321                    <field>
94322                        <name>LOCK_S</name>
94323                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94324                        <bitRange>[1:0]</bitRange>
94325                        <access>read-only</access>
94326                        <enumeratedValues>
94327                            <enumeratedValue>
94328                                <name>read_write</name>
94329                                <value>0</value>
94330                                <description>Page is fully accessible by Secure software.</description>
94331                            </enumeratedValue>
94332                            <enumeratedValue>
94333                                <name>read_only</name>
94334                                <value>1</value>
94335                                <description>Page can be read by Secure software, but can not be written.</description>
94336                            </enumeratedValue>
94337                            <enumeratedValue>
94338                                <name>reserved</name>
94339                                <value>2</value>
94340                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94341                            </enumeratedValue>
94342                            <enumeratedValue>
94343                                <name>inaccessible</name>
94344                                <value>3</value>
94345                                <description>Page can not be accessed by Secure software.</description>
94346                            </enumeratedValue>
94347                        </enumeratedValues>
94348                    </field>
94349                </fields>
94350            </register>
94351            <register>
94352                <name>PAGE27_LOCK0</name>
94353                <addressOffset>0x00003ed8</addressOffset>
94354                <description>Lock configuration LSBs for page 27 (rows 0x6c0 through 0x6ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94355
94356                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94357                <resetValue>0x00000000</resetValue>
94358                <fields>
94359                    <field>
94360                        <name>R2</name>
94361                        <description>Redundant copy of bits 7:0</description>
94362                        <bitRange>[23:16]</bitRange>
94363                        <access>read-only</access>
94364                    </field>
94365                    <field>
94366                        <name>R1</name>
94367                        <description>Redundant copy of bits 7:0</description>
94368                        <bitRange>[15:8]</bitRange>
94369                        <access>read-only</access>
94370                    </field>
94371                    <field>
94372                        <name>NO_KEY_STATE</name>
94373                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94374                        <bitRange>[6:6]</bitRange>
94375                        <access>read-only</access>
94376                        <enumeratedValues>
94377                            <enumeratedValue>
94378                                <name>read_only</name>
94379                                <value>0</value>
94380                            </enumeratedValue>
94381                            <enumeratedValue>
94382                                <name>inaccessible</name>
94383                                <value>1</value>
94384                            </enumeratedValue>
94385                        </enumeratedValues>
94386                    </field>
94387                    <field>
94388                        <name>KEY_R</name>
94389                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94390                        <bitRange>[5:3]</bitRange>
94391                        <access>read-only</access>
94392                    </field>
94393                    <field>
94394                        <name>KEY_W</name>
94395                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94396                        <bitRange>[2:0]</bitRange>
94397                        <access>read-only</access>
94398                    </field>
94399                </fields>
94400            </register>
94401            <register>
94402                <name>PAGE27_LOCK1</name>
94403                <addressOffset>0x00003edc</addressOffset>
94404                <description>Lock configuration MSBs for page 27 (rows 0x6c0 through 0x6ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94405
94406                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94407                <resetValue>0x00000000</resetValue>
94408                <fields>
94409                    <field>
94410                        <name>R2</name>
94411                        <description>Redundant copy of bits 7:0</description>
94412                        <bitRange>[23:16]</bitRange>
94413                        <access>read-only</access>
94414                    </field>
94415                    <field>
94416                        <name>R1</name>
94417                        <description>Redundant copy of bits 7:0</description>
94418                        <bitRange>[15:8]</bitRange>
94419                        <access>read-only</access>
94420                    </field>
94421                    <field>
94422                        <name>LOCK_BL</name>
94423                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94424                        <bitRange>[5:4]</bitRange>
94425                        <access>read-only</access>
94426                        <enumeratedValues>
94427                            <enumeratedValue>
94428                                <name>read_write</name>
94429                                <value>0</value>
94430                                <description>Bootloader permits user reads and writes to this page</description>
94431                            </enumeratedValue>
94432                            <enumeratedValue>
94433                                <name>read_only</name>
94434                                <value>1</value>
94435                                <description>Bootloader permits user reads of this page</description>
94436                            </enumeratedValue>
94437                            <enumeratedValue>
94438                                <name>reserved</name>
94439                                <value>2</value>
94440                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94441                            </enumeratedValue>
94442                            <enumeratedValue>
94443                                <name>inaccessible</name>
94444                                <value>3</value>
94445                                <description>Bootloader does not permit user access to this page</description>
94446                            </enumeratedValue>
94447                        </enumeratedValues>
94448                    </field>
94449                    <field>
94450                        <name>LOCK_NS</name>
94451                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94452
94453                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94454                        <bitRange>[3:2]</bitRange>
94455                        <access>read-only</access>
94456                        <enumeratedValues>
94457                            <enumeratedValue>
94458                                <name>read_write</name>
94459                                <value>0</value>
94460                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94461                            </enumeratedValue>
94462                            <enumeratedValue>
94463                                <name>read_only</name>
94464                                <value>1</value>
94465                                <description>Page can be read by Non-secure software</description>
94466                            </enumeratedValue>
94467                            <enumeratedValue>
94468                                <name>reserved</name>
94469                                <value>2</value>
94470                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94471                            </enumeratedValue>
94472                            <enumeratedValue>
94473                                <name>inaccessible</name>
94474                                <value>3</value>
94475                                <description>Page can not be accessed by Non-secure software.</description>
94476                            </enumeratedValue>
94477                        </enumeratedValues>
94478                    </field>
94479                    <field>
94480                        <name>LOCK_S</name>
94481                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94482                        <bitRange>[1:0]</bitRange>
94483                        <access>read-only</access>
94484                        <enumeratedValues>
94485                            <enumeratedValue>
94486                                <name>read_write</name>
94487                                <value>0</value>
94488                                <description>Page is fully accessible by Secure software.</description>
94489                            </enumeratedValue>
94490                            <enumeratedValue>
94491                                <name>read_only</name>
94492                                <value>1</value>
94493                                <description>Page can be read by Secure software, but can not be written.</description>
94494                            </enumeratedValue>
94495                            <enumeratedValue>
94496                                <name>reserved</name>
94497                                <value>2</value>
94498                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94499                            </enumeratedValue>
94500                            <enumeratedValue>
94501                                <name>inaccessible</name>
94502                                <value>3</value>
94503                                <description>Page can not be accessed by Secure software.</description>
94504                            </enumeratedValue>
94505                        </enumeratedValues>
94506                    </field>
94507                </fields>
94508            </register>
94509            <register>
94510                <name>PAGE28_LOCK0</name>
94511                <addressOffset>0x00003ee0</addressOffset>
94512                <description>Lock configuration LSBs for page 28 (rows 0x700 through 0x73f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94513
94514                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94515                <resetValue>0x00000000</resetValue>
94516                <fields>
94517                    <field>
94518                        <name>R2</name>
94519                        <description>Redundant copy of bits 7:0</description>
94520                        <bitRange>[23:16]</bitRange>
94521                        <access>read-only</access>
94522                    </field>
94523                    <field>
94524                        <name>R1</name>
94525                        <description>Redundant copy of bits 7:0</description>
94526                        <bitRange>[15:8]</bitRange>
94527                        <access>read-only</access>
94528                    </field>
94529                    <field>
94530                        <name>NO_KEY_STATE</name>
94531                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94532                        <bitRange>[6:6]</bitRange>
94533                        <access>read-only</access>
94534                        <enumeratedValues>
94535                            <enumeratedValue>
94536                                <name>read_only</name>
94537                                <value>0</value>
94538                            </enumeratedValue>
94539                            <enumeratedValue>
94540                                <name>inaccessible</name>
94541                                <value>1</value>
94542                            </enumeratedValue>
94543                        </enumeratedValues>
94544                    </field>
94545                    <field>
94546                        <name>KEY_R</name>
94547                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94548                        <bitRange>[5:3]</bitRange>
94549                        <access>read-only</access>
94550                    </field>
94551                    <field>
94552                        <name>KEY_W</name>
94553                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94554                        <bitRange>[2:0]</bitRange>
94555                        <access>read-only</access>
94556                    </field>
94557                </fields>
94558            </register>
94559            <register>
94560                <name>PAGE28_LOCK1</name>
94561                <addressOffset>0x00003ee4</addressOffset>
94562                <description>Lock configuration MSBs for page 28 (rows 0x700 through 0x73f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94563
94564                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94565                <resetValue>0x00000000</resetValue>
94566                <fields>
94567                    <field>
94568                        <name>R2</name>
94569                        <description>Redundant copy of bits 7:0</description>
94570                        <bitRange>[23:16]</bitRange>
94571                        <access>read-only</access>
94572                    </field>
94573                    <field>
94574                        <name>R1</name>
94575                        <description>Redundant copy of bits 7:0</description>
94576                        <bitRange>[15:8]</bitRange>
94577                        <access>read-only</access>
94578                    </field>
94579                    <field>
94580                        <name>LOCK_BL</name>
94581                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94582                        <bitRange>[5:4]</bitRange>
94583                        <access>read-only</access>
94584                        <enumeratedValues>
94585                            <enumeratedValue>
94586                                <name>read_write</name>
94587                                <value>0</value>
94588                                <description>Bootloader permits user reads and writes to this page</description>
94589                            </enumeratedValue>
94590                            <enumeratedValue>
94591                                <name>read_only</name>
94592                                <value>1</value>
94593                                <description>Bootloader permits user reads of this page</description>
94594                            </enumeratedValue>
94595                            <enumeratedValue>
94596                                <name>reserved</name>
94597                                <value>2</value>
94598                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94599                            </enumeratedValue>
94600                            <enumeratedValue>
94601                                <name>inaccessible</name>
94602                                <value>3</value>
94603                                <description>Bootloader does not permit user access to this page</description>
94604                            </enumeratedValue>
94605                        </enumeratedValues>
94606                    </field>
94607                    <field>
94608                        <name>LOCK_NS</name>
94609                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94610
94611                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94612                        <bitRange>[3:2]</bitRange>
94613                        <access>read-only</access>
94614                        <enumeratedValues>
94615                            <enumeratedValue>
94616                                <name>read_write</name>
94617                                <value>0</value>
94618                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94619                            </enumeratedValue>
94620                            <enumeratedValue>
94621                                <name>read_only</name>
94622                                <value>1</value>
94623                                <description>Page can be read by Non-secure software</description>
94624                            </enumeratedValue>
94625                            <enumeratedValue>
94626                                <name>reserved</name>
94627                                <value>2</value>
94628                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94629                            </enumeratedValue>
94630                            <enumeratedValue>
94631                                <name>inaccessible</name>
94632                                <value>3</value>
94633                                <description>Page can not be accessed by Non-secure software.</description>
94634                            </enumeratedValue>
94635                        </enumeratedValues>
94636                    </field>
94637                    <field>
94638                        <name>LOCK_S</name>
94639                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94640                        <bitRange>[1:0]</bitRange>
94641                        <access>read-only</access>
94642                        <enumeratedValues>
94643                            <enumeratedValue>
94644                                <name>read_write</name>
94645                                <value>0</value>
94646                                <description>Page is fully accessible by Secure software.</description>
94647                            </enumeratedValue>
94648                            <enumeratedValue>
94649                                <name>read_only</name>
94650                                <value>1</value>
94651                                <description>Page can be read by Secure software, but can not be written.</description>
94652                            </enumeratedValue>
94653                            <enumeratedValue>
94654                                <name>reserved</name>
94655                                <value>2</value>
94656                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94657                            </enumeratedValue>
94658                            <enumeratedValue>
94659                                <name>inaccessible</name>
94660                                <value>3</value>
94661                                <description>Page can not be accessed by Secure software.</description>
94662                            </enumeratedValue>
94663                        </enumeratedValues>
94664                    </field>
94665                </fields>
94666            </register>
94667            <register>
94668                <name>PAGE29_LOCK0</name>
94669                <addressOffset>0x00003ee8</addressOffset>
94670                <description>Lock configuration LSBs for page 29 (rows 0x740 through 0x77f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94671
94672                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94673                <resetValue>0x00000000</resetValue>
94674                <fields>
94675                    <field>
94676                        <name>R2</name>
94677                        <description>Redundant copy of bits 7:0</description>
94678                        <bitRange>[23:16]</bitRange>
94679                        <access>read-only</access>
94680                    </field>
94681                    <field>
94682                        <name>R1</name>
94683                        <description>Redundant copy of bits 7:0</description>
94684                        <bitRange>[15:8]</bitRange>
94685                        <access>read-only</access>
94686                    </field>
94687                    <field>
94688                        <name>NO_KEY_STATE</name>
94689                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94690                        <bitRange>[6:6]</bitRange>
94691                        <access>read-only</access>
94692                        <enumeratedValues>
94693                            <enumeratedValue>
94694                                <name>read_only</name>
94695                                <value>0</value>
94696                            </enumeratedValue>
94697                            <enumeratedValue>
94698                                <name>inaccessible</name>
94699                                <value>1</value>
94700                            </enumeratedValue>
94701                        </enumeratedValues>
94702                    </field>
94703                    <field>
94704                        <name>KEY_R</name>
94705                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94706                        <bitRange>[5:3]</bitRange>
94707                        <access>read-only</access>
94708                    </field>
94709                    <field>
94710                        <name>KEY_W</name>
94711                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94712                        <bitRange>[2:0]</bitRange>
94713                        <access>read-only</access>
94714                    </field>
94715                </fields>
94716            </register>
94717            <register>
94718                <name>PAGE29_LOCK1</name>
94719                <addressOffset>0x00003eec</addressOffset>
94720                <description>Lock configuration MSBs for page 29 (rows 0x740 through 0x77f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94721
94722                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94723                <resetValue>0x00000000</resetValue>
94724                <fields>
94725                    <field>
94726                        <name>R2</name>
94727                        <description>Redundant copy of bits 7:0</description>
94728                        <bitRange>[23:16]</bitRange>
94729                        <access>read-only</access>
94730                    </field>
94731                    <field>
94732                        <name>R1</name>
94733                        <description>Redundant copy of bits 7:0</description>
94734                        <bitRange>[15:8]</bitRange>
94735                        <access>read-only</access>
94736                    </field>
94737                    <field>
94738                        <name>LOCK_BL</name>
94739                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94740                        <bitRange>[5:4]</bitRange>
94741                        <access>read-only</access>
94742                        <enumeratedValues>
94743                            <enumeratedValue>
94744                                <name>read_write</name>
94745                                <value>0</value>
94746                                <description>Bootloader permits user reads and writes to this page</description>
94747                            </enumeratedValue>
94748                            <enumeratedValue>
94749                                <name>read_only</name>
94750                                <value>1</value>
94751                                <description>Bootloader permits user reads of this page</description>
94752                            </enumeratedValue>
94753                            <enumeratedValue>
94754                                <name>reserved</name>
94755                                <value>2</value>
94756                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94757                            </enumeratedValue>
94758                            <enumeratedValue>
94759                                <name>inaccessible</name>
94760                                <value>3</value>
94761                                <description>Bootloader does not permit user access to this page</description>
94762                            </enumeratedValue>
94763                        </enumeratedValues>
94764                    </field>
94765                    <field>
94766                        <name>LOCK_NS</name>
94767                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94768
94769                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94770                        <bitRange>[3:2]</bitRange>
94771                        <access>read-only</access>
94772                        <enumeratedValues>
94773                            <enumeratedValue>
94774                                <name>read_write</name>
94775                                <value>0</value>
94776                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94777                            </enumeratedValue>
94778                            <enumeratedValue>
94779                                <name>read_only</name>
94780                                <value>1</value>
94781                                <description>Page can be read by Non-secure software</description>
94782                            </enumeratedValue>
94783                            <enumeratedValue>
94784                                <name>reserved</name>
94785                                <value>2</value>
94786                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94787                            </enumeratedValue>
94788                            <enumeratedValue>
94789                                <name>inaccessible</name>
94790                                <value>3</value>
94791                                <description>Page can not be accessed by Non-secure software.</description>
94792                            </enumeratedValue>
94793                        </enumeratedValues>
94794                    </field>
94795                    <field>
94796                        <name>LOCK_S</name>
94797                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94798                        <bitRange>[1:0]</bitRange>
94799                        <access>read-only</access>
94800                        <enumeratedValues>
94801                            <enumeratedValue>
94802                                <name>read_write</name>
94803                                <value>0</value>
94804                                <description>Page is fully accessible by Secure software.</description>
94805                            </enumeratedValue>
94806                            <enumeratedValue>
94807                                <name>read_only</name>
94808                                <value>1</value>
94809                                <description>Page can be read by Secure software, but can not be written.</description>
94810                            </enumeratedValue>
94811                            <enumeratedValue>
94812                                <name>reserved</name>
94813                                <value>2</value>
94814                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94815                            </enumeratedValue>
94816                            <enumeratedValue>
94817                                <name>inaccessible</name>
94818                                <value>3</value>
94819                                <description>Page can not be accessed by Secure software.</description>
94820                            </enumeratedValue>
94821                        </enumeratedValues>
94822                    </field>
94823                </fields>
94824            </register>
94825            <register>
94826                <name>PAGE30_LOCK0</name>
94827                <addressOffset>0x00003ef0</addressOffset>
94828                <description>Lock configuration LSBs for page 30 (rows 0x780 through 0x7bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94829
94830                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94831                <resetValue>0x00000000</resetValue>
94832                <fields>
94833                    <field>
94834                        <name>R2</name>
94835                        <description>Redundant copy of bits 7:0</description>
94836                        <bitRange>[23:16]</bitRange>
94837                        <access>read-only</access>
94838                    </field>
94839                    <field>
94840                        <name>R1</name>
94841                        <description>Redundant copy of bits 7:0</description>
94842                        <bitRange>[15:8]</bitRange>
94843                        <access>read-only</access>
94844                    </field>
94845                    <field>
94846                        <name>NO_KEY_STATE</name>
94847                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
94848                        <bitRange>[6:6]</bitRange>
94849                        <access>read-only</access>
94850                        <enumeratedValues>
94851                            <enumeratedValue>
94852                                <name>read_only</name>
94853                                <value>0</value>
94854                            </enumeratedValue>
94855                            <enumeratedValue>
94856                                <name>inaccessible</name>
94857                                <value>1</value>
94858                            </enumeratedValue>
94859                        </enumeratedValues>
94860                    </field>
94861                    <field>
94862                        <name>KEY_R</name>
94863                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
94864                        <bitRange>[5:3]</bitRange>
94865                        <access>read-only</access>
94866                    </field>
94867                    <field>
94868                        <name>KEY_W</name>
94869                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
94870                        <bitRange>[2:0]</bitRange>
94871                        <access>read-only</access>
94872                    </field>
94873                </fields>
94874            </register>
94875            <register>
94876                <name>PAGE30_LOCK1</name>
94877                <addressOffset>0x00003ef4</addressOffset>
94878                <description>Lock configuration MSBs for page 30 (rows 0x780 through 0x7bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94879
94880                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94881                <resetValue>0x00000000</resetValue>
94882                <fields>
94883                    <field>
94884                        <name>R2</name>
94885                        <description>Redundant copy of bits 7:0</description>
94886                        <bitRange>[23:16]</bitRange>
94887                        <access>read-only</access>
94888                    </field>
94889                    <field>
94890                        <name>R1</name>
94891                        <description>Redundant copy of bits 7:0</description>
94892                        <bitRange>[15:8]</bitRange>
94893                        <access>read-only</access>
94894                    </field>
94895                    <field>
94896                        <name>LOCK_BL</name>
94897                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
94898                        <bitRange>[5:4]</bitRange>
94899                        <access>read-only</access>
94900                        <enumeratedValues>
94901                            <enumeratedValue>
94902                                <name>read_write</name>
94903                                <value>0</value>
94904                                <description>Bootloader permits user reads and writes to this page</description>
94905                            </enumeratedValue>
94906                            <enumeratedValue>
94907                                <name>read_only</name>
94908                                <value>1</value>
94909                                <description>Bootloader permits user reads of this page</description>
94910                            </enumeratedValue>
94911                            <enumeratedValue>
94912                                <name>reserved</name>
94913                                <value>2</value>
94914                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
94915                            </enumeratedValue>
94916                            <enumeratedValue>
94917                                <name>inaccessible</name>
94918                                <value>3</value>
94919                                <description>Bootloader does not permit user access to this page</description>
94920                            </enumeratedValue>
94921                        </enumeratedValues>
94922                    </field>
94923                    <field>
94924                        <name>LOCK_NS</name>
94925                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
94926
94927                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
94928                        <bitRange>[3:2]</bitRange>
94929                        <access>read-only</access>
94930                        <enumeratedValues>
94931                            <enumeratedValue>
94932                                <name>read_write</name>
94933                                <value>0</value>
94934                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
94935                            </enumeratedValue>
94936                            <enumeratedValue>
94937                                <name>read_only</name>
94938                                <value>1</value>
94939                                <description>Page can be read by Non-secure software</description>
94940                            </enumeratedValue>
94941                            <enumeratedValue>
94942                                <name>reserved</name>
94943                                <value>2</value>
94944                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94945                            </enumeratedValue>
94946                            <enumeratedValue>
94947                                <name>inaccessible</name>
94948                                <value>3</value>
94949                                <description>Page can not be accessed by Non-secure software.</description>
94950                            </enumeratedValue>
94951                        </enumeratedValues>
94952                    </field>
94953                    <field>
94954                        <name>LOCK_S</name>
94955                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
94956                        <bitRange>[1:0]</bitRange>
94957                        <access>read-only</access>
94958                        <enumeratedValues>
94959                            <enumeratedValue>
94960                                <name>read_write</name>
94961                                <value>0</value>
94962                                <description>Page is fully accessible by Secure software.</description>
94963                            </enumeratedValue>
94964                            <enumeratedValue>
94965                                <name>read_only</name>
94966                                <value>1</value>
94967                                <description>Page can be read by Secure software, but can not be written.</description>
94968                            </enumeratedValue>
94969                            <enumeratedValue>
94970                                <name>reserved</name>
94971                                <value>2</value>
94972                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
94973                            </enumeratedValue>
94974                            <enumeratedValue>
94975                                <name>inaccessible</name>
94976                                <value>3</value>
94977                                <description>Page can not be accessed by Secure software.</description>
94978                            </enumeratedValue>
94979                        </enumeratedValues>
94980                    </field>
94981                </fields>
94982            </register>
94983            <register>
94984                <name>PAGE31_LOCK0</name>
94985                <addressOffset>0x00003ef8</addressOffset>
94986                <description>Lock configuration LSBs for page 31 (rows 0x7c0 through 0x7ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
94987
94988                    This OTP location is always readable, and is write-protected by its own permissions.</description>
94989                <resetValue>0x00000000</resetValue>
94990                <fields>
94991                    <field>
94992                        <name>R2</name>
94993                        <description>Redundant copy of bits 7:0</description>
94994                        <bitRange>[23:16]</bitRange>
94995                        <access>read-only</access>
94996                    </field>
94997                    <field>
94998                        <name>R1</name>
94999                        <description>Redundant copy of bits 7:0</description>
95000                        <bitRange>[15:8]</bitRange>
95001                        <access>read-only</access>
95002                    </field>
95003                    <field>
95004                        <name>NO_KEY_STATE</name>
95005                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95006                        <bitRange>[6:6]</bitRange>
95007                        <access>read-only</access>
95008                        <enumeratedValues>
95009                            <enumeratedValue>
95010                                <name>read_only</name>
95011                                <value>0</value>
95012                            </enumeratedValue>
95013                            <enumeratedValue>
95014                                <name>inaccessible</name>
95015                                <value>1</value>
95016                            </enumeratedValue>
95017                        </enumeratedValues>
95018                    </field>
95019                    <field>
95020                        <name>KEY_R</name>
95021                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95022                        <bitRange>[5:3]</bitRange>
95023                        <access>read-only</access>
95024                    </field>
95025                    <field>
95026                        <name>KEY_W</name>
95027                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95028                        <bitRange>[2:0]</bitRange>
95029                        <access>read-only</access>
95030                    </field>
95031                </fields>
95032            </register>
95033            <register>
95034                <name>PAGE31_LOCK1</name>
95035                <addressOffset>0x00003efc</addressOffset>
95036                <description>Lock configuration MSBs for page 31 (rows 0x7c0 through 0x7ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95037
95038                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95039                <resetValue>0x00000000</resetValue>
95040                <fields>
95041                    <field>
95042                        <name>R2</name>
95043                        <description>Redundant copy of bits 7:0</description>
95044                        <bitRange>[23:16]</bitRange>
95045                        <access>read-only</access>
95046                    </field>
95047                    <field>
95048                        <name>R1</name>
95049                        <description>Redundant copy of bits 7:0</description>
95050                        <bitRange>[15:8]</bitRange>
95051                        <access>read-only</access>
95052                    </field>
95053                    <field>
95054                        <name>LOCK_BL</name>
95055                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95056                        <bitRange>[5:4]</bitRange>
95057                        <access>read-only</access>
95058                        <enumeratedValues>
95059                            <enumeratedValue>
95060                                <name>read_write</name>
95061                                <value>0</value>
95062                                <description>Bootloader permits user reads and writes to this page</description>
95063                            </enumeratedValue>
95064                            <enumeratedValue>
95065                                <name>read_only</name>
95066                                <value>1</value>
95067                                <description>Bootloader permits user reads of this page</description>
95068                            </enumeratedValue>
95069                            <enumeratedValue>
95070                                <name>reserved</name>
95071                                <value>2</value>
95072                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95073                            </enumeratedValue>
95074                            <enumeratedValue>
95075                                <name>inaccessible</name>
95076                                <value>3</value>
95077                                <description>Bootloader does not permit user access to this page</description>
95078                            </enumeratedValue>
95079                        </enumeratedValues>
95080                    </field>
95081                    <field>
95082                        <name>LOCK_NS</name>
95083                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95084
95085                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95086                        <bitRange>[3:2]</bitRange>
95087                        <access>read-only</access>
95088                        <enumeratedValues>
95089                            <enumeratedValue>
95090                                <name>read_write</name>
95091                                <value>0</value>
95092                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95093                            </enumeratedValue>
95094                            <enumeratedValue>
95095                                <name>read_only</name>
95096                                <value>1</value>
95097                                <description>Page can be read by Non-secure software</description>
95098                            </enumeratedValue>
95099                            <enumeratedValue>
95100                                <name>reserved</name>
95101                                <value>2</value>
95102                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95103                            </enumeratedValue>
95104                            <enumeratedValue>
95105                                <name>inaccessible</name>
95106                                <value>3</value>
95107                                <description>Page can not be accessed by Non-secure software.</description>
95108                            </enumeratedValue>
95109                        </enumeratedValues>
95110                    </field>
95111                    <field>
95112                        <name>LOCK_S</name>
95113                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95114                        <bitRange>[1:0]</bitRange>
95115                        <access>read-only</access>
95116                        <enumeratedValues>
95117                            <enumeratedValue>
95118                                <name>read_write</name>
95119                                <value>0</value>
95120                                <description>Page is fully accessible by Secure software.</description>
95121                            </enumeratedValue>
95122                            <enumeratedValue>
95123                                <name>read_only</name>
95124                                <value>1</value>
95125                                <description>Page can be read by Secure software, but can not be written.</description>
95126                            </enumeratedValue>
95127                            <enumeratedValue>
95128                                <name>reserved</name>
95129                                <value>2</value>
95130                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95131                            </enumeratedValue>
95132                            <enumeratedValue>
95133                                <name>inaccessible</name>
95134                                <value>3</value>
95135                                <description>Page can not be accessed by Secure software.</description>
95136                            </enumeratedValue>
95137                        </enumeratedValues>
95138                    </field>
95139                </fields>
95140            </register>
95141            <register>
95142                <name>PAGE32_LOCK0</name>
95143                <addressOffset>0x00003f00</addressOffset>
95144                <description>Lock configuration LSBs for page 32 (rows 0x800 through 0x83f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95145
95146                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95147                <resetValue>0x00000000</resetValue>
95148                <fields>
95149                    <field>
95150                        <name>R2</name>
95151                        <description>Redundant copy of bits 7:0</description>
95152                        <bitRange>[23:16]</bitRange>
95153                        <access>read-only</access>
95154                    </field>
95155                    <field>
95156                        <name>R1</name>
95157                        <description>Redundant copy of bits 7:0</description>
95158                        <bitRange>[15:8]</bitRange>
95159                        <access>read-only</access>
95160                    </field>
95161                    <field>
95162                        <name>NO_KEY_STATE</name>
95163                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95164                        <bitRange>[6:6]</bitRange>
95165                        <access>read-only</access>
95166                        <enumeratedValues>
95167                            <enumeratedValue>
95168                                <name>read_only</name>
95169                                <value>0</value>
95170                            </enumeratedValue>
95171                            <enumeratedValue>
95172                                <name>inaccessible</name>
95173                                <value>1</value>
95174                            </enumeratedValue>
95175                        </enumeratedValues>
95176                    </field>
95177                    <field>
95178                        <name>KEY_R</name>
95179                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95180                        <bitRange>[5:3]</bitRange>
95181                        <access>read-only</access>
95182                    </field>
95183                    <field>
95184                        <name>KEY_W</name>
95185                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95186                        <bitRange>[2:0]</bitRange>
95187                        <access>read-only</access>
95188                    </field>
95189                </fields>
95190            </register>
95191            <register>
95192                <name>PAGE32_LOCK1</name>
95193                <addressOffset>0x00003f04</addressOffset>
95194                <description>Lock configuration MSBs for page 32 (rows 0x800 through 0x83f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95195
95196                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95197                <resetValue>0x00000000</resetValue>
95198                <fields>
95199                    <field>
95200                        <name>R2</name>
95201                        <description>Redundant copy of bits 7:0</description>
95202                        <bitRange>[23:16]</bitRange>
95203                        <access>read-only</access>
95204                    </field>
95205                    <field>
95206                        <name>R1</name>
95207                        <description>Redundant copy of bits 7:0</description>
95208                        <bitRange>[15:8]</bitRange>
95209                        <access>read-only</access>
95210                    </field>
95211                    <field>
95212                        <name>LOCK_BL</name>
95213                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95214                        <bitRange>[5:4]</bitRange>
95215                        <access>read-only</access>
95216                        <enumeratedValues>
95217                            <enumeratedValue>
95218                                <name>read_write</name>
95219                                <value>0</value>
95220                                <description>Bootloader permits user reads and writes to this page</description>
95221                            </enumeratedValue>
95222                            <enumeratedValue>
95223                                <name>read_only</name>
95224                                <value>1</value>
95225                                <description>Bootloader permits user reads of this page</description>
95226                            </enumeratedValue>
95227                            <enumeratedValue>
95228                                <name>reserved</name>
95229                                <value>2</value>
95230                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95231                            </enumeratedValue>
95232                            <enumeratedValue>
95233                                <name>inaccessible</name>
95234                                <value>3</value>
95235                                <description>Bootloader does not permit user access to this page</description>
95236                            </enumeratedValue>
95237                        </enumeratedValues>
95238                    </field>
95239                    <field>
95240                        <name>LOCK_NS</name>
95241                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95242
95243                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95244                        <bitRange>[3:2]</bitRange>
95245                        <access>read-only</access>
95246                        <enumeratedValues>
95247                            <enumeratedValue>
95248                                <name>read_write</name>
95249                                <value>0</value>
95250                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95251                            </enumeratedValue>
95252                            <enumeratedValue>
95253                                <name>read_only</name>
95254                                <value>1</value>
95255                                <description>Page can be read by Non-secure software</description>
95256                            </enumeratedValue>
95257                            <enumeratedValue>
95258                                <name>reserved</name>
95259                                <value>2</value>
95260                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95261                            </enumeratedValue>
95262                            <enumeratedValue>
95263                                <name>inaccessible</name>
95264                                <value>3</value>
95265                                <description>Page can not be accessed by Non-secure software.</description>
95266                            </enumeratedValue>
95267                        </enumeratedValues>
95268                    </field>
95269                    <field>
95270                        <name>LOCK_S</name>
95271                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95272                        <bitRange>[1:0]</bitRange>
95273                        <access>read-only</access>
95274                        <enumeratedValues>
95275                            <enumeratedValue>
95276                                <name>read_write</name>
95277                                <value>0</value>
95278                                <description>Page is fully accessible by Secure software.</description>
95279                            </enumeratedValue>
95280                            <enumeratedValue>
95281                                <name>read_only</name>
95282                                <value>1</value>
95283                                <description>Page can be read by Secure software, but can not be written.</description>
95284                            </enumeratedValue>
95285                            <enumeratedValue>
95286                                <name>reserved</name>
95287                                <value>2</value>
95288                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95289                            </enumeratedValue>
95290                            <enumeratedValue>
95291                                <name>inaccessible</name>
95292                                <value>3</value>
95293                                <description>Page can not be accessed by Secure software.</description>
95294                            </enumeratedValue>
95295                        </enumeratedValues>
95296                    </field>
95297                </fields>
95298            </register>
95299            <register>
95300                <name>PAGE33_LOCK0</name>
95301                <addressOffset>0x00003f08</addressOffset>
95302                <description>Lock configuration LSBs for page 33 (rows 0x840 through 0x87f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95303
95304                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95305                <resetValue>0x00000000</resetValue>
95306                <fields>
95307                    <field>
95308                        <name>R2</name>
95309                        <description>Redundant copy of bits 7:0</description>
95310                        <bitRange>[23:16]</bitRange>
95311                        <access>read-only</access>
95312                    </field>
95313                    <field>
95314                        <name>R1</name>
95315                        <description>Redundant copy of bits 7:0</description>
95316                        <bitRange>[15:8]</bitRange>
95317                        <access>read-only</access>
95318                    </field>
95319                    <field>
95320                        <name>NO_KEY_STATE</name>
95321                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95322                        <bitRange>[6:6]</bitRange>
95323                        <access>read-only</access>
95324                        <enumeratedValues>
95325                            <enumeratedValue>
95326                                <name>read_only</name>
95327                                <value>0</value>
95328                            </enumeratedValue>
95329                            <enumeratedValue>
95330                                <name>inaccessible</name>
95331                                <value>1</value>
95332                            </enumeratedValue>
95333                        </enumeratedValues>
95334                    </field>
95335                    <field>
95336                        <name>KEY_R</name>
95337                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95338                        <bitRange>[5:3]</bitRange>
95339                        <access>read-only</access>
95340                    </field>
95341                    <field>
95342                        <name>KEY_W</name>
95343                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95344                        <bitRange>[2:0]</bitRange>
95345                        <access>read-only</access>
95346                    </field>
95347                </fields>
95348            </register>
95349            <register>
95350                <name>PAGE33_LOCK1</name>
95351                <addressOffset>0x00003f0c</addressOffset>
95352                <description>Lock configuration MSBs for page 33 (rows 0x840 through 0x87f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95353
95354                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95355                <resetValue>0x00000000</resetValue>
95356                <fields>
95357                    <field>
95358                        <name>R2</name>
95359                        <description>Redundant copy of bits 7:0</description>
95360                        <bitRange>[23:16]</bitRange>
95361                        <access>read-only</access>
95362                    </field>
95363                    <field>
95364                        <name>R1</name>
95365                        <description>Redundant copy of bits 7:0</description>
95366                        <bitRange>[15:8]</bitRange>
95367                        <access>read-only</access>
95368                    </field>
95369                    <field>
95370                        <name>LOCK_BL</name>
95371                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95372                        <bitRange>[5:4]</bitRange>
95373                        <access>read-only</access>
95374                        <enumeratedValues>
95375                            <enumeratedValue>
95376                                <name>read_write</name>
95377                                <value>0</value>
95378                                <description>Bootloader permits user reads and writes to this page</description>
95379                            </enumeratedValue>
95380                            <enumeratedValue>
95381                                <name>read_only</name>
95382                                <value>1</value>
95383                                <description>Bootloader permits user reads of this page</description>
95384                            </enumeratedValue>
95385                            <enumeratedValue>
95386                                <name>reserved</name>
95387                                <value>2</value>
95388                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95389                            </enumeratedValue>
95390                            <enumeratedValue>
95391                                <name>inaccessible</name>
95392                                <value>3</value>
95393                                <description>Bootloader does not permit user access to this page</description>
95394                            </enumeratedValue>
95395                        </enumeratedValues>
95396                    </field>
95397                    <field>
95398                        <name>LOCK_NS</name>
95399                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95400
95401                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95402                        <bitRange>[3:2]</bitRange>
95403                        <access>read-only</access>
95404                        <enumeratedValues>
95405                            <enumeratedValue>
95406                                <name>read_write</name>
95407                                <value>0</value>
95408                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95409                            </enumeratedValue>
95410                            <enumeratedValue>
95411                                <name>read_only</name>
95412                                <value>1</value>
95413                                <description>Page can be read by Non-secure software</description>
95414                            </enumeratedValue>
95415                            <enumeratedValue>
95416                                <name>reserved</name>
95417                                <value>2</value>
95418                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95419                            </enumeratedValue>
95420                            <enumeratedValue>
95421                                <name>inaccessible</name>
95422                                <value>3</value>
95423                                <description>Page can not be accessed by Non-secure software.</description>
95424                            </enumeratedValue>
95425                        </enumeratedValues>
95426                    </field>
95427                    <field>
95428                        <name>LOCK_S</name>
95429                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95430                        <bitRange>[1:0]</bitRange>
95431                        <access>read-only</access>
95432                        <enumeratedValues>
95433                            <enumeratedValue>
95434                                <name>read_write</name>
95435                                <value>0</value>
95436                                <description>Page is fully accessible by Secure software.</description>
95437                            </enumeratedValue>
95438                            <enumeratedValue>
95439                                <name>read_only</name>
95440                                <value>1</value>
95441                                <description>Page can be read by Secure software, but can not be written.</description>
95442                            </enumeratedValue>
95443                            <enumeratedValue>
95444                                <name>reserved</name>
95445                                <value>2</value>
95446                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95447                            </enumeratedValue>
95448                            <enumeratedValue>
95449                                <name>inaccessible</name>
95450                                <value>3</value>
95451                                <description>Page can not be accessed by Secure software.</description>
95452                            </enumeratedValue>
95453                        </enumeratedValues>
95454                    </field>
95455                </fields>
95456            </register>
95457            <register>
95458                <name>PAGE34_LOCK0</name>
95459                <addressOffset>0x00003f10</addressOffset>
95460                <description>Lock configuration LSBs for page 34 (rows 0x880 through 0x8bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95461
95462                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95463                <resetValue>0x00000000</resetValue>
95464                <fields>
95465                    <field>
95466                        <name>R2</name>
95467                        <description>Redundant copy of bits 7:0</description>
95468                        <bitRange>[23:16]</bitRange>
95469                        <access>read-only</access>
95470                    </field>
95471                    <field>
95472                        <name>R1</name>
95473                        <description>Redundant copy of bits 7:0</description>
95474                        <bitRange>[15:8]</bitRange>
95475                        <access>read-only</access>
95476                    </field>
95477                    <field>
95478                        <name>NO_KEY_STATE</name>
95479                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95480                        <bitRange>[6:6]</bitRange>
95481                        <access>read-only</access>
95482                        <enumeratedValues>
95483                            <enumeratedValue>
95484                                <name>read_only</name>
95485                                <value>0</value>
95486                            </enumeratedValue>
95487                            <enumeratedValue>
95488                                <name>inaccessible</name>
95489                                <value>1</value>
95490                            </enumeratedValue>
95491                        </enumeratedValues>
95492                    </field>
95493                    <field>
95494                        <name>KEY_R</name>
95495                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95496                        <bitRange>[5:3]</bitRange>
95497                        <access>read-only</access>
95498                    </field>
95499                    <field>
95500                        <name>KEY_W</name>
95501                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95502                        <bitRange>[2:0]</bitRange>
95503                        <access>read-only</access>
95504                    </field>
95505                </fields>
95506            </register>
95507            <register>
95508                <name>PAGE34_LOCK1</name>
95509                <addressOffset>0x00003f14</addressOffset>
95510                <description>Lock configuration MSBs for page 34 (rows 0x880 through 0x8bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95511
95512                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95513                <resetValue>0x00000000</resetValue>
95514                <fields>
95515                    <field>
95516                        <name>R2</name>
95517                        <description>Redundant copy of bits 7:0</description>
95518                        <bitRange>[23:16]</bitRange>
95519                        <access>read-only</access>
95520                    </field>
95521                    <field>
95522                        <name>R1</name>
95523                        <description>Redundant copy of bits 7:0</description>
95524                        <bitRange>[15:8]</bitRange>
95525                        <access>read-only</access>
95526                    </field>
95527                    <field>
95528                        <name>LOCK_BL</name>
95529                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95530                        <bitRange>[5:4]</bitRange>
95531                        <access>read-only</access>
95532                        <enumeratedValues>
95533                            <enumeratedValue>
95534                                <name>read_write</name>
95535                                <value>0</value>
95536                                <description>Bootloader permits user reads and writes to this page</description>
95537                            </enumeratedValue>
95538                            <enumeratedValue>
95539                                <name>read_only</name>
95540                                <value>1</value>
95541                                <description>Bootloader permits user reads of this page</description>
95542                            </enumeratedValue>
95543                            <enumeratedValue>
95544                                <name>reserved</name>
95545                                <value>2</value>
95546                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95547                            </enumeratedValue>
95548                            <enumeratedValue>
95549                                <name>inaccessible</name>
95550                                <value>3</value>
95551                                <description>Bootloader does not permit user access to this page</description>
95552                            </enumeratedValue>
95553                        </enumeratedValues>
95554                    </field>
95555                    <field>
95556                        <name>LOCK_NS</name>
95557                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95558
95559                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95560                        <bitRange>[3:2]</bitRange>
95561                        <access>read-only</access>
95562                        <enumeratedValues>
95563                            <enumeratedValue>
95564                                <name>read_write</name>
95565                                <value>0</value>
95566                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95567                            </enumeratedValue>
95568                            <enumeratedValue>
95569                                <name>read_only</name>
95570                                <value>1</value>
95571                                <description>Page can be read by Non-secure software</description>
95572                            </enumeratedValue>
95573                            <enumeratedValue>
95574                                <name>reserved</name>
95575                                <value>2</value>
95576                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95577                            </enumeratedValue>
95578                            <enumeratedValue>
95579                                <name>inaccessible</name>
95580                                <value>3</value>
95581                                <description>Page can not be accessed by Non-secure software.</description>
95582                            </enumeratedValue>
95583                        </enumeratedValues>
95584                    </field>
95585                    <field>
95586                        <name>LOCK_S</name>
95587                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95588                        <bitRange>[1:0]</bitRange>
95589                        <access>read-only</access>
95590                        <enumeratedValues>
95591                            <enumeratedValue>
95592                                <name>read_write</name>
95593                                <value>0</value>
95594                                <description>Page is fully accessible by Secure software.</description>
95595                            </enumeratedValue>
95596                            <enumeratedValue>
95597                                <name>read_only</name>
95598                                <value>1</value>
95599                                <description>Page can be read by Secure software, but can not be written.</description>
95600                            </enumeratedValue>
95601                            <enumeratedValue>
95602                                <name>reserved</name>
95603                                <value>2</value>
95604                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95605                            </enumeratedValue>
95606                            <enumeratedValue>
95607                                <name>inaccessible</name>
95608                                <value>3</value>
95609                                <description>Page can not be accessed by Secure software.</description>
95610                            </enumeratedValue>
95611                        </enumeratedValues>
95612                    </field>
95613                </fields>
95614            </register>
95615            <register>
95616                <name>PAGE35_LOCK0</name>
95617                <addressOffset>0x00003f18</addressOffset>
95618                <description>Lock configuration LSBs for page 35 (rows 0x8c0 through 0x8ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95619
95620                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95621                <resetValue>0x00000000</resetValue>
95622                <fields>
95623                    <field>
95624                        <name>R2</name>
95625                        <description>Redundant copy of bits 7:0</description>
95626                        <bitRange>[23:16]</bitRange>
95627                        <access>read-only</access>
95628                    </field>
95629                    <field>
95630                        <name>R1</name>
95631                        <description>Redundant copy of bits 7:0</description>
95632                        <bitRange>[15:8]</bitRange>
95633                        <access>read-only</access>
95634                    </field>
95635                    <field>
95636                        <name>NO_KEY_STATE</name>
95637                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95638                        <bitRange>[6:6]</bitRange>
95639                        <access>read-only</access>
95640                        <enumeratedValues>
95641                            <enumeratedValue>
95642                                <name>read_only</name>
95643                                <value>0</value>
95644                            </enumeratedValue>
95645                            <enumeratedValue>
95646                                <name>inaccessible</name>
95647                                <value>1</value>
95648                            </enumeratedValue>
95649                        </enumeratedValues>
95650                    </field>
95651                    <field>
95652                        <name>KEY_R</name>
95653                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95654                        <bitRange>[5:3]</bitRange>
95655                        <access>read-only</access>
95656                    </field>
95657                    <field>
95658                        <name>KEY_W</name>
95659                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95660                        <bitRange>[2:0]</bitRange>
95661                        <access>read-only</access>
95662                    </field>
95663                </fields>
95664            </register>
95665            <register>
95666                <name>PAGE35_LOCK1</name>
95667                <addressOffset>0x00003f1c</addressOffset>
95668                <description>Lock configuration MSBs for page 35 (rows 0x8c0 through 0x8ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95669
95670                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95671                <resetValue>0x00000000</resetValue>
95672                <fields>
95673                    <field>
95674                        <name>R2</name>
95675                        <description>Redundant copy of bits 7:0</description>
95676                        <bitRange>[23:16]</bitRange>
95677                        <access>read-only</access>
95678                    </field>
95679                    <field>
95680                        <name>R1</name>
95681                        <description>Redundant copy of bits 7:0</description>
95682                        <bitRange>[15:8]</bitRange>
95683                        <access>read-only</access>
95684                    </field>
95685                    <field>
95686                        <name>LOCK_BL</name>
95687                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95688                        <bitRange>[5:4]</bitRange>
95689                        <access>read-only</access>
95690                        <enumeratedValues>
95691                            <enumeratedValue>
95692                                <name>read_write</name>
95693                                <value>0</value>
95694                                <description>Bootloader permits user reads and writes to this page</description>
95695                            </enumeratedValue>
95696                            <enumeratedValue>
95697                                <name>read_only</name>
95698                                <value>1</value>
95699                                <description>Bootloader permits user reads of this page</description>
95700                            </enumeratedValue>
95701                            <enumeratedValue>
95702                                <name>reserved</name>
95703                                <value>2</value>
95704                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95705                            </enumeratedValue>
95706                            <enumeratedValue>
95707                                <name>inaccessible</name>
95708                                <value>3</value>
95709                                <description>Bootloader does not permit user access to this page</description>
95710                            </enumeratedValue>
95711                        </enumeratedValues>
95712                    </field>
95713                    <field>
95714                        <name>LOCK_NS</name>
95715                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95716
95717                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95718                        <bitRange>[3:2]</bitRange>
95719                        <access>read-only</access>
95720                        <enumeratedValues>
95721                            <enumeratedValue>
95722                                <name>read_write</name>
95723                                <value>0</value>
95724                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95725                            </enumeratedValue>
95726                            <enumeratedValue>
95727                                <name>read_only</name>
95728                                <value>1</value>
95729                                <description>Page can be read by Non-secure software</description>
95730                            </enumeratedValue>
95731                            <enumeratedValue>
95732                                <name>reserved</name>
95733                                <value>2</value>
95734                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95735                            </enumeratedValue>
95736                            <enumeratedValue>
95737                                <name>inaccessible</name>
95738                                <value>3</value>
95739                                <description>Page can not be accessed by Non-secure software.</description>
95740                            </enumeratedValue>
95741                        </enumeratedValues>
95742                    </field>
95743                    <field>
95744                        <name>LOCK_S</name>
95745                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95746                        <bitRange>[1:0]</bitRange>
95747                        <access>read-only</access>
95748                        <enumeratedValues>
95749                            <enumeratedValue>
95750                                <name>read_write</name>
95751                                <value>0</value>
95752                                <description>Page is fully accessible by Secure software.</description>
95753                            </enumeratedValue>
95754                            <enumeratedValue>
95755                                <name>read_only</name>
95756                                <value>1</value>
95757                                <description>Page can be read by Secure software, but can not be written.</description>
95758                            </enumeratedValue>
95759                            <enumeratedValue>
95760                                <name>reserved</name>
95761                                <value>2</value>
95762                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95763                            </enumeratedValue>
95764                            <enumeratedValue>
95765                                <name>inaccessible</name>
95766                                <value>3</value>
95767                                <description>Page can not be accessed by Secure software.</description>
95768                            </enumeratedValue>
95769                        </enumeratedValues>
95770                    </field>
95771                </fields>
95772            </register>
95773            <register>
95774                <name>PAGE36_LOCK0</name>
95775                <addressOffset>0x00003f20</addressOffset>
95776                <description>Lock configuration LSBs for page 36 (rows 0x900 through 0x93f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95777
95778                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95779                <resetValue>0x00000000</resetValue>
95780                <fields>
95781                    <field>
95782                        <name>R2</name>
95783                        <description>Redundant copy of bits 7:0</description>
95784                        <bitRange>[23:16]</bitRange>
95785                        <access>read-only</access>
95786                    </field>
95787                    <field>
95788                        <name>R1</name>
95789                        <description>Redundant copy of bits 7:0</description>
95790                        <bitRange>[15:8]</bitRange>
95791                        <access>read-only</access>
95792                    </field>
95793                    <field>
95794                        <name>NO_KEY_STATE</name>
95795                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95796                        <bitRange>[6:6]</bitRange>
95797                        <access>read-only</access>
95798                        <enumeratedValues>
95799                            <enumeratedValue>
95800                                <name>read_only</name>
95801                                <value>0</value>
95802                            </enumeratedValue>
95803                            <enumeratedValue>
95804                                <name>inaccessible</name>
95805                                <value>1</value>
95806                            </enumeratedValue>
95807                        </enumeratedValues>
95808                    </field>
95809                    <field>
95810                        <name>KEY_R</name>
95811                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95812                        <bitRange>[5:3]</bitRange>
95813                        <access>read-only</access>
95814                    </field>
95815                    <field>
95816                        <name>KEY_W</name>
95817                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95818                        <bitRange>[2:0]</bitRange>
95819                        <access>read-only</access>
95820                    </field>
95821                </fields>
95822            </register>
95823            <register>
95824                <name>PAGE36_LOCK1</name>
95825                <addressOffset>0x00003f24</addressOffset>
95826                <description>Lock configuration MSBs for page 36 (rows 0x900 through 0x93f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95827
95828                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95829                <resetValue>0x00000000</resetValue>
95830                <fields>
95831                    <field>
95832                        <name>R2</name>
95833                        <description>Redundant copy of bits 7:0</description>
95834                        <bitRange>[23:16]</bitRange>
95835                        <access>read-only</access>
95836                    </field>
95837                    <field>
95838                        <name>R1</name>
95839                        <description>Redundant copy of bits 7:0</description>
95840                        <bitRange>[15:8]</bitRange>
95841                        <access>read-only</access>
95842                    </field>
95843                    <field>
95844                        <name>LOCK_BL</name>
95845                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
95846                        <bitRange>[5:4]</bitRange>
95847                        <access>read-only</access>
95848                        <enumeratedValues>
95849                            <enumeratedValue>
95850                                <name>read_write</name>
95851                                <value>0</value>
95852                                <description>Bootloader permits user reads and writes to this page</description>
95853                            </enumeratedValue>
95854                            <enumeratedValue>
95855                                <name>read_only</name>
95856                                <value>1</value>
95857                                <description>Bootloader permits user reads of this page</description>
95858                            </enumeratedValue>
95859                            <enumeratedValue>
95860                                <name>reserved</name>
95861                                <value>2</value>
95862                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
95863                            </enumeratedValue>
95864                            <enumeratedValue>
95865                                <name>inaccessible</name>
95866                                <value>3</value>
95867                                <description>Bootloader does not permit user access to this page</description>
95868                            </enumeratedValue>
95869                        </enumeratedValues>
95870                    </field>
95871                    <field>
95872                        <name>LOCK_NS</name>
95873                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
95874
95875                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
95876                        <bitRange>[3:2]</bitRange>
95877                        <access>read-only</access>
95878                        <enumeratedValues>
95879                            <enumeratedValue>
95880                                <name>read_write</name>
95881                                <value>0</value>
95882                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
95883                            </enumeratedValue>
95884                            <enumeratedValue>
95885                                <name>read_only</name>
95886                                <value>1</value>
95887                                <description>Page can be read by Non-secure software</description>
95888                            </enumeratedValue>
95889                            <enumeratedValue>
95890                                <name>reserved</name>
95891                                <value>2</value>
95892                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95893                            </enumeratedValue>
95894                            <enumeratedValue>
95895                                <name>inaccessible</name>
95896                                <value>3</value>
95897                                <description>Page can not be accessed by Non-secure software.</description>
95898                            </enumeratedValue>
95899                        </enumeratedValues>
95900                    </field>
95901                    <field>
95902                        <name>LOCK_S</name>
95903                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
95904                        <bitRange>[1:0]</bitRange>
95905                        <access>read-only</access>
95906                        <enumeratedValues>
95907                            <enumeratedValue>
95908                                <name>read_write</name>
95909                                <value>0</value>
95910                                <description>Page is fully accessible by Secure software.</description>
95911                            </enumeratedValue>
95912                            <enumeratedValue>
95913                                <name>read_only</name>
95914                                <value>1</value>
95915                                <description>Page can be read by Secure software, but can not be written.</description>
95916                            </enumeratedValue>
95917                            <enumeratedValue>
95918                                <name>reserved</name>
95919                                <value>2</value>
95920                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
95921                            </enumeratedValue>
95922                            <enumeratedValue>
95923                                <name>inaccessible</name>
95924                                <value>3</value>
95925                                <description>Page can not be accessed by Secure software.</description>
95926                            </enumeratedValue>
95927                        </enumeratedValues>
95928                    </field>
95929                </fields>
95930            </register>
95931            <register>
95932                <name>PAGE37_LOCK0</name>
95933                <addressOffset>0x00003f28</addressOffset>
95934                <description>Lock configuration LSBs for page 37 (rows 0x940 through 0x97f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95935
95936                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95937                <resetValue>0x00000000</resetValue>
95938                <fields>
95939                    <field>
95940                        <name>R2</name>
95941                        <description>Redundant copy of bits 7:0</description>
95942                        <bitRange>[23:16]</bitRange>
95943                        <access>read-only</access>
95944                    </field>
95945                    <field>
95946                        <name>R1</name>
95947                        <description>Redundant copy of bits 7:0</description>
95948                        <bitRange>[15:8]</bitRange>
95949                        <access>read-only</access>
95950                    </field>
95951                    <field>
95952                        <name>NO_KEY_STATE</name>
95953                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
95954                        <bitRange>[6:6]</bitRange>
95955                        <access>read-only</access>
95956                        <enumeratedValues>
95957                            <enumeratedValue>
95958                                <name>read_only</name>
95959                                <value>0</value>
95960                            </enumeratedValue>
95961                            <enumeratedValue>
95962                                <name>inaccessible</name>
95963                                <value>1</value>
95964                            </enumeratedValue>
95965                        </enumeratedValues>
95966                    </field>
95967                    <field>
95968                        <name>KEY_R</name>
95969                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
95970                        <bitRange>[5:3]</bitRange>
95971                        <access>read-only</access>
95972                    </field>
95973                    <field>
95974                        <name>KEY_W</name>
95975                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
95976                        <bitRange>[2:0]</bitRange>
95977                        <access>read-only</access>
95978                    </field>
95979                </fields>
95980            </register>
95981            <register>
95982                <name>PAGE37_LOCK1</name>
95983                <addressOffset>0x00003f2c</addressOffset>
95984                <description>Lock configuration MSBs for page 37 (rows 0x940 through 0x97f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
95985
95986                    This OTP location is always readable, and is write-protected by its own permissions.</description>
95987                <resetValue>0x00000000</resetValue>
95988                <fields>
95989                    <field>
95990                        <name>R2</name>
95991                        <description>Redundant copy of bits 7:0</description>
95992                        <bitRange>[23:16]</bitRange>
95993                        <access>read-only</access>
95994                    </field>
95995                    <field>
95996                        <name>R1</name>
95997                        <description>Redundant copy of bits 7:0</description>
95998                        <bitRange>[15:8]</bitRange>
95999                        <access>read-only</access>
96000                    </field>
96001                    <field>
96002                        <name>LOCK_BL</name>
96003                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96004                        <bitRange>[5:4]</bitRange>
96005                        <access>read-only</access>
96006                        <enumeratedValues>
96007                            <enumeratedValue>
96008                                <name>read_write</name>
96009                                <value>0</value>
96010                                <description>Bootloader permits user reads and writes to this page</description>
96011                            </enumeratedValue>
96012                            <enumeratedValue>
96013                                <name>read_only</name>
96014                                <value>1</value>
96015                                <description>Bootloader permits user reads of this page</description>
96016                            </enumeratedValue>
96017                            <enumeratedValue>
96018                                <name>reserved</name>
96019                                <value>2</value>
96020                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96021                            </enumeratedValue>
96022                            <enumeratedValue>
96023                                <name>inaccessible</name>
96024                                <value>3</value>
96025                                <description>Bootloader does not permit user access to this page</description>
96026                            </enumeratedValue>
96027                        </enumeratedValues>
96028                    </field>
96029                    <field>
96030                        <name>LOCK_NS</name>
96031                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96032
96033                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96034                        <bitRange>[3:2]</bitRange>
96035                        <access>read-only</access>
96036                        <enumeratedValues>
96037                            <enumeratedValue>
96038                                <name>read_write</name>
96039                                <value>0</value>
96040                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96041                            </enumeratedValue>
96042                            <enumeratedValue>
96043                                <name>read_only</name>
96044                                <value>1</value>
96045                                <description>Page can be read by Non-secure software</description>
96046                            </enumeratedValue>
96047                            <enumeratedValue>
96048                                <name>reserved</name>
96049                                <value>2</value>
96050                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96051                            </enumeratedValue>
96052                            <enumeratedValue>
96053                                <name>inaccessible</name>
96054                                <value>3</value>
96055                                <description>Page can not be accessed by Non-secure software.</description>
96056                            </enumeratedValue>
96057                        </enumeratedValues>
96058                    </field>
96059                    <field>
96060                        <name>LOCK_S</name>
96061                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96062                        <bitRange>[1:0]</bitRange>
96063                        <access>read-only</access>
96064                        <enumeratedValues>
96065                            <enumeratedValue>
96066                                <name>read_write</name>
96067                                <value>0</value>
96068                                <description>Page is fully accessible by Secure software.</description>
96069                            </enumeratedValue>
96070                            <enumeratedValue>
96071                                <name>read_only</name>
96072                                <value>1</value>
96073                                <description>Page can be read by Secure software, but can not be written.</description>
96074                            </enumeratedValue>
96075                            <enumeratedValue>
96076                                <name>reserved</name>
96077                                <value>2</value>
96078                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96079                            </enumeratedValue>
96080                            <enumeratedValue>
96081                                <name>inaccessible</name>
96082                                <value>3</value>
96083                                <description>Page can not be accessed by Secure software.</description>
96084                            </enumeratedValue>
96085                        </enumeratedValues>
96086                    </field>
96087                </fields>
96088            </register>
96089            <register>
96090                <name>PAGE38_LOCK0</name>
96091                <addressOffset>0x00003f30</addressOffset>
96092                <description>Lock configuration LSBs for page 38 (rows 0x980 through 0x9bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96093
96094                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96095                <resetValue>0x00000000</resetValue>
96096                <fields>
96097                    <field>
96098                        <name>R2</name>
96099                        <description>Redundant copy of bits 7:0</description>
96100                        <bitRange>[23:16]</bitRange>
96101                        <access>read-only</access>
96102                    </field>
96103                    <field>
96104                        <name>R1</name>
96105                        <description>Redundant copy of bits 7:0</description>
96106                        <bitRange>[15:8]</bitRange>
96107                        <access>read-only</access>
96108                    </field>
96109                    <field>
96110                        <name>NO_KEY_STATE</name>
96111                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96112                        <bitRange>[6:6]</bitRange>
96113                        <access>read-only</access>
96114                        <enumeratedValues>
96115                            <enumeratedValue>
96116                                <name>read_only</name>
96117                                <value>0</value>
96118                            </enumeratedValue>
96119                            <enumeratedValue>
96120                                <name>inaccessible</name>
96121                                <value>1</value>
96122                            </enumeratedValue>
96123                        </enumeratedValues>
96124                    </field>
96125                    <field>
96126                        <name>KEY_R</name>
96127                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96128                        <bitRange>[5:3]</bitRange>
96129                        <access>read-only</access>
96130                    </field>
96131                    <field>
96132                        <name>KEY_W</name>
96133                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96134                        <bitRange>[2:0]</bitRange>
96135                        <access>read-only</access>
96136                    </field>
96137                </fields>
96138            </register>
96139            <register>
96140                <name>PAGE38_LOCK1</name>
96141                <addressOffset>0x00003f34</addressOffset>
96142                <description>Lock configuration MSBs for page 38 (rows 0x980 through 0x9bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96143
96144                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96145                <resetValue>0x00000000</resetValue>
96146                <fields>
96147                    <field>
96148                        <name>R2</name>
96149                        <description>Redundant copy of bits 7:0</description>
96150                        <bitRange>[23:16]</bitRange>
96151                        <access>read-only</access>
96152                    </field>
96153                    <field>
96154                        <name>R1</name>
96155                        <description>Redundant copy of bits 7:0</description>
96156                        <bitRange>[15:8]</bitRange>
96157                        <access>read-only</access>
96158                    </field>
96159                    <field>
96160                        <name>LOCK_BL</name>
96161                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96162                        <bitRange>[5:4]</bitRange>
96163                        <access>read-only</access>
96164                        <enumeratedValues>
96165                            <enumeratedValue>
96166                                <name>read_write</name>
96167                                <value>0</value>
96168                                <description>Bootloader permits user reads and writes to this page</description>
96169                            </enumeratedValue>
96170                            <enumeratedValue>
96171                                <name>read_only</name>
96172                                <value>1</value>
96173                                <description>Bootloader permits user reads of this page</description>
96174                            </enumeratedValue>
96175                            <enumeratedValue>
96176                                <name>reserved</name>
96177                                <value>2</value>
96178                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96179                            </enumeratedValue>
96180                            <enumeratedValue>
96181                                <name>inaccessible</name>
96182                                <value>3</value>
96183                                <description>Bootloader does not permit user access to this page</description>
96184                            </enumeratedValue>
96185                        </enumeratedValues>
96186                    </field>
96187                    <field>
96188                        <name>LOCK_NS</name>
96189                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96190
96191                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96192                        <bitRange>[3:2]</bitRange>
96193                        <access>read-only</access>
96194                        <enumeratedValues>
96195                            <enumeratedValue>
96196                                <name>read_write</name>
96197                                <value>0</value>
96198                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96199                            </enumeratedValue>
96200                            <enumeratedValue>
96201                                <name>read_only</name>
96202                                <value>1</value>
96203                                <description>Page can be read by Non-secure software</description>
96204                            </enumeratedValue>
96205                            <enumeratedValue>
96206                                <name>reserved</name>
96207                                <value>2</value>
96208                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96209                            </enumeratedValue>
96210                            <enumeratedValue>
96211                                <name>inaccessible</name>
96212                                <value>3</value>
96213                                <description>Page can not be accessed by Non-secure software.</description>
96214                            </enumeratedValue>
96215                        </enumeratedValues>
96216                    </field>
96217                    <field>
96218                        <name>LOCK_S</name>
96219                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96220                        <bitRange>[1:0]</bitRange>
96221                        <access>read-only</access>
96222                        <enumeratedValues>
96223                            <enumeratedValue>
96224                                <name>read_write</name>
96225                                <value>0</value>
96226                                <description>Page is fully accessible by Secure software.</description>
96227                            </enumeratedValue>
96228                            <enumeratedValue>
96229                                <name>read_only</name>
96230                                <value>1</value>
96231                                <description>Page can be read by Secure software, but can not be written.</description>
96232                            </enumeratedValue>
96233                            <enumeratedValue>
96234                                <name>reserved</name>
96235                                <value>2</value>
96236                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96237                            </enumeratedValue>
96238                            <enumeratedValue>
96239                                <name>inaccessible</name>
96240                                <value>3</value>
96241                                <description>Page can not be accessed by Secure software.</description>
96242                            </enumeratedValue>
96243                        </enumeratedValues>
96244                    </field>
96245                </fields>
96246            </register>
96247            <register>
96248                <name>PAGE39_LOCK0</name>
96249                <addressOffset>0x00003f38</addressOffset>
96250                <description>Lock configuration LSBs for page 39 (rows 0x9c0 through 0x9ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96251
96252                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96253                <resetValue>0x00000000</resetValue>
96254                <fields>
96255                    <field>
96256                        <name>R2</name>
96257                        <description>Redundant copy of bits 7:0</description>
96258                        <bitRange>[23:16]</bitRange>
96259                        <access>read-only</access>
96260                    </field>
96261                    <field>
96262                        <name>R1</name>
96263                        <description>Redundant copy of bits 7:0</description>
96264                        <bitRange>[15:8]</bitRange>
96265                        <access>read-only</access>
96266                    </field>
96267                    <field>
96268                        <name>NO_KEY_STATE</name>
96269                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96270                        <bitRange>[6:6]</bitRange>
96271                        <access>read-only</access>
96272                        <enumeratedValues>
96273                            <enumeratedValue>
96274                                <name>read_only</name>
96275                                <value>0</value>
96276                            </enumeratedValue>
96277                            <enumeratedValue>
96278                                <name>inaccessible</name>
96279                                <value>1</value>
96280                            </enumeratedValue>
96281                        </enumeratedValues>
96282                    </field>
96283                    <field>
96284                        <name>KEY_R</name>
96285                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96286                        <bitRange>[5:3]</bitRange>
96287                        <access>read-only</access>
96288                    </field>
96289                    <field>
96290                        <name>KEY_W</name>
96291                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96292                        <bitRange>[2:0]</bitRange>
96293                        <access>read-only</access>
96294                    </field>
96295                </fields>
96296            </register>
96297            <register>
96298                <name>PAGE39_LOCK1</name>
96299                <addressOffset>0x00003f3c</addressOffset>
96300                <description>Lock configuration MSBs for page 39 (rows 0x9c0 through 0x9ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96301
96302                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96303                <resetValue>0x00000000</resetValue>
96304                <fields>
96305                    <field>
96306                        <name>R2</name>
96307                        <description>Redundant copy of bits 7:0</description>
96308                        <bitRange>[23:16]</bitRange>
96309                        <access>read-only</access>
96310                    </field>
96311                    <field>
96312                        <name>R1</name>
96313                        <description>Redundant copy of bits 7:0</description>
96314                        <bitRange>[15:8]</bitRange>
96315                        <access>read-only</access>
96316                    </field>
96317                    <field>
96318                        <name>LOCK_BL</name>
96319                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96320                        <bitRange>[5:4]</bitRange>
96321                        <access>read-only</access>
96322                        <enumeratedValues>
96323                            <enumeratedValue>
96324                                <name>read_write</name>
96325                                <value>0</value>
96326                                <description>Bootloader permits user reads and writes to this page</description>
96327                            </enumeratedValue>
96328                            <enumeratedValue>
96329                                <name>read_only</name>
96330                                <value>1</value>
96331                                <description>Bootloader permits user reads of this page</description>
96332                            </enumeratedValue>
96333                            <enumeratedValue>
96334                                <name>reserved</name>
96335                                <value>2</value>
96336                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96337                            </enumeratedValue>
96338                            <enumeratedValue>
96339                                <name>inaccessible</name>
96340                                <value>3</value>
96341                                <description>Bootloader does not permit user access to this page</description>
96342                            </enumeratedValue>
96343                        </enumeratedValues>
96344                    </field>
96345                    <field>
96346                        <name>LOCK_NS</name>
96347                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96348
96349                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96350                        <bitRange>[3:2]</bitRange>
96351                        <access>read-only</access>
96352                        <enumeratedValues>
96353                            <enumeratedValue>
96354                                <name>read_write</name>
96355                                <value>0</value>
96356                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96357                            </enumeratedValue>
96358                            <enumeratedValue>
96359                                <name>read_only</name>
96360                                <value>1</value>
96361                                <description>Page can be read by Non-secure software</description>
96362                            </enumeratedValue>
96363                            <enumeratedValue>
96364                                <name>reserved</name>
96365                                <value>2</value>
96366                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96367                            </enumeratedValue>
96368                            <enumeratedValue>
96369                                <name>inaccessible</name>
96370                                <value>3</value>
96371                                <description>Page can not be accessed by Non-secure software.</description>
96372                            </enumeratedValue>
96373                        </enumeratedValues>
96374                    </field>
96375                    <field>
96376                        <name>LOCK_S</name>
96377                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96378                        <bitRange>[1:0]</bitRange>
96379                        <access>read-only</access>
96380                        <enumeratedValues>
96381                            <enumeratedValue>
96382                                <name>read_write</name>
96383                                <value>0</value>
96384                                <description>Page is fully accessible by Secure software.</description>
96385                            </enumeratedValue>
96386                            <enumeratedValue>
96387                                <name>read_only</name>
96388                                <value>1</value>
96389                                <description>Page can be read by Secure software, but can not be written.</description>
96390                            </enumeratedValue>
96391                            <enumeratedValue>
96392                                <name>reserved</name>
96393                                <value>2</value>
96394                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96395                            </enumeratedValue>
96396                            <enumeratedValue>
96397                                <name>inaccessible</name>
96398                                <value>3</value>
96399                                <description>Page can not be accessed by Secure software.</description>
96400                            </enumeratedValue>
96401                        </enumeratedValues>
96402                    </field>
96403                </fields>
96404            </register>
96405            <register>
96406                <name>PAGE40_LOCK0</name>
96407                <addressOffset>0x00003f40</addressOffset>
96408                <description>Lock configuration LSBs for page 40 (rows 0xa00 through 0xa3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96409
96410                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96411                <resetValue>0x00000000</resetValue>
96412                <fields>
96413                    <field>
96414                        <name>R2</name>
96415                        <description>Redundant copy of bits 7:0</description>
96416                        <bitRange>[23:16]</bitRange>
96417                        <access>read-only</access>
96418                    </field>
96419                    <field>
96420                        <name>R1</name>
96421                        <description>Redundant copy of bits 7:0</description>
96422                        <bitRange>[15:8]</bitRange>
96423                        <access>read-only</access>
96424                    </field>
96425                    <field>
96426                        <name>NO_KEY_STATE</name>
96427                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96428                        <bitRange>[6:6]</bitRange>
96429                        <access>read-only</access>
96430                        <enumeratedValues>
96431                            <enumeratedValue>
96432                                <name>read_only</name>
96433                                <value>0</value>
96434                            </enumeratedValue>
96435                            <enumeratedValue>
96436                                <name>inaccessible</name>
96437                                <value>1</value>
96438                            </enumeratedValue>
96439                        </enumeratedValues>
96440                    </field>
96441                    <field>
96442                        <name>KEY_R</name>
96443                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96444                        <bitRange>[5:3]</bitRange>
96445                        <access>read-only</access>
96446                    </field>
96447                    <field>
96448                        <name>KEY_W</name>
96449                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96450                        <bitRange>[2:0]</bitRange>
96451                        <access>read-only</access>
96452                    </field>
96453                </fields>
96454            </register>
96455            <register>
96456                <name>PAGE40_LOCK1</name>
96457                <addressOffset>0x00003f44</addressOffset>
96458                <description>Lock configuration MSBs for page 40 (rows 0xa00 through 0xa3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96459
96460                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96461                <resetValue>0x00000000</resetValue>
96462                <fields>
96463                    <field>
96464                        <name>R2</name>
96465                        <description>Redundant copy of bits 7:0</description>
96466                        <bitRange>[23:16]</bitRange>
96467                        <access>read-only</access>
96468                    </field>
96469                    <field>
96470                        <name>R1</name>
96471                        <description>Redundant copy of bits 7:0</description>
96472                        <bitRange>[15:8]</bitRange>
96473                        <access>read-only</access>
96474                    </field>
96475                    <field>
96476                        <name>LOCK_BL</name>
96477                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96478                        <bitRange>[5:4]</bitRange>
96479                        <access>read-only</access>
96480                        <enumeratedValues>
96481                            <enumeratedValue>
96482                                <name>read_write</name>
96483                                <value>0</value>
96484                                <description>Bootloader permits user reads and writes to this page</description>
96485                            </enumeratedValue>
96486                            <enumeratedValue>
96487                                <name>read_only</name>
96488                                <value>1</value>
96489                                <description>Bootloader permits user reads of this page</description>
96490                            </enumeratedValue>
96491                            <enumeratedValue>
96492                                <name>reserved</name>
96493                                <value>2</value>
96494                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96495                            </enumeratedValue>
96496                            <enumeratedValue>
96497                                <name>inaccessible</name>
96498                                <value>3</value>
96499                                <description>Bootloader does not permit user access to this page</description>
96500                            </enumeratedValue>
96501                        </enumeratedValues>
96502                    </field>
96503                    <field>
96504                        <name>LOCK_NS</name>
96505                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96506
96507                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96508                        <bitRange>[3:2]</bitRange>
96509                        <access>read-only</access>
96510                        <enumeratedValues>
96511                            <enumeratedValue>
96512                                <name>read_write</name>
96513                                <value>0</value>
96514                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96515                            </enumeratedValue>
96516                            <enumeratedValue>
96517                                <name>read_only</name>
96518                                <value>1</value>
96519                                <description>Page can be read by Non-secure software</description>
96520                            </enumeratedValue>
96521                            <enumeratedValue>
96522                                <name>reserved</name>
96523                                <value>2</value>
96524                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96525                            </enumeratedValue>
96526                            <enumeratedValue>
96527                                <name>inaccessible</name>
96528                                <value>3</value>
96529                                <description>Page can not be accessed by Non-secure software.</description>
96530                            </enumeratedValue>
96531                        </enumeratedValues>
96532                    </field>
96533                    <field>
96534                        <name>LOCK_S</name>
96535                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96536                        <bitRange>[1:0]</bitRange>
96537                        <access>read-only</access>
96538                        <enumeratedValues>
96539                            <enumeratedValue>
96540                                <name>read_write</name>
96541                                <value>0</value>
96542                                <description>Page is fully accessible by Secure software.</description>
96543                            </enumeratedValue>
96544                            <enumeratedValue>
96545                                <name>read_only</name>
96546                                <value>1</value>
96547                                <description>Page can be read by Secure software, but can not be written.</description>
96548                            </enumeratedValue>
96549                            <enumeratedValue>
96550                                <name>reserved</name>
96551                                <value>2</value>
96552                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96553                            </enumeratedValue>
96554                            <enumeratedValue>
96555                                <name>inaccessible</name>
96556                                <value>3</value>
96557                                <description>Page can not be accessed by Secure software.</description>
96558                            </enumeratedValue>
96559                        </enumeratedValues>
96560                    </field>
96561                </fields>
96562            </register>
96563            <register>
96564                <name>PAGE41_LOCK0</name>
96565                <addressOffset>0x00003f48</addressOffset>
96566                <description>Lock configuration LSBs for page 41 (rows 0xa40 through 0xa7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96567
96568                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96569                <resetValue>0x00000000</resetValue>
96570                <fields>
96571                    <field>
96572                        <name>R2</name>
96573                        <description>Redundant copy of bits 7:0</description>
96574                        <bitRange>[23:16]</bitRange>
96575                        <access>read-only</access>
96576                    </field>
96577                    <field>
96578                        <name>R1</name>
96579                        <description>Redundant copy of bits 7:0</description>
96580                        <bitRange>[15:8]</bitRange>
96581                        <access>read-only</access>
96582                    </field>
96583                    <field>
96584                        <name>NO_KEY_STATE</name>
96585                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96586                        <bitRange>[6:6]</bitRange>
96587                        <access>read-only</access>
96588                        <enumeratedValues>
96589                            <enumeratedValue>
96590                                <name>read_only</name>
96591                                <value>0</value>
96592                            </enumeratedValue>
96593                            <enumeratedValue>
96594                                <name>inaccessible</name>
96595                                <value>1</value>
96596                            </enumeratedValue>
96597                        </enumeratedValues>
96598                    </field>
96599                    <field>
96600                        <name>KEY_R</name>
96601                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96602                        <bitRange>[5:3]</bitRange>
96603                        <access>read-only</access>
96604                    </field>
96605                    <field>
96606                        <name>KEY_W</name>
96607                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96608                        <bitRange>[2:0]</bitRange>
96609                        <access>read-only</access>
96610                    </field>
96611                </fields>
96612            </register>
96613            <register>
96614                <name>PAGE41_LOCK1</name>
96615                <addressOffset>0x00003f4c</addressOffset>
96616                <description>Lock configuration MSBs for page 41 (rows 0xa40 through 0xa7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96617
96618                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96619                <resetValue>0x00000000</resetValue>
96620                <fields>
96621                    <field>
96622                        <name>R2</name>
96623                        <description>Redundant copy of bits 7:0</description>
96624                        <bitRange>[23:16]</bitRange>
96625                        <access>read-only</access>
96626                    </field>
96627                    <field>
96628                        <name>R1</name>
96629                        <description>Redundant copy of bits 7:0</description>
96630                        <bitRange>[15:8]</bitRange>
96631                        <access>read-only</access>
96632                    </field>
96633                    <field>
96634                        <name>LOCK_BL</name>
96635                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96636                        <bitRange>[5:4]</bitRange>
96637                        <access>read-only</access>
96638                        <enumeratedValues>
96639                            <enumeratedValue>
96640                                <name>read_write</name>
96641                                <value>0</value>
96642                                <description>Bootloader permits user reads and writes to this page</description>
96643                            </enumeratedValue>
96644                            <enumeratedValue>
96645                                <name>read_only</name>
96646                                <value>1</value>
96647                                <description>Bootloader permits user reads of this page</description>
96648                            </enumeratedValue>
96649                            <enumeratedValue>
96650                                <name>reserved</name>
96651                                <value>2</value>
96652                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96653                            </enumeratedValue>
96654                            <enumeratedValue>
96655                                <name>inaccessible</name>
96656                                <value>3</value>
96657                                <description>Bootloader does not permit user access to this page</description>
96658                            </enumeratedValue>
96659                        </enumeratedValues>
96660                    </field>
96661                    <field>
96662                        <name>LOCK_NS</name>
96663                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96664
96665                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96666                        <bitRange>[3:2]</bitRange>
96667                        <access>read-only</access>
96668                        <enumeratedValues>
96669                            <enumeratedValue>
96670                                <name>read_write</name>
96671                                <value>0</value>
96672                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96673                            </enumeratedValue>
96674                            <enumeratedValue>
96675                                <name>read_only</name>
96676                                <value>1</value>
96677                                <description>Page can be read by Non-secure software</description>
96678                            </enumeratedValue>
96679                            <enumeratedValue>
96680                                <name>reserved</name>
96681                                <value>2</value>
96682                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96683                            </enumeratedValue>
96684                            <enumeratedValue>
96685                                <name>inaccessible</name>
96686                                <value>3</value>
96687                                <description>Page can not be accessed by Non-secure software.</description>
96688                            </enumeratedValue>
96689                        </enumeratedValues>
96690                    </field>
96691                    <field>
96692                        <name>LOCK_S</name>
96693                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96694                        <bitRange>[1:0]</bitRange>
96695                        <access>read-only</access>
96696                        <enumeratedValues>
96697                            <enumeratedValue>
96698                                <name>read_write</name>
96699                                <value>0</value>
96700                                <description>Page is fully accessible by Secure software.</description>
96701                            </enumeratedValue>
96702                            <enumeratedValue>
96703                                <name>read_only</name>
96704                                <value>1</value>
96705                                <description>Page can be read by Secure software, but can not be written.</description>
96706                            </enumeratedValue>
96707                            <enumeratedValue>
96708                                <name>reserved</name>
96709                                <value>2</value>
96710                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96711                            </enumeratedValue>
96712                            <enumeratedValue>
96713                                <name>inaccessible</name>
96714                                <value>3</value>
96715                                <description>Page can not be accessed by Secure software.</description>
96716                            </enumeratedValue>
96717                        </enumeratedValues>
96718                    </field>
96719                </fields>
96720            </register>
96721            <register>
96722                <name>PAGE42_LOCK0</name>
96723                <addressOffset>0x00003f50</addressOffset>
96724                <description>Lock configuration LSBs for page 42 (rows 0xa80 through 0xabf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96725
96726                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96727                <resetValue>0x00000000</resetValue>
96728                <fields>
96729                    <field>
96730                        <name>R2</name>
96731                        <description>Redundant copy of bits 7:0</description>
96732                        <bitRange>[23:16]</bitRange>
96733                        <access>read-only</access>
96734                    </field>
96735                    <field>
96736                        <name>R1</name>
96737                        <description>Redundant copy of bits 7:0</description>
96738                        <bitRange>[15:8]</bitRange>
96739                        <access>read-only</access>
96740                    </field>
96741                    <field>
96742                        <name>NO_KEY_STATE</name>
96743                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96744                        <bitRange>[6:6]</bitRange>
96745                        <access>read-only</access>
96746                        <enumeratedValues>
96747                            <enumeratedValue>
96748                                <name>read_only</name>
96749                                <value>0</value>
96750                            </enumeratedValue>
96751                            <enumeratedValue>
96752                                <name>inaccessible</name>
96753                                <value>1</value>
96754                            </enumeratedValue>
96755                        </enumeratedValues>
96756                    </field>
96757                    <field>
96758                        <name>KEY_R</name>
96759                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96760                        <bitRange>[5:3]</bitRange>
96761                        <access>read-only</access>
96762                    </field>
96763                    <field>
96764                        <name>KEY_W</name>
96765                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96766                        <bitRange>[2:0]</bitRange>
96767                        <access>read-only</access>
96768                    </field>
96769                </fields>
96770            </register>
96771            <register>
96772                <name>PAGE42_LOCK1</name>
96773                <addressOffset>0x00003f54</addressOffset>
96774                <description>Lock configuration MSBs for page 42 (rows 0xa80 through 0xabf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96775
96776                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96777                <resetValue>0x00000000</resetValue>
96778                <fields>
96779                    <field>
96780                        <name>R2</name>
96781                        <description>Redundant copy of bits 7:0</description>
96782                        <bitRange>[23:16]</bitRange>
96783                        <access>read-only</access>
96784                    </field>
96785                    <field>
96786                        <name>R1</name>
96787                        <description>Redundant copy of bits 7:0</description>
96788                        <bitRange>[15:8]</bitRange>
96789                        <access>read-only</access>
96790                    </field>
96791                    <field>
96792                        <name>LOCK_BL</name>
96793                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96794                        <bitRange>[5:4]</bitRange>
96795                        <access>read-only</access>
96796                        <enumeratedValues>
96797                            <enumeratedValue>
96798                                <name>read_write</name>
96799                                <value>0</value>
96800                                <description>Bootloader permits user reads and writes to this page</description>
96801                            </enumeratedValue>
96802                            <enumeratedValue>
96803                                <name>read_only</name>
96804                                <value>1</value>
96805                                <description>Bootloader permits user reads of this page</description>
96806                            </enumeratedValue>
96807                            <enumeratedValue>
96808                                <name>reserved</name>
96809                                <value>2</value>
96810                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96811                            </enumeratedValue>
96812                            <enumeratedValue>
96813                                <name>inaccessible</name>
96814                                <value>3</value>
96815                                <description>Bootloader does not permit user access to this page</description>
96816                            </enumeratedValue>
96817                        </enumeratedValues>
96818                    </field>
96819                    <field>
96820                        <name>LOCK_NS</name>
96821                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96822
96823                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96824                        <bitRange>[3:2]</bitRange>
96825                        <access>read-only</access>
96826                        <enumeratedValues>
96827                            <enumeratedValue>
96828                                <name>read_write</name>
96829                                <value>0</value>
96830                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96831                            </enumeratedValue>
96832                            <enumeratedValue>
96833                                <name>read_only</name>
96834                                <value>1</value>
96835                                <description>Page can be read by Non-secure software</description>
96836                            </enumeratedValue>
96837                            <enumeratedValue>
96838                                <name>reserved</name>
96839                                <value>2</value>
96840                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96841                            </enumeratedValue>
96842                            <enumeratedValue>
96843                                <name>inaccessible</name>
96844                                <value>3</value>
96845                                <description>Page can not be accessed by Non-secure software.</description>
96846                            </enumeratedValue>
96847                        </enumeratedValues>
96848                    </field>
96849                    <field>
96850                        <name>LOCK_S</name>
96851                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
96852                        <bitRange>[1:0]</bitRange>
96853                        <access>read-only</access>
96854                        <enumeratedValues>
96855                            <enumeratedValue>
96856                                <name>read_write</name>
96857                                <value>0</value>
96858                                <description>Page is fully accessible by Secure software.</description>
96859                            </enumeratedValue>
96860                            <enumeratedValue>
96861                                <name>read_only</name>
96862                                <value>1</value>
96863                                <description>Page can be read by Secure software, but can not be written.</description>
96864                            </enumeratedValue>
96865                            <enumeratedValue>
96866                                <name>reserved</name>
96867                                <value>2</value>
96868                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96869                            </enumeratedValue>
96870                            <enumeratedValue>
96871                                <name>inaccessible</name>
96872                                <value>3</value>
96873                                <description>Page can not be accessed by Secure software.</description>
96874                            </enumeratedValue>
96875                        </enumeratedValues>
96876                    </field>
96877                </fields>
96878            </register>
96879            <register>
96880                <name>PAGE43_LOCK0</name>
96881                <addressOffset>0x00003f58</addressOffset>
96882                <description>Lock configuration LSBs for page 43 (rows 0xac0 through 0xaff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96883
96884                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96885                <resetValue>0x00000000</resetValue>
96886                <fields>
96887                    <field>
96888                        <name>R2</name>
96889                        <description>Redundant copy of bits 7:0</description>
96890                        <bitRange>[23:16]</bitRange>
96891                        <access>read-only</access>
96892                    </field>
96893                    <field>
96894                        <name>R1</name>
96895                        <description>Redundant copy of bits 7:0</description>
96896                        <bitRange>[15:8]</bitRange>
96897                        <access>read-only</access>
96898                    </field>
96899                    <field>
96900                        <name>NO_KEY_STATE</name>
96901                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
96902                        <bitRange>[6:6]</bitRange>
96903                        <access>read-only</access>
96904                        <enumeratedValues>
96905                            <enumeratedValue>
96906                                <name>read_only</name>
96907                                <value>0</value>
96908                            </enumeratedValue>
96909                            <enumeratedValue>
96910                                <name>inaccessible</name>
96911                                <value>1</value>
96912                            </enumeratedValue>
96913                        </enumeratedValues>
96914                    </field>
96915                    <field>
96916                        <name>KEY_R</name>
96917                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
96918                        <bitRange>[5:3]</bitRange>
96919                        <access>read-only</access>
96920                    </field>
96921                    <field>
96922                        <name>KEY_W</name>
96923                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
96924                        <bitRange>[2:0]</bitRange>
96925                        <access>read-only</access>
96926                    </field>
96927                </fields>
96928            </register>
96929            <register>
96930                <name>PAGE43_LOCK1</name>
96931                <addressOffset>0x00003f5c</addressOffset>
96932                <description>Lock configuration MSBs for page 43 (rows 0xac0 through 0xaff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
96933
96934                    This OTP location is always readable, and is write-protected by its own permissions.</description>
96935                <resetValue>0x00000000</resetValue>
96936                <fields>
96937                    <field>
96938                        <name>R2</name>
96939                        <description>Redundant copy of bits 7:0</description>
96940                        <bitRange>[23:16]</bitRange>
96941                        <access>read-only</access>
96942                    </field>
96943                    <field>
96944                        <name>R1</name>
96945                        <description>Redundant copy of bits 7:0</description>
96946                        <bitRange>[15:8]</bitRange>
96947                        <access>read-only</access>
96948                    </field>
96949                    <field>
96950                        <name>LOCK_BL</name>
96951                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
96952                        <bitRange>[5:4]</bitRange>
96953                        <access>read-only</access>
96954                        <enumeratedValues>
96955                            <enumeratedValue>
96956                                <name>read_write</name>
96957                                <value>0</value>
96958                                <description>Bootloader permits user reads and writes to this page</description>
96959                            </enumeratedValue>
96960                            <enumeratedValue>
96961                                <name>read_only</name>
96962                                <value>1</value>
96963                                <description>Bootloader permits user reads of this page</description>
96964                            </enumeratedValue>
96965                            <enumeratedValue>
96966                                <name>reserved</name>
96967                                <value>2</value>
96968                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
96969                            </enumeratedValue>
96970                            <enumeratedValue>
96971                                <name>inaccessible</name>
96972                                <value>3</value>
96973                                <description>Bootloader does not permit user access to this page</description>
96974                            </enumeratedValue>
96975                        </enumeratedValues>
96976                    </field>
96977                    <field>
96978                        <name>LOCK_NS</name>
96979                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
96980
96981                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
96982                        <bitRange>[3:2]</bitRange>
96983                        <access>read-only</access>
96984                        <enumeratedValues>
96985                            <enumeratedValue>
96986                                <name>read_write</name>
96987                                <value>0</value>
96988                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
96989                            </enumeratedValue>
96990                            <enumeratedValue>
96991                                <name>read_only</name>
96992                                <value>1</value>
96993                                <description>Page can be read by Non-secure software</description>
96994                            </enumeratedValue>
96995                            <enumeratedValue>
96996                                <name>reserved</name>
96997                                <value>2</value>
96998                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
96999                            </enumeratedValue>
97000                            <enumeratedValue>
97001                                <name>inaccessible</name>
97002                                <value>3</value>
97003                                <description>Page can not be accessed by Non-secure software.</description>
97004                            </enumeratedValue>
97005                        </enumeratedValues>
97006                    </field>
97007                    <field>
97008                        <name>LOCK_S</name>
97009                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97010                        <bitRange>[1:0]</bitRange>
97011                        <access>read-only</access>
97012                        <enumeratedValues>
97013                            <enumeratedValue>
97014                                <name>read_write</name>
97015                                <value>0</value>
97016                                <description>Page is fully accessible by Secure software.</description>
97017                            </enumeratedValue>
97018                            <enumeratedValue>
97019                                <name>read_only</name>
97020                                <value>1</value>
97021                                <description>Page can be read by Secure software, but can not be written.</description>
97022                            </enumeratedValue>
97023                            <enumeratedValue>
97024                                <name>reserved</name>
97025                                <value>2</value>
97026                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97027                            </enumeratedValue>
97028                            <enumeratedValue>
97029                                <name>inaccessible</name>
97030                                <value>3</value>
97031                                <description>Page can not be accessed by Secure software.</description>
97032                            </enumeratedValue>
97033                        </enumeratedValues>
97034                    </field>
97035                </fields>
97036            </register>
97037            <register>
97038                <name>PAGE44_LOCK0</name>
97039                <addressOffset>0x00003f60</addressOffset>
97040                <description>Lock configuration LSBs for page 44 (rows 0xb00 through 0xb3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97041
97042                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97043                <resetValue>0x00000000</resetValue>
97044                <fields>
97045                    <field>
97046                        <name>R2</name>
97047                        <description>Redundant copy of bits 7:0</description>
97048                        <bitRange>[23:16]</bitRange>
97049                        <access>read-only</access>
97050                    </field>
97051                    <field>
97052                        <name>R1</name>
97053                        <description>Redundant copy of bits 7:0</description>
97054                        <bitRange>[15:8]</bitRange>
97055                        <access>read-only</access>
97056                    </field>
97057                    <field>
97058                        <name>NO_KEY_STATE</name>
97059                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97060                        <bitRange>[6:6]</bitRange>
97061                        <access>read-only</access>
97062                        <enumeratedValues>
97063                            <enumeratedValue>
97064                                <name>read_only</name>
97065                                <value>0</value>
97066                            </enumeratedValue>
97067                            <enumeratedValue>
97068                                <name>inaccessible</name>
97069                                <value>1</value>
97070                            </enumeratedValue>
97071                        </enumeratedValues>
97072                    </field>
97073                    <field>
97074                        <name>KEY_R</name>
97075                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97076                        <bitRange>[5:3]</bitRange>
97077                        <access>read-only</access>
97078                    </field>
97079                    <field>
97080                        <name>KEY_W</name>
97081                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97082                        <bitRange>[2:0]</bitRange>
97083                        <access>read-only</access>
97084                    </field>
97085                </fields>
97086            </register>
97087            <register>
97088                <name>PAGE44_LOCK1</name>
97089                <addressOffset>0x00003f64</addressOffset>
97090                <description>Lock configuration MSBs for page 44 (rows 0xb00 through 0xb3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97091
97092                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97093                <resetValue>0x00000000</resetValue>
97094                <fields>
97095                    <field>
97096                        <name>R2</name>
97097                        <description>Redundant copy of bits 7:0</description>
97098                        <bitRange>[23:16]</bitRange>
97099                        <access>read-only</access>
97100                    </field>
97101                    <field>
97102                        <name>R1</name>
97103                        <description>Redundant copy of bits 7:0</description>
97104                        <bitRange>[15:8]</bitRange>
97105                        <access>read-only</access>
97106                    </field>
97107                    <field>
97108                        <name>LOCK_BL</name>
97109                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97110                        <bitRange>[5:4]</bitRange>
97111                        <access>read-only</access>
97112                        <enumeratedValues>
97113                            <enumeratedValue>
97114                                <name>read_write</name>
97115                                <value>0</value>
97116                                <description>Bootloader permits user reads and writes to this page</description>
97117                            </enumeratedValue>
97118                            <enumeratedValue>
97119                                <name>read_only</name>
97120                                <value>1</value>
97121                                <description>Bootloader permits user reads of this page</description>
97122                            </enumeratedValue>
97123                            <enumeratedValue>
97124                                <name>reserved</name>
97125                                <value>2</value>
97126                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97127                            </enumeratedValue>
97128                            <enumeratedValue>
97129                                <name>inaccessible</name>
97130                                <value>3</value>
97131                                <description>Bootloader does not permit user access to this page</description>
97132                            </enumeratedValue>
97133                        </enumeratedValues>
97134                    </field>
97135                    <field>
97136                        <name>LOCK_NS</name>
97137                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97138
97139                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97140                        <bitRange>[3:2]</bitRange>
97141                        <access>read-only</access>
97142                        <enumeratedValues>
97143                            <enumeratedValue>
97144                                <name>read_write</name>
97145                                <value>0</value>
97146                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97147                            </enumeratedValue>
97148                            <enumeratedValue>
97149                                <name>read_only</name>
97150                                <value>1</value>
97151                                <description>Page can be read by Non-secure software</description>
97152                            </enumeratedValue>
97153                            <enumeratedValue>
97154                                <name>reserved</name>
97155                                <value>2</value>
97156                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97157                            </enumeratedValue>
97158                            <enumeratedValue>
97159                                <name>inaccessible</name>
97160                                <value>3</value>
97161                                <description>Page can not be accessed by Non-secure software.</description>
97162                            </enumeratedValue>
97163                        </enumeratedValues>
97164                    </field>
97165                    <field>
97166                        <name>LOCK_S</name>
97167                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97168                        <bitRange>[1:0]</bitRange>
97169                        <access>read-only</access>
97170                        <enumeratedValues>
97171                            <enumeratedValue>
97172                                <name>read_write</name>
97173                                <value>0</value>
97174                                <description>Page is fully accessible by Secure software.</description>
97175                            </enumeratedValue>
97176                            <enumeratedValue>
97177                                <name>read_only</name>
97178                                <value>1</value>
97179                                <description>Page can be read by Secure software, but can not be written.</description>
97180                            </enumeratedValue>
97181                            <enumeratedValue>
97182                                <name>reserved</name>
97183                                <value>2</value>
97184                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97185                            </enumeratedValue>
97186                            <enumeratedValue>
97187                                <name>inaccessible</name>
97188                                <value>3</value>
97189                                <description>Page can not be accessed by Secure software.</description>
97190                            </enumeratedValue>
97191                        </enumeratedValues>
97192                    </field>
97193                </fields>
97194            </register>
97195            <register>
97196                <name>PAGE45_LOCK0</name>
97197                <addressOffset>0x00003f68</addressOffset>
97198                <description>Lock configuration LSBs for page 45 (rows 0xb40 through 0xb7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97199
97200                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97201                <resetValue>0x00000000</resetValue>
97202                <fields>
97203                    <field>
97204                        <name>R2</name>
97205                        <description>Redundant copy of bits 7:0</description>
97206                        <bitRange>[23:16]</bitRange>
97207                        <access>read-only</access>
97208                    </field>
97209                    <field>
97210                        <name>R1</name>
97211                        <description>Redundant copy of bits 7:0</description>
97212                        <bitRange>[15:8]</bitRange>
97213                        <access>read-only</access>
97214                    </field>
97215                    <field>
97216                        <name>NO_KEY_STATE</name>
97217                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97218                        <bitRange>[6:6]</bitRange>
97219                        <access>read-only</access>
97220                        <enumeratedValues>
97221                            <enumeratedValue>
97222                                <name>read_only</name>
97223                                <value>0</value>
97224                            </enumeratedValue>
97225                            <enumeratedValue>
97226                                <name>inaccessible</name>
97227                                <value>1</value>
97228                            </enumeratedValue>
97229                        </enumeratedValues>
97230                    </field>
97231                    <field>
97232                        <name>KEY_R</name>
97233                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97234                        <bitRange>[5:3]</bitRange>
97235                        <access>read-only</access>
97236                    </field>
97237                    <field>
97238                        <name>KEY_W</name>
97239                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97240                        <bitRange>[2:0]</bitRange>
97241                        <access>read-only</access>
97242                    </field>
97243                </fields>
97244            </register>
97245            <register>
97246                <name>PAGE45_LOCK1</name>
97247                <addressOffset>0x00003f6c</addressOffset>
97248                <description>Lock configuration MSBs for page 45 (rows 0xb40 through 0xb7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97249
97250                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97251                <resetValue>0x00000000</resetValue>
97252                <fields>
97253                    <field>
97254                        <name>R2</name>
97255                        <description>Redundant copy of bits 7:0</description>
97256                        <bitRange>[23:16]</bitRange>
97257                        <access>read-only</access>
97258                    </field>
97259                    <field>
97260                        <name>R1</name>
97261                        <description>Redundant copy of bits 7:0</description>
97262                        <bitRange>[15:8]</bitRange>
97263                        <access>read-only</access>
97264                    </field>
97265                    <field>
97266                        <name>LOCK_BL</name>
97267                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97268                        <bitRange>[5:4]</bitRange>
97269                        <access>read-only</access>
97270                        <enumeratedValues>
97271                            <enumeratedValue>
97272                                <name>read_write</name>
97273                                <value>0</value>
97274                                <description>Bootloader permits user reads and writes to this page</description>
97275                            </enumeratedValue>
97276                            <enumeratedValue>
97277                                <name>read_only</name>
97278                                <value>1</value>
97279                                <description>Bootloader permits user reads of this page</description>
97280                            </enumeratedValue>
97281                            <enumeratedValue>
97282                                <name>reserved</name>
97283                                <value>2</value>
97284                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97285                            </enumeratedValue>
97286                            <enumeratedValue>
97287                                <name>inaccessible</name>
97288                                <value>3</value>
97289                                <description>Bootloader does not permit user access to this page</description>
97290                            </enumeratedValue>
97291                        </enumeratedValues>
97292                    </field>
97293                    <field>
97294                        <name>LOCK_NS</name>
97295                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97296
97297                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97298                        <bitRange>[3:2]</bitRange>
97299                        <access>read-only</access>
97300                        <enumeratedValues>
97301                            <enumeratedValue>
97302                                <name>read_write</name>
97303                                <value>0</value>
97304                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97305                            </enumeratedValue>
97306                            <enumeratedValue>
97307                                <name>read_only</name>
97308                                <value>1</value>
97309                                <description>Page can be read by Non-secure software</description>
97310                            </enumeratedValue>
97311                            <enumeratedValue>
97312                                <name>reserved</name>
97313                                <value>2</value>
97314                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97315                            </enumeratedValue>
97316                            <enumeratedValue>
97317                                <name>inaccessible</name>
97318                                <value>3</value>
97319                                <description>Page can not be accessed by Non-secure software.</description>
97320                            </enumeratedValue>
97321                        </enumeratedValues>
97322                    </field>
97323                    <field>
97324                        <name>LOCK_S</name>
97325                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97326                        <bitRange>[1:0]</bitRange>
97327                        <access>read-only</access>
97328                        <enumeratedValues>
97329                            <enumeratedValue>
97330                                <name>read_write</name>
97331                                <value>0</value>
97332                                <description>Page is fully accessible by Secure software.</description>
97333                            </enumeratedValue>
97334                            <enumeratedValue>
97335                                <name>read_only</name>
97336                                <value>1</value>
97337                                <description>Page can be read by Secure software, but can not be written.</description>
97338                            </enumeratedValue>
97339                            <enumeratedValue>
97340                                <name>reserved</name>
97341                                <value>2</value>
97342                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97343                            </enumeratedValue>
97344                            <enumeratedValue>
97345                                <name>inaccessible</name>
97346                                <value>3</value>
97347                                <description>Page can not be accessed by Secure software.</description>
97348                            </enumeratedValue>
97349                        </enumeratedValues>
97350                    </field>
97351                </fields>
97352            </register>
97353            <register>
97354                <name>PAGE46_LOCK0</name>
97355                <addressOffset>0x00003f70</addressOffset>
97356                <description>Lock configuration LSBs for page 46 (rows 0xb80 through 0xbbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97357
97358                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97359                <resetValue>0x00000000</resetValue>
97360                <fields>
97361                    <field>
97362                        <name>R2</name>
97363                        <description>Redundant copy of bits 7:0</description>
97364                        <bitRange>[23:16]</bitRange>
97365                        <access>read-only</access>
97366                    </field>
97367                    <field>
97368                        <name>R1</name>
97369                        <description>Redundant copy of bits 7:0</description>
97370                        <bitRange>[15:8]</bitRange>
97371                        <access>read-only</access>
97372                    </field>
97373                    <field>
97374                        <name>NO_KEY_STATE</name>
97375                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97376                        <bitRange>[6:6]</bitRange>
97377                        <access>read-only</access>
97378                        <enumeratedValues>
97379                            <enumeratedValue>
97380                                <name>read_only</name>
97381                                <value>0</value>
97382                            </enumeratedValue>
97383                            <enumeratedValue>
97384                                <name>inaccessible</name>
97385                                <value>1</value>
97386                            </enumeratedValue>
97387                        </enumeratedValues>
97388                    </field>
97389                    <field>
97390                        <name>KEY_R</name>
97391                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97392                        <bitRange>[5:3]</bitRange>
97393                        <access>read-only</access>
97394                    </field>
97395                    <field>
97396                        <name>KEY_W</name>
97397                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97398                        <bitRange>[2:0]</bitRange>
97399                        <access>read-only</access>
97400                    </field>
97401                </fields>
97402            </register>
97403            <register>
97404                <name>PAGE46_LOCK1</name>
97405                <addressOffset>0x00003f74</addressOffset>
97406                <description>Lock configuration MSBs for page 46 (rows 0xb80 through 0xbbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97407
97408                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97409                <resetValue>0x00000000</resetValue>
97410                <fields>
97411                    <field>
97412                        <name>R2</name>
97413                        <description>Redundant copy of bits 7:0</description>
97414                        <bitRange>[23:16]</bitRange>
97415                        <access>read-only</access>
97416                    </field>
97417                    <field>
97418                        <name>R1</name>
97419                        <description>Redundant copy of bits 7:0</description>
97420                        <bitRange>[15:8]</bitRange>
97421                        <access>read-only</access>
97422                    </field>
97423                    <field>
97424                        <name>LOCK_BL</name>
97425                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97426                        <bitRange>[5:4]</bitRange>
97427                        <access>read-only</access>
97428                        <enumeratedValues>
97429                            <enumeratedValue>
97430                                <name>read_write</name>
97431                                <value>0</value>
97432                                <description>Bootloader permits user reads and writes to this page</description>
97433                            </enumeratedValue>
97434                            <enumeratedValue>
97435                                <name>read_only</name>
97436                                <value>1</value>
97437                                <description>Bootloader permits user reads of this page</description>
97438                            </enumeratedValue>
97439                            <enumeratedValue>
97440                                <name>reserved</name>
97441                                <value>2</value>
97442                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97443                            </enumeratedValue>
97444                            <enumeratedValue>
97445                                <name>inaccessible</name>
97446                                <value>3</value>
97447                                <description>Bootloader does not permit user access to this page</description>
97448                            </enumeratedValue>
97449                        </enumeratedValues>
97450                    </field>
97451                    <field>
97452                        <name>LOCK_NS</name>
97453                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97454
97455                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97456                        <bitRange>[3:2]</bitRange>
97457                        <access>read-only</access>
97458                        <enumeratedValues>
97459                            <enumeratedValue>
97460                                <name>read_write</name>
97461                                <value>0</value>
97462                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97463                            </enumeratedValue>
97464                            <enumeratedValue>
97465                                <name>read_only</name>
97466                                <value>1</value>
97467                                <description>Page can be read by Non-secure software</description>
97468                            </enumeratedValue>
97469                            <enumeratedValue>
97470                                <name>reserved</name>
97471                                <value>2</value>
97472                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97473                            </enumeratedValue>
97474                            <enumeratedValue>
97475                                <name>inaccessible</name>
97476                                <value>3</value>
97477                                <description>Page can not be accessed by Non-secure software.</description>
97478                            </enumeratedValue>
97479                        </enumeratedValues>
97480                    </field>
97481                    <field>
97482                        <name>LOCK_S</name>
97483                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97484                        <bitRange>[1:0]</bitRange>
97485                        <access>read-only</access>
97486                        <enumeratedValues>
97487                            <enumeratedValue>
97488                                <name>read_write</name>
97489                                <value>0</value>
97490                                <description>Page is fully accessible by Secure software.</description>
97491                            </enumeratedValue>
97492                            <enumeratedValue>
97493                                <name>read_only</name>
97494                                <value>1</value>
97495                                <description>Page can be read by Secure software, but can not be written.</description>
97496                            </enumeratedValue>
97497                            <enumeratedValue>
97498                                <name>reserved</name>
97499                                <value>2</value>
97500                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97501                            </enumeratedValue>
97502                            <enumeratedValue>
97503                                <name>inaccessible</name>
97504                                <value>3</value>
97505                                <description>Page can not be accessed by Secure software.</description>
97506                            </enumeratedValue>
97507                        </enumeratedValues>
97508                    </field>
97509                </fields>
97510            </register>
97511            <register>
97512                <name>PAGE47_LOCK0</name>
97513                <addressOffset>0x00003f78</addressOffset>
97514                <description>Lock configuration LSBs for page 47 (rows 0xbc0 through 0xbff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97515
97516                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97517                <resetValue>0x00000000</resetValue>
97518                <fields>
97519                    <field>
97520                        <name>R2</name>
97521                        <description>Redundant copy of bits 7:0</description>
97522                        <bitRange>[23:16]</bitRange>
97523                        <access>read-only</access>
97524                    </field>
97525                    <field>
97526                        <name>R1</name>
97527                        <description>Redundant copy of bits 7:0</description>
97528                        <bitRange>[15:8]</bitRange>
97529                        <access>read-only</access>
97530                    </field>
97531                    <field>
97532                        <name>NO_KEY_STATE</name>
97533                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97534                        <bitRange>[6:6]</bitRange>
97535                        <access>read-only</access>
97536                        <enumeratedValues>
97537                            <enumeratedValue>
97538                                <name>read_only</name>
97539                                <value>0</value>
97540                            </enumeratedValue>
97541                            <enumeratedValue>
97542                                <name>inaccessible</name>
97543                                <value>1</value>
97544                            </enumeratedValue>
97545                        </enumeratedValues>
97546                    </field>
97547                    <field>
97548                        <name>KEY_R</name>
97549                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97550                        <bitRange>[5:3]</bitRange>
97551                        <access>read-only</access>
97552                    </field>
97553                    <field>
97554                        <name>KEY_W</name>
97555                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97556                        <bitRange>[2:0]</bitRange>
97557                        <access>read-only</access>
97558                    </field>
97559                </fields>
97560            </register>
97561            <register>
97562                <name>PAGE47_LOCK1</name>
97563                <addressOffset>0x00003f7c</addressOffset>
97564                <description>Lock configuration MSBs for page 47 (rows 0xbc0 through 0xbff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97565
97566                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97567                <resetValue>0x00000000</resetValue>
97568                <fields>
97569                    <field>
97570                        <name>R2</name>
97571                        <description>Redundant copy of bits 7:0</description>
97572                        <bitRange>[23:16]</bitRange>
97573                        <access>read-only</access>
97574                    </field>
97575                    <field>
97576                        <name>R1</name>
97577                        <description>Redundant copy of bits 7:0</description>
97578                        <bitRange>[15:8]</bitRange>
97579                        <access>read-only</access>
97580                    </field>
97581                    <field>
97582                        <name>LOCK_BL</name>
97583                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97584                        <bitRange>[5:4]</bitRange>
97585                        <access>read-only</access>
97586                        <enumeratedValues>
97587                            <enumeratedValue>
97588                                <name>read_write</name>
97589                                <value>0</value>
97590                                <description>Bootloader permits user reads and writes to this page</description>
97591                            </enumeratedValue>
97592                            <enumeratedValue>
97593                                <name>read_only</name>
97594                                <value>1</value>
97595                                <description>Bootloader permits user reads of this page</description>
97596                            </enumeratedValue>
97597                            <enumeratedValue>
97598                                <name>reserved</name>
97599                                <value>2</value>
97600                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97601                            </enumeratedValue>
97602                            <enumeratedValue>
97603                                <name>inaccessible</name>
97604                                <value>3</value>
97605                                <description>Bootloader does not permit user access to this page</description>
97606                            </enumeratedValue>
97607                        </enumeratedValues>
97608                    </field>
97609                    <field>
97610                        <name>LOCK_NS</name>
97611                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97612
97613                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97614                        <bitRange>[3:2]</bitRange>
97615                        <access>read-only</access>
97616                        <enumeratedValues>
97617                            <enumeratedValue>
97618                                <name>read_write</name>
97619                                <value>0</value>
97620                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97621                            </enumeratedValue>
97622                            <enumeratedValue>
97623                                <name>read_only</name>
97624                                <value>1</value>
97625                                <description>Page can be read by Non-secure software</description>
97626                            </enumeratedValue>
97627                            <enumeratedValue>
97628                                <name>reserved</name>
97629                                <value>2</value>
97630                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97631                            </enumeratedValue>
97632                            <enumeratedValue>
97633                                <name>inaccessible</name>
97634                                <value>3</value>
97635                                <description>Page can not be accessed by Non-secure software.</description>
97636                            </enumeratedValue>
97637                        </enumeratedValues>
97638                    </field>
97639                    <field>
97640                        <name>LOCK_S</name>
97641                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97642                        <bitRange>[1:0]</bitRange>
97643                        <access>read-only</access>
97644                        <enumeratedValues>
97645                            <enumeratedValue>
97646                                <name>read_write</name>
97647                                <value>0</value>
97648                                <description>Page is fully accessible by Secure software.</description>
97649                            </enumeratedValue>
97650                            <enumeratedValue>
97651                                <name>read_only</name>
97652                                <value>1</value>
97653                                <description>Page can be read by Secure software, but can not be written.</description>
97654                            </enumeratedValue>
97655                            <enumeratedValue>
97656                                <name>reserved</name>
97657                                <value>2</value>
97658                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97659                            </enumeratedValue>
97660                            <enumeratedValue>
97661                                <name>inaccessible</name>
97662                                <value>3</value>
97663                                <description>Page can not be accessed by Secure software.</description>
97664                            </enumeratedValue>
97665                        </enumeratedValues>
97666                    </field>
97667                </fields>
97668            </register>
97669            <register>
97670                <name>PAGE48_LOCK0</name>
97671                <addressOffset>0x00003f80</addressOffset>
97672                <description>Lock configuration LSBs for page 48 (rows 0xc00 through 0xc3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97673
97674                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97675                <resetValue>0x00000000</resetValue>
97676                <fields>
97677                    <field>
97678                        <name>R2</name>
97679                        <description>Redundant copy of bits 7:0</description>
97680                        <bitRange>[23:16]</bitRange>
97681                        <access>read-only</access>
97682                    </field>
97683                    <field>
97684                        <name>R1</name>
97685                        <description>Redundant copy of bits 7:0</description>
97686                        <bitRange>[15:8]</bitRange>
97687                        <access>read-only</access>
97688                    </field>
97689                    <field>
97690                        <name>NO_KEY_STATE</name>
97691                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97692                        <bitRange>[6:6]</bitRange>
97693                        <access>read-only</access>
97694                        <enumeratedValues>
97695                            <enumeratedValue>
97696                                <name>read_only</name>
97697                                <value>0</value>
97698                            </enumeratedValue>
97699                            <enumeratedValue>
97700                                <name>inaccessible</name>
97701                                <value>1</value>
97702                            </enumeratedValue>
97703                        </enumeratedValues>
97704                    </field>
97705                    <field>
97706                        <name>KEY_R</name>
97707                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97708                        <bitRange>[5:3]</bitRange>
97709                        <access>read-only</access>
97710                    </field>
97711                    <field>
97712                        <name>KEY_W</name>
97713                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97714                        <bitRange>[2:0]</bitRange>
97715                        <access>read-only</access>
97716                    </field>
97717                </fields>
97718            </register>
97719            <register>
97720                <name>PAGE48_LOCK1</name>
97721                <addressOffset>0x00003f84</addressOffset>
97722                <description>Lock configuration MSBs for page 48 (rows 0xc00 through 0xc3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97723
97724                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97725                <resetValue>0x00000000</resetValue>
97726                <fields>
97727                    <field>
97728                        <name>R2</name>
97729                        <description>Redundant copy of bits 7:0</description>
97730                        <bitRange>[23:16]</bitRange>
97731                        <access>read-only</access>
97732                    </field>
97733                    <field>
97734                        <name>R1</name>
97735                        <description>Redundant copy of bits 7:0</description>
97736                        <bitRange>[15:8]</bitRange>
97737                        <access>read-only</access>
97738                    </field>
97739                    <field>
97740                        <name>LOCK_BL</name>
97741                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97742                        <bitRange>[5:4]</bitRange>
97743                        <access>read-only</access>
97744                        <enumeratedValues>
97745                            <enumeratedValue>
97746                                <name>read_write</name>
97747                                <value>0</value>
97748                                <description>Bootloader permits user reads and writes to this page</description>
97749                            </enumeratedValue>
97750                            <enumeratedValue>
97751                                <name>read_only</name>
97752                                <value>1</value>
97753                                <description>Bootloader permits user reads of this page</description>
97754                            </enumeratedValue>
97755                            <enumeratedValue>
97756                                <name>reserved</name>
97757                                <value>2</value>
97758                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97759                            </enumeratedValue>
97760                            <enumeratedValue>
97761                                <name>inaccessible</name>
97762                                <value>3</value>
97763                                <description>Bootloader does not permit user access to this page</description>
97764                            </enumeratedValue>
97765                        </enumeratedValues>
97766                    </field>
97767                    <field>
97768                        <name>LOCK_NS</name>
97769                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97770
97771                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97772                        <bitRange>[3:2]</bitRange>
97773                        <access>read-only</access>
97774                        <enumeratedValues>
97775                            <enumeratedValue>
97776                                <name>read_write</name>
97777                                <value>0</value>
97778                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97779                            </enumeratedValue>
97780                            <enumeratedValue>
97781                                <name>read_only</name>
97782                                <value>1</value>
97783                                <description>Page can be read by Non-secure software</description>
97784                            </enumeratedValue>
97785                            <enumeratedValue>
97786                                <name>reserved</name>
97787                                <value>2</value>
97788                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97789                            </enumeratedValue>
97790                            <enumeratedValue>
97791                                <name>inaccessible</name>
97792                                <value>3</value>
97793                                <description>Page can not be accessed by Non-secure software.</description>
97794                            </enumeratedValue>
97795                        </enumeratedValues>
97796                    </field>
97797                    <field>
97798                        <name>LOCK_S</name>
97799                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97800                        <bitRange>[1:0]</bitRange>
97801                        <access>read-only</access>
97802                        <enumeratedValues>
97803                            <enumeratedValue>
97804                                <name>read_write</name>
97805                                <value>0</value>
97806                                <description>Page is fully accessible by Secure software.</description>
97807                            </enumeratedValue>
97808                            <enumeratedValue>
97809                                <name>read_only</name>
97810                                <value>1</value>
97811                                <description>Page can be read by Secure software, but can not be written.</description>
97812                            </enumeratedValue>
97813                            <enumeratedValue>
97814                                <name>reserved</name>
97815                                <value>2</value>
97816                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97817                            </enumeratedValue>
97818                            <enumeratedValue>
97819                                <name>inaccessible</name>
97820                                <value>3</value>
97821                                <description>Page can not be accessed by Secure software.</description>
97822                            </enumeratedValue>
97823                        </enumeratedValues>
97824                    </field>
97825                </fields>
97826            </register>
97827            <register>
97828                <name>PAGE49_LOCK0</name>
97829                <addressOffset>0x00003f88</addressOffset>
97830                <description>Lock configuration LSBs for page 49 (rows 0xc40 through 0xc7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97831
97832                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97833                <resetValue>0x00000000</resetValue>
97834                <fields>
97835                    <field>
97836                        <name>R2</name>
97837                        <description>Redundant copy of bits 7:0</description>
97838                        <bitRange>[23:16]</bitRange>
97839                        <access>read-only</access>
97840                    </field>
97841                    <field>
97842                        <name>R1</name>
97843                        <description>Redundant copy of bits 7:0</description>
97844                        <bitRange>[15:8]</bitRange>
97845                        <access>read-only</access>
97846                    </field>
97847                    <field>
97848                        <name>NO_KEY_STATE</name>
97849                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
97850                        <bitRange>[6:6]</bitRange>
97851                        <access>read-only</access>
97852                        <enumeratedValues>
97853                            <enumeratedValue>
97854                                <name>read_only</name>
97855                                <value>0</value>
97856                            </enumeratedValue>
97857                            <enumeratedValue>
97858                                <name>inaccessible</name>
97859                                <value>1</value>
97860                            </enumeratedValue>
97861                        </enumeratedValues>
97862                    </field>
97863                    <field>
97864                        <name>KEY_R</name>
97865                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
97866                        <bitRange>[5:3]</bitRange>
97867                        <access>read-only</access>
97868                    </field>
97869                    <field>
97870                        <name>KEY_W</name>
97871                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
97872                        <bitRange>[2:0]</bitRange>
97873                        <access>read-only</access>
97874                    </field>
97875                </fields>
97876            </register>
97877            <register>
97878                <name>PAGE49_LOCK1</name>
97879                <addressOffset>0x00003f8c</addressOffset>
97880                <description>Lock configuration MSBs for page 49 (rows 0xc40 through 0xc7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97881
97882                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97883                <resetValue>0x00000000</resetValue>
97884                <fields>
97885                    <field>
97886                        <name>R2</name>
97887                        <description>Redundant copy of bits 7:0</description>
97888                        <bitRange>[23:16]</bitRange>
97889                        <access>read-only</access>
97890                    </field>
97891                    <field>
97892                        <name>R1</name>
97893                        <description>Redundant copy of bits 7:0</description>
97894                        <bitRange>[15:8]</bitRange>
97895                        <access>read-only</access>
97896                    </field>
97897                    <field>
97898                        <name>LOCK_BL</name>
97899                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
97900                        <bitRange>[5:4]</bitRange>
97901                        <access>read-only</access>
97902                        <enumeratedValues>
97903                            <enumeratedValue>
97904                                <name>read_write</name>
97905                                <value>0</value>
97906                                <description>Bootloader permits user reads and writes to this page</description>
97907                            </enumeratedValue>
97908                            <enumeratedValue>
97909                                <name>read_only</name>
97910                                <value>1</value>
97911                                <description>Bootloader permits user reads of this page</description>
97912                            </enumeratedValue>
97913                            <enumeratedValue>
97914                                <name>reserved</name>
97915                                <value>2</value>
97916                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
97917                            </enumeratedValue>
97918                            <enumeratedValue>
97919                                <name>inaccessible</name>
97920                                <value>3</value>
97921                                <description>Bootloader does not permit user access to this page</description>
97922                            </enumeratedValue>
97923                        </enumeratedValues>
97924                    </field>
97925                    <field>
97926                        <name>LOCK_NS</name>
97927                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
97928
97929                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
97930                        <bitRange>[3:2]</bitRange>
97931                        <access>read-only</access>
97932                        <enumeratedValues>
97933                            <enumeratedValue>
97934                                <name>read_write</name>
97935                                <value>0</value>
97936                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
97937                            </enumeratedValue>
97938                            <enumeratedValue>
97939                                <name>read_only</name>
97940                                <value>1</value>
97941                                <description>Page can be read by Non-secure software</description>
97942                            </enumeratedValue>
97943                            <enumeratedValue>
97944                                <name>reserved</name>
97945                                <value>2</value>
97946                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97947                            </enumeratedValue>
97948                            <enumeratedValue>
97949                                <name>inaccessible</name>
97950                                <value>3</value>
97951                                <description>Page can not be accessed by Non-secure software.</description>
97952                            </enumeratedValue>
97953                        </enumeratedValues>
97954                    </field>
97955                    <field>
97956                        <name>LOCK_S</name>
97957                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
97958                        <bitRange>[1:0]</bitRange>
97959                        <access>read-only</access>
97960                        <enumeratedValues>
97961                            <enumeratedValue>
97962                                <name>read_write</name>
97963                                <value>0</value>
97964                                <description>Page is fully accessible by Secure software.</description>
97965                            </enumeratedValue>
97966                            <enumeratedValue>
97967                                <name>read_only</name>
97968                                <value>1</value>
97969                                <description>Page can be read by Secure software, but can not be written.</description>
97970                            </enumeratedValue>
97971                            <enumeratedValue>
97972                                <name>reserved</name>
97973                                <value>2</value>
97974                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
97975                            </enumeratedValue>
97976                            <enumeratedValue>
97977                                <name>inaccessible</name>
97978                                <value>3</value>
97979                                <description>Page can not be accessed by Secure software.</description>
97980                            </enumeratedValue>
97981                        </enumeratedValues>
97982                    </field>
97983                </fields>
97984            </register>
97985            <register>
97986                <name>PAGE50_LOCK0</name>
97987                <addressOffset>0x00003f90</addressOffset>
97988                <description>Lock configuration LSBs for page 50 (rows 0xc80 through 0xcbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
97989
97990                    This OTP location is always readable, and is write-protected by its own permissions.</description>
97991                <resetValue>0x00000000</resetValue>
97992                <fields>
97993                    <field>
97994                        <name>R2</name>
97995                        <description>Redundant copy of bits 7:0</description>
97996                        <bitRange>[23:16]</bitRange>
97997                        <access>read-only</access>
97998                    </field>
97999                    <field>
98000                        <name>R1</name>
98001                        <description>Redundant copy of bits 7:0</description>
98002                        <bitRange>[15:8]</bitRange>
98003                        <access>read-only</access>
98004                    </field>
98005                    <field>
98006                        <name>NO_KEY_STATE</name>
98007                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98008                        <bitRange>[6:6]</bitRange>
98009                        <access>read-only</access>
98010                        <enumeratedValues>
98011                            <enumeratedValue>
98012                                <name>read_only</name>
98013                                <value>0</value>
98014                            </enumeratedValue>
98015                            <enumeratedValue>
98016                                <name>inaccessible</name>
98017                                <value>1</value>
98018                            </enumeratedValue>
98019                        </enumeratedValues>
98020                    </field>
98021                    <field>
98022                        <name>KEY_R</name>
98023                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98024                        <bitRange>[5:3]</bitRange>
98025                        <access>read-only</access>
98026                    </field>
98027                    <field>
98028                        <name>KEY_W</name>
98029                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98030                        <bitRange>[2:0]</bitRange>
98031                        <access>read-only</access>
98032                    </field>
98033                </fields>
98034            </register>
98035            <register>
98036                <name>PAGE50_LOCK1</name>
98037                <addressOffset>0x00003f94</addressOffset>
98038                <description>Lock configuration MSBs for page 50 (rows 0xc80 through 0xcbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98039
98040                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98041                <resetValue>0x00000000</resetValue>
98042                <fields>
98043                    <field>
98044                        <name>R2</name>
98045                        <description>Redundant copy of bits 7:0</description>
98046                        <bitRange>[23:16]</bitRange>
98047                        <access>read-only</access>
98048                    </field>
98049                    <field>
98050                        <name>R1</name>
98051                        <description>Redundant copy of bits 7:0</description>
98052                        <bitRange>[15:8]</bitRange>
98053                        <access>read-only</access>
98054                    </field>
98055                    <field>
98056                        <name>LOCK_BL</name>
98057                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98058                        <bitRange>[5:4]</bitRange>
98059                        <access>read-only</access>
98060                        <enumeratedValues>
98061                            <enumeratedValue>
98062                                <name>read_write</name>
98063                                <value>0</value>
98064                                <description>Bootloader permits user reads and writes to this page</description>
98065                            </enumeratedValue>
98066                            <enumeratedValue>
98067                                <name>read_only</name>
98068                                <value>1</value>
98069                                <description>Bootloader permits user reads of this page</description>
98070                            </enumeratedValue>
98071                            <enumeratedValue>
98072                                <name>reserved</name>
98073                                <value>2</value>
98074                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98075                            </enumeratedValue>
98076                            <enumeratedValue>
98077                                <name>inaccessible</name>
98078                                <value>3</value>
98079                                <description>Bootloader does not permit user access to this page</description>
98080                            </enumeratedValue>
98081                        </enumeratedValues>
98082                    </field>
98083                    <field>
98084                        <name>LOCK_NS</name>
98085                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98086
98087                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98088                        <bitRange>[3:2]</bitRange>
98089                        <access>read-only</access>
98090                        <enumeratedValues>
98091                            <enumeratedValue>
98092                                <name>read_write</name>
98093                                <value>0</value>
98094                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98095                            </enumeratedValue>
98096                            <enumeratedValue>
98097                                <name>read_only</name>
98098                                <value>1</value>
98099                                <description>Page can be read by Non-secure software</description>
98100                            </enumeratedValue>
98101                            <enumeratedValue>
98102                                <name>reserved</name>
98103                                <value>2</value>
98104                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98105                            </enumeratedValue>
98106                            <enumeratedValue>
98107                                <name>inaccessible</name>
98108                                <value>3</value>
98109                                <description>Page can not be accessed by Non-secure software.</description>
98110                            </enumeratedValue>
98111                        </enumeratedValues>
98112                    </field>
98113                    <field>
98114                        <name>LOCK_S</name>
98115                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98116                        <bitRange>[1:0]</bitRange>
98117                        <access>read-only</access>
98118                        <enumeratedValues>
98119                            <enumeratedValue>
98120                                <name>read_write</name>
98121                                <value>0</value>
98122                                <description>Page is fully accessible by Secure software.</description>
98123                            </enumeratedValue>
98124                            <enumeratedValue>
98125                                <name>read_only</name>
98126                                <value>1</value>
98127                                <description>Page can be read by Secure software, but can not be written.</description>
98128                            </enumeratedValue>
98129                            <enumeratedValue>
98130                                <name>reserved</name>
98131                                <value>2</value>
98132                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98133                            </enumeratedValue>
98134                            <enumeratedValue>
98135                                <name>inaccessible</name>
98136                                <value>3</value>
98137                                <description>Page can not be accessed by Secure software.</description>
98138                            </enumeratedValue>
98139                        </enumeratedValues>
98140                    </field>
98141                </fields>
98142            </register>
98143            <register>
98144                <name>PAGE51_LOCK0</name>
98145                <addressOffset>0x00003f98</addressOffset>
98146                <description>Lock configuration LSBs for page 51 (rows 0xcc0 through 0xcff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98147
98148                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98149                <resetValue>0x00000000</resetValue>
98150                <fields>
98151                    <field>
98152                        <name>R2</name>
98153                        <description>Redundant copy of bits 7:0</description>
98154                        <bitRange>[23:16]</bitRange>
98155                        <access>read-only</access>
98156                    </field>
98157                    <field>
98158                        <name>R1</name>
98159                        <description>Redundant copy of bits 7:0</description>
98160                        <bitRange>[15:8]</bitRange>
98161                        <access>read-only</access>
98162                    </field>
98163                    <field>
98164                        <name>NO_KEY_STATE</name>
98165                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98166                        <bitRange>[6:6]</bitRange>
98167                        <access>read-only</access>
98168                        <enumeratedValues>
98169                            <enumeratedValue>
98170                                <name>read_only</name>
98171                                <value>0</value>
98172                            </enumeratedValue>
98173                            <enumeratedValue>
98174                                <name>inaccessible</name>
98175                                <value>1</value>
98176                            </enumeratedValue>
98177                        </enumeratedValues>
98178                    </field>
98179                    <field>
98180                        <name>KEY_R</name>
98181                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98182                        <bitRange>[5:3]</bitRange>
98183                        <access>read-only</access>
98184                    </field>
98185                    <field>
98186                        <name>KEY_W</name>
98187                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98188                        <bitRange>[2:0]</bitRange>
98189                        <access>read-only</access>
98190                    </field>
98191                </fields>
98192            </register>
98193            <register>
98194                <name>PAGE51_LOCK1</name>
98195                <addressOffset>0x00003f9c</addressOffset>
98196                <description>Lock configuration MSBs for page 51 (rows 0xcc0 through 0xcff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98197
98198                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98199                <resetValue>0x00000000</resetValue>
98200                <fields>
98201                    <field>
98202                        <name>R2</name>
98203                        <description>Redundant copy of bits 7:0</description>
98204                        <bitRange>[23:16]</bitRange>
98205                        <access>read-only</access>
98206                    </field>
98207                    <field>
98208                        <name>R1</name>
98209                        <description>Redundant copy of bits 7:0</description>
98210                        <bitRange>[15:8]</bitRange>
98211                        <access>read-only</access>
98212                    </field>
98213                    <field>
98214                        <name>LOCK_BL</name>
98215                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98216                        <bitRange>[5:4]</bitRange>
98217                        <access>read-only</access>
98218                        <enumeratedValues>
98219                            <enumeratedValue>
98220                                <name>read_write</name>
98221                                <value>0</value>
98222                                <description>Bootloader permits user reads and writes to this page</description>
98223                            </enumeratedValue>
98224                            <enumeratedValue>
98225                                <name>read_only</name>
98226                                <value>1</value>
98227                                <description>Bootloader permits user reads of this page</description>
98228                            </enumeratedValue>
98229                            <enumeratedValue>
98230                                <name>reserved</name>
98231                                <value>2</value>
98232                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98233                            </enumeratedValue>
98234                            <enumeratedValue>
98235                                <name>inaccessible</name>
98236                                <value>3</value>
98237                                <description>Bootloader does not permit user access to this page</description>
98238                            </enumeratedValue>
98239                        </enumeratedValues>
98240                    </field>
98241                    <field>
98242                        <name>LOCK_NS</name>
98243                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98244
98245                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98246                        <bitRange>[3:2]</bitRange>
98247                        <access>read-only</access>
98248                        <enumeratedValues>
98249                            <enumeratedValue>
98250                                <name>read_write</name>
98251                                <value>0</value>
98252                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98253                            </enumeratedValue>
98254                            <enumeratedValue>
98255                                <name>read_only</name>
98256                                <value>1</value>
98257                                <description>Page can be read by Non-secure software</description>
98258                            </enumeratedValue>
98259                            <enumeratedValue>
98260                                <name>reserved</name>
98261                                <value>2</value>
98262                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98263                            </enumeratedValue>
98264                            <enumeratedValue>
98265                                <name>inaccessible</name>
98266                                <value>3</value>
98267                                <description>Page can not be accessed by Non-secure software.</description>
98268                            </enumeratedValue>
98269                        </enumeratedValues>
98270                    </field>
98271                    <field>
98272                        <name>LOCK_S</name>
98273                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98274                        <bitRange>[1:0]</bitRange>
98275                        <access>read-only</access>
98276                        <enumeratedValues>
98277                            <enumeratedValue>
98278                                <name>read_write</name>
98279                                <value>0</value>
98280                                <description>Page is fully accessible by Secure software.</description>
98281                            </enumeratedValue>
98282                            <enumeratedValue>
98283                                <name>read_only</name>
98284                                <value>1</value>
98285                                <description>Page can be read by Secure software, but can not be written.</description>
98286                            </enumeratedValue>
98287                            <enumeratedValue>
98288                                <name>reserved</name>
98289                                <value>2</value>
98290                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98291                            </enumeratedValue>
98292                            <enumeratedValue>
98293                                <name>inaccessible</name>
98294                                <value>3</value>
98295                                <description>Page can not be accessed by Secure software.</description>
98296                            </enumeratedValue>
98297                        </enumeratedValues>
98298                    </field>
98299                </fields>
98300            </register>
98301            <register>
98302                <name>PAGE52_LOCK0</name>
98303                <addressOffset>0x00003fa0</addressOffset>
98304                <description>Lock configuration LSBs for page 52 (rows 0xd00 through 0xd3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98305
98306                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98307                <resetValue>0x00000000</resetValue>
98308                <fields>
98309                    <field>
98310                        <name>R2</name>
98311                        <description>Redundant copy of bits 7:0</description>
98312                        <bitRange>[23:16]</bitRange>
98313                        <access>read-only</access>
98314                    </field>
98315                    <field>
98316                        <name>R1</name>
98317                        <description>Redundant copy of bits 7:0</description>
98318                        <bitRange>[15:8]</bitRange>
98319                        <access>read-only</access>
98320                    </field>
98321                    <field>
98322                        <name>NO_KEY_STATE</name>
98323                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98324                        <bitRange>[6:6]</bitRange>
98325                        <access>read-only</access>
98326                        <enumeratedValues>
98327                            <enumeratedValue>
98328                                <name>read_only</name>
98329                                <value>0</value>
98330                            </enumeratedValue>
98331                            <enumeratedValue>
98332                                <name>inaccessible</name>
98333                                <value>1</value>
98334                            </enumeratedValue>
98335                        </enumeratedValues>
98336                    </field>
98337                    <field>
98338                        <name>KEY_R</name>
98339                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98340                        <bitRange>[5:3]</bitRange>
98341                        <access>read-only</access>
98342                    </field>
98343                    <field>
98344                        <name>KEY_W</name>
98345                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98346                        <bitRange>[2:0]</bitRange>
98347                        <access>read-only</access>
98348                    </field>
98349                </fields>
98350            </register>
98351            <register>
98352                <name>PAGE52_LOCK1</name>
98353                <addressOffset>0x00003fa4</addressOffset>
98354                <description>Lock configuration MSBs for page 52 (rows 0xd00 through 0xd3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98355
98356                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98357                <resetValue>0x00000000</resetValue>
98358                <fields>
98359                    <field>
98360                        <name>R2</name>
98361                        <description>Redundant copy of bits 7:0</description>
98362                        <bitRange>[23:16]</bitRange>
98363                        <access>read-only</access>
98364                    </field>
98365                    <field>
98366                        <name>R1</name>
98367                        <description>Redundant copy of bits 7:0</description>
98368                        <bitRange>[15:8]</bitRange>
98369                        <access>read-only</access>
98370                    </field>
98371                    <field>
98372                        <name>LOCK_BL</name>
98373                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98374                        <bitRange>[5:4]</bitRange>
98375                        <access>read-only</access>
98376                        <enumeratedValues>
98377                            <enumeratedValue>
98378                                <name>read_write</name>
98379                                <value>0</value>
98380                                <description>Bootloader permits user reads and writes to this page</description>
98381                            </enumeratedValue>
98382                            <enumeratedValue>
98383                                <name>read_only</name>
98384                                <value>1</value>
98385                                <description>Bootloader permits user reads of this page</description>
98386                            </enumeratedValue>
98387                            <enumeratedValue>
98388                                <name>reserved</name>
98389                                <value>2</value>
98390                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98391                            </enumeratedValue>
98392                            <enumeratedValue>
98393                                <name>inaccessible</name>
98394                                <value>3</value>
98395                                <description>Bootloader does not permit user access to this page</description>
98396                            </enumeratedValue>
98397                        </enumeratedValues>
98398                    </field>
98399                    <field>
98400                        <name>LOCK_NS</name>
98401                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98402
98403                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98404                        <bitRange>[3:2]</bitRange>
98405                        <access>read-only</access>
98406                        <enumeratedValues>
98407                            <enumeratedValue>
98408                                <name>read_write</name>
98409                                <value>0</value>
98410                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98411                            </enumeratedValue>
98412                            <enumeratedValue>
98413                                <name>read_only</name>
98414                                <value>1</value>
98415                                <description>Page can be read by Non-secure software</description>
98416                            </enumeratedValue>
98417                            <enumeratedValue>
98418                                <name>reserved</name>
98419                                <value>2</value>
98420                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98421                            </enumeratedValue>
98422                            <enumeratedValue>
98423                                <name>inaccessible</name>
98424                                <value>3</value>
98425                                <description>Page can not be accessed by Non-secure software.</description>
98426                            </enumeratedValue>
98427                        </enumeratedValues>
98428                    </field>
98429                    <field>
98430                        <name>LOCK_S</name>
98431                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98432                        <bitRange>[1:0]</bitRange>
98433                        <access>read-only</access>
98434                        <enumeratedValues>
98435                            <enumeratedValue>
98436                                <name>read_write</name>
98437                                <value>0</value>
98438                                <description>Page is fully accessible by Secure software.</description>
98439                            </enumeratedValue>
98440                            <enumeratedValue>
98441                                <name>read_only</name>
98442                                <value>1</value>
98443                                <description>Page can be read by Secure software, but can not be written.</description>
98444                            </enumeratedValue>
98445                            <enumeratedValue>
98446                                <name>reserved</name>
98447                                <value>2</value>
98448                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98449                            </enumeratedValue>
98450                            <enumeratedValue>
98451                                <name>inaccessible</name>
98452                                <value>3</value>
98453                                <description>Page can not be accessed by Secure software.</description>
98454                            </enumeratedValue>
98455                        </enumeratedValues>
98456                    </field>
98457                </fields>
98458            </register>
98459            <register>
98460                <name>PAGE53_LOCK0</name>
98461                <addressOffset>0x00003fa8</addressOffset>
98462                <description>Lock configuration LSBs for page 53 (rows 0xd40 through 0xd7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98463
98464                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98465                <resetValue>0x00000000</resetValue>
98466                <fields>
98467                    <field>
98468                        <name>R2</name>
98469                        <description>Redundant copy of bits 7:0</description>
98470                        <bitRange>[23:16]</bitRange>
98471                        <access>read-only</access>
98472                    </field>
98473                    <field>
98474                        <name>R1</name>
98475                        <description>Redundant copy of bits 7:0</description>
98476                        <bitRange>[15:8]</bitRange>
98477                        <access>read-only</access>
98478                    </field>
98479                    <field>
98480                        <name>NO_KEY_STATE</name>
98481                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98482                        <bitRange>[6:6]</bitRange>
98483                        <access>read-only</access>
98484                        <enumeratedValues>
98485                            <enumeratedValue>
98486                                <name>read_only</name>
98487                                <value>0</value>
98488                            </enumeratedValue>
98489                            <enumeratedValue>
98490                                <name>inaccessible</name>
98491                                <value>1</value>
98492                            </enumeratedValue>
98493                        </enumeratedValues>
98494                    </field>
98495                    <field>
98496                        <name>KEY_R</name>
98497                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98498                        <bitRange>[5:3]</bitRange>
98499                        <access>read-only</access>
98500                    </field>
98501                    <field>
98502                        <name>KEY_W</name>
98503                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98504                        <bitRange>[2:0]</bitRange>
98505                        <access>read-only</access>
98506                    </field>
98507                </fields>
98508            </register>
98509            <register>
98510                <name>PAGE53_LOCK1</name>
98511                <addressOffset>0x00003fac</addressOffset>
98512                <description>Lock configuration MSBs for page 53 (rows 0xd40 through 0xd7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98513
98514                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98515                <resetValue>0x00000000</resetValue>
98516                <fields>
98517                    <field>
98518                        <name>R2</name>
98519                        <description>Redundant copy of bits 7:0</description>
98520                        <bitRange>[23:16]</bitRange>
98521                        <access>read-only</access>
98522                    </field>
98523                    <field>
98524                        <name>R1</name>
98525                        <description>Redundant copy of bits 7:0</description>
98526                        <bitRange>[15:8]</bitRange>
98527                        <access>read-only</access>
98528                    </field>
98529                    <field>
98530                        <name>LOCK_BL</name>
98531                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98532                        <bitRange>[5:4]</bitRange>
98533                        <access>read-only</access>
98534                        <enumeratedValues>
98535                            <enumeratedValue>
98536                                <name>read_write</name>
98537                                <value>0</value>
98538                                <description>Bootloader permits user reads and writes to this page</description>
98539                            </enumeratedValue>
98540                            <enumeratedValue>
98541                                <name>read_only</name>
98542                                <value>1</value>
98543                                <description>Bootloader permits user reads of this page</description>
98544                            </enumeratedValue>
98545                            <enumeratedValue>
98546                                <name>reserved</name>
98547                                <value>2</value>
98548                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98549                            </enumeratedValue>
98550                            <enumeratedValue>
98551                                <name>inaccessible</name>
98552                                <value>3</value>
98553                                <description>Bootloader does not permit user access to this page</description>
98554                            </enumeratedValue>
98555                        </enumeratedValues>
98556                    </field>
98557                    <field>
98558                        <name>LOCK_NS</name>
98559                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98560
98561                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98562                        <bitRange>[3:2]</bitRange>
98563                        <access>read-only</access>
98564                        <enumeratedValues>
98565                            <enumeratedValue>
98566                                <name>read_write</name>
98567                                <value>0</value>
98568                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98569                            </enumeratedValue>
98570                            <enumeratedValue>
98571                                <name>read_only</name>
98572                                <value>1</value>
98573                                <description>Page can be read by Non-secure software</description>
98574                            </enumeratedValue>
98575                            <enumeratedValue>
98576                                <name>reserved</name>
98577                                <value>2</value>
98578                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98579                            </enumeratedValue>
98580                            <enumeratedValue>
98581                                <name>inaccessible</name>
98582                                <value>3</value>
98583                                <description>Page can not be accessed by Non-secure software.</description>
98584                            </enumeratedValue>
98585                        </enumeratedValues>
98586                    </field>
98587                    <field>
98588                        <name>LOCK_S</name>
98589                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98590                        <bitRange>[1:0]</bitRange>
98591                        <access>read-only</access>
98592                        <enumeratedValues>
98593                            <enumeratedValue>
98594                                <name>read_write</name>
98595                                <value>0</value>
98596                                <description>Page is fully accessible by Secure software.</description>
98597                            </enumeratedValue>
98598                            <enumeratedValue>
98599                                <name>read_only</name>
98600                                <value>1</value>
98601                                <description>Page can be read by Secure software, but can not be written.</description>
98602                            </enumeratedValue>
98603                            <enumeratedValue>
98604                                <name>reserved</name>
98605                                <value>2</value>
98606                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98607                            </enumeratedValue>
98608                            <enumeratedValue>
98609                                <name>inaccessible</name>
98610                                <value>3</value>
98611                                <description>Page can not be accessed by Secure software.</description>
98612                            </enumeratedValue>
98613                        </enumeratedValues>
98614                    </field>
98615                </fields>
98616            </register>
98617            <register>
98618                <name>PAGE54_LOCK0</name>
98619                <addressOffset>0x00003fb0</addressOffset>
98620                <description>Lock configuration LSBs for page 54 (rows 0xd80 through 0xdbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98621
98622                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98623                <resetValue>0x00000000</resetValue>
98624                <fields>
98625                    <field>
98626                        <name>R2</name>
98627                        <description>Redundant copy of bits 7:0</description>
98628                        <bitRange>[23:16]</bitRange>
98629                        <access>read-only</access>
98630                    </field>
98631                    <field>
98632                        <name>R1</name>
98633                        <description>Redundant copy of bits 7:0</description>
98634                        <bitRange>[15:8]</bitRange>
98635                        <access>read-only</access>
98636                    </field>
98637                    <field>
98638                        <name>NO_KEY_STATE</name>
98639                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98640                        <bitRange>[6:6]</bitRange>
98641                        <access>read-only</access>
98642                        <enumeratedValues>
98643                            <enumeratedValue>
98644                                <name>read_only</name>
98645                                <value>0</value>
98646                            </enumeratedValue>
98647                            <enumeratedValue>
98648                                <name>inaccessible</name>
98649                                <value>1</value>
98650                            </enumeratedValue>
98651                        </enumeratedValues>
98652                    </field>
98653                    <field>
98654                        <name>KEY_R</name>
98655                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98656                        <bitRange>[5:3]</bitRange>
98657                        <access>read-only</access>
98658                    </field>
98659                    <field>
98660                        <name>KEY_W</name>
98661                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98662                        <bitRange>[2:0]</bitRange>
98663                        <access>read-only</access>
98664                    </field>
98665                </fields>
98666            </register>
98667            <register>
98668                <name>PAGE54_LOCK1</name>
98669                <addressOffset>0x00003fb4</addressOffset>
98670                <description>Lock configuration MSBs for page 54 (rows 0xd80 through 0xdbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98671
98672                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98673                <resetValue>0x00000000</resetValue>
98674                <fields>
98675                    <field>
98676                        <name>R2</name>
98677                        <description>Redundant copy of bits 7:0</description>
98678                        <bitRange>[23:16]</bitRange>
98679                        <access>read-only</access>
98680                    </field>
98681                    <field>
98682                        <name>R1</name>
98683                        <description>Redundant copy of bits 7:0</description>
98684                        <bitRange>[15:8]</bitRange>
98685                        <access>read-only</access>
98686                    </field>
98687                    <field>
98688                        <name>LOCK_BL</name>
98689                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98690                        <bitRange>[5:4]</bitRange>
98691                        <access>read-only</access>
98692                        <enumeratedValues>
98693                            <enumeratedValue>
98694                                <name>read_write</name>
98695                                <value>0</value>
98696                                <description>Bootloader permits user reads and writes to this page</description>
98697                            </enumeratedValue>
98698                            <enumeratedValue>
98699                                <name>read_only</name>
98700                                <value>1</value>
98701                                <description>Bootloader permits user reads of this page</description>
98702                            </enumeratedValue>
98703                            <enumeratedValue>
98704                                <name>reserved</name>
98705                                <value>2</value>
98706                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98707                            </enumeratedValue>
98708                            <enumeratedValue>
98709                                <name>inaccessible</name>
98710                                <value>3</value>
98711                                <description>Bootloader does not permit user access to this page</description>
98712                            </enumeratedValue>
98713                        </enumeratedValues>
98714                    </field>
98715                    <field>
98716                        <name>LOCK_NS</name>
98717                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98718
98719                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98720                        <bitRange>[3:2]</bitRange>
98721                        <access>read-only</access>
98722                        <enumeratedValues>
98723                            <enumeratedValue>
98724                                <name>read_write</name>
98725                                <value>0</value>
98726                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98727                            </enumeratedValue>
98728                            <enumeratedValue>
98729                                <name>read_only</name>
98730                                <value>1</value>
98731                                <description>Page can be read by Non-secure software</description>
98732                            </enumeratedValue>
98733                            <enumeratedValue>
98734                                <name>reserved</name>
98735                                <value>2</value>
98736                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98737                            </enumeratedValue>
98738                            <enumeratedValue>
98739                                <name>inaccessible</name>
98740                                <value>3</value>
98741                                <description>Page can not be accessed by Non-secure software.</description>
98742                            </enumeratedValue>
98743                        </enumeratedValues>
98744                    </field>
98745                    <field>
98746                        <name>LOCK_S</name>
98747                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98748                        <bitRange>[1:0]</bitRange>
98749                        <access>read-only</access>
98750                        <enumeratedValues>
98751                            <enumeratedValue>
98752                                <name>read_write</name>
98753                                <value>0</value>
98754                                <description>Page is fully accessible by Secure software.</description>
98755                            </enumeratedValue>
98756                            <enumeratedValue>
98757                                <name>read_only</name>
98758                                <value>1</value>
98759                                <description>Page can be read by Secure software, but can not be written.</description>
98760                            </enumeratedValue>
98761                            <enumeratedValue>
98762                                <name>reserved</name>
98763                                <value>2</value>
98764                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98765                            </enumeratedValue>
98766                            <enumeratedValue>
98767                                <name>inaccessible</name>
98768                                <value>3</value>
98769                                <description>Page can not be accessed by Secure software.</description>
98770                            </enumeratedValue>
98771                        </enumeratedValues>
98772                    </field>
98773                </fields>
98774            </register>
98775            <register>
98776                <name>PAGE55_LOCK0</name>
98777                <addressOffset>0x00003fb8</addressOffset>
98778                <description>Lock configuration LSBs for page 55 (rows 0xdc0 through 0xdff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98779
98780                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98781                <resetValue>0x00000000</resetValue>
98782                <fields>
98783                    <field>
98784                        <name>R2</name>
98785                        <description>Redundant copy of bits 7:0</description>
98786                        <bitRange>[23:16]</bitRange>
98787                        <access>read-only</access>
98788                    </field>
98789                    <field>
98790                        <name>R1</name>
98791                        <description>Redundant copy of bits 7:0</description>
98792                        <bitRange>[15:8]</bitRange>
98793                        <access>read-only</access>
98794                    </field>
98795                    <field>
98796                        <name>NO_KEY_STATE</name>
98797                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98798                        <bitRange>[6:6]</bitRange>
98799                        <access>read-only</access>
98800                        <enumeratedValues>
98801                            <enumeratedValue>
98802                                <name>read_only</name>
98803                                <value>0</value>
98804                            </enumeratedValue>
98805                            <enumeratedValue>
98806                                <name>inaccessible</name>
98807                                <value>1</value>
98808                            </enumeratedValue>
98809                        </enumeratedValues>
98810                    </field>
98811                    <field>
98812                        <name>KEY_R</name>
98813                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98814                        <bitRange>[5:3]</bitRange>
98815                        <access>read-only</access>
98816                    </field>
98817                    <field>
98818                        <name>KEY_W</name>
98819                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98820                        <bitRange>[2:0]</bitRange>
98821                        <access>read-only</access>
98822                    </field>
98823                </fields>
98824            </register>
98825            <register>
98826                <name>PAGE55_LOCK1</name>
98827                <addressOffset>0x00003fbc</addressOffset>
98828                <description>Lock configuration MSBs for page 55 (rows 0xdc0 through 0xdff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98829
98830                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98831                <resetValue>0x00000000</resetValue>
98832                <fields>
98833                    <field>
98834                        <name>R2</name>
98835                        <description>Redundant copy of bits 7:0</description>
98836                        <bitRange>[23:16]</bitRange>
98837                        <access>read-only</access>
98838                    </field>
98839                    <field>
98840                        <name>R1</name>
98841                        <description>Redundant copy of bits 7:0</description>
98842                        <bitRange>[15:8]</bitRange>
98843                        <access>read-only</access>
98844                    </field>
98845                    <field>
98846                        <name>LOCK_BL</name>
98847                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
98848                        <bitRange>[5:4]</bitRange>
98849                        <access>read-only</access>
98850                        <enumeratedValues>
98851                            <enumeratedValue>
98852                                <name>read_write</name>
98853                                <value>0</value>
98854                                <description>Bootloader permits user reads and writes to this page</description>
98855                            </enumeratedValue>
98856                            <enumeratedValue>
98857                                <name>read_only</name>
98858                                <value>1</value>
98859                                <description>Bootloader permits user reads of this page</description>
98860                            </enumeratedValue>
98861                            <enumeratedValue>
98862                                <name>reserved</name>
98863                                <value>2</value>
98864                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
98865                            </enumeratedValue>
98866                            <enumeratedValue>
98867                                <name>inaccessible</name>
98868                                <value>3</value>
98869                                <description>Bootloader does not permit user access to this page</description>
98870                            </enumeratedValue>
98871                        </enumeratedValues>
98872                    </field>
98873                    <field>
98874                        <name>LOCK_NS</name>
98875                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
98876
98877                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
98878                        <bitRange>[3:2]</bitRange>
98879                        <access>read-only</access>
98880                        <enumeratedValues>
98881                            <enumeratedValue>
98882                                <name>read_write</name>
98883                                <value>0</value>
98884                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
98885                            </enumeratedValue>
98886                            <enumeratedValue>
98887                                <name>read_only</name>
98888                                <value>1</value>
98889                                <description>Page can be read by Non-secure software</description>
98890                            </enumeratedValue>
98891                            <enumeratedValue>
98892                                <name>reserved</name>
98893                                <value>2</value>
98894                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98895                            </enumeratedValue>
98896                            <enumeratedValue>
98897                                <name>inaccessible</name>
98898                                <value>3</value>
98899                                <description>Page can not be accessed by Non-secure software.</description>
98900                            </enumeratedValue>
98901                        </enumeratedValues>
98902                    </field>
98903                    <field>
98904                        <name>LOCK_S</name>
98905                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
98906                        <bitRange>[1:0]</bitRange>
98907                        <access>read-only</access>
98908                        <enumeratedValues>
98909                            <enumeratedValue>
98910                                <name>read_write</name>
98911                                <value>0</value>
98912                                <description>Page is fully accessible by Secure software.</description>
98913                            </enumeratedValue>
98914                            <enumeratedValue>
98915                                <name>read_only</name>
98916                                <value>1</value>
98917                                <description>Page can be read by Secure software, but can not be written.</description>
98918                            </enumeratedValue>
98919                            <enumeratedValue>
98920                                <name>reserved</name>
98921                                <value>2</value>
98922                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
98923                            </enumeratedValue>
98924                            <enumeratedValue>
98925                                <name>inaccessible</name>
98926                                <value>3</value>
98927                                <description>Page can not be accessed by Secure software.</description>
98928                            </enumeratedValue>
98929                        </enumeratedValues>
98930                    </field>
98931                </fields>
98932            </register>
98933            <register>
98934                <name>PAGE56_LOCK0</name>
98935                <addressOffset>0x00003fc0</addressOffset>
98936                <description>Lock configuration LSBs for page 56 (rows 0xe00 through 0xe3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98937
98938                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98939                <resetValue>0x00000000</resetValue>
98940                <fields>
98941                    <field>
98942                        <name>R2</name>
98943                        <description>Redundant copy of bits 7:0</description>
98944                        <bitRange>[23:16]</bitRange>
98945                        <access>read-only</access>
98946                    </field>
98947                    <field>
98948                        <name>R1</name>
98949                        <description>Redundant copy of bits 7:0</description>
98950                        <bitRange>[15:8]</bitRange>
98951                        <access>read-only</access>
98952                    </field>
98953                    <field>
98954                        <name>NO_KEY_STATE</name>
98955                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
98956                        <bitRange>[6:6]</bitRange>
98957                        <access>read-only</access>
98958                        <enumeratedValues>
98959                            <enumeratedValue>
98960                                <name>read_only</name>
98961                                <value>0</value>
98962                            </enumeratedValue>
98963                            <enumeratedValue>
98964                                <name>inaccessible</name>
98965                                <value>1</value>
98966                            </enumeratedValue>
98967                        </enumeratedValues>
98968                    </field>
98969                    <field>
98970                        <name>KEY_R</name>
98971                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
98972                        <bitRange>[5:3]</bitRange>
98973                        <access>read-only</access>
98974                    </field>
98975                    <field>
98976                        <name>KEY_W</name>
98977                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
98978                        <bitRange>[2:0]</bitRange>
98979                        <access>read-only</access>
98980                    </field>
98981                </fields>
98982            </register>
98983            <register>
98984                <name>PAGE56_LOCK1</name>
98985                <addressOffset>0x00003fc4</addressOffset>
98986                <description>Lock configuration MSBs for page 56 (rows 0xe00 through 0xe3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
98987
98988                    This OTP location is always readable, and is write-protected by its own permissions.</description>
98989                <resetValue>0x00000000</resetValue>
98990                <fields>
98991                    <field>
98992                        <name>R2</name>
98993                        <description>Redundant copy of bits 7:0</description>
98994                        <bitRange>[23:16]</bitRange>
98995                        <access>read-only</access>
98996                    </field>
98997                    <field>
98998                        <name>R1</name>
98999                        <description>Redundant copy of bits 7:0</description>
99000                        <bitRange>[15:8]</bitRange>
99001                        <access>read-only</access>
99002                    </field>
99003                    <field>
99004                        <name>LOCK_BL</name>
99005                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99006                        <bitRange>[5:4]</bitRange>
99007                        <access>read-only</access>
99008                        <enumeratedValues>
99009                            <enumeratedValue>
99010                                <name>read_write</name>
99011                                <value>0</value>
99012                                <description>Bootloader permits user reads and writes to this page</description>
99013                            </enumeratedValue>
99014                            <enumeratedValue>
99015                                <name>read_only</name>
99016                                <value>1</value>
99017                                <description>Bootloader permits user reads of this page</description>
99018                            </enumeratedValue>
99019                            <enumeratedValue>
99020                                <name>reserved</name>
99021                                <value>2</value>
99022                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99023                            </enumeratedValue>
99024                            <enumeratedValue>
99025                                <name>inaccessible</name>
99026                                <value>3</value>
99027                                <description>Bootloader does not permit user access to this page</description>
99028                            </enumeratedValue>
99029                        </enumeratedValues>
99030                    </field>
99031                    <field>
99032                        <name>LOCK_NS</name>
99033                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99034
99035                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99036                        <bitRange>[3:2]</bitRange>
99037                        <access>read-only</access>
99038                        <enumeratedValues>
99039                            <enumeratedValue>
99040                                <name>read_write</name>
99041                                <value>0</value>
99042                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99043                            </enumeratedValue>
99044                            <enumeratedValue>
99045                                <name>read_only</name>
99046                                <value>1</value>
99047                                <description>Page can be read by Non-secure software</description>
99048                            </enumeratedValue>
99049                            <enumeratedValue>
99050                                <name>reserved</name>
99051                                <value>2</value>
99052                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99053                            </enumeratedValue>
99054                            <enumeratedValue>
99055                                <name>inaccessible</name>
99056                                <value>3</value>
99057                                <description>Page can not be accessed by Non-secure software.</description>
99058                            </enumeratedValue>
99059                        </enumeratedValues>
99060                    </field>
99061                    <field>
99062                        <name>LOCK_S</name>
99063                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99064                        <bitRange>[1:0]</bitRange>
99065                        <access>read-only</access>
99066                        <enumeratedValues>
99067                            <enumeratedValue>
99068                                <name>read_write</name>
99069                                <value>0</value>
99070                                <description>Page is fully accessible by Secure software.</description>
99071                            </enumeratedValue>
99072                            <enumeratedValue>
99073                                <name>read_only</name>
99074                                <value>1</value>
99075                                <description>Page can be read by Secure software, but can not be written.</description>
99076                            </enumeratedValue>
99077                            <enumeratedValue>
99078                                <name>reserved</name>
99079                                <value>2</value>
99080                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99081                            </enumeratedValue>
99082                            <enumeratedValue>
99083                                <name>inaccessible</name>
99084                                <value>3</value>
99085                                <description>Page can not be accessed by Secure software.</description>
99086                            </enumeratedValue>
99087                        </enumeratedValues>
99088                    </field>
99089                </fields>
99090            </register>
99091            <register>
99092                <name>PAGE57_LOCK0</name>
99093                <addressOffset>0x00003fc8</addressOffset>
99094                <description>Lock configuration LSBs for page 57 (rows 0xe40 through 0xe7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99095
99096                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99097                <resetValue>0x00000000</resetValue>
99098                <fields>
99099                    <field>
99100                        <name>R2</name>
99101                        <description>Redundant copy of bits 7:0</description>
99102                        <bitRange>[23:16]</bitRange>
99103                        <access>read-only</access>
99104                    </field>
99105                    <field>
99106                        <name>R1</name>
99107                        <description>Redundant copy of bits 7:0</description>
99108                        <bitRange>[15:8]</bitRange>
99109                        <access>read-only</access>
99110                    </field>
99111                    <field>
99112                        <name>NO_KEY_STATE</name>
99113                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99114                        <bitRange>[6:6]</bitRange>
99115                        <access>read-only</access>
99116                        <enumeratedValues>
99117                            <enumeratedValue>
99118                                <name>read_only</name>
99119                                <value>0</value>
99120                            </enumeratedValue>
99121                            <enumeratedValue>
99122                                <name>inaccessible</name>
99123                                <value>1</value>
99124                            </enumeratedValue>
99125                        </enumeratedValues>
99126                    </field>
99127                    <field>
99128                        <name>KEY_R</name>
99129                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99130                        <bitRange>[5:3]</bitRange>
99131                        <access>read-only</access>
99132                    </field>
99133                    <field>
99134                        <name>KEY_W</name>
99135                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99136                        <bitRange>[2:0]</bitRange>
99137                        <access>read-only</access>
99138                    </field>
99139                </fields>
99140            </register>
99141            <register>
99142                <name>PAGE57_LOCK1</name>
99143                <addressOffset>0x00003fcc</addressOffset>
99144                <description>Lock configuration MSBs for page 57 (rows 0xe40 through 0xe7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99145
99146                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99147                <resetValue>0x00000000</resetValue>
99148                <fields>
99149                    <field>
99150                        <name>R2</name>
99151                        <description>Redundant copy of bits 7:0</description>
99152                        <bitRange>[23:16]</bitRange>
99153                        <access>read-only</access>
99154                    </field>
99155                    <field>
99156                        <name>R1</name>
99157                        <description>Redundant copy of bits 7:0</description>
99158                        <bitRange>[15:8]</bitRange>
99159                        <access>read-only</access>
99160                    </field>
99161                    <field>
99162                        <name>LOCK_BL</name>
99163                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99164                        <bitRange>[5:4]</bitRange>
99165                        <access>read-only</access>
99166                        <enumeratedValues>
99167                            <enumeratedValue>
99168                                <name>read_write</name>
99169                                <value>0</value>
99170                                <description>Bootloader permits user reads and writes to this page</description>
99171                            </enumeratedValue>
99172                            <enumeratedValue>
99173                                <name>read_only</name>
99174                                <value>1</value>
99175                                <description>Bootloader permits user reads of this page</description>
99176                            </enumeratedValue>
99177                            <enumeratedValue>
99178                                <name>reserved</name>
99179                                <value>2</value>
99180                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99181                            </enumeratedValue>
99182                            <enumeratedValue>
99183                                <name>inaccessible</name>
99184                                <value>3</value>
99185                                <description>Bootloader does not permit user access to this page</description>
99186                            </enumeratedValue>
99187                        </enumeratedValues>
99188                    </field>
99189                    <field>
99190                        <name>LOCK_NS</name>
99191                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99192
99193                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99194                        <bitRange>[3:2]</bitRange>
99195                        <access>read-only</access>
99196                        <enumeratedValues>
99197                            <enumeratedValue>
99198                                <name>read_write</name>
99199                                <value>0</value>
99200                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99201                            </enumeratedValue>
99202                            <enumeratedValue>
99203                                <name>read_only</name>
99204                                <value>1</value>
99205                                <description>Page can be read by Non-secure software</description>
99206                            </enumeratedValue>
99207                            <enumeratedValue>
99208                                <name>reserved</name>
99209                                <value>2</value>
99210                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99211                            </enumeratedValue>
99212                            <enumeratedValue>
99213                                <name>inaccessible</name>
99214                                <value>3</value>
99215                                <description>Page can not be accessed by Non-secure software.</description>
99216                            </enumeratedValue>
99217                        </enumeratedValues>
99218                    </field>
99219                    <field>
99220                        <name>LOCK_S</name>
99221                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99222                        <bitRange>[1:0]</bitRange>
99223                        <access>read-only</access>
99224                        <enumeratedValues>
99225                            <enumeratedValue>
99226                                <name>read_write</name>
99227                                <value>0</value>
99228                                <description>Page is fully accessible by Secure software.</description>
99229                            </enumeratedValue>
99230                            <enumeratedValue>
99231                                <name>read_only</name>
99232                                <value>1</value>
99233                                <description>Page can be read by Secure software, but can not be written.</description>
99234                            </enumeratedValue>
99235                            <enumeratedValue>
99236                                <name>reserved</name>
99237                                <value>2</value>
99238                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99239                            </enumeratedValue>
99240                            <enumeratedValue>
99241                                <name>inaccessible</name>
99242                                <value>3</value>
99243                                <description>Page can not be accessed by Secure software.</description>
99244                            </enumeratedValue>
99245                        </enumeratedValues>
99246                    </field>
99247                </fields>
99248            </register>
99249            <register>
99250                <name>PAGE58_LOCK0</name>
99251                <addressOffset>0x00003fd0</addressOffset>
99252                <description>Lock configuration LSBs for page 58 (rows 0xe80 through 0xebf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99253
99254                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99255                <resetValue>0x00000000</resetValue>
99256                <fields>
99257                    <field>
99258                        <name>R2</name>
99259                        <description>Redundant copy of bits 7:0</description>
99260                        <bitRange>[23:16]</bitRange>
99261                        <access>read-only</access>
99262                    </field>
99263                    <field>
99264                        <name>R1</name>
99265                        <description>Redundant copy of bits 7:0</description>
99266                        <bitRange>[15:8]</bitRange>
99267                        <access>read-only</access>
99268                    </field>
99269                    <field>
99270                        <name>NO_KEY_STATE</name>
99271                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99272                        <bitRange>[6:6]</bitRange>
99273                        <access>read-only</access>
99274                        <enumeratedValues>
99275                            <enumeratedValue>
99276                                <name>read_only</name>
99277                                <value>0</value>
99278                            </enumeratedValue>
99279                            <enumeratedValue>
99280                                <name>inaccessible</name>
99281                                <value>1</value>
99282                            </enumeratedValue>
99283                        </enumeratedValues>
99284                    </field>
99285                    <field>
99286                        <name>KEY_R</name>
99287                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99288                        <bitRange>[5:3]</bitRange>
99289                        <access>read-only</access>
99290                    </field>
99291                    <field>
99292                        <name>KEY_W</name>
99293                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99294                        <bitRange>[2:0]</bitRange>
99295                        <access>read-only</access>
99296                    </field>
99297                </fields>
99298            </register>
99299            <register>
99300                <name>PAGE58_LOCK1</name>
99301                <addressOffset>0x00003fd4</addressOffset>
99302                <description>Lock configuration MSBs for page 58 (rows 0xe80 through 0xebf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99303
99304                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99305                <resetValue>0x00000000</resetValue>
99306                <fields>
99307                    <field>
99308                        <name>R2</name>
99309                        <description>Redundant copy of bits 7:0</description>
99310                        <bitRange>[23:16]</bitRange>
99311                        <access>read-only</access>
99312                    </field>
99313                    <field>
99314                        <name>R1</name>
99315                        <description>Redundant copy of bits 7:0</description>
99316                        <bitRange>[15:8]</bitRange>
99317                        <access>read-only</access>
99318                    </field>
99319                    <field>
99320                        <name>LOCK_BL</name>
99321                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99322                        <bitRange>[5:4]</bitRange>
99323                        <access>read-only</access>
99324                        <enumeratedValues>
99325                            <enumeratedValue>
99326                                <name>read_write</name>
99327                                <value>0</value>
99328                                <description>Bootloader permits user reads and writes to this page</description>
99329                            </enumeratedValue>
99330                            <enumeratedValue>
99331                                <name>read_only</name>
99332                                <value>1</value>
99333                                <description>Bootloader permits user reads of this page</description>
99334                            </enumeratedValue>
99335                            <enumeratedValue>
99336                                <name>reserved</name>
99337                                <value>2</value>
99338                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99339                            </enumeratedValue>
99340                            <enumeratedValue>
99341                                <name>inaccessible</name>
99342                                <value>3</value>
99343                                <description>Bootloader does not permit user access to this page</description>
99344                            </enumeratedValue>
99345                        </enumeratedValues>
99346                    </field>
99347                    <field>
99348                        <name>LOCK_NS</name>
99349                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99350
99351                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99352                        <bitRange>[3:2]</bitRange>
99353                        <access>read-only</access>
99354                        <enumeratedValues>
99355                            <enumeratedValue>
99356                                <name>read_write</name>
99357                                <value>0</value>
99358                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99359                            </enumeratedValue>
99360                            <enumeratedValue>
99361                                <name>read_only</name>
99362                                <value>1</value>
99363                                <description>Page can be read by Non-secure software</description>
99364                            </enumeratedValue>
99365                            <enumeratedValue>
99366                                <name>reserved</name>
99367                                <value>2</value>
99368                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99369                            </enumeratedValue>
99370                            <enumeratedValue>
99371                                <name>inaccessible</name>
99372                                <value>3</value>
99373                                <description>Page can not be accessed by Non-secure software.</description>
99374                            </enumeratedValue>
99375                        </enumeratedValues>
99376                    </field>
99377                    <field>
99378                        <name>LOCK_S</name>
99379                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99380                        <bitRange>[1:0]</bitRange>
99381                        <access>read-only</access>
99382                        <enumeratedValues>
99383                            <enumeratedValue>
99384                                <name>read_write</name>
99385                                <value>0</value>
99386                                <description>Page is fully accessible by Secure software.</description>
99387                            </enumeratedValue>
99388                            <enumeratedValue>
99389                                <name>read_only</name>
99390                                <value>1</value>
99391                                <description>Page can be read by Secure software, but can not be written.</description>
99392                            </enumeratedValue>
99393                            <enumeratedValue>
99394                                <name>reserved</name>
99395                                <value>2</value>
99396                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99397                            </enumeratedValue>
99398                            <enumeratedValue>
99399                                <name>inaccessible</name>
99400                                <value>3</value>
99401                                <description>Page can not be accessed by Secure software.</description>
99402                            </enumeratedValue>
99403                        </enumeratedValues>
99404                    </field>
99405                </fields>
99406            </register>
99407            <register>
99408                <name>PAGE59_LOCK0</name>
99409                <addressOffset>0x00003fd8</addressOffset>
99410                <description>Lock configuration LSBs for page 59 (rows 0xec0 through 0xeff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99411
99412                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99413                <resetValue>0x00000000</resetValue>
99414                <fields>
99415                    <field>
99416                        <name>R2</name>
99417                        <description>Redundant copy of bits 7:0</description>
99418                        <bitRange>[23:16]</bitRange>
99419                        <access>read-only</access>
99420                    </field>
99421                    <field>
99422                        <name>R1</name>
99423                        <description>Redundant copy of bits 7:0</description>
99424                        <bitRange>[15:8]</bitRange>
99425                        <access>read-only</access>
99426                    </field>
99427                    <field>
99428                        <name>NO_KEY_STATE</name>
99429                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99430                        <bitRange>[6:6]</bitRange>
99431                        <access>read-only</access>
99432                        <enumeratedValues>
99433                            <enumeratedValue>
99434                                <name>read_only</name>
99435                                <value>0</value>
99436                            </enumeratedValue>
99437                            <enumeratedValue>
99438                                <name>inaccessible</name>
99439                                <value>1</value>
99440                            </enumeratedValue>
99441                        </enumeratedValues>
99442                    </field>
99443                    <field>
99444                        <name>KEY_R</name>
99445                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99446                        <bitRange>[5:3]</bitRange>
99447                        <access>read-only</access>
99448                    </field>
99449                    <field>
99450                        <name>KEY_W</name>
99451                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99452                        <bitRange>[2:0]</bitRange>
99453                        <access>read-only</access>
99454                    </field>
99455                </fields>
99456            </register>
99457            <register>
99458                <name>PAGE59_LOCK1</name>
99459                <addressOffset>0x00003fdc</addressOffset>
99460                <description>Lock configuration MSBs for page 59 (rows 0xec0 through 0xeff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99461
99462                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99463                <resetValue>0x00000000</resetValue>
99464                <fields>
99465                    <field>
99466                        <name>R2</name>
99467                        <description>Redundant copy of bits 7:0</description>
99468                        <bitRange>[23:16]</bitRange>
99469                        <access>read-only</access>
99470                    </field>
99471                    <field>
99472                        <name>R1</name>
99473                        <description>Redundant copy of bits 7:0</description>
99474                        <bitRange>[15:8]</bitRange>
99475                        <access>read-only</access>
99476                    </field>
99477                    <field>
99478                        <name>LOCK_BL</name>
99479                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99480                        <bitRange>[5:4]</bitRange>
99481                        <access>read-only</access>
99482                        <enumeratedValues>
99483                            <enumeratedValue>
99484                                <name>read_write</name>
99485                                <value>0</value>
99486                                <description>Bootloader permits user reads and writes to this page</description>
99487                            </enumeratedValue>
99488                            <enumeratedValue>
99489                                <name>read_only</name>
99490                                <value>1</value>
99491                                <description>Bootloader permits user reads of this page</description>
99492                            </enumeratedValue>
99493                            <enumeratedValue>
99494                                <name>reserved</name>
99495                                <value>2</value>
99496                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99497                            </enumeratedValue>
99498                            <enumeratedValue>
99499                                <name>inaccessible</name>
99500                                <value>3</value>
99501                                <description>Bootloader does not permit user access to this page</description>
99502                            </enumeratedValue>
99503                        </enumeratedValues>
99504                    </field>
99505                    <field>
99506                        <name>LOCK_NS</name>
99507                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99508
99509                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99510                        <bitRange>[3:2]</bitRange>
99511                        <access>read-only</access>
99512                        <enumeratedValues>
99513                            <enumeratedValue>
99514                                <name>read_write</name>
99515                                <value>0</value>
99516                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99517                            </enumeratedValue>
99518                            <enumeratedValue>
99519                                <name>read_only</name>
99520                                <value>1</value>
99521                                <description>Page can be read by Non-secure software</description>
99522                            </enumeratedValue>
99523                            <enumeratedValue>
99524                                <name>reserved</name>
99525                                <value>2</value>
99526                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99527                            </enumeratedValue>
99528                            <enumeratedValue>
99529                                <name>inaccessible</name>
99530                                <value>3</value>
99531                                <description>Page can not be accessed by Non-secure software.</description>
99532                            </enumeratedValue>
99533                        </enumeratedValues>
99534                    </field>
99535                    <field>
99536                        <name>LOCK_S</name>
99537                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99538                        <bitRange>[1:0]</bitRange>
99539                        <access>read-only</access>
99540                        <enumeratedValues>
99541                            <enumeratedValue>
99542                                <name>read_write</name>
99543                                <value>0</value>
99544                                <description>Page is fully accessible by Secure software.</description>
99545                            </enumeratedValue>
99546                            <enumeratedValue>
99547                                <name>read_only</name>
99548                                <value>1</value>
99549                                <description>Page can be read by Secure software, but can not be written.</description>
99550                            </enumeratedValue>
99551                            <enumeratedValue>
99552                                <name>reserved</name>
99553                                <value>2</value>
99554                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99555                            </enumeratedValue>
99556                            <enumeratedValue>
99557                                <name>inaccessible</name>
99558                                <value>3</value>
99559                                <description>Page can not be accessed by Secure software.</description>
99560                            </enumeratedValue>
99561                        </enumeratedValues>
99562                    </field>
99563                </fields>
99564            </register>
99565            <register>
99566                <name>PAGE60_LOCK0</name>
99567                <addressOffset>0x00003fe0</addressOffset>
99568                <description>Lock configuration LSBs for page 60 (rows 0xf00 through 0xf3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99569
99570                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99571                <resetValue>0x00000000</resetValue>
99572                <fields>
99573                    <field>
99574                        <name>R2</name>
99575                        <description>Redundant copy of bits 7:0</description>
99576                        <bitRange>[23:16]</bitRange>
99577                        <access>read-only</access>
99578                    </field>
99579                    <field>
99580                        <name>R1</name>
99581                        <description>Redundant copy of bits 7:0</description>
99582                        <bitRange>[15:8]</bitRange>
99583                        <access>read-only</access>
99584                    </field>
99585                    <field>
99586                        <name>NO_KEY_STATE</name>
99587                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99588                        <bitRange>[6:6]</bitRange>
99589                        <access>read-only</access>
99590                        <enumeratedValues>
99591                            <enumeratedValue>
99592                                <name>read_only</name>
99593                                <value>0</value>
99594                            </enumeratedValue>
99595                            <enumeratedValue>
99596                                <name>inaccessible</name>
99597                                <value>1</value>
99598                            </enumeratedValue>
99599                        </enumeratedValues>
99600                    </field>
99601                    <field>
99602                        <name>KEY_R</name>
99603                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99604                        <bitRange>[5:3]</bitRange>
99605                        <access>read-only</access>
99606                    </field>
99607                    <field>
99608                        <name>KEY_W</name>
99609                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99610                        <bitRange>[2:0]</bitRange>
99611                        <access>read-only</access>
99612                    </field>
99613                </fields>
99614            </register>
99615            <register>
99616                <name>PAGE60_LOCK1</name>
99617                <addressOffset>0x00003fe4</addressOffset>
99618                <description>Lock configuration MSBs for page 60 (rows 0xf00 through 0xf3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99619
99620                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99621                <resetValue>0x00000000</resetValue>
99622                <fields>
99623                    <field>
99624                        <name>R2</name>
99625                        <description>Redundant copy of bits 7:0</description>
99626                        <bitRange>[23:16]</bitRange>
99627                        <access>read-only</access>
99628                    </field>
99629                    <field>
99630                        <name>R1</name>
99631                        <description>Redundant copy of bits 7:0</description>
99632                        <bitRange>[15:8]</bitRange>
99633                        <access>read-only</access>
99634                    </field>
99635                    <field>
99636                        <name>LOCK_BL</name>
99637                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99638                        <bitRange>[5:4]</bitRange>
99639                        <access>read-only</access>
99640                        <enumeratedValues>
99641                            <enumeratedValue>
99642                                <name>read_write</name>
99643                                <value>0</value>
99644                                <description>Bootloader permits user reads and writes to this page</description>
99645                            </enumeratedValue>
99646                            <enumeratedValue>
99647                                <name>read_only</name>
99648                                <value>1</value>
99649                                <description>Bootloader permits user reads of this page</description>
99650                            </enumeratedValue>
99651                            <enumeratedValue>
99652                                <name>reserved</name>
99653                                <value>2</value>
99654                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99655                            </enumeratedValue>
99656                            <enumeratedValue>
99657                                <name>inaccessible</name>
99658                                <value>3</value>
99659                                <description>Bootloader does not permit user access to this page</description>
99660                            </enumeratedValue>
99661                        </enumeratedValues>
99662                    </field>
99663                    <field>
99664                        <name>LOCK_NS</name>
99665                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99666
99667                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99668                        <bitRange>[3:2]</bitRange>
99669                        <access>read-only</access>
99670                        <enumeratedValues>
99671                            <enumeratedValue>
99672                                <name>read_write</name>
99673                                <value>0</value>
99674                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99675                            </enumeratedValue>
99676                            <enumeratedValue>
99677                                <name>read_only</name>
99678                                <value>1</value>
99679                                <description>Page can be read by Non-secure software</description>
99680                            </enumeratedValue>
99681                            <enumeratedValue>
99682                                <name>reserved</name>
99683                                <value>2</value>
99684                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99685                            </enumeratedValue>
99686                            <enumeratedValue>
99687                                <name>inaccessible</name>
99688                                <value>3</value>
99689                                <description>Page can not be accessed by Non-secure software.</description>
99690                            </enumeratedValue>
99691                        </enumeratedValues>
99692                    </field>
99693                    <field>
99694                        <name>LOCK_S</name>
99695                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99696                        <bitRange>[1:0]</bitRange>
99697                        <access>read-only</access>
99698                        <enumeratedValues>
99699                            <enumeratedValue>
99700                                <name>read_write</name>
99701                                <value>0</value>
99702                                <description>Page is fully accessible by Secure software.</description>
99703                            </enumeratedValue>
99704                            <enumeratedValue>
99705                                <name>read_only</name>
99706                                <value>1</value>
99707                                <description>Page can be read by Secure software, but can not be written.</description>
99708                            </enumeratedValue>
99709                            <enumeratedValue>
99710                                <name>reserved</name>
99711                                <value>2</value>
99712                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99713                            </enumeratedValue>
99714                            <enumeratedValue>
99715                                <name>inaccessible</name>
99716                                <value>3</value>
99717                                <description>Page can not be accessed by Secure software.</description>
99718                            </enumeratedValue>
99719                        </enumeratedValues>
99720                    </field>
99721                </fields>
99722            </register>
99723            <register>
99724                <name>PAGE61_LOCK0</name>
99725                <addressOffset>0x00003fe8</addressOffset>
99726                <description>Lock configuration LSBs for page 61 (rows 0xf40 through 0xf7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99727
99728                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99729                <resetValue>0x00000000</resetValue>
99730                <fields>
99731                    <field>
99732                        <name>R2</name>
99733                        <description>Redundant copy of bits 7:0</description>
99734                        <bitRange>[23:16]</bitRange>
99735                        <access>read-only</access>
99736                    </field>
99737                    <field>
99738                        <name>R1</name>
99739                        <description>Redundant copy of bits 7:0</description>
99740                        <bitRange>[15:8]</bitRange>
99741                        <access>read-only</access>
99742                    </field>
99743                    <field>
99744                        <name>NO_KEY_STATE</name>
99745                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99746                        <bitRange>[6:6]</bitRange>
99747                        <access>read-only</access>
99748                        <enumeratedValues>
99749                            <enumeratedValue>
99750                                <name>read_only</name>
99751                                <value>0</value>
99752                            </enumeratedValue>
99753                            <enumeratedValue>
99754                                <name>inaccessible</name>
99755                                <value>1</value>
99756                            </enumeratedValue>
99757                        </enumeratedValues>
99758                    </field>
99759                    <field>
99760                        <name>KEY_R</name>
99761                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99762                        <bitRange>[5:3]</bitRange>
99763                        <access>read-only</access>
99764                    </field>
99765                    <field>
99766                        <name>KEY_W</name>
99767                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99768                        <bitRange>[2:0]</bitRange>
99769                        <access>read-only</access>
99770                    </field>
99771                </fields>
99772            </register>
99773            <register>
99774                <name>PAGE61_LOCK1</name>
99775                <addressOffset>0x00003fec</addressOffset>
99776                <description>Lock configuration MSBs for page 61 (rows 0xf40 through 0xf7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99777
99778                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99779                <resetValue>0x00000000</resetValue>
99780                <fields>
99781                    <field>
99782                        <name>R2</name>
99783                        <description>Redundant copy of bits 7:0</description>
99784                        <bitRange>[23:16]</bitRange>
99785                        <access>read-only</access>
99786                    </field>
99787                    <field>
99788                        <name>R1</name>
99789                        <description>Redundant copy of bits 7:0</description>
99790                        <bitRange>[15:8]</bitRange>
99791                        <access>read-only</access>
99792                    </field>
99793                    <field>
99794                        <name>LOCK_BL</name>
99795                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99796                        <bitRange>[5:4]</bitRange>
99797                        <access>read-only</access>
99798                        <enumeratedValues>
99799                            <enumeratedValue>
99800                                <name>read_write</name>
99801                                <value>0</value>
99802                                <description>Bootloader permits user reads and writes to this page</description>
99803                            </enumeratedValue>
99804                            <enumeratedValue>
99805                                <name>read_only</name>
99806                                <value>1</value>
99807                                <description>Bootloader permits user reads of this page</description>
99808                            </enumeratedValue>
99809                            <enumeratedValue>
99810                                <name>reserved</name>
99811                                <value>2</value>
99812                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99813                            </enumeratedValue>
99814                            <enumeratedValue>
99815                                <name>inaccessible</name>
99816                                <value>3</value>
99817                                <description>Bootloader does not permit user access to this page</description>
99818                            </enumeratedValue>
99819                        </enumeratedValues>
99820                    </field>
99821                    <field>
99822                        <name>LOCK_NS</name>
99823                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99824
99825                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99826                        <bitRange>[3:2]</bitRange>
99827                        <access>read-only</access>
99828                        <enumeratedValues>
99829                            <enumeratedValue>
99830                                <name>read_write</name>
99831                                <value>0</value>
99832                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99833                            </enumeratedValue>
99834                            <enumeratedValue>
99835                                <name>read_only</name>
99836                                <value>1</value>
99837                                <description>Page can be read by Non-secure software</description>
99838                            </enumeratedValue>
99839                            <enumeratedValue>
99840                                <name>reserved</name>
99841                                <value>2</value>
99842                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99843                            </enumeratedValue>
99844                            <enumeratedValue>
99845                                <name>inaccessible</name>
99846                                <value>3</value>
99847                                <description>Page can not be accessed by Non-secure software.</description>
99848                            </enumeratedValue>
99849                        </enumeratedValues>
99850                    </field>
99851                    <field>
99852                        <name>LOCK_S</name>
99853                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
99854                        <bitRange>[1:0]</bitRange>
99855                        <access>read-only</access>
99856                        <enumeratedValues>
99857                            <enumeratedValue>
99858                                <name>read_write</name>
99859                                <value>0</value>
99860                                <description>Page is fully accessible by Secure software.</description>
99861                            </enumeratedValue>
99862                            <enumeratedValue>
99863                                <name>read_only</name>
99864                                <value>1</value>
99865                                <description>Page can be read by Secure software, but can not be written.</description>
99866                            </enumeratedValue>
99867                            <enumeratedValue>
99868                                <name>reserved</name>
99869                                <value>2</value>
99870                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
99871                            </enumeratedValue>
99872                            <enumeratedValue>
99873                                <name>inaccessible</name>
99874                                <value>3</value>
99875                                <description>Page can not be accessed by Secure software.</description>
99876                            </enumeratedValue>
99877                        </enumeratedValues>
99878                    </field>
99879                </fields>
99880            </register>
99881            <register>
99882                <name>PAGE62_LOCK0</name>
99883                <addressOffset>0x00003ff0</addressOffset>
99884                <description>Lock configuration LSBs for page 62 (rows 0xf80 through 0xfbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99885
99886                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99887                <resetValue>0x00000000</resetValue>
99888                <fields>
99889                    <field>
99890                        <name>R2</name>
99891                        <description>Redundant copy of bits 7:0</description>
99892                        <bitRange>[23:16]</bitRange>
99893                        <access>read-only</access>
99894                    </field>
99895                    <field>
99896                        <name>R1</name>
99897                        <description>Redundant copy of bits 7:0</description>
99898                        <bitRange>[15:8]</bitRange>
99899                        <access>read-only</access>
99900                    </field>
99901                    <field>
99902                        <name>NO_KEY_STATE</name>
99903                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
99904                        <bitRange>[6:6]</bitRange>
99905                        <access>read-only</access>
99906                        <enumeratedValues>
99907                            <enumeratedValue>
99908                                <name>read_only</name>
99909                                <value>0</value>
99910                            </enumeratedValue>
99911                            <enumeratedValue>
99912                                <name>inaccessible</name>
99913                                <value>1</value>
99914                            </enumeratedValue>
99915                        </enumeratedValues>
99916                    </field>
99917                    <field>
99918                        <name>KEY_R</name>
99919                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
99920                        <bitRange>[5:3]</bitRange>
99921                        <access>read-only</access>
99922                    </field>
99923                    <field>
99924                        <name>KEY_W</name>
99925                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
99926                        <bitRange>[2:0]</bitRange>
99927                        <access>read-only</access>
99928                    </field>
99929                </fields>
99930            </register>
99931            <register>
99932                <name>PAGE62_LOCK1</name>
99933                <addressOffset>0x00003ff4</addressOffset>
99934                <description>Lock configuration MSBs for page 62 (rows 0xf80 through 0xfbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
99935
99936                    This OTP location is always readable, and is write-protected by its own permissions.</description>
99937                <resetValue>0x00000000</resetValue>
99938                <fields>
99939                    <field>
99940                        <name>R2</name>
99941                        <description>Redundant copy of bits 7:0</description>
99942                        <bitRange>[23:16]</bitRange>
99943                        <access>read-only</access>
99944                    </field>
99945                    <field>
99946                        <name>R1</name>
99947                        <description>Redundant copy of bits 7:0</description>
99948                        <bitRange>[15:8]</bitRange>
99949                        <access>read-only</access>
99950                    </field>
99951                    <field>
99952                        <name>LOCK_BL</name>
99953                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
99954                        <bitRange>[5:4]</bitRange>
99955                        <access>read-only</access>
99956                        <enumeratedValues>
99957                            <enumeratedValue>
99958                                <name>read_write</name>
99959                                <value>0</value>
99960                                <description>Bootloader permits user reads and writes to this page</description>
99961                            </enumeratedValue>
99962                            <enumeratedValue>
99963                                <name>read_only</name>
99964                                <value>1</value>
99965                                <description>Bootloader permits user reads of this page</description>
99966                            </enumeratedValue>
99967                            <enumeratedValue>
99968                                <name>reserved</name>
99969                                <value>2</value>
99970                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
99971                            </enumeratedValue>
99972                            <enumeratedValue>
99973                                <name>inaccessible</name>
99974                                <value>3</value>
99975                                <description>Bootloader does not permit user access to this page</description>
99976                            </enumeratedValue>
99977                        </enumeratedValues>
99978                    </field>
99979                    <field>
99980                        <name>LOCK_NS</name>
99981                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
99982
99983                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
99984                        <bitRange>[3:2]</bitRange>
99985                        <access>read-only</access>
99986                        <enumeratedValues>
99987                            <enumeratedValue>
99988                                <name>read_write</name>
99989                                <value>0</value>
99990                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
99991                            </enumeratedValue>
99992                            <enumeratedValue>
99993                                <name>read_only</name>
99994                                <value>1</value>
99995                                <description>Page can be read by Non-secure software</description>
99996                            </enumeratedValue>
99997                            <enumeratedValue>
99998                                <name>reserved</name>
99999                                <value>2</value>
100000                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
100001                            </enumeratedValue>
100002                            <enumeratedValue>
100003                                <name>inaccessible</name>
100004                                <value>3</value>
100005                                <description>Page can not be accessed by Non-secure software.</description>
100006                            </enumeratedValue>
100007                        </enumeratedValues>
100008                    </field>
100009                    <field>
100010                        <name>LOCK_S</name>
100011                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
100012                        <bitRange>[1:0]</bitRange>
100013                        <access>read-only</access>
100014                        <enumeratedValues>
100015                            <enumeratedValue>
100016                                <name>read_write</name>
100017                                <value>0</value>
100018                                <description>Page is fully accessible by Secure software.</description>
100019                            </enumeratedValue>
100020                            <enumeratedValue>
100021                                <name>read_only</name>
100022                                <value>1</value>
100023                                <description>Page can be read by Secure software, but can not be written.</description>
100024                            </enumeratedValue>
100025                            <enumeratedValue>
100026                                <name>reserved</name>
100027                                <value>2</value>
100028                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
100029                            </enumeratedValue>
100030                            <enumeratedValue>
100031                                <name>inaccessible</name>
100032                                <value>3</value>
100033                                <description>Page can not be accessed by Secure software.</description>
100034                            </enumeratedValue>
100035                        </enumeratedValues>
100036                    </field>
100037                </fields>
100038            </register>
100039            <register>
100040                <name>PAGE63_LOCK0</name>
100041                <addressOffset>0x00003ff8</addressOffset>
100042                <description>Lock configuration LSBs for page 63 (rows 0xfc0 through 0xfff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
100043
100044                    This OTP location is always readable, and is write-protected by its own permissions.</description>
100045                <resetValue>0x00000000</resetValue>
100046                <fields>
100047                    <field>
100048                        <name>R2</name>
100049                        <description>Redundant copy of bits 7:0</description>
100050                        <bitRange>[23:16]</bitRange>
100051                        <access>read-only</access>
100052                    </field>
100053                    <field>
100054                        <name>R1</name>
100055                        <description>Redundant copy of bits 7:0</description>
100056                        <bitRange>[15:8]</bitRange>
100057                        <access>read-only</access>
100058                    </field>
100059                    <field>
100060                        <name>RMA</name>
100061                        <description>Decommission for RMA of a suspected faulty device. This re-enables the factory test JTAG interface, and makes pages 3 through 61 of the OTP permanently inaccessible.</description>
100062                        <bitRange>[7:7]</bitRange>
100063                        <access>read-only</access>
100064                    </field>
100065                    <field>
100066                        <name>NO_KEY_STATE</name>
100067                        <description>State when at least one key is registered for this page and no matching key has been entered.</description>
100068                        <bitRange>[6:6]</bitRange>
100069                        <access>read-only</access>
100070                        <enumeratedValues>
100071                            <enumeratedValue>
100072                                <name>read_only</name>
100073                                <value>0</value>
100074                            </enumeratedValue>
100075                            <enumeratedValue>
100076                                <name>inaccessible</name>
100077                                <value>1</value>
100078                            </enumeratedValue>
100079                        </enumeratedValues>
100080                    </field>
100081                    <field>
100082                        <name>KEY_R</name>
100083                        <description>Index 1-6 of a hardware key which must be entered to grant read access, or 0 if no such key is required.</description>
100084                        <bitRange>[5:3]</bitRange>
100085                        <access>read-only</access>
100086                    </field>
100087                    <field>
100088                        <name>KEY_W</name>
100089                        <description>Index 1-6 of a hardware key which must be entered to grant write access, or 0 if no such key is required.</description>
100090                        <bitRange>[2:0]</bitRange>
100091                        <access>read-only</access>
100092                    </field>
100093                </fields>
100094            </register>
100095            <register>
100096                <name>PAGE63_LOCK1</name>
100097                <addressOffset>0x00003ffc</addressOffset>
100098                <description>Lock configuration MSBs for page 63 (rows 0xfc0 through 0xfff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently.
100099
100100                    This OTP location is always readable, and is write-protected by its own permissions.</description>
100101                <resetValue>0x00000000</resetValue>
100102                <fields>
100103                    <field>
100104                        <name>R2</name>
100105                        <description>Redundant copy of bits 7:0</description>
100106                        <bitRange>[23:16]</bitRange>
100107                        <access>read-only</access>
100108                    </field>
100109                    <field>
100110                        <name>R1</name>
100111                        <description>Redundant copy of bits 7:0</description>
100112                        <bitRange>[15:8]</bitRange>
100113                        <access>read-only</access>
100114                    </field>
100115                    <field>
100116                        <name>LOCK_BL</name>
100117                        <description>Dummy lock bits reserved for bootloaders (including the RP2350 USB bootloader) to store their own OTP access permissions. No hardware effect, and no corresponding SW_LOCKx registers.</description>
100118                        <bitRange>[5:4]</bitRange>
100119                        <access>read-only</access>
100120                        <enumeratedValues>
100121                            <enumeratedValue>
100122                                <name>read_write</name>
100123                                <value>0</value>
100124                                <description>Bootloader permits user reads and writes to this page</description>
100125                            </enumeratedValue>
100126                            <enumeratedValue>
100127                                <name>read_only</name>
100128                                <value>1</value>
100129                                <description>Bootloader permits user reads of this page</description>
100130                            </enumeratedValue>
100131                            <enumeratedValue>
100132                                <name>reserved</name>
100133                                <value>2</value>
100134                                <description>Do not use. Behaves the same as INACCESSIBLE</description>
100135                            </enumeratedValue>
100136                            <enumeratedValue>
100137                                <name>inaccessible</name>
100138                                <value>3</value>
100139                                <description>Bootloader does not permit user access to this page</description>
100140                            </enumeratedValue>
100141                        </enumeratedValues>
100142                    </field>
100143                    <field>
100144                        <name>LOCK_NS</name>
100145                        <description>Lock state for Non-secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.
100146
100147                            Note that READ_WRITE and READ_ONLY are equivalent in hardware, as the SBPI programming interface is not accessible to Non-secure software. However, Secure software may check these bits to apply write permissions to a Non-secure OTP programming API.</description>
100148                        <bitRange>[3:2]</bitRange>
100149                        <access>read-only</access>
100150                        <enumeratedValues>
100151                            <enumeratedValue>
100152                                <name>read_write</name>
100153                                <value>0</value>
100154                                <description>Page can be read by Non-secure software, and Secure software may permit Non-secure writes.</description>
100155                            </enumeratedValue>
100156                            <enumeratedValue>
100157                                <name>read_only</name>
100158                                <value>1</value>
100159                                <description>Page can be read by Non-secure software</description>
100160                            </enumeratedValue>
100161                            <enumeratedValue>
100162                                <name>reserved</name>
100163                                <value>2</value>
100164                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
100165                            </enumeratedValue>
100166                            <enumeratedValue>
100167                                <name>inaccessible</name>
100168                                <value>3</value>
100169                                <description>Page can not be accessed by Non-secure software.</description>
100170                            </enumeratedValue>
100171                        </enumeratedValues>
100172                    </field>
100173                    <field>
100174                        <name>LOCK_S</name>
100175                        <description>Lock state for Secure accesses to this page. Thermometer-coded, so lock state can be advanced permanently from any state to any less-permissive state by programming OTP. Software can also advance the lock state temporarily (until next OTP reset) using the SW_LOCKx registers.</description>
100176                        <bitRange>[1:0]</bitRange>
100177                        <access>read-only</access>
100178                        <enumeratedValues>
100179                            <enumeratedValue>
100180                                <name>read_write</name>
100181                                <value>0</value>
100182                                <description>Page is fully accessible by Secure software.</description>
100183                            </enumeratedValue>
100184                            <enumeratedValue>
100185                                <name>read_only</name>
100186                                <value>1</value>
100187                                <description>Page can be read by Secure software, but can not be written.</description>
100188                            </enumeratedValue>
100189                            <enumeratedValue>
100190                                <name>reserved</name>
100191                                <value>2</value>
100192                                <description>Do not use. Behaves the same as INACCESSIBLE.</description>
100193                            </enumeratedValue>
100194                            <enumeratedValue>
100195                                <name>inaccessible</name>
100196                                <value>3</value>
100197                                <description>Page can not be accessed by Secure software.</description>
100198                            </enumeratedValue>
100199                        </enumeratedValues>
100200                    </field>
100201                </fields>
100202            </register>
100203        </registers>
100204    </peripheral>
100205    <peripheral>
100206        <name>TBMAN</name>
100207        <description>For managing simulation testbenches</description>
100208        <baseAddress>0x40160000</baseAddress>
100209        <addressBlock>
100210            <offset>0</offset>
100211            <size>4</size>
100212            <usage>registers</usage>
100213        </addressBlock>
100214        <registers>
100215            <register>
100216                <name>PLATFORM</name>
100217                <addressOffset>0x00000000</addressOffset>
100218                <description>Indicates the type of platform in use</description>
100219                <resetValue>0x00000001</resetValue>
100220                <fields>
100221                    <field>
100222                        <name>HDLSIM</name>
100223                        <description>Indicates the platform is a simulation</description>
100224                        <bitRange>[2:2]</bitRange>
100225                        <access>read-only</access>
100226                    </field>
100227                    <field>
100228                        <name>FPGA</name>
100229                        <description>Indicates the platform is an FPGA</description>
100230                        <bitRange>[1:1]</bitRange>
100231                        <access>read-only</access>
100232                    </field>
100233                    <field>
100234                        <name>ASIC</name>
100235                        <description>Indicates the platform is an ASIC</description>
100236                        <bitRange>[0:0]</bitRange>
100237                        <access>read-only</access>
100238                    </field>
100239                </fields>
100240            </register>
100241        </registers>
100242    </peripheral>
100243    <peripheral>
100244        <name>USB_DPRAM</name>
100245        <description>DPRAM layout for USB device.</description>
100246        <baseAddress>0x50100000</baseAddress>
100247        <addressBlock>
100248            <offset>0</offset>
100249            <size>256</size>
100250            <usage>registers</usage>
100251        </addressBlock>
100252        <registers>
100253            <register>
100254                <name>SETUP_PACKET_LOW</name>
100255                <addressOffset>0x00000000</addressOffset>
100256                <description>Bytes 0-3 of the SETUP packet from the host.</description>
100257                <resetValue>0x00000000</resetValue>
100258                <fields>
100259                    <field>
100260                        <name>WVALUE</name>
100261                        <bitRange>[31:16]</bitRange>
100262                        <access>read-write</access>
100263                    </field>
100264                    <field>
100265                        <name>BREQUEST</name>
100266                        <bitRange>[15:8]</bitRange>
100267                        <access>read-write</access>
100268                    </field>
100269                    <field>
100270                        <name>BMREQUESTTYPE</name>
100271                        <bitRange>[7:0]</bitRange>
100272                        <access>read-write</access>
100273                    </field>
100274                </fields>
100275            </register>
100276            <register>
100277                <name>SETUP_PACKET_HIGH</name>
100278                <addressOffset>0x00000004</addressOffset>
100279                <description>Bytes 4-7 of the setup packet from the host.</description>
100280                <resetValue>0x00000000</resetValue>
100281                <fields>
100282                    <field>
100283                        <name>WLENGTH</name>
100284                        <bitRange>[31:16]</bitRange>
100285                        <access>read-write</access>
100286                    </field>
100287                    <field>
100288                        <name>WINDEX</name>
100289                        <bitRange>[15:0]</bitRange>
100290                        <access>read-write</access>
100291                    </field>
100292                </fields>
100293            </register>
100294            <register>
100295                <name>EP1_IN_CONTROL</name>
100296                <addressOffset>0x00000008</addressOffset>
100297                <resetValue>0x00000000</resetValue>
100298                <fields>
100299                    <field>
100300                        <name>ENABLE</name>
100301                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100302                        <bitRange>[31:31]</bitRange>
100303                        <access>read-write</access>
100304                    </field>
100305                    <field>
100306                        <name>DOUBLE_BUFFERED</name>
100307                        <description>This endpoint is double buffered.</description>
100308                        <bitRange>[30:30]</bitRange>
100309                        <access>read-write</access>
100310                    </field>
100311                    <field>
100312                        <name>INTERRUPT_PER_BUFF</name>
100313                        <description>Trigger an interrupt each time a buffer is done.</description>
100314                        <bitRange>[29:29]</bitRange>
100315                        <access>read-write</access>
100316                    </field>
100317                    <field>
100318                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100319                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100320                        <bitRange>[28:28]</bitRange>
100321                        <access>read-write</access>
100322                    </field>
100323                    <field>
100324                        <name>ENDPOINT_TYPE</name>
100325                        <bitRange>[27:26]</bitRange>
100326                        <access>read-write</access>
100327                        <enumeratedValues>
100328                            <enumeratedValue>
100329                                <name>Control</name>
100330                                <value>0</value>
100331                            </enumeratedValue>
100332                            <enumeratedValue>
100333                                <name>Isochronous</name>
100334                                <value>1</value>
100335                            </enumeratedValue>
100336                            <enumeratedValue>
100337                                <name>Bulk</name>
100338                                <value>2</value>
100339                            </enumeratedValue>
100340                            <enumeratedValue>
100341                                <name>Interrupt</name>
100342                                <value>3</value>
100343                            </enumeratedValue>
100344                        </enumeratedValues>
100345                    </field>
100346                    <field>
100347                        <name>INTERRUPT_ON_STALL</name>
100348                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100349                        <bitRange>[17:17]</bitRange>
100350                        <access>read-write</access>
100351                    </field>
100352                    <field>
100353                        <name>INTERRUPT_ON_NAK</name>
100354                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100355                        <bitRange>[16:16]</bitRange>
100356                        <access>read-write</access>
100357                    </field>
100358                    <field>
100359                        <name>BUFFER_ADDRESS</name>
100360                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100361                        <bitRange>[15:0]</bitRange>
100362                        <access>read-write</access>
100363                    </field>
100364                </fields>
100365            </register>
100366            <register>
100367                <name>EP1_OUT_CONTROL</name>
100368                <addressOffset>0x0000000c</addressOffset>
100369                <resetValue>0x00000000</resetValue>
100370                <fields>
100371                    <field>
100372                        <name>ENABLE</name>
100373                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100374                        <bitRange>[31:31]</bitRange>
100375                        <access>read-write</access>
100376                    </field>
100377                    <field>
100378                        <name>DOUBLE_BUFFERED</name>
100379                        <description>This endpoint is double buffered.</description>
100380                        <bitRange>[30:30]</bitRange>
100381                        <access>read-write</access>
100382                    </field>
100383                    <field>
100384                        <name>INTERRUPT_PER_BUFF</name>
100385                        <description>Trigger an interrupt each time a buffer is done.</description>
100386                        <bitRange>[29:29]</bitRange>
100387                        <access>read-write</access>
100388                    </field>
100389                    <field>
100390                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100391                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100392                        <bitRange>[28:28]</bitRange>
100393                        <access>read-write</access>
100394                    </field>
100395                    <field>
100396                        <name>ENDPOINT_TYPE</name>
100397                        <bitRange>[27:26]</bitRange>
100398                        <access>read-write</access>
100399                        <enumeratedValues>
100400                            <enumeratedValue>
100401                                <name>Control</name>
100402                                <value>0</value>
100403                            </enumeratedValue>
100404                            <enumeratedValue>
100405                                <name>Isochronous</name>
100406                                <value>1</value>
100407                            </enumeratedValue>
100408                            <enumeratedValue>
100409                                <name>Bulk</name>
100410                                <value>2</value>
100411                            </enumeratedValue>
100412                            <enumeratedValue>
100413                                <name>Interrupt</name>
100414                                <value>3</value>
100415                            </enumeratedValue>
100416                        </enumeratedValues>
100417                    </field>
100418                    <field>
100419                        <name>INTERRUPT_ON_STALL</name>
100420                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100421                        <bitRange>[17:17]</bitRange>
100422                        <access>read-write</access>
100423                    </field>
100424                    <field>
100425                        <name>INTERRUPT_ON_NAK</name>
100426                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100427                        <bitRange>[16:16]</bitRange>
100428                        <access>read-write</access>
100429                    </field>
100430                    <field>
100431                        <name>BUFFER_ADDRESS</name>
100432                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100433                        <bitRange>[15:0]</bitRange>
100434                        <access>read-write</access>
100435                    </field>
100436                </fields>
100437            </register>
100438            <register>
100439                <name>EP2_IN_CONTROL</name>
100440                <addressOffset>0x00000010</addressOffset>
100441                <resetValue>0x00000000</resetValue>
100442                <fields>
100443                    <field>
100444                        <name>ENABLE</name>
100445                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100446                        <bitRange>[31:31]</bitRange>
100447                        <access>read-write</access>
100448                    </field>
100449                    <field>
100450                        <name>DOUBLE_BUFFERED</name>
100451                        <description>This endpoint is double buffered.</description>
100452                        <bitRange>[30:30]</bitRange>
100453                        <access>read-write</access>
100454                    </field>
100455                    <field>
100456                        <name>INTERRUPT_PER_BUFF</name>
100457                        <description>Trigger an interrupt each time a buffer is done.</description>
100458                        <bitRange>[29:29]</bitRange>
100459                        <access>read-write</access>
100460                    </field>
100461                    <field>
100462                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100463                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100464                        <bitRange>[28:28]</bitRange>
100465                        <access>read-write</access>
100466                    </field>
100467                    <field>
100468                        <name>ENDPOINT_TYPE</name>
100469                        <bitRange>[27:26]</bitRange>
100470                        <access>read-write</access>
100471                        <enumeratedValues>
100472                            <enumeratedValue>
100473                                <name>Control</name>
100474                                <value>0</value>
100475                            </enumeratedValue>
100476                            <enumeratedValue>
100477                                <name>Isochronous</name>
100478                                <value>1</value>
100479                            </enumeratedValue>
100480                            <enumeratedValue>
100481                                <name>Bulk</name>
100482                                <value>2</value>
100483                            </enumeratedValue>
100484                            <enumeratedValue>
100485                                <name>Interrupt</name>
100486                                <value>3</value>
100487                            </enumeratedValue>
100488                        </enumeratedValues>
100489                    </field>
100490                    <field>
100491                        <name>INTERRUPT_ON_STALL</name>
100492                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100493                        <bitRange>[17:17]</bitRange>
100494                        <access>read-write</access>
100495                    </field>
100496                    <field>
100497                        <name>INTERRUPT_ON_NAK</name>
100498                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100499                        <bitRange>[16:16]</bitRange>
100500                        <access>read-write</access>
100501                    </field>
100502                    <field>
100503                        <name>BUFFER_ADDRESS</name>
100504                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100505                        <bitRange>[15:0]</bitRange>
100506                        <access>read-write</access>
100507                    </field>
100508                </fields>
100509            </register>
100510            <register>
100511                <name>EP2_OUT_CONTROL</name>
100512                <addressOffset>0x00000014</addressOffset>
100513                <resetValue>0x00000000</resetValue>
100514                <fields>
100515                    <field>
100516                        <name>ENABLE</name>
100517                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100518                        <bitRange>[31:31]</bitRange>
100519                        <access>read-write</access>
100520                    </field>
100521                    <field>
100522                        <name>DOUBLE_BUFFERED</name>
100523                        <description>This endpoint is double buffered.</description>
100524                        <bitRange>[30:30]</bitRange>
100525                        <access>read-write</access>
100526                    </field>
100527                    <field>
100528                        <name>INTERRUPT_PER_BUFF</name>
100529                        <description>Trigger an interrupt each time a buffer is done.</description>
100530                        <bitRange>[29:29]</bitRange>
100531                        <access>read-write</access>
100532                    </field>
100533                    <field>
100534                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100535                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100536                        <bitRange>[28:28]</bitRange>
100537                        <access>read-write</access>
100538                    </field>
100539                    <field>
100540                        <name>ENDPOINT_TYPE</name>
100541                        <bitRange>[27:26]</bitRange>
100542                        <access>read-write</access>
100543                        <enumeratedValues>
100544                            <enumeratedValue>
100545                                <name>Control</name>
100546                                <value>0</value>
100547                            </enumeratedValue>
100548                            <enumeratedValue>
100549                                <name>Isochronous</name>
100550                                <value>1</value>
100551                            </enumeratedValue>
100552                            <enumeratedValue>
100553                                <name>Bulk</name>
100554                                <value>2</value>
100555                            </enumeratedValue>
100556                            <enumeratedValue>
100557                                <name>Interrupt</name>
100558                                <value>3</value>
100559                            </enumeratedValue>
100560                        </enumeratedValues>
100561                    </field>
100562                    <field>
100563                        <name>INTERRUPT_ON_STALL</name>
100564                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100565                        <bitRange>[17:17]</bitRange>
100566                        <access>read-write</access>
100567                    </field>
100568                    <field>
100569                        <name>INTERRUPT_ON_NAK</name>
100570                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100571                        <bitRange>[16:16]</bitRange>
100572                        <access>read-write</access>
100573                    </field>
100574                    <field>
100575                        <name>BUFFER_ADDRESS</name>
100576                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100577                        <bitRange>[15:0]</bitRange>
100578                        <access>read-write</access>
100579                    </field>
100580                </fields>
100581            </register>
100582            <register>
100583                <name>EP3_IN_CONTROL</name>
100584                <addressOffset>0x00000018</addressOffset>
100585                <resetValue>0x00000000</resetValue>
100586                <fields>
100587                    <field>
100588                        <name>ENABLE</name>
100589                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100590                        <bitRange>[31:31]</bitRange>
100591                        <access>read-write</access>
100592                    </field>
100593                    <field>
100594                        <name>DOUBLE_BUFFERED</name>
100595                        <description>This endpoint is double buffered.</description>
100596                        <bitRange>[30:30]</bitRange>
100597                        <access>read-write</access>
100598                    </field>
100599                    <field>
100600                        <name>INTERRUPT_PER_BUFF</name>
100601                        <description>Trigger an interrupt each time a buffer is done.</description>
100602                        <bitRange>[29:29]</bitRange>
100603                        <access>read-write</access>
100604                    </field>
100605                    <field>
100606                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100607                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100608                        <bitRange>[28:28]</bitRange>
100609                        <access>read-write</access>
100610                    </field>
100611                    <field>
100612                        <name>ENDPOINT_TYPE</name>
100613                        <bitRange>[27:26]</bitRange>
100614                        <access>read-write</access>
100615                        <enumeratedValues>
100616                            <enumeratedValue>
100617                                <name>Control</name>
100618                                <value>0</value>
100619                            </enumeratedValue>
100620                            <enumeratedValue>
100621                                <name>Isochronous</name>
100622                                <value>1</value>
100623                            </enumeratedValue>
100624                            <enumeratedValue>
100625                                <name>Bulk</name>
100626                                <value>2</value>
100627                            </enumeratedValue>
100628                            <enumeratedValue>
100629                                <name>Interrupt</name>
100630                                <value>3</value>
100631                            </enumeratedValue>
100632                        </enumeratedValues>
100633                    </field>
100634                    <field>
100635                        <name>INTERRUPT_ON_STALL</name>
100636                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100637                        <bitRange>[17:17]</bitRange>
100638                        <access>read-write</access>
100639                    </field>
100640                    <field>
100641                        <name>INTERRUPT_ON_NAK</name>
100642                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100643                        <bitRange>[16:16]</bitRange>
100644                        <access>read-write</access>
100645                    </field>
100646                    <field>
100647                        <name>BUFFER_ADDRESS</name>
100648                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100649                        <bitRange>[15:0]</bitRange>
100650                        <access>read-write</access>
100651                    </field>
100652                </fields>
100653            </register>
100654            <register>
100655                <name>EP3_OUT_CONTROL</name>
100656                <addressOffset>0x0000001c</addressOffset>
100657                <resetValue>0x00000000</resetValue>
100658                <fields>
100659                    <field>
100660                        <name>ENABLE</name>
100661                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100662                        <bitRange>[31:31]</bitRange>
100663                        <access>read-write</access>
100664                    </field>
100665                    <field>
100666                        <name>DOUBLE_BUFFERED</name>
100667                        <description>This endpoint is double buffered.</description>
100668                        <bitRange>[30:30]</bitRange>
100669                        <access>read-write</access>
100670                    </field>
100671                    <field>
100672                        <name>INTERRUPT_PER_BUFF</name>
100673                        <description>Trigger an interrupt each time a buffer is done.</description>
100674                        <bitRange>[29:29]</bitRange>
100675                        <access>read-write</access>
100676                    </field>
100677                    <field>
100678                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100679                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100680                        <bitRange>[28:28]</bitRange>
100681                        <access>read-write</access>
100682                    </field>
100683                    <field>
100684                        <name>ENDPOINT_TYPE</name>
100685                        <bitRange>[27:26]</bitRange>
100686                        <access>read-write</access>
100687                        <enumeratedValues>
100688                            <enumeratedValue>
100689                                <name>Control</name>
100690                                <value>0</value>
100691                            </enumeratedValue>
100692                            <enumeratedValue>
100693                                <name>Isochronous</name>
100694                                <value>1</value>
100695                            </enumeratedValue>
100696                            <enumeratedValue>
100697                                <name>Bulk</name>
100698                                <value>2</value>
100699                            </enumeratedValue>
100700                            <enumeratedValue>
100701                                <name>Interrupt</name>
100702                                <value>3</value>
100703                            </enumeratedValue>
100704                        </enumeratedValues>
100705                    </field>
100706                    <field>
100707                        <name>INTERRUPT_ON_STALL</name>
100708                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100709                        <bitRange>[17:17]</bitRange>
100710                        <access>read-write</access>
100711                    </field>
100712                    <field>
100713                        <name>INTERRUPT_ON_NAK</name>
100714                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100715                        <bitRange>[16:16]</bitRange>
100716                        <access>read-write</access>
100717                    </field>
100718                    <field>
100719                        <name>BUFFER_ADDRESS</name>
100720                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100721                        <bitRange>[15:0]</bitRange>
100722                        <access>read-write</access>
100723                    </field>
100724                </fields>
100725            </register>
100726            <register>
100727                <name>EP4_IN_CONTROL</name>
100728                <addressOffset>0x00000020</addressOffset>
100729                <resetValue>0x00000000</resetValue>
100730                <fields>
100731                    <field>
100732                        <name>ENABLE</name>
100733                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100734                        <bitRange>[31:31]</bitRange>
100735                        <access>read-write</access>
100736                    </field>
100737                    <field>
100738                        <name>DOUBLE_BUFFERED</name>
100739                        <description>This endpoint is double buffered.</description>
100740                        <bitRange>[30:30]</bitRange>
100741                        <access>read-write</access>
100742                    </field>
100743                    <field>
100744                        <name>INTERRUPT_PER_BUFF</name>
100745                        <description>Trigger an interrupt each time a buffer is done.</description>
100746                        <bitRange>[29:29]</bitRange>
100747                        <access>read-write</access>
100748                    </field>
100749                    <field>
100750                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100751                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100752                        <bitRange>[28:28]</bitRange>
100753                        <access>read-write</access>
100754                    </field>
100755                    <field>
100756                        <name>ENDPOINT_TYPE</name>
100757                        <bitRange>[27:26]</bitRange>
100758                        <access>read-write</access>
100759                        <enumeratedValues>
100760                            <enumeratedValue>
100761                                <name>Control</name>
100762                                <value>0</value>
100763                            </enumeratedValue>
100764                            <enumeratedValue>
100765                                <name>Isochronous</name>
100766                                <value>1</value>
100767                            </enumeratedValue>
100768                            <enumeratedValue>
100769                                <name>Bulk</name>
100770                                <value>2</value>
100771                            </enumeratedValue>
100772                            <enumeratedValue>
100773                                <name>Interrupt</name>
100774                                <value>3</value>
100775                            </enumeratedValue>
100776                        </enumeratedValues>
100777                    </field>
100778                    <field>
100779                        <name>INTERRUPT_ON_STALL</name>
100780                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100781                        <bitRange>[17:17]</bitRange>
100782                        <access>read-write</access>
100783                    </field>
100784                    <field>
100785                        <name>INTERRUPT_ON_NAK</name>
100786                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100787                        <bitRange>[16:16]</bitRange>
100788                        <access>read-write</access>
100789                    </field>
100790                    <field>
100791                        <name>BUFFER_ADDRESS</name>
100792                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100793                        <bitRange>[15:0]</bitRange>
100794                        <access>read-write</access>
100795                    </field>
100796                </fields>
100797            </register>
100798            <register>
100799                <name>EP4_OUT_CONTROL</name>
100800                <addressOffset>0x00000024</addressOffset>
100801                <resetValue>0x00000000</resetValue>
100802                <fields>
100803                    <field>
100804                        <name>ENABLE</name>
100805                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100806                        <bitRange>[31:31]</bitRange>
100807                        <access>read-write</access>
100808                    </field>
100809                    <field>
100810                        <name>DOUBLE_BUFFERED</name>
100811                        <description>This endpoint is double buffered.</description>
100812                        <bitRange>[30:30]</bitRange>
100813                        <access>read-write</access>
100814                    </field>
100815                    <field>
100816                        <name>INTERRUPT_PER_BUFF</name>
100817                        <description>Trigger an interrupt each time a buffer is done.</description>
100818                        <bitRange>[29:29]</bitRange>
100819                        <access>read-write</access>
100820                    </field>
100821                    <field>
100822                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100823                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100824                        <bitRange>[28:28]</bitRange>
100825                        <access>read-write</access>
100826                    </field>
100827                    <field>
100828                        <name>ENDPOINT_TYPE</name>
100829                        <bitRange>[27:26]</bitRange>
100830                        <access>read-write</access>
100831                        <enumeratedValues>
100832                            <enumeratedValue>
100833                                <name>Control</name>
100834                                <value>0</value>
100835                            </enumeratedValue>
100836                            <enumeratedValue>
100837                                <name>Isochronous</name>
100838                                <value>1</value>
100839                            </enumeratedValue>
100840                            <enumeratedValue>
100841                                <name>Bulk</name>
100842                                <value>2</value>
100843                            </enumeratedValue>
100844                            <enumeratedValue>
100845                                <name>Interrupt</name>
100846                                <value>3</value>
100847                            </enumeratedValue>
100848                        </enumeratedValues>
100849                    </field>
100850                    <field>
100851                        <name>INTERRUPT_ON_STALL</name>
100852                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100853                        <bitRange>[17:17]</bitRange>
100854                        <access>read-write</access>
100855                    </field>
100856                    <field>
100857                        <name>INTERRUPT_ON_NAK</name>
100858                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100859                        <bitRange>[16:16]</bitRange>
100860                        <access>read-write</access>
100861                    </field>
100862                    <field>
100863                        <name>BUFFER_ADDRESS</name>
100864                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100865                        <bitRange>[15:0]</bitRange>
100866                        <access>read-write</access>
100867                    </field>
100868                </fields>
100869            </register>
100870            <register>
100871                <name>EP5_IN_CONTROL</name>
100872                <addressOffset>0x00000028</addressOffset>
100873                <resetValue>0x00000000</resetValue>
100874                <fields>
100875                    <field>
100876                        <name>ENABLE</name>
100877                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100878                        <bitRange>[31:31]</bitRange>
100879                        <access>read-write</access>
100880                    </field>
100881                    <field>
100882                        <name>DOUBLE_BUFFERED</name>
100883                        <description>This endpoint is double buffered.</description>
100884                        <bitRange>[30:30]</bitRange>
100885                        <access>read-write</access>
100886                    </field>
100887                    <field>
100888                        <name>INTERRUPT_PER_BUFF</name>
100889                        <description>Trigger an interrupt each time a buffer is done.</description>
100890                        <bitRange>[29:29]</bitRange>
100891                        <access>read-write</access>
100892                    </field>
100893                    <field>
100894                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100895                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100896                        <bitRange>[28:28]</bitRange>
100897                        <access>read-write</access>
100898                    </field>
100899                    <field>
100900                        <name>ENDPOINT_TYPE</name>
100901                        <bitRange>[27:26]</bitRange>
100902                        <access>read-write</access>
100903                        <enumeratedValues>
100904                            <enumeratedValue>
100905                                <name>Control</name>
100906                                <value>0</value>
100907                            </enumeratedValue>
100908                            <enumeratedValue>
100909                                <name>Isochronous</name>
100910                                <value>1</value>
100911                            </enumeratedValue>
100912                            <enumeratedValue>
100913                                <name>Bulk</name>
100914                                <value>2</value>
100915                            </enumeratedValue>
100916                            <enumeratedValue>
100917                                <name>Interrupt</name>
100918                                <value>3</value>
100919                            </enumeratedValue>
100920                        </enumeratedValues>
100921                    </field>
100922                    <field>
100923                        <name>INTERRUPT_ON_STALL</name>
100924                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100925                        <bitRange>[17:17]</bitRange>
100926                        <access>read-write</access>
100927                    </field>
100928                    <field>
100929                        <name>INTERRUPT_ON_NAK</name>
100930                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
100931                        <bitRange>[16:16]</bitRange>
100932                        <access>read-write</access>
100933                    </field>
100934                    <field>
100935                        <name>BUFFER_ADDRESS</name>
100936                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
100937                        <bitRange>[15:0]</bitRange>
100938                        <access>read-write</access>
100939                    </field>
100940                </fields>
100941            </register>
100942            <register>
100943                <name>EP5_OUT_CONTROL</name>
100944                <addressOffset>0x0000002c</addressOffset>
100945                <resetValue>0x00000000</resetValue>
100946                <fields>
100947                    <field>
100948                        <name>ENABLE</name>
100949                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
100950                        <bitRange>[31:31]</bitRange>
100951                        <access>read-write</access>
100952                    </field>
100953                    <field>
100954                        <name>DOUBLE_BUFFERED</name>
100955                        <description>This endpoint is double buffered.</description>
100956                        <bitRange>[30:30]</bitRange>
100957                        <access>read-write</access>
100958                    </field>
100959                    <field>
100960                        <name>INTERRUPT_PER_BUFF</name>
100961                        <description>Trigger an interrupt each time a buffer is done.</description>
100962                        <bitRange>[29:29]</bitRange>
100963                        <access>read-write</access>
100964                    </field>
100965                    <field>
100966                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
100967                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
100968                        <bitRange>[28:28]</bitRange>
100969                        <access>read-write</access>
100970                    </field>
100971                    <field>
100972                        <name>ENDPOINT_TYPE</name>
100973                        <bitRange>[27:26]</bitRange>
100974                        <access>read-write</access>
100975                        <enumeratedValues>
100976                            <enumeratedValue>
100977                                <name>Control</name>
100978                                <value>0</value>
100979                            </enumeratedValue>
100980                            <enumeratedValue>
100981                                <name>Isochronous</name>
100982                                <value>1</value>
100983                            </enumeratedValue>
100984                            <enumeratedValue>
100985                                <name>Bulk</name>
100986                                <value>2</value>
100987                            </enumeratedValue>
100988                            <enumeratedValue>
100989                                <name>Interrupt</name>
100990                                <value>3</value>
100991                            </enumeratedValue>
100992                        </enumeratedValues>
100993                    </field>
100994                    <field>
100995                        <name>INTERRUPT_ON_STALL</name>
100996                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
100997                        <bitRange>[17:17]</bitRange>
100998                        <access>read-write</access>
100999                    </field>
101000                    <field>
101001                        <name>INTERRUPT_ON_NAK</name>
101002                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101003                        <bitRange>[16:16]</bitRange>
101004                        <access>read-write</access>
101005                    </field>
101006                    <field>
101007                        <name>BUFFER_ADDRESS</name>
101008                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101009                        <bitRange>[15:0]</bitRange>
101010                        <access>read-write</access>
101011                    </field>
101012                </fields>
101013            </register>
101014            <register>
101015                <name>EP6_IN_CONTROL</name>
101016                <addressOffset>0x00000030</addressOffset>
101017                <resetValue>0x00000000</resetValue>
101018                <fields>
101019                    <field>
101020                        <name>ENABLE</name>
101021                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101022                        <bitRange>[31:31]</bitRange>
101023                        <access>read-write</access>
101024                    </field>
101025                    <field>
101026                        <name>DOUBLE_BUFFERED</name>
101027                        <description>This endpoint is double buffered.</description>
101028                        <bitRange>[30:30]</bitRange>
101029                        <access>read-write</access>
101030                    </field>
101031                    <field>
101032                        <name>INTERRUPT_PER_BUFF</name>
101033                        <description>Trigger an interrupt each time a buffer is done.</description>
101034                        <bitRange>[29:29]</bitRange>
101035                        <access>read-write</access>
101036                    </field>
101037                    <field>
101038                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101039                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101040                        <bitRange>[28:28]</bitRange>
101041                        <access>read-write</access>
101042                    </field>
101043                    <field>
101044                        <name>ENDPOINT_TYPE</name>
101045                        <bitRange>[27:26]</bitRange>
101046                        <access>read-write</access>
101047                        <enumeratedValues>
101048                            <enumeratedValue>
101049                                <name>Control</name>
101050                                <value>0</value>
101051                            </enumeratedValue>
101052                            <enumeratedValue>
101053                                <name>Isochronous</name>
101054                                <value>1</value>
101055                            </enumeratedValue>
101056                            <enumeratedValue>
101057                                <name>Bulk</name>
101058                                <value>2</value>
101059                            </enumeratedValue>
101060                            <enumeratedValue>
101061                                <name>Interrupt</name>
101062                                <value>3</value>
101063                            </enumeratedValue>
101064                        </enumeratedValues>
101065                    </field>
101066                    <field>
101067                        <name>INTERRUPT_ON_STALL</name>
101068                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101069                        <bitRange>[17:17]</bitRange>
101070                        <access>read-write</access>
101071                    </field>
101072                    <field>
101073                        <name>INTERRUPT_ON_NAK</name>
101074                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101075                        <bitRange>[16:16]</bitRange>
101076                        <access>read-write</access>
101077                    </field>
101078                    <field>
101079                        <name>BUFFER_ADDRESS</name>
101080                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101081                        <bitRange>[15:0]</bitRange>
101082                        <access>read-write</access>
101083                    </field>
101084                </fields>
101085            </register>
101086            <register>
101087                <name>EP6_OUT_CONTROL</name>
101088                <addressOffset>0x00000034</addressOffset>
101089                <resetValue>0x00000000</resetValue>
101090                <fields>
101091                    <field>
101092                        <name>ENABLE</name>
101093                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101094                        <bitRange>[31:31]</bitRange>
101095                        <access>read-write</access>
101096                    </field>
101097                    <field>
101098                        <name>DOUBLE_BUFFERED</name>
101099                        <description>This endpoint is double buffered.</description>
101100                        <bitRange>[30:30]</bitRange>
101101                        <access>read-write</access>
101102                    </field>
101103                    <field>
101104                        <name>INTERRUPT_PER_BUFF</name>
101105                        <description>Trigger an interrupt each time a buffer is done.</description>
101106                        <bitRange>[29:29]</bitRange>
101107                        <access>read-write</access>
101108                    </field>
101109                    <field>
101110                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101111                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101112                        <bitRange>[28:28]</bitRange>
101113                        <access>read-write</access>
101114                    </field>
101115                    <field>
101116                        <name>ENDPOINT_TYPE</name>
101117                        <bitRange>[27:26]</bitRange>
101118                        <access>read-write</access>
101119                        <enumeratedValues>
101120                            <enumeratedValue>
101121                                <name>Control</name>
101122                                <value>0</value>
101123                            </enumeratedValue>
101124                            <enumeratedValue>
101125                                <name>Isochronous</name>
101126                                <value>1</value>
101127                            </enumeratedValue>
101128                            <enumeratedValue>
101129                                <name>Bulk</name>
101130                                <value>2</value>
101131                            </enumeratedValue>
101132                            <enumeratedValue>
101133                                <name>Interrupt</name>
101134                                <value>3</value>
101135                            </enumeratedValue>
101136                        </enumeratedValues>
101137                    </field>
101138                    <field>
101139                        <name>INTERRUPT_ON_STALL</name>
101140                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101141                        <bitRange>[17:17]</bitRange>
101142                        <access>read-write</access>
101143                    </field>
101144                    <field>
101145                        <name>INTERRUPT_ON_NAK</name>
101146                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101147                        <bitRange>[16:16]</bitRange>
101148                        <access>read-write</access>
101149                    </field>
101150                    <field>
101151                        <name>BUFFER_ADDRESS</name>
101152                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101153                        <bitRange>[15:0]</bitRange>
101154                        <access>read-write</access>
101155                    </field>
101156                </fields>
101157            </register>
101158            <register>
101159                <name>EP7_IN_CONTROL</name>
101160                <addressOffset>0x00000038</addressOffset>
101161                <resetValue>0x00000000</resetValue>
101162                <fields>
101163                    <field>
101164                        <name>ENABLE</name>
101165                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101166                        <bitRange>[31:31]</bitRange>
101167                        <access>read-write</access>
101168                    </field>
101169                    <field>
101170                        <name>DOUBLE_BUFFERED</name>
101171                        <description>This endpoint is double buffered.</description>
101172                        <bitRange>[30:30]</bitRange>
101173                        <access>read-write</access>
101174                    </field>
101175                    <field>
101176                        <name>INTERRUPT_PER_BUFF</name>
101177                        <description>Trigger an interrupt each time a buffer is done.</description>
101178                        <bitRange>[29:29]</bitRange>
101179                        <access>read-write</access>
101180                    </field>
101181                    <field>
101182                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101183                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101184                        <bitRange>[28:28]</bitRange>
101185                        <access>read-write</access>
101186                    </field>
101187                    <field>
101188                        <name>ENDPOINT_TYPE</name>
101189                        <bitRange>[27:26]</bitRange>
101190                        <access>read-write</access>
101191                        <enumeratedValues>
101192                            <enumeratedValue>
101193                                <name>Control</name>
101194                                <value>0</value>
101195                            </enumeratedValue>
101196                            <enumeratedValue>
101197                                <name>Isochronous</name>
101198                                <value>1</value>
101199                            </enumeratedValue>
101200                            <enumeratedValue>
101201                                <name>Bulk</name>
101202                                <value>2</value>
101203                            </enumeratedValue>
101204                            <enumeratedValue>
101205                                <name>Interrupt</name>
101206                                <value>3</value>
101207                            </enumeratedValue>
101208                        </enumeratedValues>
101209                    </field>
101210                    <field>
101211                        <name>INTERRUPT_ON_STALL</name>
101212                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101213                        <bitRange>[17:17]</bitRange>
101214                        <access>read-write</access>
101215                    </field>
101216                    <field>
101217                        <name>INTERRUPT_ON_NAK</name>
101218                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101219                        <bitRange>[16:16]</bitRange>
101220                        <access>read-write</access>
101221                    </field>
101222                    <field>
101223                        <name>BUFFER_ADDRESS</name>
101224                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101225                        <bitRange>[15:0]</bitRange>
101226                        <access>read-write</access>
101227                    </field>
101228                </fields>
101229            </register>
101230            <register>
101231                <name>EP7_OUT_CONTROL</name>
101232                <addressOffset>0x0000003c</addressOffset>
101233                <resetValue>0x00000000</resetValue>
101234                <fields>
101235                    <field>
101236                        <name>ENABLE</name>
101237                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101238                        <bitRange>[31:31]</bitRange>
101239                        <access>read-write</access>
101240                    </field>
101241                    <field>
101242                        <name>DOUBLE_BUFFERED</name>
101243                        <description>This endpoint is double buffered.</description>
101244                        <bitRange>[30:30]</bitRange>
101245                        <access>read-write</access>
101246                    </field>
101247                    <field>
101248                        <name>INTERRUPT_PER_BUFF</name>
101249                        <description>Trigger an interrupt each time a buffer is done.</description>
101250                        <bitRange>[29:29]</bitRange>
101251                        <access>read-write</access>
101252                    </field>
101253                    <field>
101254                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101255                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101256                        <bitRange>[28:28]</bitRange>
101257                        <access>read-write</access>
101258                    </field>
101259                    <field>
101260                        <name>ENDPOINT_TYPE</name>
101261                        <bitRange>[27:26]</bitRange>
101262                        <access>read-write</access>
101263                        <enumeratedValues>
101264                            <enumeratedValue>
101265                                <name>Control</name>
101266                                <value>0</value>
101267                            </enumeratedValue>
101268                            <enumeratedValue>
101269                                <name>Isochronous</name>
101270                                <value>1</value>
101271                            </enumeratedValue>
101272                            <enumeratedValue>
101273                                <name>Bulk</name>
101274                                <value>2</value>
101275                            </enumeratedValue>
101276                            <enumeratedValue>
101277                                <name>Interrupt</name>
101278                                <value>3</value>
101279                            </enumeratedValue>
101280                        </enumeratedValues>
101281                    </field>
101282                    <field>
101283                        <name>INTERRUPT_ON_STALL</name>
101284                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101285                        <bitRange>[17:17]</bitRange>
101286                        <access>read-write</access>
101287                    </field>
101288                    <field>
101289                        <name>INTERRUPT_ON_NAK</name>
101290                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101291                        <bitRange>[16:16]</bitRange>
101292                        <access>read-write</access>
101293                    </field>
101294                    <field>
101295                        <name>BUFFER_ADDRESS</name>
101296                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101297                        <bitRange>[15:0]</bitRange>
101298                        <access>read-write</access>
101299                    </field>
101300                </fields>
101301            </register>
101302            <register>
101303                <name>EP8_IN_CONTROL</name>
101304                <addressOffset>0x00000040</addressOffset>
101305                <resetValue>0x00000000</resetValue>
101306                <fields>
101307                    <field>
101308                        <name>ENABLE</name>
101309                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101310                        <bitRange>[31:31]</bitRange>
101311                        <access>read-write</access>
101312                    </field>
101313                    <field>
101314                        <name>DOUBLE_BUFFERED</name>
101315                        <description>This endpoint is double buffered.</description>
101316                        <bitRange>[30:30]</bitRange>
101317                        <access>read-write</access>
101318                    </field>
101319                    <field>
101320                        <name>INTERRUPT_PER_BUFF</name>
101321                        <description>Trigger an interrupt each time a buffer is done.</description>
101322                        <bitRange>[29:29]</bitRange>
101323                        <access>read-write</access>
101324                    </field>
101325                    <field>
101326                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101327                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101328                        <bitRange>[28:28]</bitRange>
101329                        <access>read-write</access>
101330                    </field>
101331                    <field>
101332                        <name>ENDPOINT_TYPE</name>
101333                        <bitRange>[27:26]</bitRange>
101334                        <access>read-write</access>
101335                        <enumeratedValues>
101336                            <enumeratedValue>
101337                                <name>Control</name>
101338                                <value>0</value>
101339                            </enumeratedValue>
101340                            <enumeratedValue>
101341                                <name>Isochronous</name>
101342                                <value>1</value>
101343                            </enumeratedValue>
101344                            <enumeratedValue>
101345                                <name>Bulk</name>
101346                                <value>2</value>
101347                            </enumeratedValue>
101348                            <enumeratedValue>
101349                                <name>Interrupt</name>
101350                                <value>3</value>
101351                            </enumeratedValue>
101352                        </enumeratedValues>
101353                    </field>
101354                    <field>
101355                        <name>INTERRUPT_ON_STALL</name>
101356                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101357                        <bitRange>[17:17]</bitRange>
101358                        <access>read-write</access>
101359                    </field>
101360                    <field>
101361                        <name>INTERRUPT_ON_NAK</name>
101362                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101363                        <bitRange>[16:16]</bitRange>
101364                        <access>read-write</access>
101365                    </field>
101366                    <field>
101367                        <name>BUFFER_ADDRESS</name>
101368                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101369                        <bitRange>[15:0]</bitRange>
101370                        <access>read-write</access>
101371                    </field>
101372                </fields>
101373            </register>
101374            <register>
101375                <name>EP8_OUT_CONTROL</name>
101376                <addressOffset>0x00000044</addressOffset>
101377                <resetValue>0x00000000</resetValue>
101378                <fields>
101379                    <field>
101380                        <name>ENABLE</name>
101381                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101382                        <bitRange>[31:31]</bitRange>
101383                        <access>read-write</access>
101384                    </field>
101385                    <field>
101386                        <name>DOUBLE_BUFFERED</name>
101387                        <description>This endpoint is double buffered.</description>
101388                        <bitRange>[30:30]</bitRange>
101389                        <access>read-write</access>
101390                    </field>
101391                    <field>
101392                        <name>INTERRUPT_PER_BUFF</name>
101393                        <description>Trigger an interrupt each time a buffer is done.</description>
101394                        <bitRange>[29:29]</bitRange>
101395                        <access>read-write</access>
101396                    </field>
101397                    <field>
101398                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101399                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101400                        <bitRange>[28:28]</bitRange>
101401                        <access>read-write</access>
101402                    </field>
101403                    <field>
101404                        <name>ENDPOINT_TYPE</name>
101405                        <bitRange>[27:26]</bitRange>
101406                        <access>read-write</access>
101407                        <enumeratedValues>
101408                            <enumeratedValue>
101409                                <name>Control</name>
101410                                <value>0</value>
101411                            </enumeratedValue>
101412                            <enumeratedValue>
101413                                <name>Isochronous</name>
101414                                <value>1</value>
101415                            </enumeratedValue>
101416                            <enumeratedValue>
101417                                <name>Bulk</name>
101418                                <value>2</value>
101419                            </enumeratedValue>
101420                            <enumeratedValue>
101421                                <name>Interrupt</name>
101422                                <value>3</value>
101423                            </enumeratedValue>
101424                        </enumeratedValues>
101425                    </field>
101426                    <field>
101427                        <name>INTERRUPT_ON_STALL</name>
101428                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101429                        <bitRange>[17:17]</bitRange>
101430                        <access>read-write</access>
101431                    </field>
101432                    <field>
101433                        <name>INTERRUPT_ON_NAK</name>
101434                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101435                        <bitRange>[16:16]</bitRange>
101436                        <access>read-write</access>
101437                    </field>
101438                    <field>
101439                        <name>BUFFER_ADDRESS</name>
101440                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101441                        <bitRange>[15:0]</bitRange>
101442                        <access>read-write</access>
101443                    </field>
101444                </fields>
101445            </register>
101446            <register>
101447                <name>EP9_IN_CONTROL</name>
101448                <addressOffset>0x00000048</addressOffset>
101449                <resetValue>0x00000000</resetValue>
101450                <fields>
101451                    <field>
101452                        <name>ENABLE</name>
101453                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101454                        <bitRange>[31:31]</bitRange>
101455                        <access>read-write</access>
101456                    </field>
101457                    <field>
101458                        <name>DOUBLE_BUFFERED</name>
101459                        <description>This endpoint is double buffered.</description>
101460                        <bitRange>[30:30]</bitRange>
101461                        <access>read-write</access>
101462                    </field>
101463                    <field>
101464                        <name>INTERRUPT_PER_BUFF</name>
101465                        <description>Trigger an interrupt each time a buffer is done.</description>
101466                        <bitRange>[29:29]</bitRange>
101467                        <access>read-write</access>
101468                    </field>
101469                    <field>
101470                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101471                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101472                        <bitRange>[28:28]</bitRange>
101473                        <access>read-write</access>
101474                    </field>
101475                    <field>
101476                        <name>ENDPOINT_TYPE</name>
101477                        <bitRange>[27:26]</bitRange>
101478                        <access>read-write</access>
101479                        <enumeratedValues>
101480                            <enumeratedValue>
101481                                <name>Control</name>
101482                                <value>0</value>
101483                            </enumeratedValue>
101484                            <enumeratedValue>
101485                                <name>Isochronous</name>
101486                                <value>1</value>
101487                            </enumeratedValue>
101488                            <enumeratedValue>
101489                                <name>Bulk</name>
101490                                <value>2</value>
101491                            </enumeratedValue>
101492                            <enumeratedValue>
101493                                <name>Interrupt</name>
101494                                <value>3</value>
101495                            </enumeratedValue>
101496                        </enumeratedValues>
101497                    </field>
101498                    <field>
101499                        <name>INTERRUPT_ON_STALL</name>
101500                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101501                        <bitRange>[17:17]</bitRange>
101502                        <access>read-write</access>
101503                    </field>
101504                    <field>
101505                        <name>INTERRUPT_ON_NAK</name>
101506                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101507                        <bitRange>[16:16]</bitRange>
101508                        <access>read-write</access>
101509                    </field>
101510                    <field>
101511                        <name>BUFFER_ADDRESS</name>
101512                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101513                        <bitRange>[15:0]</bitRange>
101514                        <access>read-write</access>
101515                    </field>
101516                </fields>
101517            </register>
101518            <register>
101519                <name>EP9_OUT_CONTROL</name>
101520                <addressOffset>0x0000004c</addressOffset>
101521                <resetValue>0x00000000</resetValue>
101522                <fields>
101523                    <field>
101524                        <name>ENABLE</name>
101525                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101526                        <bitRange>[31:31]</bitRange>
101527                        <access>read-write</access>
101528                    </field>
101529                    <field>
101530                        <name>DOUBLE_BUFFERED</name>
101531                        <description>This endpoint is double buffered.</description>
101532                        <bitRange>[30:30]</bitRange>
101533                        <access>read-write</access>
101534                    </field>
101535                    <field>
101536                        <name>INTERRUPT_PER_BUFF</name>
101537                        <description>Trigger an interrupt each time a buffer is done.</description>
101538                        <bitRange>[29:29]</bitRange>
101539                        <access>read-write</access>
101540                    </field>
101541                    <field>
101542                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101543                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101544                        <bitRange>[28:28]</bitRange>
101545                        <access>read-write</access>
101546                    </field>
101547                    <field>
101548                        <name>ENDPOINT_TYPE</name>
101549                        <bitRange>[27:26]</bitRange>
101550                        <access>read-write</access>
101551                        <enumeratedValues>
101552                            <enumeratedValue>
101553                                <name>Control</name>
101554                                <value>0</value>
101555                            </enumeratedValue>
101556                            <enumeratedValue>
101557                                <name>Isochronous</name>
101558                                <value>1</value>
101559                            </enumeratedValue>
101560                            <enumeratedValue>
101561                                <name>Bulk</name>
101562                                <value>2</value>
101563                            </enumeratedValue>
101564                            <enumeratedValue>
101565                                <name>Interrupt</name>
101566                                <value>3</value>
101567                            </enumeratedValue>
101568                        </enumeratedValues>
101569                    </field>
101570                    <field>
101571                        <name>INTERRUPT_ON_STALL</name>
101572                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101573                        <bitRange>[17:17]</bitRange>
101574                        <access>read-write</access>
101575                    </field>
101576                    <field>
101577                        <name>INTERRUPT_ON_NAK</name>
101578                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101579                        <bitRange>[16:16]</bitRange>
101580                        <access>read-write</access>
101581                    </field>
101582                    <field>
101583                        <name>BUFFER_ADDRESS</name>
101584                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101585                        <bitRange>[15:0]</bitRange>
101586                        <access>read-write</access>
101587                    </field>
101588                </fields>
101589            </register>
101590            <register>
101591                <name>EP10_IN_CONTROL</name>
101592                <addressOffset>0x00000050</addressOffset>
101593                <resetValue>0x00000000</resetValue>
101594                <fields>
101595                    <field>
101596                        <name>ENABLE</name>
101597                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101598                        <bitRange>[31:31]</bitRange>
101599                        <access>read-write</access>
101600                    </field>
101601                    <field>
101602                        <name>DOUBLE_BUFFERED</name>
101603                        <description>This endpoint is double buffered.</description>
101604                        <bitRange>[30:30]</bitRange>
101605                        <access>read-write</access>
101606                    </field>
101607                    <field>
101608                        <name>INTERRUPT_PER_BUFF</name>
101609                        <description>Trigger an interrupt each time a buffer is done.</description>
101610                        <bitRange>[29:29]</bitRange>
101611                        <access>read-write</access>
101612                    </field>
101613                    <field>
101614                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101615                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101616                        <bitRange>[28:28]</bitRange>
101617                        <access>read-write</access>
101618                    </field>
101619                    <field>
101620                        <name>ENDPOINT_TYPE</name>
101621                        <bitRange>[27:26]</bitRange>
101622                        <access>read-write</access>
101623                        <enumeratedValues>
101624                            <enumeratedValue>
101625                                <name>Control</name>
101626                                <value>0</value>
101627                            </enumeratedValue>
101628                            <enumeratedValue>
101629                                <name>Isochronous</name>
101630                                <value>1</value>
101631                            </enumeratedValue>
101632                            <enumeratedValue>
101633                                <name>Bulk</name>
101634                                <value>2</value>
101635                            </enumeratedValue>
101636                            <enumeratedValue>
101637                                <name>Interrupt</name>
101638                                <value>3</value>
101639                            </enumeratedValue>
101640                        </enumeratedValues>
101641                    </field>
101642                    <field>
101643                        <name>INTERRUPT_ON_STALL</name>
101644                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101645                        <bitRange>[17:17]</bitRange>
101646                        <access>read-write</access>
101647                    </field>
101648                    <field>
101649                        <name>INTERRUPT_ON_NAK</name>
101650                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101651                        <bitRange>[16:16]</bitRange>
101652                        <access>read-write</access>
101653                    </field>
101654                    <field>
101655                        <name>BUFFER_ADDRESS</name>
101656                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101657                        <bitRange>[15:0]</bitRange>
101658                        <access>read-write</access>
101659                    </field>
101660                </fields>
101661            </register>
101662            <register>
101663                <name>EP10_OUT_CONTROL</name>
101664                <addressOffset>0x00000054</addressOffset>
101665                <resetValue>0x00000000</resetValue>
101666                <fields>
101667                    <field>
101668                        <name>ENABLE</name>
101669                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101670                        <bitRange>[31:31]</bitRange>
101671                        <access>read-write</access>
101672                    </field>
101673                    <field>
101674                        <name>DOUBLE_BUFFERED</name>
101675                        <description>This endpoint is double buffered.</description>
101676                        <bitRange>[30:30]</bitRange>
101677                        <access>read-write</access>
101678                    </field>
101679                    <field>
101680                        <name>INTERRUPT_PER_BUFF</name>
101681                        <description>Trigger an interrupt each time a buffer is done.</description>
101682                        <bitRange>[29:29]</bitRange>
101683                        <access>read-write</access>
101684                    </field>
101685                    <field>
101686                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101687                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101688                        <bitRange>[28:28]</bitRange>
101689                        <access>read-write</access>
101690                    </field>
101691                    <field>
101692                        <name>ENDPOINT_TYPE</name>
101693                        <bitRange>[27:26]</bitRange>
101694                        <access>read-write</access>
101695                        <enumeratedValues>
101696                            <enumeratedValue>
101697                                <name>Control</name>
101698                                <value>0</value>
101699                            </enumeratedValue>
101700                            <enumeratedValue>
101701                                <name>Isochronous</name>
101702                                <value>1</value>
101703                            </enumeratedValue>
101704                            <enumeratedValue>
101705                                <name>Bulk</name>
101706                                <value>2</value>
101707                            </enumeratedValue>
101708                            <enumeratedValue>
101709                                <name>Interrupt</name>
101710                                <value>3</value>
101711                            </enumeratedValue>
101712                        </enumeratedValues>
101713                    </field>
101714                    <field>
101715                        <name>INTERRUPT_ON_STALL</name>
101716                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101717                        <bitRange>[17:17]</bitRange>
101718                        <access>read-write</access>
101719                    </field>
101720                    <field>
101721                        <name>INTERRUPT_ON_NAK</name>
101722                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101723                        <bitRange>[16:16]</bitRange>
101724                        <access>read-write</access>
101725                    </field>
101726                    <field>
101727                        <name>BUFFER_ADDRESS</name>
101728                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101729                        <bitRange>[15:0]</bitRange>
101730                        <access>read-write</access>
101731                    </field>
101732                </fields>
101733            </register>
101734            <register>
101735                <name>EP11_IN_CONTROL</name>
101736                <addressOffset>0x00000058</addressOffset>
101737                <resetValue>0x00000000</resetValue>
101738                <fields>
101739                    <field>
101740                        <name>ENABLE</name>
101741                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101742                        <bitRange>[31:31]</bitRange>
101743                        <access>read-write</access>
101744                    </field>
101745                    <field>
101746                        <name>DOUBLE_BUFFERED</name>
101747                        <description>This endpoint is double buffered.</description>
101748                        <bitRange>[30:30]</bitRange>
101749                        <access>read-write</access>
101750                    </field>
101751                    <field>
101752                        <name>INTERRUPT_PER_BUFF</name>
101753                        <description>Trigger an interrupt each time a buffer is done.</description>
101754                        <bitRange>[29:29]</bitRange>
101755                        <access>read-write</access>
101756                    </field>
101757                    <field>
101758                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101759                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101760                        <bitRange>[28:28]</bitRange>
101761                        <access>read-write</access>
101762                    </field>
101763                    <field>
101764                        <name>ENDPOINT_TYPE</name>
101765                        <bitRange>[27:26]</bitRange>
101766                        <access>read-write</access>
101767                        <enumeratedValues>
101768                            <enumeratedValue>
101769                                <name>Control</name>
101770                                <value>0</value>
101771                            </enumeratedValue>
101772                            <enumeratedValue>
101773                                <name>Isochronous</name>
101774                                <value>1</value>
101775                            </enumeratedValue>
101776                            <enumeratedValue>
101777                                <name>Bulk</name>
101778                                <value>2</value>
101779                            </enumeratedValue>
101780                            <enumeratedValue>
101781                                <name>Interrupt</name>
101782                                <value>3</value>
101783                            </enumeratedValue>
101784                        </enumeratedValues>
101785                    </field>
101786                    <field>
101787                        <name>INTERRUPT_ON_STALL</name>
101788                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101789                        <bitRange>[17:17]</bitRange>
101790                        <access>read-write</access>
101791                    </field>
101792                    <field>
101793                        <name>INTERRUPT_ON_NAK</name>
101794                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101795                        <bitRange>[16:16]</bitRange>
101796                        <access>read-write</access>
101797                    </field>
101798                    <field>
101799                        <name>BUFFER_ADDRESS</name>
101800                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101801                        <bitRange>[15:0]</bitRange>
101802                        <access>read-write</access>
101803                    </field>
101804                </fields>
101805            </register>
101806            <register>
101807                <name>EP11_OUT_CONTROL</name>
101808                <addressOffset>0x0000005c</addressOffset>
101809                <resetValue>0x00000000</resetValue>
101810                <fields>
101811                    <field>
101812                        <name>ENABLE</name>
101813                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101814                        <bitRange>[31:31]</bitRange>
101815                        <access>read-write</access>
101816                    </field>
101817                    <field>
101818                        <name>DOUBLE_BUFFERED</name>
101819                        <description>This endpoint is double buffered.</description>
101820                        <bitRange>[30:30]</bitRange>
101821                        <access>read-write</access>
101822                    </field>
101823                    <field>
101824                        <name>INTERRUPT_PER_BUFF</name>
101825                        <description>Trigger an interrupt each time a buffer is done.</description>
101826                        <bitRange>[29:29]</bitRange>
101827                        <access>read-write</access>
101828                    </field>
101829                    <field>
101830                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101831                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101832                        <bitRange>[28:28]</bitRange>
101833                        <access>read-write</access>
101834                    </field>
101835                    <field>
101836                        <name>ENDPOINT_TYPE</name>
101837                        <bitRange>[27:26]</bitRange>
101838                        <access>read-write</access>
101839                        <enumeratedValues>
101840                            <enumeratedValue>
101841                                <name>Control</name>
101842                                <value>0</value>
101843                            </enumeratedValue>
101844                            <enumeratedValue>
101845                                <name>Isochronous</name>
101846                                <value>1</value>
101847                            </enumeratedValue>
101848                            <enumeratedValue>
101849                                <name>Bulk</name>
101850                                <value>2</value>
101851                            </enumeratedValue>
101852                            <enumeratedValue>
101853                                <name>Interrupt</name>
101854                                <value>3</value>
101855                            </enumeratedValue>
101856                        </enumeratedValues>
101857                    </field>
101858                    <field>
101859                        <name>INTERRUPT_ON_STALL</name>
101860                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101861                        <bitRange>[17:17]</bitRange>
101862                        <access>read-write</access>
101863                    </field>
101864                    <field>
101865                        <name>INTERRUPT_ON_NAK</name>
101866                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101867                        <bitRange>[16:16]</bitRange>
101868                        <access>read-write</access>
101869                    </field>
101870                    <field>
101871                        <name>BUFFER_ADDRESS</name>
101872                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101873                        <bitRange>[15:0]</bitRange>
101874                        <access>read-write</access>
101875                    </field>
101876                </fields>
101877            </register>
101878            <register>
101879                <name>EP12_IN_CONTROL</name>
101880                <addressOffset>0x00000060</addressOffset>
101881                <resetValue>0x00000000</resetValue>
101882                <fields>
101883                    <field>
101884                        <name>ENABLE</name>
101885                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101886                        <bitRange>[31:31]</bitRange>
101887                        <access>read-write</access>
101888                    </field>
101889                    <field>
101890                        <name>DOUBLE_BUFFERED</name>
101891                        <description>This endpoint is double buffered.</description>
101892                        <bitRange>[30:30]</bitRange>
101893                        <access>read-write</access>
101894                    </field>
101895                    <field>
101896                        <name>INTERRUPT_PER_BUFF</name>
101897                        <description>Trigger an interrupt each time a buffer is done.</description>
101898                        <bitRange>[29:29]</bitRange>
101899                        <access>read-write</access>
101900                    </field>
101901                    <field>
101902                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101903                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101904                        <bitRange>[28:28]</bitRange>
101905                        <access>read-write</access>
101906                    </field>
101907                    <field>
101908                        <name>ENDPOINT_TYPE</name>
101909                        <bitRange>[27:26]</bitRange>
101910                        <access>read-write</access>
101911                        <enumeratedValues>
101912                            <enumeratedValue>
101913                                <name>Control</name>
101914                                <value>0</value>
101915                            </enumeratedValue>
101916                            <enumeratedValue>
101917                                <name>Isochronous</name>
101918                                <value>1</value>
101919                            </enumeratedValue>
101920                            <enumeratedValue>
101921                                <name>Bulk</name>
101922                                <value>2</value>
101923                            </enumeratedValue>
101924                            <enumeratedValue>
101925                                <name>Interrupt</name>
101926                                <value>3</value>
101927                            </enumeratedValue>
101928                        </enumeratedValues>
101929                    </field>
101930                    <field>
101931                        <name>INTERRUPT_ON_STALL</name>
101932                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
101933                        <bitRange>[17:17]</bitRange>
101934                        <access>read-write</access>
101935                    </field>
101936                    <field>
101937                        <name>INTERRUPT_ON_NAK</name>
101938                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
101939                        <bitRange>[16:16]</bitRange>
101940                        <access>read-write</access>
101941                    </field>
101942                    <field>
101943                        <name>BUFFER_ADDRESS</name>
101944                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
101945                        <bitRange>[15:0]</bitRange>
101946                        <access>read-write</access>
101947                    </field>
101948                </fields>
101949            </register>
101950            <register>
101951                <name>EP12_OUT_CONTROL</name>
101952                <addressOffset>0x00000064</addressOffset>
101953                <resetValue>0x00000000</resetValue>
101954                <fields>
101955                    <field>
101956                        <name>ENABLE</name>
101957                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
101958                        <bitRange>[31:31]</bitRange>
101959                        <access>read-write</access>
101960                    </field>
101961                    <field>
101962                        <name>DOUBLE_BUFFERED</name>
101963                        <description>This endpoint is double buffered.</description>
101964                        <bitRange>[30:30]</bitRange>
101965                        <access>read-write</access>
101966                    </field>
101967                    <field>
101968                        <name>INTERRUPT_PER_BUFF</name>
101969                        <description>Trigger an interrupt each time a buffer is done.</description>
101970                        <bitRange>[29:29]</bitRange>
101971                        <access>read-write</access>
101972                    </field>
101973                    <field>
101974                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
101975                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
101976                        <bitRange>[28:28]</bitRange>
101977                        <access>read-write</access>
101978                    </field>
101979                    <field>
101980                        <name>ENDPOINT_TYPE</name>
101981                        <bitRange>[27:26]</bitRange>
101982                        <access>read-write</access>
101983                        <enumeratedValues>
101984                            <enumeratedValue>
101985                                <name>Control</name>
101986                                <value>0</value>
101987                            </enumeratedValue>
101988                            <enumeratedValue>
101989                                <name>Isochronous</name>
101990                                <value>1</value>
101991                            </enumeratedValue>
101992                            <enumeratedValue>
101993                                <name>Bulk</name>
101994                                <value>2</value>
101995                            </enumeratedValue>
101996                            <enumeratedValue>
101997                                <name>Interrupt</name>
101998                                <value>3</value>
101999                            </enumeratedValue>
102000                        </enumeratedValues>
102001                    </field>
102002                    <field>
102003                        <name>INTERRUPT_ON_STALL</name>
102004                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102005                        <bitRange>[17:17]</bitRange>
102006                        <access>read-write</access>
102007                    </field>
102008                    <field>
102009                        <name>INTERRUPT_ON_NAK</name>
102010                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102011                        <bitRange>[16:16]</bitRange>
102012                        <access>read-write</access>
102013                    </field>
102014                    <field>
102015                        <name>BUFFER_ADDRESS</name>
102016                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102017                        <bitRange>[15:0]</bitRange>
102018                        <access>read-write</access>
102019                    </field>
102020                </fields>
102021            </register>
102022            <register>
102023                <name>EP13_IN_CONTROL</name>
102024                <addressOffset>0x00000068</addressOffset>
102025                <resetValue>0x00000000</resetValue>
102026                <fields>
102027                    <field>
102028                        <name>ENABLE</name>
102029                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102030                        <bitRange>[31:31]</bitRange>
102031                        <access>read-write</access>
102032                    </field>
102033                    <field>
102034                        <name>DOUBLE_BUFFERED</name>
102035                        <description>This endpoint is double buffered.</description>
102036                        <bitRange>[30:30]</bitRange>
102037                        <access>read-write</access>
102038                    </field>
102039                    <field>
102040                        <name>INTERRUPT_PER_BUFF</name>
102041                        <description>Trigger an interrupt each time a buffer is done.</description>
102042                        <bitRange>[29:29]</bitRange>
102043                        <access>read-write</access>
102044                    </field>
102045                    <field>
102046                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102047                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102048                        <bitRange>[28:28]</bitRange>
102049                        <access>read-write</access>
102050                    </field>
102051                    <field>
102052                        <name>ENDPOINT_TYPE</name>
102053                        <bitRange>[27:26]</bitRange>
102054                        <access>read-write</access>
102055                        <enumeratedValues>
102056                            <enumeratedValue>
102057                                <name>Control</name>
102058                                <value>0</value>
102059                            </enumeratedValue>
102060                            <enumeratedValue>
102061                                <name>Isochronous</name>
102062                                <value>1</value>
102063                            </enumeratedValue>
102064                            <enumeratedValue>
102065                                <name>Bulk</name>
102066                                <value>2</value>
102067                            </enumeratedValue>
102068                            <enumeratedValue>
102069                                <name>Interrupt</name>
102070                                <value>3</value>
102071                            </enumeratedValue>
102072                        </enumeratedValues>
102073                    </field>
102074                    <field>
102075                        <name>INTERRUPT_ON_STALL</name>
102076                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102077                        <bitRange>[17:17]</bitRange>
102078                        <access>read-write</access>
102079                    </field>
102080                    <field>
102081                        <name>INTERRUPT_ON_NAK</name>
102082                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102083                        <bitRange>[16:16]</bitRange>
102084                        <access>read-write</access>
102085                    </field>
102086                    <field>
102087                        <name>BUFFER_ADDRESS</name>
102088                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102089                        <bitRange>[15:0]</bitRange>
102090                        <access>read-write</access>
102091                    </field>
102092                </fields>
102093            </register>
102094            <register>
102095                <name>EP13_OUT_CONTROL</name>
102096                <addressOffset>0x0000006c</addressOffset>
102097                <resetValue>0x00000000</resetValue>
102098                <fields>
102099                    <field>
102100                        <name>ENABLE</name>
102101                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102102                        <bitRange>[31:31]</bitRange>
102103                        <access>read-write</access>
102104                    </field>
102105                    <field>
102106                        <name>DOUBLE_BUFFERED</name>
102107                        <description>This endpoint is double buffered.</description>
102108                        <bitRange>[30:30]</bitRange>
102109                        <access>read-write</access>
102110                    </field>
102111                    <field>
102112                        <name>INTERRUPT_PER_BUFF</name>
102113                        <description>Trigger an interrupt each time a buffer is done.</description>
102114                        <bitRange>[29:29]</bitRange>
102115                        <access>read-write</access>
102116                    </field>
102117                    <field>
102118                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102119                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102120                        <bitRange>[28:28]</bitRange>
102121                        <access>read-write</access>
102122                    </field>
102123                    <field>
102124                        <name>ENDPOINT_TYPE</name>
102125                        <bitRange>[27:26]</bitRange>
102126                        <access>read-write</access>
102127                        <enumeratedValues>
102128                            <enumeratedValue>
102129                                <name>Control</name>
102130                                <value>0</value>
102131                            </enumeratedValue>
102132                            <enumeratedValue>
102133                                <name>Isochronous</name>
102134                                <value>1</value>
102135                            </enumeratedValue>
102136                            <enumeratedValue>
102137                                <name>Bulk</name>
102138                                <value>2</value>
102139                            </enumeratedValue>
102140                            <enumeratedValue>
102141                                <name>Interrupt</name>
102142                                <value>3</value>
102143                            </enumeratedValue>
102144                        </enumeratedValues>
102145                    </field>
102146                    <field>
102147                        <name>INTERRUPT_ON_STALL</name>
102148                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102149                        <bitRange>[17:17]</bitRange>
102150                        <access>read-write</access>
102151                    </field>
102152                    <field>
102153                        <name>INTERRUPT_ON_NAK</name>
102154                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102155                        <bitRange>[16:16]</bitRange>
102156                        <access>read-write</access>
102157                    </field>
102158                    <field>
102159                        <name>BUFFER_ADDRESS</name>
102160                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102161                        <bitRange>[15:0]</bitRange>
102162                        <access>read-write</access>
102163                    </field>
102164                </fields>
102165            </register>
102166            <register>
102167                <name>EP14_IN_CONTROL</name>
102168                <addressOffset>0x00000070</addressOffset>
102169                <resetValue>0x00000000</resetValue>
102170                <fields>
102171                    <field>
102172                        <name>ENABLE</name>
102173                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102174                        <bitRange>[31:31]</bitRange>
102175                        <access>read-write</access>
102176                    </field>
102177                    <field>
102178                        <name>DOUBLE_BUFFERED</name>
102179                        <description>This endpoint is double buffered.</description>
102180                        <bitRange>[30:30]</bitRange>
102181                        <access>read-write</access>
102182                    </field>
102183                    <field>
102184                        <name>INTERRUPT_PER_BUFF</name>
102185                        <description>Trigger an interrupt each time a buffer is done.</description>
102186                        <bitRange>[29:29]</bitRange>
102187                        <access>read-write</access>
102188                    </field>
102189                    <field>
102190                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102191                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102192                        <bitRange>[28:28]</bitRange>
102193                        <access>read-write</access>
102194                    </field>
102195                    <field>
102196                        <name>ENDPOINT_TYPE</name>
102197                        <bitRange>[27:26]</bitRange>
102198                        <access>read-write</access>
102199                        <enumeratedValues>
102200                            <enumeratedValue>
102201                                <name>Control</name>
102202                                <value>0</value>
102203                            </enumeratedValue>
102204                            <enumeratedValue>
102205                                <name>Isochronous</name>
102206                                <value>1</value>
102207                            </enumeratedValue>
102208                            <enumeratedValue>
102209                                <name>Bulk</name>
102210                                <value>2</value>
102211                            </enumeratedValue>
102212                            <enumeratedValue>
102213                                <name>Interrupt</name>
102214                                <value>3</value>
102215                            </enumeratedValue>
102216                        </enumeratedValues>
102217                    </field>
102218                    <field>
102219                        <name>INTERRUPT_ON_STALL</name>
102220                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102221                        <bitRange>[17:17]</bitRange>
102222                        <access>read-write</access>
102223                    </field>
102224                    <field>
102225                        <name>INTERRUPT_ON_NAK</name>
102226                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102227                        <bitRange>[16:16]</bitRange>
102228                        <access>read-write</access>
102229                    </field>
102230                    <field>
102231                        <name>BUFFER_ADDRESS</name>
102232                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102233                        <bitRange>[15:0]</bitRange>
102234                        <access>read-write</access>
102235                    </field>
102236                </fields>
102237            </register>
102238            <register>
102239                <name>EP14_OUT_CONTROL</name>
102240                <addressOffset>0x00000074</addressOffset>
102241                <resetValue>0x00000000</resetValue>
102242                <fields>
102243                    <field>
102244                        <name>ENABLE</name>
102245                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102246                        <bitRange>[31:31]</bitRange>
102247                        <access>read-write</access>
102248                    </field>
102249                    <field>
102250                        <name>DOUBLE_BUFFERED</name>
102251                        <description>This endpoint is double buffered.</description>
102252                        <bitRange>[30:30]</bitRange>
102253                        <access>read-write</access>
102254                    </field>
102255                    <field>
102256                        <name>INTERRUPT_PER_BUFF</name>
102257                        <description>Trigger an interrupt each time a buffer is done.</description>
102258                        <bitRange>[29:29]</bitRange>
102259                        <access>read-write</access>
102260                    </field>
102261                    <field>
102262                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102263                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102264                        <bitRange>[28:28]</bitRange>
102265                        <access>read-write</access>
102266                    </field>
102267                    <field>
102268                        <name>ENDPOINT_TYPE</name>
102269                        <bitRange>[27:26]</bitRange>
102270                        <access>read-write</access>
102271                        <enumeratedValues>
102272                            <enumeratedValue>
102273                                <name>Control</name>
102274                                <value>0</value>
102275                            </enumeratedValue>
102276                            <enumeratedValue>
102277                                <name>Isochronous</name>
102278                                <value>1</value>
102279                            </enumeratedValue>
102280                            <enumeratedValue>
102281                                <name>Bulk</name>
102282                                <value>2</value>
102283                            </enumeratedValue>
102284                            <enumeratedValue>
102285                                <name>Interrupt</name>
102286                                <value>3</value>
102287                            </enumeratedValue>
102288                        </enumeratedValues>
102289                    </field>
102290                    <field>
102291                        <name>INTERRUPT_ON_STALL</name>
102292                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102293                        <bitRange>[17:17]</bitRange>
102294                        <access>read-write</access>
102295                    </field>
102296                    <field>
102297                        <name>INTERRUPT_ON_NAK</name>
102298                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102299                        <bitRange>[16:16]</bitRange>
102300                        <access>read-write</access>
102301                    </field>
102302                    <field>
102303                        <name>BUFFER_ADDRESS</name>
102304                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102305                        <bitRange>[15:0]</bitRange>
102306                        <access>read-write</access>
102307                    </field>
102308                </fields>
102309            </register>
102310            <register>
102311                <name>EP15_IN_CONTROL</name>
102312                <addressOffset>0x00000078</addressOffset>
102313                <resetValue>0x00000000</resetValue>
102314                <fields>
102315                    <field>
102316                        <name>ENABLE</name>
102317                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102318                        <bitRange>[31:31]</bitRange>
102319                        <access>read-write</access>
102320                    </field>
102321                    <field>
102322                        <name>DOUBLE_BUFFERED</name>
102323                        <description>This endpoint is double buffered.</description>
102324                        <bitRange>[30:30]</bitRange>
102325                        <access>read-write</access>
102326                    </field>
102327                    <field>
102328                        <name>INTERRUPT_PER_BUFF</name>
102329                        <description>Trigger an interrupt each time a buffer is done.</description>
102330                        <bitRange>[29:29]</bitRange>
102331                        <access>read-write</access>
102332                    </field>
102333                    <field>
102334                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102335                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102336                        <bitRange>[28:28]</bitRange>
102337                        <access>read-write</access>
102338                    </field>
102339                    <field>
102340                        <name>ENDPOINT_TYPE</name>
102341                        <bitRange>[27:26]</bitRange>
102342                        <access>read-write</access>
102343                        <enumeratedValues>
102344                            <enumeratedValue>
102345                                <name>Control</name>
102346                                <value>0</value>
102347                            </enumeratedValue>
102348                            <enumeratedValue>
102349                                <name>Isochronous</name>
102350                                <value>1</value>
102351                            </enumeratedValue>
102352                            <enumeratedValue>
102353                                <name>Bulk</name>
102354                                <value>2</value>
102355                            </enumeratedValue>
102356                            <enumeratedValue>
102357                                <name>Interrupt</name>
102358                                <value>3</value>
102359                            </enumeratedValue>
102360                        </enumeratedValues>
102361                    </field>
102362                    <field>
102363                        <name>INTERRUPT_ON_STALL</name>
102364                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102365                        <bitRange>[17:17]</bitRange>
102366                        <access>read-write</access>
102367                    </field>
102368                    <field>
102369                        <name>INTERRUPT_ON_NAK</name>
102370                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102371                        <bitRange>[16:16]</bitRange>
102372                        <access>read-write</access>
102373                    </field>
102374                    <field>
102375                        <name>BUFFER_ADDRESS</name>
102376                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102377                        <bitRange>[15:0]</bitRange>
102378                        <access>read-write</access>
102379                    </field>
102380                </fields>
102381            </register>
102382            <register>
102383                <name>EP15_OUT_CONTROL</name>
102384                <addressOffset>0x0000007c</addressOffset>
102385                <resetValue>0x00000000</resetValue>
102386                <fields>
102387                    <field>
102388                        <name>ENABLE</name>
102389                        <description>Enable this endpoint. The device will not reply to any packets for this endpoint if this bit is not set.</description>
102390                        <bitRange>[31:31]</bitRange>
102391                        <access>read-write</access>
102392                    </field>
102393                    <field>
102394                        <name>DOUBLE_BUFFERED</name>
102395                        <description>This endpoint is double buffered.</description>
102396                        <bitRange>[30:30]</bitRange>
102397                        <access>read-write</access>
102398                    </field>
102399                    <field>
102400                        <name>INTERRUPT_PER_BUFF</name>
102401                        <description>Trigger an interrupt each time a buffer is done.</description>
102402                        <bitRange>[29:29]</bitRange>
102403                        <access>read-write</access>
102404                    </field>
102405                    <field>
102406                        <name>INTERRUPT_PER_DOUBLE_BUFF</name>
102407                        <description>Trigger an interrupt each time both buffers are done. Only valid in double buffered mode.</description>
102408                        <bitRange>[28:28]</bitRange>
102409                        <access>read-write</access>
102410                    </field>
102411                    <field>
102412                        <name>ENDPOINT_TYPE</name>
102413                        <bitRange>[27:26]</bitRange>
102414                        <access>read-write</access>
102415                        <enumeratedValues>
102416                            <enumeratedValue>
102417                                <name>Control</name>
102418                                <value>0</value>
102419                            </enumeratedValue>
102420                            <enumeratedValue>
102421                                <name>Isochronous</name>
102422                                <value>1</value>
102423                            </enumeratedValue>
102424                            <enumeratedValue>
102425                                <name>Bulk</name>
102426                                <value>2</value>
102427                            </enumeratedValue>
102428                            <enumeratedValue>
102429                                <name>Interrupt</name>
102430                                <value>3</value>
102431                            </enumeratedValue>
102432                        </enumeratedValues>
102433                    </field>
102434                    <field>
102435                        <name>INTERRUPT_ON_STALL</name>
102436                        <description>Trigger an interrupt if a STALL is sent. Intended for debug only.</description>
102437                        <bitRange>[17:17]</bitRange>
102438                        <access>read-write</access>
102439                    </field>
102440                    <field>
102441                        <name>INTERRUPT_ON_NAK</name>
102442                        <description>Trigger an interrupt if a NAK is sent. Intended for debug only.</description>
102443                        <bitRange>[16:16]</bitRange>
102444                        <access>read-write</access>
102445                    </field>
102446                    <field>
102447                        <name>BUFFER_ADDRESS</name>
102448                        <description>64 byte aligned buffer address for this EP (bits 0-5 are ignored). Relative to the start of the DPRAM.</description>
102449                        <bitRange>[15:0]</bitRange>
102450                        <access>read-write</access>
102451                    </field>
102452                </fields>
102453            </register>
102454            <register>
102455                <name>EP0_IN_BUFFER_CONTROL</name>
102456                <addressOffset>0x00000080</addressOffset>
102457                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102458                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102459                <resetValue>0x00000000</resetValue>
102460                <fields>
102461                    <field>
102462                        <name>FULL_1</name>
102463                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102464                        <bitRange>[31:31]</bitRange>
102465                        <access>read-write</access>
102466                    </field>
102467                    <field>
102468                        <name>LAST_1</name>
102469                        <description>Buffer 1 is the last buffer of the transfer.</description>
102470                        <bitRange>[30:30]</bitRange>
102471                        <access>read-write</access>
102472                    </field>
102473                    <field>
102474                        <name>PID_1</name>
102475                        <description>The data pid of buffer 1.</description>
102476                        <bitRange>[29:29]</bitRange>
102477                        <access>read-write</access>
102478                    </field>
102479                    <field>
102480                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
102481                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
102482                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
102483                        <bitRange>[28:27]</bitRange>
102484                        <access>read-write</access>
102485                        <enumeratedValues>
102486                            <enumeratedValue>
102487                                <name>128</name>
102488                                <value>0</value>
102489                            </enumeratedValue>
102490                            <enumeratedValue>
102491                                <name>256</name>
102492                                <value>1</value>
102493                            </enumeratedValue>
102494                            <enumeratedValue>
102495                                <name>512</name>
102496                                <value>2</value>
102497                            </enumeratedValue>
102498                            <enumeratedValue>
102499                                <name>1024</name>
102500                                <value>3</value>
102501                            </enumeratedValue>
102502                        </enumeratedValues>
102503                    </field>
102504                    <field>
102505                        <name>AVAILABLE_1</name>
102506                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102507                        <bitRange>[26:26]</bitRange>
102508                        <access>read-write</access>
102509                    </field>
102510                    <field>
102511                        <name>LENGTH_1</name>
102512                        <description>The length of the data in buffer 1.</description>
102513                        <bitRange>[25:16]</bitRange>
102514                        <access>read-write</access>
102515                    </field>
102516                    <field>
102517                        <name>FULL_0</name>
102518                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102519                        <bitRange>[15:15]</bitRange>
102520                        <access>read-write</access>
102521                    </field>
102522                    <field>
102523                        <name>LAST_0</name>
102524                        <description>Buffer 0 is the last buffer of the transfer.</description>
102525                        <bitRange>[14:14]</bitRange>
102526                        <access>read-write</access>
102527                    </field>
102528                    <field>
102529                        <name>PID_0</name>
102530                        <description>The data pid of buffer 0.</description>
102531                        <bitRange>[13:13]</bitRange>
102532                        <access>read-write</access>
102533                    </field>
102534                    <field>
102535                        <name>RESET</name>
102536                        <description>Reset the buffer selector to buffer 0.</description>
102537                        <bitRange>[12:12]</bitRange>
102538                        <access>read-write</access>
102539                    </field>
102540                    <field>
102541                        <name>STALL</name>
102542                        <description>Reply with a stall (valid for both buffers).</description>
102543                        <bitRange>[11:11]</bitRange>
102544                        <access>read-write</access>
102545                    </field>
102546                    <field>
102547                        <name>AVAILABLE_0</name>
102548                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102549                        <bitRange>[10:10]</bitRange>
102550                        <access>read-write</access>
102551                    </field>
102552                    <field>
102553                        <name>LENGTH_0</name>
102554                        <description>The length of the data in buffer 1.</description>
102555                        <bitRange>[9:0]</bitRange>
102556                        <access>read-write</access>
102557                    </field>
102558                </fields>
102559            </register>
102560            <register>
102561                <name>EP0_OUT_BUFFER_CONTROL</name>
102562                <addressOffset>0x00000084</addressOffset>
102563                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102564                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102565                <resetValue>0x00000000</resetValue>
102566                <fields>
102567                    <field>
102568                        <name>FULL_1</name>
102569                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102570                        <bitRange>[31:31]</bitRange>
102571                        <access>read-write</access>
102572                    </field>
102573                    <field>
102574                        <name>LAST_1</name>
102575                        <description>Buffer 1 is the last buffer of the transfer.</description>
102576                        <bitRange>[30:30]</bitRange>
102577                        <access>read-write</access>
102578                    </field>
102579                    <field>
102580                        <name>PID_1</name>
102581                        <description>The data pid of buffer 1.</description>
102582                        <bitRange>[29:29]</bitRange>
102583                        <access>read-write</access>
102584                    </field>
102585                    <field>
102586                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
102587                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
102588                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
102589                        <bitRange>[28:27]</bitRange>
102590                        <access>read-write</access>
102591                        <enumeratedValues>
102592                            <enumeratedValue>
102593                                <name>128</name>
102594                                <value>0</value>
102595                            </enumeratedValue>
102596                            <enumeratedValue>
102597                                <name>256</name>
102598                                <value>1</value>
102599                            </enumeratedValue>
102600                            <enumeratedValue>
102601                                <name>512</name>
102602                                <value>2</value>
102603                            </enumeratedValue>
102604                            <enumeratedValue>
102605                                <name>1024</name>
102606                                <value>3</value>
102607                            </enumeratedValue>
102608                        </enumeratedValues>
102609                    </field>
102610                    <field>
102611                        <name>AVAILABLE_1</name>
102612                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102613                        <bitRange>[26:26]</bitRange>
102614                        <access>read-write</access>
102615                    </field>
102616                    <field>
102617                        <name>LENGTH_1</name>
102618                        <description>The length of the data in buffer 1.</description>
102619                        <bitRange>[25:16]</bitRange>
102620                        <access>read-write</access>
102621                    </field>
102622                    <field>
102623                        <name>FULL_0</name>
102624                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102625                        <bitRange>[15:15]</bitRange>
102626                        <access>read-write</access>
102627                    </field>
102628                    <field>
102629                        <name>LAST_0</name>
102630                        <description>Buffer 0 is the last buffer of the transfer.</description>
102631                        <bitRange>[14:14]</bitRange>
102632                        <access>read-write</access>
102633                    </field>
102634                    <field>
102635                        <name>PID_0</name>
102636                        <description>The data pid of buffer 0.</description>
102637                        <bitRange>[13:13]</bitRange>
102638                        <access>read-write</access>
102639                    </field>
102640                    <field>
102641                        <name>RESET</name>
102642                        <description>Reset the buffer selector to buffer 0.</description>
102643                        <bitRange>[12:12]</bitRange>
102644                        <access>read-write</access>
102645                    </field>
102646                    <field>
102647                        <name>STALL</name>
102648                        <description>Reply with a stall (valid for both buffers).</description>
102649                        <bitRange>[11:11]</bitRange>
102650                        <access>read-write</access>
102651                    </field>
102652                    <field>
102653                        <name>AVAILABLE_0</name>
102654                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102655                        <bitRange>[10:10]</bitRange>
102656                        <access>read-write</access>
102657                    </field>
102658                    <field>
102659                        <name>LENGTH_0</name>
102660                        <description>The length of the data in buffer 1.</description>
102661                        <bitRange>[9:0]</bitRange>
102662                        <access>read-write</access>
102663                    </field>
102664                </fields>
102665            </register>
102666            <register>
102667                <name>EP1_IN_BUFFER_CONTROL</name>
102668                <addressOffset>0x00000088</addressOffset>
102669                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102670                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102671                <resetValue>0x00000000</resetValue>
102672                <fields>
102673                    <field>
102674                        <name>FULL_1</name>
102675                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102676                        <bitRange>[31:31]</bitRange>
102677                        <access>read-write</access>
102678                    </field>
102679                    <field>
102680                        <name>LAST_1</name>
102681                        <description>Buffer 1 is the last buffer of the transfer.</description>
102682                        <bitRange>[30:30]</bitRange>
102683                        <access>read-write</access>
102684                    </field>
102685                    <field>
102686                        <name>PID_1</name>
102687                        <description>The data pid of buffer 1.</description>
102688                        <bitRange>[29:29]</bitRange>
102689                        <access>read-write</access>
102690                    </field>
102691                    <field>
102692                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
102693                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
102694                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
102695                        <bitRange>[28:27]</bitRange>
102696                        <access>read-write</access>
102697                        <enumeratedValues>
102698                            <enumeratedValue>
102699                                <name>128</name>
102700                                <value>0</value>
102701                            </enumeratedValue>
102702                            <enumeratedValue>
102703                                <name>256</name>
102704                                <value>1</value>
102705                            </enumeratedValue>
102706                            <enumeratedValue>
102707                                <name>512</name>
102708                                <value>2</value>
102709                            </enumeratedValue>
102710                            <enumeratedValue>
102711                                <name>1024</name>
102712                                <value>3</value>
102713                            </enumeratedValue>
102714                        </enumeratedValues>
102715                    </field>
102716                    <field>
102717                        <name>AVAILABLE_1</name>
102718                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102719                        <bitRange>[26:26]</bitRange>
102720                        <access>read-write</access>
102721                    </field>
102722                    <field>
102723                        <name>LENGTH_1</name>
102724                        <description>The length of the data in buffer 1.</description>
102725                        <bitRange>[25:16]</bitRange>
102726                        <access>read-write</access>
102727                    </field>
102728                    <field>
102729                        <name>FULL_0</name>
102730                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102731                        <bitRange>[15:15]</bitRange>
102732                        <access>read-write</access>
102733                    </field>
102734                    <field>
102735                        <name>LAST_0</name>
102736                        <description>Buffer 0 is the last buffer of the transfer.</description>
102737                        <bitRange>[14:14]</bitRange>
102738                        <access>read-write</access>
102739                    </field>
102740                    <field>
102741                        <name>PID_0</name>
102742                        <description>The data pid of buffer 0.</description>
102743                        <bitRange>[13:13]</bitRange>
102744                        <access>read-write</access>
102745                    </field>
102746                    <field>
102747                        <name>RESET</name>
102748                        <description>Reset the buffer selector to buffer 0.</description>
102749                        <bitRange>[12:12]</bitRange>
102750                        <access>read-write</access>
102751                    </field>
102752                    <field>
102753                        <name>STALL</name>
102754                        <description>Reply with a stall (valid for both buffers).</description>
102755                        <bitRange>[11:11]</bitRange>
102756                        <access>read-write</access>
102757                    </field>
102758                    <field>
102759                        <name>AVAILABLE_0</name>
102760                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102761                        <bitRange>[10:10]</bitRange>
102762                        <access>read-write</access>
102763                    </field>
102764                    <field>
102765                        <name>LENGTH_0</name>
102766                        <description>The length of the data in buffer 1.</description>
102767                        <bitRange>[9:0]</bitRange>
102768                        <access>read-write</access>
102769                    </field>
102770                </fields>
102771            </register>
102772            <register>
102773                <name>EP1_OUT_BUFFER_CONTROL</name>
102774                <addressOffset>0x0000008c</addressOffset>
102775                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102776                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102777                <resetValue>0x00000000</resetValue>
102778                <fields>
102779                    <field>
102780                        <name>FULL_1</name>
102781                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102782                        <bitRange>[31:31]</bitRange>
102783                        <access>read-write</access>
102784                    </field>
102785                    <field>
102786                        <name>LAST_1</name>
102787                        <description>Buffer 1 is the last buffer of the transfer.</description>
102788                        <bitRange>[30:30]</bitRange>
102789                        <access>read-write</access>
102790                    </field>
102791                    <field>
102792                        <name>PID_1</name>
102793                        <description>The data pid of buffer 1.</description>
102794                        <bitRange>[29:29]</bitRange>
102795                        <access>read-write</access>
102796                    </field>
102797                    <field>
102798                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
102799                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
102800                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
102801                        <bitRange>[28:27]</bitRange>
102802                        <access>read-write</access>
102803                        <enumeratedValues>
102804                            <enumeratedValue>
102805                                <name>128</name>
102806                                <value>0</value>
102807                            </enumeratedValue>
102808                            <enumeratedValue>
102809                                <name>256</name>
102810                                <value>1</value>
102811                            </enumeratedValue>
102812                            <enumeratedValue>
102813                                <name>512</name>
102814                                <value>2</value>
102815                            </enumeratedValue>
102816                            <enumeratedValue>
102817                                <name>1024</name>
102818                                <value>3</value>
102819                            </enumeratedValue>
102820                        </enumeratedValues>
102821                    </field>
102822                    <field>
102823                        <name>AVAILABLE_1</name>
102824                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102825                        <bitRange>[26:26]</bitRange>
102826                        <access>read-write</access>
102827                    </field>
102828                    <field>
102829                        <name>LENGTH_1</name>
102830                        <description>The length of the data in buffer 1.</description>
102831                        <bitRange>[25:16]</bitRange>
102832                        <access>read-write</access>
102833                    </field>
102834                    <field>
102835                        <name>FULL_0</name>
102836                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102837                        <bitRange>[15:15]</bitRange>
102838                        <access>read-write</access>
102839                    </field>
102840                    <field>
102841                        <name>LAST_0</name>
102842                        <description>Buffer 0 is the last buffer of the transfer.</description>
102843                        <bitRange>[14:14]</bitRange>
102844                        <access>read-write</access>
102845                    </field>
102846                    <field>
102847                        <name>PID_0</name>
102848                        <description>The data pid of buffer 0.</description>
102849                        <bitRange>[13:13]</bitRange>
102850                        <access>read-write</access>
102851                    </field>
102852                    <field>
102853                        <name>RESET</name>
102854                        <description>Reset the buffer selector to buffer 0.</description>
102855                        <bitRange>[12:12]</bitRange>
102856                        <access>read-write</access>
102857                    </field>
102858                    <field>
102859                        <name>STALL</name>
102860                        <description>Reply with a stall (valid for both buffers).</description>
102861                        <bitRange>[11:11]</bitRange>
102862                        <access>read-write</access>
102863                    </field>
102864                    <field>
102865                        <name>AVAILABLE_0</name>
102866                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102867                        <bitRange>[10:10]</bitRange>
102868                        <access>read-write</access>
102869                    </field>
102870                    <field>
102871                        <name>LENGTH_0</name>
102872                        <description>The length of the data in buffer 1.</description>
102873                        <bitRange>[9:0]</bitRange>
102874                        <access>read-write</access>
102875                    </field>
102876                </fields>
102877            </register>
102878            <register>
102879                <name>EP2_IN_BUFFER_CONTROL</name>
102880                <addressOffset>0x00000090</addressOffset>
102881                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102882                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102883                <resetValue>0x00000000</resetValue>
102884                <fields>
102885                    <field>
102886                        <name>FULL_1</name>
102887                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102888                        <bitRange>[31:31]</bitRange>
102889                        <access>read-write</access>
102890                    </field>
102891                    <field>
102892                        <name>LAST_1</name>
102893                        <description>Buffer 1 is the last buffer of the transfer.</description>
102894                        <bitRange>[30:30]</bitRange>
102895                        <access>read-write</access>
102896                    </field>
102897                    <field>
102898                        <name>PID_1</name>
102899                        <description>The data pid of buffer 1.</description>
102900                        <bitRange>[29:29]</bitRange>
102901                        <access>read-write</access>
102902                    </field>
102903                    <field>
102904                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
102905                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
102906                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
102907                        <bitRange>[28:27]</bitRange>
102908                        <access>read-write</access>
102909                        <enumeratedValues>
102910                            <enumeratedValue>
102911                                <name>128</name>
102912                                <value>0</value>
102913                            </enumeratedValue>
102914                            <enumeratedValue>
102915                                <name>256</name>
102916                                <value>1</value>
102917                            </enumeratedValue>
102918                            <enumeratedValue>
102919                                <name>512</name>
102920                                <value>2</value>
102921                            </enumeratedValue>
102922                            <enumeratedValue>
102923                                <name>1024</name>
102924                                <value>3</value>
102925                            </enumeratedValue>
102926                        </enumeratedValues>
102927                    </field>
102928                    <field>
102929                        <name>AVAILABLE_1</name>
102930                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102931                        <bitRange>[26:26]</bitRange>
102932                        <access>read-write</access>
102933                    </field>
102934                    <field>
102935                        <name>LENGTH_1</name>
102936                        <description>The length of the data in buffer 1.</description>
102937                        <bitRange>[25:16]</bitRange>
102938                        <access>read-write</access>
102939                    </field>
102940                    <field>
102941                        <name>FULL_0</name>
102942                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102943                        <bitRange>[15:15]</bitRange>
102944                        <access>read-write</access>
102945                    </field>
102946                    <field>
102947                        <name>LAST_0</name>
102948                        <description>Buffer 0 is the last buffer of the transfer.</description>
102949                        <bitRange>[14:14]</bitRange>
102950                        <access>read-write</access>
102951                    </field>
102952                    <field>
102953                        <name>PID_0</name>
102954                        <description>The data pid of buffer 0.</description>
102955                        <bitRange>[13:13]</bitRange>
102956                        <access>read-write</access>
102957                    </field>
102958                    <field>
102959                        <name>RESET</name>
102960                        <description>Reset the buffer selector to buffer 0.</description>
102961                        <bitRange>[12:12]</bitRange>
102962                        <access>read-write</access>
102963                    </field>
102964                    <field>
102965                        <name>STALL</name>
102966                        <description>Reply with a stall (valid for both buffers).</description>
102967                        <bitRange>[11:11]</bitRange>
102968                        <access>read-write</access>
102969                    </field>
102970                    <field>
102971                        <name>AVAILABLE_0</name>
102972                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
102973                        <bitRange>[10:10]</bitRange>
102974                        <access>read-write</access>
102975                    </field>
102976                    <field>
102977                        <name>LENGTH_0</name>
102978                        <description>The length of the data in buffer 1.</description>
102979                        <bitRange>[9:0]</bitRange>
102980                        <access>read-write</access>
102981                    </field>
102982                </fields>
102983            </register>
102984            <register>
102985                <name>EP2_OUT_BUFFER_CONTROL</name>
102986                <addressOffset>0x00000094</addressOffset>
102987                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
102988                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
102989                <resetValue>0x00000000</resetValue>
102990                <fields>
102991                    <field>
102992                        <name>FULL_1</name>
102993                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
102994                        <bitRange>[31:31]</bitRange>
102995                        <access>read-write</access>
102996                    </field>
102997                    <field>
102998                        <name>LAST_1</name>
102999                        <description>Buffer 1 is the last buffer of the transfer.</description>
103000                        <bitRange>[30:30]</bitRange>
103001                        <access>read-write</access>
103002                    </field>
103003                    <field>
103004                        <name>PID_1</name>
103005                        <description>The data pid of buffer 1.</description>
103006                        <bitRange>[29:29]</bitRange>
103007                        <access>read-write</access>
103008                    </field>
103009                    <field>
103010                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103011                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103012                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103013                        <bitRange>[28:27]</bitRange>
103014                        <access>read-write</access>
103015                        <enumeratedValues>
103016                            <enumeratedValue>
103017                                <name>128</name>
103018                                <value>0</value>
103019                            </enumeratedValue>
103020                            <enumeratedValue>
103021                                <name>256</name>
103022                                <value>1</value>
103023                            </enumeratedValue>
103024                            <enumeratedValue>
103025                                <name>512</name>
103026                                <value>2</value>
103027                            </enumeratedValue>
103028                            <enumeratedValue>
103029                                <name>1024</name>
103030                                <value>3</value>
103031                            </enumeratedValue>
103032                        </enumeratedValues>
103033                    </field>
103034                    <field>
103035                        <name>AVAILABLE_1</name>
103036                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103037                        <bitRange>[26:26]</bitRange>
103038                        <access>read-write</access>
103039                    </field>
103040                    <field>
103041                        <name>LENGTH_1</name>
103042                        <description>The length of the data in buffer 1.</description>
103043                        <bitRange>[25:16]</bitRange>
103044                        <access>read-write</access>
103045                    </field>
103046                    <field>
103047                        <name>FULL_0</name>
103048                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103049                        <bitRange>[15:15]</bitRange>
103050                        <access>read-write</access>
103051                    </field>
103052                    <field>
103053                        <name>LAST_0</name>
103054                        <description>Buffer 0 is the last buffer of the transfer.</description>
103055                        <bitRange>[14:14]</bitRange>
103056                        <access>read-write</access>
103057                    </field>
103058                    <field>
103059                        <name>PID_0</name>
103060                        <description>The data pid of buffer 0.</description>
103061                        <bitRange>[13:13]</bitRange>
103062                        <access>read-write</access>
103063                    </field>
103064                    <field>
103065                        <name>RESET</name>
103066                        <description>Reset the buffer selector to buffer 0.</description>
103067                        <bitRange>[12:12]</bitRange>
103068                        <access>read-write</access>
103069                    </field>
103070                    <field>
103071                        <name>STALL</name>
103072                        <description>Reply with a stall (valid for both buffers).</description>
103073                        <bitRange>[11:11]</bitRange>
103074                        <access>read-write</access>
103075                    </field>
103076                    <field>
103077                        <name>AVAILABLE_0</name>
103078                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103079                        <bitRange>[10:10]</bitRange>
103080                        <access>read-write</access>
103081                    </field>
103082                    <field>
103083                        <name>LENGTH_0</name>
103084                        <description>The length of the data in buffer 1.</description>
103085                        <bitRange>[9:0]</bitRange>
103086                        <access>read-write</access>
103087                    </field>
103088                </fields>
103089            </register>
103090            <register>
103091                <name>EP3_IN_BUFFER_CONTROL</name>
103092                <addressOffset>0x00000098</addressOffset>
103093                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103094                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103095                <resetValue>0x00000000</resetValue>
103096                <fields>
103097                    <field>
103098                        <name>FULL_1</name>
103099                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103100                        <bitRange>[31:31]</bitRange>
103101                        <access>read-write</access>
103102                    </field>
103103                    <field>
103104                        <name>LAST_1</name>
103105                        <description>Buffer 1 is the last buffer of the transfer.</description>
103106                        <bitRange>[30:30]</bitRange>
103107                        <access>read-write</access>
103108                    </field>
103109                    <field>
103110                        <name>PID_1</name>
103111                        <description>The data pid of buffer 1.</description>
103112                        <bitRange>[29:29]</bitRange>
103113                        <access>read-write</access>
103114                    </field>
103115                    <field>
103116                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103117                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103118                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103119                        <bitRange>[28:27]</bitRange>
103120                        <access>read-write</access>
103121                        <enumeratedValues>
103122                            <enumeratedValue>
103123                                <name>128</name>
103124                                <value>0</value>
103125                            </enumeratedValue>
103126                            <enumeratedValue>
103127                                <name>256</name>
103128                                <value>1</value>
103129                            </enumeratedValue>
103130                            <enumeratedValue>
103131                                <name>512</name>
103132                                <value>2</value>
103133                            </enumeratedValue>
103134                            <enumeratedValue>
103135                                <name>1024</name>
103136                                <value>3</value>
103137                            </enumeratedValue>
103138                        </enumeratedValues>
103139                    </field>
103140                    <field>
103141                        <name>AVAILABLE_1</name>
103142                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103143                        <bitRange>[26:26]</bitRange>
103144                        <access>read-write</access>
103145                    </field>
103146                    <field>
103147                        <name>LENGTH_1</name>
103148                        <description>The length of the data in buffer 1.</description>
103149                        <bitRange>[25:16]</bitRange>
103150                        <access>read-write</access>
103151                    </field>
103152                    <field>
103153                        <name>FULL_0</name>
103154                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103155                        <bitRange>[15:15]</bitRange>
103156                        <access>read-write</access>
103157                    </field>
103158                    <field>
103159                        <name>LAST_0</name>
103160                        <description>Buffer 0 is the last buffer of the transfer.</description>
103161                        <bitRange>[14:14]</bitRange>
103162                        <access>read-write</access>
103163                    </field>
103164                    <field>
103165                        <name>PID_0</name>
103166                        <description>The data pid of buffer 0.</description>
103167                        <bitRange>[13:13]</bitRange>
103168                        <access>read-write</access>
103169                    </field>
103170                    <field>
103171                        <name>RESET</name>
103172                        <description>Reset the buffer selector to buffer 0.</description>
103173                        <bitRange>[12:12]</bitRange>
103174                        <access>read-write</access>
103175                    </field>
103176                    <field>
103177                        <name>STALL</name>
103178                        <description>Reply with a stall (valid for both buffers).</description>
103179                        <bitRange>[11:11]</bitRange>
103180                        <access>read-write</access>
103181                    </field>
103182                    <field>
103183                        <name>AVAILABLE_0</name>
103184                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103185                        <bitRange>[10:10]</bitRange>
103186                        <access>read-write</access>
103187                    </field>
103188                    <field>
103189                        <name>LENGTH_0</name>
103190                        <description>The length of the data in buffer 1.</description>
103191                        <bitRange>[9:0]</bitRange>
103192                        <access>read-write</access>
103193                    </field>
103194                </fields>
103195            </register>
103196            <register>
103197                <name>EP3_OUT_BUFFER_CONTROL</name>
103198                <addressOffset>0x0000009c</addressOffset>
103199                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103200                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103201                <resetValue>0x00000000</resetValue>
103202                <fields>
103203                    <field>
103204                        <name>FULL_1</name>
103205                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103206                        <bitRange>[31:31]</bitRange>
103207                        <access>read-write</access>
103208                    </field>
103209                    <field>
103210                        <name>LAST_1</name>
103211                        <description>Buffer 1 is the last buffer of the transfer.</description>
103212                        <bitRange>[30:30]</bitRange>
103213                        <access>read-write</access>
103214                    </field>
103215                    <field>
103216                        <name>PID_1</name>
103217                        <description>The data pid of buffer 1.</description>
103218                        <bitRange>[29:29]</bitRange>
103219                        <access>read-write</access>
103220                    </field>
103221                    <field>
103222                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103223                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103224                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103225                        <bitRange>[28:27]</bitRange>
103226                        <access>read-write</access>
103227                        <enumeratedValues>
103228                            <enumeratedValue>
103229                                <name>128</name>
103230                                <value>0</value>
103231                            </enumeratedValue>
103232                            <enumeratedValue>
103233                                <name>256</name>
103234                                <value>1</value>
103235                            </enumeratedValue>
103236                            <enumeratedValue>
103237                                <name>512</name>
103238                                <value>2</value>
103239                            </enumeratedValue>
103240                            <enumeratedValue>
103241                                <name>1024</name>
103242                                <value>3</value>
103243                            </enumeratedValue>
103244                        </enumeratedValues>
103245                    </field>
103246                    <field>
103247                        <name>AVAILABLE_1</name>
103248                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103249                        <bitRange>[26:26]</bitRange>
103250                        <access>read-write</access>
103251                    </field>
103252                    <field>
103253                        <name>LENGTH_1</name>
103254                        <description>The length of the data in buffer 1.</description>
103255                        <bitRange>[25:16]</bitRange>
103256                        <access>read-write</access>
103257                    </field>
103258                    <field>
103259                        <name>FULL_0</name>
103260                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103261                        <bitRange>[15:15]</bitRange>
103262                        <access>read-write</access>
103263                    </field>
103264                    <field>
103265                        <name>LAST_0</name>
103266                        <description>Buffer 0 is the last buffer of the transfer.</description>
103267                        <bitRange>[14:14]</bitRange>
103268                        <access>read-write</access>
103269                    </field>
103270                    <field>
103271                        <name>PID_0</name>
103272                        <description>The data pid of buffer 0.</description>
103273                        <bitRange>[13:13]</bitRange>
103274                        <access>read-write</access>
103275                    </field>
103276                    <field>
103277                        <name>RESET</name>
103278                        <description>Reset the buffer selector to buffer 0.</description>
103279                        <bitRange>[12:12]</bitRange>
103280                        <access>read-write</access>
103281                    </field>
103282                    <field>
103283                        <name>STALL</name>
103284                        <description>Reply with a stall (valid for both buffers).</description>
103285                        <bitRange>[11:11]</bitRange>
103286                        <access>read-write</access>
103287                    </field>
103288                    <field>
103289                        <name>AVAILABLE_0</name>
103290                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103291                        <bitRange>[10:10]</bitRange>
103292                        <access>read-write</access>
103293                    </field>
103294                    <field>
103295                        <name>LENGTH_0</name>
103296                        <description>The length of the data in buffer 1.</description>
103297                        <bitRange>[9:0]</bitRange>
103298                        <access>read-write</access>
103299                    </field>
103300                </fields>
103301            </register>
103302            <register>
103303                <name>EP4_IN_BUFFER_CONTROL</name>
103304                <addressOffset>0x000000a0</addressOffset>
103305                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103306                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103307                <resetValue>0x00000000</resetValue>
103308                <fields>
103309                    <field>
103310                        <name>FULL_1</name>
103311                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103312                        <bitRange>[31:31]</bitRange>
103313                        <access>read-write</access>
103314                    </field>
103315                    <field>
103316                        <name>LAST_1</name>
103317                        <description>Buffer 1 is the last buffer of the transfer.</description>
103318                        <bitRange>[30:30]</bitRange>
103319                        <access>read-write</access>
103320                    </field>
103321                    <field>
103322                        <name>PID_1</name>
103323                        <description>The data pid of buffer 1.</description>
103324                        <bitRange>[29:29]</bitRange>
103325                        <access>read-write</access>
103326                    </field>
103327                    <field>
103328                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103329                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103330                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103331                        <bitRange>[28:27]</bitRange>
103332                        <access>read-write</access>
103333                        <enumeratedValues>
103334                            <enumeratedValue>
103335                                <name>128</name>
103336                                <value>0</value>
103337                            </enumeratedValue>
103338                            <enumeratedValue>
103339                                <name>256</name>
103340                                <value>1</value>
103341                            </enumeratedValue>
103342                            <enumeratedValue>
103343                                <name>512</name>
103344                                <value>2</value>
103345                            </enumeratedValue>
103346                            <enumeratedValue>
103347                                <name>1024</name>
103348                                <value>3</value>
103349                            </enumeratedValue>
103350                        </enumeratedValues>
103351                    </field>
103352                    <field>
103353                        <name>AVAILABLE_1</name>
103354                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103355                        <bitRange>[26:26]</bitRange>
103356                        <access>read-write</access>
103357                    </field>
103358                    <field>
103359                        <name>LENGTH_1</name>
103360                        <description>The length of the data in buffer 1.</description>
103361                        <bitRange>[25:16]</bitRange>
103362                        <access>read-write</access>
103363                    </field>
103364                    <field>
103365                        <name>FULL_0</name>
103366                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103367                        <bitRange>[15:15]</bitRange>
103368                        <access>read-write</access>
103369                    </field>
103370                    <field>
103371                        <name>LAST_0</name>
103372                        <description>Buffer 0 is the last buffer of the transfer.</description>
103373                        <bitRange>[14:14]</bitRange>
103374                        <access>read-write</access>
103375                    </field>
103376                    <field>
103377                        <name>PID_0</name>
103378                        <description>The data pid of buffer 0.</description>
103379                        <bitRange>[13:13]</bitRange>
103380                        <access>read-write</access>
103381                    </field>
103382                    <field>
103383                        <name>RESET</name>
103384                        <description>Reset the buffer selector to buffer 0.</description>
103385                        <bitRange>[12:12]</bitRange>
103386                        <access>read-write</access>
103387                    </field>
103388                    <field>
103389                        <name>STALL</name>
103390                        <description>Reply with a stall (valid for both buffers).</description>
103391                        <bitRange>[11:11]</bitRange>
103392                        <access>read-write</access>
103393                    </field>
103394                    <field>
103395                        <name>AVAILABLE_0</name>
103396                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103397                        <bitRange>[10:10]</bitRange>
103398                        <access>read-write</access>
103399                    </field>
103400                    <field>
103401                        <name>LENGTH_0</name>
103402                        <description>The length of the data in buffer 1.</description>
103403                        <bitRange>[9:0]</bitRange>
103404                        <access>read-write</access>
103405                    </field>
103406                </fields>
103407            </register>
103408            <register>
103409                <name>EP4_OUT_BUFFER_CONTROL</name>
103410                <addressOffset>0x000000a4</addressOffset>
103411                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103412                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103413                <resetValue>0x00000000</resetValue>
103414                <fields>
103415                    <field>
103416                        <name>FULL_1</name>
103417                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103418                        <bitRange>[31:31]</bitRange>
103419                        <access>read-write</access>
103420                    </field>
103421                    <field>
103422                        <name>LAST_1</name>
103423                        <description>Buffer 1 is the last buffer of the transfer.</description>
103424                        <bitRange>[30:30]</bitRange>
103425                        <access>read-write</access>
103426                    </field>
103427                    <field>
103428                        <name>PID_1</name>
103429                        <description>The data pid of buffer 1.</description>
103430                        <bitRange>[29:29]</bitRange>
103431                        <access>read-write</access>
103432                    </field>
103433                    <field>
103434                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103435                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103436                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103437                        <bitRange>[28:27]</bitRange>
103438                        <access>read-write</access>
103439                        <enumeratedValues>
103440                            <enumeratedValue>
103441                                <name>128</name>
103442                                <value>0</value>
103443                            </enumeratedValue>
103444                            <enumeratedValue>
103445                                <name>256</name>
103446                                <value>1</value>
103447                            </enumeratedValue>
103448                            <enumeratedValue>
103449                                <name>512</name>
103450                                <value>2</value>
103451                            </enumeratedValue>
103452                            <enumeratedValue>
103453                                <name>1024</name>
103454                                <value>3</value>
103455                            </enumeratedValue>
103456                        </enumeratedValues>
103457                    </field>
103458                    <field>
103459                        <name>AVAILABLE_1</name>
103460                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103461                        <bitRange>[26:26]</bitRange>
103462                        <access>read-write</access>
103463                    </field>
103464                    <field>
103465                        <name>LENGTH_1</name>
103466                        <description>The length of the data in buffer 1.</description>
103467                        <bitRange>[25:16]</bitRange>
103468                        <access>read-write</access>
103469                    </field>
103470                    <field>
103471                        <name>FULL_0</name>
103472                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103473                        <bitRange>[15:15]</bitRange>
103474                        <access>read-write</access>
103475                    </field>
103476                    <field>
103477                        <name>LAST_0</name>
103478                        <description>Buffer 0 is the last buffer of the transfer.</description>
103479                        <bitRange>[14:14]</bitRange>
103480                        <access>read-write</access>
103481                    </field>
103482                    <field>
103483                        <name>PID_0</name>
103484                        <description>The data pid of buffer 0.</description>
103485                        <bitRange>[13:13]</bitRange>
103486                        <access>read-write</access>
103487                    </field>
103488                    <field>
103489                        <name>RESET</name>
103490                        <description>Reset the buffer selector to buffer 0.</description>
103491                        <bitRange>[12:12]</bitRange>
103492                        <access>read-write</access>
103493                    </field>
103494                    <field>
103495                        <name>STALL</name>
103496                        <description>Reply with a stall (valid for both buffers).</description>
103497                        <bitRange>[11:11]</bitRange>
103498                        <access>read-write</access>
103499                    </field>
103500                    <field>
103501                        <name>AVAILABLE_0</name>
103502                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103503                        <bitRange>[10:10]</bitRange>
103504                        <access>read-write</access>
103505                    </field>
103506                    <field>
103507                        <name>LENGTH_0</name>
103508                        <description>The length of the data in buffer 1.</description>
103509                        <bitRange>[9:0]</bitRange>
103510                        <access>read-write</access>
103511                    </field>
103512                </fields>
103513            </register>
103514            <register>
103515                <name>EP5_IN_BUFFER_CONTROL</name>
103516                <addressOffset>0x000000a8</addressOffset>
103517                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103518                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103519                <resetValue>0x00000000</resetValue>
103520                <fields>
103521                    <field>
103522                        <name>FULL_1</name>
103523                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103524                        <bitRange>[31:31]</bitRange>
103525                        <access>read-write</access>
103526                    </field>
103527                    <field>
103528                        <name>LAST_1</name>
103529                        <description>Buffer 1 is the last buffer of the transfer.</description>
103530                        <bitRange>[30:30]</bitRange>
103531                        <access>read-write</access>
103532                    </field>
103533                    <field>
103534                        <name>PID_1</name>
103535                        <description>The data pid of buffer 1.</description>
103536                        <bitRange>[29:29]</bitRange>
103537                        <access>read-write</access>
103538                    </field>
103539                    <field>
103540                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103541                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103542                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103543                        <bitRange>[28:27]</bitRange>
103544                        <access>read-write</access>
103545                        <enumeratedValues>
103546                            <enumeratedValue>
103547                                <name>128</name>
103548                                <value>0</value>
103549                            </enumeratedValue>
103550                            <enumeratedValue>
103551                                <name>256</name>
103552                                <value>1</value>
103553                            </enumeratedValue>
103554                            <enumeratedValue>
103555                                <name>512</name>
103556                                <value>2</value>
103557                            </enumeratedValue>
103558                            <enumeratedValue>
103559                                <name>1024</name>
103560                                <value>3</value>
103561                            </enumeratedValue>
103562                        </enumeratedValues>
103563                    </field>
103564                    <field>
103565                        <name>AVAILABLE_1</name>
103566                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103567                        <bitRange>[26:26]</bitRange>
103568                        <access>read-write</access>
103569                    </field>
103570                    <field>
103571                        <name>LENGTH_1</name>
103572                        <description>The length of the data in buffer 1.</description>
103573                        <bitRange>[25:16]</bitRange>
103574                        <access>read-write</access>
103575                    </field>
103576                    <field>
103577                        <name>FULL_0</name>
103578                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103579                        <bitRange>[15:15]</bitRange>
103580                        <access>read-write</access>
103581                    </field>
103582                    <field>
103583                        <name>LAST_0</name>
103584                        <description>Buffer 0 is the last buffer of the transfer.</description>
103585                        <bitRange>[14:14]</bitRange>
103586                        <access>read-write</access>
103587                    </field>
103588                    <field>
103589                        <name>PID_0</name>
103590                        <description>The data pid of buffer 0.</description>
103591                        <bitRange>[13:13]</bitRange>
103592                        <access>read-write</access>
103593                    </field>
103594                    <field>
103595                        <name>RESET</name>
103596                        <description>Reset the buffer selector to buffer 0.</description>
103597                        <bitRange>[12:12]</bitRange>
103598                        <access>read-write</access>
103599                    </field>
103600                    <field>
103601                        <name>STALL</name>
103602                        <description>Reply with a stall (valid for both buffers).</description>
103603                        <bitRange>[11:11]</bitRange>
103604                        <access>read-write</access>
103605                    </field>
103606                    <field>
103607                        <name>AVAILABLE_0</name>
103608                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103609                        <bitRange>[10:10]</bitRange>
103610                        <access>read-write</access>
103611                    </field>
103612                    <field>
103613                        <name>LENGTH_0</name>
103614                        <description>The length of the data in buffer 1.</description>
103615                        <bitRange>[9:0]</bitRange>
103616                        <access>read-write</access>
103617                    </field>
103618                </fields>
103619            </register>
103620            <register>
103621                <name>EP5_OUT_BUFFER_CONTROL</name>
103622                <addressOffset>0x000000ac</addressOffset>
103623                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103624                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103625                <resetValue>0x00000000</resetValue>
103626                <fields>
103627                    <field>
103628                        <name>FULL_1</name>
103629                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103630                        <bitRange>[31:31]</bitRange>
103631                        <access>read-write</access>
103632                    </field>
103633                    <field>
103634                        <name>LAST_1</name>
103635                        <description>Buffer 1 is the last buffer of the transfer.</description>
103636                        <bitRange>[30:30]</bitRange>
103637                        <access>read-write</access>
103638                    </field>
103639                    <field>
103640                        <name>PID_1</name>
103641                        <description>The data pid of buffer 1.</description>
103642                        <bitRange>[29:29]</bitRange>
103643                        <access>read-write</access>
103644                    </field>
103645                    <field>
103646                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103647                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103648                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103649                        <bitRange>[28:27]</bitRange>
103650                        <access>read-write</access>
103651                        <enumeratedValues>
103652                            <enumeratedValue>
103653                                <name>128</name>
103654                                <value>0</value>
103655                            </enumeratedValue>
103656                            <enumeratedValue>
103657                                <name>256</name>
103658                                <value>1</value>
103659                            </enumeratedValue>
103660                            <enumeratedValue>
103661                                <name>512</name>
103662                                <value>2</value>
103663                            </enumeratedValue>
103664                            <enumeratedValue>
103665                                <name>1024</name>
103666                                <value>3</value>
103667                            </enumeratedValue>
103668                        </enumeratedValues>
103669                    </field>
103670                    <field>
103671                        <name>AVAILABLE_1</name>
103672                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103673                        <bitRange>[26:26]</bitRange>
103674                        <access>read-write</access>
103675                    </field>
103676                    <field>
103677                        <name>LENGTH_1</name>
103678                        <description>The length of the data in buffer 1.</description>
103679                        <bitRange>[25:16]</bitRange>
103680                        <access>read-write</access>
103681                    </field>
103682                    <field>
103683                        <name>FULL_0</name>
103684                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103685                        <bitRange>[15:15]</bitRange>
103686                        <access>read-write</access>
103687                    </field>
103688                    <field>
103689                        <name>LAST_0</name>
103690                        <description>Buffer 0 is the last buffer of the transfer.</description>
103691                        <bitRange>[14:14]</bitRange>
103692                        <access>read-write</access>
103693                    </field>
103694                    <field>
103695                        <name>PID_0</name>
103696                        <description>The data pid of buffer 0.</description>
103697                        <bitRange>[13:13]</bitRange>
103698                        <access>read-write</access>
103699                    </field>
103700                    <field>
103701                        <name>RESET</name>
103702                        <description>Reset the buffer selector to buffer 0.</description>
103703                        <bitRange>[12:12]</bitRange>
103704                        <access>read-write</access>
103705                    </field>
103706                    <field>
103707                        <name>STALL</name>
103708                        <description>Reply with a stall (valid for both buffers).</description>
103709                        <bitRange>[11:11]</bitRange>
103710                        <access>read-write</access>
103711                    </field>
103712                    <field>
103713                        <name>AVAILABLE_0</name>
103714                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103715                        <bitRange>[10:10]</bitRange>
103716                        <access>read-write</access>
103717                    </field>
103718                    <field>
103719                        <name>LENGTH_0</name>
103720                        <description>The length of the data in buffer 1.</description>
103721                        <bitRange>[9:0]</bitRange>
103722                        <access>read-write</access>
103723                    </field>
103724                </fields>
103725            </register>
103726            <register>
103727                <name>EP6_IN_BUFFER_CONTROL</name>
103728                <addressOffset>0x000000b0</addressOffset>
103729                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103730                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103731                <resetValue>0x00000000</resetValue>
103732                <fields>
103733                    <field>
103734                        <name>FULL_1</name>
103735                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103736                        <bitRange>[31:31]</bitRange>
103737                        <access>read-write</access>
103738                    </field>
103739                    <field>
103740                        <name>LAST_1</name>
103741                        <description>Buffer 1 is the last buffer of the transfer.</description>
103742                        <bitRange>[30:30]</bitRange>
103743                        <access>read-write</access>
103744                    </field>
103745                    <field>
103746                        <name>PID_1</name>
103747                        <description>The data pid of buffer 1.</description>
103748                        <bitRange>[29:29]</bitRange>
103749                        <access>read-write</access>
103750                    </field>
103751                    <field>
103752                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103753                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103754                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103755                        <bitRange>[28:27]</bitRange>
103756                        <access>read-write</access>
103757                        <enumeratedValues>
103758                            <enumeratedValue>
103759                                <name>128</name>
103760                                <value>0</value>
103761                            </enumeratedValue>
103762                            <enumeratedValue>
103763                                <name>256</name>
103764                                <value>1</value>
103765                            </enumeratedValue>
103766                            <enumeratedValue>
103767                                <name>512</name>
103768                                <value>2</value>
103769                            </enumeratedValue>
103770                            <enumeratedValue>
103771                                <name>1024</name>
103772                                <value>3</value>
103773                            </enumeratedValue>
103774                        </enumeratedValues>
103775                    </field>
103776                    <field>
103777                        <name>AVAILABLE_1</name>
103778                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103779                        <bitRange>[26:26]</bitRange>
103780                        <access>read-write</access>
103781                    </field>
103782                    <field>
103783                        <name>LENGTH_1</name>
103784                        <description>The length of the data in buffer 1.</description>
103785                        <bitRange>[25:16]</bitRange>
103786                        <access>read-write</access>
103787                    </field>
103788                    <field>
103789                        <name>FULL_0</name>
103790                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103791                        <bitRange>[15:15]</bitRange>
103792                        <access>read-write</access>
103793                    </field>
103794                    <field>
103795                        <name>LAST_0</name>
103796                        <description>Buffer 0 is the last buffer of the transfer.</description>
103797                        <bitRange>[14:14]</bitRange>
103798                        <access>read-write</access>
103799                    </field>
103800                    <field>
103801                        <name>PID_0</name>
103802                        <description>The data pid of buffer 0.</description>
103803                        <bitRange>[13:13]</bitRange>
103804                        <access>read-write</access>
103805                    </field>
103806                    <field>
103807                        <name>RESET</name>
103808                        <description>Reset the buffer selector to buffer 0.</description>
103809                        <bitRange>[12:12]</bitRange>
103810                        <access>read-write</access>
103811                    </field>
103812                    <field>
103813                        <name>STALL</name>
103814                        <description>Reply with a stall (valid for both buffers).</description>
103815                        <bitRange>[11:11]</bitRange>
103816                        <access>read-write</access>
103817                    </field>
103818                    <field>
103819                        <name>AVAILABLE_0</name>
103820                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103821                        <bitRange>[10:10]</bitRange>
103822                        <access>read-write</access>
103823                    </field>
103824                    <field>
103825                        <name>LENGTH_0</name>
103826                        <description>The length of the data in buffer 1.</description>
103827                        <bitRange>[9:0]</bitRange>
103828                        <access>read-write</access>
103829                    </field>
103830                </fields>
103831            </register>
103832            <register>
103833                <name>EP6_OUT_BUFFER_CONTROL</name>
103834                <addressOffset>0x000000b4</addressOffset>
103835                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103836                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103837                <resetValue>0x00000000</resetValue>
103838                <fields>
103839                    <field>
103840                        <name>FULL_1</name>
103841                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103842                        <bitRange>[31:31]</bitRange>
103843                        <access>read-write</access>
103844                    </field>
103845                    <field>
103846                        <name>LAST_1</name>
103847                        <description>Buffer 1 is the last buffer of the transfer.</description>
103848                        <bitRange>[30:30]</bitRange>
103849                        <access>read-write</access>
103850                    </field>
103851                    <field>
103852                        <name>PID_1</name>
103853                        <description>The data pid of buffer 1.</description>
103854                        <bitRange>[29:29]</bitRange>
103855                        <access>read-write</access>
103856                    </field>
103857                    <field>
103858                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103859                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103860                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103861                        <bitRange>[28:27]</bitRange>
103862                        <access>read-write</access>
103863                        <enumeratedValues>
103864                            <enumeratedValue>
103865                                <name>128</name>
103866                                <value>0</value>
103867                            </enumeratedValue>
103868                            <enumeratedValue>
103869                                <name>256</name>
103870                                <value>1</value>
103871                            </enumeratedValue>
103872                            <enumeratedValue>
103873                                <name>512</name>
103874                                <value>2</value>
103875                            </enumeratedValue>
103876                            <enumeratedValue>
103877                                <name>1024</name>
103878                                <value>3</value>
103879                            </enumeratedValue>
103880                        </enumeratedValues>
103881                    </field>
103882                    <field>
103883                        <name>AVAILABLE_1</name>
103884                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103885                        <bitRange>[26:26]</bitRange>
103886                        <access>read-write</access>
103887                    </field>
103888                    <field>
103889                        <name>LENGTH_1</name>
103890                        <description>The length of the data in buffer 1.</description>
103891                        <bitRange>[25:16]</bitRange>
103892                        <access>read-write</access>
103893                    </field>
103894                    <field>
103895                        <name>FULL_0</name>
103896                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103897                        <bitRange>[15:15]</bitRange>
103898                        <access>read-write</access>
103899                    </field>
103900                    <field>
103901                        <name>LAST_0</name>
103902                        <description>Buffer 0 is the last buffer of the transfer.</description>
103903                        <bitRange>[14:14]</bitRange>
103904                        <access>read-write</access>
103905                    </field>
103906                    <field>
103907                        <name>PID_0</name>
103908                        <description>The data pid of buffer 0.</description>
103909                        <bitRange>[13:13]</bitRange>
103910                        <access>read-write</access>
103911                    </field>
103912                    <field>
103913                        <name>RESET</name>
103914                        <description>Reset the buffer selector to buffer 0.</description>
103915                        <bitRange>[12:12]</bitRange>
103916                        <access>read-write</access>
103917                    </field>
103918                    <field>
103919                        <name>STALL</name>
103920                        <description>Reply with a stall (valid for both buffers).</description>
103921                        <bitRange>[11:11]</bitRange>
103922                        <access>read-write</access>
103923                    </field>
103924                    <field>
103925                        <name>AVAILABLE_0</name>
103926                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103927                        <bitRange>[10:10]</bitRange>
103928                        <access>read-write</access>
103929                    </field>
103930                    <field>
103931                        <name>LENGTH_0</name>
103932                        <description>The length of the data in buffer 1.</description>
103933                        <bitRange>[9:0]</bitRange>
103934                        <access>read-write</access>
103935                    </field>
103936                </fields>
103937            </register>
103938            <register>
103939                <name>EP7_IN_BUFFER_CONTROL</name>
103940                <addressOffset>0x000000b8</addressOffset>
103941                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
103942                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
103943                <resetValue>0x00000000</resetValue>
103944                <fields>
103945                    <field>
103946                        <name>FULL_1</name>
103947                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
103948                        <bitRange>[31:31]</bitRange>
103949                        <access>read-write</access>
103950                    </field>
103951                    <field>
103952                        <name>LAST_1</name>
103953                        <description>Buffer 1 is the last buffer of the transfer.</description>
103954                        <bitRange>[30:30]</bitRange>
103955                        <access>read-write</access>
103956                    </field>
103957                    <field>
103958                        <name>PID_1</name>
103959                        <description>The data pid of buffer 1.</description>
103960                        <bitRange>[29:29]</bitRange>
103961                        <access>read-write</access>
103962                    </field>
103963                    <field>
103964                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
103965                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103966                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
103967                        <bitRange>[28:27]</bitRange>
103968                        <access>read-write</access>
103969                        <enumeratedValues>
103970                            <enumeratedValue>
103971                                <name>128</name>
103972                                <value>0</value>
103973                            </enumeratedValue>
103974                            <enumeratedValue>
103975                                <name>256</name>
103976                                <value>1</value>
103977                            </enumeratedValue>
103978                            <enumeratedValue>
103979                                <name>512</name>
103980                                <value>2</value>
103981                            </enumeratedValue>
103982                            <enumeratedValue>
103983                                <name>1024</name>
103984                                <value>3</value>
103985                            </enumeratedValue>
103986                        </enumeratedValues>
103987                    </field>
103988                    <field>
103989                        <name>AVAILABLE_1</name>
103990                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
103991                        <bitRange>[26:26]</bitRange>
103992                        <access>read-write</access>
103993                    </field>
103994                    <field>
103995                        <name>LENGTH_1</name>
103996                        <description>The length of the data in buffer 1.</description>
103997                        <bitRange>[25:16]</bitRange>
103998                        <access>read-write</access>
103999                    </field>
104000                    <field>
104001                        <name>FULL_0</name>
104002                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104003                        <bitRange>[15:15]</bitRange>
104004                        <access>read-write</access>
104005                    </field>
104006                    <field>
104007                        <name>LAST_0</name>
104008                        <description>Buffer 0 is the last buffer of the transfer.</description>
104009                        <bitRange>[14:14]</bitRange>
104010                        <access>read-write</access>
104011                    </field>
104012                    <field>
104013                        <name>PID_0</name>
104014                        <description>The data pid of buffer 0.</description>
104015                        <bitRange>[13:13]</bitRange>
104016                        <access>read-write</access>
104017                    </field>
104018                    <field>
104019                        <name>RESET</name>
104020                        <description>Reset the buffer selector to buffer 0.</description>
104021                        <bitRange>[12:12]</bitRange>
104022                        <access>read-write</access>
104023                    </field>
104024                    <field>
104025                        <name>STALL</name>
104026                        <description>Reply with a stall (valid for both buffers).</description>
104027                        <bitRange>[11:11]</bitRange>
104028                        <access>read-write</access>
104029                    </field>
104030                    <field>
104031                        <name>AVAILABLE_0</name>
104032                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104033                        <bitRange>[10:10]</bitRange>
104034                        <access>read-write</access>
104035                    </field>
104036                    <field>
104037                        <name>LENGTH_0</name>
104038                        <description>The length of the data in buffer 1.</description>
104039                        <bitRange>[9:0]</bitRange>
104040                        <access>read-write</access>
104041                    </field>
104042                </fields>
104043            </register>
104044            <register>
104045                <name>EP7_OUT_BUFFER_CONTROL</name>
104046                <addressOffset>0x000000bc</addressOffset>
104047                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104048                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104049                <resetValue>0x00000000</resetValue>
104050                <fields>
104051                    <field>
104052                        <name>FULL_1</name>
104053                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104054                        <bitRange>[31:31]</bitRange>
104055                        <access>read-write</access>
104056                    </field>
104057                    <field>
104058                        <name>LAST_1</name>
104059                        <description>Buffer 1 is the last buffer of the transfer.</description>
104060                        <bitRange>[30:30]</bitRange>
104061                        <access>read-write</access>
104062                    </field>
104063                    <field>
104064                        <name>PID_1</name>
104065                        <description>The data pid of buffer 1.</description>
104066                        <bitRange>[29:29]</bitRange>
104067                        <access>read-write</access>
104068                    </field>
104069                    <field>
104070                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104071                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104072                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104073                        <bitRange>[28:27]</bitRange>
104074                        <access>read-write</access>
104075                        <enumeratedValues>
104076                            <enumeratedValue>
104077                                <name>128</name>
104078                                <value>0</value>
104079                            </enumeratedValue>
104080                            <enumeratedValue>
104081                                <name>256</name>
104082                                <value>1</value>
104083                            </enumeratedValue>
104084                            <enumeratedValue>
104085                                <name>512</name>
104086                                <value>2</value>
104087                            </enumeratedValue>
104088                            <enumeratedValue>
104089                                <name>1024</name>
104090                                <value>3</value>
104091                            </enumeratedValue>
104092                        </enumeratedValues>
104093                    </field>
104094                    <field>
104095                        <name>AVAILABLE_1</name>
104096                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104097                        <bitRange>[26:26]</bitRange>
104098                        <access>read-write</access>
104099                    </field>
104100                    <field>
104101                        <name>LENGTH_1</name>
104102                        <description>The length of the data in buffer 1.</description>
104103                        <bitRange>[25:16]</bitRange>
104104                        <access>read-write</access>
104105                    </field>
104106                    <field>
104107                        <name>FULL_0</name>
104108                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104109                        <bitRange>[15:15]</bitRange>
104110                        <access>read-write</access>
104111                    </field>
104112                    <field>
104113                        <name>LAST_0</name>
104114                        <description>Buffer 0 is the last buffer of the transfer.</description>
104115                        <bitRange>[14:14]</bitRange>
104116                        <access>read-write</access>
104117                    </field>
104118                    <field>
104119                        <name>PID_0</name>
104120                        <description>The data pid of buffer 0.</description>
104121                        <bitRange>[13:13]</bitRange>
104122                        <access>read-write</access>
104123                    </field>
104124                    <field>
104125                        <name>RESET</name>
104126                        <description>Reset the buffer selector to buffer 0.</description>
104127                        <bitRange>[12:12]</bitRange>
104128                        <access>read-write</access>
104129                    </field>
104130                    <field>
104131                        <name>STALL</name>
104132                        <description>Reply with a stall (valid for both buffers).</description>
104133                        <bitRange>[11:11]</bitRange>
104134                        <access>read-write</access>
104135                    </field>
104136                    <field>
104137                        <name>AVAILABLE_0</name>
104138                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104139                        <bitRange>[10:10]</bitRange>
104140                        <access>read-write</access>
104141                    </field>
104142                    <field>
104143                        <name>LENGTH_0</name>
104144                        <description>The length of the data in buffer 1.</description>
104145                        <bitRange>[9:0]</bitRange>
104146                        <access>read-write</access>
104147                    </field>
104148                </fields>
104149            </register>
104150            <register>
104151                <name>EP8_IN_BUFFER_CONTROL</name>
104152                <addressOffset>0x000000c0</addressOffset>
104153                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104154                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104155                <resetValue>0x00000000</resetValue>
104156                <fields>
104157                    <field>
104158                        <name>FULL_1</name>
104159                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104160                        <bitRange>[31:31]</bitRange>
104161                        <access>read-write</access>
104162                    </field>
104163                    <field>
104164                        <name>LAST_1</name>
104165                        <description>Buffer 1 is the last buffer of the transfer.</description>
104166                        <bitRange>[30:30]</bitRange>
104167                        <access>read-write</access>
104168                    </field>
104169                    <field>
104170                        <name>PID_1</name>
104171                        <description>The data pid of buffer 1.</description>
104172                        <bitRange>[29:29]</bitRange>
104173                        <access>read-write</access>
104174                    </field>
104175                    <field>
104176                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104177                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104178                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104179                        <bitRange>[28:27]</bitRange>
104180                        <access>read-write</access>
104181                        <enumeratedValues>
104182                            <enumeratedValue>
104183                                <name>128</name>
104184                                <value>0</value>
104185                            </enumeratedValue>
104186                            <enumeratedValue>
104187                                <name>256</name>
104188                                <value>1</value>
104189                            </enumeratedValue>
104190                            <enumeratedValue>
104191                                <name>512</name>
104192                                <value>2</value>
104193                            </enumeratedValue>
104194                            <enumeratedValue>
104195                                <name>1024</name>
104196                                <value>3</value>
104197                            </enumeratedValue>
104198                        </enumeratedValues>
104199                    </field>
104200                    <field>
104201                        <name>AVAILABLE_1</name>
104202                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104203                        <bitRange>[26:26]</bitRange>
104204                        <access>read-write</access>
104205                    </field>
104206                    <field>
104207                        <name>LENGTH_1</name>
104208                        <description>The length of the data in buffer 1.</description>
104209                        <bitRange>[25:16]</bitRange>
104210                        <access>read-write</access>
104211                    </field>
104212                    <field>
104213                        <name>FULL_0</name>
104214                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104215                        <bitRange>[15:15]</bitRange>
104216                        <access>read-write</access>
104217                    </field>
104218                    <field>
104219                        <name>LAST_0</name>
104220                        <description>Buffer 0 is the last buffer of the transfer.</description>
104221                        <bitRange>[14:14]</bitRange>
104222                        <access>read-write</access>
104223                    </field>
104224                    <field>
104225                        <name>PID_0</name>
104226                        <description>The data pid of buffer 0.</description>
104227                        <bitRange>[13:13]</bitRange>
104228                        <access>read-write</access>
104229                    </field>
104230                    <field>
104231                        <name>RESET</name>
104232                        <description>Reset the buffer selector to buffer 0.</description>
104233                        <bitRange>[12:12]</bitRange>
104234                        <access>read-write</access>
104235                    </field>
104236                    <field>
104237                        <name>STALL</name>
104238                        <description>Reply with a stall (valid for both buffers).</description>
104239                        <bitRange>[11:11]</bitRange>
104240                        <access>read-write</access>
104241                    </field>
104242                    <field>
104243                        <name>AVAILABLE_0</name>
104244                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104245                        <bitRange>[10:10]</bitRange>
104246                        <access>read-write</access>
104247                    </field>
104248                    <field>
104249                        <name>LENGTH_0</name>
104250                        <description>The length of the data in buffer 1.</description>
104251                        <bitRange>[9:0]</bitRange>
104252                        <access>read-write</access>
104253                    </field>
104254                </fields>
104255            </register>
104256            <register>
104257                <name>EP8_OUT_BUFFER_CONTROL</name>
104258                <addressOffset>0x000000c4</addressOffset>
104259                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104260                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104261                <resetValue>0x00000000</resetValue>
104262                <fields>
104263                    <field>
104264                        <name>FULL_1</name>
104265                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104266                        <bitRange>[31:31]</bitRange>
104267                        <access>read-write</access>
104268                    </field>
104269                    <field>
104270                        <name>LAST_1</name>
104271                        <description>Buffer 1 is the last buffer of the transfer.</description>
104272                        <bitRange>[30:30]</bitRange>
104273                        <access>read-write</access>
104274                    </field>
104275                    <field>
104276                        <name>PID_1</name>
104277                        <description>The data pid of buffer 1.</description>
104278                        <bitRange>[29:29]</bitRange>
104279                        <access>read-write</access>
104280                    </field>
104281                    <field>
104282                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104283                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104284                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104285                        <bitRange>[28:27]</bitRange>
104286                        <access>read-write</access>
104287                        <enumeratedValues>
104288                            <enumeratedValue>
104289                                <name>128</name>
104290                                <value>0</value>
104291                            </enumeratedValue>
104292                            <enumeratedValue>
104293                                <name>256</name>
104294                                <value>1</value>
104295                            </enumeratedValue>
104296                            <enumeratedValue>
104297                                <name>512</name>
104298                                <value>2</value>
104299                            </enumeratedValue>
104300                            <enumeratedValue>
104301                                <name>1024</name>
104302                                <value>3</value>
104303                            </enumeratedValue>
104304                        </enumeratedValues>
104305                    </field>
104306                    <field>
104307                        <name>AVAILABLE_1</name>
104308                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104309                        <bitRange>[26:26]</bitRange>
104310                        <access>read-write</access>
104311                    </field>
104312                    <field>
104313                        <name>LENGTH_1</name>
104314                        <description>The length of the data in buffer 1.</description>
104315                        <bitRange>[25:16]</bitRange>
104316                        <access>read-write</access>
104317                    </field>
104318                    <field>
104319                        <name>FULL_0</name>
104320                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104321                        <bitRange>[15:15]</bitRange>
104322                        <access>read-write</access>
104323                    </field>
104324                    <field>
104325                        <name>LAST_0</name>
104326                        <description>Buffer 0 is the last buffer of the transfer.</description>
104327                        <bitRange>[14:14]</bitRange>
104328                        <access>read-write</access>
104329                    </field>
104330                    <field>
104331                        <name>PID_0</name>
104332                        <description>The data pid of buffer 0.</description>
104333                        <bitRange>[13:13]</bitRange>
104334                        <access>read-write</access>
104335                    </field>
104336                    <field>
104337                        <name>RESET</name>
104338                        <description>Reset the buffer selector to buffer 0.</description>
104339                        <bitRange>[12:12]</bitRange>
104340                        <access>read-write</access>
104341                    </field>
104342                    <field>
104343                        <name>STALL</name>
104344                        <description>Reply with a stall (valid for both buffers).</description>
104345                        <bitRange>[11:11]</bitRange>
104346                        <access>read-write</access>
104347                    </field>
104348                    <field>
104349                        <name>AVAILABLE_0</name>
104350                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104351                        <bitRange>[10:10]</bitRange>
104352                        <access>read-write</access>
104353                    </field>
104354                    <field>
104355                        <name>LENGTH_0</name>
104356                        <description>The length of the data in buffer 1.</description>
104357                        <bitRange>[9:0]</bitRange>
104358                        <access>read-write</access>
104359                    </field>
104360                </fields>
104361            </register>
104362            <register>
104363                <name>EP9_IN_BUFFER_CONTROL</name>
104364                <addressOffset>0x000000c8</addressOffset>
104365                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104366                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104367                <resetValue>0x00000000</resetValue>
104368                <fields>
104369                    <field>
104370                        <name>FULL_1</name>
104371                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104372                        <bitRange>[31:31]</bitRange>
104373                        <access>read-write</access>
104374                    </field>
104375                    <field>
104376                        <name>LAST_1</name>
104377                        <description>Buffer 1 is the last buffer of the transfer.</description>
104378                        <bitRange>[30:30]</bitRange>
104379                        <access>read-write</access>
104380                    </field>
104381                    <field>
104382                        <name>PID_1</name>
104383                        <description>The data pid of buffer 1.</description>
104384                        <bitRange>[29:29]</bitRange>
104385                        <access>read-write</access>
104386                    </field>
104387                    <field>
104388                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104389                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104390                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104391                        <bitRange>[28:27]</bitRange>
104392                        <access>read-write</access>
104393                        <enumeratedValues>
104394                            <enumeratedValue>
104395                                <name>128</name>
104396                                <value>0</value>
104397                            </enumeratedValue>
104398                            <enumeratedValue>
104399                                <name>256</name>
104400                                <value>1</value>
104401                            </enumeratedValue>
104402                            <enumeratedValue>
104403                                <name>512</name>
104404                                <value>2</value>
104405                            </enumeratedValue>
104406                            <enumeratedValue>
104407                                <name>1024</name>
104408                                <value>3</value>
104409                            </enumeratedValue>
104410                        </enumeratedValues>
104411                    </field>
104412                    <field>
104413                        <name>AVAILABLE_1</name>
104414                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104415                        <bitRange>[26:26]</bitRange>
104416                        <access>read-write</access>
104417                    </field>
104418                    <field>
104419                        <name>LENGTH_1</name>
104420                        <description>The length of the data in buffer 1.</description>
104421                        <bitRange>[25:16]</bitRange>
104422                        <access>read-write</access>
104423                    </field>
104424                    <field>
104425                        <name>FULL_0</name>
104426                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104427                        <bitRange>[15:15]</bitRange>
104428                        <access>read-write</access>
104429                    </field>
104430                    <field>
104431                        <name>LAST_0</name>
104432                        <description>Buffer 0 is the last buffer of the transfer.</description>
104433                        <bitRange>[14:14]</bitRange>
104434                        <access>read-write</access>
104435                    </field>
104436                    <field>
104437                        <name>PID_0</name>
104438                        <description>The data pid of buffer 0.</description>
104439                        <bitRange>[13:13]</bitRange>
104440                        <access>read-write</access>
104441                    </field>
104442                    <field>
104443                        <name>RESET</name>
104444                        <description>Reset the buffer selector to buffer 0.</description>
104445                        <bitRange>[12:12]</bitRange>
104446                        <access>read-write</access>
104447                    </field>
104448                    <field>
104449                        <name>STALL</name>
104450                        <description>Reply with a stall (valid for both buffers).</description>
104451                        <bitRange>[11:11]</bitRange>
104452                        <access>read-write</access>
104453                    </field>
104454                    <field>
104455                        <name>AVAILABLE_0</name>
104456                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104457                        <bitRange>[10:10]</bitRange>
104458                        <access>read-write</access>
104459                    </field>
104460                    <field>
104461                        <name>LENGTH_0</name>
104462                        <description>The length of the data in buffer 1.</description>
104463                        <bitRange>[9:0]</bitRange>
104464                        <access>read-write</access>
104465                    </field>
104466                </fields>
104467            </register>
104468            <register>
104469                <name>EP9_OUT_BUFFER_CONTROL</name>
104470                <addressOffset>0x000000cc</addressOffset>
104471                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104472                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104473                <resetValue>0x00000000</resetValue>
104474                <fields>
104475                    <field>
104476                        <name>FULL_1</name>
104477                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104478                        <bitRange>[31:31]</bitRange>
104479                        <access>read-write</access>
104480                    </field>
104481                    <field>
104482                        <name>LAST_1</name>
104483                        <description>Buffer 1 is the last buffer of the transfer.</description>
104484                        <bitRange>[30:30]</bitRange>
104485                        <access>read-write</access>
104486                    </field>
104487                    <field>
104488                        <name>PID_1</name>
104489                        <description>The data pid of buffer 1.</description>
104490                        <bitRange>[29:29]</bitRange>
104491                        <access>read-write</access>
104492                    </field>
104493                    <field>
104494                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104495                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104496                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104497                        <bitRange>[28:27]</bitRange>
104498                        <access>read-write</access>
104499                        <enumeratedValues>
104500                            <enumeratedValue>
104501                                <name>128</name>
104502                                <value>0</value>
104503                            </enumeratedValue>
104504                            <enumeratedValue>
104505                                <name>256</name>
104506                                <value>1</value>
104507                            </enumeratedValue>
104508                            <enumeratedValue>
104509                                <name>512</name>
104510                                <value>2</value>
104511                            </enumeratedValue>
104512                            <enumeratedValue>
104513                                <name>1024</name>
104514                                <value>3</value>
104515                            </enumeratedValue>
104516                        </enumeratedValues>
104517                    </field>
104518                    <field>
104519                        <name>AVAILABLE_1</name>
104520                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104521                        <bitRange>[26:26]</bitRange>
104522                        <access>read-write</access>
104523                    </field>
104524                    <field>
104525                        <name>LENGTH_1</name>
104526                        <description>The length of the data in buffer 1.</description>
104527                        <bitRange>[25:16]</bitRange>
104528                        <access>read-write</access>
104529                    </field>
104530                    <field>
104531                        <name>FULL_0</name>
104532                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104533                        <bitRange>[15:15]</bitRange>
104534                        <access>read-write</access>
104535                    </field>
104536                    <field>
104537                        <name>LAST_0</name>
104538                        <description>Buffer 0 is the last buffer of the transfer.</description>
104539                        <bitRange>[14:14]</bitRange>
104540                        <access>read-write</access>
104541                    </field>
104542                    <field>
104543                        <name>PID_0</name>
104544                        <description>The data pid of buffer 0.</description>
104545                        <bitRange>[13:13]</bitRange>
104546                        <access>read-write</access>
104547                    </field>
104548                    <field>
104549                        <name>RESET</name>
104550                        <description>Reset the buffer selector to buffer 0.</description>
104551                        <bitRange>[12:12]</bitRange>
104552                        <access>read-write</access>
104553                    </field>
104554                    <field>
104555                        <name>STALL</name>
104556                        <description>Reply with a stall (valid for both buffers).</description>
104557                        <bitRange>[11:11]</bitRange>
104558                        <access>read-write</access>
104559                    </field>
104560                    <field>
104561                        <name>AVAILABLE_0</name>
104562                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104563                        <bitRange>[10:10]</bitRange>
104564                        <access>read-write</access>
104565                    </field>
104566                    <field>
104567                        <name>LENGTH_0</name>
104568                        <description>The length of the data in buffer 1.</description>
104569                        <bitRange>[9:0]</bitRange>
104570                        <access>read-write</access>
104571                    </field>
104572                </fields>
104573            </register>
104574            <register>
104575                <name>EP10_IN_BUFFER_CONTROL</name>
104576                <addressOffset>0x000000d0</addressOffset>
104577                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104578                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104579                <resetValue>0x00000000</resetValue>
104580                <fields>
104581                    <field>
104582                        <name>FULL_1</name>
104583                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104584                        <bitRange>[31:31]</bitRange>
104585                        <access>read-write</access>
104586                    </field>
104587                    <field>
104588                        <name>LAST_1</name>
104589                        <description>Buffer 1 is the last buffer of the transfer.</description>
104590                        <bitRange>[30:30]</bitRange>
104591                        <access>read-write</access>
104592                    </field>
104593                    <field>
104594                        <name>PID_1</name>
104595                        <description>The data pid of buffer 1.</description>
104596                        <bitRange>[29:29]</bitRange>
104597                        <access>read-write</access>
104598                    </field>
104599                    <field>
104600                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104601                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104602                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104603                        <bitRange>[28:27]</bitRange>
104604                        <access>read-write</access>
104605                        <enumeratedValues>
104606                            <enumeratedValue>
104607                                <name>128</name>
104608                                <value>0</value>
104609                            </enumeratedValue>
104610                            <enumeratedValue>
104611                                <name>256</name>
104612                                <value>1</value>
104613                            </enumeratedValue>
104614                            <enumeratedValue>
104615                                <name>512</name>
104616                                <value>2</value>
104617                            </enumeratedValue>
104618                            <enumeratedValue>
104619                                <name>1024</name>
104620                                <value>3</value>
104621                            </enumeratedValue>
104622                        </enumeratedValues>
104623                    </field>
104624                    <field>
104625                        <name>AVAILABLE_1</name>
104626                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104627                        <bitRange>[26:26]</bitRange>
104628                        <access>read-write</access>
104629                    </field>
104630                    <field>
104631                        <name>LENGTH_1</name>
104632                        <description>The length of the data in buffer 1.</description>
104633                        <bitRange>[25:16]</bitRange>
104634                        <access>read-write</access>
104635                    </field>
104636                    <field>
104637                        <name>FULL_0</name>
104638                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104639                        <bitRange>[15:15]</bitRange>
104640                        <access>read-write</access>
104641                    </field>
104642                    <field>
104643                        <name>LAST_0</name>
104644                        <description>Buffer 0 is the last buffer of the transfer.</description>
104645                        <bitRange>[14:14]</bitRange>
104646                        <access>read-write</access>
104647                    </field>
104648                    <field>
104649                        <name>PID_0</name>
104650                        <description>The data pid of buffer 0.</description>
104651                        <bitRange>[13:13]</bitRange>
104652                        <access>read-write</access>
104653                    </field>
104654                    <field>
104655                        <name>RESET</name>
104656                        <description>Reset the buffer selector to buffer 0.</description>
104657                        <bitRange>[12:12]</bitRange>
104658                        <access>read-write</access>
104659                    </field>
104660                    <field>
104661                        <name>STALL</name>
104662                        <description>Reply with a stall (valid for both buffers).</description>
104663                        <bitRange>[11:11]</bitRange>
104664                        <access>read-write</access>
104665                    </field>
104666                    <field>
104667                        <name>AVAILABLE_0</name>
104668                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104669                        <bitRange>[10:10]</bitRange>
104670                        <access>read-write</access>
104671                    </field>
104672                    <field>
104673                        <name>LENGTH_0</name>
104674                        <description>The length of the data in buffer 1.</description>
104675                        <bitRange>[9:0]</bitRange>
104676                        <access>read-write</access>
104677                    </field>
104678                </fields>
104679            </register>
104680            <register>
104681                <name>EP10_OUT_BUFFER_CONTROL</name>
104682                <addressOffset>0x000000d4</addressOffset>
104683                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104684                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104685                <resetValue>0x00000000</resetValue>
104686                <fields>
104687                    <field>
104688                        <name>FULL_1</name>
104689                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104690                        <bitRange>[31:31]</bitRange>
104691                        <access>read-write</access>
104692                    </field>
104693                    <field>
104694                        <name>LAST_1</name>
104695                        <description>Buffer 1 is the last buffer of the transfer.</description>
104696                        <bitRange>[30:30]</bitRange>
104697                        <access>read-write</access>
104698                    </field>
104699                    <field>
104700                        <name>PID_1</name>
104701                        <description>The data pid of buffer 1.</description>
104702                        <bitRange>[29:29]</bitRange>
104703                        <access>read-write</access>
104704                    </field>
104705                    <field>
104706                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104707                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104708                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104709                        <bitRange>[28:27]</bitRange>
104710                        <access>read-write</access>
104711                        <enumeratedValues>
104712                            <enumeratedValue>
104713                                <name>128</name>
104714                                <value>0</value>
104715                            </enumeratedValue>
104716                            <enumeratedValue>
104717                                <name>256</name>
104718                                <value>1</value>
104719                            </enumeratedValue>
104720                            <enumeratedValue>
104721                                <name>512</name>
104722                                <value>2</value>
104723                            </enumeratedValue>
104724                            <enumeratedValue>
104725                                <name>1024</name>
104726                                <value>3</value>
104727                            </enumeratedValue>
104728                        </enumeratedValues>
104729                    </field>
104730                    <field>
104731                        <name>AVAILABLE_1</name>
104732                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104733                        <bitRange>[26:26]</bitRange>
104734                        <access>read-write</access>
104735                    </field>
104736                    <field>
104737                        <name>LENGTH_1</name>
104738                        <description>The length of the data in buffer 1.</description>
104739                        <bitRange>[25:16]</bitRange>
104740                        <access>read-write</access>
104741                    </field>
104742                    <field>
104743                        <name>FULL_0</name>
104744                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104745                        <bitRange>[15:15]</bitRange>
104746                        <access>read-write</access>
104747                    </field>
104748                    <field>
104749                        <name>LAST_0</name>
104750                        <description>Buffer 0 is the last buffer of the transfer.</description>
104751                        <bitRange>[14:14]</bitRange>
104752                        <access>read-write</access>
104753                    </field>
104754                    <field>
104755                        <name>PID_0</name>
104756                        <description>The data pid of buffer 0.</description>
104757                        <bitRange>[13:13]</bitRange>
104758                        <access>read-write</access>
104759                    </field>
104760                    <field>
104761                        <name>RESET</name>
104762                        <description>Reset the buffer selector to buffer 0.</description>
104763                        <bitRange>[12:12]</bitRange>
104764                        <access>read-write</access>
104765                    </field>
104766                    <field>
104767                        <name>STALL</name>
104768                        <description>Reply with a stall (valid for both buffers).</description>
104769                        <bitRange>[11:11]</bitRange>
104770                        <access>read-write</access>
104771                    </field>
104772                    <field>
104773                        <name>AVAILABLE_0</name>
104774                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104775                        <bitRange>[10:10]</bitRange>
104776                        <access>read-write</access>
104777                    </field>
104778                    <field>
104779                        <name>LENGTH_0</name>
104780                        <description>The length of the data in buffer 1.</description>
104781                        <bitRange>[9:0]</bitRange>
104782                        <access>read-write</access>
104783                    </field>
104784                </fields>
104785            </register>
104786            <register>
104787                <name>EP11_IN_BUFFER_CONTROL</name>
104788                <addressOffset>0x000000d8</addressOffset>
104789                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104790                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104791                <resetValue>0x00000000</resetValue>
104792                <fields>
104793                    <field>
104794                        <name>FULL_1</name>
104795                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104796                        <bitRange>[31:31]</bitRange>
104797                        <access>read-write</access>
104798                    </field>
104799                    <field>
104800                        <name>LAST_1</name>
104801                        <description>Buffer 1 is the last buffer of the transfer.</description>
104802                        <bitRange>[30:30]</bitRange>
104803                        <access>read-write</access>
104804                    </field>
104805                    <field>
104806                        <name>PID_1</name>
104807                        <description>The data pid of buffer 1.</description>
104808                        <bitRange>[29:29]</bitRange>
104809                        <access>read-write</access>
104810                    </field>
104811                    <field>
104812                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104813                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104814                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104815                        <bitRange>[28:27]</bitRange>
104816                        <access>read-write</access>
104817                        <enumeratedValues>
104818                            <enumeratedValue>
104819                                <name>128</name>
104820                                <value>0</value>
104821                            </enumeratedValue>
104822                            <enumeratedValue>
104823                                <name>256</name>
104824                                <value>1</value>
104825                            </enumeratedValue>
104826                            <enumeratedValue>
104827                                <name>512</name>
104828                                <value>2</value>
104829                            </enumeratedValue>
104830                            <enumeratedValue>
104831                                <name>1024</name>
104832                                <value>3</value>
104833                            </enumeratedValue>
104834                        </enumeratedValues>
104835                    </field>
104836                    <field>
104837                        <name>AVAILABLE_1</name>
104838                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104839                        <bitRange>[26:26]</bitRange>
104840                        <access>read-write</access>
104841                    </field>
104842                    <field>
104843                        <name>LENGTH_1</name>
104844                        <description>The length of the data in buffer 1.</description>
104845                        <bitRange>[25:16]</bitRange>
104846                        <access>read-write</access>
104847                    </field>
104848                    <field>
104849                        <name>FULL_0</name>
104850                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104851                        <bitRange>[15:15]</bitRange>
104852                        <access>read-write</access>
104853                    </field>
104854                    <field>
104855                        <name>LAST_0</name>
104856                        <description>Buffer 0 is the last buffer of the transfer.</description>
104857                        <bitRange>[14:14]</bitRange>
104858                        <access>read-write</access>
104859                    </field>
104860                    <field>
104861                        <name>PID_0</name>
104862                        <description>The data pid of buffer 0.</description>
104863                        <bitRange>[13:13]</bitRange>
104864                        <access>read-write</access>
104865                    </field>
104866                    <field>
104867                        <name>RESET</name>
104868                        <description>Reset the buffer selector to buffer 0.</description>
104869                        <bitRange>[12:12]</bitRange>
104870                        <access>read-write</access>
104871                    </field>
104872                    <field>
104873                        <name>STALL</name>
104874                        <description>Reply with a stall (valid for both buffers).</description>
104875                        <bitRange>[11:11]</bitRange>
104876                        <access>read-write</access>
104877                    </field>
104878                    <field>
104879                        <name>AVAILABLE_0</name>
104880                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104881                        <bitRange>[10:10]</bitRange>
104882                        <access>read-write</access>
104883                    </field>
104884                    <field>
104885                        <name>LENGTH_0</name>
104886                        <description>The length of the data in buffer 1.</description>
104887                        <bitRange>[9:0]</bitRange>
104888                        <access>read-write</access>
104889                    </field>
104890                </fields>
104891            </register>
104892            <register>
104893                <name>EP11_OUT_BUFFER_CONTROL</name>
104894                <addressOffset>0x000000dc</addressOffset>
104895                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
104896                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
104897                <resetValue>0x00000000</resetValue>
104898                <fields>
104899                    <field>
104900                        <name>FULL_1</name>
104901                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104902                        <bitRange>[31:31]</bitRange>
104903                        <access>read-write</access>
104904                    </field>
104905                    <field>
104906                        <name>LAST_1</name>
104907                        <description>Buffer 1 is the last buffer of the transfer.</description>
104908                        <bitRange>[30:30]</bitRange>
104909                        <access>read-write</access>
104910                    </field>
104911                    <field>
104912                        <name>PID_1</name>
104913                        <description>The data pid of buffer 1.</description>
104914                        <bitRange>[29:29]</bitRange>
104915                        <access>read-write</access>
104916                    </field>
104917                    <field>
104918                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
104919                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
104920                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
104921                        <bitRange>[28:27]</bitRange>
104922                        <access>read-write</access>
104923                        <enumeratedValues>
104924                            <enumeratedValue>
104925                                <name>128</name>
104926                                <value>0</value>
104927                            </enumeratedValue>
104928                            <enumeratedValue>
104929                                <name>256</name>
104930                                <value>1</value>
104931                            </enumeratedValue>
104932                            <enumeratedValue>
104933                                <name>512</name>
104934                                <value>2</value>
104935                            </enumeratedValue>
104936                            <enumeratedValue>
104937                                <name>1024</name>
104938                                <value>3</value>
104939                            </enumeratedValue>
104940                        </enumeratedValues>
104941                    </field>
104942                    <field>
104943                        <name>AVAILABLE_1</name>
104944                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104945                        <bitRange>[26:26]</bitRange>
104946                        <access>read-write</access>
104947                    </field>
104948                    <field>
104949                        <name>LENGTH_1</name>
104950                        <description>The length of the data in buffer 1.</description>
104951                        <bitRange>[25:16]</bitRange>
104952                        <access>read-write</access>
104953                    </field>
104954                    <field>
104955                        <name>FULL_0</name>
104956                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
104957                        <bitRange>[15:15]</bitRange>
104958                        <access>read-write</access>
104959                    </field>
104960                    <field>
104961                        <name>LAST_0</name>
104962                        <description>Buffer 0 is the last buffer of the transfer.</description>
104963                        <bitRange>[14:14]</bitRange>
104964                        <access>read-write</access>
104965                    </field>
104966                    <field>
104967                        <name>PID_0</name>
104968                        <description>The data pid of buffer 0.</description>
104969                        <bitRange>[13:13]</bitRange>
104970                        <access>read-write</access>
104971                    </field>
104972                    <field>
104973                        <name>RESET</name>
104974                        <description>Reset the buffer selector to buffer 0.</description>
104975                        <bitRange>[12:12]</bitRange>
104976                        <access>read-write</access>
104977                    </field>
104978                    <field>
104979                        <name>STALL</name>
104980                        <description>Reply with a stall (valid for both buffers).</description>
104981                        <bitRange>[11:11]</bitRange>
104982                        <access>read-write</access>
104983                    </field>
104984                    <field>
104985                        <name>AVAILABLE_0</name>
104986                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
104987                        <bitRange>[10:10]</bitRange>
104988                        <access>read-write</access>
104989                    </field>
104990                    <field>
104991                        <name>LENGTH_0</name>
104992                        <description>The length of the data in buffer 1.</description>
104993                        <bitRange>[9:0]</bitRange>
104994                        <access>read-write</access>
104995                    </field>
104996                </fields>
104997            </register>
104998            <register>
104999                <name>EP12_IN_BUFFER_CONTROL</name>
105000                <addressOffset>0x000000e0</addressOffset>
105001                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105002                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105003                <resetValue>0x00000000</resetValue>
105004                <fields>
105005                    <field>
105006                        <name>FULL_1</name>
105007                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105008                        <bitRange>[31:31]</bitRange>
105009                        <access>read-write</access>
105010                    </field>
105011                    <field>
105012                        <name>LAST_1</name>
105013                        <description>Buffer 1 is the last buffer of the transfer.</description>
105014                        <bitRange>[30:30]</bitRange>
105015                        <access>read-write</access>
105016                    </field>
105017                    <field>
105018                        <name>PID_1</name>
105019                        <description>The data pid of buffer 1.</description>
105020                        <bitRange>[29:29]</bitRange>
105021                        <access>read-write</access>
105022                    </field>
105023                    <field>
105024                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105025                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105026                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105027                        <bitRange>[28:27]</bitRange>
105028                        <access>read-write</access>
105029                        <enumeratedValues>
105030                            <enumeratedValue>
105031                                <name>128</name>
105032                                <value>0</value>
105033                            </enumeratedValue>
105034                            <enumeratedValue>
105035                                <name>256</name>
105036                                <value>1</value>
105037                            </enumeratedValue>
105038                            <enumeratedValue>
105039                                <name>512</name>
105040                                <value>2</value>
105041                            </enumeratedValue>
105042                            <enumeratedValue>
105043                                <name>1024</name>
105044                                <value>3</value>
105045                            </enumeratedValue>
105046                        </enumeratedValues>
105047                    </field>
105048                    <field>
105049                        <name>AVAILABLE_1</name>
105050                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105051                        <bitRange>[26:26]</bitRange>
105052                        <access>read-write</access>
105053                    </field>
105054                    <field>
105055                        <name>LENGTH_1</name>
105056                        <description>The length of the data in buffer 1.</description>
105057                        <bitRange>[25:16]</bitRange>
105058                        <access>read-write</access>
105059                    </field>
105060                    <field>
105061                        <name>FULL_0</name>
105062                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105063                        <bitRange>[15:15]</bitRange>
105064                        <access>read-write</access>
105065                    </field>
105066                    <field>
105067                        <name>LAST_0</name>
105068                        <description>Buffer 0 is the last buffer of the transfer.</description>
105069                        <bitRange>[14:14]</bitRange>
105070                        <access>read-write</access>
105071                    </field>
105072                    <field>
105073                        <name>PID_0</name>
105074                        <description>The data pid of buffer 0.</description>
105075                        <bitRange>[13:13]</bitRange>
105076                        <access>read-write</access>
105077                    </field>
105078                    <field>
105079                        <name>RESET</name>
105080                        <description>Reset the buffer selector to buffer 0.</description>
105081                        <bitRange>[12:12]</bitRange>
105082                        <access>read-write</access>
105083                    </field>
105084                    <field>
105085                        <name>STALL</name>
105086                        <description>Reply with a stall (valid for both buffers).</description>
105087                        <bitRange>[11:11]</bitRange>
105088                        <access>read-write</access>
105089                    </field>
105090                    <field>
105091                        <name>AVAILABLE_0</name>
105092                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105093                        <bitRange>[10:10]</bitRange>
105094                        <access>read-write</access>
105095                    </field>
105096                    <field>
105097                        <name>LENGTH_0</name>
105098                        <description>The length of the data in buffer 1.</description>
105099                        <bitRange>[9:0]</bitRange>
105100                        <access>read-write</access>
105101                    </field>
105102                </fields>
105103            </register>
105104            <register>
105105                <name>EP12_OUT_BUFFER_CONTROL</name>
105106                <addressOffset>0x000000e4</addressOffset>
105107                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105108                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105109                <resetValue>0x00000000</resetValue>
105110                <fields>
105111                    <field>
105112                        <name>FULL_1</name>
105113                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105114                        <bitRange>[31:31]</bitRange>
105115                        <access>read-write</access>
105116                    </field>
105117                    <field>
105118                        <name>LAST_1</name>
105119                        <description>Buffer 1 is the last buffer of the transfer.</description>
105120                        <bitRange>[30:30]</bitRange>
105121                        <access>read-write</access>
105122                    </field>
105123                    <field>
105124                        <name>PID_1</name>
105125                        <description>The data pid of buffer 1.</description>
105126                        <bitRange>[29:29]</bitRange>
105127                        <access>read-write</access>
105128                    </field>
105129                    <field>
105130                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105131                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105132                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105133                        <bitRange>[28:27]</bitRange>
105134                        <access>read-write</access>
105135                        <enumeratedValues>
105136                            <enumeratedValue>
105137                                <name>128</name>
105138                                <value>0</value>
105139                            </enumeratedValue>
105140                            <enumeratedValue>
105141                                <name>256</name>
105142                                <value>1</value>
105143                            </enumeratedValue>
105144                            <enumeratedValue>
105145                                <name>512</name>
105146                                <value>2</value>
105147                            </enumeratedValue>
105148                            <enumeratedValue>
105149                                <name>1024</name>
105150                                <value>3</value>
105151                            </enumeratedValue>
105152                        </enumeratedValues>
105153                    </field>
105154                    <field>
105155                        <name>AVAILABLE_1</name>
105156                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105157                        <bitRange>[26:26]</bitRange>
105158                        <access>read-write</access>
105159                    </field>
105160                    <field>
105161                        <name>LENGTH_1</name>
105162                        <description>The length of the data in buffer 1.</description>
105163                        <bitRange>[25:16]</bitRange>
105164                        <access>read-write</access>
105165                    </field>
105166                    <field>
105167                        <name>FULL_0</name>
105168                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105169                        <bitRange>[15:15]</bitRange>
105170                        <access>read-write</access>
105171                    </field>
105172                    <field>
105173                        <name>LAST_0</name>
105174                        <description>Buffer 0 is the last buffer of the transfer.</description>
105175                        <bitRange>[14:14]</bitRange>
105176                        <access>read-write</access>
105177                    </field>
105178                    <field>
105179                        <name>PID_0</name>
105180                        <description>The data pid of buffer 0.</description>
105181                        <bitRange>[13:13]</bitRange>
105182                        <access>read-write</access>
105183                    </field>
105184                    <field>
105185                        <name>RESET</name>
105186                        <description>Reset the buffer selector to buffer 0.</description>
105187                        <bitRange>[12:12]</bitRange>
105188                        <access>read-write</access>
105189                    </field>
105190                    <field>
105191                        <name>STALL</name>
105192                        <description>Reply with a stall (valid for both buffers).</description>
105193                        <bitRange>[11:11]</bitRange>
105194                        <access>read-write</access>
105195                    </field>
105196                    <field>
105197                        <name>AVAILABLE_0</name>
105198                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105199                        <bitRange>[10:10]</bitRange>
105200                        <access>read-write</access>
105201                    </field>
105202                    <field>
105203                        <name>LENGTH_0</name>
105204                        <description>The length of the data in buffer 1.</description>
105205                        <bitRange>[9:0]</bitRange>
105206                        <access>read-write</access>
105207                    </field>
105208                </fields>
105209            </register>
105210            <register>
105211                <name>EP13_IN_BUFFER_CONTROL</name>
105212                <addressOffset>0x000000e8</addressOffset>
105213                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105214                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105215                <resetValue>0x00000000</resetValue>
105216                <fields>
105217                    <field>
105218                        <name>FULL_1</name>
105219                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105220                        <bitRange>[31:31]</bitRange>
105221                        <access>read-write</access>
105222                    </field>
105223                    <field>
105224                        <name>LAST_1</name>
105225                        <description>Buffer 1 is the last buffer of the transfer.</description>
105226                        <bitRange>[30:30]</bitRange>
105227                        <access>read-write</access>
105228                    </field>
105229                    <field>
105230                        <name>PID_1</name>
105231                        <description>The data pid of buffer 1.</description>
105232                        <bitRange>[29:29]</bitRange>
105233                        <access>read-write</access>
105234                    </field>
105235                    <field>
105236                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105237                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105238                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105239                        <bitRange>[28:27]</bitRange>
105240                        <access>read-write</access>
105241                        <enumeratedValues>
105242                            <enumeratedValue>
105243                                <name>128</name>
105244                                <value>0</value>
105245                            </enumeratedValue>
105246                            <enumeratedValue>
105247                                <name>256</name>
105248                                <value>1</value>
105249                            </enumeratedValue>
105250                            <enumeratedValue>
105251                                <name>512</name>
105252                                <value>2</value>
105253                            </enumeratedValue>
105254                            <enumeratedValue>
105255                                <name>1024</name>
105256                                <value>3</value>
105257                            </enumeratedValue>
105258                        </enumeratedValues>
105259                    </field>
105260                    <field>
105261                        <name>AVAILABLE_1</name>
105262                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105263                        <bitRange>[26:26]</bitRange>
105264                        <access>read-write</access>
105265                    </field>
105266                    <field>
105267                        <name>LENGTH_1</name>
105268                        <description>The length of the data in buffer 1.</description>
105269                        <bitRange>[25:16]</bitRange>
105270                        <access>read-write</access>
105271                    </field>
105272                    <field>
105273                        <name>FULL_0</name>
105274                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105275                        <bitRange>[15:15]</bitRange>
105276                        <access>read-write</access>
105277                    </field>
105278                    <field>
105279                        <name>LAST_0</name>
105280                        <description>Buffer 0 is the last buffer of the transfer.</description>
105281                        <bitRange>[14:14]</bitRange>
105282                        <access>read-write</access>
105283                    </field>
105284                    <field>
105285                        <name>PID_0</name>
105286                        <description>The data pid of buffer 0.</description>
105287                        <bitRange>[13:13]</bitRange>
105288                        <access>read-write</access>
105289                    </field>
105290                    <field>
105291                        <name>RESET</name>
105292                        <description>Reset the buffer selector to buffer 0.</description>
105293                        <bitRange>[12:12]</bitRange>
105294                        <access>read-write</access>
105295                    </field>
105296                    <field>
105297                        <name>STALL</name>
105298                        <description>Reply with a stall (valid for both buffers).</description>
105299                        <bitRange>[11:11]</bitRange>
105300                        <access>read-write</access>
105301                    </field>
105302                    <field>
105303                        <name>AVAILABLE_0</name>
105304                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105305                        <bitRange>[10:10]</bitRange>
105306                        <access>read-write</access>
105307                    </field>
105308                    <field>
105309                        <name>LENGTH_0</name>
105310                        <description>The length of the data in buffer 1.</description>
105311                        <bitRange>[9:0]</bitRange>
105312                        <access>read-write</access>
105313                    </field>
105314                </fields>
105315            </register>
105316            <register>
105317                <name>EP13_OUT_BUFFER_CONTROL</name>
105318                <addressOffset>0x000000ec</addressOffset>
105319                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105320                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105321                <resetValue>0x00000000</resetValue>
105322                <fields>
105323                    <field>
105324                        <name>FULL_1</name>
105325                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105326                        <bitRange>[31:31]</bitRange>
105327                        <access>read-write</access>
105328                    </field>
105329                    <field>
105330                        <name>LAST_1</name>
105331                        <description>Buffer 1 is the last buffer of the transfer.</description>
105332                        <bitRange>[30:30]</bitRange>
105333                        <access>read-write</access>
105334                    </field>
105335                    <field>
105336                        <name>PID_1</name>
105337                        <description>The data pid of buffer 1.</description>
105338                        <bitRange>[29:29]</bitRange>
105339                        <access>read-write</access>
105340                    </field>
105341                    <field>
105342                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105343                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105344                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105345                        <bitRange>[28:27]</bitRange>
105346                        <access>read-write</access>
105347                        <enumeratedValues>
105348                            <enumeratedValue>
105349                                <name>128</name>
105350                                <value>0</value>
105351                            </enumeratedValue>
105352                            <enumeratedValue>
105353                                <name>256</name>
105354                                <value>1</value>
105355                            </enumeratedValue>
105356                            <enumeratedValue>
105357                                <name>512</name>
105358                                <value>2</value>
105359                            </enumeratedValue>
105360                            <enumeratedValue>
105361                                <name>1024</name>
105362                                <value>3</value>
105363                            </enumeratedValue>
105364                        </enumeratedValues>
105365                    </field>
105366                    <field>
105367                        <name>AVAILABLE_1</name>
105368                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105369                        <bitRange>[26:26]</bitRange>
105370                        <access>read-write</access>
105371                    </field>
105372                    <field>
105373                        <name>LENGTH_1</name>
105374                        <description>The length of the data in buffer 1.</description>
105375                        <bitRange>[25:16]</bitRange>
105376                        <access>read-write</access>
105377                    </field>
105378                    <field>
105379                        <name>FULL_0</name>
105380                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105381                        <bitRange>[15:15]</bitRange>
105382                        <access>read-write</access>
105383                    </field>
105384                    <field>
105385                        <name>LAST_0</name>
105386                        <description>Buffer 0 is the last buffer of the transfer.</description>
105387                        <bitRange>[14:14]</bitRange>
105388                        <access>read-write</access>
105389                    </field>
105390                    <field>
105391                        <name>PID_0</name>
105392                        <description>The data pid of buffer 0.</description>
105393                        <bitRange>[13:13]</bitRange>
105394                        <access>read-write</access>
105395                    </field>
105396                    <field>
105397                        <name>RESET</name>
105398                        <description>Reset the buffer selector to buffer 0.</description>
105399                        <bitRange>[12:12]</bitRange>
105400                        <access>read-write</access>
105401                    </field>
105402                    <field>
105403                        <name>STALL</name>
105404                        <description>Reply with a stall (valid for both buffers).</description>
105405                        <bitRange>[11:11]</bitRange>
105406                        <access>read-write</access>
105407                    </field>
105408                    <field>
105409                        <name>AVAILABLE_0</name>
105410                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105411                        <bitRange>[10:10]</bitRange>
105412                        <access>read-write</access>
105413                    </field>
105414                    <field>
105415                        <name>LENGTH_0</name>
105416                        <description>The length of the data in buffer 1.</description>
105417                        <bitRange>[9:0]</bitRange>
105418                        <access>read-write</access>
105419                    </field>
105420                </fields>
105421            </register>
105422            <register>
105423                <name>EP14_IN_BUFFER_CONTROL</name>
105424                <addressOffset>0x000000f0</addressOffset>
105425                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105426                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105427                <resetValue>0x00000000</resetValue>
105428                <fields>
105429                    <field>
105430                        <name>FULL_1</name>
105431                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105432                        <bitRange>[31:31]</bitRange>
105433                        <access>read-write</access>
105434                    </field>
105435                    <field>
105436                        <name>LAST_1</name>
105437                        <description>Buffer 1 is the last buffer of the transfer.</description>
105438                        <bitRange>[30:30]</bitRange>
105439                        <access>read-write</access>
105440                    </field>
105441                    <field>
105442                        <name>PID_1</name>
105443                        <description>The data pid of buffer 1.</description>
105444                        <bitRange>[29:29]</bitRange>
105445                        <access>read-write</access>
105446                    </field>
105447                    <field>
105448                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105449                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105450                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105451                        <bitRange>[28:27]</bitRange>
105452                        <access>read-write</access>
105453                        <enumeratedValues>
105454                            <enumeratedValue>
105455                                <name>128</name>
105456                                <value>0</value>
105457                            </enumeratedValue>
105458                            <enumeratedValue>
105459                                <name>256</name>
105460                                <value>1</value>
105461                            </enumeratedValue>
105462                            <enumeratedValue>
105463                                <name>512</name>
105464                                <value>2</value>
105465                            </enumeratedValue>
105466                            <enumeratedValue>
105467                                <name>1024</name>
105468                                <value>3</value>
105469                            </enumeratedValue>
105470                        </enumeratedValues>
105471                    </field>
105472                    <field>
105473                        <name>AVAILABLE_1</name>
105474                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105475                        <bitRange>[26:26]</bitRange>
105476                        <access>read-write</access>
105477                    </field>
105478                    <field>
105479                        <name>LENGTH_1</name>
105480                        <description>The length of the data in buffer 1.</description>
105481                        <bitRange>[25:16]</bitRange>
105482                        <access>read-write</access>
105483                    </field>
105484                    <field>
105485                        <name>FULL_0</name>
105486                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105487                        <bitRange>[15:15]</bitRange>
105488                        <access>read-write</access>
105489                    </field>
105490                    <field>
105491                        <name>LAST_0</name>
105492                        <description>Buffer 0 is the last buffer of the transfer.</description>
105493                        <bitRange>[14:14]</bitRange>
105494                        <access>read-write</access>
105495                    </field>
105496                    <field>
105497                        <name>PID_0</name>
105498                        <description>The data pid of buffer 0.</description>
105499                        <bitRange>[13:13]</bitRange>
105500                        <access>read-write</access>
105501                    </field>
105502                    <field>
105503                        <name>RESET</name>
105504                        <description>Reset the buffer selector to buffer 0.</description>
105505                        <bitRange>[12:12]</bitRange>
105506                        <access>read-write</access>
105507                    </field>
105508                    <field>
105509                        <name>STALL</name>
105510                        <description>Reply with a stall (valid for both buffers).</description>
105511                        <bitRange>[11:11]</bitRange>
105512                        <access>read-write</access>
105513                    </field>
105514                    <field>
105515                        <name>AVAILABLE_0</name>
105516                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105517                        <bitRange>[10:10]</bitRange>
105518                        <access>read-write</access>
105519                    </field>
105520                    <field>
105521                        <name>LENGTH_0</name>
105522                        <description>The length of the data in buffer 1.</description>
105523                        <bitRange>[9:0]</bitRange>
105524                        <access>read-write</access>
105525                    </field>
105526                </fields>
105527            </register>
105528            <register>
105529                <name>EP14_OUT_BUFFER_CONTROL</name>
105530                <addressOffset>0x000000f4</addressOffset>
105531                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105532                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105533                <resetValue>0x00000000</resetValue>
105534                <fields>
105535                    <field>
105536                        <name>FULL_1</name>
105537                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105538                        <bitRange>[31:31]</bitRange>
105539                        <access>read-write</access>
105540                    </field>
105541                    <field>
105542                        <name>LAST_1</name>
105543                        <description>Buffer 1 is the last buffer of the transfer.</description>
105544                        <bitRange>[30:30]</bitRange>
105545                        <access>read-write</access>
105546                    </field>
105547                    <field>
105548                        <name>PID_1</name>
105549                        <description>The data pid of buffer 1.</description>
105550                        <bitRange>[29:29]</bitRange>
105551                        <access>read-write</access>
105552                    </field>
105553                    <field>
105554                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105555                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105556                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105557                        <bitRange>[28:27]</bitRange>
105558                        <access>read-write</access>
105559                        <enumeratedValues>
105560                            <enumeratedValue>
105561                                <name>128</name>
105562                                <value>0</value>
105563                            </enumeratedValue>
105564                            <enumeratedValue>
105565                                <name>256</name>
105566                                <value>1</value>
105567                            </enumeratedValue>
105568                            <enumeratedValue>
105569                                <name>512</name>
105570                                <value>2</value>
105571                            </enumeratedValue>
105572                            <enumeratedValue>
105573                                <name>1024</name>
105574                                <value>3</value>
105575                            </enumeratedValue>
105576                        </enumeratedValues>
105577                    </field>
105578                    <field>
105579                        <name>AVAILABLE_1</name>
105580                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105581                        <bitRange>[26:26]</bitRange>
105582                        <access>read-write</access>
105583                    </field>
105584                    <field>
105585                        <name>LENGTH_1</name>
105586                        <description>The length of the data in buffer 1.</description>
105587                        <bitRange>[25:16]</bitRange>
105588                        <access>read-write</access>
105589                    </field>
105590                    <field>
105591                        <name>FULL_0</name>
105592                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105593                        <bitRange>[15:15]</bitRange>
105594                        <access>read-write</access>
105595                    </field>
105596                    <field>
105597                        <name>LAST_0</name>
105598                        <description>Buffer 0 is the last buffer of the transfer.</description>
105599                        <bitRange>[14:14]</bitRange>
105600                        <access>read-write</access>
105601                    </field>
105602                    <field>
105603                        <name>PID_0</name>
105604                        <description>The data pid of buffer 0.</description>
105605                        <bitRange>[13:13]</bitRange>
105606                        <access>read-write</access>
105607                    </field>
105608                    <field>
105609                        <name>RESET</name>
105610                        <description>Reset the buffer selector to buffer 0.</description>
105611                        <bitRange>[12:12]</bitRange>
105612                        <access>read-write</access>
105613                    </field>
105614                    <field>
105615                        <name>STALL</name>
105616                        <description>Reply with a stall (valid for both buffers).</description>
105617                        <bitRange>[11:11]</bitRange>
105618                        <access>read-write</access>
105619                    </field>
105620                    <field>
105621                        <name>AVAILABLE_0</name>
105622                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105623                        <bitRange>[10:10]</bitRange>
105624                        <access>read-write</access>
105625                    </field>
105626                    <field>
105627                        <name>LENGTH_0</name>
105628                        <description>The length of the data in buffer 1.</description>
105629                        <bitRange>[9:0]</bitRange>
105630                        <access>read-write</access>
105631                    </field>
105632                </fields>
105633            </register>
105634            <register>
105635                <name>EP15_IN_BUFFER_CONTROL</name>
105636                <addressOffset>0x000000f8</addressOffset>
105637                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105638                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105639                <resetValue>0x00000000</resetValue>
105640                <fields>
105641                    <field>
105642                        <name>FULL_1</name>
105643                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105644                        <bitRange>[31:31]</bitRange>
105645                        <access>read-write</access>
105646                    </field>
105647                    <field>
105648                        <name>LAST_1</name>
105649                        <description>Buffer 1 is the last buffer of the transfer.</description>
105650                        <bitRange>[30:30]</bitRange>
105651                        <access>read-write</access>
105652                    </field>
105653                    <field>
105654                        <name>PID_1</name>
105655                        <description>The data pid of buffer 1.</description>
105656                        <bitRange>[29:29]</bitRange>
105657                        <access>read-write</access>
105658                    </field>
105659                    <field>
105660                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105661                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105662                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105663                        <bitRange>[28:27]</bitRange>
105664                        <access>read-write</access>
105665                        <enumeratedValues>
105666                            <enumeratedValue>
105667                                <name>128</name>
105668                                <value>0</value>
105669                            </enumeratedValue>
105670                            <enumeratedValue>
105671                                <name>256</name>
105672                                <value>1</value>
105673                            </enumeratedValue>
105674                            <enumeratedValue>
105675                                <name>512</name>
105676                                <value>2</value>
105677                            </enumeratedValue>
105678                            <enumeratedValue>
105679                                <name>1024</name>
105680                                <value>3</value>
105681                            </enumeratedValue>
105682                        </enumeratedValues>
105683                    </field>
105684                    <field>
105685                        <name>AVAILABLE_1</name>
105686                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105687                        <bitRange>[26:26]</bitRange>
105688                        <access>read-write</access>
105689                    </field>
105690                    <field>
105691                        <name>LENGTH_1</name>
105692                        <description>The length of the data in buffer 1.</description>
105693                        <bitRange>[25:16]</bitRange>
105694                        <access>read-write</access>
105695                    </field>
105696                    <field>
105697                        <name>FULL_0</name>
105698                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105699                        <bitRange>[15:15]</bitRange>
105700                        <access>read-write</access>
105701                    </field>
105702                    <field>
105703                        <name>LAST_0</name>
105704                        <description>Buffer 0 is the last buffer of the transfer.</description>
105705                        <bitRange>[14:14]</bitRange>
105706                        <access>read-write</access>
105707                    </field>
105708                    <field>
105709                        <name>PID_0</name>
105710                        <description>The data pid of buffer 0.</description>
105711                        <bitRange>[13:13]</bitRange>
105712                        <access>read-write</access>
105713                    </field>
105714                    <field>
105715                        <name>RESET</name>
105716                        <description>Reset the buffer selector to buffer 0.</description>
105717                        <bitRange>[12:12]</bitRange>
105718                        <access>read-write</access>
105719                    </field>
105720                    <field>
105721                        <name>STALL</name>
105722                        <description>Reply with a stall (valid for both buffers).</description>
105723                        <bitRange>[11:11]</bitRange>
105724                        <access>read-write</access>
105725                    </field>
105726                    <field>
105727                        <name>AVAILABLE_0</name>
105728                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105729                        <bitRange>[10:10]</bitRange>
105730                        <access>read-write</access>
105731                    </field>
105732                    <field>
105733                        <name>LENGTH_0</name>
105734                        <description>The length of the data in buffer 1.</description>
105735                        <bitRange>[9:0]</bitRange>
105736                        <access>read-write</access>
105737                    </field>
105738                </fields>
105739            </register>
105740            <register>
105741                <name>EP15_OUT_BUFFER_CONTROL</name>
105742                <addressOffset>0x000000fc</addressOffset>
105743                <description>Buffer control for both buffers of an endpoint. Fields ending in a _1 are for buffer 1.
105744                    Fields ending in a _0 are for buffer 0. Buffer 1 controls are only valid if the endpoint is in double buffered mode.</description>
105745                <resetValue>0x00000000</resetValue>
105746                <fields>
105747                    <field>
105748                        <name>FULL_1</name>
105749                        <description>Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105750                        <bitRange>[31:31]</bitRange>
105751                        <access>read-write</access>
105752                    </field>
105753                    <field>
105754                        <name>LAST_1</name>
105755                        <description>Buffer 1 is the last buffer of the transfer.</description>
105756                        <bitRange>[30:30]</bitRange>
105757                        <access>read-write</access>
105758                    </field>
105759                    <field>
105760                        <name>PID_1</name>
105761                        <description>The data pid of buffer 1.</description>
105762                        <bitRange>[29:29]</bitRange>
105763                        <access>read-write</access>
105764                    </field>
105765                    <field>
105766                        <name>DOUBLE_BUFFER_ISO_OFFSET</name>
105767                        <description>The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
105768                            For a non Isochronous endpoint the offset is always 64 bytes.</description>
105769                        <bitRange>[28:27]</bitRange>
105770                        <access>read-write</access>
105771                        <enumeratedValues>
105772                            <enumeratedValue>
105773                                <name>128</name>
105774                                <value>0</value>
105775                            </enumeratedValue>
105776                            <enumeratedValue>
105777                                <name>256</name>
105778                                <value>1</value>
105779                            </enumeratedValue>
105780                            <enumeratedValue>
105781                                <name>512</name>
105782                                <value>2</value>
105783                            </enumeratedValue>
105784                            <enumeratedValue>
105785                                <name>1024</name>
105786                                <value>3</value>
105787                            </enumeratedValue>
105788                        </enumeratedValues>
105789                    </field>
105790                    <field>
105791                        <name>AVAILABLE_1</name>
105792                        <description>Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105793                        <bitRange>[26:26]</bitRange>
105794                        <access>read-write</access>
105795                    </field>
105796                    <field>
105797                        <name>LENGTH_1</name>
105798                        <description>The length of the data in buffer 1.</description>
105799                        <bitRange>[25:16]</bitRange>
105800                        <access>read-write</access>
105801                    </field>
105802                    <field>
105803                        <name>FULL_0</name>
105804                        <description>Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data.</description>
105805                        <bitRange>[15:15]</bitRange>
105806                        <access>read-write</access>
105807                    </field>
105808                    <field>
105809                        <name>LAST_0</name>
105810                        <description>Buffer 0 is the last buffer of the transfer.</description>
105811                        <bitRange>[14:14]</bitRange>
105812                        <access>read-write</access>
105813                    </field>
105814                    <field>
105815                        <name>PID_0</name>
105816                        <description>The data pid of buffer 0.</description>
105817                        <bitRange>[13:13]</bitRange>
105818                        <access>read-write</access>
105819                    </field>
105820                    <field>
105821                        <name>RESET</name>
105822                        <description>Reset the buffer selector to buffer 0.</description>
105823                        <bitRange>[12:12]</bitRange>
105824                        <access>read-write</access>
105825                    </field>
105826                    <field>
105827                        <name>STALL</name>
105828                        <description>Reply with a stall (valid for both buffers).</description>
105829                        <bitRange>[11:11]</bitRange>
105830                        <access>read-write</access>
105831                    </field>
105832                    <field>
105833                        <name>AVAILABLE_0</name>
105834                        <description>Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back.</description>
105835                        <bitRange>[10:10]</bitRange>
105836                        <access>read-write</access>
105837                    </field>
105838                    <field>
105839                        <name>LENGTH_0</name>
105840                        <description>The length of the data in buffer 1.</description>
105841                        <bitRange>[9:0]</bitRange>
105842                        <access>read-write</access>
105843                    </field>
105844                </fields>
105845            </register>
105846        </registers>
105847    </peripheral>
105848    </peripherals>
105849</device>
105850