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Searched +full:num +full:- +full:queues (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/boards/intel/socfpga/agilex5_socdk/
Dintel_socfpga_agilex5_socdk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
13 compatible = "intel,socfpga-agilex5";
14 #address-cells = <1>;
15 #size-cells = <1>;
19 zephyr,shell-uart = &uart0;
28 compatible = "zephyr,sdmmc-disk";
29 disk-name = "SD";
36 current-speed = <115200>;
40 full-duplex-mode-en;
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/Zephyr-latest/drivers/ethernet/
DKconfig.sam_gmac4 # SPDX-License-Identifier: Apache-2.0
25 DT_ETH_SAM_GMAC_NQ := $(dt_node_int_prop_int,$(DT_ETH_SAM_GMAC_PATH),num-queues)
28 int "Number of active hardware TX and RX queues"
35 Select the number of hardware queues used by the driver. Packets will be
36 routed to appropriate queues based on their priority.
59 Which queue to force the routing to. This affects both the TX and RX queues
/Zephyr-latest/dts/arm/atmel/
Dsame70b.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 interrupt-names = "gmac", "q1", "q2", "q3", "q4", "q5";
12 num-queues = <6>;
Dsame5x.dtsi5 * SPDX-License-Identifier: Apache-2.0
13 compatible = "atmel,sam0-gmac";
16 interrupt-names = "gmac";
19 num-queues = <1>;
20 local-mac-address = [00 00 00 00 00 00];
24 compatible = "atmel,sam-mdio";
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "atmel,sam0-can";
36 interrupt-names = "int0", "int1";
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Dsam4e.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
19 zephyr,flash-controller = &eefc;
23 #address-cells = <1>;
24 #size-cells = <0>;
28 compatible = "arm,cortex-m4f";
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Dsame70.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
21 zephyr,flash-controller = &eefc;
29 #address-cells = <1>;
30 #size-cells = <0>;
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/Zephyr-latest/dts/bindings/ethernet/
Datmel,gmac-common.yaml2 # Copyright (c) 2020-2021 Gerson Fernando Budke <nandojve@gmail.com>
3 # SPDX-License-Identifier: Apache-2.0
6 - name: ethernet-controller.yaml
7 - name: pinctrl-device.yaml
13 phy-handle:
16 num-queues:
20 Number of hardware TX and RX queues.
22 max-frame-size:
28 means that normally gmac will reject any frame above max-frame-size
38 max-speed:
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Dsnps,dwcxgmac.yaml2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
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/Zephyr-latest/dts/bindings/dma/
Dxilinx,axi-dma-base.yaml2 # SPDX-License-Identifier: Apache-2.0
6 include: dma-controller.yaml
21 interrupt-parent:
26 type: phandle-array
28 clock-frequency:
36 - 32
37 - 64
39 axistream-connected:
43 The axistream-connected and axistream-control-connected properties can easily cause circular
48 axistream-control-connected:
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/Zephyr-latest/include/zephyr/sys/
Dp4wq.h4 * SPDX-License-Identifier: Apache-2.0
12 /* Zephyr Pooled Parallel Preemptible Priority-based Work Queues */
24 * User-populated struct representing a single work item. The
53 * Kernel pooled parallel preemptible priority-based work queue
61 * Wait queues are priority-sorted, but we don't want that
80 uint32_t num; member
106 .num = n_threads, \
115 * @brief Statically initialize an array of P4 Work Queues
122 * @param n_threads Number of threads and work queues
133 .num = n_threads, \
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/Zephyr-latest/drivers/disk/nvme/
Dnvme_controller.c3 * SPDX-License-Identifier: Apache-2.0
28 struct nvme_controller *nvme_ctrlr = dev->data; in nvme_controller_wait_for_ready()
31 k_ms_to_ticks_ceil32(nvme_ctrlr->ready_timeout_in_ms); in nvme_controller_wait_for_ready()
39 return -EIO; in nvme_controller_wait_for_ready()
47 if ((int64_t)timeout - sys_clock_tick_get_32() < 0) { in nvme_controller_wait_for_ready()
49 return -EIO; in nvme_controller_wait_for_ready()
97 struct nvme_controller *nvme_ctrlr = dev->data; in nvme_controller_enable()
132 cc |= nvme_ctrlr->mps << NVME_CC_REG_MPS_SHIFT; in nvme_controller_enable()
141 struct nvme_controller *nvme_ctrlr = dev->data; in nvme_controller_setup_admin_queues()
145 nvme_cmd_qpair_reset(nvme_ctrlr->adminq); in nvme_controller_setup_admin_queues()
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/Zephyr-latest/doc/kernel/object_cores/
Dindex.rst30 * :ref:`Message Queues <message_queues_v2>`
64 struct z_kernel struct k_cycle_stats[num CPUs] struct k_thread_runtime_stats
78 .. code-block:: c
125 .. code-block:: c
132 k_obj_core_stats_register(K_OBJ_CORE(new_obj), &new_obj->raw_stats,
144 .. code-block:: c
151 ptr -= obj_core->type->obj_core_offset;
178 .. code-block:: c
/Zephyr-latest/drivers/i2s/
Di2s_mcux_sai.c2 * Copyright 2021,2023-2024 NXP Semiconductor INC.
5 * SPDX-License-Identifier: Apache-2.0
22 #include <zephyr/dt-bindings/clock/imx_ccm.h>
124 while (k_msgq_get(&strm->in_queue, &buffer, K_NO_WAIT) == 0) { in i2s_purge_stream_buffers()
130 while (k_msgq_get(&strm->out_queue, &buffer, K_NO_WAIT) == 0) { in i2s_purge_stream_buffers()
138 struct i2s_dev_data *dev_data = dev->data; in i2s_tx_stream_disable()
139 struct stream *strm = &dev_data->tx; in i2s_tx_stream_disable()
140 const struct device *dev_dma = dev_data->dev_dma; in i2s_tx_stream_disable()
141 const struct i2s_mcux_config *dev_cfg = dev->config; in i2s_tx_stream_disable()
143 LOG_DBG("Stopping DMA channel %u for TX stream", strm->dma_channel); in i2s_tx_stream_disable()
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/Zephyr-latest/include/zephyr/
Dkernel.h4 * SPDX-License-Identifier: Apache-2.0
53 #define K_PRIO_COOP(x) (-(CONFIG_NUM_COOP_PRIORITIES - (x)))
56 #define K_HIGHEST_THREAD_PRIO (-CONFIG_NUM_COOP_PRIORITIES)
60 #define K_LOWEST_APPLICATION_THREAD_PRIO (K_LOWEST_THREAD_PRIO - 1)
245 * bits, arch-specific use high bits.
289 * from within a user-provided callback they have been invoked.
290 * Effectively it serves as a tiny bit of zero-overhead TLS data.
328 /* end - thread options */
335 * - @ref K_USER allocate a userspace thread (requires `CONFIG_USERSPACE=y`)
353 * @retval -EBUSY if the thread stack is in use.
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/Zephyr-latest/doc/releases/
Drelease-notes-2.0.rst12 * The kernel now supports both 32- and 64-bit architectures.
17 * We added support for :ref:`Point-to-Point Protocol (PPP) <ppp>`. PPP is a
20 * We added support for UpdateHub, an end-to-end solution for large scale
21 over-the-air device updates.
22 * We added support for ARM Cortex-R Architecture (Experimental).
32 * Fixes CVE-2019-9506: The Bluetooth BR/EDR specification up to and
35 negotiation. This allows practical brute-force attacks (aka "KNOB")
42 * New kernel API for per-thread disabling of Floating Point Services for
43 ARC, ARM Cortex-M, and x86 architectures.
45 * Additional support for compatibility with 64-bit architectures.
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