Home
last modified time | relevance | path

Searched full:i3c (Results 1 – 25 of 144) sorted by relevance

123456

/Zephyr-latest/drivers/i3c/
DKconfig1 # I3C configuration options
7 menuconfig I3C config
8 bool "Improved Inter-Integrated Circuit (I3C) bus drivers"
10 Enable I3C Driver Configuration
12 if I3C
14 module = I3C
15 module-str = i3c
19 bool "I3C Shell"
22 Enable I3C Shell.
24 The I3C shell supports info, bus recovery, CCC, I3C read and
[all …]
Di3c_stm32.c8 #include <zephyr/drivers/i3c.h>
114 struct i3c_driver_config drv_cfg; /* I3C driver config */
115 I3C_TypeDef *i3c; /* Pointer to I3C module base addr */ member
122 struct i3c_driver_data drv_data; /* I3C driver data */
123 enum i3c_stm32_msg_state msg_state; /* Current I3C bus state */
124 enum i3c_stm32_sf_state sf_state; /* Current I3C status FIFO state */
163 * Determine I3C bus mode from the i2c devices on the bus.
165 * Reads the LVR of all I2C devices and returns the I3C bus
226 I3C_TypeDef *i3c = config->i3c; in i3c_stm32_arbitration_header_config() local
231 LL_I3C_DisableArbitrationHeader(i3c); in i3c_stm32_arbitration_header_config()
[all …]
DKconfig.npcx1 # NPCX I3C driver configuration options
9 bool "Nuvoton NPCX embedded controller (EC) I3C driver"
16 This option enables the I3C driver for NPCX family of
18 Say y if you wish to use I3C channels on NPCX MCU.
22 # i.e. I3C node example in dtsi file.
23 # i3c0: i3c@400f0000 {
37 Enable support for npcx I3C DMA mode.
Di3c_shell.c7 #include <zephyr/drivers/i3c.h>
73 entry->syntax = config->dev_list.i3c[idx].dev->name; \
123 if (strcmp(config->dev_list.i3c[i].dev->name, tdev_name) == 0) { in get_i3c_list_desc_from_dev_name()
125 return &config->dev_list.i3c[i]; in get_i3c_list_desc_from_dev_name()
152 shell_error(sh, "I3C: Device driver %s not found.", argv[ARGV_DEV]); in i3c_parse_args()
157 shell_error(sh, "I3C: Device driver %s not found.", argv[ARGV_TDEV]); in i3c_parse_args()
162 shell_error(sh, "I3C: Device %s not attached to bus.", (*tdev)->name); in i3c_parse_args()
169 /* i3c info <device> [<target>] */
181 shell_error(sh, "I3C: Device driver %s not found.", argv[ARGV_DEV]); in cmd_i3c_info()
189 shell_error(sh, "I3C: Target Device driver %s not found.", argv[ARGV_TDEV]); in cmd_i3c_info()
[all …]
DKconfig.nxp5 DT_COMPAT_NXP_MCUX_I3C := nxp,mcux-i3c
8 module-str = i3c-mcux
12 bool "MCUX I3C driver"
19 Enable mcux I3C driver.
DKconfig.stm3210 bool "STM32 I3C driver support"
15 Enable support for I3C on STM32 microcontrollers.
20 bool "STM32 I3C DMA driver support"
23 Enables support for I3C DMA mode on STM32 microcontrollers.
DKconfig.cdns6 module-str = i3c-cadence
10 bool "Cadence I3C driver"
15 Enable Cadence I3C driver.
Di3c_test.c8 * This is not a real I3C driver. It is used to instantiate struct
9 * devices for the "vnd,i3c" devicetree compatible used in test code.
14 #include <zephyr/drivers/i3c.h>
35 static DEVICE_API(i3c, vnd_i3c_api) = {
/Zephyr-latest/dts/bindings/i3c/
Dnxp,mcux-i3c.yaml6 description: NXP MCUX I3C controller
8 compatible: "nxp,mcux-i3c"
10 include: [i3c-controller.yaml, pinctrl-device.yaml]
19 i3c-od-scl-hz:
22 Open Drain Frequency for the I3C controller. When undefined, use
23 the controller default or as specified by the I3C specification.
27 description: Main clock divider for I3C
32 description: TC clock divider for I3C
37 description: Slow clock divider for I3C
Dnuvoton,npcx-i3c.yaml5 Nuvoton I3C controller
26 /* I3C clock frequency suggestion = <PP_SCL, OD_SCL> */
30 i3c-scl-hz = <12500000>;
31 i3c-od-scl-hz = <4170000>;
36 compatible: "nuvoton,npcx-i3c"
38 include: [i3c-controller.yaml, pinctrl-device.yaml, reset-device.yaml]
50 i3c-od-scl-hz:
53 Open Drain Frequency for the I3C controller. When undefined, use
54 the controller default or as specified by the I3C specification.
97 Maximum number of bytes that I3C controller may write to I3C target per message.
[all …]
Di3c-controller.yaml5 # Fields for I3C Controllers
9 bus: [i3c, i2c]
20 i3c-scl-hz:
23 Frequency of the SCL signal used for I3C transfers. When undefined,
24 use the controller default or as specified by the I3C specification.
/Zephyr-latest/drivers/sensor/st/lps2xdf/
Dlps2xdf.h29 #include <zephyr/drivers/i3c.h>
34 #if (DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_lps22df, i3c) || \
35 DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_ilps22qs, i3c) || \
36 DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_lps28dfw, i3c))
37 #define ON_I3C_BUS(cfg) (cfg->i3c.bus != NULL)
82 #if (DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_lps22df, i3c) || \
83 DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_ilps22qs, i3c) || \
84 DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_lps28dfw, i3c))
85 struct i3c_device_desc **i3c; member
98 #if (DT_HAS_COMPAT_ON_BUS_STATUS_OKAY(st_lps22df, i3c) || \
[all …]
/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst3 Improved Inter-Integrated Circuit (I3C) Bus
6 I3C (Improved Inter-Integrated Circuit) is a two-signal shared
12 Currently, the API is based on `I3C Specification`_ version 1.1.1.
20 I3C Controller API
23 Zephyr's I3C controller API is used when an I3C controller controls
25 This is the most common mode, used to interact with I3C target
28 Due to the nature of the I3C, there are devices on the bus where
30 dynamic address assignment needs to be carried out by the I3C
34 for both I3C and I\ :sup:`2`\ C devices:
44 nodes under the I3C controller.
[all …]
/Zephyr-latest/include/zephyr/drivers/
Di3c.h12 * @brief I3C Interface
13 * @defgroup i3c_interface I3C Interface
25 #include <zephyr/drivers/i3c/addresses.h>
26 #include <zephyr/drivers/i3c/ccc.h>
27 #include <zephyr/drivers/i3c/devicetree.h>
28 #include <zephyr/drivers/i3c/ibi.h>
43 * - 0: I3C Target
44 * - 1: I3C Controller capable
58 * - 0: Will always response to I3C commands.
59 * - 1: Will not always response to I3C commands.
[all …]
/Zephyr-latest/drivers/sensor/nxp/p3t1755/
Dp3t1755.h16 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
17 #include <zephyr/drivers/i3c.h>
18 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c) */
45 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
46 struct i3c_device_desc **i3c; member
53 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
57 } i3c; member
66 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
/Zephyr-latest/dts/bindings/sensor/
Dst,lsm6dsv16x-i3c.yaml6 accessed through I3C bus
10 include: ["i3c-device.yaml", "st,lsm6dsv16x-common.yaml"]
13 int-en-i3c:
16 Enables INT pin when I3C is enabled
22 Bus available time for I3C IBI in microseconds
/Zephyr-latest/drivers/sensor/st/lps22hh/
Dlps22hh.h26 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
27 #include <zephyr/drivers/i3c.h>
28 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c) */
39 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
40 struct i3c_device_desc **i3c; member
48 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
52 } i3c; member
77 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
/Zephyr-latest/drivers/sensor/st/lsm6dsv16x/
Dlsm6dsv16x.h29 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
30 #include <zephyr/drivers/i3c.h>
31 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c) */
33 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
34 #define ON_I3C_BUS(cfg) (cfg->i3c.bus != NULL)
62 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
63 struct i3c_device_desc **i3c; member
86 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
89 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c) */
92 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(i3c)
[all …]
DKconfig7 bool "LSM6DSV16X I3C/I2C/SPI accelerometer and gyroscope Chip"
12 select I3C if $(dt_compat_on_bus,$(DT_COMPAT_ST_LSM6DSV16X),i3c)
44 depends on GPIO || I3C
47 $(dt_compat_on_bus,$(DT_COMPAT_ST_LSM6DSV16X),i3c)
52 depends on GPIO || I3C
55 $(dt_compat_on_bus,$(DT_COMPAT_ST_LSM6DSV16X),i3c)
/Zephyr-latest/include/zephyr/drivers/i3c/
Drtio.h12 #include <zephyr/drivers/i3c.h>
20 * @brief Driver context for implementing i3c with rtio
56 * @brief Initialize an i3c rtio context
58 * @param ctx I3C RTIO driver context
65 * @param ctx I3C RTIO driver context
82 * @brief Configure the I3C bus controller
92 * @brief Transfer i3c messages in a blocking call
103 * @brief Perform an I3C bus recovery in a blocking call
113 * @brief Perform an I3C CCC in a blocking call
Dhdr_ddr.h11 * @brief I3C HDR DDR API
12 * @defgroup i3c_hdr_ddr I3C HDR DDR API
21 #include <zephyr/drivers/i3c.h>
28 * @brief Write a set amount of data to an I3C target device with HDR DDR.
32 * @param target I3C target device descriptor.
56 * @brief Read a set amount of data from an I3C target device with HDR DDR.
60 * @param target I3C target device descriptor.
84 * @brief Write then read data from an I3C target device with HDR DDR.
90 * @param target I3C target device descriptor.
/Zephyr-latest/dts/bindings/test/
Dvnd,i3c.yaml6 description: Test I3C node
8 compatible: "vnd,i3c"
11 - name: i3c-controller.yaml
Dvnd,i3c-device.yaml6 description: Test I3C device
8 compatible: "vnd,i3c-device"
11 - name: i3c-device.yaml
/Zephyr-latest/samples/sensor/lps22hh_i3c/
DREADME.rst2 :name: LPSS22HH Temperature and Pressure Sensor (I3C)
5 Get pressure and temperature data from an LPS22HH sensor over I3C (polling &
16 This sample uses the LPS22HH sensor controlled using the I3C interface.
18 STEVALMKI192-V1 connected to the I3C header on :zephyr:board:`mimxrt685_evk`.
34 I3C In-Band Interrupt (IBI) to signal new data being available.
35 Since IBI is initiated by the sensor, it will take over the I3C
38 Or else the I3C controller will not be able to be initialized,
58 On the board :zephyr:board:`mimxrt685_evk`, the I3C pins are exposed on the J18
Dsample.yaml2 name: LPS22HH Temperature and Pressure Monitor (using I3C)
4 sample.sensor.lps22hh.i3c:
7 depends_on: i3c

123456