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/Zephyr-latest/include/zephyr/devicetree/
Ddma.h20 * @defgroup devicetree-dmas Devicetree DMA API
27 * dmas property at an index
36 * dmas = <&dma1 1 2 0x400 0x3>,
45 * @param node_id node identifier for a node with a dmas property
46 * @param idx logical index into dmas property
51 #define DT_DMAS_CTLR_BY_IDX(node_id, idx) DT_PHANDLE_BY_IDX(node_id, dmas, idx)
55 * dmas property by name
64 * dmas = <&dma1 1 2 0x400 0x3>,
74 * @param node_id node identifier for a node with a dmas property
75 * @param name lowercase-and-underscores name of a dmas element
[all …]
/Zephyr-latest/dts/bindings/spi/
Datmel,sam-spi.yaml28 dmas:
35 For example dmas for TX and RX may look like
36 dmas = <&xdmac 1 DMA_PERID_SPI0_TX>, <&xdmac 2 DMA_PERID_SPI0_RX>;
41 dmas.
43 For example using the example dmas, an example dma-names would be
Datmel,sam0-spi.yaml40 dmas:
46 For example dmas for TX, RX on SERCOM3
47 dmas = <&dmac 0 0xb>, <&dmac 1 0xa>;
51 Required if the dmas property exists. This should be "tx" and "rx"
52 to match the dmas property.
Dinfineon,xmc4xxx-spi.yaml41 dmas:
45 The dmas are referenced in the USIC/SPI node using the following syntax:
46 dmas = <&dma1 1 0 XMC4XXX_SET_CONFIG(10,6)>, <&dma1 2 0 XMC4XXX_SET_CONFIG(11,6)>;
69 Required if the dmas property exists. Should be set to "tx" and "rx"
70 to match the dmas property.
/Zephyr-latest/dts/bindings/i2c/
Datmel,sam0-i2c.yaml33 dmas:
39 For example dmas for TX, RX on SERCOM3
40 dmas = <&dmac 0 0xb>, <&dmac 0 0xa>;
44 Required if the dmas property exists. This should be "tx" and "rx"
45 to match the dmas property.
/Zephyr-latest/dts/bindings/arm/
Datmel,sam-ssc.yaml22 dmas:
29 For example dmas for TX, RX would look like
30 dmas = <&xdmac 22 DMA_PERID_SSC_TX>, <&xdmac 23 DMA_PERID_SSC_RX>;
35 This should be "tx" and "rx" to match the dmas property.
/Zephyr-latest/dts/bindings/serial/
Dadi,max32-uart.yaml53 dmas:
58 For example dmas for TX, RX on UART2
59 dmas = <&dma0 1 MAX32_DMA_SLOT_UART2_TX>, <&dma0 2 MAX32_DMA_SLOT_UART2_RX>;
63 Required if the dmas property exists. This should be "tx" and "rx"
64 to match the dmas property.
Dinfineon,xmc4xxx-uart.yaml86 dmas:
90 The dmas are referenced in the UART node using the following syntax:
91 dmas = <&dma1 1 0 XMC4XXX_SET_CONFIG(10,6)>, <&dma1 2 0 XMC4XXX_SET_CONFIG(11,6)>;
114 Required if the dmas property exists. Should be set to "tx" and "rx"
115 to match the dmas property.
/Zephyr-latest/dts/bindings/mmc/
Dst,stm32-sdmmc.yaml58 configuration using "dmas" property.
61 dmas:
70 For example dmas for TX/RX on SDMMC
71 dmas = <&dma2 4 6 0x30000 0x00>, <&dma2 4 3 0x30000 0x00>;
/Zephyr-latest/dts/bindings/ospi/
Dst,stm32-ospi.yaml16 dmas = <&dma1 5 41 0x10000>;
44 dmas:
47 For example dmas for TX/RX on OSPI
48 dmas = <&dma1 5 41 0x10000>;
50 With, in each cell of the dmas specifier:
64 For example dmas for TX/RX on OSPI
65 dmas = <&dma1 5 41 0x10000>;
/Zephyr-latest/dts/bindings/qspi/
Dst,stm32-qspi.yaml14 dmas = <&dma1 5 5 0x0000 0x03>;
39 dmas:
51 dmas = <&dma2 7 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>;
54 dmas = <&dma2 0 20 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>;
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt11xx_cm4.dtsi66 dmas = <&edma_lpsr0 0 54>, <&edma_lpsr0 0 55>;
73 dmas = <&edma_lpsr0 0 56>, <&edma_lpsr0 0 57>;
80 dmas = <&edma_lpsr0 0 58>, <&edma_lpsr0 0 59>;
87 dmas = <&edma_lpsr0 0 60>, <&edma_lpsr0 0 61>;
94 dmas = <&edma_lpsr0 1 8>, <&edma_lpsr0 2 9>;
99 dmas = <&edma_lpsr0 3 10>, <&edma_lpsr0 4 11>;
104 dmas = <&edma_lpsr0 5 12>, <&edma_lpsr0 6 13>;
109 dmas = <&edma_lpsr0 7 14>, <&edma_lpsr0 8 15>;
114 dmas = <&edma_lpsr0 9 16>, <&edma_lpsr0 10 17>;
119 dmas = <&edma_lpsr0 11 18>, <&edma_lpsr0 12 19>;
[all …]
Dnxp_rt11xx_cm7.dtsi99 dmas = <&edma0 0 54>, <&edma0 0 55>;
106 dmas = <&edma0 0 56>, <&edma0 0 57>;
113 dmas = <&edma0 0 58>, <&edma0 0 59>;
120 dmas = <&edma0 0 60>, <&edma0 0 61>;
127 dmas = <&edma0 1 8>, <&edma0 2 9>;
132 dmas = <&edma0 3 10>, <&edma0 4 11>;
137 dmas = <&edma0 5 12>, <&edma0 6 13>;
142 dmas = <&edma0 7 14>, <&edma0 8 15>;
147 dmas = <&edma0 9 16>, <&edma0 10 17>;
152 dmas = <&edma0 11 18>, <&edma0 12 19>;
[all …]
/Zephyr-latest/drivers/spi/spi_nxp_lpspi/
DKconfig19 depends on $(dt_compat_any_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas)
27 depends on $(dt_compat_any_not_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas) || !SPI_MCUX_LPSPI_DMA
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dsamc21n_xpro.overlay13 dmas = <&dmac 0 0x02>, <&dmac 1 0x03>;
23 dmas = <&dmac 10 0x0A>, <&dmac 11 0x0B>;
Dsamd21_xpro.overlay17 dmas = <&dmac 0 3>, <&dmac 1 4>;
23 dmas = <&dmac 10 7>, <&dmac 11 8>;
Dsame54_xpro.overlay19 dmas = <&dmac 0 6>, <&dmac 1 7>;
25 dmas = <&dmac 30 8>, <&dmac 31 9>;
Dsaml21_xpro.overlay17 dmas = <&dmac 0 0x03>, <&dmac 1 0x04>;
23 dmas = <&dmac 10 0x07>, <&dmac 11 0x08>;
Dsamr21_xpro.overlay17 dmas = <&dmac 0 1>, <&dmac 1 2>;
35 dmas = <&dmac 10 7>, <&dmac 11 8>;
Dsamr34_xpro.overlay13 dmas = <&dmac 0 0x01>, <&dmac 1 0x02>;
34 dmas = <&dmac 0 0x05>, <&dmac 1 0x06>;
/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_esp32.h28 COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
33 COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
/Zephyr-latest/tests/drivers/i2c/i2c_target_api/boards/
Dmax78002evkit_max78002_m4.overlay8 dmas = <&dma0 0 MAX78_DMA_SLOT_I2C0_TX>, <&dma0 1 MAX78_DMA_SLOT_I2C0_RX>;
24 dmas = <&dma0 2 MAX78_DMA_SLOT_I2C1_TX>, <&dma0 3 MAX78_DMA_SLOT_I2C1_RX>;
/Zephyr-latest/samples/drivers/i2s/echo/boards/
Desp32s3_devkitc_procpu.overlay38 dmas = <&dma 3>;
48 dmas = <&dma 4>;
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dsam_e70_xplained_same70q21.overlay10 dmas = <&xdmac 1 DMA_PERID_SPI0_TX>, <&xdmac 2 DMA_PERID_SPI0_RX>;
28 dmas = <&xdmac 3 DMA_PERID_SPI1_TX>, <&xdmac 4 DMA_PERID_SPI1_RX>;
Dsam_v71_xult_samv71q21.overlay10 dmas = <&xdmac 1 DMA_PERID_SPI0_TX>, <&xdmac 2 DMA_PERID_SPI0_RX>;
28 dmas = <&xdmac 3 DMA_PERID_SPI1_TX>, <&xdmac 4 DMA_PERID_SPI1_RX>;

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