1description: stm32 sdmmc disk access
2
3compatible: "st,stm32-sdmmc"
4
5include: [mmc.yaml, pinctrl-device.yaml, reset-device.yaml]
6
7properties:
8  clocks:
9    required: true
10
11  reg:
12    required: true
13
14  resets:
15    required: true
16
17  pinctrl-0:
18    required: true
19
20  pinctrl-names:
21    required: true
22
23  cd-gpios:
24    type: phandle-array
25    description: Card Detect pin
26
27  pwr-gpios:
28    type: phandle-array
29    description: Power pin
30
31  bus-width:
32    type: int
33    default: 1
34    description: |
35        bus width for SDMMC access, defaults to the minimum necessary
36        number of bus lines
37    enum:
38      - 1
39      - 4
40      - 8
41
42  clk-div:
43    type: int
44    default: 0
45    description: |
46        Clock division factor for SDMMC. Typically the clock operates at 25MHz so
47        a division factor of 2 would be 25MHz / 2 = 12.5MHz.
48
49  idma:
50    type: boolean
51    description: |
52      SDMMC device has an internal DMA. Internal DMA doesn't require any additional
53      configuration using "dmas" property.
54      Delete this property to use interrupt driven mode.
55
56  dmas:
57    description: |
58      Optional DMA channel specifier. If DMA should be used, specifier should
59      hold a phandle reference to the dma controller, the channel number,
60      the slot number, channel configuration and finally features.
61
62      Only priority bits are used in the configuration. There are no feature
63      flags.
64
65      For example dmas for TX/RX on SDMMC
66         dmas = <&dma2 4 6 0x30000 0x00>, <&dma2 4 3 0x30000 0x00>;
67
68  dma-names:
69    description: |
70      DMA channel name. If DMA should be used, expected value is "tx", "rx".
71
72      For example
73         dma-names = "tx", "rx";
74