| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | pincfg-node.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Generic pin configuration schema
7 Many data items that are represented in a pin configuration node are
8 common and generic. Pin control bindings should use the properties
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
21 description: disable any pin bias
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
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| D | renesas,rzg-pinctrl.yaml | 3 # SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl_rzg3s.h>
10 device-pinmux {
15 drive-strength = <1>;
18 device-spins {
20 input-enable;
22 drive-strength = <2>;
27 compatible: renesas,rzg-pinctrl
34 reg-names:
37 child-binding:
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| D | ti,cc13xx-cc26xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 Device pin configuration should be placed in the child nodes of this node.
8 Populate the 'pinmux' field with a pair consisting of a pin number and its IO
18 All device pin configurations should be placed in child nodes of the
22 supported standard pin properties:
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
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| /Zephyr-latest/samples/boards/st/backup_sram/ |
| D | README.rst | 1 .. zephyr:code-sample:: stm32_backup_sram
10 NVM when VBAT pin is supplied with a voltage source, e.g. a coin button cell.
13 application runs the current value is displayed and then incremented by one. If
14 VBAT is preserved, the incremented value will be shown on the next power-cycle.
19 To exercise this sample with an independent VBAT source, you will need to
28 .. zephyr-app-commands::
29 :zephyr-app: samples/boards/st/backup_sram
37 .. code-block:: console
39 Current value in backup SRAM: 11
41 Keep VBAT power source and reset the board now!
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | ti,fdc2x1x.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 sd-gpios:
12 type: phandle-array
14 The SD pin defaults to active high when consumed by the sensor.
18 intb-gpios:
19 type: phandle-array
21 The INTB pin defaults to active low when produced by the sensor.
28 Set to identify the sensor as FDC2114 or FDC2214 (4-channel version)
33 Set the Auto-Scan Mode.
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| /Zephyr-latest/drivers/adc/ |
| D | Kconfig | 4 # SPDX-License-Identifier: Apache-2.0
10 bool "Analog-to-Digital Converter (ADC) drivers"
31 # required to explicitly specify for the excitation current source the pin
37 # allow a configurable voltage bias pin.
54 module-str = ADC
55 source "subsys/logging/Kconfig.template.log_config"
57 source "drivers/adc/Kconfig.b91"
59 source "drivers/adc/Kconfig.it8xxx2"
61 source "drivers/adc/Kconfig.mcux"
63 source "drivers/adc/Kconfig.nrfx"
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| /Zephyr-latest/samples/basic/blinky/ |
| D | README.rst | 1 .. zephyr:code-sample:: blinky
3 :relevant-api: gpio_interface
12 The source code shows how to:
14 #. Get a pin specification from the :ref:`devicetree <dt-guide>` as a
16 #. Configure the GPIO pin as an output
17 #. Toggle the pin forever
19 See :zephyr:code-sample:`pwm-blinky` for a similar sample that uses the PWM API instead.
21 .. _blinky-sample-requirements:
28 #. Have an LED connected via a GPIO pin (these are called "User LEDs" on many of
37 .. zephyr-app-commands::
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_xlnx_ps_bank.c | 6 * SPDX-License-Identifier: Apache-2.0
24 #define DEV_CFG(_dev) ((const struct gpio_xlnx_ps_bank_dev_cfg *)(_dev)->config)
25 #define DEV_DATA(_dev) ((struct gpio_xlnx_ps_bank_dev_data *const)(_dev)->data)
28 * @brief GPIO bank pin configuration function
30 * Configures an individual pin within a MIO / EMIO GPIO pin bank.
34 * - Pull up
35 * - Pull down
36 * - Open drain
37 * - Open source.
40 * @param pin Index of the pin within the bank to be configured
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| /Zephyr-latest/dts/bindings/serial/ |
| D | renesas,smartbond-uart.yaml | 3 compatible: "renesas,smartbond-uart"
5 include: [uart-controller.yaml, pinctrl-device.yaml]
14 periph-clock-config:
19 current-speed:
24 - 4800
25 - 9600
26 - 14400
27 - 19200
28 - 28800
29 - 38400
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| /Zephyr-latest/subsys/usb/usb_c/ |
| D | usbc_tc_common_internal.h | 4 * SPDX-License-Identifier: Apache-2.0
20 * sub-state runs
28 * @brief Type-C States
45 /** Unattached Source State */
47 /** Unattached Wait Source State */
49 /** Attach Wait Source State */
51 /** Attached Source State */
79 /** Voltage on CC pin */
81 /** Current CC1 value */
83 /** Current CC2 value */
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| D | usbc_tc_src_states.c | 4 * SPDX-License-Identifier: Apache-2.0
38 const struct device *dev = tc->dev; in tc_unattached_src_run()
42 * The SRC.Rd is detected on either CC1 or CC2 pin or in tc_unattached_src_run()
47 if (tcpc_is_cc_at_least_one_rd(tc->cc1, tc->cc2)) { in tc_unattached_src_run()
55 * When in the UnattachedWait.SRC state, the port is discharging the CC pin
62 * 2: The port shall continue to provide an Rp termination on the CC pin not
66 * 3: The port shall provide an Rdch termination on the CC pin being
74 const struct device *dev = tc->dev; in tc_unattached_wait_src_entry()
75 struct usbc_port_data *data = dev->data; in tc_unattached_wait_src_entry()
76 const struct device *tcpc = data->tcpc; in tc_unattached_wait_src_entry()
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| /Zephyr-latest/doc/build/dts/ |
| D | design.rst | 1 .. _dt-design:
8 specific examples about how they impact Zephyr's source code, and areas where
11 Single source for hardware information
14 Zephyr's built-in device drivers and sample applications shall obtain
20 - New device drivers shall use devicetree APIs to determine which :ref:`devices
21 to create <dt-create-devices>`.
23 - In-tree sample applications shall use :ref:`aliases <dt-alias-chosen>` to
25 used in the current build. For example, the :zephyr:code-sample:`blinky` sample uses this to
28 - Boot-time pin muxing and pin control for new SoCs shall be accomplished via a
29 devicetree-based pinctrl driver
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| /Zephyr-latest/include/zephyr/dt-bindings/gpio/ |
| D | nordic-nrf-gpio.h | 4 * SPDX-License-Identifier: Apache-2.0
10 * @brief nRF-specific GPIO Flags
11 * @defgroup gpio_interface_nrf nRF-specific GPIO Flags
20 * Standard (S) or High (H) drive modes can be applied to both pin levels, 0 or
21 * 1. High drive mode will increase current capabilities of the pin (refer to
24 * When the pin is configured to operate in open-drain mode (wired-and), the
26 * Similarly, when the pin is configured to operate in open-source mode
27 * (wired-or), the drive mode can only be set for the 1 level
33 * - Bit 8: Drive mode for '0' (0=Standard, 1=High)
34 * - Bit 9: Drive mode for '1' (0=Standard, 1=High)
|
| /Zephyr-latest/soc/microchip/mec/mec172x/reg/ |
| D | mec172x_vbat.h | 4 * SPDX-License-Identifier: Apache-2.0
16 /* Offset 0x00 Power-Fail and Reset Status */
33 /* Offset 0x08 32K Clock Source register */
50 /* disable XTAL high startup current */
57 /* Select source of peripheral 32KHz clock */
68 /* 32K input pin on VTR. Switch to Silicon OSC on VBAT */
70 /* 32K input pin on VTR. Switch to crystal on VBAT */
72 /* Disable internal 32K VBAT clock source when VTR is off */
77 * Monotonic Counter least significant word (32-bit), read-only.
82 /* Monotonic Counter most significant word (32-bit). Read-Write */
|
| /Zephyr-latest/drivers/regulator/ |
| D | regulator_npm1300.c | 3 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/dt-bindings/regulator/npm1300.h>
84 uint8_t source; member
101 const struct regulator_npm1300_config *config = dev->config; in regulator_npm1300_count_voltages()
103 switch (config->source) { in regulator_npm1300_count_voltages()
116 const struct regulator_npm1300_config *config = dev->config; in regulator_npm1300_list_voltage()
118 switch (config->source) { in regulator_npm1300_list_voltage()
125 return -EINVAL; in regulator_npm1300_list_voltage()
131 const struct regulator_npm1300_config *config = dev->config; in retention_set_voltage()
136 switch (config->source) { in retention_set_voltage()
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| /Zephyr-latest/soc/atmel/sam0/common/ |
| D | soc_port.h | 2 * Copyright (c) 2016-2017 Piotr Mienkowski
3 * Copyright (c) 2020-2022 Gerson Fernando Budke
4 * SPDX-License-Identifier: Apache-2.0
8 * @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
17 * Pin flags/attributes
27 /* Open-Drain is a reserved entry at pinctrl driver */
29 /* Input-Enable means Input-Buffer, see dts/pinctrl/pincfg-node.yaml */
32 /* Output-Enable, see dts/pinctrl/pincfg-node.yaml */
35 /* Drive-Strength, 0mA means normal, any other value means stronger */
46 /** Connect pin to peripheral A. */
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| D | Kconfig.saml2x | 2 # SPDX-License-Identifier: Apache-2.0
25 bool "External 32.768 kHz clock source"
27 Enable the external 32.768 kHz cloud source at startup.
79 As detailed in DS70005356C, LoRa radio SPI pins do not have pull-ups,
81 to avoid unexpected behavior and increased current consumption. To
83 keeping nRST pin low. When enabling this option, both CS and nRST will
|
| /Zephyr-latest/dts/bindings/adc/ |
| D | adc-controller.yaml | 3 # SPDX-License-Identifier: Apache-2.0
10 "#io-channel-cells":
14 "#address-cells":
17 "#size-cells":
20 child-binding:
41 - ADC_GAIN_1_6: x 1/6
42 - ADC_GAIN_1_5: x 1/5
43 - ADC_GAIN_1_4: x 1/4
44 - ADC_GAIN_1_3: x 1/3
45 - ADC_GAIN_2_5: x 2/5
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| /Zephyr-latest/dts/bindings/power/ |
| D | st,stm32wb0-pwr.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32wb0-pwr"
8 include: "st,stm32-pwr.yaml"
11 smps-mode:
18 - SMPS converter disabled
19 - LDOs supply voltage: VDD
29 - SMPS converter enabled - clock disabled
30 - LDOs supply voltage: VDD (though SMPS)
31 - Current supplied to LDOs can be limited
35 - SMPS converter enabled - clock enabled
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| /Zephyr-latest/drivers/usb_c/ppc/ |
| D | nxp_nx20p3483.c | 3 * SPDX-License-Identifier: Apache-2.0
37 /** Boolean value whether to use high-voltage source if true or 5V source if false */
39 /** Overcurrent protection threshold for 5V source role */
41 /** Overcurrent protection threshold for HV source role */
63 const struct nx20p3483_cfg *cfg = dev->config; in read_reg()
66 ret = i2c_reg_read_byte(cfg->bus.bus, cfg->bus.addr, reg, value); in read_reg()
77 const struct nx20p3483_cfg *cfg = dev->config; in write_reg()
80 ret = i2c_reg_write_byte(cfg->bus.bus, cfg->bus.addr, reg, value); in write_reg()
94 return -EINVAL; in nx20p3483_set_snk_ovp_limit()
170 const struct nx20p3483_cfg *cfg = dev->config; in nx20p3483_set_vbus_sink()
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| /Zephyr-latest/include/zephyr/usb_c/ |
| D | tcpci.h | 3 * SPDX-License-Identifier: Apache-2.0
15 * Registers and fields are compliant to the Type-C Port Controller Interface
19 /** Register address - vendor id */
22 /** Register address - product id */
25 /** Register address - version of TCPC */
28 /** Register address - USB TypeC version */
30 /** Mask for major part of type-c release supported */
32 /** Macro to extract the major part of type-c release supported */
34 /** Mask for minor part of type-c release supported */
36 /** Macro to extract the minor part of type-c release supported */
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| /Zephyr-latest/boards/nxp/mimxrt595_evk/ |
| D | mimxrt595_evk_mimxrt595s_cm33.dts | 2 * Copyright 2022-2023, NXP
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include "mimxrt595_evk_mimxrt595s_cm33-pinctrl.dtsi"
16 model = "NXP MIMXRT595-EVK board";
25 usart-0 = &flexcomm0;
30 pwm-0 = &sc_timer;
31 dmic-dev = &dmic0;
32 mcuboot-button0 = &user_button_1;
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| /Zephyr-latest/boards/nxp/frdm_mcxn947/ |
| D | frdm_mcxn947.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 #include "frdm_mcxn947-pinctrl.dtsi"
8 #include <zephyr/dt-bindings/i2c/i2c.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
19 mcuboot-button0 = &user_button_2;
23 compatible = "gpio-leds";
42 compatible = "gpio-keys";
58 * This node describes the GPIO pins of the LCD-PAR-S035 panel 8080 interface.
60 nxp_lcd_8080_connector: lcd-8080-connector {
61 compatible = "nxp,lcd-8080";
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| /Zephyr-latest/boards/st/nucleo_f767zi/ |
| D | nucleo_f767zi.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f767zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL.
16 * compatibility, the pin PB5 (also on ST Zio connector) can be used
21 model = "STMicroelectronics STM32F767ZI-NUCLEO board";
22 compatible = "st,stm32f767zi-nucleo";
26 zephyr,shell-uart = &usart3;
29 zephyr,code-partition = &slot0_partition;
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| /Zephyr-latest/boards/st/nucleo_f746zg/ |
| D | nucleo_f746zg.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f746zgtx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL.
16 * compatibility, the pin PB5 (also on ST Zio connector) can be used
21 model = "STMicroelectronics STM32F746ZG-NUCLEO board";
22 compatible = "st,stm32f746zg-nucleo";
26 zephyr,shell-uart = &usart3;
34 compatible = "gpio-leds";
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