| /Zephyr-latest/samples/drivers/clock_control_litex/src/ |
| D | main.c | 103 ret = clock_control_on(dev, sub_system1); in litex_clk_test_single()
107 ret = clock_control_on(dev, sub_system2); in litex_clk_test_single()
147 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
152 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
163 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
168 ret = clock_control_on(dev, sub_system); in litex_clk_test_freq()
199 ret = clock_control_on(dev, sub_system1); in litex_clk_test_phase()
209 ret = clock_control_on(dev, sub_system2); in litex_clk_test_phase()
238 ret = clock_control_on(dev, sub_system1); in litex_clk_test_duty()
242 ret = clock_control_on(dev, sub_system2); in litex_clk_test_duty()
[all …]
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_dwmac_stm32h7x.c | 60 ret = clock_control_on(p->clock, (clock_control_subsys_t)&pclken); in dwmac_bus_init()
61 ret |= clock_control_on(p->clock, (clock_control_subsys_t)&pclken_tx); in dwmac_bus_init()
62 ret |= clock_control_on(p->clock, (clock_control_subsys_t)&pclken_rx); in dwmac_bus_init()
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| /Zephyr-latest/samples/drivers/clock_control_litex/ |
| D | README.rst | 48 …ed with the :ref:`Clock Control API <clock_control_api>` function ``clock_control_on()`` and a Lit…
50 …itex_clk_setup` onto :c:type:`clock_control_subsys_t` and use it with :c:func:`clock_control_on()`.
65 if ((ret = clock_control_on(dev, sub_system)) != 0) {
72 In both getter functions, basic usage is similar to ``clock_control_on()``. Structure ``litex_clk_s…
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| /Zephyr-latest/tests/drivers/clock_control/pwm_clock/src/ |
| D | main.c | 34 ret = clock_control_on(clk_dev, 0); in pwm_clock_setup()
35 zassert_equal(0, ret, "%s: Unexpected err (%d) from clock_control_on", clk_dev->name, ret); in pwm_clock_setup()
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| /Zephyr-latest/drivers/counter/ |
| D | timer_dtmr_cmsdk_apb.c | 158 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_as); in dtmr_cmsdk_apb_init()
159 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_ss); in dtmr_cmsdk_apb_init()
160 clock_control_on(clk, (clock_control_subsys_t) &cfg->dtimer_cc_dss); in dtmr_cmsdk_apb_init()
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| D | timer_tmr_cmsdk_apb.c | 158 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_as); in tmr_cmsdk_apb_init()
159 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_ss); in tmr_cmsdk_apb_init()
160 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_dss); in tmr_cmsdk_apb_init()
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| /Zephyr-latest/boards/arduino/nicla_vision/ |
| D | camera_ext_clock.c | 25 ret = clock_control_on(cam_ext_clk_dev, (clock_control_subsys_t)0); in camera_ext_clock_enable()
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| /Zephyr-latest/drivers/ethernet/eth_nxp_enet_qos/ |
| D | eth_nxp_enet_qos.c | 22 ret = clock_control_on(config->clock_dev, config->clock_subsys); in nxp_enet_qos_init()
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| /Zephyr-latest/dts/bindings/clock/ |
| D | pwm-clock.yaml | 48 clock has started after returning from clock_control_on().
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| /Zephyr-latest/soc/st/stm32/common/ |
| D | stm32_backup_sram.c | 35 ret = clock_control_on(clk, (clock_control_subsys_t)&config->pclken); in stm32_backup_sram_init()
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| /Zephyr-latest/drivers/hwinfo/ |
| D | hwinfo_sam_rstc.c | 64 (void)clock_control_on(SAM_DT_PMC_CONTROLLER, in hwinfo_rstc_init()
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| /Zephyr-latest/tests/drivers/clock_control/fixed_clock/src/ |
| D | test_clock_control.c | 29 err = clock_control_on(dev, 0); in ZTEST()
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| /Zephyr-latest/drivers/usb/device/ |
| D | usb_dc_dw_stm32.h | 52 return clock_control_on(clk->dev, (void *)&clk->pclken[0]); in clk_enable_st_stm32f4_fsotg()
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| /Zephyr-latest/drivers/misc/pio_rpi_pico/ |
| D | pio_rpi_pico.c | 49 ret = clock_control_on(config->clk_dev, config->clk_id); in pio_rpi_pico_init()
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| /Zephyr-latest/tests/drivers/clock_control/clock_control_api/src/ |
| D | test_clock_control.c | 126 err = clock_control_on(dev, subsys); in test_on_off_status_instance()
274 err = clock_control_on(dev, subsys); in test_double_start_on_instance()
277 err = clock_control_on(dev, subsys); in test_double_start_on_instance()
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| /Zephyr-latest/drivers/pinctrl/ |
| D | pinctrl_gd32_afio.c | 71 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in afio_init()
141 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in configure_pin()
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| D | pinctrl_gd32_af.c | 91 (void)clock_control_on(GD32_CLOCK_CONTROLLER, in pinctrl_configure_pin()
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| /Zephyr-latest/drivers/dac/ |
| D | dac_esp32.c | 71 if (clock_control_on(cfg->clock_dev, (clock_control_subsys_t)cfg->clock_subsys) != 0) { in dac_esp32_init()
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| /Zephyr-latest/drivers/entropy/ |
| D | entropy_esp32.c | 79 ret = clock_control_on(clock_dev, clock_subsys); in entropy_esp32_init()
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| D | entropy_max32.c | 77 ret = clock_control_on(cfg->clock, (clock_control_subsys_t)&cfg->perclk); in entropy_max32_init()
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_si32_ahb.c | 71 ret = clock_control_on(config->clock_dev, NULL); in clock_control_si32_ahb_init()
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/ |
| D | test_stm32_clock_configuration_i2s.c | 28 r = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
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| /Zephyr-latest/drivers/memc/ |
| D | memc_stm32.c | 61 r = clock_control_on(clk, (clock_control_subsys_t)&config->pclken[0]); in memc_stm32_init()
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| /Zephyr-latest/soc/st/stm32/stm32wbax/hci_if/ |
| D | bleplat.c | 104 clock_control_on(rcc, rng_pclken); in enable_rng_clock()
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| /Zephyr-latest/drivers/bluetooth/hci/ |
| D | apollox_blue.c | 99 clock_control_on(clk32m_dev, in bt_clkreq_isr()
257 clock_control_on(clk32k_dev, (clock_control_subsys_t)CLOCK_CONTROL_AMBIQ_TYPE_LFXTAL); in bt_hci_transport_setup()
260 clock_control_on(clk32m_dev, (clock_control_subsys_t)CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_BLE); in bt_hci_transport_setup()
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