1 /*
2 * Copyright (c) 2016 Linaro Limited.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT arm_cmsdk_timer
8
9 #include <zephyr/drivers/counter.h>
10 #include <zephyr/device.h>
11 #include <errno.h>
12 #include <zephyr/init.h>
13 #include <zephyr/irq.h>
14 #include <soc.h>
15 #include <zephyr/drivers/clock_control/arm_clock_control.h>
16
17 #include "timer_cmsdk_apb.h"
18
19 typedef void (*timer_config_func_t)(const struct device *dev);
20
21 struct tmr_cmsdk_apb_cfg {
22 struct counter_config_info info;
23 volatile struct timer_cmsdk_apb *timer;
24 timer_config_func_t timer_config_func;
25 /* Timer Clock control in Active State */
26 const struct arm_clock_control_t timer_cc_as;
27 /* Timer Clock control in Sleep State */
28 const struct arm_clock_control_t timer_cc_ss;
29 /* Timer Clock control in Deep Sleep State */
30 const struct arm_clock_control_t timer_cc_dss;
31 };
32
33 struct tmr_cmsdk_apb_dev_data {
34 counter_top_callback_t top_callback;
35 void *top_user_data;
36
37 uint32_t load;
38 };
39
tmr_cmsdk_apb_start(const struct device * dev)40 static int tmr_cmsdk_apb_start(const struct device *dev)
41 {
42 const struct tmr_cmsdk_apb_cfg * const cfg =
43 dev->config;
44 struct tmr_cmsdk_apb_dev_data *data = dev->data;
45
46 /* Set the timer reload to count */
47 cfg->timer->reload = data->load;
48
49 cfg->timer->ctrl = TIMER_CTRL_EN;
50
51 return 0;
52 }
53
tmr_cmsdk_apb_stop(const struct device * dev)54 static int tmr_cmsdk_apb_stop(const struct device *dev)
55 {
56 const struct tmr_cmsdk_apb_cfg * const cfg =
57 dev->config;
58 /* Disable the timer */
59 cfg->timer->ctrl = 0x0;
60
61 return 0;
62 }
63
tmr_cmsdk_apb_get_value(const struct device * dev,uint32_t * ticks)64 static int tmr_cmsdk_apb_get_value(const struct device *dev, uint32_t *ticks)
65 {
66 const struct tmr_cmsdk_apb_cfg * const cfg =
67 dev->config;
68 struct tmr_cmsdk_apb_dev_data *data = dev->data;
69
70 /* Get Counter Value */
71 *ticks = data->load - cfg->timer->value;
72 return 0;
73 }
74
tmr_cmsdk_apb_set_top_value(const struct device * dev,const struct counter_top_cfg * top_cfg)75 static int tmr_cmsdk_apb_set_top_value(const struct device *dev,
76 const struct counter_top_cfg *top_cfg)
77 {
78 const struct tmr_cmsdk_apb_cfg * const cfg =
79 dev->config;
80 struct tmr_cmsdk_apb_dev_data *data = dev->data;
81
82 /* Counter is always reset when top value is updated. */
83 if (top_cfg->flags & COUNTER_TOP_CFG_DONT_RESET) {
84 return -ENOTSUP;
85 }
86
87 data->top_callback = top_cfg->callback;
88 data->top_user_data = top_cfg->user_data;
89
90 /* Store the reload value */
91 data->load = top_cfg->ticks;
92
93 /* Set value register to count */
94 cfg->timer->value = top_cfg->ticks;
95
96 /* Set the timer reload to count */
97 cfg->timer->reload = top_cfg->ticks;
98
99 /* Enable IRQ */
100 cfg->timer->ctrl |= TIMER_CTRL_IRQ_EN;
101
102 return 0;
103 }
104
tmr_cmsdk_apb_get_top_value(const struct device * dev)105 static uint32_t tmr_cmsdk_apb_get_top_value(const struct device *dev)
106 {
107 struct tmr_cmsdk_apb_dev_data *data = dev->data;
108
109 uint32_t ticks = data->load;
110
111 return ticks;
112 }
113
tmr_cmsdk_apb_get_pending_int(const struct device * dev)114 static uint32_t tmr_cmsdk_apb_get_pending_int(const struct device *dev)
115 {
116 const struct tmr_cmsdk_apb_cfg * const cfg =
117 dev->config;
118
119 return cfg->timer->intstatus;
120 }
121
122 static DEVICE_API(counter, tmr_cmsdk_apb_api) = {
123 .start = tmr_cmsdk_apb_start,
124 .stop = tmr_cmsdk_apb_stop,
125 .get_value = tmr_cmsdk_apb_get_value,
126 .set_top_value = tmr_cmsdk_apb_set_top_value,
127 .get_pending_int = tmr_cmsdk_apb_get_pending_int,
128 .get_top_value = tmr_cmsdk_apb_get_top_value,
129 };
130
tmr_cmsdk_apb_isr(void * arg)131 static void tmr_cmsdk_apb_isr(void *arg)
132 {
133 const struct device *dev = (const struct device *)arg;
134 struct tmr_cmsdk_apb_dev_data *data = dev->data;
135 const struct tmr_cmsdk_apb_cfg * const cfg =
136 dev->config;
137
138 cfg->timer->intclear = TIMER_CTRL_INT_CLEAR;
139 if (data->top_callback) {
140 data->top_callback(dev, data->top_user_data);
141 }
142 }
143
tmr_cmsdk_apb_init(const struct device * dev)144 static int tmr_cmsdk_apb_init(const struct device *dev)
145 {
146 const struct tmr_cmsdk_apb_cfg * const cfg =
147 dev->config;
148
149 #ifdef CONFIG_CLOCK_CONTROL
150 /* Enable clock for subsystem */
151 const struct device *const clk = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(0));
152
153 if (!device_is_ready(clk)) {
154 return -ENODEV;
155 }
156
157 #ifdef CONFIG_SOC_SERIES_BEETLE
158 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_as);
159 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_ss);
160 clock_control_on(clk, (clock_control_subsys_t) &cfg->timer_cc_dss);
161 #endif /* CONFIG_SOC_SERIES_BEETLE */
162 #endif /* CONFIG_CLOCK_CONTROL */
163
164 cfg->timer_config_func(dev);
165
166 return 0;
167 }
168
169 #define TIMER_CMSDK_INIT(inst) \
170 static void timer_cmsdk_apb_config_##inst(const struct device *dev); \
171 \
172 static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_##inst = { \
173 .info = { \
174 .max_top_value = UINT32_MAX, \
175 .freq = 24000000U, \
176 .flags = COUNTER_CONFIG_INFO_COUNT_UP, \
177 .channels = 0U, \
178 }, \
179 .timer = ((volatile struct timer_cmsdk_apb *)DT_INST_REG_ADDR(inst)), \
180 .timer_config_func = timer_cmsdk_apb_config_##inst, \
181 .timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE, \
182 .device = DT_INST_REG_ADDR(inst),}, \
183 .timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP, \
184 .device = DT_INST_REG_ADDR(inst),}, \
185 .timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP, \
186 .device = DT_INST_REG_ADDR(inst),}, \
187 }; \
188 \
189 static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_##inst = { \
190 .load = UINT32_MAX, \
191 }; \
192 \
193 DEVICE_DT_INST_DEFINE(inst, \
194 tmr_cmsdk_apb_init, \
195 NULL, \
196 &tmr_cmsdk_apb_dev_data_##inst, \
197 &tmr_cmsdk_apb_cfg_##inst, POST_KERNEL, \
198 CONFIG_COUNTER_INIT_PRIORITY, \
199 &tmr_cmsdk_apb_api); \
200 \
201 static void timer_cmsdk_apb_config_##inst(const struct device *dev) \
202 { \
203 IRQ_CONNECT(DT_INST_IRQN(inst), \
204 DT_INST_IRQ(inst, priority), \
205 tmr_cmsdk_apb_isr, \
206 DEVICE_DT_INST_GET(inst), \
207 0); \
208 irq_enable(DT_INST_IRQN(inst)); \
209 }
210
211 DT_INST_FOREACH_STATUS_OKAY(TIMER_CMSDK_INIT)
212
