| /Zephyr-latest/drivers/can/ |
| D | can_fake.c | 60 static int fake_can_get_core_clock_delegate(const struct device *dev, uint32_t *rate) in fake_can_get_core_clock_delegate()
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| D | can_numaker.c | 45 static int can_numaker_get_core_clock(const struct device *dev, uint32_t *rate) in can_numaker_get_core_clock()
127 uint32_t rate; in can_numaker_init_unlocked() local
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_sam_pmc.c | 75 uint32_t *rate) in atmel_sam_clock_control_get_rate()
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| D | clock_control_mcux_ccm.c | 191 uint32_t *rate) in mcux_ccm_get_subsys_rate()
504 clock_control_subsys_rate_t rate) in mcux_ccm_set_subsys_rate()
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| D | clock_stm32_ll_wb0.c | 275 uint32_t *rate, uint32_t slow_clock, uint32_t sysclk, uint32_t clk_sys) in get_apb0_periph_clkrate()
316 uint32_t *rate, uint32_t clk_sys) in get_apb1_periph_clkrate()
403 uint32_t *rate) in stm32_clock_control_get_subsys_rate()
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| D | clock_control_si32_apb.c | 35 uint32_t *rate) in clock_control_si32_apb_get_rate()
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| D | clock_control_mcux_sim.c | 46 uint32_t *rate) in mcux_sim_get_subsys_rate()
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| D | clock_control_rv32m1_pcc.c | 48 uint32_t *rate) in rv32m1_pcc_get_rate()
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| D | clock_control_renesas_rz_cpg.c | 105 uint32_t *rate) in clock_control_renesas_rz_get_rate()
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| D | clock_control_si32_ahb.c | 40 uint32_t *rate) in clock_control_si32_ahb_get_rate()
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| D | clock_control_silabs_series.c | 55 uint32_t *rate) in silabs_clock_control_get_rate()
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| D | clock_control_silabs_siwx91x.c | 123 uint32_t *rate) in siwx91x_clock_get_rate()
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| D | clock_control_renesas_ra_cgc.c | 64 uint32_t *rate) in clock_control_renesas_ra_get_rate()
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| D | clock_control_arm_scmi.c | 54 clock_control_subsys_t clk, uint32_t *rate) in scmi_clock_get_rate()
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| D | clock_control_ambiq.c | 90 uint32_t *rate) in ambiq_clock_get_rate()
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| D | clock_control_wch_rcc.c | 56 uint32_t *rate) in clock_control_wch_rcc_get_rate()
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| D | clock_control_gd32.c | 96 uint32_t *rate) in clock_control_gd32_get_rate()
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| D | clock_control_nrf_auxpll.c | 71 uint32_t *rate) in clock_control_nrf_auxpll_get_rate()
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| D | clock_control_smartbond.c | 355 static int smartbond_clock_get_rate(enum smartbond_clock clk, uint32_t *rate) in smartbond_clock_get_rate()
388 uint32_t *rate) in smartbond_clock_control_get_rate()
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| D | clock_control_renesas_cpg_mssr.c | 218 int rcar_cpg_get_rate(const struct device *dev, clock_control_subsys_t sys, uint32_t *rate) in rcar_cpg_get_rate()
259 clock_control_subsys_rate_t rate) in rcar_cpg_set_rate()
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| /Zephyr-latest/drivers/firmware/scmi/ |
| D | clk.c | 22 uint32_t rate[2]; member
36 uint32_t clk_id, uint32_t *rate) in scmi_clock_rate_get()
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | clock_control.h | 228 uint32_t *rate) in clock_control_get_rate()
258 clock_control_subsys_rate_t rate) in clock_control_set_rate()
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| D | ptp_clock.h | 92 static inline int ptp_clock_rate_adjust(const struct device *dev, double rate) in ptp_clock_rate_adjust()
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| /Zephyr-latest/drivers/dai/intel/hda/ |
| D | hda.h | 21 uint32_t rate; member
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| /Zephyr-latest/tests/boards/espressif/rtc_clk/src/ |
| D | rtc_clk_test.c | 28 uint32_t rate = 0; in rtc_clk_setup() local
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