| /Zephyr-latest/drivers/memc/ |
| D | memc_nxp_s32_qspi.c | 30 QuadSPI_Type *base; member
36 static inline uint8_t get_instance(QuadSPI_Type *base) in get_instance()
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| /Zephyr-latest/drivers/sensor/nxp/nxp_tempmon/ |
| D | nxp_tempmon.c | 31 TEMPMON_Type *base; member
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| /Zephyr-latest/drivers/serial/ |
| D | uart_opentitan.c | 39 mem_addr_t base; member
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| /Zephyr-latest/soc/nuvoton/npcx/npcx4/ |
| D | soc.h | 32 #define THEN(base) (*(volatile uint16_t *)(base + NPCX_THEN_OFFSET)) argument
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| /Zephyr-latest/drivers/flash/ |
| D | flash_andes_qspi.c | 53 uint32_t base; member
140 uint32_t base = config->base; in flash_andes_qspi_access() local
720 uint32_t base = config->base; in qspi_andes_configure() local
751 uint32_t base = config->base; in qspi_andes_irq_handler() local
820 uint32_t base = config->base; in flash_andes_qspi_init() local
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| D | flash_sam0.c | 213 static int flash_sam0_commit(const struct device *dev, off_t base) in flash_sam0_commit()
262 off_t base = offset - start; in flash_sam0_write() local
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_gd32.c | 40 uint32_t base; member
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| D | clock_control_mcux_pcc.c | 29 #define MAKE_PCC_REGADDR(base, offset) ((base) + (offset)) argument
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| /Zephyr-latest/drivers/dac/ |
| D | dac_stm32.c | 46 DAC_TypeDef *base; member
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| /Zephyr-latest/drivers/dai/nxp/esai/ |
| D | esai.h | 423 static inline void esai_tx_rx_enable_disable_fifo(ESAI_Type *base, in esai_tx_rx_enable_disable_fifo()
442 static inline void esai_tx_rx_enable_disable(ESAI_Type *base, in esai_tx_rx_enable_disable()
463 static inline void esai_tx_rx_enable_disable_fifo_usage(ESAI_Type *base, in esai_tx_rx_enable_disable_fifo_usage()
510 static inline void esai_dump_register_data(ESAI_Type *base) in esai_dump_register_data()
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| /Zephyr-latest/drivers/sdhc/ |
| D | sdhc_cdns_ll.c | 298 uintptr_t base; in sdhc_cdns_prepare() local
594 uintptr_t base; in sdhc_cdns_send_cmd() local
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| D | mcux_sdif.c | 38 SDIF_Type *base; member
59 static void mcux_sdif_transfer_complete(SDIF_Type *base, void *handle, in mcux_sdif_transfer_complete()
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| /Zephyr-latest/drivers/dma/ |
| D | dma_dw_common.c | 758 static int dw_dma_avail_data_size(const struct device *dev, uint32_t base, in dw_dma_avail_data_size()
791 static int dw_dma_free_data_size(const struct device *dev, uint32_t base, in dw_dma_free_data_size()
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| D | dma_mcux_smartdma.c | 23 SMARTDMA_Type *base; member
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| D | dma_stm32_bdma.h | 42 uint32_t base; member
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| D | dma_mcux_pxp.c | 23 PXP_Type *base; member
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| D | dma_stm32.h | 41 uint32_t base; member
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| /Zephyr-latest/include/zephyr/arch/nios2/ |
| D | nios2.h | 160 #define z_nios2_get_register_address(base, regnum) \ argument
163 static inline void _nios2_reg_write(void *base, int regnum, uint32_t data) in _nios2_reg_write()
169 static inline uint32_t _nios2_reg_read(void *base, int regnum) in _nios2_reg_read()
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_mcux_qtmr.c | 24 TMR_Type *base; member
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| /Zephyr-latest/drivers/watchdog/ |
| D | wdt_ambiq.c | 21 uint32_t base; member
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| /Zephyr-latest/arch/arm/core/mpu/ |
| D | arm_mpu_v7_internal.h | 115 const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) in get_region_attr_from_mpu_partition_info()
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| D | nxp_mpu.c | 209 const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) in get_region_attr_from_mpu_partition_info()
552 uint32_t base = mpu_region_get_base(i); in arm_core_mpu_mem_partition_config_update() local
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| /Zephyr-latest/drivers/mfd/ |
| D | mfd_nxp_lp_flexcomm.c | 30 LP_FLEXCOMM_Type *base; member
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| /Zephyr-latest/lib/os/ |
| D | cbprintf_nano.c | 31 static inline int convert_value(uint_value_type num, unsigned int base, in convert_value()
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| /Zephyr-latest/drivers/entropy/ |
| D | entropy_neorv32_trng.c | 36 mm_reg_t base; member
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